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authorSaman Sahebi <saman63@cs.unc.edu>2023-08-03 18:00:31 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2023-10-29 15:45:32 -0400
commitbebffaf223e975ab8f6fcf5fb6bd6de814fb614c (patch)
tree694f33d3e2b22590fd264e58a42f74ce64c645b0 /nvdebug_entry.c
parent7fda166c68c58887a90521911228ef734c7d4e4f (diff)
patched issues with GPU compatability for CE_MAP
Diffstat (limited to 'nvdebug_entry.c')
-rw-r--r--nvdebug_entry.c51
1 files changed, 33 insertions, 18 deletions
diff --git a/nvdebug_entry.c b/nvdebug_entry.c
index c444ff7..d355151 100644
--- a/nvdebug_entry.c
+++ b/nvdebug_entry.c
@@ -259,30 +259,45 @@ int __init nvdebug_init(void) {
259 num_gpcs_entry = proc_create_data( 259 num_gpcs_entry = proc_create_data(
260 "gpc_mask", 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops), 260 "gpc_mask", 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops),
261 (void*)NV_FUSE_GPC); 261 (void*)NV_FUSE_GPC);
262 // In both nouveau and nvgpu, the PCE_MAP register is only available on Volta+ 262 // In both nouveau and nvgpu, the PCE_MAP register is available on Pascal+
263 if (g_nvdebug_state[res].chip_id >= NV_CHIP_ID_VOLTA) { 263 if (g_nvdebug_state[res].chip_id >= NV_CHIP_ID_PASCAL){
264 264
265 //create a pce mask for iteration 265 // Create a pce mask for iteration
266 u32 ce_pce_map = nvdebug_readl(&g_nvdebug_state[device_id], NV_CE_PCE_MAP); 266 u32 ce_pce_map = nvdebug_readl(&g_nvdebug_state[device_id], NV_CE_PCE_MAP);
267 u32 num_pce = U32(hweight32(ce_pce_map)); 267 u32 num_pce = U32(hweight32(ce_pce_map));
268 u32 disabled_pce_mask = ~ce_pce_map;
269 char file_name[20]; 268 char file_name[20];
270 int pce_id; 269 int pce_id;
271 for (pce_id = 0; pce_id < num_pce; pce_id++){ 270 int i;
272 //if pce is disabled, do nothing 271 for (i = 0; pce_id = 0; pce_id < num_pce; i < MAP_SIZE; i++){
273 if ((1 << pce_id) & disabled_pce_mask) 272 // If pce is enabled, create files and iterate pce_id; otherwise, do nothing
274 continue; 273 if ((1 << i) & ce_pce_map){
275 snprintf(file_name, 20, "lce_for_pce%d",pce_id); 274 snprintf(file_name, 20, "lce_for_pce%d",pce_id);
276 lce_for_pce_entry = proc_create_data( 275 switch (g_nvdebug_state[res].chip_id){
277 file_name, 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops),
278 (void*)(uintptr_t)NV_LCE_FOR_PCE(pce_id));
279 snprintf(file_name, 20, "grce_for_pce%d",pce_id);
280 grce_for_pce_entry = proc_create_data(
281 file_name, 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops),
282 (void*)(uintptr_t)NV_GRCE_FOR_CE(pce_id));
283 276
284 if (!lce_for_pce_entry || !grce_for_pce_entry) 277 case NV_CHIP_ID_PASCAL:
285 return -ENOMEM; 278 lce_for_pce_entry = proc_create_data(
279 file_name, 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops),
280 (void*)(uintptr_t)NV_LCE_FOR_PCE_GP100(pce_id));
281 break;
282 case NV_CHIP_ID_VOLTA:
283 lce_for_pce_entry = proc_create_data(
284 file_name, 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops),
285 (void*)(uintptr_t)NV_LCE_FOR_PCE_GV100(pce_id));
286 break;
287 case NV_CHIP_ID_AMPERE:
288 lce_for_pce_entry = proc_create_data(
289 file_name, 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops),
290 (void*)(uintptr_t)NV_LCE_FOR_PCE_GA100(pce_id));
291 break;
292 }
293 snprintf(file_name, 20, "grce_for_pce%d",pce_id);
294 grce_for_pce_entry = proc_create_data(
295 file_name, 0444, dir, compat_ops(&nvdebug_read_reg32_file_ops),
296 (void*)(uintptr_t)NV_GRCE_FOR_CE(pce_id));
297 if (!lce_for_pce_entry || !grce_for_pce_entry)
298 return -ENOMEM;
299 pce_id++
300 }
286 } 301 }
287 302
288 // TODO: Redo to num_pces 303 // TODO: Redo to num_pces