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authorJoshua Bakita <bakitajoshua@gmail.com>2023-10-29 14:43:40 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2023-10-29 15:43:16 -0400
commit8da37f4bbb30027a6efa289bd97d98b2acb5c160 (patch)
tree08ffee914a0ea9b37fc8da07bae2a3bc88ab5ed9 /nvdebug.h
parent874aecaf06a96f5866f9bf31437a1ebd27c2f408 (diff)
Support printing device info on Ampere+ GPUs. By Benjamin Hadad IV
commit c3d6f2c852eb046e9d4f4f1e6527b52c746b2693 Author: Joshua Bakita <bakitajoshua@gmail.com> Date: Sun Oct 29 14:37:51 2023 -0400 Print Ampere+ device_info fields with correct offsets/widths Everything now has been checked against how nvgpu handles it commit b70849d1ce67a58f9f69b37dc62122f789f4cdf7 Author: Joshua Bakita <jbakita@cs.unc.edu> Date: Wed Sep 20 14:27:38 2023 -0400 Rearrange, fix an off-by-one error, and remove an unused define The code in nvdebug.h has been rearranged to enable an easier merge against the jbakita-wip branch. commit 51f808e092846a60ea6c88ea3a1d2e349c92977b Author: Joshua Bakita <jbakita@cs.unc.edu> Date: Wed Sep 20 13:09:17 2023 -0400 Bug fixes and cleanup for new device_info logic - Update comments to match new structure - Make show() function idempotent - Skip empty table entries without aborting - Include names for new engine types - Add warning log messages for skipped table entries - Remove non-functional runlist file creation logic for Ampere+ commit 1d7adc3be1aef5ac9c144bb24008fd8cc5d688a5 Author: Benjamin Hadad IV <bh4@unc.edu> Date: Sat Aug 19 12:47:18 2023 -0400 Debugging changes made to restore functionality following refactoring. - Debugged data display errors. - Debugged crash bugs. - Debugged memory issue. commit 9e6cc03cdf736fbd817ed53fa9a7f506bc91a244 Author: Benjamin Hadad IV <bh4@unc.edu> Date: Wed Aug 16 22:00:20 2023 -0400 A variety of changes have been made as part of the code review. - Functions have been consolidated. - Code was clarified and tidied up overall. - Unnecessary elements were removed. commit 845960fc1b15995fdbd6d61c384567652a150bc4 Author: Benjamin Hadad IV <bh4@unc.edu> Date: Fri Jul 28 11:39:28 2023 -0400 Refactored various systems and debugged minor issues - Added device_info_iter - Merged functions in device_info_procfs.c - Separated device_info data structs by version in nvdebug.h - Fixed issue with device_info runlist ID data commit 8a57aaeba41c43233c323d7e0fc8bf1a81ebc65e Author: Benjamin Hadad IV <bh4@unc.edu> Date: Fri Jul 21 11:32:51 2023 -0400 I have updated the ptop_device_info_t comment in nvdebug.h. commit 33c915f08f5dc63674b158ecc18897494256a6d0 Author: Benjamin Hadad IV <bh4@unc.edu> Date: Wed Jul 19 13:02:52 2023 -0400 Debugged device_info functionality - Fixed device_info crash bugs - Made further edits to display functionality - Refactored code to enhance readability commit bfb4dcf0e78954c0163f3a06a5a088c4d1b437a8 Author: Benjamin Hadad IV <bh4@unc.edu> Date: Thu Jul 13 12:13:17 2023 -0400 This commit is to update the repo for display during a meeting. - Added an Ampere version of the device info data. - Added Ampere versions of auxillary functions. - Modified display functions to accommodate Ampere data. - Made other various small modifications. commit 068e7f4e7208d6c9250ad72208e0b36fd9fdf2f6 Merge: 3725b15 073e897 Author: Benjamin Hadad IV <bh4@unc.edu> Date: Mon Jul 10 12:39:12 2023 -0400 Merge branch 'jbakita-wip' of ssh://rtsrv.cs.unc.edu/public/nvdebug into wip I am merging Mr. Bakita's changes (046d7d2) into this repository. commit 3725b15d5da3e06ef202045d710aa5f15eb72fcc Author: Benjamin Hadad IV <bh4@unc.edu> Date: Mon Jul 3 04:30:54 2023 -0400 I modified nvdebug.h for Ampere.
Diffstat (limited to 'nvdebug.h')
-rw-r--r--nvdebug.h59
1 files changed, 50 insertions, 9 deletions
diff --git a/nvdebug.h b/nvdebug.h
index 3860c2e..b79ede1 100644
--- a/nvdebug.h
+++ b/nvdebug.h
@@ -390,6 +390,7 @@ typedef union {
390#define NV_CHIP_ID_GV11B 0x15B // Jetson Xavier embedded GPU 390#define NV_CHIP_ID_GV11B 0x15B // Jetson Xavier embedded GPU
391#define NV_CHIP_ID_KEPLER 0x0E0 391#define NV_CHIP_ID_KEPLER 0x0E0
392#define NV_CHIP_ID_VOLTA 0x140 392#define NV_CHIP_ID_VOLTA 0x140
393#define NV_CHIP_ID_AMPERE 0x170
393 394
394inline static const char* ARCH2NAME(uint32_t arch) { 395inline static const char* ARCH2NAME(uint32_t arch) {
395 switch (arch) { 396 switch (arch) {
@@ -461,8 +462,7 @@ typedef union {
461 } __attribute__((packed)); 462 } __attribute__((packed));
462} mc_boot_0_t; 463} mc_boot_0_t;
463 464
464 465/* GPU engine information and control register offsets (GPU TOPology)
465/* GPU engine information and control register offsets
466 Each engine is described by one or more entries (terminated by an entry with 466 Each engine is described by one or more entries (terminated by an entry with
467 the `has_next_entry` flag unset) in the fixed-size PTOP_DEVICE_INFO table. A 467 the `has_next_entry` flag unset) in the fixed-size PTOP_DEVICE_INFO table. A
468 typical device, such as the graphics/compute engine and any copy engines, are 468 typical device, such as the graphics/compute engine and any copy engines, are
@@ -473,6 +473,12 @@ typedef union {
473 code should check all NV_PTOP_DEVICE_INFO__SIZE_1 entries and not terminate 473 code should check all NV_PTOP_DEVICE_INFO__SIZE_1 entries and not terminate
474 upon reaching the first entry of INFO_TYPE_NOT_VALID. 474 upon reaching the first entry of INFO_TYPE_NOT_VALID.
475 475
476 The fields for the Ampere version of the GPU are a strict subset of those for
477 the earlier versions. They are in different positions within the struct and
478 have names ending in _ampere to distinguish them. Other than that, each
479 Ampere device info field is functionally identical to the equivalent field in
480 the previous version.
481
476 INFO_TYPE : Is this a DATA, ENUM, or ENGINE_TYPE table entry? 482 INFO_TYPE : Is this a DATA, ENUM, or ENGINE_TYPE table entry?
477 HAS_NEXT_ENTRY : Does the following entry refer to the same engine? 483 HAS_NEXT_ENTRY : Does the following entry refer to the same engine?
478 484
@@ -517,8 +523,11 @@ typedef union {
517 Support: Kepler, Maxwell, Pascal, Volta, Ampere 523 Support: Kepler, Maxwell, Pascal, Volta, Ampere
518 See dev_top.ref.txt of NVIDIA's open-gpu-doc for more info. 524 See dev_top.ref.txt of NVIDIA's open-gpu-doc for more info.
519*/ 525*/
520#define NV_PTOP_DEVICE_INFO(i) (0x00022700+(i)*4) 526
521#define NV_PTOP_DEVICE_INFO__SIZE_1 64 527#define NV_PTOP_DEVICE_INFO_GA100(i) (0x00022800+(i)*4)
528#define NV_PTOP_DEVICE_INFO_GK104(i) (0x00022700+(i)*4)
529#define NV_PTOP_DEVICE_INFO__SIZE_1_GA100(g) (nvdebug_readl(g, 0x0224fc) >> 20)
530#define NV_PTOP_DEVICE_INFO__SIZE_1_GK104 64
522enum DEVICE_INFO_TYPE {INFO_TYPE_NOT_VALID = 0, INFO_TYPE_DATA = 1, INFO_TYPE_ENUM = 2, INFO_TYPE_ENGINE_TYPE = 3}; 531enum DEVICE_INFO_TYPE {INFO_TYPE_NOT_VALID = 0, INFO_TYPE_DATA = 1, INFO_TYPE_ENUM = 2, INFO_TYPE_ENGINE_TYPE = 3};
523enum ENGINE_TYPES { 532enum ENGINE_TYPES {
524 ENGINE_GRAPHICS = 0, // GRAPHICS [/compute] 533 ENGINE_GRAPHICS = 0, // GRAPHICS [/compute]
@@ -527,7 +536,7 @@ enum ENGINE_TYPES {
527 ENGINE_COPY2 = 3, // [raw/physical] COPY #2 536 ENGINE_COPY2 = 3, // [raw/physical] COPY #2
528 537
529 ENGINE_MSPDEC = 8, // Picture DECoder 538 ENGINE_MSPDEC = 8, // Picture DECoder
530 ENGINE_MSPPP = 9, // [Video] Post Processing 539 ENGINE_MSPPP = 9, // [Video] Picture Post Processor
531 ENGINE_MSVLD = 10, // [Video] Variable Length Decoder 540 ENGINE_MSVLD = 10, // [Video] Variable Length Decoder
532 ENGINE_MSENC = 11, // [Video] ENCoding 541 ENGINE_MSENC = 11, // [Video] ENCoding
533 ENGINE_VIC = 12, // Video Image Compositor 542 ENGINE_VIC = 12, // Video Image Compositor
@@ -538,10 +547,12 @@ enum ENGINE_TYPES {
538 547
539 ENGINE_IOCTRL = 18, // I/O ConTRoLler [of NVLINK at least] 548 ENGINE_IOCTRL = 18, // I/O ConTRoLler [of NVLINK at least]
540 ENGINE_LCE = 19, // Logical Copy Engine 549 ENGINE_LCE = 19, // Logical Copy Engine
541 ENGINE_GSP = 20, // Gpu System Processor 550 ENGINE_GSP = 20, // Gpu System Processor (Volta+)
542 ENGINE_NVJPG = 21, // NVidia JPeG [Decoder] (Ampere+) 551 ENGINE_NVJPG = 21, // NVidia JPeG [Decoder] (Turing+)
552 ENGINE_OFA = 22, // Optical Flow Accelerator (Turing+)
553 ENGINE_FLA = 23, // [NVLink] Fabric Logical Addressing [?]
543}; 554};
544#define ENGINE_TYPES_LEN 22 555#define ENGINE_TYPES_LEN 24
545static const char* const ENGINE_TYPES_NAMES[ENGINE_TYPES_LEN] = { 556static const char* const ENGINE_TYPES_NAMES[ENGINE_TYPES_LEN] = {
546 "Graphics/Compute", 557 "Graphics/Compute",
547 "COPY0", 558 "COPY0",
@@ -565,8 +576,38 @@ static const char* const ENGINE_TYPES_NAMES[ENGINE_TYPES_LEN] = {
565 "LCE: Logical Copy Engine", 576 "LCE: Logical Copy Engine",
566 "GSP: GPU System Processor", 577 "GSP: GPU System Processor",
567 "NVJPG: NVIDIA JPEG Decoder", 578 "NVJPG: NVIDIA JPEG Decoder",
579 "OFA: Optical Flow Accelerator",
580 "FLA: Fabric Logical Addressing",
568}; 581};
569 582
583// These field are from nvgpu/include/nvgpu/hw/ga100/hw_top_ga100.h
584typedef union {
585 // _info type fields
586 struct {
587 uint32_t fault_id:11;
588 uint32_t padding0:5;
589 uint32_t inst_id:8;
590 enum ENGINE_TYPES engine_type:7; // "type_enum"
591 bool has_next_entry:1;
592 } __attribute__((packed));
593 // _info2 type fields
594 struct {
595 uint32_t reset_id:8;
596 uint32_t pri_base:18; // "device_pri_base"
597 uint32_t padding1:4;
598 uint32_t is_engine:1;
599 uint32_t padding2:1;
600 } __attribute__((packed));
601 struct {
602 uint32_t rleng_id:2;
603 uint32_t padding3:8;
604 uint32_t runlist_pri_base:16;
605 uint32_t padding4:6;
606 } __attribute__((packed));
607 uint32_t raw;
608} ptop_device_info_ga100_t;
609
610// These field are from open-gpu-doc/manuals/volta/gv100/dev_top.ref.txt
570typedef union { 611typedef union {
571 // DATA type fields 612 // DATA type fields
572 struct { 613 struct {
@@ -604,7 +645,7 @@ typedef union {
604 uint32_t padding9:1; 645 uint32_t padding9:1;
605 } __attribute__((packed)); 646 } __attribute__((packed));
606 uint32_t raw; 647 uint32_t raw;
607} ptop_device_info_t; 648} ptop_device_info_gk104_t;
608 649
609/* Graphics Processing Cluster (GPC) information 650/* Graphics Processing Cluster (GPC) information
610 The GPU's Compute/Graphics engine is subdivided into Graphics Processing 651 The GPU's Compute/Graphics engine is subdivided into Graphics Processing