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authorJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
commitf347fde22f1297e4f022600d201780d5ead78114 (patch)
tree76be305d6187003a1e0486ff6e91efb1062ae118 /include/pmu_perf/vfe_var.c
parent8340d234d78a7d0f46c11a584de538148b78b7cb (diff)
Delete no-longer-needed nvgpu headers
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/pmu_perf/vfe_var.c')
-rw-r--r--include/pmu_perf/vfe_var.c1091
1 files changed, 0 insertions, 1091 deletions
diff --git a/include/pmu_perf/vfe_var.c b/include/pmu_perf/vfe_var.c
deleted file mode 100644
index a94c2d9..0000000
--- a/include/pmu_perf/vfe_var.c
+++ /dev/null
@@ -1,1091 +0,0 @@
1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/bios.h>
24#include <nvgpu/gk20a.h>
25
26#include "pmu_perf.h"
27#include "vfe_var.h"
28#include "boardobj/boardobjgrp.h"
29#include "boardobj/boardobjgrp_e32.h"
30#include "ctrl/ctrlclk.h"
31#include "ctrl/ctrlvolt.h"
32#include "ctrl/ctrlperf.h"
33
34static int devinit_get_vfe_var_table(struct gk20a *g,
35 struct vfe_vars *pvarobjs);
36static int vfe_var_construct_single(struct gk20a *g,
37 struct boardobj **ppboardobj,
38 u16 size, void *pargs);
39
40static int _vfe_vars_pmudatainit(struct gk20a *g,
41 struct boardobjgrp *pboardobjgrp,
42 struct nv_pmu_boardobjgrp_super *pboardobjgrppmu)
43{
44 struct nv_pmu_perf_vfe_var_boardobjgrp_set_header *pset =
45 (struct nv_pmu_perf_vfe_var_boardobjgrp_set_header *)
46 pboardobjgrppmu;
47 struct vfe_vars *pvars = (struct vfe_vars *)pboardobjgrp;
48 int status = 0;
49
50 status = boardobjgrp_pmudatainit_e32(g, pboardobjgrp, pboardobjgrppmu);
51 if (status) {
52 nvgpu_err(g,
53 "error updating pmu boardobjgrp for vfe var 0x%x",
54 status);
55 goto done;
56 }
57 pset->polling_periodms = pvars->polling_periodms;
58
59done:
60 return status;
61}
62
63static int _vfe_vars_pmudata_instget(struct gk20a *g,
64 struct nv_pmu_boardobjgrp *pmuboardobjgrp,
65 struct nv_pmu_boardobj **ppboardobjpmudata,
66 u8 idx)
67{
68 struct nv_pmu_perf_vfe_var_boardobj_grp_set *pgrp_set =
69 (struct nv_pmu_perf_vfe_var_boardobj_grp_set *)
70 pmuboardobjgrp;
71
72 nvgpu_log_info(g, " ");
73
74 /*check whether pmuboardobjgrp has a valid boardobj in index*/
75 if (idx >= CTRL_BOARDOBJGRP_E32_MAX_OBJECTS) {
76 return -EINVAL;
77 }
78
79 *ppboardobjpmudata = (struct nv_pmu_boardobj *)
80 &pgrp_set->objects[idx].data.board_obj;
81
82 nvgpu_log_info(g, " Done");
83 return 0;
84}
85
86static int _vfe_vars_pmustatus_instget(struct gk20a *g, void *pboardobjgrppmu,
87 struct nv_pmu_boardobj_query **ppboardobjpmustatus, u8 idx)
88{
89 struct nv_pmu_perf_vfe_var_boardobj_grp_get_status *pgrp_get_status =
90 (struct nv_pmu_perf_vfe_var_boardobj_grp_get_status *)
91 pboardobjgrppmu;
92
93 if (((u32)BIT(idx) &
94 pgrp_get_status->hdr.data.super.obj_mask.super.data[0]) == 0) {
95 return -EINVAL;
96 }
97
98 *ppboardobjpmustatus = (struct nv_pmu_boardobj_query *)
99 &pgrp_get_status->objects[idx].data.board_obj;
100 return 0;
101}
102
103
104int vfe_var_sw_setup(struct gk20a *g)
105{
106 u32 status;
107 struct boardobjgrp *pboardobjgrp = NULL;
108 struct vfe_vars *pvfevarobjs;
109
110 nvgpu_log_info(g, " ");
111
112 status = boardobjgrpconstruct_e32(g, &g->perf_pmu.vfe_varobjs.super);
113 if (status) {
114 nvgpu_err(g,
115 "error creating boardobjgrp for clk domain, status - 0x%x",
116 status);
117 goto done;
118 }
119
120 pboardobjgrp = &g->perf_pmu.vfe_varobjs.super.super;
121 pvfevarobjs = &g->perf_pmu.vfe_varobjs;
122
123 BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, PERF, VFE_VAR);
124
125 status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
126 perf, PERF, vfe_var, VFE_VAR);
127 if (status) {
128 nvgpu_err(g,
129 "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
130 status);
131 goto done;
132 }
133
134 pboardobjgrp->pmudatainit = _vfe_vars_pmudatainit;
135 pboardobjgrp->pmudatainstget = _vfe_vars_pmudata_instget;
136 pboardobjgrp->pmustatusinstget = _vfe_vars_pmustatus_instget;
137
138 status = devinit_get_vfe_var_table(g, pvfevarobjs);
139 if (status) {
140 goto done;
141 }
142
143 status = BOARDOBJGRP_PMU_CMD_GRP_GET_STATUS_CONSTRUCT(g,
144 &g->perf_pmu.vfe_varobjs.super.super,
145 perf, PERF, vfe_var, VFE_VAR);
146 if (status) {
147 nvgpu_err(g,
148 "error constructing PMU_BOARDOBJ_CMD_GRP_GET_STATUS interface - 0x%x",
149 status);
150 goto done;
151 }
152
153done:
154 nvgpu_log_info(g, " done status %x", status);
155 return status;
156}
157
158int vfe_var_pmu_setup(struct gk20a *g)
159{
160 int status;
161 struct boardobjgrp *pboardobjgrp = NULL;
162
163 nvgpu_log_info(g, " ");
164
165 pboardobjgrp = &g->perf_pmu.vfe_varobjs.super.super;
166
167 if (!pboardobjgrp->bconstructed) {
168 return -EINVAL;
169 }
170
171 status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
172
173 nvgpu_log_info(g, "Done");
174 return status;
175}
176
177static u32 dev_init_get_vfield_info(struct gk20a *g,
178 struct vfe_var_single_sensed_fuse *pvfevar)
179{
180 u8 *vfieldtableptr = NULL;
181 u32 vfieldheadersize = VFIELD_HEADER_SIZE;
182 u8 *vfieldregtableptr = NULL;
183 u32 vfieldregheadersize = VFIELD_REG_HEADER_SIZE;
184 u32 i;
185 u32 oldindex = 0xFFFFFFFF;
186 u32 currindex;
187 struct vfield_reg_header vregheader;
188 struct vfield_reg_entry vregentry;
189 struct vfield_header vheader;
190 struct vfield_entry ventry;
191 struct ctrl_bios_vfield_register_segment *psegment = NULL;
192 u8 *psegmentcount = NULL;
193 u32 status = 0;
194
195 vfieldregtableptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
196 g->bios.virt_token, VP_FIELD_REGISTER);
197 if (vfieldregtableptr == NULL) {
198 status = -EINVAL;
199 goto done;
200 }
201
202 vfieldtableptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
203 g->bios.virt_token, VP_FIELD_TABLE);
204 if (vfieldtableptr == NULL) {
205 status = -EINVAL;
206 goto done;
207 }
208
209 memcpy(&vregheader, vfieldregtableptr, VFIELD_REG_HEADER_SIZE);
210
211 if (vregheader.version != VBIOS_VFIELD_REG_TABLE_VERSION_1_0) {
212 nvgpu_err(g, "invalid vreg header version");
213 goto done;
214 }
215
216 memcpy(&vheader, vfieldtableptr, VFIELD_HEADER_SIZE);