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authorJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2024-09-25 16:09:09 -0400
commitf347fde22f1297e4f022600d201780d5ead78114 (patch)
tree76be305d6187003a1e0486ff6e91efb1062ae118 /include/pmu_perf/vfe_equ.c
parent8340d234d78a7d0f46c11a584de538148b78b7cb (diff)
Delete no-longer-needed nvgpu headers
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/pmu_perf/vfe_equ.c')
-rw-r--r--include/pmu_perf/vfe_equ.c607
1 files changed, 0 insertions, 607 deletions
diff --git a/include/pmu_perf/vfe_equ.c b/include/pmu_perf/vfe_equ.c
deleted file mode 100644
index 5b479d7..0000000
--- a/include/pmu_perf/vfe_equ.c
+++ /dev/null
@@ -1,607 +0,0 @@
1/*
2 * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23#include <nvgpu/bios.h>
24#include <nvgpu/gk20a.h>
25
26#include "pmu_perf.h"
27#include "vfe_equ.h"
28#include "boardobj/boardobjgrp.h"
29#include "boardobj/boardobjgrp_e255.h"
30#include "ctrl/ctrlclk.h"
31#include "ctrl/ctrlvolt.h"
32
33static struct vfe_equ *construct_vfe_equ(struct gk20a *g, void *pargs);
34static int devinit_get_vfe_equ_table(struct gk20a *g,
35 struct vfe_equs *pequobjs);
36
37static int _vfe_equs_pmudatainit(struct gk20a *g,
38 struct boardobjgrp *pboardobjgrp,
39 struct nv_pmu_boardobjgrp_super *pboardobjgrppmu)
40{
41 int status = 0;
42
43 status = boardobjgrp_pmudatainit_e255(g, pboardobjgrp, pboardobjgrppmu);
44 if (status) {
45 nvgpu_err(g, "error updating pmu boardobjgrp for vfe equ 0x%x",
46 status);
47 goto done;
48 }
49
50done:
51 return status;
52}
53
54static int _vfe_equs_pmudata_instget(struct gk20a *g,
55 struct nv_pmu_boardobjgrp *pmuboardobjgrp,
56 struct nv_pmu_boardobj **ppboardobjpmudata,
57 u8 idx)
58{
59 struct nv_pmu_perf_vfe_equ_boardobj_grp_set *pgrp_set =
60 (struct nv_pmu_perf_vfe_equ_boardobj_grp_set *)pmuboardobjgrp;
61
62 nvgpu_log_info(g, " ");
63
64 /* check whether pmuboardobjgrp has a valid boardobj in index */
65 if (idx >= CTRL_BOARDOBJGRP_E255_MAX_OBJECTS) {
66 return -EINVAL;
67 }
68
69 *ppboardobjpmudata = (struct nv_pmu_boardobj *)
70 &pgrp_set->objects[idx].data.board_obj;
71 nvgpu_log_info(g, " Done");
72 return 0;
73}
74
75int vfe_equ_sw_setup(struct gk20a *g)
76{
77 int status;
78 struct boardobjgrp *pboardobjgrp = NULL;
79 struct vfe_equs *pvfeequobjs;
80
81 nvgpu_log_info(g, " ");
82
83 status = boardobjgrpconstruct_e255(g, &g->perf_pmu.vfe_equobjs.super);
84 if (status) {
85 nvgpu_err(g,
86 "error creating boardobjgrp for clk domain, status - 0x%x",
87 status);
88 goto done;
89 }
90
91 pboardobjgrp = &g->perf_pmu.vfe_equobjs.super.super;
92 pvfeequobjs = &(g->perf_pmu.vfe_equobjs);
93
94 BOARDOBJGRP_PMU_CONSTRUCT(pboardobjgrp, PERF, VFE_EQU);
95
96 status = BOARDOBJGRP_PMU_CMD_GRP_SET_CONSTRUCT(g, pboardobjgrp,
97 perf, PERF, vfe_equ, VFE_EQU);
98 if (status) {
99 nvgpu_err(g,
100 "error constructing PMU_BOARDOBJ_CMD_GRP_SET interface - 0x%x",
101 status);
102 goto done;
103 }
104
105 pboardobjgrp->pmudatainit = _vfe_equs_pmudatainit;
106 pboardobjgrp->pmudatainstget = _vfe_equs_pmudata_instget;
107
108 status = devinit_get_vfe_equ_table(g, pvfeequobjs);
109 if (status) {
110 goto done;
111 }
112
113done:
114 nvgpu_log_info(g, " done status %x", status);
115 return status;
116}
117
118int vfe_equ_pmu_setup(struct gk20a *g)
119{
120 int status;
121 struct boardobjgrp *pboardobjgrp = NULL;
122
123 nvgpu_log_info(g, " ");
124
125 pboardobjgrp = &g->perf_pmu.vfe_equobjs.super.super;
126
127 if (!pboardobjgrp->bconstructed) {
128 return -EINVAL;
129 }
130
131 status = pboardobjgrp->pmuinithandle(g, pboardobjgrp);
132
133 nvgpu_log_info(g, "Done");
134 return status;
135}
136
137static int devinit_get_vfe_equ_table(struct gk20a *g,
138 struct vfe_equs *pvfeequobjs)
139{
140 int status = 0;
141 u8 *vfeequs_tbl_ptr = NULL;
142 struct vbios_vfe_3x_header_struct vfeequs_tbl_header = { 0 };
143 struct vbios_vfe_3x_equ_entry_struct equ = { 0 };
144 u8 *vfeequs_tbl_entry_ptr = NULL;
145 u8 *rd_offset_ptr = NULL;
146 u32 index = 0;
147 struct vfe_equ *pequ;
148 u8 equ_type = 0;
149 u32 szfmt;
150 union {
151 struct boardobj board_obj;
152 struct vfe_equ super;
153 struct vfe_equ_compare compare;
154 struct vfe_equ_minmax minmax;
155 struct vfe_equ_quadratic quadratic;
156 } equ_data;
157
158 nvgpu_log_info(g, " ");
159
160 vfeequs_tbl_ptr = (u8 *)nvgpu_bios_get_perf_table_ptrs(g,
161 g->bios.perf_token,
162 CONTINUOUS_VIRTUAL_BINNING_TABLE);
163
164 if (vfeequs_tbl_ptr == NULL) {
165 status = -EINVAL;
166 goto done;
167 }
168
169 memcpy(&vfeequs_tbl_header, vfeequs_tbl_ptr,
170 VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07);
171 if (vfeequs_tbl_header.header_size != VBIOS_CLOCKS_TABLE_1X_HEADER_SIZE_07) {
172 status = -EINVAL;
173 goto done;
174 }
175
176 if (vfeequs_tbl_header.vfe_equ_entry_size ==
177 VBIOS_VFE_3X_EQU_ENTRY_SIZE_17) {
178 szfmt = VBIOS_VFE_3X_EQU_ENTRY_SIZE_17;
179 } else if (vfeequs_tbl_header.vfe_equ_entry_size ==
180 VBIOS_VFE_3X_EQU_ENTRY_SIZE_18) {
181 szfmt = VBIOS_VFE_3X_EQU_ENTRY_SIZE_18;
182 } else {
183 status = -EINVAL;
184 goto done;
185 }
186
187 vfeequs_tbl_entry_ptr = vfeequs_tbl_ptr +
188 vfeequs_tbl_header.header_size +
189 (vfeequs_tbl_header.vfe_var_entry_count *
190 vfeequs_tbl_header.vfe_var_entry_size);
191
192 for (index = 0;
193 index < vfeequs_tbl_header.vfe_equ_entry_count;
194 index++) {
195 memset(&equ, 0, sizeof(struct vbios_vfe_3x_equ_entry_struct));
196
197 rd_offset_ptr = vfeequs_tbl_entry_ptr +
198 (index * vfeequs_tbl_header.vfe_equ_entry_size);
199
200 memcpy(&equ, rd_offset_ptr, szfmt);
201
202 equ_data.super.var_idx = (u8)equ.var_idx;
203 equ_data.super.equ_idx_next =
204 (equ.equ_idx_next == VBIOS_VFE_3X_EQU_ENTRY_IDX_INVALID) ?
205 CTRL_BOARDOBJ_IDX_INVALID : (u8)equ.equ_idx_next;
206 equ_data.super.out_range_min = equ.out_range_min;
207 equ_data.super.out_range_max = equ.out_range_max;
208
209 switch (BIOS_GET_FIELD(equ.param3, VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE)) {
210 case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_UNITLESS:
211 equ_data.super.output_type =
212 CTRL_PERF_VFE_EQU_OUTPUT_TYPE_UNITLESS;
213 break;
214
215 case VBIOS_VFE_3X_EQU_ENTRY_PAR3_OUTPUT_TYPE_FREQ_MHZ:
216 equ_data.super.output_type =