diff options
| author | Joshua Bakita <bakitajoshua@gmail.com> | 2023-06-28 18:24:25 -0400 |
|---|---|---|
| committer | Joshua Bakita <bakitajoshua@gmail.com> | 2023-06-28 18:24:25 -0400 |
| commit | 01e6fac4d61fdd7fff5433942ec93fc2ea1e4df1 (patch) | |
| tree | 4ef34501728a087be24f4ba0af90f91486bf780b /include/os/linux/nvgpu_mem.c | |
| parent | 306a03d18b305e4e573be3b2931978fa10679eb9 (diff) | |
Include nvgpu headers
These are needed to build on NVIDIA's Jetson boards for the time
being. Only a couple structs are required, so it should be fairly
easy to remove this dependency at some point in the future.
Diffstat (limited to 'include/os/linux/nvgpu_mem.c')
| -rw-r--r-- | include/os/linux/nvgpu_mem.c | 348 |
1 files changed, 348 insertions, 0 deletions
diff --git a/include/os/linux/nvgpu_mem.c b/include/os/linux/nvgpu_mem.c new file mode 100644 index 0000000..d6a3189 --- /dev/null +++ b/include/os/linux/nvgpu_mem.c | |||
| @@ -0,0 +1,348 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify it | ||
| 5 | * under the terms and conditions of the GNU General Public License, | ||
| 6 | * version 2, as published by the Free Software Foundation. | ||
| 7 | * | ||
| 8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
| 9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
| 10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
| 11 | * more details. | ||
| 12 | * | ||
| 13 | * You should have received a copy of the GNU General Public License | ||
| 14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
| 15 | */ | ||
| 16 | |||
| 17 | #include <nvgpu/dma.h> | ||
| 18 | #include <nvgpu/gmmu.h> | ||
| 19 | #include <nvgpu/nvgpu_mem.h> | ||
| 20 | #include <nvgpu/page_allocator.h> | ||
| 21 | #include <nvgpu/log.h> | ||
| 22 | #include <nvgpu/bug.h> | ||
| 23 | #include <nvgpu/enabled.h> | ||
| 24 | #include <nvgpu/kmem.h> | ||
| 25 | #include <nvgpu/vidmem.h> | ||
| 26 | #include <nvgpu/gk20a.h> | ||
| 27 | |||
| 28 | #include <nvgpu/linux/dma.h> | ||
| 29 | |||
| 30 | #include <linux/vmalloc.h> | ||
| 31 | #include <linux/dma-mapping.h> | ||
| 32 | |||
| 33 | #include "os_linux.h" | ||
| 34 | #include "dmabuf_vidmem.h" | ||
| 35 | |||
| 36 | #include "gk20a/mm_gk20a.h" | ||
| 37 | #include "platform_gk20a.h" | ||
| 38 | |||
| 39 | static u64 __nvgpu_sgl_phys(struct gk20a *g, struct nvgpu_sgl *sgl) | ||
| 40 | { | ||
| 41 | struct device *dev = dev_from_gk20a(g); | ||
| 42 | struct gk20a_platform *platform = gk20a_get_platform(dev); | ||
| 43 | u64 ipa = sg_phys((struct scatterlist *)sgl); | ||
| 44 | |||
| 45 | if (platform->phys_addr) | ||
| 46 | return platform->phys_addr(g, ipa); | ||
| 47 | |||
| 48 | return ipa; | ||
| 49 | } | ||
| 50 | |||
| 51 | /* | ||
| 52 | * Obtain a SYSMEM address from a Linux SGL. This should eventually go away | ||
| 53 | * and/or become private to this file once all bad usages of Linux SGLs are | ||
| 54 | * cleaned up in the driver. | ||
| 55 | */ | ||
| 56 | u64 nvgpu_mem_get_addr_sgl(struct gk20a *g, struct scatterlist *sgl) | ||
| 57 | { | ||
| 58 | if (nvgpu_is_enabled(g, NVGPU_MM_USE_PHYSICAL_SG) || | ||
| 59 | !nvgpu_iommuable(g)) | ||
| 60 | return g->ops.mm.gpu_phys_addr(g, NULL, | ||
| 61 | __nvgpu_sgl_phys(g, (struct nvgpu_sgl *)sgl)); | ||
| 62 | |||
| 63 | if (sg_dma_address(sgl) == 0) | ||
| 64 | return g->ops.mm.gpu_phys_addr(g, NULL, | ||
| 65 | __nvgpu_sgl_phys(g, (struct nvgpu_sgl *)sgl)); | ||
| 66 | |||
| 67 | if (sg_dma_address(sgl) == DMA_ERROR_CODE) | ||
| 68 | return 0; | ||
| 69 | |||
| 70 | return nvgpu_mem_iommu_translate(g, sg_dma_address(sgl)); | ||
| 71 | } | ||
| 72 | |||
| 73 | /* | ||
| 74 | * Obtain the address the GPU should use from the %mem assuming this is a SYSMEM | ||
| 75 | * allocation. | ||
| 76 | */ | ||
| 77 | static u64 nvgpu_mem_get_addr_sysmem(struct gk20a *g, struct nvgpu_mem *mem) | ||
| 78 | { | ||
| 79 | return nvgpu_mem_get_addr_sgl(g, mem->priv.sgt->sgl); | ||
| 80 | } | ||
| 81 | |||
| 82 | /* | ||
| 83 | * Return the base address of %mem. Handles whether this is a VIDMEM or SYSMEM | ||
| 84 | * allocation. | ||
| 85 | * | ||
| 86 | * Note: this API does not make sense to use for _VIDMEM_ buffers with greater | ||
| 87 | * than one scatterlist chunk. If there's more than one scatterlist chunk then | ||
| 88 | * the buffer will not be contiguous. As such the base address probably isn't | ||
| 89 | * very useful. This is true for SYSMEM as well, if there's no IOMMU. | ||
| 90 | * | ||
| 91 | * However! It _is_ OK to use this on discontiguous sysmem buffers _if_ there's | ||
| 92 | * an IOMMU present and enabled for the GPU. | ||
| 93 | * | ||
| 94 | * %attrs can be NULL. If it is not NULL then it may be inspected to determine | ||
| 95 | * if the address needs to be modified before writing into a PTE. | ||
| 96 | */ | ||
| 97 | u64 nvgpu_mem_get_addr(struct gk20a *g, struct nvgpu_mem *mem) | ||
| 98 | { | ||
| 99 | struct nvgpu_page_alloc *alloc; | ||
| 100 | |||
| 101 | if (mem->aperture == APERTURE_SYSMEM) | ||
| 102 | return nvgpu_mem_get_addr_sysmem(g, mem); | ||
| 103 | |||
| 104 | /* | ||
| 105 | * Otherwise get the vidmem address. | ||
| 106 | */ | ||
| 107 | alloc = mem->vidmem_alloc; | ||
| 108 | |||
| 109 | /* This API should not be used with > 1 chunks */ | ||
| 110 | WARN_ON(alloc->nr_chunks != 1); | ||
| 111 | |||
| 112 | return alloc->base; | ||
| 113 | } | ||
| 114 | |||
| 115 | /* | ||
| 116 | * This should only be used on contiguous buffers regardless of whether | ||
| 117 | * there's an IOMMU present/enabled. This applies to both SYSMEM and | ||
| 118 | * VIDMEM. | ||
| 119 | */ | ||
| 120 | u64 nvgpu_mem_get_phys_addr(struct gk20a *g, struct nvgpu_mem *mem) | ||
| 121 | { | ||
| 122 | /* | ||
| 123 | * For a VIDMEM buf, this is identical to simply get_addr() so just fall | ||
| 124 | * back to that. | ||
| 125 | */ | ||
| 126 | if (mem->aperture == APERTURE_VIDMEM) | ||
| 127 | return nvgpu_mem_get_addr(g, mem); | ||
| 128 | |||
| 129 | return __nvgpu_sgl_phys(g, (struct nvgpu_sgl *)mem->priv.sgt->sgl); | ||
| 130 | } | ||
| 131 | |||
| 132 | /* | ||
| 133 | * Be careful how you use this! You are responsible for correctly freeing this | ||
| 134 | * memory. | ||
| 135 | */ | ||
| 136 | int nvgpu_mem_create_from_mem(struct gk20a *g, | ||
| 137 | struct nvgpu_mem *dest, struct nvgpu_mem *src, | ||
| 138 | u64 start_page, int nr_pages) | ||
| 139 | { | ||
| 140 | int ret; | ||
| 141 | u64 start = start_page * PAGE_SIZE; | ||
| 142 | u64 size = nr_pages * PAGE_SIZE; | ||
| 143 | dma_addr_t new_iova; | ||
| 144 | |||
| 145 | if (src->aperture != APERTURE_SYSMEM) | ||
| 146 | return -EINVAL; | ||
| 147 | |||
| 148 | /* Some silly things a caller might do... */ | ||
| 149 | if (size > src->size) | ||
| 150 | return -EINVAL; | ||
| 151 | if ((start + size) > src->size) | ||
| 152 | return -EINVAL; | ||
| 153 | |||
| 154 | dest->mem_flags = src->mem_flags | NVGPU_MEM_FLAG_SHADOW_COPY; | ||
| 155 | dest->aperture = src->aperture; | ||
| 156 | dest->skip_wmb = src->skip_wmb; | ||
| 157 | dest->size = size; | ||
| 158 | |||
| 159 | /* | ||
| 160 | * Re-use the CPU mapping only if the mapping was made by the DMA API. | ||
| 161 | * | ||
| 162 | * Bug 2040115: the DMA API wrapper makes the mapping that we should | ||
| 163 | * re-use. | ||
| 164 | */ | ||
| 165 | if (!(src->priv.flags & NVGPU_DMA_NO_KERNEL_MAPPING) || | ||
| 166 | nvgpu_is_enabled(g, NVGPU_USE_COHERENT_SYSMEM)) | ||
| 167 | dest->cpu_va = src->cpu_va + (PAGE_SIZE * start_page); | ||
| 168 | |||
| 169 | dest->priv.pages = src->priv.pages + start_page; | ||
| 170 | dest->priv.flags = src->priv.flags; | ||
| 171 | |||
| 172 | new_iova = sg_dma_address(src->priv.sgt->sgl) ? | ||
| 173 | sg_dma_address(src->priv.sgt->sgl) + start : 0; | ||
| 174 | |||
| 175 | /* | ||
| 176 | * Make a new SG table that is based only on the subset of pages that | ||
| 177 | * is passed to us. This table gets freed by the dma free routines. | ||
| 178 | */ | ||
| 179 | if (src->priv.flags & NVGPU_DMA_NO_KERNEL_MAPPING) | ||
| 180 | ret = nvgpu_get_sgtable_from_pages(g, &dest->priv.sgt, | ||
| 181 | src->priv.pages + start_page, | ||
| 182 | new_iova, size); | ||
| 183 | else | ||
| 184 | ret = nvgpu_get_sgtable(g, &dest->priv.sgt, dest->cpu_va, | ||
| 185 | new_iova, size); | ||
| 186 | |||
| 187 | return ret; | ||
| 188 | } | ||
| 189 | |||
| 190 | int __nvgpu_mem_create_from_pages(struct gk20a *g, struct nvgpu_mem *dest, | ||
| 191 | struct page **pages, int nr_pages) | ||
| 192 | { | ||
| 193 | struct sg_table *sgt; | ||
| 194 | struct page **our_pages = | ||
| 195 | nvgpu_kmalloc(g, sizeof(struct page *) * nr_pages); | ||
| 196 | |||
| 197 | if (!our_pages) | ||
| 198 | return -ENOMEM; | ||
| 199 | |||
| 200 | memcpy(our_pages, pages, sizeof(struct page *) * nr_pages); | ||
| 201 | |||
| 202 | if (nvgpu_get_sgtable_from_pages(g, &sgt, pages, 0, | ||
| 203 | nr_pages * PAGE_SIZE)) { | ||
| 204 | nvgpu_kfree(g, our_pages); | ||
| 205 | return -ENOMEM; | ||
| 206 | } | ||
| 207 | |||
| 208 | /* | ||
| 209 | * If we are making an SGT from physical pages we can be reasonably | ||
| 210 | * certain that this should bypass the SMMU - thus we set the DMA (aka | ||
| 211 | * IOVA) address to 0. This tells the GMMU mapping code to not make a | ||
| 212 | * mapping directed to the SMMU. | ||
| 213 | */ | ||
| 214 | sg_dma_address(sgt->sgl) = 0; | ||
