Include nvgpu headers

These are needed to build on NVIDIA's Jetson boards for the time
being. Only a couple structs are required, so it should be fairly
easy to remove this dependency at some point in the future.

1 files changed, 1388 insertions, 0 deletions

diff --git a/include/os/linux/ioctl_channel.c b/include/os/linux/ioctl_channel.c
new file mode 100644
index 0000000..0f39cc7
--- /dev/null
+++ b/include/os/linux/ioctl_channel.c
@@ -0,0 +1,1388 @@
+/*
+ * GK20A Graphics channel
+ *
+ * Copyright (c) 2011-2020, NVIDIA CORPORATION.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <trace/events/gk20a.h>
+#include <linux/file.h>
+#include <linux/anon_inodes.h>
+#include <linux/dma-buf.h>
+#include <linux/poll.h>
+#include <uapi/linux/nvgpu.h>
+
+#include <nvgpu/semaphore.h>
+#include <nvgpu/timers.h>
+#include <nvgpu/kmem.h>
+#include <nvgpu/log.h>
+#include <nvgpu/list.h>
+#include <nvgpu/debug.h>
+#include <nvgpu/enabled.h>
+#include <nvgpu/error_notifier.h>
+#include <nvgpu/barrier.h>
+#include <nvgpu/nvhost.h>
+#include <nvgpu/os_sched.h>
+#include <nvgpu/gk20a.h>
+#include <nvgpu/channel.h>
+#include <nvgpu/channel_sync.h>
+
+#include "gk20a/dbg_gpu_gk20a.h"
+#include "gk20a/fence_gk20a.h"
+
+#include "platform_gk20a.h"
+#include "ioctl_channel.h"
+#include "channel.h"
+#include "os_linux.h"
+#include "ctxsw_trace.h"
+
+/* the minimal size of client buffer */
+#define CSS_MIN_CLIENT_SNAPSHOT_SIZE                            \
+                (sizeof(struct gk20a_cs_snapshot_fifo) +        \
+                sizeof(struct gk20a_cs_snapshot_fifo_entry) * 256)
+
+static const char *gr_gk20a_graphics_preempt_mode_name(u32 graphics_preempt_mode)
+{
+        switch (graphics_preempt_mode) {
+        case NVGPU_PREEMPTION_MODE_GRAPHICS_WFI:
+                return "WFI";
+        default:
+                return "?";
+        }
+}
+
+static const char *gr_gk20a_compute_preempt_mode_name(u32 compute_preempt_mode)
+{
+        switch (compute_preempt_mode) {
+        case NVGPU_PREEMPTION_MODE_COMPUTE_WFI:
+                return "WFI";
+        case NVGPU_PREEMPTION_MODE_COMPUTE_CTA:
+                return "CTA";
+        default:
+                return "?";
+        }
+}
+
+static void gk20a_channel_trace_sched_param(
+        void (*trace)(int chid, int tsgid, pid_t pid, u32 timeslice,
+                u32 timeout, const char *interleave,
+                const char *graphics_preempt_mode,
+                const char *compute_preempt_mode),
+        struct channel_gk20a *ch)
+{
+        struct tsg_gk20a *tsg = tsg_gk20a_from_ch(ch);
+
+        if (!tsg)
+                return;
+
+        (trace)(ch->chid, ch->tsgid, ch->pid,
+                tsg_gk20a_from_ch(ch)->timeslice_us,
+                ch->timeout_ms_max,
+                gk20a_fifo_interleave_level_name(tsg->interleave_level),
+                gr_gk20a_graphics_preempt_mode_name(
+                        tsg->gr_ctx.graphics_preempt_mode),
+                gr_gk20a_compute_preempt_mode_name(
+                        tsg->gr_ctx.compute_preempt_mode));
+}
+
+/*
+ * Although channels do have pointers back to the gk20a struct that they were
+ * created under in cases where the driver is killed that pointer can be bad.
+ * The channel memory can be freed before the release() function for a given
+ * channel is called. This happens when the driver dies and userspace doesn't
+ * get a chance to call release() until after the entire gk20a driver data is
+ * unloaded and freed.
+ */
+struct channel_priv {
+        struct gk20a *g;
+        struct channel_gk20a *c;
+};
+
+#if defined(CONFIG_GK20A_CYCLE_STATS)
+
+void gk20a_channel_free_cycle_stats_buffer(struct channel_gk20a *ch)
+{
+        struct nvgpu_channel_linux *priv = ch->os_priv;
+
+        /* disable existing cyclestats buffer */
+        nvgpu_mutex_acquire(&ch->cyclestate.cyclestate_buffer_mutex);
+        if (priv->cyclestate_buffer_handler) {
+                dma_buf_vunmap(priv->cyclestate_buffer_handler,
+                                ch->cyclestate.cyclestate_buffer);
+                dma_buf_put(priv->cyclestate_buffer_handler);
+                priv->cyclestate_buffer_handler = NULL;
+                ch->cyclestate.cyclestate_buffer = NULL;
+                ch->cyclestate.cyclestate_buffer_size = 0;
+        }
+        nvgpu_mutex_release(&ch->cyclestate.cyclestate_buffer_mutex);
+}
+
+int gk20a_channel_cycle_stats(struct channel_gk20a *ch, int dmabuf_fd)
+{
+        struct dma_buf *dmabuf;
+        void *virtual_address;
+        struct nvgpu_channel_linux *priv = ch->os_priv;
+
+        /* is it allowed to handle calls for current GPU? */
+        if (!nvgpu_is_enabled(ch->g, NVGPU_SUPPORT_CYCLE_STATS))
+                return -ENOSYS;
+
+        if (dmabuf_fd && !priv->cyclestate_buffer_handler) {
+
+                /* set up new cyclestats buffer */
+                dmabuf = dma_buf_get(dmabuf_fd);
+                if (IS_ERR(dmabuf))
+                        return PTR_ERR(dmabuf);
+                virtual_address = dma_buf_vmap(dmabuf);
+                if (!virtual_address)
+                        return -ENOMEM;
+
+                priv->cyclestate_buffer_handler = dmabuf;
+                ch->cyclestate.cyclestate_buffer = virtual_address;
+                ch->cyclestate.cyclestate_buffer_size = dmabuf->size;
+                return 0;
+
+        } else if (!dmabuf_fd && priv->cyclestate_buffer_handler) {
+                gk20a_channel_free_cycle_stats_buffer(ch);
+                return 0;
+
+        } else if (!dmabuf_fd && !priv->cyclestate_buffer_handler) {
+                /* no request from GL */
+                return 0;
+
+        } else {
+                pr_err("channel already has cyclestats buffer\n");
+                return -EINVAL;
+        }
+}
+
+int gk20a_flush_cycle_stats_snapshot(struct channel_gk20a *ch)
+{
+        int ret;
+
+        nvgpu_mutex_acquire(&ch->cs_client_mutex);
+        if (ch->cs_client)
+                ret = gr_gk20a_css_flush(ch, ch->cs_client);
+        else
+                ret = -EBADF;
+        nvgpu_mutex_release(&ch->cs_client_mutex);
+
+        return ret;
+}
+
+int gk20a_attach_cycle_stats_snapshot(struct channel_gk20a *ch,
+                                u32 dmabuf_fd,
+                                u32 perfmon_id_count,
+                                u32 *perfmon_id_start)
+{
+        int ret = 0;
+        struct gk20a *g = ch->g;
+        struct gk20a_cs_snapshot_client_linux *client_linux;
+        struct gk20a_cs_snapshot_client *client;
+
+        nvgpu_mutex_acquire(&ch->cs_client_mutex);
+        if (ch->cs_client) {
+                nvgpu_mutex_release(&ch->cs_client_mutex);
+                return -EEXIST;
+        }
+
+        client_linux = nvgpu_kzalloc(g, sizeof(*client_linux));
+        if (!client_linux) {
+                ret = -ENOMEM;
+                goto err;
+        }
+
+        client_linux->dmabuf_fd   = dmabuf_fd;
+        client_linux->dma_handler = dma_buf_get(client_linux->dmabuf_fd);
+        if (IS_ERR(client_linux->dma_handler)) {
+                ret = PTR_ERR(client_linux->dma_handler);
+                client_linux->dma_handler = NULL;