Include nvgpu headers

These are needed to build on NVIDIA's Jetson boards for the time
being. Only a couple structs are required, so it should be fairly
easy to remove this dependency at some point in the future.

1 files changed, 1794 insertions, 0 deletions

diff --git a/include/os/linux/cde.c b/include/os/linux/cde.c
new file mode 100644
index 0000000..715513c
--- /dev/null
+++ b/include/os/linux/cde.c
@@ -0,0 +1,1794 @@
+/*
+ * Color decompression engine support
+ *
+ * Copyright (c) 2014-2018, NVIDIA Corporation.  All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/dma-mapping.h>
+#include <linux/fs.h>
+#include <linux/dma-buf.h>
+#include <uapi/linux/nvgpu.h>
+
+#include <trace/events/gk20a.h>
+
+#include <nvgpu/dma.h>
+#include <nvgpu/gmmu.h>
+#include <nvgpu/timers.h>
+#include <nvgpu/nvgpu_common.h>
+#include <nvgpu/kmem.h>
+#include <nvgpu/log.h>
+#include <nvgpu/bug.h>
+#include <nvgpu/firmware.h>
+#include <nvgpu/os_sched.h>
+#include <nvgpu/channel.h>
+#include <nvgpu/utils.h>
+#include <nvgpu/gk20a.h>
+
+#include <nvgpu/linux/vm.h>
+
+#include "gk20a/mm_gk20a.h"
+#include "gk20a/fence_gk20a.h"
+#include "gk20a/gr_gk20a.h"
+
+#include "cde.h"
+#include "os_linux.h"
+#include "dmabuf.h"
+#include "channel.h"
+#include "cde_gm20b.h"
+#include "cde_gp10b.h"
+
+#include <nvgpu/hw/gk20a/hw_ccsr_gk20a.h>
+#include <nvgpu/hw/gk20a/hw_pbdma_gk20a.h>
+
+static int gk20a_cde_load(struct gk20a_cde_ctx *cde_ctx);
+static struct gk20a_cde_ctx *gk20a_cde_allocate_context(struct nvgpu_os_linux *l);
+
+#define CTX_DELETE_TIME 1000
+
+#define MAX_CTX_USE_COUNT 42
+#define MAX_CTX_RETRY_TIME 2000
+
+static dma_addr_t gpuva_to_iova_base(struct vm_gk20a *vm, u64 gpu_vaddr)
+{
+        struct nvgpu_mapped_buf *buffer;
+        dma_addr_t addr = 0;
+        struct gk20a *g = gk20a_from_vm(vm);
+
+        nvgpu_mutex_acquire(&vm->update_gmmu_lock);
+        buffer = __nvgpu_vm_find_mapped_buf(vm, gpu_vaddr);
+        if (buffer)
+                addr = nvgpu_mem_get_addr_sgl(g, buffer->os_priv.sgt->sgl);
+        nvgpu_mutex_release(&vm->update_gmmu_lock);
+
+        return addr;
+}
+
+static void gk20a_deinit_cde_img(struct gk20a_cde_ctx *cde_ctx)
+{
+        unsigned int i;
+
+        for (i = 0; i < cde_ctx->num_bufs; i++) {
+                struct nvgpu_mem *mem = cde_ctx->mem + i;
+                nvgpu_dma_unmap_free(cde_ctx->vm, mem);
+        }
+
+        nvgpu_kfree(&cde_ctx->l->g, cde_ctx->init_convert_cmd);
+
+        cde_ctx->convert_cmd = NULL;
+        cde_ctx->init_convert_cmd = NULL;
+        cde_ctx->num_bufs = 0;
+        cde_ctx->num_params = 0;
+        cde_ctx->init_cmd_num_entries = 0;
+        cde_ctx->convert_cmd_num_entries = 0;
+        cde_ctx->init_cmd_executed = false;
+}
+
+static void gk20a_cde_remove_ctx(struct gk20a_cde_ctx *cde_ctx)
+__must_hold(&cde_app->mutex)
+{
+        struct nvgpu_os_linux *l = cde_ctx->l;
+        struct gk20a *g = &l->g;
+        struct channel_gk20a *ch = cde_ctx->ch;
+        struct vm_gk20a *vm = ch->vm;
+
+        trace_gk20a_cde_remove_ctx(cde_ctx);
+
+        /* release mapped memory */
+        gk20a_deinit_cde_img(cde_ctx);
+        nvgpu_gmmu_unmap(vm, &g->gr.compbit_store.mem,
+                         cde_ctx->backing_store_vaddr);
+
+        /*
+         * free the channel
+         * gk20a_channel_close() will also unbind the channel from TSG
+         */
+        gk20a_channel_close(ch);
+        nvgpu_ref_put(&cde_ctx->tsg->refcount, gk20a_tsg_release);
+
+        /* housekeeping on app */
+        nvgpu_list_del(&cde_ctx->list);
+        l->cde_app.ctx_count--;
+        nvgpu_kfree(g, cde_ctx);
+}
+
+static void gk20a_cde_cancel_deleter(struct gk20a_cde_ctx *cde_ctx,
+                bool wait_finish)
+__releases(&cde_app->mutex)
+__acquires(&cde_app->mutex)
+{
+        struct gk20a_cde_app *cde_app = &cde_ctx->l->cde_app;
+
+        /* permanent contexts do not have deleter works */
+        if (!cde_ctx->is_temporary)
+                return;
+
+        if (wait_finish) {
+                nvgpu_mutex_release(&cde_app->mutex);
+                cancel_delayed_work_sync(&cde_ctx->ctx_deleter_work);
+                nvgpu_mutex_acquire(&cde_app->mutex);
+        } else {
+                cancel_delayed_work(&cde_ctx->ctx_deleter_work);
+        }
+}
+
+static void gk20a_cde_remove_contexts(struct nvgpu_os_linux *l)
+__must_hold(&l->cde_app->mutex)
+{
+        struct gk20a_cde_app *cde_app = &l->cde_app;
+        struct gk20a_cde_ctx *cde_ctx, *cde_ctx_save;
+
+        /* safe to go off the mutex in cancel_deleter since app is
+         * deinitialised; no new jobs are started. deleter works may be only at
+         * waiting for the mutex or before, going to abort */
+
+        nvgpu_list_for_each_entry_safe(cde_ctx, cde_ctx_save,
+                        &cde_app->free_contexts, gk20a_cde_ctx, list) {
+                gk20a_cde_cancel_deleter(cde_ctx, true);
+                gk20a_cde_remove_ctx(cde_ctx);
+        }
+
+        nvgpu_list_for_each_entry_safe(cde_ctx, cde_ctx_save,
+                        &cde_app->used_contexts, gk20a_cde_ctx, list) {
+                gk20a_cde_cancel_deleter(cde_ctx, true);
+                gk20a_cde_remove_ctx(cde_ctx);
+        }
+}
+
+static void gk20a_cde_stop(struct nvgpu_os_linux *l)
+__must_hold(&l->cde_app->mutex)
+{
+        struct gk20a_cde_app *cde_app = &l->cde_app;
+
+        /* prevent further conversions and delayed works from working */
+        cde_app->initialised = false;
+        /* free all data, empty the list */
+        gk20a_cde_remove_contexts(l);
+}
+
+void gk20a_cde_destroy(struct nvgpu_os_linux *l)
+__acquires(&l->cde_app->mutex)
+__releases(&l->cde_app->mutex)
+{
+        struct gk20a_cde_app *cde_app = &l->cde_app;
+
+        if (!cde_app->initialised)
+                return;
+
+        nvgpu_mutex_acquire(&cde_app->mutex);
+        gk20a_cde_stop(l);
+        nvgpu_mutex_release(&cde_app->mutex);
+
+        nvgpu_mutex_destroy(&cde_app->mutex);
+}
+
+void gk20a_cde_suspend(struct nvgpu_os_linux *l)
+__acquires(&l->cde_app->mutex)
+__releases(&l->cde_app->mutex)
+{
+        struct gk20a_cde_app *cde_app = &l->cde_app;
+        struct gk20a_cde_ctx *cde_ctx, *cde_ctx_save;
+
+        if (!cde_app->initialised)
+                return;
+
+        nvgpu_mutex_acquire(&cde_app->mutex);
+
+        nvgpu_list_for_each_entry_safe(cde_ctx, cde_ctx_save,
+                        &cde_app->free_contexts, gk20a_cde_ctx, list) {
+                gk20a_cde_cancel_deleter(cde_ctx, false);
+        }
+
+        nvgpu_list_for_each_entry_safe(cde_ctx, cde_ctx_save,
+                        &cde_app->used_contexts, gk20a_cde_ctx, list) {
+                gk20a_cde_cancel_deleter(cde_ctx, false);
+        }
+
+        nvgpu_mutex_release(&cde_app->mutex);
+
+}
+
+static int gk