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authorJoshua Bakita <bakitajoshua@gmail.com>2023-06-28 18:24:25 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2023-06-28 18:24:25 -0400
commit01e6fac4d61fdd7fff5433942ec93fc2ea1e4df1 (patch)
tree4ef34501728a087be24f4ba0af90f91486bf780b /include/nvgpu/sim.h
parent306a03d18b305e4e573be3b2931978fa10679eb9 (diff)
Include nvgpu headers
These are needed to build on NVIDIA's Jetson boards for the time being. Only a couple structs are required, so it should be fairly easy to remove this dependency at some point in the future.
Diffstat (limited to 'include/nvgpu/sim.h')
-rw-r--r--include/nvgpu/sim.h58
1 files changed, 58 insertions, 0 deletions
diff --git a/include/nvgpu/sim.h b/include/nvgpu/sim.h
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1/*
2 * Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22#ifndef NVGPU_SIM_H
23#define NVGPU_SIM_H
24
25#include <nvgpu/nvgpu_mem.h>
26
27struct gk20a;
28struct sim_nvgpu {
29 struct gk20a *g;
30 u32 send_ring_put;
31 u32 recv_ring_get;
32 u32 recv_ring_put;
33 u32 sequence_base;
34 struct nvgpu_mem send_bfr;
35 struct nvgpu_mem recv_bfr;
36 struct nvgpu_mem msg_bfr;
37 void (*sim_init_late)(struct gk20a *);
38 void (*remove_support)(struct gk20a *);
39 void (*esc_readl)(
40 struct gk20a *g, char *path, u32 index, u32 *data);
41};
42#ifdef __KERNEL__
43#include "linux/sim.h"
44#include "linux/sim_pci.h"
45#elif defined(__NVGPU_POSIX__)
46/* Nothing for POSIX-nvgpu. */
47#else
48#include <nvgpu_rmos/include/sim.h>
49#include <nvgpu_rmos/include/sim_pci.h>
50#endif
51int nvgpu_init_sim_support(struct gk20a *g);
52int nvgpu_init_sim_support_pci(struct gk20a *g);
53int nvgpu_alloc_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem);
54void nvgpu_free_sim_buffer(struct gk20a *g, struct nvgpu_mem *mem);
55void nvgpu_free_sim_support(struct gk20a *g);
56void nvgpu_remove_sim_support(struct gk20a *g);
57
58#endif /* NVGPU_SIM_H */