diff options
| author | Joshua Bakita <bakitajoshua@gmail.com> | 2024-09-25 16:09:09 -0400 |
|---|---|---|
| committer | Joshua Bakita <bakitajoshua@gmail.com> | 2024-09-25 16:09:09 -0400 |
| commit | f347fde22f1297e4f022600d201780d5ead78114 (patch) | |
| tree | 76be305d6187003a1e0486ff6e91efb1062ae118 /include/nvgpu/pmuif/gpmuifperfvfe.h | |
| parent | 8340d234d78a7d0f46c11a584de538148b78b7cb (diff) | |
Delete no-longer-needed nvgpu headers
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/nvgpu/pmuif/gpmuifperfvfe.h')
| -rw-r--r-- | include/nvgpu/pmuif/gpmuifperfvfe.h | 206 |
1 files changed, 0 insertions, 206 deletions
diff --git a/include/nvgpu/pmuif/gpmuifperfvfe.h b/include/nvgpu/pmuif/gpmuifperfvfe.h deleted file mode 100644 index d128c32..0000000 --- a/include/nvgpu/pmuif/gpmuifperfvfe.h +++ /dev/null | |||
| @@ -1,206 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. | ||
| 3 | * | ||
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
| 5 | * copy of this software and associated documentation files (the "Software"), | ||
| 6 | * to deal in the Software without restriction, including without limitation | ||
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
| 9 | * Software is furnished to do so, subject to the following conditions: | ||
| 10 | * | ||
| 11 | * The above copyright notice and this permission notice shall be included in | ||
| 12 | * all copies or substantial portions of the Software. | ||
| 13 | * | ||
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
| 17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
| 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
| 20 | * DEALINGS IN THE SOFTWARE. | ||
| 21 | */ | ||
| 22 | #ifndef NVGPU_PMUIF_GPMUIFPERFVFE_H | ||
| 23 | #define NVGPU_PMUIF_GPMUIFPERFVFE_H | ||
| 24 | |||
| 25 | #include "gpmuifbios.h" | ||
| 26 | #include "gpmuifboardobj.h" | ||
| 27 | #include "ctrl/ctrlperf.h" | ||
| 28 | |||
| 29 | #define CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT 0x03 | ||
| 30 | #define NV_PMU_PERF_RPC_VFE_EQU_EVAL_VAR_COUNT_MAX 2 | ||
| 31 | #define NV_PMU_PERF_RPC_VFE_EQU_MONITOR_COUNT_MAX 16 | ||
| 32 | |||
| 33 | struct nv_pmu_perf_vfe_var_value { | ||
| 34 | u8 var_type; | ||
| 35 | u8 reserved[3]; | ||
| 36 | u32 var_value; | ||
| 37 | }; | ||
| 38 | |||
| 39 | union nv_pmu_perf_vfe_equ_result { | ||
| 40 | u32 freq_m_hz; | ||
| 41 | u32 voltu_v; | ||
| 42 | u32 vf_gain; | ||
| 43 | int volt_deltau_v; | ||
| 44 | }; | ||
| 45 | |||
| 46 | struct nv_pmu_perf_rpc_vfe_equ_eval { | ||
| 47 | u8 equ_idx; | ||
| 48 | u8 var_count; | ||
| 49 | u8 output_type; | ||
| 50 | struct nv_pmu_perf_vfe_var_value var_values[ | ||
| 51 | NV_PMU_PERF_RPC_VFE_EQU_EVAL_VAR_COUNT_MAX]; | ||
| 52 | union nv_pmu_perf_vfe_equ_result result; | ||
| 53 | }; | ||
| 54 | |||
| 55 | struct nv_pmu_perf_rpc_vfe_load { | ||
| 56 | bool b_load; | ||
| 57 | }; | ||
| 58 | |||
| 59 | struct nv_pmu_perf_vfe_var_boardobjgrp_get_status_header { | ||
| 60 | struct nv_pmu_boardobjgrp_e32 super; | ||
| 61 | }; | ||
| 62 | |||
| 63 | struct nv_pmu_perf_vfe_var_get_status_super { | ||
| 64 | struct nv_pmu_boardobj_query board_obj; | ||
| 65 | }; | ||
| 66 | |||
| 67 | struct nv_pmu_perf_vfe_var_single_sensed_fuse_get_status { | ||
| 68 | struct nv_pmu_perf_vfe_var_get_status_super super; | ||
| 69 | struct ctrl_perf_vfe_var_single_sensed_fuse_value fuse_value_integer; | ||
| 70 | struct ctrl_perf_vfe_var_single_sensed_fuse_value fuse_value_hw_integer; | ||
| 71 | u8 fuse_version; | ||
| 72 | bool b_version_check_failed; | ||
| 73 | }; | ||
| 74 | |||
| 75 | union nv_pmu_perf_vfe_var_boardobj_get_status_union { | ||
| 76 | struct nv_pmu_boardobj_query board_obj; | ||
| 77 | struct nv_pmu_perf_vfe_var_get_status_super super; | ||
| 78 | struct nv_pmu_perf_vfe_var_single_sensed_fuse_get_status fuse_status; | ||
| 79 | }; | ||
| 80 | |||
| 81 | NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(perf, vfe_var); | ||
| 82 | |||
| 83 | struct nv_pmu_vfe_var { | ||
| 84 | struct nv_pmu_boardobj super; | ||
| 85 | u32 out_range_min; | ||
| 86 | u32 out_range_max; | ||
| 87 | struct ctrl_boardobjgrp_mask_e32 mask_dependent_vars; | ||
| 88 | struct ctrl_boardobjgrp_mask_e255 mask_dependent_equs; | ||
| 89 | }; | ||
| 90 | |||
| 91 | struct nv_pmu_vfe_var_derived { | ||
| 92 | struct nv_pmu_vfe_var super; | ||
| 93 | }; | ||
| 94 | |||
| 95 | struct nv_pmu_vfe_var_derived_product { | ||
| 96 | struct nv_pmu_vfe_var_derived super; | ||
| 97 | u8 var_idx0; | ||
| 98 | u8 var_idx1; | ||
| 99 | }; | ||
| 100 | |||
| 101 | struct nv_pmu_vfe_var_derived_sum { | ||
| 102 | struct nv_pmu_vfe_var_derived super; | ||
| 103 | u8 var_idx0; | ||
| 104 | u8 var_idx1; | ||
| 105 | }; | ||
| 106 | |||
| 107 | struct nv_pmu_vfe_var_single { | ||
| 108 | struct nv_pmu_vfe_var super; | ||
| 109 | u8 override_type; | ||
| 110 | u32 override_value; | ||
| 111 | }; | ||
| 112 | |||
| 113 | struct nv_pmu_vfe_var_single_frequency { | ||
| 114 | struct nv_pmu_vfe_var_single super; | ||
| 115 | }; | ||
| 116 | |||
| 117 | struct nv_pmu_vfe_var_single_sensed { | ||
| 118 | struct nv_pmu_vfe_var_single super; | ||
| 119 | }; | ||
| 120 | |||
| 121 | struct nv_pmu_vfe_var_single_sensed_fuse { | ||
| 122 | struct nv_pmu_vfe_var_single_sensed super; | ||
| 123 | struct ctrl_perf_vfe_var_single_sensed_fuse_override_info override_info; | ||
| 124 | struct ctrl_perf_vfe_var_single_sensed_fuse_vfield_info vfield_info; | ||
| 125 | struct ctrl_perf_vfe_var_single_sensed_fuse_ver_vfield_info vfield_ver_info; | ||
| 126 | struct ctrl_perf_vfe_var_single_sensed_fuse_value fuse_val_default; | ||
| 127 | bool b_fuse_value_signed; | ||
| 128 | }; | ||
| 129 | |||
| 130 | struct nv_pmu_vfe_var_single_sensed_temp { | ||
| 131 | struct nv_pmu_vfe_var_single_sensed super; | ||
| 132 | u8 therm_channel_index; | ||
| 133 | int temp_hysteresis_positive; | ||
| 134 | int temp_hysteresis_negative; | ||
| 135 | int temp_default; | ||
| 136 | }; | ||
| 137 | |||
| 138 | struct nv_pmu_vfe_var_single_voltage { | ||
| 139 | struct nv_pmu_vfe_var_single super; | ||
| 140 | }; | ||
| 141 | |||
| 142 | struct nv_pmu_perf_vfe_var_boardobjgrp_set_header { | ||
| 143 | struct nv_pmu_boardobjgrp_e32 super; | ||
| 144 | u8 polling_periodms; | ||
| 145 | }; | ||
| 146 | |||
| 147 | union nv_pmu_perf_vfe_var_boardobj_set_union { | ||
| 148 | struct nv_pmu_boardobj board_obj; | ||
| 149 | struct nv_pmu_vfe_var var; | ||
| 150 | struct nv_pmu_vfe_var_derived var_derived; | ||
| 151 | struct nv_pmu_vfe_var_derived_product var_derived_product; | ||
| 152 | struct nv_pmu_vfe_var_derived_sum var_derived_sum; | ||
| 153 | struct nv_pmu_vfe_var_single var_single; | ||
| 154 | struct nv_pmu_vfe_var_single_frequency var_single_frequiency; | ||
| 155 | struct nv_pmu_vfe_var_single_sensed var_single_sensed; | ||
| 156 | struct nv_pmu_vfe_var_single_sensed_fuse var_single_sensed_fuse; | ||
| 157 | struct nv_pmu_vfe_var_single_sensed_temp var_single_sensed_temp; | ||
| 158 | struct nv_pmu_vfe_var_single_voltage var_single_voltage; | ||
| 159 | }; | ||
| 160 | |||
| 161 | NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(perf, vfe_var); | ||
| 162 | |||
| 163 | struct nv_pmu_vfe_equ { | ||
| 164 | struct nv_pmu_boardobj super; | ||
| 165 | u8 var_idx; | ||
| 166 | u8 equ_idx_next; | ||
| 167 | u8 output_type; | ||
| 168 | u32 out_range_min; | ||
| 169 | u32 out_range_max; | ||
| 170 | }; | ||
| 171 | |||
| 172 | struct nv_pmu_vfe_equ_compare { | ||
| 173 | struct nv_pmu_vfe_equ super; | ||
| 174 | u8 func_id; | ||
| 175 | u8 equ_idx_true; | ||
| 176 | u8 equ_idx_false; | ||
| 177 | u32 criteria; | ||
| 178 | }; | ||
| 179 | |||
| 180 | struct nv_pmu_vfe_equ_minmax { | ||
| 181 | struct nv_pmu_vfe_equ super; | ||
| 182 | bool b_max; | ||
| 183 | u8 equ_idx0; | ||
| 184 | u8 equ_idx1; | ||
| 185 | }; | ||
| 186 | |||
| 187 | struct nv_pmu_vfe_equ_quadratic { | ||
| 188 | struct nv_pmu_vfe_equ super; | ||
| 189 | u32 coeffs[CTRL_PERF_VFE_EQU_QUADRATIC_COEFF_COUNT]; | ||
| 190 | }; | ||
| 191 | |||
| 192 | struct nv_pmu_perf_vfe_equ_boardobjgrp_set_header { | ||
| 193 | struct nv_pmu_boardobjgrp_e255 super; | ||
| 194 | }; | ||
| 195 | |||
| 196 | union nv_pmu_perf_vfe_equ_boardobj_set_union { | ||
| 197 | struct nv_pmu_boardobj board_obj; | ||
| 198 | struct nv_pmu_vfe_equ equ; | ||
| 199 | struct nv_pmu_vfe_equ_compare equ_comapre; | ||
| 200 | struct nv_pmu_vfe_equ_minmax equ_minmax; | ||
| 201 | struct nv_pmu_vfe_equ_quadratic equ_quadratic; | ||
| 202 | }; | ||
| 203 | |||
| 204 | NV_PMU_BOARDOBJ_GRP_SET_MAKE_E255(perf, vfe_equ); | ||
| 205 | |||
| 206 | #endif /* NVGPU_PMUIF_GPMUIFPERFVFE_H*/ | ||
