diff options
| author | Joshua Bakita <bakitajoshua@gmail.com> | 2023-06-28 18:24:25 -0400 |
|---|---|---|
| committer | Joshua Bakita <bakitajoshua@gmail.com> | 2023-06-28 18:24:25 -0400 |
| commit | 01e6fac4d61fdd7fff5433942ec93fc2ea1e4df1 (patch) | |
| tree | 4ef34501728a087be24f4ba0af90f91486bf780b /include/nvgpu/pmuif/gpmuifboardobj.h | |
| parent | 306a03d18b305e4e573be3b2931978fa10679eb9 (diff) | |
Include nvgpu headers
These are needed to build on NVIDIA's Jetson boards for the time
being. Only a couple structs are required, so it should be fairly
easy to remove this dependency at some point in the future.
Diffstat (limited to 'include/nvgpu/pmuif/gpmuifboardobj.h')
| -rw-r--r-- | include/nvgpu/pmuif/gpmuifboardobj.h | 234 |
1 files changed, 234 insertions, 0 deletions
diff --git a/include/nvgpu/pmuif/gpmuifboardobj.h b/include/nvgpu/pmuif/gpmuifboardobj.h new file mode 100644 index 0000000..47226aa --- /dev/null +++ b/include/nvgpu/pmuif/gpmuifboardobj.h | |||
| @@ -0,0 +1,234 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. | ||
| 3 | * | ||
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
| 5 | * copy of this software and associated documentation files (the "Software"), | ||
| 6 | * to deal in the Software without restriction, including without limitation | ||
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
| 9 | * Software is furnished to do so, subject to the following conditions: | ||
| 10 | * | ||
| 11 | * The above copyright notice and this permission notice shall be included in | ||
| 12 | * all copies or substantial portions of the Software. | ||
| 13 | * | ||
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
| 17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
| 18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
| 19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
| 20 | * DEALINGS IN THE SOFTWARE. | ||
| 21 | */ | ||
| 22 | #ifndef NVGPU_PMUIF_GPMUIFBOARDOBJ_H | ||
| 23 | #define NVGPU_PMUIF_GPMUIFBOARDOBJ_H | ||
| 24 | |||
| 25 | #include <nvgpu/flcnif_cmn.h> | ||
| 26 | #include "ctrl/ctrlboardobj.h" | ||
| 27 | |||
| 28 | /* board object group command id's. */ | ||
| 29 | #define NV_PMU_BOARDOBJGRP_CMD_SET 0x00U | ||
| 30 | #define NV_PMU_BOARDOBJGRP_CMD_GET_STATUS 0x01U | ||
| 31 | |||
| 32 | #define NV_PMU_RPC_ID_CLK_BOARD_OBJ_GRP_CMD 0x00U | ||
| 33 | #define NV_PMU_RPC_ID_FAN_BOARD_OBJ_GRP_CMD 0x00U | ||
| 34 | #define NV_PMU_RPC_ID_PERF_BOARD_OBJ_GRP_CMD 0x00U | ||
| 35 | #define NV_PMU_RPC_ID_PERF_CF_BOARD_OBJ_GRP_CMD 0x00U | ||
| 36 | #define NV_PMU_RPC_ID_PMGR_BOARD_OBJ_GRP_CMD 0x00U | ||
| 37 | #define NV_PMU_RPC_ID_THERM_BOARD_OBJ_GRP_CMD 0x00U | ||
| 38 | #define NV_PMU_RPC_ID_VOLT_BOARD_OBJ_GRP_CMD 0x00U | ||
| 39 | |||
| 40 | /* | ||
| 41 | * Base structure describing a BOARDOBJ for communication between Kernel and | ||
| 42 | * PMU. | ||
| 43 | */ | ||
| 44 | struct nv_pmu_boardobj { | ||
| 45 | u8 type; | ||
| 46 | u8 grp_idx; | ||
| 47 | }; | ||
| 48 | |||
| 49 | /* | ||
| 50 | * Base structure describing a BOARDOBJ for Query interface between Kernel and | ||
| 51 | * PMU. | ||
| 52 | */ | ||
| 53 | struct nv_pmu_boardobj_query { | ||
| 54 | u8 type; | ||
| 55 | u8 grp_idx; | ||
| 56 | }; | ||
| 57 | |||
| 58 | /* | ||
| 59 | * Virtual base structure describing a BOARDOBJGRP interface between Kernel and | ||
| 60 | * PMU. | ||
| 61 | */ | ||
| 62 | struct nv_pmu_boardobjgrp_super { | ||
| 63 | u8 type; | ||
| 64 | u8 class_id; | ||
| 65 | u8 obj_slots; | ||
| 66 | u8 flags; | ||
| 67 | }; | ||
| 68 | |||
| 69 | struct nv_pmu_boardobjgrp { | ||
| 70 | struct nv_pmu_boardobjgrp_super super; | ||
| 71 | u32 obj_mask; | ||
| 72 | }; | ||
| 73 | |||
| 74 | struct nv_pmu_boardobjgrp_e32 { | ||
| 75 | struct nv_pmu_boardobjgrp_super super; | ||
| 76 | struct ctrl_boardobjgrp_mask_e32 obj_mask; | ||
| 77 | }; | ||
| 78 | |||
| 79 | struct nv_pmu_boardobjgrp_e255 { | ||
| 80 | struct nv_pmu_boardobjgrp_super super; | ||
| 81 | struct ctrl_boardobjgrp_mask_e255 obj_mask; | ||
| 82 | }; | ||
| 83 | |||
| 84 | struct nv_pmu_boardobj_cmd_grp_payload { | ||
| 85 | struct pmu_allocation_v3 dmem_buf; | ||
| 86 | struct flcn_mem_desc_v0 fb; | ||
| 87 | u8 hdr_size; | ||
| 88 | u8 entry_size; | ||
| 89 | }; | ||
| 90 | |||
| 91 | struct nv_pmu_boardobj_cmd_grp { | ||
| 92 | u8 cmd_type; | ||
| 93 | u8 pad[2]; | ||
| 94 | u8 class_id; | ||
| 95 | struct nv_pmu_boardobj_cmd_grp_payload grp; | ||
| 96 | }; | ||
| 97 | |||
| 98 | #define NV_PMU_BOARDOBJ_GRP_ALLOC_OFFSET \ | ||
| 99 | (NV_OFFSETOF(NV_PMU_BOARDOBJ_CMD_GRP, grp)) | ||
| 100 | |||
| 101 | struct nv_pmu_boardobj_cmd { | ||
| 102 | union { | ||
| 103 | u8 cmd_type; | ||
| 104 | struct nv_pmu_boardobj_cmd_grp grp; | ||
| 105 | struct nv_pmu_boardobj_cmd_grp grp_set; | ||
| 106 | struct nv_pmu_boardobj_cmd_grp grp_get_status; | ||
| 107 | }; | ||
| 108 | }; | ||
| 109 | |||
| 110 | struct nv_pmu_boardobj_msg_grp { | ||
| 111 | u8 msg_type; | ||
| 112 | bool b_success; | ||
| 113 | flcn_status flcn_status; | ||
| 114 | u8 class_id; | ||
| 115 | }; | ||
| 116 | |||
| 117 | struct nv_pmu_boardobj_msg { | ||
| 118 | union { | ||
| 119 | u8 msg_type; | ||
| 120 | struct nv_pmu_boardobj_msg_grp grp; | ||
| 121 | struct nv_pmu_boardobj_msg_grp grp_set; | ||
| 122 | struct nv_pmu_boardobj_msg_grp grp_get_status; | ||
| 123 | }; | ||
| 124 | }; | ||
| 125 | |||
| 126 | /* | ||
| 127 | * Macro generating structures describing classes which implement | ||
| 128 | * NV_PMU_BOARDOBJGRP via the NV_PMU_BOARDBOBJ_CMD_GRP SET interface. | ||
| 129 | * | ||
| 130 | * @para _eng Name of implementing engine in which this structure is | ||
| 131 | * found. | ||
| 132 | * @param _class Class ID of Objects within Board Object Group. | ||
| 133 | * @param _slots Max number of elements this group can contain. | ||
| 134 | */ | ||
| 135 | #define NV_PMU_BOARDOBJ_GRP_SET_MAKE(_eng, _class, _slots) \ | ||
| 136 | NV_PMU_MAKE_ALIGNED_STRUCT( \ | ||
| 137 | nv_pmu_##_eng##_##_class##_boardobjgrp_set_header, one_structure); \ | ||
| 138 | NV_PMU_MAKE_ALIGNED_UNION( \ | ||
| 139 | nv_pmu_##_eng##_##_class##_boardobj_set_union, one_union); \ | ||
| 140 | struct nv_pmu_##_eng##_##_class##_boardobj_grp_set { \ | ||
| 141 | union nv_pmu_##_eng##_##_class##_boardobjgrp_set_header_aligned hdr; \ | ||
| 142 | union nv_pmu_##_eng##_##_class##_boardobj_set_union_aligned objects[(_slots)];\ | ||
| 143 | } | ||
| 144 | |||
| 145 | /* | ||
| 146 | * Macro generating structures describing classes which implement | ||
| 147 | * NV_PMU_BOARDOBJGRP_E32 via the NV_PMU_BOARDBOBJ_CMD_GRP SET interface. | ||
| 148 | * | ||
| 149 | * @para _eng Name of implementing engine in which this structure is | ||
| 150 | * found. | ||
| 151 | * @param _class Class ID of Objects within Board Object Group. | ||
| 152 | */ | ||
| 153 | #define NV_PMU_BOARDOBJ_GRP_SET_MAKE_E32(_eng, _class) \ | ||
| 154 | NV_PMU_BOARDOBJ_GRP_SET_MAKE(_eng, _class, \ | ||
| 155 | CTRL_BOARDOBJGRP_E32_MAX_OBJECTS) | ||
| 156 | |||
| 157 | /* | ||
| 158 | * Macro generating structures describing classes which implement | ||
| 159 | * NV_PMU_BOARDOBJGRP_E255 via the NV_PMU_BOARDBOBJ_CMD_GRP SET interface. | ||
| 160 | * | ||
| 161 | * @para _eng Name of implementing engine in which this structure is | ||
| 162 | * found. | ||
| 163 | * @param _class Class ID of Objects within Board Object Group. | ||
| 164 | */ | ||
| 165 | #define NV_PMU_BOARDOBJ_GRP_SET_MAKE_E255(_eng, _class) \ | ||
| 166 | NV_PMU_BOARDOBJ_GRP_SET_MAKE(_eng, _class, \ | ||
| 167 | CTRL_BOARDOBJGRP_E255_MAX_OBJECTS) | ||
| 168 | |||
| 169 | /* | ||
| 170 | * Macro generating structures for querying dynamic state for classes which | ||
| 171 | * implement NV_PMU_BOARDOBJGRP via the NV_PMU_BOARDOBJ_CMD_GRP GET_STATUS | ||
| 172 | * interface. | ||
| 173 | * | ||
| 174 | * @para _eng Name of implementing engine in which this structure is | ||
| 175 | * found. | ||
| 176 | * @param _class Class ID of Objects within Board Object Group. | ||
| 177 | * @param _slots Max number of elements this group can contain. | ||
| 178 | */ | ||
| 179 | #define NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE(_eng, _class, _slots) \ | ||
| 180 | NV_PMU_MAKE_ALIGNED_STRUCT( \ | ||
| 181 | nv_pmu_##_eng##_##_class##_boardobjgrp_get_status_header, struct); \ | ||
| 182 | NV_PMU_MAKE_ALIGNED_UNION( \ | ||
| 183 | nv_pmu_##_eng##_##_class##_boardobj_get_status_union, union); \ | ||
| 184 | struct nv_pmu_##_eng##_##_class##_boardobj_grp_get_status { \ | ||
| 185 | union nv_pmu_##_eng##_##_class##_boardobjgrp_get_status_header_aligned \ | ||
| 186 | hdr; \ | ||
| 187 | union nv_pmu_##_eng##_##_class##_boardobj_get_status_union_aligned \ | ||
| 188 | objects[(_slots)]; \ | ||
| 189 | } | ||
| 190 | |||
| 191 | /* | ||
| 192 | * Macro generating structures for querying dynamic state for classes which | ||
| 193 | * implement NV_PMU_BOARDOBJGRP_E32 via the NV_PMU_BOARDOBJ_CMD_GRP GET_STATUS | ||
| 194 | * interface. | ||
| 195 | * | ||
| 196 | * @para _eng Name of implementing engine in which this structure is | ||
| 197 | * found. | ||
| 198 | * @param _class Class ID of Objects within Board Object Group. | ||
| 199 | */ | ||
| 200 | #define NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE_E32(_eng, _class) \ | ||
| 201 | NV_PMU_BOARDOBJ_GRP_GET_STATUS_MAKE(_eng, _class, \ | ||
| 202 | CTRL_BOARDOBJGRP_E32_MAX_OBJECTS) | ||
| 203 | |||
| 204 | /* | ||
| 205 | * Macro generating structures for querying dynamic state for classes which | ||
