Include nvgpu headers

These are needed to build on NVIDIA's Jetson boards for the time
being. Only a couple structs are required, so it should be fairly
easy to remove this dependency at some point in the future.

1 files changed, 2169 insertions, 0 deletions

diff --git a/include/nvgpu/hw_sim_pci.h b/include/nvgpu/hw_sim_pci.h
new file mode 100644
index 0000000..32dbeb4
--- /dev/null
+++ b/include/nvgpu/hw_sim_pci.h
@@ -0,0 +1,2169 @@
+/*
+ * Copyright (c) 2012-2018, NVIDIA Corporation.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+ /*
+  * Function naming determines intended use:
+  *
+  *     <x>_r(void) : Returns the offset for register <x>.
+  *
+  *     <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
+  *
+  *     <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
+  *
+  *     <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
+  *         and masked to place it at field <y> of register <x>.  This value
+  *         can be |'d with others to produce a full register value for
+  *         register <x>.
+  *
+  *     <x>_<y>_m(void) : Returns a mask for field <y> of register <x>.  This
+  *         value can be ~'d and then &'d to clear the value of field <y> for
+  *         register <x>.
+  *
+  *     <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
+  *         to place it at field <y> of register <x>.  This value can be |'d
+  *         with others to produce a full register value for <x>.
+  *
+  *     <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
+  *         <x> value 'r' after being shifted to place its LSB at bit 0.
+  *         This value is suitable for direct comparison with other unshifted
+  *         values appropriate for use in field <y> of register <x>.
+  *
+  *     <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
+  *         field <y> of register <x>.  This value is suitable for direct
+  *         comparison with unshifted values appropriate for use in field <y>
+  *         of register <x>.
+  */
+
+#ifndef __hw_sim_pci_h__
+#define __hw_sim_pci_h__
+/*This file is autogenerated.  Do not edit. */
+
+static inline u32 sim_r(void)
+{
+        return 0x0008f000U;
+}
+static inline u32 sim_send_ring_r(void)
+{
+        return 0x00000000U;
+}
+static inline u32 sim_send_ring_target_s(void)
+{
+        return 2U;
+}
+static inline u32 sim_send_ring_target_f(u32 v)
+{
+        return (v & 0x3U) << 0U;
+}
+static inline u32 sim_send_ring_target_m(void)
+{
+        return 0x3U << 0U;
+}
+static inline u32 sim_send_ring_target_v(u32 r)
+{
+        return (r >> 0U) & 0x3U;
+}
+static inline u32 sim_send_ring_target_phys_init_v(void)
+{
+        return 0x00000001U;
+}
+static inline u32 sim_send_ring_target_phys_init_f(void)
+{
+        return 0x1U;
+}
+static inline u32 sim_send_ring_target_phys__init_v(void)
+{
+        return 0x00000001U;
+}
+static inline u32 sim_send_ring_target_phys__init_f(void)
+{
+        return 0x1U;
+}
+static inline u32 sim_send_ring_target_phys__prod_v(void)
+{
+        return 0x00000001U;
+}
+static inline u32 sim_send_ring_target_phys__prod_f(void)
+{
+        return 0x1U;
+}
+static inline u32 sim_send_ring_target_phys_nvm_v(void)
+{
+        return 0x00000001U;
+}
+static inline u32 sim_send_ring_target_phys_nvm_f(void)
+{
+        return 0x1U;
+}
+static inline u32 sim_send_ring_target_phys_pci_v(void)
+{
+        return 0x00000002U;
+}
+static inline u32 sim_send_ring_target_phys_pci_f(void)
+{
+        return 0x2U;
+}
+static inline u32 sim_send_ring_target_phys_pci_coherent_v(void)
+{
+        return 0x00000003U;
+}
+static inline u32 sim_send_ring_target_phys_pci_coherent_f(void)
+{
+        return 0x3U;
+}
+static inline u32 sim_send_ring_status_s(void)
+{
+        return 1U;
+}
+static inline u32 sim_send_ring_status_f(u32 v)
+{
+        return (v & 0x1U) << 3U;
+}
+static inline u32 sim_send_ring_status_m(void)
+{
+        return 0x1U << 3U;
+}
+static inline u32 sim_send_ring_status_v(u32 r)
+{
+        return (r >> 3U) & 0x1U;
+}
+static inline u32 sim_send_ring_status_init_v(void)
+{
+        return 0x00000000U;
+}
+static inline u32 sim_send_ring_status_init_f(void)
+{
+        return 0x0U;
+}
+static inline u32 sim_send_ring_status__init_v(void)
+{
+        return 0x00000000U;
+}
+static inline u32 sim_send_ring_status__init_f(void)
+{
+        return 0x0U;
+}
+static inline u32 sim_send_ring_status__prod_v(void)
+{
+        return 0x00000000U;
+}
+static inline u32 sim_send_ring_status__prod_f(void)
+{
+        return 0x0U;
+}
+static inline u32 sim_send_ring_status_invalid_v(void)
+{
+        return 0x00000000U;
+}
+static inline u32 sim_send_ring_status_invalid_f(void)
+{
+        return 0x0U;
+}
+static inline u32 sim_send_ring_status_valid_v(void)
+{
+        return 0x00000001U;
+}
+static inline u32 sim_send_ring_status_valid_f(void)
+{
+        return 0x8U;
+}
+static inline u32 sim_send_ring_size_s(void)
+{
+        return 2U;
+}
+static inline u32 sim_send_ring_size_f(u32 v)
+{
+        return (v & 0x3U) << 4U;
+}
+static inline u32 sim_send_ring_size_m(void)
+{
+        return 0x3U << 4U;
+}
+static inline u32 sim_send_ring_size_v(u32 r)
+{
+        return (r >> 4U) & 0x3U;
+}
+static inline u32 sim_send_ring_size_init_v(void)
+{
+        return 0x00000000U;
+}
+static inline u32 sim_send_ring_size_init_f(void)
+{
+        return 0x0U;
+}
+static inline u32 sim_send_ring_size__init_v(void)
+{
+        return 0x00000000U;
+}
+static inline u32 sim_send_ring_size__init_f(void)
+{
+        return 0x0U;
+}
+static inline u32 sim_send_ring_size__prod_v(void)
+{
+        return 0x00000000U;