aboutsummaryrefslogtreecommitdiffstats
path: root/include/nvgpu/dt.h
diff options
context:
space:
mode:
authorJoshua Bakita <jbakita@cs.unc.edu>2023-06-29 17:09:54 -0400
committerJoshua Bakita <jbakita@cs.unc.edu>2023-06-29 17:14:49 -0400
commita3fe3788535dd099d15e0ddca455be58e1d63156 (patch)
tree414b93951935d9e434c78c68326af1f59fa54d5a /include/nvgpu/dt.h
parent7e8fc4f9ae9fb4424aab73622cd9d7b89390dcb3 (diff)
Hacky support for Linux 5.6+ and the Jetson AGX Orin
Works around change in parameters to proc initialization functions via a hacky function which rewrites the layout. This also required making all the struct file_operations writable. Also start reducing dependency on nvgpu headers. Known issues: - Incorrect message printed in log after module is loaded. Unclear if this is because the register detection logic is broken, or if the layout of the data at NV_MC_BOOT_0 has changed. - Not tested
Diffstat (limited to 'include/nvgpu/dt.h')
0 files changed, 0 insertions, 0 deletions
>28
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/2/all_tasks.csv1037
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/2/l3alloc.csv8
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/2/levelAB_pairs.csv504
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/2/levelC_threads.csv38
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/3/all_tasks.csv1067
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/3/l3alloc.csv8
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/3/levelAB_pairs.csv520
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/3/levelC_threads.csv37
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/4/all_tasks.csv1201
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/4/l3alloc.csv8
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/4/levelAB_pairs.csv590
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/4/levelC_threads.csv31
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/5/all_tasks.csv1084
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/5/l3alloc.csv8
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/5/levelAB_pairs.csv530
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/5/levelC_threads.csv34
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/test/all_tasks.csv1186
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/test/l3alloc.csv8
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/test/levelAB_pairs.csv583
-rw-r--r--ABmod-light-7-Tacle-Tacle-DIS/test/levelC_threads.csv28
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/1/all_tasks.csv1039
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/1/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/1/levelAB_pairs.csv484
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/1/levelC_threads.csv82
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/10/all_tasks.csv1045
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/10/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/10/levelAB_pairs.csv483
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/10/levelC_threads.csv91
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/2/all_tasks.csv1059
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/2/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/2/levelAB_pairs.csv484
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/2/levelC_threads.csv101
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/3/all_tasks.csv1074
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/3/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/3/levelAB_pairs.csv500
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/3/levelC_threads.csv84
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/4/all_tasks.csv1047
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/4/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/4/levelAB_pairs.csv466
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/4/levelC_threads.csv124
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/5/all_tasks.csv1088
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/5/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/5/levelAB_pairs.csv502
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/5/levelC_threads.csv95
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/6/all_tasks.csv1104
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/6/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/6/levelAB_pairs.csv512
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/6/levelC_threads.csv89
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/7/all_tasks.csv1057
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/7/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/7/levelAB_pairs.csv478
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/7/levelC_threads.csv112
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/8/all_tasks.csv1007
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/8/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/8/levelAB_pairs.csv469
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/8/levelC_threads.csv80
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/9/all_tasks.csv1103
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/9/l3alloc.csv8
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/9/levelAB_pairs.csv515
-rw-r--r--ABmod_light_TACle-SDVBS_5.5/9/levelC_threads.csv83
-rw-r--r--Makefile51
-rw-r--r--SD-VBS/benchmarks/disparity/data/cif/1.bmpbin304182 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/cif/2.bmpbin304182 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/cif/Makefile7
-rw-r--r--SD-VBS/benchmarks/disparity/data/cif/expected.m288
-rw-r--r--SD-VBS/benchmarks/disparity/data/cif/expected_C.txt288
-rw-r--r--SD-VBS/benchmarks/disparity/data/cif/lmm.txt89
-rw-r--r--SD-VBS/benchmarks/disparity/data/cif/mm.txt89
-rw-r--r--SD-VBS/benchmarks/disparity/data/cif/nomm.txt89
-rw-r--r--SD-VBS/benchmarks/disparity/data/fullhd/1.bmpbin6220854 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/fullhd/2.bmpbin6220854 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/fullhd/Makefile7
-rw-r--r--SD-VBS/benchmarks/disparity/data/fullhd/expected_C.txt1920
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim/1.bmpbin11718 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/sim/2.bmpbin11718 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/sim/Makefile6
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim/expected.m54
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim/expected_C.txt54
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim/time.txt93
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim_fast/1.bmpbin9270 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/sim_fast/2.bmpbin9270 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/sim_fast/Makefile5
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim_fast/c.txt19
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim_fast/expected.m48
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim_fast/expected_C.txt48
-rw-r--r--SD-VBS/benchmarks/disparity/data/sim_fast/m.txt35
-rw-r--r--SD-VBS/benchmarks/disparity/data/sqcif/1.bmpbin36918 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/sqcif/2.bmpbin36918 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/sqcif/Makefile8
-rw-r--r--SD-VBS/benchmarks/disparity/data/sqcif/expected.m96
-rw-r--r--SD-VBS/benchmarks/disparity/data/sqcif/expected_C.txt96
-rw-r--r--SD-VBS/benchmarks/disparity/data/test/1.bmpbin454 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/test/2.bmpbin454 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/test/Makefile6
-rw-r--r--SD-VBS/benchmarks/disparity/data/test/expected.m10
-rw-r--r--SD-VBS/benchmarks/disparity/data/test/expected_C.txt10
-rw-r--r--SD-VBS/benchmarks/disparity/data/vga/1.bmpbin846774 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/vga/2.bmpbin846774 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/disparity/data/vga/Makefile7
-rw-r--r--SD-VBS/benchmarks/disparity/data/vga/expected.m480
-rw-r--r--SD-VBS/benchmarks/disparity/data/vga/expected_C.txt480
-rwxr-xr-xSD-VBS/benchmarks/localization/data/GroundData/log1_pose.txt11598
-rwxr-xr-xSD-VBS/benchmarks/localization/data/GroundData/log1_sensor.txt127357
-rwxr-xr-xSD-VBS/benchmarks/localization/data/GroundData/log1_sensor_sort.txt127357
-rw-r--r--SD-VBS/benchmarks/localization/data/cif/1.txt89
-rw-r--r--SD-VBS/benchmarks/localization/data/cif/Makefile7
-rwxr-xr-xSD-VBS/benchmarks/localization/data/cif/VBS_Ver1bin99419 -> 0 bytes-rwxr-xr-xSD-VBS/benchmarks/localization/data/cif/cifbin99219 -> 0 bytes-rw-r--r--SD-VBS/benchmarks/localization/data/cif/expected.m3
-rw-r--r--SD-VBS/benchmarks/localization/data/cif/expected_C.txt3
-rw-r--r--SD-VBS/benchmarks/localization/data/sim/1.txt89
-rw-r--r--SD-VBS/benchmarks/localization/data/sim/2.txt4077
-rw-r--r--SD-VBS/benchmarks/localization/data/sim/Makefile8
-rw-r--r--SD-VBS/benchmarks/localization/data/sim/expected.m3
-rw-r--r--SD-VBS/benchmarks/localization/data/sim/expected_C.txt3
-rw-r--r--SD-VBS/benchmarks/localization/data/sim_fast/1.txt26
-rw-r--r--SD-VBS/benchmarks/localization/data/sim_fast/2.txt203