diff options
author | Joshua Bakita <bakitajoshua@gmail.com> | 2024-09-25 16:09:09 -0400 |
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committer | Joshua Bakita <bakitajoshua@gmail.com> | 2024-09-25 16:09:09 -0400 |
commit | f347fde22f1297e4f022600d201780d5ead78114 (patch) | |
tree | 76be305d6187003a1e0486ff6e91efb1062ae118 /include/nvgpu/ctxsw_trace.h | |
parent | 8340d234d78a7d0f46c11a584de538148b78b7cb (diff) |
Delete no-longer-needed nvgpu headersHEADmasterjbakita-wip
The dependency on these was removed in commit 8340d234.
Diffstat (limited to 'include/nvgpu/ctxsw_trace.h')
-rw-r--r-- | include/nvgpu/ctxsw_trace.h | 94 |
1 files changed, 0 insertions, 94 deletions
diff --git a/include/nvgpu/ctxsw_trace.h b/include/nvgpu/ctxsw_trace.h deleted file mode 100644 index 033e020..0000000 --- a/include/nvgpu/ctxsw_trace.h +++ /dev/null | |||
@@ -1,94 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2017-2019, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #ifndef NVGPU_CTXSW_TRACE_H | ||
24 | #define NVGPU_CTXSW_TRACE_H | ||
25 | |||
26 | #include <nvgpu/types.h> | ||
27 | |||
28 | struct gk20a; | ||
29 | struct tsg_gk20a; | ||
30 | struct channel_gk20a; | ||
31 | |||
32 | #define NVGPU_GPU_CTXSW_TAG_SOF 0x00 | ||
33 | #define NVGPU_GPU_CTXSW_TAG_CTXSW_REQ_BY_HOST 0x01 | ||
34 | #define NVGPU_GPU_CTXSW_TAG_FE_ACK 0x02 | ||
35 | #define NVGPU_GPU_CTXSW_TAG_FE_ACK_WFI 0x0a | ||
36 | #define NVGPU_GPU_CTXSW_TAG_FE_ACK_GFXP 0x0b | ||
37 | #define NVGPU_GPU_CTXSW_TAG_FE_ACK_CTAP 0x0c | ||
38 | #define NVGPU_GPU_CTXSW_TAG_FE_ACK_CILP 0x0d | ||
39 | #define NVGPU_GPU_CTXSW_TAG_SAVE_END 0x03 | ||
40 | #define NVGPU_GPU_CTXSW_TAG_RESTORE_START 0x04 | ||
41 | #define NVGPU_GPU_CTXSW_TAG_CONTEXT_START 0x05 | ||
42 | #define NVGPU_GPU_CTXSW_TAG_ENGINE_RESET 0xfe | ||
43 | #define NVGPU_GPU_CTXSW_TAG_INVALID_TIMESTAMP 0xff | ||
44 | #define NVGPU_GPU_CTXSW_TAG_LAST \ | ||
45 | NVGPU_GPU_CTXSW_TAG_INVALID_TIMESTAMP | ||
46 | |||
47 | #define NVGPU_GPU_CTXSW_FILTER_ISSET(n, p) \ | ||
48 | ((p)->tag_bits[(n) / 64] & (1 << ((n) & 63))) | ||
49 | |||
50 | #define NVGPU_GPU_CTXSW_FILTER_SIZE (NVGPU_GPU_CTXSW_TAG_LAST + 1) | ||
51 | #define NVGPU_FECS_TRACE_FEATURE_CONTROL_BIT 31 | ||
52 | |||
53 | struct nvgpu_gpu_ctxsw_trace_filter { | ||
54 | u64 tag_bits[(NVGPU_GPU_CTXSW_FILTER_SIZE + 63) / 64]; | ||
55 | }; | ||
56 | |||
57 | /* | ||
58 | * The binary format of 'struct nvgpu_gpu_ctxsw_trace_entry' introduced here | ||
59 | * should match that of 'struct nvgpu_ctxsw_trace_entry' defined in uapi | ||
60 | * header, since this struct is intended to be a mirror copy of the uapi | ||
61 | * struct. | ||
62 | */ | ||
63 | struct nvgpu_gpu_ctxsw_trace_entry { | ||
64 | u8 tag; | ||
65 | u8 vmid; | ||
66 | u16 seqno; /* sequence number to detect drops */ | ||
67 | u32 context_id; /* context_id as allocated by FECS */ | ||
68 | u64 pid; /* 64-bit is max bits of different OS pid */ | ||
69 | u64 timestamp; /* 64-bit time */ | ||
70 | }; | ||
71 | |||
72 | int gk20a_ctxsw_trace_init(struct gk20a *g); | ||
73 | |||
74 | void gk20a_ctxsw_trace_channel_reset(struct gk20a *g, struct channel_gk20a *ch); | ||
75 | void gk20a_ctxsw_trace_tsg_reset(struct gk20a *g, struct tsg_gk20a *tsg); | ||
76 | |||
77 | void gk20a_ctxsw_trace_cleanup(struct gk20a *g); | ||
78 | int gk20a_ctxsw_trace_write(struct gk20a *g, | ||
79 | struct nvgpu_gpu_ctxsw_trace_entry *entry); | ||
80 | void gk20a_ctxsw_trace_wake_up(struct gk20a *g, int vmid); | ||
81 | |||
82 | #ifdef CONFIG_GK20A_CTXSW_TRACE | ||
83 | struct file; | ||
84 | struct vm_area_struct; | ||
85 | |||
86 | int gk20a_ctxsw_dev_mmap(struct file *filp, struct vm_area_struct *vma); | ||
87 | int gk20a_ctxsw_dev_ring_alloc(struct gk20a *g, void **buf, size_t *size); | ||
88 | int gk20a_ctxsw_dev_ring_free(struct gk20a *g); | ||
89 | int gk20a_ctxsw_dev_mmap_buffer(struct gk20a *g, struct vm_area_struct *vma); | ||
90 | #endif | ||
91 | |||
92 | u8 nvgpu_gpu_ctxsw_tags_to_common_tags(u8 tags); | ||
93 | |||
94 | #endif /*NVGPU_CTXSW_TRACE_H */ | ||