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authorJoshua Bakita <bakitajoshua@gmail.com>2023-10-29 13:07:40 -0400
committerJoshua Bakita <bakitajoshua@gmail.com>2023-10-29 13:10:52 -0400
commit2c5337a24f7f2d02989dfb733c55d6d8c7e90493 (patch)
treeb9f1028cb443b03190b710c0d7ee640bf5958631 /include/gk20a/hw_pbdma_gk20a.h
parentaa06f84f03cba7ad1aae5cd527355bb3d8c152a6 (diff)
Update includes to L4T r32.7.4 and drop nvgpu/gk20a.h dependency
Also add instructions for updating `include/`. These files are now only needed to build on Linux 4.9-based Tegra platforms.
Diffstat (limited to 'include/gk20a/hw_pbdma_gk20a.h')
-rw-r--r--include/gk20a/hw_pbdma_gk20a.h575
1 files changed, 0 insertions, 575 deletions
diff --git a/include/gk20a/hw_pbdma_gk20a.h b/include/gk20a/hw_pbdma_gk20a.h
deleted file mode 100644
index 2c8f48d..0000000
--- a/include/gk20a/hw_pbdma_gk20a.h
+++ /dev/null
@@ -1,575 +0,0 @@
1/*
2 * Copyright (c) 2012-2018, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22/*
23 * Function naming determines intended use:
24 *
25 * <x>_r(void) : Returns the offset for register <x>.
26 *
27 * <x>_o(void) : Returns the offset for element <x>.
28 *
29 * <x>_w(void) : Returns the word offset for word (4 byte) element <x>.
30 *
31 * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits.
32 *
33 * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted
34 * and masked to place it at field <y> of register <x>. This value
35 * can be |'d with others to produce a full register value for
36 * register <x>.
37 *
38 * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This
39 * value can be ~'d and then &'d to clear the value of field <y> for
40 * register <x>.
41 *
42 * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted
43 * to place it at field <y> of register <x>. This value can be |'d
44 * with others to produce a full register value for <x>.
45 *
46 * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register
47 * <x> value 'r' after being shifted to place its LSB at bit 0.
48 * This value is suitable for direct comparison with other unshifted
49 * values appropriate for use in field <y> of register <x>.
50 *
51 * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for
52 * field <y> of register <x>. This value is suitable for direct
53 * comparison with unshifted values appropriate for use in field <y>
54 * of register <x>.
55 */
56#ifndef _hw_pbdma_gk20a_h_
57#define _hw_pbdma_gk20a_h_
58
59static inline u32 pbdma_gp_entry1_r(void)
60{
61 return 0x10000004U;
62}
63static inline u32 pbdma_gp_entry1_get_hi_v(u32 r)
64{
65 return (r >> 0U) & 0xffU;
66}
67static inline u32 pbdma_gp_entry1_length_f(u32 v)
68{
69 return (v & 0x1fffffU) << 10U;
70}
71static inline u32 pbdma_gp_entry1_length_v(u32 r)
72{
73 return (r >> 10U) & 0x1fffffU;
74}
75static inline u32 pbdma_gp_base_r(u32 i)
76{
77 return 0x00040048U + i*8192U;
78}
79static inline u32 pbdma_gp_base__size_1_v(void)
80{
81 return 0x00000001U;
82}
83static inline u32 pbdma_gp_base_offset_f(u32 v)
84{
85 return (v & 0x1fffffffU) << 3U;
86}
87static inline u32 pbdma_gp_base_rsvd_s(void)
88{
89 return 3U;
90}
91static inline u32 pbdma_gp_base_hi_r(u32 i)
92{
93 return 0x0004004cU + i*8192U;
94}
95static inline u32 pbdma_gp_base_hi_offset_f(u32 v)
96{
97 return (v & 0xffU) << 0U;
98}
99static inline u32 pbdma_gp_base_hi_limit2_f(u32 v)
100{
101 return (v & 0x1fU) << 16U;
102}
103static inline u32 pbdma_gp_fetch_r(u32 i)
104{
105 return 0x00040050U + i*8192U;
106}
107static inline u32 pbdma_gp_get_r(u32 i)
108{
109 return 0x00040014U + i*8192U;
110}
111static inline u32 pbdma_gp_put_r(u32 i)
112{
113 return 0x00040000U + i*8192U;
114}
115static inline u32 pbdma_timeout_r(u32 i)
116{
117 return 0x0004012cU + i*8192U;
118}
119static inline u32 pbdma_timeout__size_1_v(void)
120{
121 return 0x00000001U;
122}
123static inline u32 pbdma_timeout_period_m(void)
124{
125 return 0xffffffffU << 0U;
126}
127static inline u32 pbdma_timeout_period_max_f(void)
128{
129 return 0xffffffffU;
130}
131static inline u32 pbdma_pb_fetch_r(u32 i)
132{
133 return 0x00040054U + i*8192U;
134}
135static inline u32 pbdma_pb_fetch_hi_r(u32 i)
136{
137 return 0x00040058U + i*8192U;
138}
139static inline u32 pbdma_get_r(u32 i)
140{
141 return 0x00040018U + i*8192U;
142}
143static inline u32 pbdma_get_hi_r(u32 i)
144{
145 return 0x0004001cU + i*8192U;
146}
147static inline u32 pbdma_put_r(u32 i)
148{
149 return 0x0004005cU + i*8192U;
150}
151static inline u32 pbdma_put_hi_r(u32 i)
152{
153 return 0x00040060U + i*8192U;
154}
155static inline u32 pbdma_formats_r(u32 i)
156{
157 return 0x0004009cU + i*8192U;
158}
159static inline u32 pbdma_formats_gp_fermi0_f(void)
160{
161 return 0x0U;
162}
163static inline u32 pbdma_formats_pb_fermi1_f(void)
164{
165 return 0x100U;
166}
167static inline u32 pbdma_formats_mp_fermi0_f(void)
168{
169 return 0x0U;
170}
171static inline u32 pbdma_pb_header_r(u32 i)
172{
173 return 0x00040084U + i*8192U;
174}
175static inline u32 pbdma_pb_header_priv_user_f(void)
176{
177 return 0x0U;
178}
179static inline u32 pbdma_pb_header_method_zero_f(void)
180{
181 return 0x0U;
182}
183static inline u32 pbdma_pb_header_subchannel_zero_f(void)
184{
185 return 0x0U;
186}
187static inline u32 pbdma_pb_header_level_main_f(void)
188{
189 return 0x0U;
190}
191static inline u32 pbdma_pb_header_first_true_f(void)
192{
193 return 0x400000U;
194}
195static inline u32 pbdma_pb_header_type_inc_f(void)
196{
197 return 0x20000000U;
198}
199static inline u32 pbdma_pb_header_type_non_inc_f(void)
200{
201 return 0x60000000U;
202}
203static inline u32 pbdma_hdr_shadow_r(u32 i)
204{
205 return 0x00040118U + i*8192U;
206}
207static inline u32 pbdma_gp_shadow_0_r(u32 i)
208{
209 return 0x00040110U + i*8192U;
210}
211static inline u32 pbdma_gp_shadow_1_r(u32 i)
212{
213 return 0x00040114U + i*8192U;
214}
215static inline u32 pbdma_subdevice_r(u32 i)
216{
217 return 0x00040094U + i*8192U;
218}
219static inline u32 pbdma_subdevice_id_f(u32 v)
220{
221 return (v & 0xfffU) << 0U;
222}
223static inline u32 pbdma_subdevice_status_active_f(void)
224{
225 return 0x10000000U;
226}
227static inline u32 pbdma_subdevice_channel_dma_enable_f(void)
228{
229 return 0x20000000U;
230}
231static inline u32 pbdma_method0_r(u32 i)
232{
233 return 0x000400c0U + i*8192U;
234}
235static inline u32 pbdma_method0_addr_f(u32 v)
236{
237 return (v & 0xfffU) << 2U;
238}
239static inline u32 pbdma_method0_addr_v(u32 r)
240{
241 return (r >> 2U) & 0xfffU;
242}
243static inline u32 pbdma_method0_subch_v(u32 r)
244{
245 return (r >> 16U) & 0x7U;
246}
247static inline u32 pbdma_method0_first_true_f(void)
248{
249 return 0x400000U;
250}
251static inline u32 pbdma_method0_valid_true_f(void)
252{
253 return 0x80000000U;
254}
255static inline u32 pbdma_method1_r(u32 i)
256{
257 return 0x000400c8U + i*8192U;
258}
259static inline u32 pbdma_method2_r(u32 i)
260{
261 return 0x000400d0U + i*8192U;
262}
263static inline u32 pbdma_method3_r(u32 i)
264{
265 return 0x000400d8U + i*8192U;
266}
267static inline u32 pbdma_data0_r(u32 i)
268{
269 return 0x000400c4U + i*8192U;
270}
271static inline u32 pbdma_target_r(u32 i)
272{
273 return 0x000400acU + i*8192U;
274}
275static inline u32 pbdma_target_engine_sw_f(void)
276{
277 return 0x1fU;
278}
279static inline u32 pbdma_acquire_r(u32 i)
280{
281 return 0x00040030U + i*8192U;
282}
283static inline u32 pbdma_acquire_retry_man_2_f(void)
284{
285 return 0x2U;
286}
287static inline u32 pbdma_acquire_retry_exp_2_f(void)
288{
289 return 0x100U;
290}
291static inline u32 pbdma_acquire_timeout_exp_f(u32 v)
292{
293 return (v & 0xfU) << 11U;
294}
295static inline u32 pbdma_acquire_timeout_exp_max_v(void)
296{
297 return 0x0000000fU;
298}
299static inline u32 pbdma_acquire_timeout_exp_max_f(void)
300{
301 return 0x7800U;
302}
303static inline u32 pbdma_acquire_timeout_man_f(u32 v)
304{
305 return (v & 0xffffU) << 15U;
306}
307static inline u32 pbdma_acquire_timeout_man_max_v(void)
308{
309 return 0x0000ffffU;
310}
311static inline u32 pbdma_acquire_timeout_man_max_f(void)
312{
313 return 0x7fff8000U;
314}
315static inline u32 pbdma_acquire_timeout_en_enable_f(void)
316{
317 return 0x80000000U;
318}
319static inline u32 pbdma_acquire_timeout_en_disable_f(void)
320{
321 return 0x0U;
322}
323static inline u32 pbdma_status_r(u32 i)
324{
325 return 0x00040100U + i*8192U;
326}
327static inline u32 pbdma_channel_r(u32 i)
328{
329 return 0x00040120U + i*8192U;
330}
331static inline u32 pbdma_signature_r(u32 i)
332{
333 return 0x00040010U + i*8192U;
334}
335static inline u32 pbdma_signature_hw_valid_f(void)
336{
337 return 0xfaceU;
338}
339static inline u32 pbdma_signature_sw_zero_f(void)
340{
341 return 0x0U;
342}
343static inline u32 pbdma_userd_r(u32 i)
344{
345 return 0x00040008U + i*8192U;
346}
347static inline u32 pbdma_userd_target_vid_mem_f(void)
348{
349 return 0x0U;
350}
351static inline u32 pbdma_userd_target_sys_mem_coh_f(void)
352{
353 return 0x2U;
354}
355static inline u32 pbdma_userd_target_sys_mem_ncoh_f(void)
356{
357 return 0x3U;
358}
359static inline u32 pbdma_userd_addr_f(u32 v)
360{
361 return (v & 0x7fffffU) << 9U;
362}
363static inline u32 pbdma_userd_hi_r(u32 i)
364{
365 return 0x0004000cU + i*8192U;
366}
367static inline u32 pbdma_userd_hi_addr_f(u32 v)
368{
369 return (v & 0xffU) << 0U;
370}
371static inline u32 pbdma_hce_ctrl_r(u32 i)
372{
373 return 0x000400e4U + i*8192U;
374}
375static inline u32 pbdma_hce_ctrl_hce_priv_mode_yes_f(void)
376{
377 return 0x20U;
378}
379static inline u32 pbdma_intr_0_r(u32 i)
380{
381 return 0x00040108U + i*8192U;
382}
383static inline u32 pbdma_intr_0_memreq_v(u32 r)
384{
385 return (r >> 0U) & 0x1U;
386}
387static inline u32 pbdma_intr_0_memreq_pending_f(void)
388{
389 return 0x1U;
390}
391static inline u32 pbdma_intr_0_memack_timeout_pending_f(void)
392{
393 return 0x2U;
394}
395static inline u32 pbdma_intr_0_memack_extra_pending_f(void)
396{
397 return 0x4U;
398}
399static inline u32 pbdma_intr_0_memdat_timeout_pending_f(void)
400{
401 return 0x8U;
402}
403static inline u32 pbdma_intr_0_memdat_extra_pending_f(void)
404{
405 return 0x10U;
406}
407static inline u32 pbdma_intr_0_memflush_pending_f(void)
408{
409 return 0x20U;
410}
411static inline u32 pbdma_intr_0_memop_pending_f(void)
412{
413 return 0x40U;
414}
415static inline u32 pbdma_intr_0_lbconnect_pending_f(void)
416{
417 return 0x80U;
418}
419static inline u32 pbdma_intr_0_lbreq_pending_f(void)
420{
421 return 0x100U;
422}
423static inline u32 pbdma_intr_0_lback_timeout_pending_f(void)
424{
425 return 0x200U;
426}
427static inline u32 pbdma_intr_0_lback_extra_pending_f(void)
428{
429 return 0x400U;
430}
431static inline u32 pbdma_intr_0_lbdat_timeout_pending_f(void)
432{
433 return 0x800U;
434}
435static inline u32 pbdma_intr_0_lbdat_extra_pending_f(void)
436{
437 return 0x1000U;
438}
439static inline u32 pbdma_intr_0_gpfifo_pending_f(void)
440{
441 return 0x2000U;
442}
443static inline u32 pbdma_intr_0_gpptr_pending_f(void)
444{
445 return 0x4000U;
446}
447static inline u32 pbdma_intr_0_gpentry_pending_f(void)
448{
449 return 0x8000U;
450}
451static inline u32 pbdma_intr_0_gpcrc_pending_f(void)
452{
453 return 0x10000U;
454}
455static inline u32 pbdma_intr_0_pbptr_pending_f(void)
456{
457 return 0x20000U;
458}
459static inline u32 pbdma_intr_0_pbentry_pending_f(void)
460{
461 return 0x40000U;
462}
463static inline u32 pbdma_intr_0_pbcrc_pending_f(void)
464{
465 return 0x80000U;
466}
467static inline u32 pbdma_intr_0_xbarconnect_pending_f(void)
468{
469 return 0x100000U;
470}
471static inline u32 pbdma_intr_0_method_pending_f(void)
472{
473 return 0x200000U;
474}
475static inline u32 pbdma_intr_0_methodcrc_pending_f(void)
476{
477 return 0x400000U;
478}
479static inline u32 pbdma_intr_0_device_pending_f(void)
480{
481 return 0x800000U;
482}
483static inline u32 pbdma_intr_0_semaphore_pending_f(void)
484{
485 return 0x2000000U;
486}
487static inline u32 pbdma_intr_0_acquire_pending_f(void)
488{
489 return 0x4000000U;
490}
491static inline u32 pbdma_intr_0_pri_pending_f(void)
492{
493 return 0x8000000U;
494}
495static inline u32 pbdma_intr_0_no_ctxsw_seg_pending_f(void)
496{
497 return 0x20000000U;
498}
499static inline u32 pbdma_intr_0_pbseg_pending_f(void)
500{
501 return 0x40000000U;
502}
503static inline u32 pbdma_intr_0_signature_pending_f(void)
504{
505 return 0x80000000U;
506}
507static inline u32 pbdma_intr_1_r(u32 i)
508{
509 return 0x00040148U + i*8192U;
510}
511static inline u32 pbdma_intr_en_0_r(u32 i)
512{
513 return 0x0004010cU + i*8192U;
514}
515static inline u32 pbdma_intr_en_0_lbreq_enabled_f(void)
516{
517 return 0x100U;
518}
519static inline u32 pbdma_intr_en_1_r(u32 i)
520{
521 return 0x0004014cU + i*8192U;
522}
523static inline u32 pbdma_intr_stall_r(u32 i)
524{
525 return 0x0004013cU + i*8192U;
526}
527static inline u32 pbdma_intr_stall_lbreq_enabled_f(void)
528{
529 return 0x100U;
530}
531static inline u32 pbdma_intr_stall_1_r(u32 i)
532{
533 return 0x00040140U + i*8192U;
534}
535static inline u32 pbdma_intr_stall_1_hce_illegal_op_enabled_f(void)
536{
537 return 0x1U;
538}
539static inline u32 pbdma_udma_nop_r(void)
540{
541 return 0x00000008U;
542}
543static inline u32 pbdma_syncpointa_r(u32 i)
544{
545 return 0x000400a4U + i*8192U;
546}
547static inline u32 pbdma_syncpointa_payload_v(u32 r)
548{
549 return (r >> 0U) & 0xffffffffU;
550}
551static inline u32 pbdma_syncpointb_r(u32 i)
552{
553 return 0x000400a8U + i*8192U;
554}
555static inline u32 pbdma_syncpointb_op_v(u32 r)
556{
557 return (r >> 0U) & 0x3U;
558}
559static inline u32 pbdma_syncpointb_op_wait_v(void)
560{
561 return 0x00000000U;
562}
563static inline u32 pbdma_syncpointb_wait_switch_v(u32 r)
564{
565 return (r >> 4U) & 0x1U;
566}
567static inline u32 pbdma_syncpointb_wait_switch_en_v(void)
568{
569 return 0x00000001U;
570}
571static inline u32 pbdma_syncpointb_syncpt_index_v(u32 r)
572{
573 return (r >> 8U) & 0xffU;
574}
575#endif
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