Delete no-longer-needed nvgpu headers

The dependency on these was removed in commit 8340d234.

1 files changed, 0 insertions, 595 deletions

diff --git a/include/gk20a/gk20a.c b/include/gk20a/gk20a.c
deleted file mode 100644
index 1a11716..0000000
--- a/include/gk20a/gk20a.c
+++ /dev/null
@@ -1,595 +0,0 @@
-/*
- * GK20A Graphics
- *
- * Copyright (c) 2011-2021, NVIDIA CORPORATION.  All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include <nvgpu/nvgpu_common.h>
-#include <nvgpu/kmem.h>
-#include <nvgpu/allocator.h>
-#include <nvgpu/timers.h>
-#include <nvgpu/soc.h>
-#include <nvgpu/enabled.h>
-#include <nvgpu/pmu.h>
-#include <nvgpu/gmmu.h>
-#include <nvgpu/ltc.h>
-#include <nvgpu/vidmem.h>
-#include <nvgpu/mm.h>
-#include <nvgpu/ctxsw_trace.h>
-#include <nvgpu/soc.h>
-#include <nvgpu/clk_arb.h>
-#include <nvgpu/therm.h>
-#include <nvgpu/mc.h>
-#include <nvgpu/channel_sync.h>
-#include <nvgpu/nvgpu_err.h>
-
-#include <trace/events/gk20a.h>
-
-#include "gk20a.h"
-
-#include "dbg_gpu_gk20a.h"
-#include "pstate/pstate.h"
-
-void __nvgpu_check_gpu_state(struct gk20a *g)
-{
-        u32 boot_0 = 0xffffffff;
-
-        boot_0 = nvgpu_mc_boot_0(g, NULL, NULL, NULL);
-        if (boot_0 == 0xffffffff) {
-                nvgpu_err(g, "GPU has disappeared from bus!!");
-                nvgpu_err(g, "Rebooting system!!");
-                nvgpu_kernel_restart(NULL);
-        }
-}
-
-void __gk20a_warn_on_no_regs(void)
-{
-        WARN_ONCE(1, "Attempted access to GPU regs after unmapping!");
-}
-
-static void gk20a_mask_interrupts(struct gk20a *g)
-{
-        if (g->ops.mc.intr_mask != NULL) {
-                g->ops.mc.intr_mask(g);
-        }
-
-        if (g->ops.mc.log_pending_intrs != NULL) {
-                g->ops.mc.log_pending_intrs(g);
-        }
-}
-
-int gk20a_prepare_poweroff(struct gk20a *g)
-{
-        int ret = 0;
-
-        nvgpu_log_fn(g, " ");
-
-        if (g->ops.fifo.channel_suspend) {
-                ret = g->ops.fifo.channel_suspend(g);
-                if (ret) {
-                        return ret;
-                }
-        }
-
-        /* disable elpg before gr or fifo suspend */
-        if (g->ops.pmu.is_pmu_supported(g)) {
-                ret |= nvgpu_pmu_destroy(g);
-        }
-
-        if (nvgpu_is_enabled(g, NVGPU_SUPPORT_SEC2_RTOS)) {
-                ret |= nvgpu_sec2_destroy(g);
-        }
-
-        ret |= gk20a_gr_suspend(g);
-        ret |= nvgpu_mm_suspend(g);
-        ret |= gk20a_fifo_suspend(g);
-
-        gk20a_ce_suspend(g);
-
-        /* Disable GPCPLL */
-        if (g->ops.clk.suspend_clk_support) {
-                ret |= g->ops.clk.suspend_clk_support(g);
-        }
-
-        if (nvgpu_is_enabled(g, NVGPU_PMU_PSTATE)) {
-                gk20a_deinit_pstate_support(g);
-        }
-
-        gk20a_mask_interrupts(g);
-
-        g->power_on = false;
-
-        return ret;
-}
-
-int gk20a_finalize_poweron(struct gk20a *g)
-{
-        int err = 0;
-#if defined(CONFIG_TEGRA_GK20A_NVHOST)
-        u32 nr_pages;
-#endif
-
-        u32 fuse_status;
-
-        nvgpu_log_fn(g, " ");
-
-        if (g->power_on) {
-                return 0;
-        }
-
-        g->power_on = true;
-
-        /*
-         * Before probing the GPU make sure the GPU's state is cleared. This is
-         * relevant for rebind operations.
-         */
-        if (g->ops.xve.reset_gpu && !g->gpu_reset_done) {
-                g->ops.xve.reset_gpu(g);
-                g->gpu_reset_done = true;
-        }
-
-        if (g->ops.clock_gating.slcg_acb_load_gating_prod != NULL) {
-                g->ops.clock_gating.slcg_acb_load_gating_prod(g, true);
-        }
-
-        /*
-         * Do this early so any early VMs that get made are capable of mapping
-         * buffers.
-         */
-        err = nvgpu_pd_cache_init(g);
-        if (err) {
-                return err;
-        }
-
-        /* init interface layer support for PMU falcon */
-        err = nvgpu_flcn_sw_init(g, FALCON_ID_PMU);
-        if (err != 0) {
-                nvgpu_err(g, "failed to sw init FALCON_ID_PMU");
-                goto done;
-        }
-        err = nvgpu_flcn_sw_init(g, FALCON_ID_SEC2);
-        if (err != 0) {
-                nvgpu_err(g, "failed to sw init FALCON_ID_SEC2");
-                goto done;
-        }
-        err = nvgpu_flcn_sw_init(g, FALCON_ID_NVDEC);
-        if (err != 0) {
-                nvgpu_err(g, "failed to sw init FALCON_ID_NVDEC");
-                goto done;
-        }
-        err = nvgpu_flcn_sw_init(g, FALCON_ID_GSPLITE);
-        if (err != 0) {
-                nvgpu_err(g, "failed to sw init FALCON_ID_GSPLITE");
-                goto done;
-        }
-
-        if (g->ops.acr.acr_sw_init != NULL &&
-                nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) {
-                g->ops.acr.acr_sw_init(g, &g->acr);
-        }
-
-        if (g->ops.bios.init) {
-                err = g->ops.bios.init(g);
-        }
-        if (err) {
-                goto done;
-        }
-
-        g->ops.bus.init_hw(g);
-
-        if (g->ops.clk.disable_slowboot) {
-                g->ops.clk.disable_slowboot(g);
-        }
-
-        g->ops.priv_ring.enable_priv_ring(g);
-
-        /* TBD: move this after graphics init in which blcg/slcg is enabled.
-           This function removes SlowdownOnBoot which applies 32x divider
-           on gpcpll bypass path. The purpose of slowdown is to save power
-           during boot but it also significantly slows down gk20a init on
-           simulation and emulation. We should remove SOB after graphics power
-           saving features (blcg/slcg) are enabled. For now, do it here. */
-        if (g->ops.clk.init_clk_support) {
-                err = g->ops.clk.init_clk_support(g);
-                if (err) {
-                        nvgpu_err(g, "failed to init gk20a clk");
-                        goto done;
-                }
-        }
-
-        if (nvgpu_is_enabled(g, NVGPU_SUPPORT_NVLINK)) {
-                err = g->ops.nvlink.init(g);
-                if (err) {
-                        nvgpu_err(g, "failed to init nvlink");
-                        goto done;
-                }
-        }
-