diff options
author | Joshua Bakita <bakitajoshua@gmail.com> | 2023-06-28 18:24:25 -0400 |
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committer | Joshua Bakita <bakitajoshua@gmail.com> | 2023-06-28 18:24:25 -0400 |
commit | 01e6fac4d61fdd7fff5433942ec93fc2ea1e4df1 (patch) | |
tree | 4ef34501728a087be24f4ba0af90f91486bf780b /include/clk/clk_domain.h | |
parent | 306a03d18b305e4e573be3b2931978fa10679eb9 (diff) |
Include nvgpu headers
These are needed to build on NVIDIA's Jetson boards for the time
being. Only a couple structs are required, so it should be fairly
easy to remove this dependency at some point in the future.
Diffstat (limited to 'include/clk/clk_domain.h')
-rw-r--r-- | include/clk/clk_domain.h | 157 |
1 files changed, 157 insertions, 0 deletions
diff --git a/include/clk/clk_domain.h b/include/clk/clk_domain.h new file mode 100644 index 0000000..e5a7153 --- /dev/null +++ b/include/clk/clk_domain.h | |||
@@ -0,0 +1,157 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2016-2018, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
18 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
19 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | ||
20 | * DEALINGS IN THE SOFTWARE. | ||
21 | */ | ||
22 | |||
23 | #ifndef NVGPU_CLK_DOMAIN_H | ||
24 | #define NVGPU_CLK_DOMAIN_H | ||
25 | |||
26 | #include "ctrl/ctrlclk.h" | ||
27 | #include "ctrl/ctrlboardobj.h" | ||
28 | #include <nvgpu/pmuif/nvgpu_gpmu_cmdif.h> | ||
29 | #include "boardobj/boardobjgrp_e32.h" | ||
30 | #include "boardobj/boardobjgrpmask.h" | ||
31 | |||
32 | #define CLK_DOMAIN_BOARDOBJGRP_VERSION 0x30 | ||
33 | #define CLK_TABLE_HAL_ENTRY_GP 0x02 | ||
34 | #define CLK_TABLE_HAL_ENTRY_GV 0x03 | ||
35 | |||
36 | struct clk_domains; | ||
37 | struct clk_domain; | ||
38 | enum nv_pmu_clk_clkwhich; | ||
39 | |||
40 | /*data and function definition to talk to driver*/ | ||
41 | int clk_domain_sw_setup(struct gk20a *g); | ||
42 | int clk_domain_pmu_setup(struct gk20a *g); | ||
43 | |||
44 | typedef int clkproglink(struct gk20a *g, struct clk_pmupstate *pclk, | ||
45 | struct clk_domain *pdomain); | ||
46 | |||
47 | typedef int clkvfsearch(struct gk20a *g, struct clk_pmupstate *pclk, | ||
48 | struct clk_domain *pdomain, u16 *clkmhz, | ||
49 | u32 *voltuv, u8 rail); | ||
50 | |||
51 | typedef int clkgetslaveclk(struct gk20a *g, struct clk_pmupstate *pclk, | ||
52 | struct clk_domain *pdomain, u16 *clkmhz, | ||
53 | u16 masterclkmhz); | ||
54 | |||
55 | typedef u32 clkgetfpoints(struct gk20a *g, struct clk_pmupstate *pclk, | ||
56 | struct clk_domain *pdomain, u32 *pfpointscount, | ||
57 | u16 *pfreqpointsinmhz, u8 rail); | ||
58 | |||
59 | struct clk_domains { | ||
60 | struct boardobjgrp_e32 super; | ||
61 | u8 n_num_entries; | ||
62 | u8 version; | ||
63 | bool b_enforce_vf_monotonicity; | ||
64 | bool b_enforce_vf_smoothening; | ||
65 | bool b_override_o_v_o_c; | ||
66 | bool b_debug_mode; | ||
67 | u32 vbios_domains; | ||
68 | u16 cntr_sampling_periodms; | ||
69 | struct boardobjgrpmask_e32 prog_domains_mask; | ||
70 | struct boardobjgrpmask_e32 master_domains_mask; | ||
71 | struct ctrl_clk_clk_delta deltas; | ||
72 | |||
73 | struct clk_domain *ordered_noise_aware_list[CTRL_BOARDOBJ_MAX_BOARD_OBJECTS]; | ||
74 | |||
75 | struct clk_domain *ordered_noise_unaware_list[CTRL_BOARDOBJ_MAX_BOARD_OBJECTS]; | ||
76 | }; | ||
77 | |||
78 | struct clk_domain { | ||
79 | struct boardobj super; | ||
80 | u32 api_domain; | ||
81 | u32 part_mask; | ||
82 | enum nv_pmu_clk_clkwhich domain; | ||
83 | u8 perf_domain_index; | ||
84 | u8 perf_domain_grp_idx; | ||
85 | u8 ratio_domain; | ||
86 | u8 usage; | ||
87 | clkproglink *clkdomainclkproglink; | ||
88 | clkvfsearch *clkdomainclkvfsearch; | ||
89 | clkgetfpoints *clkdomainclkgetfpoints; | ||
90 | }; | ||
91 | |||
92 | struct clk_domain_3x { | ||
93 | struct clk_domain super; | ||
94 | bool b_noise_aware_capable; | ||
95 | }; | ||
96 | |||
97 | struct clk_domain_3x_fixed { | ||
98 | struct clk_domain_3x super; | ||
99 | u16 freq_mhz; | ||
100 | }; | ||
101 | |||
102 | struct clk_domain_3x_prog { | ||
103 | struct clk_domain_3x super; | ||
104 | u8 clk_prog_idx_first; | ||
105 | u8 clk_prog_idx_last; | ||
106 | bool b_force_noise_unaware_ordering; | ||
107 | struct ctrl_clk_freq_delta factory_delta; | ||
108 | short freq_delta_min_mhz; | ||
109 | short freq_delta_max_mhz; | ||
110 | struct ctrl_clk_clk_delta deltas; | ||
111 | u8 noise_unaware_ordering_index; | ||
112 | u8 noise_aware_ordering_index; | ||
113 | }; | ||
114 | |||
115 | struct clk_domain_35_prog { | ||
116 | struct clk_domain_3x_prog super; | ||
117 | u8 pre_volt_ordering_index; | ||
118 | u8 post_volt_ordering_index; | ||
119 | u8 clk_pos; | ||
120 | u8 clk_vf_curve_count; | ||
121 | }; | ||
122 | |||
123 | struct clk_domain_3x_master { | ||
124 | struct clk_domain_3x_prog super; | ||
125 | u32 slave_idxs_mask; | ||
126 | }; | ||
127 | |||
128 | struct clk_domain_35_master { | ||
129 | struct clk_domain_35_prog super; | ||
130 | struct clk_domain_3x_master master; | ||
131 | struct boardobjgrpmask_e32 master_slave_domains_grp_mask; | ||
132 | }; | ||
133 | |||
134 | struct clk_domain_3x_slave { | ||
135 | struct clk_domain_3x_prog super; | ||
136 | u8 master_idx; | ||
137 | clkgetslaveclk *clkdomainclkgetslaveclk; | ||
138 | }; | ||
139 | |||
140 | struct clk_domain_30_slave { | ||
141 | u8 rsvd; | ||
142 | u8 master_idx; | ||
143 | clkgetslaveclk *clkdomainclkgetslaveclk; | ||
144 | }; | ||
145 | |||
146 | struct clk_domain_35_slave { | ||
147 | struct clk_domain_35_prog super; | ||
148 | struct clk_domain_30_slave slave; | ||
149 | }; | ||
150 | |||
151 | int clk_domain_clk_prog_link(struct gk20a *g, struct clk_pmupstate *pclk); | ||
152 | |||
153 | #define CLK_CLK_DOMAIN_GET(pclk, idx) \ | ||
154 | ((struct clk_domain *)BOARDOBJGRP_OBJ_GET_BY_IDX( \ | ||
155 | &pclk->clk_domainobjs.super.super, (u8)(idx))) | ||
156 | |||
157 | #endif /* NVGPU_CLK_DOMAIN_H */ | ||