nvdebug.git/Makefile, branch master Unnamed repository; edit this file 'description' to name the repository. Remove dependency on Jetson (nvgpu) driver internals 2024-09-25T19:58:37+00:00 Joshua Bakita bakitajoshua@gmail.com 2024-09-25T19:58:37+00:00 8340d234d78a7d0f46c11a584de538148b78b7cb For integrated (Jetson) GPUs: - Directly retrieve and map GPU register region 0 - Directly check GPU power-on state before a register read/write - Resume the GPU as needed for a register read/write Most nvgpu APIs can now be called on TX2+ integrated GPUs without first having to start some task on the GPU to make it non-suspended. Tested on Jetson TX1, TX2, Xavier, and Orin. 
For integrated (Jetson) GPUs:
- Directly retrieve and map GPU register region 0
- Directly check GPU power-on state before a register read/write
- Resume the GPU as needed for a register read/write

Most nvgpu APIs can now be called on TX2+ integrated GPUs without
first having to start some task on the GPU to make it non-suspended.

Tested on Jetson TX1, TX2, Xavier, and Orin.
Linux 5.17+ support and allow including nvdebug.h independently 2024-04-11T17:42:54+00:00 Joshua Bakita jbakita@cs.unc.edu 2024-04-11T17:42:54+00:00 7cfa24cebeaf144b446d07e15fb25e78bb14841e - Move Linux-specific functions to nvdebug_linux.h and .c - Workaround PDE_DATA() being pde_data() on Linux 5.17+ 
- Move Linux-specific functions to nvdebug_linux.h and .c
- Workaround PDE_DATA() being pde_data() on Linux 5.17+
Put PRAMIN-pointer and BAR2-page-table-PRAMIN-pointer logic into bus.c 2024-04-08T18:46:57+00:00 Joshua Bakita jbakita@cs.unc.edu 2024-04-08T18:46:57+00:00 6a89ea5912619af9a9682b9ab39be43f411fb984 Derived from logic in `runlist.c` and `mmu.c`. The new functions are not directly used in this commit. 
Derived from logic in `runlist.c` and `mmu.c`. The new functions
are not directly used in this commit.
Rework LCE<->PCE and GRCE->LCE configuration printing API 2024-04-08T18:02:07+00:00 Joshua Bakita bakitajoshua@gmail.com 2024-04-08T17:33:28+00:00 ac60151ea0a4a1f3882fde3c486af870029b7977 Rather than up to dozens of individual files exposing part of each copy engine's configuration, have one file which exposes a unified view of the full topology. Example new output on RTX 2080 Ti: $ cat /proc/gpu0/copy_topology GRCE0 -> LCE04 GRCE1 -> LCE03 LCE02 -> PCE02 LCE03 -> PCE03 LCE04 -> PCE01 Old output: $ tail -n 1 /proc/gpu0/lce_for_pce* ==> /proc/gpu0/lce_for_pce0 <== 0xf ==> /proc/gpu0/lce_for_pce1 <== 0x4 ==> /proc/gpu0/lce_for_pce2 <== 0x2 ==> /proc/gpu0/lce_for_pce3 <== 0x3 $ tail -n 1 /proc/gpu1/shared_lce_for_grce* ==> /proc/gpu0/shared_lce_for_grce0 <== 0x4 ==> /proc/gpu0/shared_lce_for_grce1 <== 0x3 Specifically: - Add `copy_topology` API - Remove `shared_lce_for_grce#` and `lce_for_pce#` APIs - Move logic from `nvdebug_entry.c` to `copy_topology_procfs.c` - Do not print PCE or Shared LCE configuration if flagged absent - Refer to LCE0 and LCE1 as GRCE0 and GRCE1 - Print by LCE ID, which is move helpful when attempting to trace how a given copy runlist maps to a physical copy engine. - Document two errata with CE registers Tested working on Pascal Integrated, Pascal, Volta Integrated Volta, Turing, and Ampere Integrated on Linux 4.9 through 5.10. 
Rather than up to dozens of individual files exposing part of each
copy engine's configuration, have one file which exposes a unified
view of the full topology. Example new output on RTX 2080 Ti:

$ cat /proc/gpu0/copy_topology
GRCE0 -> LCE04
GRCE1 -> LCE03
LCE02 -> PCE02
LCE03 -> PCE03
LCE04 -> PCE01

Old output:
$ tail -n 1 /proc/gpu0/lce_for_pce*
==> /proc/gpu0/lce_for_pce0 <==
0xf
==> /proc/gpu0/lce_for_pce1 <==
0x4
==> /proc/gpu0/lce_for_pce2 <==
0x2
==> /proc/gpu0/lce_for_pce3 <==
0x3

$ tail -n 1 /proc/gpu1/shared_lce_for_grce*
==> /proc/gpu0/shared_lce_for_grce0 <==
0x4
==> /proc/gpu0/shared_lce_for_grce1 <==
0x3

Specifically:
- Add `copy_topology` API
- Remove `shared_lce_for_grce#` and `lce_for_pce#` APIs
- Move logic from `nvdebug_entry.c` to `copy_topology_procfs.c`
- Do not print PCE or Shared LCE configuration if flagged absent
- Refer to LCE0 and LCE1 as GRCE0 and GRCE1
- Print by LCE ID, which is move helpful when attempting to trace
  how a given copy runlist maps to a physical copy engine.
- Document two errata with CE registers

Tested working on Pascal Integrated, Pascal, Volta Integrated
Volta, Turing, and Ampere Integrated on Linux 4.9 through 5.10.
Quick dump of current state for Ben to review. 2023-06-22T16:52:59+00:00 Joshua Bakita bakitajoshua@gmail.com 2023-06-22T16:52:59+00:00 306a03d18b305e4e573be3b2931978fa10679eb9 






Include git hash as version number and print startup message
2021-09-22T15:25:08+00:00

Joshua Bakita
jbakita@cs.unc.edu

2021-09-22T15:25:08+00:00

a7564070dcdf75de4f848af936e3d76ed01833e1












Use procfs instead of dmesg to print runlist
2021-08-26T22:53:29+00:00

Joshua Bakita
jbakita@cs.unc.edu

2021-08-26T22:53:29+00:00

54e783959b5d3622556bbf34a3a7ad8e481d9e25

`cat /proc/runlist` to print the current runlist.

Also break nvdebug.c into nvdebug_entry.c, runlist.c, and
runlist_procfs.c.





`cat /proc/runlist` to print the current runlist.

Also break nvdebug.c into nvdebug_entry.c, runlist.c, and
runlist_procfs.c.







Add initial implementation
2021-08-26T17:04:27+00:00

Joshua Bakita
jbakita@cs.unc.edu

2021-08-26T17:04:27+00:00

5f661d8a5db3f7875f6bf36b4843a71fd08ecbea

Supports accessing and printing the runlist on the Jetson Xavier to
dmesg. May work on other Jetson boards. Currently requires the nvgpu
headers from NVIDIA's Linux4Tegra (L4T) source tree.





Supports accessing and printing the runlist on the Jetson Xavier to
dmesg. May work on other Jetson boards. Currently requires the nvgpu
headers from NVIDIA's Linux4Tegra (L4T) source tree.