From d17b33131c14864bd1eae275f49a3f148e21cf29 Mon Sep 17 00:00:00 2001
From: Leo Chan <leochanj@live.unc.edu>
Date: Thu, 22 Oct 2020 01:53:21 -0400
Subject: Squashed commit of the sb-vbs branch.

Includes the SD-VBS benchmarks modified to:
- Use libextra to loop as realtime jobs
- Preallocate memory before starting their main computation
- Accept input via stdin instead of via argc

Does not include the SD-VBS matlab code.

Fixes libextra execution in LITMUS^RT.
---
 SD-VBS/preload-times/stitch/T_cif.txt      | 7 +++++++
 SD-VBS/preload-times/stitch/T_fullhd.txt   | 7 +++++++
 SD-VBS/preload-times/stitch/T_qcif.txt     | 7 +++++++
 SD-VBS/preload-times/stitch/T_sim.txt      | 7 +++++++
 SD-VBS/preload-times/stitch/T_sim_fast.txt | 7 +++++++
 SD-VBS/preload-times/stitch/T_sqcif.txt    | 7 +++++++
 SD-VBS/preload-times/stitch/T_test.txt     | 7 +++++++
 SD-VBS/preload-times/stitch/T_vga.txt      | 7 +++++++
 8 files changed, 56 insertions(+)
 create mode 100644 SD-VBS/preload-times/stitch/T_cif.txt
 create mode 100644 SD-VBS/preload-times/stitch/T_fullhd.txt
 create mode 100644 SD-VBS/preload-times/stitch/T_qcif.txt
 create mode 100644 SD-VBS/preload-times/stitch/T_sim.txt
 create mode 100644 SD-VBS/preload-times/stitch/T_sim_fast.txt
 create mode 100644 SD-VBS/preload-times/stitch/T_sqcif.txt
 create mode 100644 SD-VBS/preload-times/stitch/T_test.txt
 create mode 100644 SD-VBS/preload-times/stitch/T_vga.txt

(limited to 'SD-VBS/preload-times/stitch')

diff --git a/SD-VBS/preload-times/stitch/T_cif.txt b/SD-VBS/preload-times/stitch/T_cif.txt
new file mode 100644
index 0000000..a4cb3a6
--- /dev/null
+++ b/SD-VBS/preload-times/stitch/T_cif.txt
@@ -0,0 +1,7 @@
+Input size		- (236x288)
+Cycles elapsed		- 255441025
+
+
+real	0m0.078s
+user	0m0.078s
+sys	0m0.000s
diff --git a/SD-VBS/preload-times/stitch/T_fullhd.txt b/SD-VBS/preload-times/stitch/T_fullhd.txt
new file mode 100644
index 0000000..41ea1e5
--- /dev/null
+++ b/SD-VBS/preload-times/stitch/T_fullhd.txt
@@ -0,0 +1,7 @@
+Input size		- (1920x1080)
+Cycles elapsed		- 164073284645
+
+
+real	0m19.674s
+user	0m19.652s
+sys	0m0.020s
diff --git a/SD-VBS/preload-times/stitch/T_qcif.txt b/SD-VBS/preload-times/stitch/T_qcif.txt
new file mode 100644
index 0000000..efe98a5
--- /dev/null
+++ b/SD-VBS/preload-times/stitch/T_qcif.txt
@@ -0,0 +1,7 @@
+Input size		- (144x176)
+Cycles elapsed		- 65835875
+
+
+real	0m0.021s
+user	0m0.021s
+sys	0m0.000s
diff --git a/SD-VBS/preload-times/stitch/T_sim.txt b/SD-VBS/preload-times/stitch/T_sim.txt
new file mode 100644
index 0000000..fec7488
--- /dev/null
+++ b/SD-VBS/preload-times/stitch/T_sim.txt
@@ -0,0 +1,7 @@
+Input size		- (12x16)
+Cycles elapsed		- 399945
+
+
+real	0m0.001s
+user	0m0.000s
+sys	0m0.001s
diff --git a/SD-VBS/preload-times/stitch/T_sim_fast.txt b/SD-VBS/preload-times/stitch/T_sim_fast.txt
new file mode 100644
index 0000000..bf245ec
--- /dev/null
+++ b/SD-VBS/preload-times/stitch/T_sim_fast.txt
@@ -0,0 +1,7 @@
+Input size		- (9x12)
+Cycles elapsed		- 250775
+
+
+real	0m0.001s
+user	0m0.001s
+sys	0m0.000s
diff --git a/SD-VBS/preload-times/stitch/T_sqcif.txt b/SD-VBS/preload-times/stitch/T_sqcif.txt
new file mode 100644
index 0000000..3367187
--- /dev/null
+++ b/SD-VBS/preload-times/stitch/T_sqcif.txt
@@ -0,0 +1,7 @@
+Input size		- (96x128)
+Cycles elapsed		- 35043015
+
+
+real	0m0.012s
+user	0m0.008s
+sys	0m0.004s
diff --git a/SD-VBS/preload-times/stitch/T_test.txt b/SD-VBS/preload-times/stitch/T_test.txt
new file mode 100644
index 0000000..6b7c3d4
--- /dev/null
+++ b/SD-VBS/preload-times/stitch/T_test.txt
@@ -0,0 +1,7 @@
+Input size		- (6x8)
+Cycles elapsed		- 145110
+
+
+real	0m0.001s
+user	0m0.001s
+sys	0m0.000s
diff --git a/SD-VBS/preload-times/stitch/T_vga.txt b/SD-VBS/preload-times/stitch/T_vga.txt
new file mode 100644
index 0000000..ffd8813
--- /dev/null
+++ b/SD-VBS/preload-times/stitch/T_vga.txt
@@ -0,0 +1,7 @@
+Input size		- (480x586)
+Cycles elapsed		- 1802127145
+
+
+real	0m0.527s
+user	0m0.527s
+sys	0m0.000s
-- 
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