From d17b33131c14864bd1eae275f49a3f148e21cf29 Mon Sep 17 00:00:00 2001 From: Leo Chan Date: Thu, 22 Oct 2020 01:53:21 -0400 Subject: Squashed commit of the sb-vbs branch. Includes the SD-VBS benchmarks modified to: - Use libextra to loop as realtime jobs - Preallocate memory before starting their main computation - Accept input via stdin instead of via argc Does not include the SD-VBS matlab code. Fixes libextra execution in LITMUS^RT. --- SD-VBS/benchmarks/mser/data/sim/1.bmp | Bin 0 -> 17478 bytes SD-VBS/benchmarks/mser/data/sim/Makefile | 6 ++++++ SD-VBS/benchmarks/mser/data/sim/expected.m | 16 ++++++++++++++++ SD-VBS/benchmarks/mser/data/sim/expected_C.txt | 1 + 4 files changed, 23 insertions(+) create mode 100644 SD-VBS/benchmarks/mser/data/sim/1.bmp create mode 100644 SD-VBS/benchmarks/mser/data/sim/Makefile create mode 100644 SD-VBS/benchmarks/mser/data/sim/expected.m create mode 100644 SD-VBS/benchmarks/mser/data/sim/expected_C.txt (limited to 'SD-VBS/benchmarks/mser/data/sim') diff --git a/SD-VBS/benchmarks/mser/data/sim/1.bmp b/SD-VBS/benchmarks/mser/data/sim/1.bmp new file mode 100644 index 0000000..953fe98 Binary files /dev/null and b/SD-VBS/benchmarks/mser/data/sim/1.bmp differ diff --git a/SD-VBS/benchmarks/mser/data/sim/Makefile b/SD-VBS/benchmarks/mser/data/sim/Makefile new file mode 100644 index 0000000..fc94f6e --- /dev/null +++ b/SD-VBS/benchmarks/mser/data/sim/Makefile @@ -0,0 +1,6 @@ +INPUT=sim +include ../../../../common/makefiles/Makefile.include + +BMARK=mser +include $(MAKEFILE_COMMON_DIR)/Makefile.common + diff --git a/SD-VBS/benchmarks/mser/data/sim/expected.m b/SD-VBS/benchmarks/mser/data/sim/expected.m new file mode 100644 index 0000000..c52e720 --- /dev/null +++ b/SD-VBS/benchmarks/mser/data/sim/expected.m @@ -0,0 +1,16 @@ +3611 +5615 +3876 +2441 +5556 +127 +1109 +71 +8 +16 +3567 +817 +3169 +2121 +4036 +3985 diff --git a/SD-VBS/benchmarks/mser/data/sim/expected_C.txt b/SD-VBS/benchmarks/mser/data/sim/expected_C.txt new file mode 100644 index 0000000..a468444 --- /dev/null +++ b/SD-VBS/benchmarks/mser/data/sim/expected_C.txt @@ -0,0 +1 @@ +3612 5616 3877 2442 5557 128 1110 72 9 17 3568 818 3170 2122 4037 3986 -- cgit v1.2.2