| Commit message (Collapse) | Author | Age |
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- Adds plot_cache_sensitivity_at_4mb.py to plot the results
- Fixes run_bench.sh to work in mode `dis`
- Fixes postproc.sh to use updated paths
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- Add a run_all_sd-vbs.sh script
- Fix a typo in run_all_tacle.sh
- Fix an issue with reversed arguments for asynchronous task pairs
in run_bench.sh
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This allows `run_bench.sh` to replace all previous general paired
benchmarking scripts. See `run_everything.sh` for an example of how
to use the new script.
This also fixes two critical bugs present in the old scripts:
1. The cpus_list was incorrectly set for resctrl when running
synchronous pair timing with L2+L3 isolation (i). Each write
to that file replaces the previous contents, and it was previously
written once for each core. This prevented the entire 1st core
from using any L3 cache.
2. The competing task list was indexed improperly in the asynchronous
pair timing script. This caused the competing task to always be
identical to the task being profiled.
These issues combine to imply that in the rejected RTSS'20 paper:
- All Level-C SMT timing data is suspect
- Level-A and -B SMT timing data with L2+L3 isolation (i) is
wildly optimistic
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Now supports specifying an input generation command for
each benchmark - see dis/dis2MbInNames.txt for an example.
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- Use consistent approach to prevent computations from being
optimized out in the DIS benchmarks
- Don't print results in the DIS benchmarks
- Fix a memory corruption in TACLe's "epic" benchmark reflect1()
- Fix return codes for all benchmarks
- Rename run_baseline.sh to run_bench.sh in preperation for this
being the main benchmarking script
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