From 5d4cae5fe2ea1a0974962e2c49dca5c9c4b14cc0 Mon Sep 17 00:00:00 2001 From: Russell King Date: Sun, 10 Jun 2007 12:22:20 +0100 Subject: [ARM] VFP: fix section mismatch error Fix a real section mismatch issue; the test code is thrown away after initialisation, but if we do not detect the VFP hardware, it is left hooked into the exception handler. Any VFP instructions which are subsequently executed risk calling the discarded exception handler. Introduce a new "null" handler which returns to the "unrecognised fault" return address. Signed-off-by: Russell King --- include/asm-arm/linkage.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-arm/linkage.h b/include/asm-arm/linkage.h index dbe4b4e31a..5a25632b1b 100644 --- a/include/asm-arm/linkage.h +++ b/include/asm-arm/linkage.h @@ -4,4 +4,8 @@ #define __ALIGN .align 0 #define __ALIGN_STR ".align 0" +#define ENDPROC(name) \ + .type name, %function; \ + END(name) + #endif -- cgit v1.2.2 From c362aecdb51ecb364d427a9b947fd2dfbd4cb86a Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 6 Jun 2007 09:51:51 +0100 Subject: [ARM] 4442/1: OSIRIS: Fix CPLD register definitions Fix the CPLD register definitions to correctly mirror the documentation Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/osiris-cpld.h | 14 ++++++++------ include/asm-arm/arch-s3c2410/osiris-map.h | 19 +++++++++++-------- 2 files changed, 19 insertions(+), 14 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h index 3b6498468d..a3253e979e 100644 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -14,12 +14,14 @@ #ifndef __ASM_ARCH_OSIRISCPLD_H #define __ASM_ARCH_OSIRISCPLD_H -/* CTRL1 - NAND WP control */ +/* CTRL0 - NAND WP control */ -#define OSIRIS_CTRL1_NANDSEL (0x3) -#define OSIRIS_CTRL1_BOOT_INT (1<<3) -#define OSIRIS_CTRL1_PCMCIA (1<<4) -#define OSIRIS_CTRL1_PCMCIA_nWAIT (1<<6) -#define OSIRIS_CTRL1_PCMCIA_nIOIS16 (1<<7) +#define OSIRIS_CTRL0_NANDSEL (0x3) +#define OSIRIS_CTRL0_BOOT_INT (1<<3) +#define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) +#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) + +#define OSIRIS_ID_REVMASK (0x7) #endif /* __ASM_ARCH_OSIRISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/osiris-map.h b/include/asm-arm/arch-s3c2410/osiris-map.h index a14164dfa5..b5c74d2b9a 100644 --- a/include/asm-arm/arch-s3c2410/osiris-map.h +++ b/include/asm-arm/arch-s3c2410/osiris-map.h @@ -24,16 +24,19 @@ /* we put the CPLD registers next, to get them out of the way */ -#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00000000) -#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD) +#define OSIRIS_VA_CTRL0 OSIRIS_IOADDR(0x00000000) +#define OSIRIS_PA_CTRL0 (OSIRIS_PA_CPLD) -#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00100000) -#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (1<<23)) +#define OSIRIS_VA_CTRL1 OSIRIS_IOADDR(0x00100000) +#define OSIRIS_PA_CTRL1 (OSIRIS_PA_CPLD + (1<<23)) -#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00200000) -#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) +#define OSIRIS_VA_CTRL2 OSIRIS_IOADDR(0x00200000) +#define OSIRIS_PA_CTRL2 (OSIRIS_PA_CPLD + (2<<23)) -#define OSIRIS_VA_CTRL4 OSIRIS_IOADDR(0x00300000) -#define OSIRIS_PA_CTRL4 (OSIRIS_PA_CPLD + (3<<23)) +#define OSIRIS_VA_CTRL3 OSIRIS_IOADDR(0x00300000) +#define OSIRIS_PA_CTRL3 (OSIRIS_PA_CPLD + (2<<23)) + +#define OSIRIS_VA_IDREG OSIRIS_IOADDR(0x00700000) +#define OSIRIS_PA_IDREG (OSIRIS_PA_CPLD + (7<<23)) #endif /* __ASM_ARCH_OSIRISMAP_H */ -- cgit v1.2.2 From 5698bd28c67775c722dc1f4ab82e0041c1c740ea Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 6 Jun 2007 10:36:09 +0100 Subject: [ARM] 4444/2: OSIRIS: CPLD suspend fix Ensure the CPLD 8bit settings are preserved over a suspend/resume cycle as the CPU sends a hard-reset at resume time. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/osiris-cpld.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/osiris-cpld.h b/include/asm-arm/arch-s3c2410/osiris-cpld.h index a3253e979e..229ab2351d 100644 --- a/include/asm-arm/arch-s3c2410/osiris-cpld.h +++ b/include/asm-arm/arch-s3c2410/osiris-cpld.h @@ -1,6 +1,6 @@ /* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h * - * Copyright (c) 2005 Simtec Electronics + * Copyright 2005 Simtec Electronics * http://www.simtec.co.uk/products/ * Ben Dooks * @@ -19,9 +19,12 @@ #define OSIRIS_CTRL0_NANDSEL (0x3) #define OSIRIS_CTRL0_BOOT_INT (1<<3) #define OSIRIS_CTRL0_PCMCIA (1<<4) +#define OSIRIS_CTRL0_FIX8 (1<<5) #define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6) #define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7) +#define OSIRIS_CTRL1_FIX8 (1<<0) + #define OSIRIS_ID_REVMASK (0x7) #endif /* __ASM_ARCH_OSIRISCPLD_H */ -- cgit v1.2.2 From 6c1640d52b9b7355cd777c4f08bc930ac96d905b Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Wed, 6 Jun 2007 10:01:04 +0100 Subject: [ARM] 4445/1: ANUBIS: Fix CPLD registers Update the ANUBIS register definitions inline with the specs and ensure they are registered correctly. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- include/asm-arm/arch-s3c2410/anubis-cpld.h | 4 ++++ include/asm-arm/arch-s3c2410/anubis-map.h | 10 ++-------- 2 files changed, 6 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-s3c2410/anubis-cpld.h b/include/asm-arm/arch-s3c2410/anubis-cpld.h index dcebf6d619..168b93fee5 100644 --- a/include/asm-arm/arch-s3c2410/anubis-cpld.h +++ b/include/asm-arm/arch-s3c2410/anubis-cpld.h @@ -18,4 +18,8 @@ #define ANUBIS_CTRL1_NANDSEL (0x3) +/* IDREG - revision */ + +#define ANUBIS_IDREG_REVMASK (0x7) + #endif /* __ASM_ARCH_ANUBISCPLD_H */ diff --git a/include/asm-arm/arch-s3c2410/anubis-map.h b/include/asm-arm/arch-s3c2410/anubis-map.h index ab076de4a0..830d114261 100644 --- a/include/asm-arm/arch-s3c2410/anubis-map.h +++ b/include/asm-arm/arch-s3c2410/anubis-map.h @@ -27,14 +27,8 @@ #define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000) /* 0x01800000 */ #define ANUBIS_PA_CTRL1 (ANUBIS_PA_CPLD) -#define ANUBIS_VA_CTRL2 ANUBIS_IOADDR(0x00100000) /* 0x01900000 */ -#define ANUBIS_PA_CTRL2 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_CTRL3 ANUBIS_IOADDR(0x00200000) /* 0x01A00000 */ -#define ANUBIS_PA_CTRL3 (ANUBIS_PA_CPLD) - -#define ANUBIS_VA_CTRL4 ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ -#define ANUBIS_PA_CTRL4 (ANUBIS_PA_CPLD) +#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000) /* 0x01B00000 */ +#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3<<23)) #define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000) #define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000) -- cgit v1.2.2