From a53eb5e060c0ec7245c8f93b9dcd94afa6041e06 Mon Sep 17 00:00:00 2001 From: James Smart Date: Fri, 27 Apr 2007 12:41:09 -0400 Subject: [SCSI] FC Transport support for vports based on NPIV This patch provides support for FC virtual ports based on NPIV. For information on the interfaces and design, please read the Documentation/scsi/scsi_fc_transport.txt file enclosed within the patch. The RFC was originally posted here: http://marc.info/?l=linux-scsi&m=117226959918393&w=2 Changes from the initial RFC: - Bug fix: needed a transport_class_unregister() for the vport class - Create a symlink to the vport in the shost device if it is not the parent of the vport. - Made symbolic name writable so it can be set after creation - Made the temporary fc_vport_identifiers struct private to the transport. - Deleted the vport_id field from the vport. I couldn't find any good use for it (and symname is a good replacement). - Made the vport_state and vport_last_state "private" attributes. Added the fc_vport_set_state() helper function to manage state transitions - Updated vport_create() to allow a vport to be created in a disabled state. - Added INITIALIZING and FAILED vport states - Added VPCERR_xxx defines for errors to be returned from vport_create() - Created a Documentation/scsi/scsi_fc_transport.txt file that describes the interfaces and expected LLDD behaviors. Signed-off-by: James Smart Signed-off-by: James Bottomley --- include/scsi/scsi_transport_fc.h | 173 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 166 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h index 1e79730864..81ea7b4bf8 100644 --- a/include/scsi/scsi_transport_fc.h +++ b/include/scsi/scsi_transport_fc.h @@ -19,7 +19,7 @@ * * ======== * - * Copyright (C) 2004-2005 James Smart, Emulex Corporation + * Copyright (C) 2004-2007 James Smart, Emulex Corporation * Rewrite for host, target, device, and remote port attributes, * statistics, and service functions... * @@ -62,8 +62,10 @@ enum fc_port_type { FC_PORTTYPE_NLPORT, /* (Public) Loop w/ FLPort */ FC_PORTTYPE_LPORT, /* (Private) Loop w/o FLPort */ FC_PORTTYPE_PTP, /* Point to Point w/ another NPort */ + FC_PORTTYPE_NPIV, /* VPORT based on NPIV */ }; + /* * fc_port_state: If you alter this, you also need to alter scsi_transport_fc.c * (for the ascii descriptions). @@ -83,6 +85,25 @@ enum fc_port_state { }; +/* + * fc_vport_state: If you alter this, you also need to alter + * scsi_transport_fc.c (for the ascii descriptions). + */ +enum fc_vport_state { + FC_VPORT_UNKNOWN, + FC_VPORT_ACTIVE, + FC_VPORT_DISABLED, + FC_VPORT_LINKDOWN, + FC_VPORT_INITIALIZING, + FC_VPORT_NO_FABRIC_SUPP, + FC_VPORT_NO_FABRIC_RSCS, + FC_VPORT_FABRIC_LOGOUT, + FC_VPORT_FABRIC_REJ_WWN, + FC_VPORT_FAILED, +}; + + + /* * FC Classes of Service * Note: values are not enumerated, as they can be "or'd" together @@ -124,17 +145,114 @@ enum fc_tgtid_binding_type { }; /* - * FC Remote Port Roles + * FC Port Roles * Note: values are not enumerated, as they can be "or'd" together * for reporting (e.g. report roles). If you alter this list, * you also need to alter scsi_transport_fc.c (for the ascii descriptions). */ -#define FC_RPORT_ROLE_UNKNOWN 0x00 -#define FC_RPORT_ROLE_FCP_TARGET 0x01 -#define FC_RPORT_ROLE_FCP_INITIATOR 0x02 -#define FC_RPORT_ROLE_IP_PORT 0x04 +#define FC_PORT_ROLE_UNKNOWN 0x00 +#define FC_PORT_ROLE_FCP_TARGET 0x01 +#define FC_PORT_ROLE_FCP_INITIATOR 0x02 +#define FC_PORT_ROLE_IP_PORT 0x04 + +/* The following are for compatibility */ +#define FC_RPORT_ROLE_UNKNOWN FC_PORT_ROLE_UNKNOWN +#define FC_RPORT_ROLE_FCP_TARGET FC_PORT_ROLE_FCP_TARGET +#define FC_RPORT_ROLE_FCP_INITIATOR FC_PORT_ROLE_FCP_INITIATOR +#define FC_RPORT_ROLE_IP_PORT FC_PORT_ROLE_IP_PORT + + +/* Macro for use in defining Virtual Port attributes */ +#define FC_VPORT_ATTR(_name,_mode,_show,_store) \ +struct class_device_attribute class_device_attr_vport_##_name = \ + __ATTR(_name,_mode,_show,_store) +/* + * FC Virtual Port Attributes + * + * This structure exists for each FC port is a virtual FC port. Virtual + * ports share the physical link with the Physical port. Each virtual + * ports has a unique presense on the SAN, and may be instantiated via + * NPIV, Virtual Fabrics, or via additional ALPAs. As the vport is a + * unique presense, each vport has it's own view of the fabric, + * authentication priviledge, and priorities. + * + * A virtual port may support 1 or more FC4 roles. Typically it is a + * FCP Initiator. It could be a FCP Target, or exist sole for an IP over FC + * roles. FC port attributes for the vport will be reported on any + * fc_host class object allocated for an FCP Initiator. + * + * -- + * + * Fixed attributes are not expected to change. The driver is + * expected to set these values after receiving the fc_vport structure + * via the vport_create() call from the transport. + * The transport fully manages all get functions w/o driver interaction. + * + * Dynamic attributes are expected to change. The driver participates + * in all get/set operations via functions provided by the driver. + * + * Private attributes are transport-managed values. They are fully + * managed by the transport w/o driver interaction. + */ + +#define FC_VPORT_SYMBOLIC_NAMELEN 64 +struct fc_vport { + /* Fixed Attributes */ + + /* Dynamic Attributes */ + + /* Private (Transport-managed) Attributes */ + enum fc_vport_state vport_state; + enum fc_vport_state vport_last_state; + u64 node_name; + u64 port_name; + u32 roles; + u32 vport_id; /* Admin Identifier for the vport */ + enum fc_port_type vport_type; + char symbolic_name[FC_VPORT_SYMBOLIC_NAMELEN]; + + /* exported data */ + void *dd_data; /* Used for driver-specific storage */ + + /* internal data */ + struct Scsi_Host *shost; /* Physical Port Parent */ + unsigned int channel; + u32 number; + u8 flags; + struct list_head peers; + struct device dev; +} __attribute__((aligned(sizeof(unsigned long)))); + +/* bit field values for struct fc_vport "flags" field: */ +#define FC_VPORT_CREATING 0x01 +#define FC_VPORT_DELETING 0x02 +#define FC_VPORT_DELETED 0x04 +#define FC_VPORT_DEL 0x06 /* Any DELETE state */ + +#define dev_to_vport(d) \ + container_of(d, struct fc_vport, dev) +#define transport_class_to_vport(classdev) \ + dev_to_vport(classdev->dev) +#define vport_to_shost(v) \ + (v->shost) +#define vport_to_shost_channel(v) \ + (v->channel) +#define vport_to_parent(v) \ + (v->dev.parent) + + +/* Error return codes for vport_create() callback */ +#define VPCERR_UNSUPPORTED -ENOSYS /* no driver/adapter + support */ +#define VPCERR_BAD_WWN -ENOTUNIQ /* driver validation + of WWNs failed */ +#define VPCERR_NO_FABRIC_SUPP -EOPNOTSUPP /* Fabric connection + is loop or the + Fabric Port does + not support NPIV */ + /* * fc_rport_identifiers: This set of data contains all elements * to uniquely identify a remote FC port. The driver uses this data @@ -149,6 +267,7 @@ struct fc_rport_identifiers { u32 roles; }; + /* Macro for use in defining Remote Port attributes */ #define FC_RPORT_ATTR(_name,_mode,_show,_store) \ struct class_device_attribute class_device_attr_rport_##_name = \ @@ -343,6 +462,7 @@ struct fc_host_attrs { u8 supported_fc4s[FC_FC4_LIST_SIZE]; u32 supported_speeds; u32 maxframe_size; + u16 max_npiv_vports; char serial_number[FC_SERIAL_NUMBER_SIZE]; /* Dynamic Attributes */ @@ -361,8 +481,11 @@ struct fc_host_attrs { /* internal data */ struct list_head rports; struct list_head rport_bindings; + struct list_head vports; u32 next_rport_number; u32 next_target_id; + u32 next_vport_number; + u16 npiv_vports_inuse; /* work queues for rport state manipulation */ char work_q_name[KOBJ_NAME_LEN]; @@ -388,6 +511,8 @@ struct fc_host_attrs { (((struct fc_host_attrs *)(x)->shost_data)->supported_speeds) #define fc_host_maxframe_size(x) \ (((struct fc_host_attrs *)(x)->shost_data)->maxframe_size) +#define fc_host_max_npiv_vports(x) \ + (((struct fc_host_attrs *)(x)->shost_data)->max_npiv_vports) #define fc_host_serial_number(x) \ (((struct fc_host_attrs *)(x)->shost_data)->serial_number) #define fc_host_port_id(x) \ @@ -412,10 +537,16 @@ struct fc_host_attrs { (((struct fc_host_attrs *)(x)->shost_data)->rports) #define fc_host_rport_bindings(x) \ (((struct fc_host_attrs *)(x)->shost_data)->rport_bindings) +#define fc_host_vports(x) \ + (((struct fc_host_attrs *)(x)->shost_data)->vports) #define fc_host_next_rport_number(x) \ (((struct fc_host_attrs *)(x)->shost_data)->next_rport_number) #define fc_host_next_target_id(x) \ (((struct fc_host_attrs *)(x)->shost_data)->next_target_id) +#define fc_host_next_vport_number(x) \ + (((struct fc_host_attrs *)(x)->shost_data)->next_vport_number) +#define fc_host_npiv_vports_inuse(x) \ + (((struct fc_host_attrs *)(x)->shost_data)->npiv_vports_inuse) #define fc_host_work_q_name(x) \ (((struct fc_host_attrs *)(x)->shost_data)->work_q_name) #define fc_host_work_q(x) \ @@ -452,8 +583,14 @@ struct fc_function_template { void (*dev_loss_tmo_callbk)(struct fc_rport *); void (*terminate_rport_io)(struct fc_rport *); + void (*set_vport_symbolic_name)(struct fc_vport *); + int (*vport_create)(struct fc_vport *, bool); + int (*vport_disable)(struct fc_vport *, bool); + int (*vport_delete)(struct fc_vport *); + /* allocation lengths for host-specific data */ u32 dd_fcrport_size; + u32 dd_fcvport_size; /* * The driver sets these to tell the transport class it @@ -512,7 +649,7 @@ fc_remote_port_chkready(struct fc_rport *rport) switch (rport->port_state) { case FC_PORTSTATE_ONLINE: - if (rport->roles & FC_RPORT_ROLE_FCP_TARGET) + if (rport->roles & FC_PORT_ROLE_FCP_TARGET) result = 0; else if (rport->flags & FC_RPORT_DEVLOSS_PENDING) result = DID_IMM_RETRY << 16; @@ -549,6 +686,27 @@ static inline void u64_to_wwn(u64 inm, u8 *wwn) wwn[7] = inm & 0xff; } +/** + * fc_vport_set_state() - called to set a vport's state. Saves the old state, + * excepting the transitory states of initializing and sending the ELS + * traffic to instantiate the vport on the link. + * + * Assumes the driver has surrounded this with the proper locking to ensure + * a coherent state change. + * + * @vport: virtual port whose state is changing + * @new_state: new state + **/ +static inline void +fc_vport_set_state(struct fc_vport *vport, enum fc_vport_state new_state) +{ + if ((new_state != FC_VPORT_UNKNOWN) && + (new_state != FC_VPORT_INITIALIZING)) + vport->vport_last_state = vport->vport_state; + vport->vport_state = new_state; +} + + struct scsi_transport_template *fc_attach_transport( struct fc_function_template *); void fc_release_transport(struct scsi_transport_template *); @@ -567,5 +725,6 @@ void fc_host_post_vendor_event(struct Scsi_Host *shost, u32 event_number, * be sure to read the Vendor Type and ID formatting requirements * specified in scsi_netlink.h */ +int fc_vport_terminate(struct fc_vport *vport); #endif /* SCSI_TRANSPORT_FC_H */ -- cgit v1.2.2 From 1dfcda06a67d6ad6f890dbd1bab84be5f17ef46d Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Wed, 21 Mar 2007 16:05:16 +0900 Subject: [SCSI] kill scsi host template suspend/resume With libata converted to use sdev->manage_start_stop for suspend and resume, sht->suspend/resume() has no user left and low level suspend/ressume should be taken care of by low level driver's suspend/resume callbacks (e.g. PCI or PCMCIA driver callbacks). This patch removes sht->suspend/resume() callbacks. This change is suggested by Christoph Hellwig. Signed-off-by: Tejun Heo Cc: Christoph Hellwig Signed-off-by: James Bottomley --- include/scsi/scsi_host.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include') diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index 68f461b7a8..4a2e490abf 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -338,12 +338,6 @@ struct scsi_host_template { */ enum scsi_eh_timer_return (* eh_timed_out)(struct scsi_cmnd *); - /* - * suspend support - */ - int (*resume)(struct scsi_device *); - int (*suspend)(struct scsi_device *, pm_message_t state); - /* * Name of proc directory */ -- cgit v1.2.2 From 9ef3e4a4527e1f65b8776287c6d4fd1fca5ba98f Mon Sep 17 00:00:00 2001 From: James Smart Date: Thu, 24 May 2007 19:04:44 -0400 Subject: [SCSI] fc_transport: fix sysfs deadlock on vport delete When the vport attribute "delete" is used to delete the vport, sysfs deadlocks waiting for the write to complete, which is waiting for the sysfs teardown to complete. Moved this effort to a work_q element. Took the opportunity to make some other cosmetic changes: - removed tabs in Doc file - replaced with expanded spaces - minor copyright text and author text updates - removed a bunch of trailing whitespace Signed-off-by: James Smart Signed-off-by: James Bottomley --- include/scsi/scsi_transport_fc.h | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/scsi/scsi_transport_fc.h b/include/scsi/scsi_transport_fc.h index 81ea7b4bf8..a0d80bcaa9 100644 --- a/include/scsi/scsi_transport_fc.h +++ b/include/scsi/scsi_transport_fc.h @@ -1,4 +1,4 @@ -/* +/* * FiberChannel transport specific attributes exported to sysfs. * * Copyright (c) 2003 Silicon Graphics, Inc. All rights reserved. @@ -104,7 +104,7 @@ enum fc_vport_state { -/* +/* * FC Classes of Service * Note: values are not enumerated, as they can be "or'd" together * for reporting (e.g. report supported_classes). If you alter this list, @@ -117,7 +117,7 @@ enum fc_vport_state { #define FC_COS_CLASS4 0x10 #define FC_COS_CLASS6 0x40 -/* +/* * FC Port Speeds * Note: values are not enumerated, as they can be "or'd" together * for reporting (e.g. report supported_speeds). If you alter this list, @@ -223,6 +223,7 @@ struct fc_vport { u8 flags; struct list_head peers; struct device dev; + struct work_struct vport_delete_work; } __attribute__((aligned(sizeof(unsigned long)))); /* bit field values for struct fc_vport "flags" field: */ @@ -397,7 +398,7 @@ struct fc_host_statistics { u64 prim_seq_protocol_err_count; u64 invalid_tx_word_count; u64 invalid_crc_count; - + /* fc4 statistics (only FCP supported currently) */ u64 fcp_input_requests; u64 fcp_output_requests; @@ -592,11 +593,11 @@ struct fc_function_template { u32 dd_fcrport_size; u32 dd_fcvport_size; - /* + /* * The driver sets these to tell the transport class it * wants the attributes displayed in sysfs. If the show_ flag * is not set, the attribute will be private to the transport - * class + * class */ /* remote port fixed attributes */ -- cgit v1.2.2 From 824d7b570b4dec49e868c251d670941b02a1e489 Mon Sep 17 00:00:00 2001 From: FUJITA Tomonori Date: Sat, 26 May 2007 14:04:03 +0900 Subject: [SCSI] scsi_lib: add scatter/gather data buffer accessors This adds a set of accessors for the scsi data buffer. This is in preparation for chaining sg lists and bidirectional requests (and possibly, the mid-layer dma mapping). Signed-off-by: FUJITA Tomonori Signed-off-by: James Bottomley --- include/scsi/scsi_cmnd.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'include') diff --git a/include/scsi/scsi_cmnd.h b/include/scsi/scsi_cmnd.h index a2e0c10324..53e170586c 100644 --- a/include/scsi/scsi_cmnd.h +++ b/include/scsi/scsi_cmnd.h @@ -135,4 +135,24 @@ extern void scsi_kunmap_atomic_sg(void *virt); extern struct scatterlist *scsi_alloc_sgtable(struct scsi_cmnd *, gfp_t); extern void scsi_free_sgtable(struct scatterlist *, int); +extern int scsi_dma_map(struct scsi_cmnd *cmd); +extern void scsi_dma_unmap(struct scsi_cmnd *cmd); + +#define scsi_sg_count(cmd) ((cmd)->use_sg) +#define scsi_sglist(cmd) ((struct scatterlist *)(cmd)->request_buffer) +#define scsi_bufflen(cmd) ((cmd)->request_bufflen) + +static inline void scsi_set_resid(struct scsi_cmnd *cmd, int resid) +{ + cmd->resid = resid; +} + +static inline int scsi_get_resid(struct scsi_cmnd *cmd) +{ + return cmd->resid; +} + +#define scsi_for_each_sg(cmd, sg, nseg, __i) \ + for (__i = 0, sg = scsi_sglist(cmd); __i < (nseg); __i++, (sg)++) + #endif /* _SCSI_SCSI_CMND_H */ -- cgit v1.2.2 From bcd92c9fbcc679ee95003083056f0441a1f474fa Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Thu, 31 May 2007 20:12:26 +0200 Subject: [SCSI] introduce shost_priv helper Currently accessing the scsi host private data is rather messy because it comes as an unsigned long that always needs a cast first. This patch introduces a helper that does the cast called shost_priv. It's similar in spirit to netdev_priv for network drivers. This is the first patch introducing the macro, and the second patch in the series will convert esp and it's subdrivers as an example. Further conversion will wait until the helper is in the tree to make patch juggling easier. Signed-off-by: Christoph Hellwig Signed-off-by: James Bottomley --- include/scsi/scsi_host.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/scsi/scsi_host.h b/include/scsi/scsi_host.h index 4a2e490abf..ba07cf7c04 100644 --- a/include/scsi/scsi_host.h +++ b/include/scsi/scsi_host.h @@ -671,6 +671,10 @@ struct Scsi_Host { #define shost_printk(prefix, shost, fmt, a...) \ dev_printk(prefix, &(shost)->shost_gendev, fmt, ##a) +static inline void *shost_priv(struct Scsi_Host *shost) +{ + return (void *)shost->hostdata; +} int scsi_is_host_device(const struct device *); -- cgit v1.2.2 From 1819dc8143eff2a5850af274bcf8bcbc3e73ec76 Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:08 -0500 Subject: [SCSI] iscsi_transport: export hw address Add hw address sysfs file. Signed-off-by: Mike Christie Signed-off-by: James Bottomley --- include/scsi/iscsi_if.h | 8 ++++++++ include/scsi/scsi_transport_iscsi.h | 5 ++++- 2 files changed, 12 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h index 55ebf035e6..fba2117437 100644 --- a/include/scsi/iscsi_if.h +++ b/include/scsi/iscsi_if.h @@ -250,6 +250,14 @@ enum iscsi_param { #define ISCSI_CONN_PORT (1 << ISCSI_PARAM_CONN_PORT) #define ISCSI_CONN_ADDRESS (1 << ISCSI_PARAM_CONN_ADDRESS) +/* iSCSI HBA params */ +enum iscsi_host_param { + ISCSI_HOST_PARAM_HWADDRESS, + ISCSI_HOST_PARAM_MAX, +}; + +#define ISCSI_HOST_HWADDRESS (1 << ISCSI_HOST_PARAM_HWADDRESS) + #define iscsi_ptr(_handle) ((void*)(unsigned long)_handle) #define iscsi_handle(_ptr) ((uint64_t)(unsigned long)_ptr) #define hostdata_session(_hostdata) (iscsi_ptr(*(unsigned long *)_hostdata)) diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h index d5c218ddc5..e962c5357e 100644 --- a/include/scsi/scsi_transport_iscsi.h +++ b/include/scsi/scsi_transport_iscsi.h @@ -79,7 +79,8 @@ struct iscsi_transport { char *name; unsigned int caps; /* LLD sets this to indicate what values it can export to sysfs */ - unsigned int param_mask; + uint64_t param_mask; + uint64_t host_param_mask; struct scsi_host_template *host_template; /* LLD connection data size */ int conndata_size; @@ -105,6 +106,8 @@ struct iscsi_transport { enum iscsi_param param, char *buf); int (*get_session_param) (struct iscsi_cls_session *session, enum iscsi_param param, char *buf); + int (*get_host_param) (struct Scsi_Host *shost, + enum iscsi_host_param param, char *buf); int (*send_pdu) (struct iscsi_cls_conn *conn, struct iscsi_hdr *hdr, char *data, uint32_t data_size); void (*get_stats) (struct iscsi_cls_conn *conn, -- cgit v1.2.2 From 2174a04ee7d8304a270de183fbc58b36dd05b395 Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:10 -0500 Subject: [SCSI] iscsi_transport, qla4xxx: have class lookup host for drivers We are going to be adding more host level sysfs attrs and set_params, so this patch has them take a scsi_host instead of either a scsi_host or host no. Signed-off-by: Mike Christie Cc: David C Somayajulu Signed-off-by: James Bottomley --- include/scsi/scsi_transport_iscsi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h index e962c5357e..902e69f027 100644 --- a/include/scsi/scsi_transport_iscsi.h +++ b/include/scsi/scsi_transport_iscsi.h @@ -127,7 +127,7 @@ struct iscsi_transport { uint64_t *ep_handle); int (*ep_poll) (uint64_t ep_handle, int timeout_ms); void (*ep_disconnect) (uint64_t ep_handle); - int (*tgt_dscvr) (enum iscsi_tgt_dscvr type, uint32_t host_no, + int (*tgt_dscvr) (struct Scsi_Host *shost, enum iscsi_tgt_dscvr type, uint32_t enable, struct sockaddr *dst_addr); }; -- cgit v1.2.2 From 1d9bf13a9cf91f8faf221e98a64dd1157bcf5fa9 Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:11 -0500 Subject: [SCSI] iscsi class: add iscsi host set param event The iscsi class uses the set_param event to set session and connection params. This patch adds a set_host_param so we can set host level values. Signed-off-by: Mike Christie Signed-off-by: James Bottomley --- include/scsi/iscsi_if.h | 6 ++++++ include/scsi/scsi_transport_iscsi.h | 3 +++ 2 files changed, 9 insertions(+) (limited to 'include') diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h index fba2117437..3d0372e30c 100644 --- a/include/scsi/iscsi_if.h +++ b/include/scsi/iscsi_if.h @@ -48,6 +48,7 @@ enum iscsi_uevent_e { ISCSI_UEVENT_TRANSPORT_EP_DISCONNECT = UEVENT_BASE + 14, ISCSI_UEVENT_TGT_DSCVR = UEVENT_BASE + 15, + ISCSI_UEVENT_SET_HOST_PARAM = UEVENT_BASE + 16, /* up events */ ISCSI_KEVENT_RECV_PDU = KEVENT_BASE + 1, @@ -136,6 +137,11 @@ struct iscsi_uevent { */ uint32_t enable; } tgt_dscvr; + struct msg_set_host_param { + uint32_t host_no; + uint32_t param; /* enum iscsi_host_param */ + uint32_t len; + } set_host_param; } u; union { /* messages k -> u */ diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h index 902e69f027..1ac450b069 100644 --- a/include/scsi/scsi_transport_iscsi.h +++ b/include/scsi/scsi_transport_iscsi.h @@ -108,6 +108,9 @@ struct iscsi_transport { enum iscsi_param param, char *buf); int (*get_host_param) (struct Scsi_Host *shost, enum iscsi_host_param param, char *buf); + int (*set_host_param) (struct Scsi_Host *shost, + enum iscsi_host_param param, char *buf, + int buflen); int (*send_pdu) (struct iscsi_cls_conn *conn, struct iscsi_hdr *hdr, char *data, uint32_t data_size); void (*get_stats) (struct iscsi_cls_conn *conn, -- cgit v1.2.2 From 0801c242a33426fddc005c2f559a3d2fa6fca7eb Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:12 -0500 Subject: [SCSI] libiscsi, iscsi_tcp, ib_iser : add sw iscsi host get/set params helpers iscsid and udev need to key off the hw address being used so add some helpers for iser and iscsi tcp. Also convert them Signed-off-by: Mike Christie Cc: Roland Dreier Signed-off-by: James Bottomley --- include/scsi/libiscsi.h | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index ea0816d490..e202cc00c8 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -224,7 +224,8 @@ struct iscsi_session { int erl; int tpgt; char *targetname; - + /* hw address being used for iscsi connection */ + char *hwaddress; /* control data */ struct iscsi_transport *tt; struct Scsi_Host *host; @@ -255,6 +256,16 @@ extern int iscsi_eh_host_reset(struct scsi_cmnd *sc); extern int iscsi_queuecommand(struct scsi_cmnd *sc, void (*done)(struct scsi_cmnd *)); + +/* + * iSCSI host helpers. + */ +extern int iscsi_host_set_param(struct Scsi_Host *shost, + enum iscsi_host_param param, char *buf, + int buflen); +extern int iscsi_host_get_param(struct Scsi_Host *shost, + enum iscsi_host_param param, char *buf); + /* * session management */ -- cgit v1.2.2 From 8ad5781ae9702a8f95cfdf30967752e4297613ee Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:13 -0500 Subject: [SCSI] iscsi class, qla4xxx, iscsi_tcp, ib_iser: export/set initiator name For iscsi root boot, software iscsi needs to know what the BIOS/OF initiator used for the initiator name so this puts it in sysfs for userspace to be able to pick up. For hw iscsi, it is nice to see what the card is using. This patch adds the new param, and hooks in qla4xxx, iscsi_tcp, and ib_iser. Signed-off-by: Mike Christie Cc: Roland Dreier Cc: David C Somayajulu Signed-off-by: James Bottomley --- include/scsi/iscsi_if.h | 2 ++ include/scsi/libiscsi.h | 1 + 2 files changed, 3 insertions(+) (limited to 'include') diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h index 3d0372e30c..e057c5d370 100644 --- a/include/scsi/iscsi_if.h +++ b/include/scsi/iscsi_if.h @@ -259,10 +259,12 @@ enum iscsi_param { /* iSCSI HBA params */ enum iscsi_host_param { ISCSI_HOST_PARAM_HWADDRESS, + ISCSI_HOST_PARAM_INITIATOR_NAME, ISCSI_HOST_PARAM_MAX, }; #define ISCSI_HOST_HWADDRESS (1 << ISCSI_HOST_PARAM_HWADDRESS) +#define ISCSI_HOST_INITIATOR_NAME (1 << ISCSI_HOST_PARAM_INITIATOR_NAME) #define iscsi_ptr(_handle) ((void*)(unsigned long)_handle) #define iscsi_handle(_ptr) ((uint64_t)(unsigned long)_ptr) diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index e202cc00c8..deae90a56a 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -224,6 +224,7 @@ struct iscsi_session { int erl; int tpgt; char *targetname; + char *initiatorname; /* hw address being used for iscsi connection */ char *hwaddress; /* control data */ -- cgit v1.2.2 From d473cc7f15f64ab8a90c3d7288ef30f46785d8d5 Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:14 -0500 Subject: [SCSI] iscsi: Some fixes in preparation for bidirectional support - exp_datasn This patch fixes handling of expected datasn/r2tsn as received from target. It is done according to: T10 rfc3720 section 3.2.2.3. Data Sequencing. . unify expected datasn/r2tsn into one counter . calculate than check expected datasn/r2tsn. On error print a message and fail the request. (TODO use iscsi retransmits) . remove the FIXME ;) . avoid zero length memset Signed-off-by: Boaz Harrosh Signed-off-by: Benny Halevy Signed-off-by: Mike Christie Signed-off-by: James Bottomley --- include/scsi/libiscsi.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index deae90a56a..61e069206a 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -99,7 +99,6 @@ struct iscsi_cmd_task { */ struct iscsi_cmd *hdr; int itt; /* this ITT */ - int datasn; /* DataSN */ uint32_t unsol_datasn; int imm_count; /* imm-data (bytes) */ -- cgit v1.2.2 From 857ae0bdb72999936a28ce621e38e2e288c485da Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:15 -0500 Subject: [SCSI] iscsi: Some fixes in preparation for bidirectional support - total_length - Remove shadow of request length from struct iscsi_cmd_task. - change all users to use scsi_cmnd->request_bufflen directly (With bidi we will use scsi-ml API to retrieve in/out length) Signed-off-by: Boaz Harrosh Signed-off-by: Benny Halevy Signed-off-by: Mike Christie Cc: Roland Dreier Signed-off-by: James Bottomley --- include/scsi/libiscsi.h | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index 61e069206a..348265d4a2 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -80,7 +80,7 @@ struct iscsi_mgmt_task { */ struct iscsi_hdr *hdr; char *data; /* mgmt payload */ - int data_count; /* counts data to be sent */ + unsigned data_count; /* counts data to be sent */ uint32_t itt; /* this ITT */ void *dd_data; /* driver/transport data */ struct list_head running; @@ -101,13 +101,12 @@ struct iscsi_cmd_task { int itt; /* this ITT */ uint32_t unsol_datasn; - int imm_count; /* imm-data (bytes) */ - int unsol_count; /* unsolicited (bytes)*/ + unsigned imm_count; /* imm-data (bytes) */ + unsigned unsol_count; /* unsolicited (bytes)*/ /* offset in unsolicited stream (bytes); */ - int unsol_offset; - int data_count; /* remaining Data-Out */ + unsigned unsol_offset; + unsigned data_count; /* remaining Data-Out */ struct scsi_cmnd *sc; /* associated SCSI cmd*/ - int total_length; struct iscsi_conn *conn; /* used connection */ struct iscsi_mgmt_task *mtask; /* tmf mtask in progr */ @@ -173,8 +172,8 @@ struct iscsi_conn { int tmabort_state; /* see TMABORT_INITIAL, etc.*/ /* negotiated params */ - int max_recv_dlength; /* initiator_max_recv_dsl*/ - int max_xmit_dlength; /* target_max_recv_dsl */ + unsigned max_recv_dlength; /* initiator_max_recv_dsl*/ + unsigned max_xmit_dlength; /* target_max_recv_dsl */ int hdrdgst_en; int datadgst_en; int ifmarker_en; @@ -212,10 +211,10 @@ struct iscsi_session { /* configuration */ int initial_r2t_en; - int max_r2t; + unsigned max_r2t; int imm_data_en; - int first_burst; - int max_burst; + unsigned first_burst; + unsigned max_burst; int time2wait; int time2retain; int pdu_inorder_en; -- cgit v1.2.2 From b2c6416736b847b91950bd43cc5153e11a1f83ee Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:16 -0500 Subject: [SCSI] iscsi class, iscsi_tcp, ib_iser: add sysfs chap file The attached patches add sysfs files for the chap settings to the iscsi transport class, iscsi_tcp and ib_iser. This is needed for software iscsi because there are times when iscsid can die and it will need to reread the values it was using. And it is needed by qla4xxx for basic management opertaions. This patch does not hook in qla4xxx yet, because I am not sure the mbx command to use. Signed-off-by: Mike Christie Cc: Roland Dreier Signed-off-by: James Bottomley --- include/scsi/iscsi_if.h | 9 +++++++++ include/scsi/libiscsi.h | 4 ++++ 2 files changed, 13 insertions(+) (limited to 'include') diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h index e057c5d370..1a18196d77 100644 --- a/include/scsi/iscsi_if.h +++ b/include/scsi/iscsi_if.h @@ -229,6 +229,11 @@ enum iscsi_param { ISCSI_PARAM_CONN_PORT, ISCSI_PARAM_CONN_ADDRESS, + ISCSI_PARAM_USERNAME, + ISCSI_PARAM_USERNAME_IN, + ISCSI_PARAM_PASSWORD, + ISCSI_PARAM_PASSWORD_IN, + /* must always be last */ ISCSI_PARAM_MAX, }; @@ -255,6 +260,10 @@ enum iscsi_param { #define ISCSI_SESS_RECOVERY_TMO (1 << ISCSI_PARAM_SESS_RECOVERY_TMO) #define ISCSI_CONN_PORT (1 << ISCSI_PARAM_CONN_PORT) #define ISCSI_CONN_ADDRESS (1 << ISCSI_PARAM_CONN_ADDRESS) +#define ISCSI_USERNAME (1 << ISCSI_PARAM_USERNAME) +#define ISCSI_USERNAME_IN (1 << ISCSI_PARAM_USERNAME_IN) +#define ISCSI_PASSWORD (1 << ISCSI_PARAM_PASSWORD) +#define ISCSI_PASSWORD_IN (1 << ISCSI_PARAM_PASSWORD_IN) /* iSCSI HBA params */ enum iscsi_host_param { diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index 348265d4a2..61bc8f75b2 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -221,6 +221,10 @@ struct iscsi_session { int dataseq_inorder_en; int erl; int tpgt; + char *username; + char *username_in; + char *password; + char *password_in; char *targetname; char *initiatorname; /* hw address being used for iscsi connection */ -- cgit v1.2.2 From 01854e697a77a434104b2f7e6d7fd463a978af32 Mon Sep 17 00:00:00 2001 From: Luming Yu Date: Sat, 26 May 2007 22:49:58 +0800 Subject: ACPI: add ACPI 3.0 _TPC _TSS _PTC throttling support adds _TPC _TSS _PTC -- Throttling Present Capabilities Signed-off-by: Luming Yu Signed-off-by: Len Brown --- include/acpi/processor.h | 46 +++++++++++++++++++++++++++++++++++++++++++--- 1 file changed, 43 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/acpi/processor.h b/include/acpi/processor.h index b4b0ffdab0..01d2f24c22 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h @@ -21,6 +21,8 @@ #define ACPI_PSD_REV0_REVISION 0 /* Support for _PSD as in ACPI 3.0 */ #define ACPI_PSD_REV0_ENTRIES 5 +#define ACPI_TSD_REV0_REVISION 0 /* Support for _PSD as in ACPI 3.0 */ +#define ACPI_TSD_REV0_ENTRIES 5 /* * Types of coordination defined in ACPI 3.0. Same macros can be used across * P, C and T states @@ -125,17 +127,52 @@ struct acpi_processor_performance { /* Throttling Control */ +struct acpi_tsd_package { + acpi_integer num_entries; + acpi_integer revision; + acpi_integer domain; + acpi_integer coord_type; + acpi_integer num_processors; +} __attribute__ ((packed)); + +struct acpi_ptc_register { + u8 descriptor; + u16 length; + u8 space_id; + u8 bit_width; + u8 bit_offset; + u8 reserved; + u64 address; +} __attribute__ ((packed)); + +struct acpi_processor_tx_tss { + acpi_integer freqpercentage; /* */ + acpi_integer power; /* milliWatts */ + acpi_integer transition_latency; /* microseconds */ + acpi_integer control; /* control value */ + acpi_integer status; /* success indicator */ +}; struct acpi_processor_tx { u16 power; u16 performance; }; +struct acpi_processor; struct acpi_processor_throttling { - int state; + unsigned int state; + unsigned int platform_limit; + struct acpi_pct_register control_register; + struct acpi_pct_register status_register; + unsigned int state_count; + struct acpi_processor_tx_tss *states_tss; + struct acpi_tsd_package domain_info; + cpumask_t shared_cpu_map; + int (*acpi_processor_get_throttling) (struct acpi_processor *pr); + int (*acpi_processor_set_throttling) (struct acpi_processor *pr, int state); + u32 address; u8 duty_offset; u8 duty_width; - int state_count; struct acpi_processor_tx states[ACPI_PROCESSOR_MAX_THROTTLING]; }; @@ -169,6 +206,9 @@ struct acpi_processor { u32 id; u32 pblk; int performance_platform_limit; + int throttling_platform_limit; + /*0 - states 0..n-th satte available*/ + struct acpi_processor_flags flags; struct acpi_processor_power power; struct acpi_processor_performance *performance; @@ -270,7 +310,7 @@ static inline int acpi_processor_ppc_has_changed(struct acpi_processor *pr) /* in processor_throttling.c */ int acpi_processor_get_throttling_info(struct acpi_processor *pr); -int acpi_processor_set_throttling(struct acpi_processor *pr, int state); +extern int acpi_processor_set_throttling(struct acpi_processor *pr, int state); extern struct file_operations acpi_processor_throttling_fops; /* in processor_idle.c */ -- cgit v1.2.2 From ff55a9cebab02403f942121e2f898bb06ecfffbb Mon Sep 17 00:00:00 2001 From: Len Brown Date: Sat, 2 Jun 2007 00:15:25 -0400 Subject: ACPI: Lindent processor throttling code Signed-off-by: Len Brown --- include/acpi/processor.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/acpi/processor.h b/include/acpi/processor.h index 01d2f24c22..f9f987f8e6 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h @@ -167,8 +167,9 @@ struct acpi_processor_throttling { struct acpi_processor_tx_tss *states_tss; struct acpi_tsd_package domain_info; cpumask_t shared_cpu_map; - int (*acpi_processor_get_throttling) (struct acpi_processor *pr); - int (*acpi_processor_set_throttling) (struct acpi_processor *pr, int state); + int (*acpi_processor_get_throttling) (struct acpi_processor * pr); + int (*acpi_processor_set_throttling) (struct acpi_processor * pr, + int state); u32 address; u8 duty_offset; @@ -207,7 +208,7 @@ struct acpi_processor { u32 pblk; int performance_platform_limit; int throttling_platform_limit; - /*0 - states 0..n-th satte available*/ + /* 0 - states 0..n-th state available */ struct acpi_processor_flags flags; struct acpi_processor_power power; -- cgit v1.2.2 From 77a23c21aaa723f6b0ffc4a701be8c8e5a32346d Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:18 -0500 Subject: [SCSI] libiscsi: fix iscsi cmdsn allocation The cmdsn allocation and pdu transmit code can race, and we can end up sending a pdu with cmdsn 10 before a pdu with 5. The target will then fail the connection/session. This patch fixes the problem by delaying the cmdsn allocation until we are about to send the pdu. This also removes the xmitmutex. We were using the connection xmitmutex during error handling to handle races with mtask and ctask cleanup and completion. For ctasks we now have nice refcounting and for the mtask, if we hit the case where the mtask timesout and it is floating around somewhere in the driver, we end up dropping the session. And to handle session level cleanup, we use the xmit suspend bit along with scsi_flush_queue and the session lock to make sure that the xmit thread is not possibly transmitting a task while we are trying to kill it. Signed-off-by: Mike Christie Cc: Roland Dreier Signed-off-by: James Bottomley --- include/scsi/libiscsi.h | 11 ++--------- include/scsi/scsi_transport_iscsi.h | 3 +-- 2 files changed, 3 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index 61bc8f75b2..8d48cf8f2e 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -90,6 +90,7 @@ enum { ISCSI_TASK_COMPLETED, ISCSI_TASK_PENDING, ISCSI_TASK_RUNNING, + ISCSI_TASK_ABORTING, }; struct iscsi_cmd_task { @@ -150,18 +151,11 @@ struct iscsi_conn { struct iscsi_cmd_task *ctask; /* xmit ctask in progress */ /* xmit */ - struct kfifo *immqueue; /* immediate xmit queue */ struct kfifo *mgmtqueue; /* mgmt (control) xmit queue */ struct list_head mgmt_run_list; /* list of control tasks */ struct list_head xmitqueue; /* data-path cmd queue */ struct list_head run_list; /* list of cmds in progress */ struct work_struct xmitwork; /* per-conn. xmit workqueue */ - /* - * serializes connection xmit, access to kfifos: - * xmitqueue, immqueue, mgmtqueue - */ - struct mutex xmitmutex; - unsigned long suspend_tx; /* suspend Tx */ unsigned long suspend_rx; /* suspend Rx */ @@ -303,8 +297,7 @@ extern int iscsi_conn_get_param(struct iscsi_cls_conn *cls_conn, /* * pdu and task processing */ -extern int iscsi_check_assign_cmdsn(struct iscsi_session *, - struct iscsi_nopin *); +extern void iscsi_update_cmdsn(struct iscsi_session *, struct iscsi_nopin *); extern void iscsi_prep_unsolicit_data_pdu(struct iscsi_cmd_task *, struct iscsi_data *hdr); extern int iscsi_conn_send_pdu(struct iscsi_cls_conn *, struct iscsi_hdr *, diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h index 1ac450b069..abc4068621 100644 --- a/include/scsi/scsi_transport_iscsi.h +++ b/include/scsi/scsi_transport_iscsi.h @@ -117,8 +117,7 @@ struct iscsi_transport { struct iscsi_stats *stats); void (*init_cmd_task) (struct iscsi_cmd_task *ctask); void (*init_mgmt_task) (struct iscsi_conn *conn, - struct iscsi_mgmt_task *mtask, - char *data, uint32_t data_size); + struct iscsi_mgmt_task *mtask); int (*xmit_cmd_task) (struct iscsi_conn *conn, struct iscsi_cmd_task *ctask); void (*cleanup_cmd_task) (struct iscsi_conn *conn, -- cgit v1.2.2 From 1548271ece9e9312fd5feb41fd58773b56a71d39 Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:19 -0500 Subject: [SCSI] libiscsi: make can_queue configurable This patch allows us to set can_queue and cmds_per_lun from userspace when we create the session/host. From there we can set it on a per target basis. The patch fully converts iscsi_tcp, but only hooks up ib_iser for cmd_per_lun since it currently has a lots of preallocations based on can_queue. Signed-off-by: Mike Christie Cc: Roland Dreier Signed-off-by: James Bottomley --- include/scsi/iscsi_if.h | 2 ++ include/scsi/libiscsi.h | 7 +++---- include/scsi/scsi_transport_iscsi.h | 3 ++- 3 files changed, 7 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h index 1a18196d77..a046a32918 100644 --- a/include/scsi/iscsi_if.h +++ b/include/scsi/iscsi_if.h @@ -72,6 +72,8 @@ struct iscsi_uevent { /* messages u -> k */ struct msg_create_session { uint32_t initial_cmdsn; + uint16_t cmds_max; + uint16_t queue_depth; } c_session; struct msg_destroy_session { uint32_t sid; diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index 8d48cf8f2e..2f303a3b27 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -48,9 +48,8 @@ struct iscsi_nopin; #define debug_scsi(fmt...) #endif -#define ISCSI_XMIT_CMDS_MAX 128 /* must be power of 2 */ -#define ISCSI_MGMT_CMDS_MAX 32 /* must be power of 2 */ -#define ISCSI_CONN_MAX 1 +#define ISCSI_DEF_XMIT_CMDS_MAX 128 /* must be power of 2 */ +#define ISCSI_MGMT_CMDS_MAX 16 /* must be power of 2 */ #define ISCSI_MGMT_ITT_OFFSET 0xa00 @@ -268,7 +267,7 @@ extern int iscsi_host_get_param(struct Scsi_Host *shost, */ extern struct iscsi_cls_session * iscsi_session_setup(struct iscsi_transport *, struct scsi_transport_template *, - int, int, uint32_t, uint32_t *); + uint16_t, uint16_t, int, int, uint32_t, uint32_t *); extern void iscsi_session_teardown(struct iscsi_cls_session *); extern struct iscsi_session *class_to_transport_session(struct iscsi_cls_session *); extern void iscsi_session_recovery_timedout(struct iscsi_cls_session *); diff --git a/include/scsi/scsi_transport_iscsi.h b/include/scsi/scsi_transport_iscsi.h index abc4068621..706c0cd36c 100644 --- a/include/scsi/scsi_transport_iscsi.h +++ b/include/scsi/scsi_transport_iscsi.h @@ -90,7 +90,8 @@ struct iscsi_transport { unsigned int max_conn; unsigned int max_cmd_len; struct iscsi_cls_session *(*create_session) (struct iscsi_transport *it, - struct scsi_transport_template *t, uint32_t sn, uint32_t *hn); + struct scsi_transport_template *t, uint16_t, uint16_t, + uint32_t sn, uint32_t *hn); void (*destroy_session) (struct iscsi_cls_session *session); struct iscsi_cls_conn *(*create_conn) (struct iscsi_cls_session *sess, uint32_t cid); -- cgit v1.2.2 From 0ab823db869f1c9454c5b031a9b8f8812ccd0aa7 Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:22 -0500 Subject: [SCSI] qla4xxx: add iscsi_transport capps for fw capacilities Userspace will want to know what the driver/FW/HW capabilites when it comes to some operations like if the hardware can do discovery or if it can store iscsi info like what target was used for boot. This patch adds some new caps so userspace can tell if the driver supports hardware/fw based sendtargets discovery and if the hardware has some flash which may be holding or can contain some iscsi target info . Signed-off-by: Mike Christie Cc: David C Somayajulu Signed-off-by: James Bottomley --- include/scsi/iscsi_if.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h index a046a32918..81a542506d 100644 --- a/include/scsi/iscsi_if.h +++ b/include/scsi/iscsi_if.h @@ -299,6 +299,8 @@ enum iscsi_host_param { #define CAP_MULTI_CONN 0x40 #define CAP_TEXT_NEGO 0x80 #define CAP_MARKERS 0x100 +#define CAP_FW_DB 0x200 +#define CAP_SENDTARGETS_OFFLOAD 0x400 /* * These flags describes reason of stop_conn() call -- cgit v1.2.2 From 2223696192c687f2853e42b7c1e0d3ef002081fd Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:24 -0500 Subject: [SCSI] iscsi class, qla4xxx, iscsi_tcp: export local address This patch exports the local address for the session. For qla4xxx this is the ip of the hba's port. For software this is the src addr of the socket. Signed-off-by: Mike Christie Cc: David C Somayajulu Signed-off-by: James Bottomley --- include/scsi/iscsi_if.h | 2 ++ include/scsi/libiscsi.h | 8 ++++++++ 2 files changed, 10 insertions(+) (limited to 'include') diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h index 81a542506d..642998069e 100644 --- a/include/scsi/iscsi_if.h +++ b/include/scsi/iscsi_if.h @@ -271,11 +271,13 @@ enum iscsi_param { enum iscsi_host_param { ISCSI_HOST_PARAM_HWADDRESS, ISCSI_HOST_PARAM_INITIATOR_NAME, + ISCSI_HOST_PARAM_IPADDRESS, ISCSI_HOST_PARAM_MAX, }; #define ISCSI_HOST_HWADDRESS (1 << ISCSI_HOST_PARAM_HWADDRESS) #define ISCSI_HOST_INITIATOR_NAME (1 << ISCSI_HOST_PARAM_INITIATOR_NAME) +#define ISCSI_HOST_IPADDRESS (1 << ISCSI_HOST_PARAM_IPADDRESS) #define iscsi_ptr(_handle) ((void*)(unsigned long)_handle) #define iscsi_handle(_ptr) ((uint64_t)(unsigned long)_ptr) diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index 2f303a3b27..eea33f7b15 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -72,6 +72,8 @@ struct iscsi_nopin; #define ISCSI_AGE_SHIFT 28 #define ISCSI_AGE_MASK (0xf << ISCSI_AGE_SHIFT) +#define ISCSI_ADDRESS_BUF_LEN 64 + struct iscsi_mgmt_task { /* * Becuae LLDs allocate their hdr differently, this is a pointer to @@ -174,6 +176,12 @@ struct iscsi_conn { /* values userspace uses to id a conn */ int persistent_port; char *persistent_address; + /* remote portal currently connected to */ + int portal_port; + char portal_address[ISCSI_ADDRESS_BUF_LEN]; + /* local address */ + int local_port; + char local_address[ISCSI_ADDRESS_BUF_LEN]; /* MIB-statistics */ uint64_t txdata_octets; -- cgit v1.2.2 From d8196ed2181b4595eaf464a5bcbddb6c28649a39 Mon Sep 17 00:00:00 2001 From: Mike Christie Date: Wed, 30 May 2007 12:57:25 -0500 Subject: [SCSI] iscsi class, iscsi_tcp, iser, qla4xxx: add netdevname sysfs attr iSCSI must support software iscsi (iscsi_tcp, iser), hardware iscsi (qla4xxx), and partial offload (broadcom). To be able to allow each stack or driver or port (virtual or physical) to be able to log into the same target portal we use the initiator tuple [[HWADDRESS | NETDEVNAME], INITIATOR_NAME] and the target tuple [TARGETNAME, CONN_ADDRESS, CONN_PORT] to id a session. This patch adds the netdev name, which is used by software iscsi when it binds a session to a netdevice using the SO_BINDTODEVICE sock opt. It cannot use HWADDRESS because if someone did vlans then the same netdevice will have the same mac and the initiator,target id will not be unique. Signed-off-by: Mike Christie Cc: Roland Dreier Cc: David C Somayajulu Signed-off-by: James Bottomley --- include/scsi/iscsi_if.h | 3 +++ include/scsi/libiscsi.h | 3 ++- 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/scsi/iscsi_if.h b/include/scsi/iscsi_if.h index 642998069e..50e907f420 100644 --- a/include/scsi/iscsi_if.h +++ b/include/scsi/iscsi_if.h @@ -271,12 +271,14 @@ enum iscsi_param { enum iscsi_host_param { ISCSI_HOST_PARAM_HWADDRESS, ISCSI_HOST_PARAM_INITIATOR_NAME, + ISCSI_HOST_PARAM_NETDEV_NAME, ISCSI_HOST_PARAM_IPADDRESS, ISCSI_HOST_PARAM_MAX, }; #define ISCSI_HOST_HWADDRESS (1 << ISCSI_HOST_PARAM_HWADDRESS) #define ISCSI_HOST_INITIATOR_NAME (1 << ISCSI_HOST_PARAM_INITIATOR_NAME) +#define ISCSI_HOST_NETDEV_NAME (1 << ISCSI_HOST_PARAM_NETDEV_NAME) #define ISCSI_HOST_IPADDRESS (1 << ISCSI_HOST_PARAM_IPADDRESS) #define iscsi_ptr(_handle) ((void*)(unsigned long)_handle) @@ -303,6 +305,7 @@ enum iscsi_host_param { #define CAP_MARKERS 0x100 #define CAP_FW_DB 0x200 #define CAP_SENDTARGETS_OFFLOAD 0x400 +#define CAP_DATA_PATH_OFFLOAD 0x800 /* * These flags describes reason of stop_conn() call diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h index eea33f7b15..3f631b08a1 100644 --- a/include/scsi/libiscsi.h +++ b/include/scsi/libiscsi.h @@ -228,8 +228,9 @@ struct iscsi_session { char *password_in; char *targetname; char *initiatorname; - /* hw address being used for iscsi connection */ + /* hw address or netdev iscsi connection is bound to */ char *hwaddress; + char *netdev; /* control data */ struct iscsi_transport *tt; struct Scsi_Host *host; -- cgit v1.2.2 From e08f457c7c0cc7720f28349f8780ea752c063441 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 14 May 2007 12:52:56 +0900 Subject: sh: __user annotations for __get/__put_user(). This adds in some more __user annotations. These weren't being handled properly in some of the __get_user and __put_user paths, so tidy those up. Signed-off-by: Paul Mundt --- include/asm-sh/page.h | 1 + include/asm-sh/sections.h | 2 -- include/asm-sh/system.h | 14 ++++++++++++++ include/asm-sh/uaccess.h | 40 ++++++++++++++++++++++------------------ 4 files changed, 37 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 7464de4ba0..011dfbe14a 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -60,6 +60,7 @@ extern void (*copy_page)(void *to, void *from); extern unsigned long shm_align_mask; extern unsigned long max_low_pfn, min_low_pfn; +extern unsigned long memory_start, memory_end; #ifdef CONFIG_MMU extern void clear_page_slow(void *to); diff --git a/include/asm-sh/sections.h b/include/asm-sh/sections.h index 57abd708b2..44c06c09e2 100644 --- a/include/asm-sh/sections.h +++ b/include/asm-sh/sections.h @@ -3,7 +3,5 @@ #include -extern char _end[]; - #endif /* __ASM_SH_SECTIONS_H */ diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index 82f3e229e6..fb22fc3f87 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -8,9 +8,13 @@ #include #include +#include #include #include +struct task_struct *__switch_to(struct task_struct *prev, + struct task_struct *next); + /* * switch_to() should switch tasks to task nr n, first */ @@ -271,6 +275,16 @@ extern unsigned int instruction_size(unsigned int insn); void disable_hlt(void); void enable_hlt(void); +void default_idle(void); + +asmlinkage void break_point_trap(void); +asmlinkage void debug_trap_handler(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs); +asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7, + struct pt_regs __regs); + #define arch_align_stack(x) (x) #endif diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h index 5c49ed6715..f18a1a5c95 100644 --- a/include/asm-sh/uaccess.h +++ b/include/asm-sh/uaccess.h @@ -61,8 +61,6 @@ static inline void set_fs(mm_segment_t s) */ static inline int __access_ok(unsigned long addr, unsigned long size) { - extern unsigned long memory_start, memory_end; - return ((addr >= memory_start) && ((addr + size) < memory_end)); } #else /* CONFIG_MMU */ @@ -76,7 +74,7 @@ static inline int __access_ok(unsigned long addr, unsigned long size) * __access_ok: Check if address with size is OK or not. * * We do three checks: - * (1) is it user space? + * (1) is it user space? * (2) addr + size --> carry? * (3) addr + size >= 0x80000000 (PAGE_OFFSET) * @@ -142,11 +140,12 @@ static inline int access_ok(int type, const void __user *p, unsigned long size) __get_user_nocheck((x),(ptr),sizeof(*(ptr))) struct __large_struct { unsigned long buf[100]; }; -#define __m(x) (*(struct __large_struct *)(x)) +#define __m(x) (*(struct __large_struct __user *)(x)) #define __get_user_size(x,ptr,size,retval) \ do { \ retval = 0; \ + __chk_user_ptr(ptr); \ switch (size) { \ case 1: \ __get_user_asm(x, ptr, retval, "b"); \ @@ -175,6 +174,7 @@ do { \ #define __get_user_check(x,ptr,size) \ ({ \ long __gu_err, __gu_val; \ + __chk_user_ptr(ptr); \ switch (size) { \ case 1: \ __get_user_1(__gu_val, (ptr), __gu_err); \ @@ -300,6 +300,7 @@ extern void __get_user_unknown(void); #define __put_user_size(x,ptr,size,retval) \ do { \ retval = 0; \ + __chk_user_ptr(ptr); \ switch (size) { \ case 1: \ __put_user_asm(x, ptr, retval, "b"); \ @@ -328,7 +329,7 @@ do { \ #define __put_user_check(x,ptr,size) \ ({ \ long __pu_err = -EFAULT; \ - __typeof__(*(ptr)) *__pu_addr = (ptr); \ + __typeof__(*(ptr)) __user *__pu_addr = (ptr); \ \ if (__access_ok((unsigned long)__pu_addr,size)) \ __put_user_size((x),__pu_addr,(size),__pu_err); \ @@ -406,10 +407,10 @@ __asm__ __volatile__( \ #endif extern void __put_user_unknown(void); - + /* Generic arbitrary sized copy. */ /* Return the number of bytes NOT copied */ -extern __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); +__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); #define copy_to_user(to,from,n) ({ \ void *__copy_to = (void *) (to); \ @@ -420,14 +421,6 @@ __copy_res = __copy_user(__copy_to, (void *) (from), __copy_size); \ } else __copy_res = __copy_size; \ __copy_res; }) -#define __copy_to_user(to,from,n) \ - __copy_user((void *)(to), \ - (void *)(from), n) - -#define __copy_to_user_inatomic __copy_to_user -#define __copy_from_user_inatomic __copy_from_user - - #define copy_from_user(to,from,n) ({ \ void *__copy_to = (void *) (to); \ void *__copy_from = (void *) (from); \ @@ -438,9 +431,20 @@ __copy_res = __copy_user(__copy_to, __copy_from, __copy_size); \ } else __copy_res = __copy_size; \ __copy_res; }) -#define __copy_from_user(to,from,n) \ - __copy_user((void *)(to), \ - (void *)(from), n) +static __always_inline unsigned long +__copy_from_user(void *to, const void __user *from, unsigned long n) +{ + return __copy_user(to, (__force void *)from, n); +} + +static __always_inline unsigned long __must_check +__copy_to_user(void __user *to, const void *from, unsigned long n) +{ + return __copy_user((__force void *)to, from, n); +} + +#define __copy_to_user_inatomic __copy_to_user +#define __copy_from_user_inatomic __copy_from_user /* * Clear the area and return remaining number of bytes -- cgit v1.2.2 From 9655ad03af2d232c3b26e7562ab4f8c29b107e49 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 14 May 2007 15:59:09 +0900 Subject: sh: Fixup machvec support. This fixes up much of the machvec handling, allowing for it to be overloaded on boot. Making practical use of this still requires some Kconfig munging, however. Signed-off-by: Paul Mundt --- include/asm-sh/machvec_init.h | 34 ---------------------------------- include/asm-sh/sections.h | 2 ++ include/asm-sh/setup.h | 1 + 3 files changed, 3 insertions(+), 34 deletions(-) (limited to 'include') diff --git a/include/asm-sh/machvec_init.h b/include/asm-sh/machvec_init.h index e397798ebd..88a973edcf 100644 --- a/include/asm-sh/machvec_init.h +++ b/include/asm-sh/machvec_init.h @@ -12,42 +12,8 @@ #ifndef __SH_MACHVEC_INIT_H #define __SH_MACHVEC_INIT_H - -/* - * In a GENERIC kernel, we have lots of these vectors floating about, - * all but one of which we want to go away. In a non-GENERIC kernel, - * we want only one, ever. - * - * Accomplish this in the GENERIC kernel by puting all of the vectors - * in the .init.data section where they'll go away. We'll copy the - * one we want to the real alpha_mv vector in setup_arch. - * - * Accomplish this in a non-GENERIC kernel by ifdef'ing out all but - * one of the vectors, which will not reside in .init.data. We then - * alias this one vector to alpha_mv, so no copy is needed. - * - * Upshot: set __initdata to nothing for non-GENERIC kernels. - * - * Note we do the same thing for the UNKNOWN kernel, as we need to write - * to the machine vector while setting it up. - */ - -#if defined(CONFIG_SH_GENERIC) || defined(CONFIG_SH_UNKNOWN) #define __initmv __attribute__((unused,__section__ (".machvec.init"))) -#define ALIAS_MV(x) -#else -#define __initmv - -/* GCC actually has a syntax for defining aliases, but is under some - delusion that you shouldn't be able to declare it extern somewhere - else beforehand. Fine. We'll do it ourselves. */ -#if 0 -#define ALIAS_MV(system) \ - struct sh_machine_vector sh_mv __attribute__((alias("mv_"#system))); -#else #define ALIAS_MV(system) \ asm(".global sh_mv\nsh_mv = mv_"#system ); -#endif -#endif /* GENERIC */ #endif /* __SH_MACHVEC_INIT_H */ diff --git a/include/asm-sh/sections.h b/include/asm-sh/sections.h index 44c06c09e2..2a696b8ee4 100644 --- a/include/asm-sh/sections.h +++ b/include/asm-sh/sections.h @@ -3,5 +3,7 @@ #include +extern long __machvec_start, __machvec_end; + #endif /* __ASM_SH_SECTIONS_H */ diff --git a/include/asm-sh/setup.h b/include/asm-sh/setup.h index 1583c6b7bd..586a9711a7 100644 --- a/include/asm-sh/setup.h +++ b/include/asm-sh/setup.h @@ -6,6 +6,7 @@ #ifdef __KERNEL__ int setup_early_printk(char *); +void sh_mv_setup(void); #endif /* __KERNEL__ */ -- cgit v1.2.2 From 25f8151bdcdd62c6b879e3669a562c0d329eee4a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 14 May 2007 19:12:37 +0900 Subject: sh: Get multiple boards in one image working again. This tidies up the build rules and permits multiple boards to be linked in to the same kernel. The earlier Kconfig work ensures that the CPU configuration is consistent across the boards, as this is the only thing that we can't do dynamically. Signed-off-by: Paul Mundt --- include/asm-sh/machvec_init.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/machvec_init.h b/include/asm-sh/machvec_init.h index 88a973edcf..cb015b8bb3 100644 --- a/include/asm-sh/machvec_init.h +++ b/include/asm-sh/machvec_init.h @@ -14,6 +14,6 @@ #define __initmv __attribute__((unused,__section__ (".machvec.init"))) #define ALIAS_MV(system) \ - asm(".global sh_mv\nsh_mv = mv_"#system ); + asm(".weak sh_mv\nsh_mv = mv_"#system ); #endif /* __SH_MACHVEC_INIT_H */ -- cgit v1.2.2 From 82f81f4784479df17a80caff4a7156da0a2f7dea Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Tue, 15 May 2007 15:19:34 +0900 Subject: sh: Kill off machvec aliases. We now throw all of the machvecs in to .machvec.init and either select one on the command line, or copy out the first (and usually only) one to sh_mv. The rest are freed as usual. This gets rid of all of the silly sh_mv aliasing and makes the selection explicit rather than link-order dependent. Signed-off-by: Paul Mundt --- include/asm-sh/machvec.h | 4 +++- include/asm-sh/machvec_init.h | 19 ------------------- 2 files changed, 3 insertions(+), 20 deletions(-) delete mode 100644 include/asm-sh/machvec_init.h (limited to 'include') diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h index 70389b72ff..088698bacf 100644 --- a/include/asm-sh/machvec.h +++ b/include/asm-sh/machvec.h @@ -13,7 +13,6 @@ #include #include #include -#include struct device; @@ -68,4 +67,7 @@ extern struct sh_machine_vector sh_mv; #define get_system_type() sh_mv.mv_name +#define __initmv \ + __attribute_used__ __attribute__((__section__ (".machvec.init"))) + #endif /* _ASM_SH_MACHVEC_H */ diff --git a/include/asm-sh/machvec_init.h b/include/asm-sh/machvec_init.h deleted file mode 100644 index cb015b8bb3..0000000000 --- a/include/asm-sh/machvec_init.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-sh/machvec_init.h - * - * Copyright 2000 Stuart Menefy (stuart.menefy@st.com) - * - * May be copied or modified under the terms of the GNU General Public - * License. See linux/COPYING for more information. - * - * This file has goodies to help simplify instantiation of machine vectors. - */ - -#ifndef __SH_MACHVEC_INIT_H -#define __SH_MACHVEC_INIT_H - -#define __initmv __attribute__((unused,__section__ (".machvec.init"))) -#define ALIAS_MV(system) \ - asm(".weak sh_mv\nsh_mv = mv_"#system ); - -#endif /* __SH_MACHVEC_INIT_H */ -- cgit v1.2.2 From 5900711ad7173b1cf3ee72eb21572e20b263ca0d Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 23 May 2007 17:40:56 +0900 Subject: sh: pfn_valid() depends on flatmem. pfn_valid() is already defined in the sparsemem case, so we only need to define this for CONFIG_FLATMEM. Signed-off-by: Paul Mundt --- include/asm-sh/page.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index 011dfbe14a..cb54b25100 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -135,7 +135,9 @@ typedef struct { unsigned long pgd; } pgd_t; #define PFN_START (__MEMORY_START >> PAGE_SHIFT) #define ARCH_PFN_OFFSET (PFN_START) #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) +#ifdef CONFIG_FLATMEM #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_low_pfn) +#endif #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ -- cgit v1.2.2 From dfbb9042801eaeb4df9015bb86224291a39a0f52 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 23 May 2007 17:48:36 +0900 Subject: sh: sparsemem support. This implements basic sparsemem support for SH. Presently this only uses static sparsemem, and we still permit explicit selection of flatmem. Those boards that want sparsemem can select it as usual. Signed-off-by: Paul Mundt --- include/asm-sh/sparsemem.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 include/asm-sh/sparsemem.h (limited to 'include') diff --git a/include/asm-sh/sparsemem.h b/include/asm-sh/sparsemem.h new file mode 100644 index 0000000000..547a540b66 --- /dev/null +++ b/include/asm-sh/sparsemem.h @@ -0,0 +1,16 @@ +#ifndef __ASM_SH_SPARSEMEM_H +#define __ASM_SH_SPARSEMEM_H + +#ifdef __KERNEL__ +/* + * SECTION_SIZE_BITS 2^N: how big each section will be + * MAX_PHYSADDR_BITS 2^N: how much physical address space we have + * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space + */ +#define SECTION_SIZE_BITS 26 +#define MAX_PHYSADDR_BITS 32 +#define MAX_PHYSMEM_BITS 32 + +#endif + +#endif /* __ASM_SH_SPARSEMEM_H */ -- cgit v1.2.2 From cbd2d9d8fcd9d2a46d71d0703a76773c20383c66 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 4 Jun 2007 15:46:56 +0900 Subject: sh: Default to 4-byte alignment for SLUB objects. Slub currently defaults to 8-byte alignment for the kmalloc and slab minalign values, where 4 will suffice. In the slab case BYTES_PER_WORD == 4 already, so defining the minalign values outright doesn't cause any regressions there either. Signed-off-by: Paul Mundt --- include/asm-sh/page.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'include') diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h index cb54b25100..6bc9bba101 100644 --- a/include/asm-sh/page.h +++ b/include/asm-sh/page.h @@ -151,5 +151,12 @@ typedef struct { unsigned long pgd; } pgd_t; #define __HAVE_ARCH_GATE_AREA #endif +/* + * Slub defaults to 8-byte alignment, we're only interested in 4. + * Slab defaults to BYTES_PER_WORD, which ends up being the same anyways. + */ +#define ARCH_KMALLOC_MINALIGN 4 +#define ARCH_SLAB_MINALIGN 4 + #endif /* __KERNEL__ */ #endif /* __ASM_SH_PAGE_H */ -- cgit v1.2.2 From b241cb0c885e55839fb0f93c6a4539c5416cc39f Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 6 Jun 2007 17:52:19 +0900 Subject: sh: Support for multiple nodes. This adds basic support for multiple nodes on SH machines. This is primarily useful for boards with many different memory blocks that are otherwise unused (SH7722/SH7785 URAM and so forth). Signed-off-by: Paul Mundt --- include/asm-sh/mmzone.h | 46 ++++++++++++++++++++++++++++++++++++++++++++++ include/asm-sh/topology.h | 30 ++++++++++++++++++++++++++++++ 2 files changed, 76 insertions(+) create mode 100644 include/asm-sh/mmzone.h (limited to 'include') diff --git a/include/asm-sh/mmzone.h b/include/asm-sh/mmzone.h new file mode 100644 index 0000000000..7969f381df --- /dev/null +++ b/include/asm-sh/mmzone.h @@ -0,0 +1,46 @@ +#ifndef __ASM_SH_MMZONE_H +#define __ASM_SH_MMZONE_H + +#ifdef __KERNEL__ + +#ifdef CONFIG_NEED_MULTIPLE_NODES +extern struct pglist_data *node_data[]; +#define NODE_DATA(nid) (node_data[nid]) + +#define node_start_pfn(nid) (NODE_DATA(nid)->node_start_pfn) +#define node_end_pfn(nid) (NODE_DATA(nid)->node_start_pfn + \ + NODE_DATA(nid)->node_spanned_pages) + +static inline int pfn_to_nid(unsigned long pfn) +{ + int nid; + + for (nid = 0; nid < MAX_NUMNODES; nid++) + if (pfn >= node_start_pfn(nid) && pfn <= node_end_pfn(nid)) + break; + + return nid; +} + +static inline struct pglist_data *pfn_to_pgdat(unsigned long pfn) +{ + return NODE_DATA(pfn_to_nid(pfn)); +} + +/* arch/sh/mm/numa.c */ +void __init setup_bootmem_node(int nid, unsigned long start, unsigned long end); +#else +static inline void +setup_bootmem_node(int nid, unsigned long start, unsigned long end) +{ +} +#endif /* CONFIG_NEED_MULTIPLE_NODES */ + +/* Platform specific mem init */ +void __init plat_mem_setup(void); + +/* arch/sh/kernel/setup.c */ +void __init setup_bootmem_allocator(unsigned long start_pfn); + +#endif /* __KERNEL__ */ +#endif /* __ASM_SH_MMZONE_H */ diff --git a/include/asm-sh/topology.h b/include/asm-sh/topology.h index cff001c316..f402a3b1cf 100644 --- a/include/asm-sh/topology.h +++ b/include/asm-sh/topology.h @@ -1,6 +1,36 @@ #ifndef _ASM_SH_TOPOLOGY_H #define _ASM_SH_TOPOLOGY_H +#ifdef CONFIG_NUMA + +/* sched_domains SD_NODE_INIT for sh machines */ +#define SD_NODE_INIT (struct sched_domain) { \ + .span = CPU_MASK_NONE, \ + .parent = NULL, \ + .child = NULL, \ + .groups = NULL, \ + .min_interval = 8, \ + .max_interval = 32, \ + .busy_factor = 32, \ + .imbalance_pct = 125, \ + .cache_nice_tries = 2, \ + .busy_idx = 3, \ + .idle_idx = 2, \ + .newidle_idx = 0, \ + .wake_idx = 1, \ + .forkexec_idx = 1, \ + .flags = SD_LOAD_BALANCE \ + | SD_BALANCE_FORK \ + | SD_BALANCE_EXEC \ + | SD_SERIALIZE \ + | SD_WAKE_BALANCE, \ + .last_balance = jiffies, \ + .balance_interval = 1, \ + .nr_balance_failed = 0, \ +} + +#endif + #include #endif /* _ASM_SH_TOPOLOGY_H */ -- cgit v1.2.2 From b9601c5e59dd25693345558a301e833741bf5874 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 8 Jun 2007 11:55:28 +0900 Subject: sh: Kill off dead SH7604 support. This was added during 2.5.x, but was never moved along. This can easily be resurrected if someone has one they wish to work with, but it's not worth keeping around in its current form. Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh2/cache.h | 20 ++------------------ include/asm-sh/processor.h | 2 +- include/asm-sh/saturn/io.h | 19 ------------------- include/asm-sh/saturn/smpc.h | 34 ---------------------------------- 4 files changed, 3 insertions(+), 72 deletions(-) delete mode 100644 include/asm-sh/saturn/io.h delete mode 100644 include/asm-sh/saturn/smpc.h (limited to 'include') diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h index 20b9796842..f02ba7a672 100644 --- a/include/asm-sh/cpu-sh2/cache.h +++ b/include/asm-sh/cpu-sh2/cache.h @@ -12,23 +12,7 @@ #define L1_CACHE_SHIFT 4 -#if defined(CONFIG_CPU_SUBTYPE_SH7604) -#define CCR 0xfffffe92 /* Address of Cache Control Register */ - -#define CCR_CACHE_CE 0x01 /* Cache enable */ -#define CCR_CACHE_ID 0x02 /* Instruction Replacement disable */ -#define CCR_CACHE_OD 0x04 /* Data Replacement disable */ -#define CCR_CACHE_TW 0x08 /* Two-way mode */ -#define CCR_CACHE_CP 0x10 /* Cache purge */ - -#define CACHE_OC_ADDRESS_ARRAY 0x60000000 - -#define CCR_CACHE_ENABLE CCR_CACHE_CE -#define CCR_CACHE_INVALIDATE CCR_CACHE_CP -#define CCR_CACHE_ORA CCR_CACHE_TW -#define CCR_CACHE_WT 0x00 /* SH-2 is _always_ write-through */ - -#elif defined(CONFIG_CPU_SUBTYPE_SH7619) +#if defined(CONFIG_CPU_SUBTYPE_SH7619) #define CCR1 0xffffffec #define CCR CCR1 @@ -49,5 +33,5 @@ #define CCR_CACHE_ENABLE CCR_CACHE_CE #define CCR_CACHE_INVALIDATE CCR_CACHE_CF #endif -#endif /* __ASM_CPU_SH2_CACHE_H */ +#endif /* __ASM_CPU_SH2_CACHE_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index d42f68e724..1fc5eed1b2 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -36,7 +36,7 @@ */ enum cpu_type { /* SH-2 types */ - CPU_SH7604, CPU_SH7619, + CPU_SH7619, /* SH-2A types */ CPU_SH7206, diff --git a/include/asm-sh/saturn/io.h b/include/asm-sh/saturn/io.h deleted file mode 100644 index f1b9b5d633..0000000000 --- a/include/asm-sh/saturn/io.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * include/asm-sh/saturn/io.h - * - * I/O functions for use on the Sega Saturn. - * - * Copyright (C) 2002 Paul Mundt - * - * Released under the terms of the GNU GPL v2.0. - */ -#ifndef __ASM_SH_SATURN_IO_H -#define __ASM_SH_SATURN_IO_H - -/* arch/sh/boards/saturn/io.c */ -extern unsigned long saturn_isa_port2addr(unsigned long offset); -extern void *saturn_ioremap(unsigned long offset, unsigned long size); -extern void saturn_iounmap(void *addr); - -#endif /* __ASM_SH_SATURN_IO_H */ - diff --git a/include/asm-sh/saturn/smpc.h b/include/asm-sh/saturn/smpc.h deleted file mode 100644 index 5de5c12d63..0000000000 --- a/include/asm-sh/saturn/smpc.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * include/asm-sh/saturn/smpc.h - * - * System Manager / Peripheral Control definitions. - * - * Copyright (C) 2002 Paul Mundt - * - * Released under the terms of the GNU GPL v2.0. - */ -#ifndef __ASM_SH_SATURN_SMPC_H -#define __ASM_SH_SATURN_SMPC_H - -#include - -#define SMPC_COMMAND 0x2010001f /* SMPC command register */ -#define SMPC_RESULT 0x2010005f /* SMPC result register */ -#define SMPC_STATUS 0x20100063 /* SMPC status register */ - -#define SMPC_CMD_MSHON 0x0001 /* Master SH On */ -#define SMPC_CMD_SSHON 0x0002 /* Slave SH On */ -#define SMPC_CMD_SSHOFF 0x0003 /* Slave SH Off */ -#define SMPC_CMD_SNDON 0x0004 /* Sound On */ -#define SMPC_CMD_SNDOFF 0x0005 /* Sound Off */ -#define SMPC_CMD_CDON 0x0006 /* CD On */ -#define SMPC_CMD_CDOFF 0x0007 /* CD Off */ - -static inline void smpc_barrier(void) -{ - while ((ctrl_inb(SMPC_STATUS) & 0x0001) == 0x0001) - ; -} - -#endif /* __ASM_SH_SATURN_SMPC_H */ - -- cgit v1.2.2 From 711be60522829beb82807de2867e56513934ebec Mon Sep 17 00:00:00 2001 From: "Robert P. J. Day" Date: Fri, 8 Jun 2007 11:56:31 +0900 Subject: sh: Warn against direct inclusion of . Signed-off-by: Robert P. J. Day Signed-off-by: Paul Mundt --- include/asm-sh/rwsem.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/rwsem.h b/include/asm-sh/rwsem.h index 4931ba817d..1987f3ea7f 100644 --- a/include/asm-sh/rwsem.h +++ b/include/asm-sh/rwsem.h @@ -1,11 +1,15 @@ /* - * include/asm-ppc/rwsem.h: R/W semaphores for SH using the stuff + * include/asm-sh/rwsem.h: R/W semaphores for SH using the stuff * in lib/rwsem.c. */ #ifndef _ASM_SH_RWSEM_H #define _ASM_SH_RWSEM_H +#ifndef _LINUX_RWSEM_H +#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" +#endif + #ifdef __KERNEL__ #include #include -- cgit v1.2.2 From 14bea95b84a3eedfe9e12f576d5f9f63f0f1b6ff Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 11 Jun 2007 10:18:45 +0900 Subject: sh: Compile fix for SH7604 removal. There was a last remaining reference to CPU_SH7604 that broke the build, kill that off too. Signed-off-by: Paul Mundt --- include/asm-sh/bugs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h index 5a117ec43c..efc8fd3e1f 100644 --- a/include/asm-sh/bugs.h +++ b/include/asm-sh/bugs.h @@ -22,7 +22,7 @@ static void __init check_bugs(void) current_cpu_data.loops_per_jiffy = loops_per_jiffy; switch (current_cpu_data.type) { - case CPU_SH7604 ... CPU_SH7619: + case CPU_SH7619: *p++ = '2'; break; case CPU_SH7206: -- cgit v1.2.2 From 357d59469c1179c30b8c425aba302346fac3594e Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 11 Jun 2007 15:32:07 +0900 Subject: sh: Tidy up dependencies for SH-2 build. SH-2 can presently get in to some pretty bogus states, so we tidy up the dependencies a bit and get it all building again. This gets us a bit closer to a functional allyesconfig and allmodconfig, though there are still a few things to fix up. Signed-off-by: Paul Mundt --- include/asm-sh/cache.h | 4 ++++ include/asm-sh/hd64461.h | 2 +- include/asm-sh/processor.h | 4 ---- include/asm-sh/system.h | 2 +- include/asm-sh/ubc.h | 9 +++++++-- 5 files changed, 13 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h index 9a3cb6ba9d..7a18649d1c 100644 --- a/include/asm-sh/cache.h +++ b/include/asm-sh/cache.h @@ -9,6 +9,7 @@ #define __ASM_SH_CACHE_H #ifdef __KERNEL__ +#include #include #define SH_CACHE_VALID 1 @@ -48,6 +49,9 @@ struct cache_info { unsigned long flags; }; + +int __init detect_cpu_and_cache_system(void); + #endif /* __ASSEMBLY__ */ #endif /* __KERNEL__ */ #endif /* __ASM_SH_CACHE_H */ diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h index 27e5c34e26..c9050b2b55 100644 --- a/include/asm-sh/hd64461.h +++ b/include/asm-sh/hd64461.h @@ -184,7 +184,7 @@ #define HD64461_NIRR 0x15000 #define HD64461_NIMR 0x15002 -#define HD64461_IRQBASE OFFCHIP_IRQ_BASE +#define HD64461_IRQBASE 64 #define HD64461_IRQ_NUM 16 #define HD64461_IRQ_UART (HD64461_IRQBASE+5) diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 1fc5eed1b2..1a20db0961 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -228,11 +228,7 @@ static __inline__ void grab_fpu(struct pt_regs *regs) regs->sr &= ~SR_FD; } -#ifdef CONFIG_CPU_SH4 extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs); -#else -#define save_fpu(tsk) do { } while (0) -#endif #define unlazy_fpu(tsk, regs) do { \ if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \ diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h index fb22fc3f87..7c75045ae2 100644 --- a/include/asm-sh/system.h +++ b/include/asm-sh/system.h @@ -126,7 +126,7 @@ static inline void sched_cacheflush(void) #define smp_read_barrier_depends() do { } while(0) #endif -#define set_mb(var, value) do { xchg(&var, value); } while (0) +#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) /* * Jump to P2 area. diff --git a/include/asm-sh/ubc.h b/include/asm-sh/ubc.h index ae9bbdeefb..38d46e01b8 100644 --- a/include/asm-sh/ubc.h +++ b/include/asm-sh/ubc.h @@ -51,9 +51,14 @@ #define BRCR_UBDE (1 << 0) #ifndef __ASSEMBLY__ -/* arch/sh/kernel/ubc.S */ -extern void ubc_wakeup(void); +/* arch/sh/kernel/cpu/ubc.S */ extern void ubc_sleep(void); + +#ifdef CONFIG_UBC_WAKEUP +extern void ubc_wakeup(void); +#else +#define ubc_wakeup() do { } while (0) +#endif #endif #endif /* __KERNEL__ */ -- cgit v1.2.2 From f341973d9a48b0643b619debd8d9ab1e518ebc34 Mon Sep 17 00:00:00 2001 From: Anton Blanchard Date: Wed, 16 May 2007 05:59:06 +1000 Subject: [POWERPC] Reserve threadinfo flags for perfmon2 Reserve two TIF flags for perfmon2 and shift them into the low 16 bits so we can use single assembly instructions to create constants based off them. Signed-off-by: Anton Blanchard Signed-off-by: Paul Mackerras --- include/asm-powerpc/thread_info.h | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/thread_info.h b/include/asm-powerpc/thread_info.h index 3f32ca8bfe..9d9aeca8ad 100644 --- a/include/asm-powerpc/thread_info.h +++ b/include/asm-powerpc/thread_info.h @@ -113,8 +113,8 @@ static inline struct thread_info *current_thread_info(void) #define TIF_POLLING_NRFLAG 4 /* true if poll_idle() is polling TIF_NEED_RESCHED */ #define TIF_32BIT 5 /* 32 bit binary */ -#define TIF_RUNLATCH 6 /* Is the runlatch enabled? */ -#define TIF_ABI_PENDING 7 /* 32/64 bit switch needed */ +#define TIF_PERFMON_WORK 6 /* work for pfm_handle_work() */ +#define TIF_PERFMON_CTXSW 7 /* perfmon needs ctxsw calls */ #define TIF_SYSCALL_AUDIT 8 /* syscall auditing active */ #define TIF_SINGLESTEP 9 /* singlestepping active */ #define TIF_MEMDIE 10 @@ -123,6 +123,8 @@ static inline struct thread_info *current_thread_info(void) #define TIF_NOERROR 14 /* Force successful syscall return */ #define TIF_RESTORE_SIGMASK 15 /* Restore signal mask in do_signal */ #define TIF_FREEZE 16 /* Freezing for suspend */ +#define TIF_RUNLATCH 17 /* Is the runlatch enabled? */ +#define TIF_ABI_PENDING 18 /* 32/64 bit switch needed */ /* as above, but as bit values */ #define _TIF_SYSCALL_TRACE (1< Date: Wed, 23 May 2007 04:18:04 +1000 Subject: [POWERPC] pseries: asm/pci-bridge.h CONFIG_ minor cleanup Use the correct CONFIG_ option to mark off the EEH bits. Move the EEH bits to the bottom of the struct. The config_space array is used by EEH only; it does not need to be part of the struct for non-pseries machines. Signed-off-by: Linas Vepstas ---- Revised patch, per commments from Michael Ellerman. include/asm-powerpc/pci-bridge.h | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) Signed-off-by: Paul Mackerras --- include/asm-powerpc/pci-bridge.h | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index d9bf5aba96..11537a07ca 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -70,19 +70,21 @@ struct pci_dn { int devfn; /* pci device and function number */ int class_code; /* pci device class */ -#ifdef CONFIG_PPC_PSERIES + struct pci_controller *phb; /* for pci devices */ + struct iommu_table *iommu_table; /* for phb's or bridges */ + struct pci_dev *pcidev; /* back-pointer to the pci device */ + struct device_node *node; /* back-pointer to the device_node */ + + int pci_ext_config_space; /* for pci devices */ + +#ifdef CONFIG_EEH int eeh_mode; /* See eeh.h for possible EEH_MODEs */ int eeh_config_addr; int eeh_pe_config_addr; /* new-style partition endpoint address */ int eeh_check_count; /* # times driver ignored error */ int eeh_freeze_count; /* # times this device froze up. */ -#endif - int pci_ext_config_space; /* for pci devices */ - struct pci_controller *phb; /* for pci devices */ - struct iommu_table *iommu_table; /* for phb's or bridges */ - struct pci_dev *pcidev; /* back-pointer to the pci device */ - struct device_node *node; /* back-pointer to the device_node */ u32 config_space[16]; /* saved PCI config space */ +#endif }; /* Get the pointer to a device_node's pci_dn */ -- cgit v1.2.2 From e1d04c9769398ae7df8c7ca2681b25f540b719d5 Mon Sep 17 00:00:00 2001 From: Linas Vepstas Date: Thu, 24 May 2007 03:16:46 +1000 Subject: [POWERPC] Add EEH sysfs blinkenlights Add sysfs blinkenlights for EEH statistics. Shuffle the eeh_add_device_tree() call so that it appears in the correct sequence. Signed-off-by: Linas Vepstas ---- arch/powerpc/platforms/pseries/Makefile | 2 arch/powerpc/platforms/pseries/eeh.c | 4 + arch/powerpc/platforms/pseries/eeh_cache.c | 2 arch/powerpc/platforms/pseries/eeh_sysfs.c | 84 +++++++++++++++++++++++++++++ arch/powerpc/platforms/pseries/pci_dlpar.c | 7 +- include/asm-powerpc/ppc-pci.h | 3 + 6 files changed, 98 insertions(+), 4 deletions(-) Signed-off-by: Paul Mackerras --- include/asm-powerpc/ppc-pci.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h index 8e2005159f..2a6ac69cad 100644 --- a/include/asm-powerpc/ppc-pci.h +++ b/include/asm-powerpc/ppc-pci.h @@ -139,6 +139,9 @@ void eeh_clear_slot (struct device_node *dn, int mode_flag); */ struct device_node * find_device_pe(struct device_node *dn); +void eeh_sysfs_add_device(struct pci_dev *pdev); +void eeh_sysfs_remove_device(struct pci_dev *pdev); + #endif /* CONFIG_EEH */ #else /* CONFIG_PCI */ -- cgit v1.2.2 From 858955bd572f0ca38b258e45c7dd743b9e44b04e Mon Sep 17 00:00:00 2001 From: Linas Vepstas Date: Thu, 24 May 2007 03:20:51 +1000 Subject: [POWERPC] Show EEH per-device false positives Track and report the number of times we read an all-1s value (0xff, 0xffff or 0xffffffff) from each device which is valid data, not indicating EEH isolation. Signed-off-by: Linas Vepstas ---- arch/powerpc/platforms/pseries/eeh.c | 5 +++++ arch/powerpc/platforms/pseries/eeh_sysfs.c | 3 +++ include/asm-powerpc/pci-bridge.h | 1 + 3 files changed, 9 insertions(+) Signed-off-by: Paul Mackerras --- include/asm-powerpc/pci-bridge.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index 11537a07ca..c49ce41cfa 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -83,6 +83,7 @@ struct pci_dn { int eeh_pe_config_addr; /* new-style partition endpoint address */ int eeh_check_count; /* # times driver ignored error */ int eeh_freeze_count; /* # times this device froze up. */ + int eeh_false_positives; /* # times this device reported #ff's */ u32 config_space[16]; /* saved PCI config space */ #endif }; -- cgit v1.2.2 From c19c03fc749147f565e807fa65f1729066800571 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Mon, 4 Jun 2007 15:15:35 +1000 Subject: [POWERPC] unmap_vm_area becomes unmap_kernel_range for the public This makes unmap_vm_area static and a wrapper around a new exported unmap_kernel_range that takes an explicit range instead of a vm_area struct. This makes it more versatile for code that wants to play with kernel page tables outside of the standard vmalloc area. (One example is some rework of the PowerPC PCI IO space mapping code that depends on that patch and removes some code duplication and horrible abuse of forged struct vm_struct). Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/linux/vmalloc.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h index 4b7ee83787..132b260aef 100644 --- a/include/linux/vmalloc.h +++ b/include/linux/vmalloc.h @@ -65,9 +65,10 @@ extern struct vm_struct *get_vm_area_node(unsigned long size, unsigned long flags, int node, gfp_t gfp_mask); extern struct vm_struct *remove_vm_area(void *addr); + extern int map_vm_area(struct vm_struct *area, pgprot_t prot, struct page ***pages); -extern void unmap_vm_area(struct vm_struct *area); +extern void unmap_kernel_range(unsigned long addr, unsigned long size); /* * Internals. Dont't use.. -- cgit v1.2.2 From 3d5134ee8341bffc4f539049abb9e90d469b448d Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Mon, 4 Jun 2007 15:15:36 +1000 Subject: [POWERPC] Rewrite IO allocation & mapping on powerpc64 This rewrites pretty much from scratch the handling of MMIO and PIO space allocations on powerpc64. The main goals are: - Get rid of imalloc and use more common code where possible - Simplify the current mess so that PIO space is allocated and mapped in a single place for PCI bridges - Handle allocation constraints of PIO for all bridges including hot plugged ones within the 2GB space reserved for IO ports, so that devices on hotplugged busses will now work with drivers that assume IO ports fit in an int. - Cleanup and separate tracking of the ISA space in the reserved low 64K of IO space. No ISA -> Nothing mapped there. I booted a cell blade with IDE on PIO and MMIO and a dual G5 so far, that's it :-) With this patch, all allocations are done using the code in mm/vmalloc.c, though we use the low level __get_vm_area with explicit start/stop constraints in order to manage separate areas for vmalloc/vmap, ioremap, and PCI IOs. This greatly simplifies a lot of things, as you can see in the diffstat of that patch :-) A new pair of functions pcibios_map/unmap_io_space() now replace all of the previous code that used to manipulate PCI IOs space. The allocation is done at mapping time, which is now called from scan_phb's, just before the devices are probed (instead of after, which is by itself a bug fix). The only other caller is the PCI hotplug code for hot adding PCI-PCI bridges (slots). imalloc is gone, as is the "sub-allocation" thing, but I do beleive that hotplug should still work in the sense that the space allocation is always done by the PHB, but if you unmap a child bus of this PHB (which seems to be possible), then the code should properly tear down all the HPTE mappings for that area of the PHB allocated IO space. I now always reserve the first 64K of IO space for the bridge with the ISA bus on it. I have moved the code for tracking ISA in a separate file which should also make it smarter if we ever are capable of hot unplugging or re-plugging an ISA bridge. This should have a side effect on platforms like powermac where VGA IOs will no longer work. This is done on purpose though as they would have worked semi-randomly before. The idea at this point is to isolate drivers that might need to access those and fix them by providing a proper function to obtain an offset to the legacy IOs of a given bus. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/floppy.h | 6 +++--- include/asm-powerpc/io.h | 19 ++++++++----------- include/asm-powerpc/pci-bridge.h | 6 ++++++ include/asm-powerpc/pci.h | 4 ---- include/asm-powerpc/pgtable-ppc64.h | 21 +++++++++++++++------ include/asm-powerpc/ppc-pci.h | 6 +++--- include/asm-powerpc/tlbflush.h | 5 +++++ 7 files changed, 40 insertions(+), 27 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/floppy.h b/include/asm-powerpc/floppy.h index afa700ded8..34146f0eea 100644 --- a/include/asm-powerpc/floppy.h +++ b/include/asm-powerpc/floppy.h @@ -29,7 +29,7 @@ #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL); #include -#include /* for ppc64_isabridge_dev */ +#include /* for isa_bridge_pcidev */ #define fd_dma_setup(addr,size,mode,io) fd_ops->_dma_setup(addr,size,mode,io) @@ -139,12 +139,12 @@ static int hard_dma_setup(char *addr, unsigned long size, int mode, int io) if (bus_addr && (addr != prev_addr || size != prev_size || dir != prev_dir)) { /* different from last time -- unmap prev */ - pci_unmap_single(ppc64_isabridge_dev, bus_addr, prev_size, prev_dir); + pci_unmap_single(isa_bridge_pcidev, bus_addr, prev_size, prev_dir); bus_addr = 0; } if (!bus_addr) /* need to map it */ - bus_addr = pci_map_single(ppc64_isabridge_dev, addr, size, dir); + bus_addr = pci_map_single(isa_bridge_pcidev, addr, size, dir); /* remember this one as prev */ prev_addr = addr; diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h index 350c9bdb31..17efea5b59 100644 --- a/include/asm-powerpc/io.h +++ b/include/asm-powerpc/io.h @@ -607,9 +607,9 @@ static inline void iosync(void) * * * iounmap undoes such a mapping and can be hooked * - * * __ioremap_explicit (and the pending __iounmap_explicit) are low level - * functions to create hand-made mappings for use only by the PCI code - * and cannot currently be hooked. + * * __ioremap_at (and the pending __iounmap_at) are low level functions to + * create hand-made mappings for use only by the PCI code and cannot + * currently be hooked. Must be page aligned. * * * __ioremap is the low level implementation used by ioremap and * ioremap_flags and cannot be hooked (but can be used by a hook on one @@ -629,12 +629,9 @@ extern void __iomem *__ioremap(phys_addr_t, unsigned long size, unsigned long flags); extern void __iounmap(volatile void __iomem *addr); -extern int __ioremap_explicit(phys_addr_t p_addr, unsigned long v_addr, - unsigned long size, unsigned long flags); -extern int __iounmap_explicit(volatile void __iomem *start, - unsigned long size); - -extern void __iomem * reserve_phb_iospace(unsigned long size); +extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea, + unsigned long size, unsigned long flags); +extern void __iounmap_at(void *ea, unsigned long size); /* Those are more 32 bits only functions */ extern unsigned long iopa(unsigned long addr); @@ -651,8 +648,8 @@ extern void io_block_mapping(unsigned long virt, phys_addr_t phys, */ #define HAVE_ARCH_PIO_SIZE 1 #define PIO_OFFSET 0x00000000UL -#define PIO_MASK 0x3fffffffUL -#define PIO_RESERVED 0x40000000UL +#define PIO_MASK (FULL_IO_SIZE - 1) +#define PIO_RESERVED (FULL_IO_SIZE) #define mmio_read16be(addr) readw_be(addr) #define mmio_read32be(addr) readl_be(addr) diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index c49ce41cfa..5261527ed7 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -31,6 +31,7 @@ struct pci_controller { int last_busno; void __iomem *io_base_virt; + void *io_base_alloc; resource_size_t io_base_phys; /* Some machines have a non 1:1 mapping of @@ -167,6 +168,11 @@ static inline unsigned long pci_address_to_pio(phys_addr_t address) } #endif +extern void isa_bridge_find_early(struct pci_controller *hose); + +extern int pcibios_unmap_io_space(struct pci_bus *bus); +extern int pcibios_map_io_space(struct pci_bus *bus); + /* Return values for ppc_md.pci_probe_mode function */ #define PCI_PROBE_NONE -1 /* Don't look at this bus at all */ #define PCI_PROBE_NORMAL 0 /* Do normal PCI probing */ diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h index ce0f13e8eb..93e3752df6 100644 --- a/include/asm-powerpc/pci.h +++ b/include/asm-powerpc/pci.h @@ -220,10 +220,6 @@ static inline struct resource *pcibios_select_root(struct pci_dev *pdev, return root; } -extern int unmap_bus_range(struct pci_bus *bus); - -extern int remap_bus_range(struct pci_bus *bus); - extern void pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus); diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h index 704c4e669f..9b0f51ccad 100644 --- a/include/asm-powerpc/pgtable-ppc64.h +++ b/include/asm-powerpc/pgtable-ppc64.h @@ -27,7 +27,7 @@ struct mm_struct; */ #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \ PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT) -#define PGTABLE_RANGE (1UL << PGTABLE_EADDR_SIZE) +#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE) #if TASK_SIZE_USER64 > PGTABLE_RANGE #error TASK_SIZE_USER64 exceeds pagetable range @@ -37,19 +37,28 @@ struct mm_struct; #error TASK_SIZE_USER64 exceeds user VSID range #endif + /* * Define the address range of the vmalloc VM area. */ #define VMALLOC_START ASM_CONST(0xD000000000000000) -#define VMALLOC_SIZE ASM_CONST(0x80000000000) +#define VMALLOC_SIZE (PGTABLE_RANGE >> 1) #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE) /* - * Define the address range of the imalloc VM area. + * Define the address ranges for MMIO and IO space : + * + * ISA_IO_BASE = VMALLOC_END, 64K reserved area + * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces + * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE */ -#define PHBS_IO_BASE VMALLOC_END -#define IMALLOC_BASE (PHBS_IO_BASE + 0x80000000ul) /* Reserve 2 gigs for PHBs */ -#define IMALLOC_END (VMALLOC_START + PGTABLE_RANGE) +#define FULL_IO_SIZE 0x80000000ul +#define ISA_IO_BASE (VMALLOC_END) +#define ISA_IO_END (VMALLOC_END + 0x10000ul) +#define PHB_IO_BASE (ISA_IO_END) +#define PHB_IO_END (VMALLOC_END + FULL_IO_SIZE) +#define IOREMAP_BASE (PHB_IO_END) +#define IOREMAP_END (VMALLOC_START + PGTABLE_RANGE) /* * Region IDs diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h index 2a6ac69cad..b847aa1007 100644 --- a/include/asm-powerpc/ppc-pci.h +++ b/include/asm-powerpc/ppc-pci.h @@ -26,7 +26,7 @@ extern int global_phb_number; extern void find_and_init_phbs(void); -extern struct pci_dev *ppc64_isabridge_dev; /* may be NULL if no ISA bus */ +extern struct pci_dev *isa_bridge_pcidev; /* may be NULL if no ISA bus */ /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */ #define BUID_HI(buid) ((buid) >> 32) @@ -47,8 +47,8 @@ extern void init_pci_config_tokens (void); extern unsigned long get_phb_buid (struct device_node *); extern int rtas_setup_phb(struct pci_controller *phb); -/* From pSeries_pci.h */ -extern void pSeries_final_fixup(void); +/* From iSeries PCI */ +extern void iSeries_pcibios_init(void); extern unsigned long pci_probe_only; diff --git a/include/asm-powerpc/tlbflush.h b/include/asm-powerpc/tlbflush.h index 86e6266a02..99a0439baa 100644 --- a/include/asm-powerpc/tlbflush.h +++ b/include/asm-powerpc/tlbflush.h @@ -155,6 +155,11 @@ static inline void flush_tlb_kernel_range(unsigned long start, { } +/* Private function for use by PCI IO mapping code */ +extern void __flush_hash_table_range(struct mm_struct *mm, unsigned long start, + unsigned long end); + + #endif /* -- cgit v1.2.2 From e17666ba48f78ff10162d7448e7c92d668d8faf6 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Mon, 4 Jun 2007 15:15:43 +1000 Subject: [POWERPC] ptrace updates & new, better requests The powerpc ptrace interface is dodgy at best. We have defined our "own" versions of GETREGS/SETREGS/GETFPREGS/SETFPREGS that strangely take arguments in reverse order from other archs (in addition to having different request numbers) and have subtle issue, like not accessing all of the registers in their respective categories. This patch moves the implementation of those to a separate function in order to facilitate their deprecation in the future, and provides new ptrace requests that mirror the x86 and sparc ones and use the same numbers: PTRACE_GETREGS : returns an entire pt_regs (the whole thing, not only the 32 GPRs, though that doesn't include the FPRs etc... There's a compat version for 32 bits that returns a 32 bits compatible pt_regs (44 uints) PTRACE_SETREGS : sets an entire pt_regs (the whole thing, not only the 32 GPRs, though that doesn't include the FPRs etc... Some registers cannot be written to and will just be dropped, this is the same as with POKEUSR, that is anything above MQ on 32 bits and CCR on 64 bits. There is a compat version as well. PTRACE_GETFPREGS : returns all the FP registers -including- the FPSCR that is 33 doubles (regardless of 32/64 bits) PTRACE_SETFPREGS : sets all the FP registers -including- the FPSCR that is 33 doubles (regardless of 32/64 bits) And two that only exist on 64 bits kernels: PTRACE_GETREGS64 : Same as PTRACE_GETREGS, except there is no compat function, a 32 bits process will obtain the full 64 bits registers PTRACE_SETREGS64 : Same as PTRACE_SETREGS, except there is no compat function, a 32 bits process will set the full 64 bits registers The two later ones makes things easier to have a 32 bits debugger on a 64 bits program (or on a 32 bits program that uses the full 64 bits of the GPRs, which is possible though has issues that will be fixed in a later patch). Finally, while at it, the patch removes a whole bunch of code duplication between ptrace32.c and ptrace.c, in large part by having the former call into the later for all requests that don't need any special "compat" treatment. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/ptrace.h | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h index 4ad77a13f8..53d24584e9 100644 --- a/include/asm-powerpc/ptrace.h +++ b/include/asm-powerpc/ptrace.h @@ -158,9 +158,7 @@ do { \ #define PT_NIP 32 #define PT_MSR 33 -#ifdef __KERNEL__ #define PT_ORIG_R3 34 -#endif #define PT_CTR 35 #define PT_LNK 36 #define PT_XER 37 @@ -169,11 +167,12 @@ do { \ #define PT_MQ 39 #else #define PT_SOFTE 39 +#endif #define PT_TRAP 40 #define PT_DAR 41 #define PT_DSISR 42 #define PT_RESULT 43 -#endif +#define PT_REGS_COUNT 44 #define PT_FPR0 48 /* each FP reg occupies 2 slots in this space */ @@ -229,7 +228,17 @@ do { \ #define PTRACE_GET_DEBUGREG 25 #define PTRACE_SET_DEBUGREG 26 -/* Additional PTRACE requests implemented on PowerPC. */ +/* (new) PTRACE requests using the same numbers as x86 and the same + * argument ordering. Additionally, they support more registers too + */ +#define PTRACE_GETREGS 12 +#define PTRACE_SETREGS 13 +#define PTRACE_GETFPREGS 14 +#define PTRACE_SETFPREGS 15 +#define PTRACE_GETREGS64 22 +#define PTRACE_SETREGS64 23 + +/* (old) PTRACE requests with inverted arguments */ #define PPC_PTRACE_GETREGS 0x99 /* Get GPRs 0 - 31 */ #define PPC_PTRACE_SETREGS 0x98 /* Set GPRs 0 - 31 */ #define PPC_PTRACE_GETFPREGS 0x97 /* Get FPRs 0 - 31 */ -- cgit v1.2.2 From 865418d8e78b9c11c964157740b2596d6ffe9dfa Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Mon, 4 Jun 2007 15:15:44 +1000 Subject: [POWERPC] Uninline common ptrace bits This folds back the ptrace-common.h bits back into ptrace.c and removes that file. The FSL SPE bits from ptrace-ppc32.h are folded back in as well. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/ptrace.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/ptrace.h b/include/asm-powerpc/ptrace.h index 53d24584e9..13fccc5a41 100644 --- a/include/asm-powerpc/ptrace.h +++ b/include/asm-powerpc/ptrace.h @@ -92,6 +92,11 @@ extern unsigned long profile_pc(struct pt_regs *regs); set_thread_flag(TIF_NOERROR); \ } while(0) +struct task_struct; +extern unsigned long ptrace_get_reg(struct task_struct *task, int regno); +extern int ptrace_put_reg(struct task_struct *task, int regno, + unsigned long data); + /* * We use the least-significant bit of the trap field to indicate * whether we have saved the full set of registers, or only a -- cgit v1.2.2 From 69d15f6b352a681f1db9bc70219a3e8e9d503dbf Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Mon, 4 Jun 2007 15:15:50 +1000 Subject: [POWERPC] Consolidate sys_sigaltstack sys_sigaltstack is the same on 32bit and 64 and we can consolidate it to signal.c. The only difference is that the 32bit code uses ints for the unused register paramaters and 64bit unsigned long. I've changed it to unsigned long because it's the same width on 32bit. (I also wonder who came up with this awkward calling convention.. :)) Signed-off-by: Christoph Hellwig Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/syscalls.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/syscalls.h b/include/asm-powerpc/syscalls.h index c2fe79d4f9..b3ca41fc8b 100644 --- a/include/asm-powerpc/syscalls.h +++ b/include/asm-powerpc/syscalls.h @@ -43,16 +43,9 @@ asmlinkage long ppc_newuname(struct new_utsname __user * name); asmlinkage long sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize); - -#ifndef __powerpc64__ -asmlinkage long sys_sigaltstack(const stack_t __user *uss, - stack_t __user *uoss, int r5, int r6, int r7, int r8, - struct pt_regs *regs); -#else /* __powerpc64__ */ asmlinkage long sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, unsigned long r5, unsigned long r6, unsigned long r7, unsigned long r8, struct pt_regs *regs); -#endif /* __powerpc64__ */ #endif /* __KERNEL__ */ #endif /* __ASM_POWERPC_SYSCALLS_H */ -- cgit v1.2.2 From d8c391a5593aca5bea002bcaaec16c7bbd6ec853 Mon Sep 17 00:00:00 2001 From: Jake Moilanen Date: Fri, 8 Jun 2007 07:27:11 +1000 Subject: [POWERPC] Donate idle CPU cycles on dedicated partitions A Power6 can give up CPU cycles on a dedicated CPU (as opposed to a shared CPU) to other shared processors if the administrator asks for it (via the HMC). This enables that to work properly on P6. This just involves setting a bit in the CAS structure as well as the VPA. To donate cycles, a CPU has to have all SMT threads idle and have the donate bit set in the VPA. Then call H_CEDE. The reason why shared processors just aren't used is because dedicated CPUs are guaranteed an actual processor, yet the system is still able to increase the capacity of the shared CPU pool. Also rename the VPA's cpuctls_task_attrs field to a more accurate name. Signed-off-by: Jake Moilanen Signed-off-by: Paul Mackerras --- include/asm-powerpc/lppaca.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/lppaca.h b/include/asm-powerpc/lppaca.h index 821ea0c512..567ed92cd9 100644 --- a/include/asm-powerpc/lppaca.h +++ b/include/asm-powerpc/lppaca.h @@ -98,7 +98,7 @@ struct lppaca { u64 saved_gpr5; // Saved GPR5 x30-x37 u8 reserved4; // Reserved x38-x38 - u8 cpuctls_task_attrs; // Task attributes for cpuctls x39-x39 + u8 donate_dedicated_cpu; // Donate dedicated CPU cycles x39-x39 u8 fpregs_in_use; // FP regs in use x3A-x3A u8 pmcregs_in_use; // PMC regs in use x3B-x3B volatile u32 saved_decr; // Saved Decr Value x3C-x3F -- cgit v1.2.2 From 4db68bfe71940c0851bc81041ade6dc293fe2b96 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 13 Jun 2007 14:52:54 +1000 Subject: [POWERPC] Split out asm-ppc/mmu.h portions for the "classic" hash-based MMU arch/powerpc still relies on asm-ppc/mmu.h for most 32-bit MMU types. This is another step towards fixing this. It takes the portions of asm-ppc/mmu.h related to the "classic" 32-bit hash page table MMU which are still relevant in arch/powerpc and puts them in a new asm-powerpc/mmu-hash32.h, included when appropriate from asm-powerpc/mmu.h. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- include/asm-powerpc/mmu-hash32.h | 91 ++++++++++++++++++++++++++++++++++++++++ include/asm-powerpc/mmu.h | 3 ++ 2 files changed, 94 insertions(+) create mode 100644 include/asm-powerpc/mmu-hash32.h (limited to 'include') diff --git a/include/asm-powerpc/mmu-hash32.h b/include/asm-powerpc/mmu-hash32.h new file mode 100644 index 0000000000..2d3e183cfe --- /dev/null +++ b/include/asm-powerpc/mmu-hash32.h @@ -0,0 +1,91 @@ +#ifndef _ASM_POWERPC_MMU_HASH32_H_ +#define _ASM_POWERPC_MMU_HASH32_H_ +/* + * 32-bit hash table MMU support + */ + +/* + * BATs + */ + +/* Block size masks */ +#define BL_128K 0x000 +#define BL_256K 0x001 +#define BL_512K 0x003 +#define BL_1M 0x007 +#define BL_2M 0x00F +#define BL_4M 0x01F +#define BL_8M 0x03F +#define BL_16M 0x07F +#define BL_32M 0x0FF +#define BL_64M 0x1FF +#define BL_128M 0x3FF +#define BL_256M 0x7FF + +/* BAT Access Protection */ +#define BPP_XX 0x00 /* No access */ +#define BPP_RX 0x01 /* Read only */ +#define BPP_RW 0x02 /* Read/write */ + +#ifndef __ASSEMBLY__ +typedef struct _BAT { + struct { + unsigned long bepi:15; /* Effective page index (virtual address) */ + unsigned long :4; /* Unused */ + unsigned long bl:11; /* Block size mask */ + unsigned long vs:1; /* Supervisor valid */ + unsigned long vp:1; /* User valid */ + } batu; /* Upper register */ + struct { + unsigned long brpn:15; /* Real page index (physical address) */ + unsigned long :10; /* Unused */ + unsigned long w:1; /* Write-thru cache */ + unsigned long i:1; /* Cache inhibit */ + unsigned long m:1; /* Memory coherence */ + unsigned long g:1; /* Guarded (MBZ in IBAT) */ + unsigned long :1; /* Unused */ + unsigned long pp:2; /* Page access protections */ + } batl; /* Lower register */ +} BAT; +#endif /* !__ASSEMBLY__ */ + +/* + * Hash table + */ + +/* Values for PP (assumes Ks=0, Kp=1) */ +#define PP_RWXX 0 /* Supervisor read/write, User none */ +#define PP_RWRX 1 /* Supervisor read/write, User read */ +#define PP_RWRW 2 /* Supervisor read/write, User read/write */ +#define PP_RXRX 3 /* Supervisor read, User read */ + +#ifndef __ASSEMBLY__ + +/* Hardware Page Table Entry */ +typedef struct _PTE { + unsigned long v:1; /* Entry is valid */ + unsigned long vsid:24; /* Virtual segment identifier */ + unsigned long h:1; /* Hash algorithm indicator */ + unsigned long api:6; /* Abbreviated page index */ + unsigned long rpn:20; /* Real (physical) page number */ + unsigned long :3; /* Unused */ + unsigned long r:1; /* Referenced */ + unsigned long c:1; /* Changed */ + unsigned long w:1; /* Write-thru cache mode */ + unsigned long i:1; /* Cache inhibited */ + unsigned long m:1; /* Memory coherence */ + unsigned long g:1; /* Guarded */ + unsigned long :1; /* Unused */ + unsigned long pp:2; /* Page protection */ +} PTE; + +typedef struct { + unsigned long id; + unsigned long vdso_base; +} mm_context_t; + +typedef unsigned long phys_addr_t; + +#endif /* !__ASSEMBLY__ */ + +#endif /* _ASM_POWERPC_MMU_HASH32_H_ */ diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h index fe510fff89..dae6a71fba 100644 --- a/include/asm-powerpc/mmu.h +++ b/include/asm-powerpc/mmu.h @@ -5,6 +5,9 @@ #ifdef CONFIG_PPC64 /* 64-bit classic hash table MMU */ # include +#elif defined(CONFIG_PPC_STD_MMU) +/* 32-bit classic hash table MMU */ +# include #elif defined(CONFIG_44x) /* 44x-style software loaded TLB */ # include -- cgit v1.2.2 From 90ac19a8b21ba2621ddd7beb2dc96152e78270b7 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 13 Jun 2007 14:52:54 +1000 Subject: [POWERPC] Abolish iopa(), mm_ptov(), io_block_mapping() from arch/powerpc These old-fashioned IO mapping functions no longer have any callers in code which remains relevant on arch/powerpc. Therefore, this removes them from arch/powerpc. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- include/asm-powerpc/io.h | 7 ------- include/asm-powerpc/pgtable-ppc32.h | 2 -- 2 files changed, 9 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/io.h b/include/asm-powerpc/io.h index 17efea5b59..bb8d965f96 100644 --- a/include/asm-powerpc/io.h +++ b/include/asm-powerpc/io.h @@ -633,13 +633,6 @@ extern void __iomem * __ioremap_at(phys_addr_t pa, void *ea, unsigned long size, unsigned long flags); extern void __iounmap_at(void *ea, unsigned long size); -/* Those are more 32 bits only functions */ -extern unsigned long iopa(unsigned long addr); -extern unsigned long mm_ptov(unsigned long addr) __attribute_const__; -extern void io_block_mapping(unsigned long virt, phys_addr_t phys, - unsigned int size, int flags); - - /* * When CONFIG_PPC_INDIRECT_IO is set, we use the generic iomap implementation * which needs some additional definitions here. They basically allow PIO diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index c863bdb288..c18ac821ce 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -756,8 +756,6 @@ extern void paging_init(void); extern void cache_clear(__u32 addr, int length); extern void cache_push(__u32 addr, int length); extern int mm_end_of_chunk (unsigned long addr, int len); -extern unsigned long iopa(unsigned long addr); -extern unsigned long mm_ptov(unsigned long addr) __attribute_const__; /* Values for nocacheflag and cmode */ /* These are not used by the APUS kernel_map, but prevents -- cgit v1.2.2 From f21f49ea639ac3f24824177dac1268af75a2d373 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 13 Jun 2007 14:52:54 +1000 Subject: [POWERPC] Remove the dregs of APUS support from arch/powerpc APUS (the Amiga Power-Up System) is not supported under arch/powerpc and it's unlikely it ever will be. Therefore, this patch removes the fragments of APUS support code from arch/powerpc which have been copied from arch/ppc. A few APUS references are left in asm-powerpc in .h files which are still used from arch/ppc. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- include/asm-powerpc/pgtable-ppc32.h | 26 -------------------------- 1 file changed, 26 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index c18ac821ce..63c535d025 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -751,32 +751,6 @@ extern void paging_init(void); #define pte_to_pgoff(pte) (pte_val(pte) >> 3) #define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE }) -/* CONFIG_APUS */ -/* For virtual address to physical address conversion */ -extern void cache_clear(__u32 addr, int length); -extern void cache_push(__u32 addr, int length); -extern int mm_end_of_chunk (unsigned long addr, int len); - -/* Values for nocacheflag and cmode */ -/* These are not used by the APUS kernel_map, but prevents - compilation errors. */ -#define KERNELMAP_FULL_CACHING 0 -#define KERNELMAP_NOCACHE_SER 1 -#define KERNELMAP_NOCACHE_NONSER 2 -#define KERNELMAP_NO_COPYBACK 3 - -/* - * Map some physical address range into the kernel address space. - */ -extern unsigned long kernel_map(unsigned long paddr, unsigned long size, - int nocacheflag, unsigned long *memavailp ); - -/* - * Set cache mode of (kernel space) address range. - */ -extern void kernel_set_cachemode (unsigned long address, unsigned long size, - unsigned int cmode); - /* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ #define kern_addr_valid(addr) (1) -- cgit v1.2.2 From 9c709f3b62ee8ee0dfadf358e361802cab7eea7a Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 13 Jun 2007 14:52:56 +1000 Subject: [POWERPC] Start factoring pgtable-ppc32.h and pgtable-ppc64.h This factors some things defined in both pgtable-ppc32.h and pgtable-ppc64.h into the common part of asm-powerpc/pgtable.h. These are all things which have essentially identical definitions, and which by their nature are very unlikely ever to need different definitions in the two cases. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- include/asm-powerpc/pgtable-ppc32.h | 22 ---------------------- include/asm-powerpc/pgtable-ppc64.h | 29 ----------------------------- include/asm-powerpc/pgtable.h | 28 ++++++++++++++++++++++++++++ 3 files changed, 28 insertions(+), 51 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pgtable-ppc32.h b/include/asm-powerpc/pgtable-ppc32.h index 63c535d025..5b14536d4a 100644 --- a/include/asm-powerpc/pgtable-ppc32.h +++ b/include/asm-powerpc/pgtable-ppc32.h @@ -6,11 +6,7 @@ #ifndef __ASSEMBLY__ #include #include -#include /* For TASK_SIZE */ -#include -#include #include /* For sub-arch specific PPC_PIN_SIZE */ -struct mm_struct; extern unsigned long va_to_phys(unsigned long address); extern pte_t *va_to_pte(unsigned long address); @@ -488,14 +484,6 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void); #define pfn_pte(pfn, prot) __pte(((pte_basic_t)(pfn) << PFN_SHIFT_OFFSET) |\ pgprot_val(prot)) #define mk_pte(page, prot) pfn_pte(page_to_pfn(page), prot) - -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern unsigned long empty_zero_page[1024]; -#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) - #endif /* __ASSEMBLY__ */ #define pte_none(pte) ((pte_val(pte) & ~_PTE_NONE_MASK) == 0) @@ -730,10 +718,6 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, #define pte_unmap(pte) kunmap_atomic(pte, KM_PTE0) #define pte_unmap_nested(pte) kunmap_atomic(pte, KM_PTE1) -extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; - -extern void paging_init(void); - /* * Encode and decode a swap entry. * Note that the bits we use in a PTE for representing a swap entry @@ -751,12 +735,6 @@ extern void paging_init(void); #define pte_to_pgoff(pte) (pte_val(pte) >> 3) #define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE }) -/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */ -#define kern_addr_valid(addr) (1) - -#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ - remap_pfn_range(vma, vaddr, pfn, size, prot) - /* * No page table caches to initialise */ diff --git a/include/asm-powerpc/pgtable-ppc64.h b/include/asm-powerpc/pgtable-ppc64.h index 9b0f51ccad..d61178dea6 100644 --- a/include/asm-powerpc/pgtable-ppc64.h +++ b/include/asm-powerpc/pgtable-ppc64.h @@ -7,11 +7,7 @@ #ifndef __ASSEMBLY__ #include -#include /* For TASK_SIZE */ -#include -#include #include -struct mm_struct; #endif /* __ASSEMBLY__ */ #ifdef CONFIG_PPC_64K_PAGES @@ -143,16 +139,6 @@ struct mm_struct; #define __S110 PAGE_SHARED_X #define __S111 PAGE_SHARED_X -#ifndef __ASSEMBLY__ - -/* - * ZERO_PAGE is a global shared page that is always zero: used - * for zero-mapped memory areas etc.. - */ -extern unsigned long empty_zero_page[PAGE_SIZE/sizeof(unsigned long)]; -#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) -#endif /* __ASSEMBLY__ */ - #ifdef CONFIG_HUGETLB_PAGE #define HAVE_ARCH_UNMAPPED_AREA @@ -447,10 +433,6 @@ extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, #define pgd_ERROR(e) \ printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) -extern pgd_t swapper_pg_dir[]; - -extern void paging_init(void); - /* Encode and de-code a swap entry */ #define __swp_type(entry) (((entry).val >> 1) & 0x3f) #define __swp_offset(entry) ((entry).val >> 8) @@ -461,17 +443,6 @@ extern void paging_init(void); #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE}) #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT) -/* - * kern_addr_valid is intended to indicate whether an address is a valid - * kernel address. Most 32-bit archs define it as always true (like this) - * but most 64-bit archs actually perform a test. What should we do here? - * The only use is in fs/ncpfs/dir.c - */ -#define kern_addr_valid(addr) (1) - -#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ - remap_pfn_range(vma, vaddr, pfn, size, prot) - void pgtable_cache_init(void); /* diff --git a/include/asm-powerpc/pgtable.h b/include/asm-powerpc/pgtable.h index 78bf4ae712..d18ffe7bc7 100644 --- a/include/asm-powerpc/pgtable.h +++ b/include/asm-powerpc/pgtable.h @@ -2,6 +2,13 @@ #define _ASM_POWERPC_PGTABLE_H #ifdef __KERNEL__ +#ifndef __ASSEMBLY__ +#include /* For TASK_SIZE */ +#include +#include +struct mm_struct; +#endif /* !__ASSEMBLY__ */ + #if defined(CONFIG_PPC64) # include #else @@ -9,6 +16,27 @@ #endif #ifndef __ASSEMBLY__ +/* + * ZERO_PAGE is a global shared page that is always zero: used + * for zero-mapped memory areas etc.. + */ +extern unsigned long empty_zero_page[]; +#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page)) + +extern pgd_t swapper_pg_dir[]; + +extern void paging_init(void); + +/* + * kern_addr_valid is intended to indicate whether an address is a valid + * kernel address. Most 32-bit archs define it as always true (like this) + * but most 64-bit archs actually perform a test. What should we do here? + */ +#define kern_addr_valid(addr) (1) + +#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ + remap_pfn_range(vma, vaddr, pfn, size, prot) + #include #endif /* __ASSEMBLY__ */ -- cgit v1.2.2 From 8e561e7eda02819c711a75b64a000bf34948cdbb Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 13 Jun 2007 14:52:56 +1000 Subject: [POWERPC] Kill typedef-ed structs for hash PTEs and BATs Using typedefs to rename structure types if frowned on by CodingStyle. However, we do so for the hash PTE structure on both ppc32 (where it's called "PTE") and ppc64 (where it's called "hpte_t"). On ppc32 we also have such a typedef for the BATs ("BAT"). This removes this unhelpful use of typedefs, in the process bringing ppc32 and ppc64 closer together, by using the name "struct hash_pte" in both cases. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- include/asm-powerpc/mmu-hash32.h | 8 ++++---- include/asm-powerpc/mmu-hash64.h | 6 +++--- 2 files changed, 7 insertions(+), 7 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/mmu-hash32.h b/include/asm-powerpc/mmu-hash32.h index 2d3e183cfe..4bd735be38 100644 --- a/include/asm-powerpc/mmu-hash32.h +++ b/include/asm-powerpc/mmu-hash32.h @@ -28,7 +28,7 @@ #define BPP_RW 0x02 /* Read/write */ #ifndef __ASSEMBLY__ -typedef struct _BAT { +struct ppc_bat { struct { unsigned long bepi:15; /* Effective page index (virtual address) */ unsigned long :4; /* Unused */ @@ -46,7 +46,7 @@ typedef struct _BAT { unsigned long :1; /* Unused */ unsigned long pp:2; /* Page access protections */ } batl; /* Lower register */ -} BAT; +}; #endif /* !__ASSEMBLY__ */ /* @@ -62,7 +62,7 @@ typedef struct _BAT { #ifndef __ASSEMBLY__ /* Hardware Page Table Entry */ -typedef struct _PTE { +struct hash_pte { unsigned long v:1; /* Entry is valid */ unsigned long vsid:24; /* Virtual segment identifier */ unsigned long h:1; /* Hash algorithm indicator */ @@ -77,7 +77,7 @@ typedef struct _PTE { unsigned long g:1; /* Guarded */ unsigned long :1; /* Unused */ unsigned long pp:2; /* Page protection */ -} PTE; +}; typedef struct { unsigned long id; diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h index b8dca30bd0..ba32019c51 100644 --- a/include/asm-powerpc/mmu-hash64.h +++ b/include/asm-powerpc/mmu-hash64.h @@ -103,12 +103,12 @@ extern char initial_stab[]; #ifndef __ASSEMBLY__ -typedef struct { +struct hash_pte { unsigned long v; unsigned long r; -} hpte_t; +}; -extern hpte_t *htab_address; +extern struct hash_pte *htab_address; extern unsigned long htab_size_bytes; extern unsigned long htab_hash_mask; -- cgit v1.2.2 From 4508dc21feb189159d4cc1d5b79c5a55fad5f2ed Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 13 Jun 2007 14:52:57 +1000 Subject: [POWERPC] Merge CPU features pertaining to icache coherency Currently the powerpc kernel has a 64-bit only feature, COHERENT_ICACHE used for those CPUS which maintain icache/dcache coherency in hardware (POWER5, essentially). It also has a feature, SPLIT_ID_CACHE, which is used on CPUs which have separate i and d-caches, which is to say everything except 601 and Freescale E200. In nearly all the places we check the SPLIT_ID_CACHE, what we actually care about is whether the i and d-caches are coherent (which they will be, trivially, if they're the same cache). This tries to clarify the situation a little. The COHERENT_ICACHE feature becomes availble on 32-bit and is set for all CPUs where i and d-cache are effectively coherent, whether this is due to special logic (POWER5) or because they're unified. We check this, instead of SPLIT_ID_CACHE nearly everywhere. The SPLIT_ID_CACHE feature itself is replaced by a UNIFIED_ID_CACHE feature with reversed sense, set only on 601 and Freescale E200. In the two places (one Freescale BookE specific) where we really care whether it's a unified cache, not whether they're coherent, we check this feature. The CPUs with unified cache are so few, we could consider replacing this feature bit with explicit checks against the PVR. This will make unifying the 32-bit and 64-bit cache flush code a little more straightforward. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- include/asm-powerpc/cputable.h | 95 +++++++++++++++++++++--------------------- 1 file changed, 47 insertions(+), 48 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 82d595a521..c8f0aa2286 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -111,7 +111,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, /* CPU kernel features */ /* Retain the 32b definitions all use bottom half of word */ -#define CPU_FTR_SPLIT_ID_CACHE ASM_CONST(0x0000000000000001) +#define CPU_FTR_COHERENT_ICACHE ASM_CONST(0x0000000000000001) #define CPU_FTR_L2CR ASM_CONST(0x0000000000000002) #define CPU_FTR_SPEC7450 ASM_CONST(0x0000000000000004) #define CPU_FTR_ALTIVEC ASM_CONST(0x0000000000000008) @@ -135,6 +135,7 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, #define CPU_FTR_PPC_LE ASM_CONST(0x0000000000200000) #define CPU_FTR_REAL_LE ASM_CONST(0x0000000000400000) #define CPU_FTR_FPU_UNAVAILABLE ASM_CONST(0x0000000000800000) +#define CPU_FTR_UNIFIED_ID_CACHE ASM_CONST(0x0000000001000000) /* * Add the 64-bit processor unique features in the top half of the word; @@ -154,7 +155,6 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, #define CPU_FTR_MMCRA LONG_ASM_CONST(0x0000004000000000) #define CPU_FTR_CTRL LONG_ASM_CONST(0x0000008000000000) #define CPU_FTR_SMT LONG_ASM_CONST(0x0000010000000000) -#define CPU_FTR_COHERENT_ICACHE LONG_ASM_CONST(0x0000020000000000) #define CPU_FTR_LOCKLESS_TLBIE LONG_ASM_CONST(0x0000040000000000) #define CPU_FTR_CI_LARGE_PAGE LONG_ASM_CONST(0x0000100000000000) #define CPU_FTR_PAUSE_ZERO LONG_ASM_CONST(0x0000200000000000) @@ -206,164 +206,163 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \ !defined(CONFIG_BOOKE)) -#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE) -#define CPU_FTRS_603 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_PPC601 (CPU_FTR_COMMON | CPU_FTR_601 | CPU_FTR_HPTE_TABLE | \ + CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE) +#define CPU_FTRS_603 (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) -#define CPU_FTRS_604 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_604 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE | \ CPU_FTR_PPC_LE) -#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_740_NOTAU (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) -#define CPU_FTRS_740 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_740 (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_PPC_LE) -#define CPU_FTRS_750 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_750 (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_PPC_LE) -#define CPU_FTRS_750CL (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_750CL (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) -#define CPU_FTRS_750FX1 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_750FX1 (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM | CPU_FTR_PPC_LE) -#define CPU_FTRS_750FX2 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_750FX2 (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_NO_DPM | CPU_FTR_PPC_LE) -#define CPU_FTRS_750FX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_750FX (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) -#define CPU_FTRS_750GX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_750GX (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) -#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) -#define CPU_FTRS_7400 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7400 (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_PPC_LE) -#define CPU_FTRS_7450_20 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7450_20 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7450_21 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7450_21 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \ CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7450_23 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7450_23 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7455_1 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7455_1 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR | \ CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7455_20 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7455_20 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP | \ CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) -#define CPU_FTRS_7455 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7455 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7447_10 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7447_10 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC | CPU_FTR_PPC_LE) -#define CPU_FTRS_7447 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7447 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_L3CR | CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7447A (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7447A (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) -#define CPU_FTRS_7448 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_7448 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | \ CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_PPC_LE) -#define CPU_FTRS_82XX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_82XX (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB) -#define CPU_FTRS_G2_LE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ +#define CPU_FTRS_G2_LE (CPU_FTR_MAYBE_CAN_DOZE | \ CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS) -#define CPU_FTRS_E300 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ +#define CPU_FTRS_E300 (CPU_FTR_MAYBE_CAN_DOZE | \ CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_COMMON) -#define CPU_FTRS_E300C2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ +#define CPU_FTRS_E300C2 (CPU_FTR_MAYBE_CAN_DOZE | \ CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_COMMON | CPU_FTR_FPU_UNAVAILABLE) -#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ +#define CPU_FTRS_CLASSIC32 (CPU_FTR_COMMON | \ CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE) -#define CPU_FTRS_8XX (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB) -#define CPU_FTRS_40X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ - CPU_FTR_NODSISRALIGN) -#define CPU_FTRS_44X (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ - CPU_FTR_NODSISRALIGN) -#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN) -#define CPU_FTRS_E500 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ - CPU_FTR_NODSISRALIGN) -#define CPU_FTRS_E500_2 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_8XX (CPU_FTR_USE_TB) +#define CPU_FTRS_40X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN) +#define CPU_FTRS_44X (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN) +#define CPU_FTRS_E200 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \ + CPU_FTR_COHERENT_ICACHE | CPU_FTR_UNIFIED_ID_CACHE) +#define CPU_FTRS_E500 (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN) +#define CPU_FTRS_E500_2 (CPU_FTR_USE_TB | \ CPU_FTR_BIG_PHYS | CPU_FTR_NODSISRALIGN) #define CPU_FTRS_GENERIC_32 (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN) /* 64-bit CPUs */ -#define CPU_FTRS_POWER3 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_POWER3 (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | CPU_FTR_PPC_LE) -#define CPU_FTRS_RS64 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_RS64 (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_IABR | \ CPU_FTR_MMCRA | CPU_FTR_CTRL) -#define CPU_FTRS_POWER4 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ CPU_FTR_MMCRA) -#define CPU_FTRS_PPC970 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA) -#define CPU_FTRS_POWER5 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ CPU_FTR_MMCRA | CPU_FTR_SMT | \ CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ CPU_FTR_PURR) -#define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ CPU_FTR_MMCRA | CPU_FTR_SMT | \ CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \ CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \ CPU_FTR_DSCR) -#define CPU_FTRS_CELL (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_CELL (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \ CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \ CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | CPU_FTR_CELL_TB_BUG) -#define CPU_FTRS_PA6T (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_PA6T (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \ CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \ CPU_FTR_PURR | CPU_FTR_REAL_LE) -#define CPU_FTRS_COMPATIBLE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \ +#define CPU_FTRS_COMPATIBLE (CPU_FTR_USE_TB | \ CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2) #ifdef __powerpc64__ -- cgit v1.2.2 From d619500aed2f9b841b2310bc94f8056ae9ca2a73 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 15 Jun 2007 10:41:54 +0900 Subject: sh: rework intc2 code The shared intc2 code currently contains cpu-specific #ifdefs. This is a tad unclean and it prevents us from using the shared code to drive board-specific irqs on the se7780 board. This patch reworks the intc2 code by moving the base addresses of the intc2 registers into struct intc2_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. One logic change has been made - the original shared intc2 code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/hw_irq.h | 19 +++++++++++++++++++ include/asm-sh/irq.h | 10 ---------- 2 files changed, 19 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index 80ee1cda74..f9dfdc04ae 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h @@ -5,4 +5,23 @@ extern atomic_t irq_err_count; +struct intc2_data { + unsigned short irq; + unsigned char ipr_offset, ipr_shift; + unsigned char msk_offset, msk_shift; + unsigned char priority; +}; + +struct intc2_desc { + unsigned long prio_base; + unsigned long msk_base; + unsigned long mskclr_base; + struct intc2_data *intc2_data; + unsigned int nr_irqs; + struct irq_chip chip; +}; + +void register_intc2_controller(struct intc2_desc *); +void init_IRQ_intc2(void); + #endif /* __ASM_SH_HW_IRQ_H */ diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index e81bf21c80..c247b733a7 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -63,16 +63,6 @@ void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs); void make_imask_irq(unsigned int irq); void init_IRQ_ipr(void); -struct intc2_data { - unsigned short irq; - unsigned char ipr_offset, ipr_shift; - unsigned char msk_offset, msk_shift; - unsigned char priority; -}; - -void make_intc2_irq(struct intc2_data *, unsigned int nr_irqs); -void init_IRQ_intc2(void); - static inline int generic_irq_demux(int irq) { return irq; -- cgit v1.2.2 From 68abdbbb03476a60d932eeba0035dd5069afec38 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Fri, 15 Jun 2007 18:56:19 +0900 Subject: sh: rework ipr code This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm Signed-off-by: Paul Mundt --- include/asm-sh/hw_irq.h | 23 +++++++++++++++++++++++ include/asm-sh/irq.h | 30 ------------------------------ include/asm-sh/sh03/io.h | 4 ---- include/asm-sh/snapgear.h | 4 ---- 4 files changed, 23 insertions(+), 38 deletions(-) (limited to 'include') diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h index f9dfdc04ae..4ca3f765ba 100644 --- a/include/asm-sh/hw_irq.h +++ b/include/asm-sh/hw_irq.h @@ -24,4 +24,27 @@ struct intc2_desc { void register_intc2_controller(struct intc2_desc *); void init_IRQ_intc2(void); +struct ipr_data { + unsigned char irq; + unsigned char ipr_idx; /* Index for the IPR registered */ + unsigned char shift; /* Number of bits to shift the data */ + unsigned char priority; /* The priority */ +}; + +struct ipr_desc { + unsigned long *ipr_offsets; + unsigned int nr_offsets; + struct ipr_data *ipr_data; + unsigned int nr_irqs; + struct irq_chip chip; +}; + +void register_ipr_controller(struct ipr_desc *); +void init_IRQ_ipr(void); + +/* + * Enable individual interrupt mode for external IPR IRQs. + */ +void ipr_irq_enable_irlm(void); + #endif /* __ASM_SH_HW_IRQ_H */ diff --git a/include/asm-sh/irq.h b/include/asm-sh/irq.h index c247b733a7..c61d902b8b 100644 --- a/include/asm-sh/irq.h +++ b/include/asm-sh/irq.h @@ -31,37 +31,7 @@ extern unsigned short *irq_mask_register; * PINT IRQs */ void init_IRQ_pint(void); - -/* - * The shift value is now the number of bits to shift, not the number of - * bits/4. This is to make it easier to read the value directly from the - * datasheets. The IPR address, addr, will be set from ipr_idx via the - * map_ipridx_to_addr function. - */ -struct ipr_data { - unsigned int irq; - int ipr_idx; /* Index for the IPR registered */ - int shift; /* Number of bits to shift the data */ - int priority; /* The priority */ - unsigned int addr; /* Address of Interrupt Priority Register */ -}; - -/* - * Given an IPR IDX, map the value to an IPR register address. - */ -unsigned int map_ipridx_to_addr(int idx); - -/* - * Enable individual interrupt mode for external IPR IRQs. - */ -void ipr_irq_enable_irlm(void); - -/* - * Function for "on chip support modules". - */ -void make_ipr_irq(struct ipr_data *table, unsigned int nr_irqs); void make_imask_irq(unsigned int irq); -void init_IRQ_ipr(void); static inline int generic_irq_demux(int irq) { diff --git a/include/asm-sh/sh03/io.h b/include/asm-sh/sh03/io.h index df3b187ef8..4ff1eb9003 100644 --- a/include/asm-sh/sh03/io.h +++ b/include/asm-sh/sh03/io.h @@ -14,22 +14,18 @@ #define INTC_IPRD 0xffd00010UL #define IRL0_IRQ 2 -#define IRL0_IPR_ADDR INTC_IPRD #define IRL0_IPR_POS 3 #define IRL0_PRIORITY 13 #define IRL1_IRQ 5 -#define IRL1_IPR_ADDR INTC_IPRD #define IRL1_IPR_POS 2 #define IRL1_PRIORITY 10 #define IRL2_IRQ 8 -#define IRL2_IPR_ADDR INTC_IPRD #define IRL2_IPR_POS 1 #define IRL2_PRIORITY 7 #define IRL3_IRQ 11 -#define IRL3_IPR_ADDR INTC_IPRD #define IRL3_IPR_POS 0 #define IRL3_PRIORITY 4 diff --git a/include/asm-sh/snapgear.h b/include/asm-sh/snapgear.h index 2d712e72c9..3554e3a74e 100644 --- a/include/asm-sh/snapgear.h +++ b/include/asm-sh/snapgear.h @@ -20,22 +20,18 @@ */ #define IRL0_IRQ 2 -#define IRL0_IPR_ADDR INTC_IPRD #define IRL0_IPR_POS 3 #define IRL0_PRIORITY 13 #define IRL1_IRQ 5 -#define IRL1_IPR_ADDR INTC_IPRD #define IRL1_IPR_POS 2 #define IRL1_PRIORITY 10 #define IRL2_IRQ 8 -#define IRL2_IPR_ADDR INTC_IPRD #define IRL2_IPR_POS 1 #define IRL2_PRIORITY 7 #define IRL3_IRQ 11 -#define IRL3_IPR_ADDR INTC_IPRD #define IRL3_IPR_POS 0 #define IRL3_PRIORITY 4 #endif -- cgit v1.2.2 From fc1d4c9c3761ca8db52b647c6a4ba50771900a12 Mon Sep 17 00:00:00 2001 From: Kaz Kojima Date: Mon, 18 Jun 2007 13:58:32 +0900 Subject: sh: Fix up futex implementation. SH is able to support a complete futex implementation on UP by way of gUSA. However, IRQ toggling must be done for the old CPUs that don't have movli.l/movco.l (LL/SC) instructions. Provide a default implementation that does this, so it's possible to optimize for newer CPUs. Follows the same scheme as the current asm-sh/atomic-*.h headers. Signed-off-by: Kaz Kojima Signed-off-by: Paul Mundt --- include/asm-sh/futex-irq.h | 111 +++++++++++++++++++++++++++++++++++++++++++++ include/asm-sh/futex.h | 79 ++++++++++++++++++++++++++++++-- 2 files changed, 186 insertions(+), 4 deletions(-) create mode 100644 include/asm-sh/futex-irq.h (limited to 'include') diff --git a/include/asm-sh/futex-irq.h b/include/asm-sh/futex-irq.h new file mode 100644 index 0000000000..a9f16a7f9a --- /dev/null +++ b/include/asm-sh/futex-irq.h @@ -0,0 +1,111 @@ +#ifndef __ASM_SH_FUTEX_IRQ_H +#define __ASM_SH_FUTEX_IRQ_H + +#include + +static inline int atomic_futex_op_xchg_set(int oparg, int __user *uaddr, + int *oldval) +{ + unsigned long flags; + int ret; + + local_irq_save(flags); + + ret = get_user(*oldval, uaddr); + if (!ret) + ret = put_user(oparg, uaddr); + + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_futex_op_xchg_add(int oparg, int __user *uaddr, + int *oldval) +{ + unsigned long flags; + int ret; + + local_irq_save(flags); + + ret = get_user(*oldval, uaddr); + if (!ret) + ret = put_user(*oldval + oparg, uaddr); + + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_futex_op_xchg_or(int oparg, int __user *uaddr, + int *oldval) +{ + unsigned long flags; + int ret; + + local_irq_save(flags); + + ret = get_user(*oldval, uaddr); + if (!ret) + ret = put_user(*oldval | oparg, uaddr); + + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_futex_op_xchg_and(int oparg, int __user *uaddr, + int *oldval) +{ + unsigned long flags; + int ret; + + local_irq_save(flags); + + ret = get_user(*oldval, uaddr); + if (!ret) + ret = put_user(*oldval & oparg, uaddr); + + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_futex_op_xchg_xor(int oparg, int __user *uaddr, + int *oldval) +{ + unsigned long flags; + int ret; + + local_irq_save(flags); + + ret = get_user(*oldval, uaddr); + if (!ret) + ret = put_user(*oldval ^ oparg, uaddr); + + local_irq_restore(flags); + + return ret; +} + +static inline int atomic_futex_op_cmpxchg_inatomic(int __user *uaddr, + int oldval, int newval) +{ + unsigned long flags; + int ret, prev = 0; + + local_irq_save(flags); + + ret = get_user(prev, uaddr); + if (!ret && oldval == prev) + ret = put_user(newval, uaddr); + + local_irq_restore(flags); + + if (ret) + return ret; + + return prev; +} + +#endif /* __ASM_SH_FUTEX_IRQ_H */ diff --git a/include/asm-sh/futex.h b/include/asm-sh/futex.h index 6a332a9f09..74ed3681d3 100644 --- a/include/asm-sh/futex.h +++ b/include/asm-sh/futex.h @@ -1,6 +1,77 @@ -#ifndef _ASM_FUTEX_H -#define _ASM_FUTEX_H +#ifndef __ASM_SH_FUTEX_H +#define __ASM_SH_FUTEX_H -#include +#ifdef __KERNEL__ -#endif +#include +#include +#include + +/* XXX: UP variants, fix for SH-4A and SMP.. */ +#include + +static inline int futex_atomic_op_inuser(int encoded_op, int __user *uaddr) +{ + int op = (encoded_op >> 28) & 7; + int cmp = (encoded_op >> 24) & 15; + int oparg = (encoded_op << 8) >> 20; + int cmparg = (encoded_op << 20) >> 20; + int oldval = 0, ret; + + if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28)) + oparg = 1 << oparg; + + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + return -EFAULT; + + pagefault_disable(); + + switch (op) { + case FUTEX_OP_SET: + ret = atomic_futex_op_xchg_set(oparg, uaddr, &oldval); + break; + case FUTEX_OP_ADD: + ret = atomic_futex_op_xchg_add(oparg, uaddr, &oldval); + break; + case FUTEX_OP_OR: + ret = atomic_futex_op_xchg_or(oparg, uaddr, &oldval); + break; + case FUTEX_OP_ANDN: + ret = atomic_futex_op_xchg_and(~oparg, uaddr, &oldval); + break; + case FUTEX_OP_XOR: + ret = atomic_futex_op_xchg_xor(oparg, uaddr, &oldval); + break; + default: + ret = -ENOSYS; + break; + } + + pagefault_enable(); + + if (!ret) { + switch (cmp) { + case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break; + case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break; + case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break; + case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break; + case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break; + case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break; + default: ret = -ENOSYS; + } + } + + return ret; +} + +static inline int +futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) +{ + if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int))) + return -EFAULT; + + return atomic_futex_op_cmpxchg_inatomic(uaddr, oldval, newval); +} + +#endif /* __KERNEL__ */ +#endif /* __ASM_SH_FUTEX_H */ -- cgit v1.2.2 From 462b7859a07c9c2b060fa2b5b1d49f8b33706d4e Mon Sep 17 00:00:00 2001 From: Christof Schmitt Date: Tue, 19 Jun 2007 10:25:30 +0200 Subject: [SCSI] zfcp: Report FCP LUN to SCSI midlayer When reporting SCSI devices to the SCSI midlayer, use the FCP LUN as LUN reported to the SCSI layer. With this approach, zfcp does not have to create unique LUNS, and this code can be removed. Signed-off-by: Christof Schmitt Signed-off-by: Swen Schillig Signed-off-by: James Bottomley --- include/scsi/scsi_device.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/scsi/scsi_device.h b/include/scsi/scsi_device.h index 2f3c5b8b1d..6fe1cf672d 100644 --- a/include/scsi/scsi_device.h +++ b/include/scsi/scsi_device.h @@ -287,6 +287,7 @@ extern void scsi_target_block(struct device *); extern void scsi_target_unblock(struct device *); extern void scsi_remove_target(struct device *); extern void int_to_scsilun(unsigned int, struct scsi_lun *); +extern int scsilun_to_int(struct scsi_lun *); extern const char *scsi_device_state_name(enum scsi_device_state); extern int scsi_is_sdev_device(const struct device *); extern int scsi_is_target_device(const struct device *); -- cgit v1.2.2 From 027e56e68543780870fda74360ca45e392c50e1c Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 20 Jun 2007 18:23:49 +0900 Subject: sh: Hook up hard_smp_processor_id() for INTC2 block. We need to know the CPU ID in order to calculate the mask and ack registers effectively. Stub this in for UP. Signed-off-by: Paul Mundt --- include/asm-sh/smp.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-sh/smp.h b/include/asm-sh/smp.h index caa7b93f1b..b99ca786c0 100644 --- a/include/asm-sh/smp.h +++ b/include/asm-sh/smp.h @@ -39,4 +39,6 @@ extern struct smp_fn_call_struct smp_fn_call; #endif /* CONFIG_SMP */ +#define hard_smp_processor_id() (0) + #endif /* __ASM_SH_SMP_H */ -- cgit v1.2.2 From 2b1bd1ac5d4bffe3fd542bfe1784a583bd7df4fa Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Wed, 20 Jun 2007 18:27:10 +0900 Subject: sh: Preliminary support for the SH-X3 CPU. This adds basic support for UP SH-X3. Signed-off-by: Paul Mundt --- include/asm-sh/bugs.h | 2 +- include/asm-sh/cpu-sh4/freq.h | 2 ++ include/asm-sh/cpu-sh4/timer.h | 57 ++++++++++++++++++++++++------------------ include/asm-sh/processor.h | 2 +- 4 files changed, 37 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h index efc8fd3e1f..aeee8da9c5 100644 --- a/include/asm-sh/bugs.h +++ b/include/asm-sh/bugs.h @@ -35,7 +35,7 @@ static void __init check_bugs(void) case CPU_SH7750 ... CPU_SH4_501: *p++ = '4'; break; - case CPU_SH7770 ... CPU_SH7785: + case CPU_SH7770 ... CPU_SHX3: *p++ = '4'; *p++ = 'a'; break; diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h index 39f41fcd50..026025b51c 100644 --- a/include/asm-sh/cpu-sh4/freq.h +++ b/include/asm-sh/cpu-sh4/freq.h @@ -22,6 +22,8 @@ #define FRQCR0 0xffc80000 #define FRQCR1 0xffc80004 #define FRQMR1 0xffc80014 +#elif defined(CONFIG_CPU_SUBTYPE_SHX3) +#define FRQCR 0xffc00014 #else #define FRQCR 0xffc00000 #define FRQCR_PSTBY 0x0200 diff --git a/include/asm-sh/cpu-sh4/timer.h b/include/asm-sh/cpu-sh4/timer.h index 8a4af126c8..d1e796b968 100644 --- a/include/asm-sh/cpu-sh4/timer.h +++ b/include/asm-sh/cpu-sh4/timer.h @@ -1,7 +1,7 @@ /* * include/asm-sh/cpu-sh4/timer.h * - * Copyright (C) 2004 Lineo Solutions, Inc. + * Copyright (C) 2004 Lineo Solutions, Inc. * * This file is subject to the terms and conditions of the GNU General Public * License. See the file "COPYING" in the main directory of this archive @@ -16,36 +16,45 @@ * SH7750S/SH7750R * SH7751/SH7751R * SH7760 + * SH-X3 * --------------------------------------------------------------------------- */ - -#if !defined(CONFIG_CPU_SUBTYPE_SH7760) -#define TMU_TOCR 0xffd80000 /* Byte access */ +#ifdef CONFIG_CPU_SUBTYPE_SHX3 +#define TMU_012_BASE 0xffc10000 +#define TMU_345_BASE 0xffc20000 +#else +#define TMU_012_BASE 0xffd80000 +#define TMU_345_BASE 0xfe100000 #endif -#define TMU_TSTR 0xffd80004 /* Byte access */ -#define TMU0_TCOR 0xffd80008 /* Long access */ -#define TMU0_TCNT 0xffd8000c /* Long access */ -#define TMU0_TCR 0xffd80010 /* Word access */ +#define TMU_TOCR TMU_012_BASE /* Not supported on all CPUs */ -#define TMU1_TCOR 0xffd80014 /* Long access */ -#define TMU1_TCNT 0xffd80018 /* Long access */ -#define TMU1_TCR 0xffd8001c /* Word access */ +#define TMU_012_TSTR (TMU_012_BASE + 0x04) +#define TMU_345_TSTR (TMU_345_BASE + 0x04) -#define TMU2_TCOR 0xffd80020 /* Long access */ -#define TMU2_TCNT 0xffd80024 /* Long access */ -#define TMU2_TCR 0xffd80028 /* Word access */ -#define TMU2_TCPR 0xffd8002c /* Long access */ +#define TMU0_TCOR (TMU_012_BASE + 0x08) +#define TMU0_TCNT (TMU_012_BASE + 0x0c) +#define TMU0_TCR (TMU_012_BASE + 0x10) -#if !defined(CONFIG_CPU_SUBTYPE_SH7760) -#define TMU3_TCOR 0xfe100008 /* Long access */ -#define TMU3_TCNT 0xfe10000c /* Long access */ -#define TMU3_TCR 0xfe100010 /* Word access */ +#define TMU1_TCOR (TMU_012_BASE + 0x14) +#define TMU1_TCNT (TMU_012_BASE + 0x18) +#define TMU1_TCR (TMU_012_BASE + 0x1c) -#define TMU4_TCOR 0xfe100014 /* Long access */ -#define TMU4_TCNT 0xfe100018 /* Long access */ -#define TMU4_TCR 0xfe10001c /* Word access */ -#endif +#define TMU2_TCOR (TMU_012_BASE + 0x20) +#define TMU2_TCNT (TMU_012_BASE + 0x24) +#define TMU2_TCR (TMU_012_BASE + 0x28) +#define TMU2_TCPR (TMU_012_BASE + 0x2c) -#endif /* __ASM_CPU_SH4_TIMER_H */ +#define TMU3_TCOR (TMU_345_BASE + 0x08) +#define TMU3_TCNT (TMU_345_BASE + 0x0c) +#define TMU3_TCR (TMU_345_BASE + 0x10) +#define TMU4_TCOR (TMU_345_BASE + 0x14) +#define TMU4_TCNT (TMU_345_BASE + 0x18) +#define TMU4_TCR (TMU_345_BASE + 0x1c) + +#define TMU5_TCOR (TMU_345_BASE + 0x20) +#define TMU5_TCNT (TMU_345_BASE + 0x24) +#define TMU5_TCR (TMU_345_BASE + 0x28) + +#endif /* __ASM_CPU_SH4_TIMER_H */ diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h index 1a20db0961..2252e75daa 100644 --- a/include/asm-sh/processor.h +++ b/include/asm-sh/processor.h @@ -52,7 +52,7 @@ enum cpu_type { CPU_SH7760, CPU_ST40RA, CPU_ST40GX1, CPU_SH4_202, CPU_SH4_501, /* SH-4A types */ - CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, + CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3, /* SH4AL-DSP types */ CPU_SH73180, CPU_SH7343, CPU_SH7722, -- cgit v1.2.2 From 088eec1192a0ae60fc218796027e622008af36c0 Mon Sep 17 00:00:00 2001 From: Roy Huang Date: Thu, 21 Jun 2007 11:34:16 +0800 Subject: Blackfin arch: Add header files for BF548 Signed-off-by: Roy Huang Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf548/anomaly.h | 72 +++++ include/asm-blackfin/mach-bf548/bf548.h | 284 ++++++++++++++++++++ include/asm-blackfin/mach-bf548/bfin_serial_5xx.h | 147 +++++++++++ include/asm-blackfin/mach-bf548/blackfin.h | 166 ++++++++++++ include/asm-blackfin/mach-bf548/dma.h | 63 +++++ include/asm-blackfin/mach-bf548/irq.h | 306 ++++++++++++++++++++++ include/asm-blackfin/mach-bf548/mem_init.h | 189 +++++++++++++ include/asm-blackfin/mach-bf548/mem_map.h | 97 +++++++ 8 files changed, 1324 insertions(+) create mode 100644 include/asm-blackfin/mach-bf548/anomaly.h create mode 100644 include/asm-blackfin/mach-bf548/bf548.h create mode 100644 include/asm-blackfin/mach-bf548/bfin_serial_5xx.h create mode 100644 include/asm-blackfin/mach-bf548/blackfin.h create mode 100644 include/asm-blackfin/mach-bf548/dma.h create mode 100644 include/asm-blackfin/mach-bf548/irq.h create mode 100644 include/asm-blackfin/mach-bf548/mem_init.h create mode 100644 include/asm-blackfin/mach-bf548/mem_map.h (limited to 'include') diff --git a/include/asm-blackfin/mach-bf548/anomaly.h b/include/asm-blackfin/mach-bf548/anomaly.h new file mode 100644 index 0000000000..ddc150e6fb --- /dev/null +++ b/include/asm-blackfin/mach-bf548/anomaly.h @@ -0,0 +1,72 @@ + +/* + * File: include/asm-blackfin/mach-bf548/anomaly.h + * Based on: + * Author: + * + * Created: + * Description: + * + * Rev: + * + * Modified: + * + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. + * If not, write to the Free Software Foundation, + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef _MACH_ANOMALY_H_ +#define _MACH_ANOMALY_H_ +#define ANOMALY_05000074 /* A multi issue instruction with dsp32shiftimm in + slot1 and store of a P register in slot 2 is not + supported */ +#define ANOMALY_05000119 /* DMA_RUN bit is not valid after a Peripheral Receive + Channel DMA stops */ +#define ANOMALY_05000122 /* Rx.H can not be used to access 16-bit System MMR + registers. */ +#define ANOMALY_05000245 /* Spurious Hardware Error from an Access in the + Shadow of a Conditional Branch */ +#define ANOMALY_05000255 /* Entering Hibernate Mode with RTC Seconds event + interrupt not functional */ +#define ANOMALY_05000265 /* Sensitivity to noise with slow input edge rates on + SPORT external receive and transmit clocks. */ +#define ANOMALY_05000272 /* Certain data cache write through modes fail for + VDDint <=0.9V */ +#define ANOMALY_05000310 /* False Hardware Errors Caused by Fetches at the + Boundary of Reserved Memory */ +#define ANOMALY_05000312 /* Errors When SSYNC, CSYNC, or Loads to LT, LB and + LC Registers Are Interrupted */ +#define ANOMALY_05000324 /* TWI Slave Boot Mode Is Not Functional */ +#define ANOMALY_05000325 /* External FIFO Boot Mode Is Not Functional */ +#define ANOMALY_05000327 /* Data Lost When Core and DMA Accesses Are Made to + the USB FIFO Simultaneously */ +#define ANOMALY_05000328 /* Incorrect Access of OTP_STATUS During otp_write() + function */ +#define ANOMALY_05000329 /* Synchronous Burst Flash Boot Mode Is Not Functional + */ +#define ANOMALY_05000330 /* Host DMA Boot Mode Is Not Functional */ +#define ANOMALY_05000334 /* Inadequate Timing Margins on DDR DQS to DQ and DQM + Skew */ +#define ANOMALY_05000335 /* Inadequate Rotary Debounce Logic Duration */ +#define ANOMALY_05000336 /* Phantom Interrupt Occurs After First Configuration + of Host DMA Port */ +#define ANOMALY_05000337 /* Disallowed Configuration Prevents Subsequent + Allowed Configuration on Host DMA Port */ +#define ANOMALY_05000338 /* Slave-Mode SPI0 MISO Failure With CPHA = 0 */ + +#endif /* _MACH_ANOMALY_H_ */ diff --git a/include/asm-blackfin/mach-bf548/bf548.h b/include/asm-blackfin/mach-bf548/bf548.h new file mode 100644 index 0000000000..0b21102044 --- /dev/null +++ b/include/asm-blackfin/mach-bf548/bf548.h @@ -0,0 +1,284 @@ +/* + * File: include/asm-blackfin/mach-bf548/bf548.h + * Based on: + * Author: + * + * Created: + * Description: System MMR register and memory map for ADSP-BF548 + * + * Modified: + * Copyright 2004-2007 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __MACH_BF548_H__ +#define __MACH_BF548_H__ + +/* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */ + +#define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */ +#define SPORT_ERR_MASK (ROVF | RUVF | TOVF | TUVF) /* SPORTx_STAT */ +#define PPI_ERR_MASK (0xFFFF & ~FLD) /* PPI_STATUS */ +#define UART_ERR_MASK_STAT1 (0x4) /* UARTx_IIR */ +#define UART_ERR_MASK_STAT0 (0x2) /* UARTx_IIR */ +#define CAN_ERR_MASK (EWTIF | EWRIF | EPIF | BOIF | WUIF | UIAIF | AAIF | \ + RMLIF | UCEIF | EXTIF | ADIF) /* CAN_GIF */ + +#define OFFSET_(x) ((x) & 0x0000FFFF) + +/*some misc defines*/ +#define IMASK_IVG15 0x8000 +#define IMASK_IVG14 0x4000 +#define IMASK_IVG13 0x2000 +#define IMASK_IVG12 0x1000 + +#define IMASK_IVG11 0x0800 +#define IMASK_IVG10 0x0400 +#define IMASK_IVG9 0x0200 +#define IMASK_IVG8 0x0100 + +#define IMASK_IVG7 0x0080 +#define IMASK_IVGTMR 0x0040 +#define IMASK_IVGHW 0x0020 + +/***************************/ + + +#define BLKFIN_DSUBBANKS 4 +#define BLKFIN_DWAYS 2 +#define BLKFIN_DLINES 64 +#define BLKFIN_ISUBBANKS 4 +#define BLKFIN_IWAYS 4 +#define BLKFIN_ILINES 32 + +#define WAY0_L 0x1 +#define WAY1_L 0x2 +#define WAY01_L 0x3 +#define WAY2_L 0x4 +#define WAY02_L 0x5 +#define WAY12_L 0x6 +#define WAY012_L 0x7 + +#define WAY3_L 0x8 +#define WAY03_L 0x9 +#define WAY13_L 0xA +#define WAY013_L 0xB + +#define WAY32_L 0xC +#define WAY320_L 0xD +#define WAY321_L 0xE +#define WAYALL_L 0xF + +#define DMC_ENABLE (2<<2) /*yes, 2, not 1 */ + +/********************************* EBIU Settings ************************************/ +#define AMBCTL0VAL ((CONFIG_BANK_1 << 16) | CONFIG_BANK_0) +#define AMBCTL1VAL ((CONFIG_BANK_3 << 16) | CONFIG_BANK_2) + +#ifdef CONFIG_C_AMBEN_ALL +#define V_AMBEN AMBEN_ALL +#endif +#ifdef CONFIG_C_AMBEN +#define V_AMBEN 0x0 +#endif +#ifdef CONFIG_C_AMBEN_B0 +#define V_AMBEN AMBEN_B0 +#endif +#ifdef CONFIG_C_AMBEN_B0_B1 +#define V_AMBEN AMBEN_B0_B1 +#endif +#ifdef CONFIG_C_AMBEN_B0_B1_B2 +#define V_AMBEN AMBEN_B0_B1_B2 +#endif +#ifdef CONFIG_C_AMCKEN +#define V_AMCKEN AMCKEN +#else +#define V_AMCKEN 0x0 +#endif +#ifdef CONFIG_C_CDPRIO +#define V_CDPRIO 0x100 +#else +#define V_CDPRIO 0x0 +#endif + +#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO) + +#define MAX_VC 650000000 +#define MIN_VC 50000000 + +/********************************PLL Settings **************************************/ +#ifdef CONFIG_BFIN_KERNEL_CLOCK +#if (CONFIG_VCO_MULT < 0) +#error "VCO Multiplier is less than 0. Please select a different value" +#endif + +#if (CONFIG_VCO_MULT == 0) +#error "VCO Multiplier should be greater than 0. Please select a different value" +#endif + +#if (CONFIG_VCO_MULT > 64) +#error "VCO Multiplier is more than 64. Please select a different value" +#endif + +#ifndef CONFIG_CLKIN_HALF +#define CONFIG_VCO_HZ (CONFIG_CLKIN_HZ * CONFIG_VCO_MULT) +#else +#define CONFIG_VCO_HZ ((CONFIG_CLKIN_HZ * CONFIG_VCO_MULT)/2) +#endif + +#ifndef CONFIG_PLL_BYPASS +#define CONFIG_CCLK_HZ (CONFIG_VCO_HZ/CONFIG_CCLK_DIV) +#define CONFIG_SCLK_HZ (CONFIG_VCO_HZ/CONFIG_SCLK_DIV) +#else +#define CONFIG_CCLK_HZ CONFIG_CLKIN_HZ +#define CONFIG_SCLK_HZ CONFIG_CLKIN_HZ +#endif + +#if (CONFIG_SCLK_DIV < 1) +#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value" +#endif + +#if (CONFIG_SCLK_DIV > 15) +#error "SCLK DIV cannot be less than 1 or more than 15. Please select a proper value" +#endif + +#if (CONFIG_CCLK_DIV != 1) +#if (CONFIG_CCLK_DIV != 2) +#if (CONFIG_CCLK_DIV != 4) +#if (CONFIG_CCLK_DIV != 8) +#error "CCLK DIV can be 1,2,4 or 8 only. Please select a proper value" +#endif +#endif +#endif +#endif + +#if (CONFIG_VCO_HZ > MAX_VC) +#error "VCO selected is more than maximum value. Please change the VCO multipler" +#endif + +#if (CONFIG_SCLK_HZ > 133000000) +#error "Sclk value selected is more than maximum. Please select a proper value for SCLK multiplier" +#endif + +#if (CONFIG_SCLK_HZ < 27000000) +#error "Sclk value selected is less than minimum. Please select a proper value for SCLK multiplier" +#endif + +#if (CONFIG_SCLK_HZ >= CONFIG_CCLK_HZ) +#if (CONFIG_SCLK_HZ != CONFIG_CLKIN_HZ) +#if (CONFIG_CCLK_HZ != CONFIG_CLKIN_HZ) +#error "Please select sclk less than cclk" +#endif +#endif +#endif + +#if (CONFIG_CCLK_DIV == 1) +#define CONFIG_CCLK_ACT_DIV CCLK_DIV1 +#endif +#if (CONFIG_CCLK_DIV == 2) +#define CONFIG_CCLK_ACT_DIV CCLK_DIV2 +#endif +#if (CONFIG_CCLK_DIV == 4) +#define CONFIG_CCLK_ACT_DIV CCLK_DIV4 +#endif +#if (CONFIG_CCLK_DIV == 8) +#define CONFIG_CCLK_ACT_DIV CCLK_DIV8 +#endif +#ifndef CONFIG_CCLK_ACT_DIV +#define CONFIG_CCLK_ACT_DIV CONFIG_CCLK_DIV_not_defined_properly +#endif + +#endif /* CONFIG_BFIN_KERNEL_CLOCK */ + +#ifdef CONFIG_BF542 +#define CPU "BF542" +#define CPUID 0x027c8000 +#endif +#ifdef CONFIG_BF544 +#define CPU "BF544" +#define CPUID 0x027c8000 +#endif +#ifdef CONFIG_BF548 +#define CPU "BF548" +#define CPUID 0x027c6000 +#endif +#ifdef CONFIG_BF549 +#define CPU "BF549" +#endif +#ifndef CPU +#define CPU "UNKNOWN" +#define CPUID 0x0 +#endif + +#if (CONFIG_MEM_SIZE % 4) +#error "SDRAM mem size must be multible of 4MB" +#endif + +#define SDRAM_IGENERIC (CPLB_L1_CHBL | CPLB_USER_RD | CPLB_VALID | CPLB_PORTPRIO) +#define SDRAM_IKERNEL (SDRAM_IGENERIC | CPLB_LOCK) +#define L1_IMEMORY ( CPLB_USER_RD | CPLB_VALID | CPLB_LOCK) +#define SDRAM_INON_CHBL ( CPLB_USER_RD | CPLB_VALID) + +/*Use the menuconfig cache policy here - CONFIG_BLKFIN_WT/CONFIG_BLKFIN_WB*/ + +#define ANOMALY_05000158_WORKAROUND 0x200 +#ifdef CONFIG_BLKFIN_WB /*Write Back Policy */ +#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_DIRTY \ + | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND) +#else /*Write Through */ +#define SDRAM_DGENERIC (CPLB_L1_CHBL | CPLB_WT | CPLB_L1_AOW \ + | CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY ) +#endif + + +#define L1_DMEMORY (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY ) +#define SDRAM_DNON_CHBL (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY ) +#define SDRAM_EBIU (CPLB_SUPV_WR | CPLB_USER_WR | CPLB_USER_RD | CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_DIRTY ) +#define SDRAM_OOPS (CPLB_VALID | ANOMALY_05000158_WORKAROUND | CPLB_LOCK | CPLB_DIRTY ) + +#define SIZE_1K 0x00000400 /* 1K */ +#define SIZE_4K 0x00001000 /* 4K */ +#define SIZE_1M 0x00100000 /* 1M */ +#define SIZE_4M 0x00400000 /* 4M */ + +#define MAX_CPLBS (16 * 2) + +/* +* Number of required data CPLB switchtable entries +* MEMSIZE / 4 (we mostly install 4M page size CPLBs +* approx 16 for smaller 1MB page size CPLBs for allignment purposes +* 1 for L1 Data Memory +* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO +* 1 for ASYNC Memory +*/ + + +#define MAX_SWITCH_D_CPLBS (((CONFIG_MEM_SIZE / 4) + 16 + 1 + 1 + 1) * 2) + +/* +* Number of required instruction CPLB switchtable entries +* MEMSIZE / 4 (we mostly install 4M page size CPLBs +* approx 12 for smaller 1MB page size CPLBs for allignment purposes +* 1 for L1 Instruction Memory +* 1 for CONFIG_DEBUG_HUNT_FOR_ZERO +*/ + +#define MAX_SWITCH_I_CPLBS (((CONFIG_MEM_SIZE / 4) + 12 + 1 + 1) * 2) + +#endif /* __MACH_BF48_H__ */ diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h new file mode 100644 index 0000000000..8f5d9c4d8d --- /dev/null +++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h @@ -0,0 +1,147 @@ +#include +#include + +#define NR_PORTS 2 + +#define OFFSET_THR 0x00 /* Transmit Holding register */ +#define OFFSET_RBR 0x00 /* Receive Buffer register */ +#define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ +#define OFFSET_IER 0x04 /* Interrupt Enable Register */ +#define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */ +#define OFFSET_IIR 0x08 /* Interrupt Identification Register */ +#define OFFSET_LCR 0x0C /* Line Control Register */ +#define OFFSET_MCR 0x10 /* Modem Control Register */ +#define OFFSET_LSR 0x14 /* Line Status Register */ +#define OFFSET_MSR 0x18 /* Modem Status Register */ +#define OFFSET_SCR 0x1C /* SCR Scratch Register */ +#define OFFSET_GCTL 0x24 /* Global Control Register */ + +#define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) +#define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) +#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) +#define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) +#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) +#define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) +#define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR)) +#define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) + +#define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) +#define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) +#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) +#define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) +#define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) +#define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) + +#if defined(CONFIG_BFIN_UART0_CTSRTS) || defined(CONFIG_BFIN_UART1_CTSRTS) +# define CONFIG_SERIAL_BFIN_CTSRTS + +# ifndef CONFIG_UART0_CTS_PIN +# define CONFIG_UART0_CTS_PIN -1 +# endif + +# ifndef CONFIG_UART0_RTS_PIN +# define CONFIG_UART0_RTS_PIN -1 +# endif + +# ifndef CONFIG_UART1_CTS_PIN +# define CONFIG_UART1_CTS_PIN -1 +# endif + +# ifndef CONFIG_UART1_RTS_PIN +# define CONFIG_UART1_RTS_PIN -1 +# endif +#endif +/* + * The pin configuration is different from schematic + */ +struct bfin_serial_port { + struct uart_port port; + unsigned int old_status; +#ifdef CONFIG_SERIAL_BFIN_DMA + int tx_done; + int tx_count; + struct circ_buf rx_dma_buf; + struct timer_list rx_dma_timer; + int rx_dma_nrows; + unsigned int tx_dma_channel; + unsigned int rx_dma_channel; + struct work_struct tx_dma_workqueue; +#else + struct work_struct cts_workqueue; +#endif +#ifdef CONFIG_SERIAL_BFIN_CTSRTS + int cts_pin; + int rts_pin; +#endif +}; + +struct bfin_serial_port bfin_serial_ports[NR_PORTS]; +struct bfin_serial_res { + unsigned long uart_base_addr; + int uart_irq; +#ifdef CONFIG_SERIAL_BFIN_DMA + unsigned int uart_tx_dma_channel; + unsigned int uart_rx_dma_channel; +#endif +#ifdef CONFIG_SERIAL_BFIN_CTSRTS + int uart_cts_pin; + int uart_rts_pin; +#endif +}; + +struct bfin_serial_res bfin_serial_resource[] = { +#ifdef CONFIG_SERIAL_BFIN_UART0 + { + 0xFFC00400, + IRQ_UART0_RX, +#ifdef CONFIG_SERIAL_BFIN_DMA + CH_UART0_TX, + CH_UART0_RX, +#endif +#ifdef CONFIG_BFIN_UART0_CTSRTS + CONFIG_UART0_CTS_PIN, + CONFIG_UART0_RTS_PIN, +#endif + }, +#endif +#ifdef CONFIG_SERIAL_BFIN_UART1 + { + 0xFFC02000, + IRQ_UART1_RX, +#ifdef CONFIG_SERIAL_BFIN_DMA + CH_UART1_TX, + CH_UART1_RX, +#endif +#ifdef CONFIG_BFIN_UART1_CTSRTS + CONFIG_UART1_CTS_PIN, + CONFIG_UART1_RTS_PIN, +#endif + }, +#endif +}; + +int nr_ports = ARRAY_SIZE(bfin_serial_resource); + +static void bfin_serial_hw_init(struct bfin_serial_port *uart) +{ + unsigned short val; + val = bfin_read16(BFIN_PORT_MUX); + val &= ~(PFDE | PFTE); + bfin_write16(BFIN_PORT_MUX, val); + + val = bfin_read16(PORTF_FER); + val |= 0xF; + bfin_write16(PORTF_FER, val); + +#ifdef CONFIG_SERIAL_BFIN_CTSRTS + if (uart->cts_pin >= 0) { + gpio_request(uart->cts_pin, NULL); + gpio_direction_input(uart->cts_pin); + } + + if (uart->rts_pin >= 0) { + gpio_request(uart->rts_pin, NULL); + gpio_direction_output(uart->rts_pin); + } +#endif +} diff --git a/include/asm-blackfin/mach-bf548/blackfin.h b/include/asm-blackfin/mach-bf548/blackfin.h new file mode 100644 index 0000000000..094c41a631 --- /dev/null +++ b/include/asm-blackfin/mach-bf548/blackfin.h @@ -0,0 +1,166 @@ +/* + * File: include/asm-blackfin/mach-bf548/blackfin.h + * Based on: + * Author: + * + * Created: + * Description: + * + * Rev: + * + * Modified: + * + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. + * If not, write to the Free Software Foundation, + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#ifndef _MACH_BLACKFIN_H_ +#define _MACH_BLACKFIN_H_ + +#define BF548_FAMILY + +#ifdef CONFIG_BF542 +#include "bf542.h" + +#ifdef CONFIG_BF544 +#include "bf544.h" +#endif + +#ifdef CONFIG_BF548 +#include "bf548.h" +#endif + +#ifdef CONFIG_BF549 +#include "bf549.h" +#endif + +#include "mem_map.h" +#include "anomaly.h" + +#if !(defined(__ASSEMBLY__) || defined(ASSEMBLY)) +#ifdef CONFIG_BF542 +#include "cdefBF542.h" +#endif + +#ifdef CONFIG_BF544 +#include "cdefBF544.h" +#endif +#ifdef CONFIG_BF548 +#include "cdefBF548.h" +#endif +#ifdef CONFIG_BF549 +#include "cdefBF549.h" +#endif + +/* UART 1*/ +#define bfin_read_UART_THR() bfin_read_UART1_THR() +#define bfin_write_UART_THR(val) bfin_write_UART1_THR(val) +#define bfin_read_UART_RBR() bfin_read_UART1_RBR() +#define bfin_write_UART_RBR(val) bfin_write_UART1_RBR(val) +#define bfin_read_UART_DLL() bfin_read_UART1_DLL() +#define bfin_write_UART_DLL(val) bfin_write_UART1_DLL(val) +#define bfin_read_UART_IER() bfin_read_UART1_IER() +#define bfin_write_UART_IER(val) bfin_write_UART1_IER(val) +#define bfin_read_UART_DLH() bfin_read_UART1_DLH() +#define bfin_write_UART_DLH(val) bfin_write_UART1_DLH(val) +#define bfin_read_UART_IIR() bfin_read_UART1_IIR() +#define bfin_write_UART_IIR(val) bfin_write_UART1_IIR(val) +#define bfin_read_UART_LCR() bfin_read_UART1_LCR() +#define bfin_write_UART_LCR(val) bfin_write_UART1_LCR(val) +#define bfin_read_UART_MCR() bfin_read_UART1_MCR() +#define bfin_write_UART_MCR(val) bfin_write_UART1_MCR(val) +#define bfin_read_UART_LSR() bfin_read_UART1_LSR() +#define bfin_write_UART_LSR(val) bfin_write_UART1_LSR(val) +#define bfin_read_UART_SCR() bfin_read_UART1_SCR() +#define bfin_write_UART_SCR(val) bfin_write_UART1_SCR(val) +#define bfin_read_UART_GCTL() bfin_read_UART1_GCTL() +#define bfin_write_UART_GCTL(val) bfin_write_UART1_GCTL(val) + +#endif + +/* MAP used DEFINES from BF533 to BF54x - so we don't need to change + * them in the driver, kernel, etc. */ + +/* UART_IIR Register */ +#define STATUS(x) ((x << 1) & 0x06) +#define STATUS_P1 0x02 +#define STATUS_P0 0x01 + +/* UART 0*/ + +/* DMA Channnel */ +#define bfin_read_CH_UART_RX() bfin_read_CH_UART1_RX() +#define bfin_write_CH_UART_RX(val) bfin_write_CH_UART1_RX(val) +#define bfin_read_CH_UART_TX() bfin_read_CH_UART1_TX() +#define bfin_write_CH_UART_TX(val) bfin_write_CH_UART1_TX(val) +#define CH_UART_RX CH_UART1_RX +#define CH_UART_TX CH_UART1_TX + +/* System Interrupt Controller */ +#define bfin_read_IRQ_UART_RX() bfin_read_IRQ_UART1_RX() +#define bfin_write_IRQ_UART_RX(val) bfin_write_IRQ_UART1_RX(val) +#define bfin_read_IRQ_UART_TX() bfin_read_IRQ_UART1_TX() +#define bfin_write_IRQ_UART_TX(val) bfin_write_IRQ_UART1_TX(val) +#define bfin_read_IRQ_UART_ERROR() bfin_read_IRQ_UART1_ERROR() +#define bfin_write_IRQ_UART_ERROR(val) bfin_write_IRQ_UART1_ERROR(val) +#define IRQ_UART_RX IRQ_UART1_RX +#define IRQ_UART_TX IRQ_UART1_TX +#define IRQ_UART_ERROR IRQ_UART1_ERROR + +/* MMR Registers*/ +#define bfin_read_UART_THR() bfin_read_UART1_THR() +#define bfin_write_UART_THR(val) bfin_write_UART1_THR(val) +#define bfin_read_UART_RBR() bfin_read_UART1_RBR() +#define bfin_write_UART_RBR(val) bfin_write_UART1_RBR(val) +#define bfin_read_UART_DLL() bfin_read_UART1_DLL() +#define bfin_write_UART_DLL(val) bfin_write_UART1_DLL(val) +#define bfin_read_UART_IER() bfin_read_UART1_IER() +#define bfin_write_UART_IER(val) bfin_write_UART1_IER(val) +#define bfin_read_UART_DLH() bfin_read_UART1_DLH() +#define bfin_write_UART_DLH(val) bfin_write_UART1_DLH(val) +#define bfin_read_UART_IIR() bfin_read_UART1_IIR() +#define bfin_write_UART_IIR(val) bfin_write_UART1_IIR(val) +#define bfin_read_UART_LCR() bfin_read_UART1_LCR() +#define bfin_write_UART_LCR(val) bfin_write_UART1_LCR(val) +#define bfin_read_UART_MCR() bfin_read_UART1_MCR() +#define bfin_write_UART_MCR(val) bfin_write_UART1_MCR(val) +#define bfin_read_UART_LSR() bfin_read_UART1_LSR() +#define bfin_write_UART_LSR(val) bfin_write_UART1_LSR(val) +#define bfin_read_UART_SCR() bfin_read_UART1_SCR() +#define bfin_write_UART_SCR(val) bfin_write_UART1_SCR(val) +#define bfin_read_UART_GCTL() bfin_read_UART1_GCTL() +#define bfin_write_UART_GCTL(val) bfin_write_UART1_GCTL(val) +#define UART_THR UART1_THR +#define UART_RBR UART1_RBR +#define UART_DLL UART1_DLL +#define UART_IER UART1_IER +#define UART_DLH UART1_DLH +#define UART_IIR UART1_IIR +#define UART_LCR UART1_LCR +#define UART_MCR UART1_MCR +#define UART_LSR UART1_LSR +#define UART_SCR UART1_SCR +#define UART_GCTL UART1_GCTL + +/* PLL_DIV Masks */ +#define CCLK_DIV1 CSEL_DIV1 /* CCLK = VCO / 1 */ +#define CCLK_DIV2 CSEL_DIV2 /* CCLK = VCO / 2 */ +#define CCLK_DIV4 CSEL_DIV4 /* CCLK = VCO / 4 */ +#define CCLK_DIV8 CSEL_DIV8 /* CCLK = VCO / 8 */ + +#endif diff --git a/include/asm-blackfin/mach-bf548/dma.h b/include/asm-blackfin/mach-bf548/dma.h new file mode 100644 index 0000000000..5a334c813c --- /dev/null +++ b/include/asm-blackfin/mach-bf548/dma.h @@ -0,0 +1,63 @@ +/* + * file: include/asm-blackfin/mach-bf548/dma.h + * based on: + * author: + * + * created: + * description: + * system mmr register map + * rev: + * + * modified: + * + * + * bugs: enter bugs at http://blackfin.uclinux.org/ + * + * this program is free software; you can redistribute it and/or modify + * it under the terms of the gnu general public license as published by + * the free software foundation; either version 2, or (at your option) + * any later version. + * + * this program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * merchantability or fitness for a particular purpose. see the + * gnu general public license for more details. + * + * you should have received a copy of the gnu general public license + * along with this program; see the file copying. + * if not, write to the free software foundation, + * 59 temple place - suite 330, boston, ma 02111-1307, usa. + */ + +#ifndef _MACH_DMA_H_ +#define _MACH_DMA_H_ + +#define CH_SPORT0_RX 0 +#define CH_SPORT0_TX 1 +#define CH_SPORT1_RX 2 +#define CH_SPORT1_TX 3 +#define CH_SPI0 4 +#define CH_SPI1 5 +#define CH_UART0_RX 6 +#define CH_UART0_TX 7 +#define CH_UART1_RX 8 +#define CH_UART1_TX 9 +#define CH_ATAPI_RX 10 +#define CH_ATAPI_TX 11 + +#define CH_EPPI0 12 +#define CH_EPPI1 13 +#define CH_EPPI2 14 +#define CH_PIXC_IMAGE 15 +#define CH_PIXC_OVERLAY 16 +#define CH_PIXC_OUTPUT 17 +#define CH_SPORT2_RX 18 +#define CH_SPORT2_TX 19 +#define CH_SPORT3_RX 20 +#define CH_SPORT3_TX 21 +#define CH_SDH 22 +#define CH_SPI2 23 + +#define MAX_BLACKFIN_DMA_CHANNEL CH_SPI2 + +#endif diff --git a/include/asm-blackfin/mach-bf548/irq.h b/include/asm-blackfin/mach-bf548/irq.h new file mode 100644 index 0000000000..a7f6703ea1 --- /dev/null +++ b/include/asm-blackfin/mach-bf548/irq.h @@ -0,0 +1,306 @@ +/* + * file: include/asm-blackfin/mach-bf548/irq.h + * based on: include/asm-blackfin/mach-bf537/irq.h + * author: Roy Huang (roy.huang@analog.com) + * + * created: + * description: + * system mmr register map + * rev: + * + * modified: + * + * + * bugs: enter bugs at http://blackfin.uclinux.org/ + * + * this program is free software; you can redistribute it and/or modify + * it under the terms of the gnu general public license as published by + * the free software foundation; either version 2, or (at your option) + * any later version. + * + * this program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * merchantability or fitness for a particular purpose. see the + * gnu general public license for more details. + * + * you should have received a copy of the gnu general public license + * along with this program; see the file copying. + * if not, write to the free software foundation, + * 59 temple place - suite 330, boston, ma 02111-1307, usa. + */ + +#ifndef _BF548_IRQ_H_ +#define _BF548_IRQ_H_ + +/* + * Interrupt source definitions + Event Source Core Event Name +Core Emulation ** +Events (highest priority) EMU 0 + Reset RST 1 + NMI NMI 2 + Exception EVX 3 + Reserved -- 4 + Hardware Error IVHW 5 + Core Timer IVTMR 6 * + +..... + + Software Interrupt 1 IVG14 31 + Software Interrupt 2 -- + (lowest priority) IVG15 32 * + */ + +#define NR_PERI_INTS 32 + +/* The ABSTRACT IRQ definitions */ +/** the first seven of the following are fixed, the rest you change if you need to **/ +#define IRQ_EMU 0 /* Emulation */ +#define IRQ_RST 1 /* reset */ +#define IRQ_NMI 2 /* Non Maskable */ +#define IRQ_EVX 3 /* Exception */ +#define IRQ_UNUSED 4 /* - unused interrupt*/ +#define IRQ_HWERR 5 /* Hardware Error */ +#define IRQ_CORETMR 6 /* Core timer */ + +#define BFIN_IRQ(x) ((x) + 7) + +#define IRQ_PLL_WAKEUP BFIN_IRQ(0) /* PLL Wakeup Interrupt */ +#define IRQ_DMAC0_ERR BFIN_IRQ(1) /* DMAC0 Status Interrupt */ +#define IRQ_EPPI0_ERR BFIN_IRQ(2) /* EPPI0 Error Interrupt */ +#define IRQ_SPORT0_ERR BFIN_IRQ(3) /* SPORT0 Error Interrupt */ +#define IRQ_SPORT1_ERR BFIN_IRQ(4) /* SPORT1 Error Interrupt */ +#define IRQ_SPI0_ERR BFIN_IRQ(5) /* SPI0 Status(Error) Interrupt */ +#define IRQ_UART0_ERR BFIN_IRQ(6) /* UART0 Status(Error) Interrupt */ +#define IRQ_RTC BFIN_IRQ(7) /* RTC Interrupt */ +#define IRQ_EPPI0 BFIN_IRQ(8) /* EPPI0 Interrupt (DMA12) */ +#define IRQ_SPORT0_RX BFIN_IRQ(9) /* SPORT0 RX Interrupt (DMA0) */ +#define IRQ_SPORT0_TX BFIN_IRQ(10) /* SPORT0 TX Interrupt (DMA1) */ +#define IRQ_SPORT1_RX BFIN_IRQ(11) /* SPORT1 RX Interrupt (DMA2) */ +#define IRQ_SPORT1_TX BFIN_IRQ(12) /* SPORT1 TX Interrupt (DMA3) */ +#define IRQ_SPI0 BFIN_IRQ(13) /* SPI0 Interrupt (DMA4) */ +#define IRQ_UART0_RX BFIN_IRQ(14) /* UART0 RX Interrupt (DMA6) */ +#define IRQ_UART0_TX BFIN_IRQ(15) /* UART0 TX Interrupt (DMA7) */ +#define IRQ_TIMER8 BFIN_IRQ(16) /* TIMER 8 Interrupt */ +#define IRQ_TIMER9 BFIN_IRQ(17) /* TIMER 9 Interrupt */ +#define IRQ_TIMER10 BFIN_IRQ(18) /* TIMER 10 Interrupt */ +#define IRQ_PINT0 BFIN_IRQ(19) /* PINT0 Interrupt */ +#define IRQ_PINT1 BFIN_IRQ(20) /* PINT1 Interrupt */ +#define IRQ_MDMAS0 BFIN_IRQ(21) /* MDMA Stream 0 Interrupt */ +#define IRQ_MDMAS1 BFIN_IRQ(22) /* MDMA Stream 1 Interrupt */ +#define IRQ_WATCHDOG BFIN_IRQ(23) /* Watchdog Interrupt */ +#define IRQ_DMAC1_ERR BFIN_IRQ(24) /* DMAC1 Status (Error) Interrupt */ +#define IRQ_SPORT2_ERR BFIN_IRQ(25) /* SPORT2 Error Interrupt */ +#define IRQ_SPORT3_ERR BFIN_IRQ(26) /* SPORT3 Error Interrupt */ +#define IRQ_MXVR BFIN_IRQ(27) /* SPORT3 Error Interrupt */ +#define IRQ_SPI1_ERR BFIN_IRQ(28) /* SPI1 Status (Error) Interrupt */ +#define IRQ_SPI2_ERR BFIN_IRQ(29) /* SPI2 Status (Error) Interrupt */ +#define IRQ_UART1_ERR BFIN_IRQ(30) /* UART1 Status (Error) Interrupt */ +#define IRQ_UART2_ERR BFIN_IRQ(31) /* UART2 Status (Error) Interrupt */ +#define IRQ_CAN0_ERR BFIN_IRQ(32) /* CAN0 Status (Error) Interrupt */ +#define IRQ_SPORT2_RX BFIN_IRQ(33) /* SPORT2 RX (DMA18) Interrupt */ +#define IRQ_SPORT2_TX BFIN_IRQ(34) /* SPORT2 TX (DMA19) Interrupt */ +#define IRQ_SPORT3_RX BFIN_IRQ(35) /* SPORT3 RX (DMA20) Interrupt */ +#define IRQ_SPORT3_TX BFIN_IRQ(36) /* SPORT3 TX (DMA21) Interrupt */ +#define IRQ_EPP1 BFIN_IRQ(37) /* EPP1 (DMA13) Interrupt */ +#define IRQ_EPP2 BFIN_IRQ(38) /* EPP2 (DMA14) Interrupt */ +#define IRQ_SPI1 BFIN_IRQ(39) /* SPI1 (DMA5) Interrupt */ +#define IRQ_SPI2 BFIN_IRQ(40) /* SPI2 (DMA23) Interrupt */ +#define IRQ_UART1_RX BFIN_IRQ(41) /* UART1 RX (DMA8) Interrupt */ +#define IRQ_UART1_TX BFIN_IRQ(42) /* UART1 TX (DMA9) Interrupt */ +#define IRQ_ATAPI_RX BFIN_IRQ(43) /* ATAPI RX (DMA10) Interrupt */ +#define IRQ_ATAPI_TX BFIN_IRQ(44) /* ATAPI TX (DMA11) Interrupt */ +#define IRQ_TWI0 BFIN_IRQ(45) /* TWI0 Interrupt */ +#define IRQ_TWI1 BFIN_IRQ(46) /* TWI1 Interrupt */ +#define IRQ_CAN0_RX BFIN_IRQ(47) /* CAN0 Receive Interrupt */ +#define IRQ_CAN0_TX BFIN_IRQ(48) /* CAN0 Transmit Interrupt */ +#define IRQ_MDMAS2 BFIN_IRQ(49) /* MDMA Stream 2 Interrupt */ +#define IRQ_MDMAS3 BFIN_IRQ(50) /* MDMA Stream 3 Interrupt */ +#define IRQ_MXVR_ERR BFIN_IRQ(51) /* MXVR Status (Error) Interrupt */ +#define IRQ_MXVR_MSG BFIN_IRQ(52) /* MXVR Message Interrupt */ +#define IRQ_MXVR_PKT BFIN_IRQ(53) /* MXVR Packet Interrupt */ +#define IRQ_EPP1_ERR BFIN_IRQ(54) /* EPPI1 Error Interrupt */ +#define IRQ_EPP2_ERR BFIN_IRQ(55) /* EPPI2 Error Interrupt */ +#define IRQ_UART3_ERR BFIN_IRQ(56) /* UART3 Status (Error) Interrupt */ +#define IRQ_HOST_ERR BFIN_IRQ(57) /* HOST Status (Error) Interrupt */ +#define IRQ_PIXC_ERR BFIN_IRQ(59) /* PIXC Status (Error) Interrupt */ +#define IRQ_NFC_ERR BFIN_IRQ(60) /* NFC Error Interrupt */ +#define IRQ_ATAPI_ERR BFIN_IRQ(61) /* ATAPI Error Interrupt */ +#define IRQ_CAN1_ERR BFIN_IRQ(62) /* CAN1 Status (Error) Interrupt */ +#define IRQ_HS_DMA_ERR BFIN_IRQ(63) /* Handshake DMA Status Interrupt */ +#define IRQ_PIXC_IN0 BFIN_IRQ(64) /* PIXC IN0 (DMA15) Interrupt */ +#define IRQ_PIXC_IN1 BFIN_IRQ(65) /* PIXC IN1 (DMA16) Interrupt */ +#define IRQ_PIXC_OUT BFIN_IRQ(66) /* PIXC OUT (DMA17) Interrupt */ +#define IRQ_SDH BFIN_IRQ(67) /* SDH/NFC (DMA22) Interrupt */ +#define IRQ_CNT BFIN_IRQ(68) /* CNT Interrupt */ +#define IRQ_KEY BFIN_IRQ(69) /* KEY Interrupt */ +#define IRQ_CAN1_RX BFIN_IRQ(70) /* CAN1 RX Interrupt */ +#define IRQ_CAN1_TX BFIN_IRQ(71) /* CAN1 TX Interrupt */ +#define IRQ_SDH_MASK0 BFIN_IRQ(72) /* SDH Mask 0 Interrupt */ +#define IRQ_SDH_MASK1 BFIN_IRQ(73) /* SDH Mask 1 Interrupt */ +#define IRQ_USB_INT0 BFIN_IRQ(75) /* USB INT0 Interrupt */ +#define IRQ_USB_INT1 BFIN_IRQ(76) /* USB INT1 Interrupt */ +#define IRQ_USB_INT2 BFIN_IRQ(77) /* USB INT2 Interrupt */ +#define IRQ_USB_DMA BFIN_IRQ(78) /* USB DMA Interrupt */ +#define IRQ_OPTSEC BFIN_IRQ(79) /* OTPSEC Interrupt */ +#define IRQ_TMR0 BFIN_IRQ(86) /* Timer 0 Interrupt */ +#define IRQ_TMR1 BFIN_IRQ(87) /* Timer 1 Interrupt */ +#define IRQ_TMR2 BFIN_IRQ(88) /* Timer 2 Interrupt */ +#define IRQ_TMR3 BFIN_IRQ(89) /* Timer 3 Interrupt */ +#define IRQ_TMR4 BFIN_IRQ(90) /* Timer 4 Interrupt */ +#define IRQ_TMR5 BFIN_IRQ(91) /* Timer 5 Interrupt */ +#define IRQ_TMR6 BFIN_IRQ(92) /* Timer 6 Interrupt */ +#define IRQ_TMR7 BFIN_IRQ(93) /* Timer 7 Interrupt */ +#define IRQ_PINT2 BFIN_IRQ(94) /* PINT2 Interrupt */ +#define IRQ_PINT3 BFIN_IRQ(95) /* PINT3 Interrupt */ + +#define SYS_IRQS IRQ_PINT3 + +#define BFIN_PA_IRQ(x) ((x) + SYS_IRQS + 1) +#define IRQ_PA0 BFIN_PA_IRQ(0) +#define IRQ_PA1 BFIN_PA_IRQ(1) +#define IRQ_PA2 BFIN_PA_IRQ(2) +#define IRQ_PA3 BFIN_PA_IRQ(3) +#define IRQ_PA4 BFIN_PA_IRQ(4) +#define IRQ_PA5 BFIN_PA_IRQ(5) +#define IRQ_PA6 BFIN_PA_IRQ(6) +#define IRQ_PA7 BFIN_PA_IRQ(7) +#define IRQ_PA8 BFIN_PA_IRQ(8) +#define IRQ_PA9 BFIN_PA_IRQ(9) +#define IRQ_PA10 BFIN_PA_IRQ(10) +#define IRQ_PA11 BFIN_PA_IRQ(11) +#define IRQ_PA12 BFIN_PA_IRQ(12) +#define IRQ_PA13 BFIN_PA_IRQ(13) +#define IRQ_PA14 BFIN_PA_IRQ(14) +#define IRQ_PA15 BFIN_PA_IRQ(15) + +#define BFIN_PB_IRQ(x) ((x) + IRQ_PA15 + 1) +#define IRQ_PB0 BFIN_PB_IRQ(0) +#define IRQ_PB1 BFIN_PB_IRQ(1) +#define IRQ_PB2 BFIN_PB_IRQ(2) +#define IRQ_PB3 BFIN_PB_IRQ(3) +#define IRQ_PB4 BFIN_PB_IRQ(4) +#define IRQ_PB5 BFIN_PB_IRQ(5) +#define IRQ_PB6 BFIN_PB_IRQ(6) +#define IRQ_PB7 BFIN_PB_IRQ(7) +#define IRQ_PB8 BFIN_PB_IRQ(8) +#define IRQ_PB9 BFIN_PB_IRQ(9) +#define IRQ_PB10 BFIN_PB_IRQ(10) +#define IRQ_PB11 BFIN_PB_IRQ(11) +#define IRQ_PB12 BFIN_PB_IRQ(12) +#define IRQ_PB13 BFIN_PB_IRQ(13) +#define IRQ_PB14 BFIN_PB_IRQ(14) +#define IRQ_PB15 BFIN_PB_IRQ(15) + +#define BFIN_PC_IRQ(x) ((x) + IRQ_PB15 + 1) +#define IRQ_PC0 BFIN_PC_IRQ(0) +#define IRQ_PC1 BFIN_PC_IRQ(1) +#define IRQ_PC2 BFIN_PC_IRQ(2) +#define IRQ_PC3 BFIN_PC_IRQ(3) +#define IRQ_PC4 BFIN_PC_IRQ(4) +#define IRQ_PC5 BFIN_PC_IRQ(5) +#define IRQ_PC6 BFIN_PC_IRQ(6) +#define IRQ_PC7 BFIN_PC_IRQ(7) +#define IRQ_PC8 BFIN_PC_IRQ(8) +#define IRQ_PC9 BFIN_PC_IRQ(9) +#define IRQ_PC10 BFIN_PC_IRQ(10) +#define IRQ_PC11 BFIN_PC_IRQ(11) +#define IRQ_PC12 BFIN_PC_IRQ(12) +#define IRQ_PC13 BFIN_PC_IRQ(13) +#define IRQ_PC14 BFIN_PC_IRQ(14) +#define IRQ_PC15 BFIN_PC_IRQ(15) + +#define BFIN_PD_IRQ(x) ((x) + IRQ_PC15 + 1) +#define IRQ_PD0 BFIN_PD_IRQ(0) +#define IRQ_PD1 BFIN_PD_IRQ(1) +#define IRQ_PD2 BFIN_PD_IRQ(2) +#define IRQ_PD3 BFIN_PD_IRQ(3) +#define IRQ_PD4 BFIN_PD_IRQ(4) +#define IRQ_PD5 BFIN_PD_IRQ(5) +#define IRQ_PD6 BFIN_PD_IRQ(6) +#define IRQ_PD7 BFIN_PD_IRQ(7) +#define IRQ_PD8 BFIN_PD_IRQ(8) +#define IRQ_PD9 BFIN_PD_IRQ(9) +#define IRQ_PD10 BFIN_PD_IRQ(10) +#define IRQ_PD11 BFIN_PD_IRQ(11) +#define IRQ_PD12 BFIN_PD_IRQ(12) +#define IRQ_PD13 BFIN_PD_IRQ(13) +#define IRQ_PD14 BFIN_PD_IRQ(14) +#define IRQ_PD15 BFIN_PD_IRQ(15) + +#define BFIN_PE_IRQ(x) ((x) + IRQ_PD15 + 1) +#define IRQ_PE0 BFIN_PE_IRQ(0) +#define IRQ_PE1 BFIN_PE_IRQ(1) +#define IRQ_PE2 BFIN_PE_IRQ(2) +#define IRQ_PE3 BFIN_PE_IRQ(3) +#define IRQ_PE4 BFIN_PE_IRQ(4) +#define IRQ_PE5 BFIN_PE_IRQ(5) +#define IRQ_PE6 BFIN_PE_IRQ(6) +#define IRQ_PE7 BFIN_PE_IRQ(7) +#define IRQ_PE8 BFIN_PE_IRQ(8) +#define IRQ_PE9 BFIN_PE_IRQ(9) +#define IRQ_PE10 BFIN_PE_IRQ(10) +#define IRQ_PE11 BFIN_PE_IRQ(11) +#define IRQ_PE12 BFIN_PE_IRQ(12) +#define IRQ_PE13 BFIN_PE_IRQ(13) +#define IRQ_PE14 BFIN_PE_IRQ(14) +#define IRQ_PE15 BFIN_PE_IRQ(15) + + +#ifdef CONFIG_IRQCHIP_DEMUX_GPIO +#define NR_IRQS (IRQ_PH15+1) +#else +#define NR_IRQS (IRQ_UART1_ERROR+1) +#endif + +#define IVG7 7 +#define IVG8 8 +#define IVG9 9 +#define IVG10 10 +#define IVG11 11 +#define IVG12 12 +#define IVG13 13 +#define IVG14 14 +#define IVG15 15 + +/* IAR0 BIT FIELDS*/ +#define IRQ_PLL_WAKEUP_POS 0 +#define IRQ_DMA_ERROR_POS 4 +#define IRQ_ERROR_POS 8 +#define IRQ_RTC_POS 12 +#define IRQ_PPI_POS 16 +#define IRQ_SPORT0_RX_POS 20 +#define IRQ_SPORT0_TX_POS 24 +#define IRQ_SPORT1_RX_POS 28 + +/* IAR1 BIT FIELDS*/ +#define IRQ_SPORT1_TX_POS 0 +#define IRQ_TWI_POS 4 +#define IRQ_SPI_POS 8 +#define IRQ_UART0_RX_POS 12 +#define IRQ_UART0_TX_POS 16 +#define IRQ_UART1_RX_POS 20 +#define IRQ_UART1_TX_POS 24 +#define IRQ_CAN_RX_POS 28 + +/* IAR2 BIT FIELDS*/ +#define IRQ_CAN_TX_POS 0 +#define IRQ_MAC_RX_POS 4 +#define IRQ_MAC_TX_POS 8 +#define IRQ_TMR0_POS 12 +#define IRQ_TMR1_POS 16 +#define IRQ_TMR2_POS 20 +#define IRQ_TMR3_POS 24 +#define IRQ_TMR4_POS 28 + +/* IAR3 BIT FIELDS*/ +#define IRQ_TMR5_POS 0 +#define IRQ_TMR6_POS 4 +#define IRQ_TMR7_POS 8 +#define IRQ_PROG_INTA_POS 12 +#define IRQ_PORTG_INTB_POS 16 +#define IRQ_MEM_DMA0_POS 20 +#define IRQ_MEM_DMA1_POS 24 +#define IRQ_WATCH_POS 28 + +#endif /* _BF537_IRQ_H_ */ diff --git a/include/asm-blackfin/mach-bf548/mem_init.h b/include/asm-blackfin/mach-bf548/mem_init.h new file mode 100644 index 0000000000..0cb279e973 --- /dev/null +++ b/include/asm-blackfin/mach-bf548/mem_init.h @@ -0,0 +1,189 @@ +/* + * File: include/asm-blackfin/mach-bf548/mem_init.h + * Based on: + * Author: + * + * Created: + * Description: + * + * Rev: + * + * Modified: + * Copyright 2004-2006 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2, or (at your option) + * any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; see the file COPYING. + * If not, write to the Free Software Foundation, + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + */ + +#if (CONFIG_MEM_MT46V32M16) + +#if defined CONFIG_CLKIN_HALF +#define CLKIN_HALF 1 +#else +#define CLKIN_HALF 0 +#endif + +#if defined CONFIG_PLL_BYPASS +#define PLL_BYPASS 1 +#else +#define PLL_BYPASS 0 +#endif + +/***************************************Currently Not Being Used *********************************/ +#define flash_EBIU_AMBCTL_WAT ((CONFIG_FLASH_SPEED_BWAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1 +#define flash_EBIU_AMBCTL_RAT ((CONFIG_FLASH_SPEED_BRAT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1 +#define flash_EBIU_AMBCTL_HT ((CONFIG_FLASH_SPEED_BHT * 4) / (4000000000 / CONFIG_SCLK_HZ)) +#define flash_EBIU_AMBCTL_ST ((CONFIG_FLASH_SPEED_BST * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1 +#define flash_EBIU_AMBCTL_TT ((CONFIG_FLASH_SPEED_BTT * 4) / (4000000000 / CONFIG_SCLK_HZ)) + 1 + +#if (flash_EBIU_AMBCTL_TT > 3) +#define flash_EBIU_AMBCTL0_TT B0TT_4 +#endif +#if (flash_EBIU_AMBCTL_TT == 3) +#define flash_EBIU_AMBCTL0_TT B0TT_3 +#endif +#if (flash_EBIU_AMBCTL_TT == 2) +#define flash_EBIU_AMBCTL0_TT B0TT_2 +#endif +#if (flash_EBIU_AMBCTL_TT < 2) +#define flash_EBIU_AMBCTL0_TT B0TT_1 +#endif + +#if (flash_EBIU_AMBCTL_ST > 3) +#define flash_EBIU_AMBCTL0_ST B0ST_4 +#endif +#if (flash_EBIU_AMBCTL_ST == 3) +#define flash_EBIU_AMBCTL0_ST B0ST_3 +#endif +#if (flash_EBIU_AMBCTL_ST == 2) +#define flash_EBIU_AMBCTL0_ST B0ST_2 +#endif +#if (flash_EBIU_AMBCTL_ST < 2) +#define flash_EBIU_AMBCTL0_ST B0ST_1 +#endif + +#if (flash_EBIU_AMBCTL_HT > 2) +#define flash_EBIU_AMBCTL0_HT B0HT_3 +#endif +#if (flash_EBIU_AMBCTL_HT == 2) +#define flash_EBIU_AMBCTL0_HT B0HT_2 +#endif +#if (flash_EBIU_AMBCTL_HT == 1) +#define flash_EBIU_AMBCTL0_HT B0HT_1 +#endif +#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT == 0) +#define flash_EBIU_AMBCTL0_HT B0HT_0 +#endif +#if (flash_EBIU_AMBCTL_HT == 0 && CONFIG_FLASH_SPEED_BHT != 0) +#define flash_EBIU_AMBCTL0_HT B0HT_1 +#endif + +#if (flash_EBIU_AMBCTL_WAT > 14) +#define flash_EBIU_AMBCTL0_WAT B0WAT_15 +#endif +#if (flash_EBIU_AMBCTL_WAT == 14) +#define flash_EBIU_AMBCTL0_WAT B0WAT_14 +#endif +#if (flash_EBIU_AMBCTL_WAT == 13) +#define flash_EBIU_AMBCTL0_WAT B0WAT_13 +#endif +#if (flash_EBIU_AMBCTL_WAT == 12) +#define flash_EBIU_AMBCTL0_WAT B0WAT_12 +#endif +#if (flash_EBIU_AMBCTL_WAT == 11) +#define flash_EBIU_AMBCTL0_WAT B0WAT_11 +#endif +#if (flash_EBIU_AMBCTL_WAT == 10) +#define flash_EBIU_AMBCTL0_WAT B0WAT_10 +#endif +#if (flash_EBIU_AMBCTL_WAT == 9) +#define flash_EBIU_AMBCTL0_WAT B0WAT_9 +#endif +#if (flash_EBIU_AMBCTL_WAT == 8) +#define flash_EBIU_AMBCTL0_WAT B0WAT_8 +#endif +#if (flash_EBIU_AMBCTL_WAT == 7) +#define flash_EBIU_AMBCTL0_WAT B0WAT_7 +#endif +#if (flash_EBIU_AMBCTL_WAT == 6) +#define flash_EBIU_AMBCTL0_WAT B0WAT_6 +#endif +#if (flash_EBIU_AMBCTL_WAT == 5) +#define flash_EBIU_AMBCTL0_WAT B0WAT_5 +#endif +#if (flash_EBIU_AMBCTL_WAT == 4) +#define flash_EBIU_AMBCTL0_WAT B0WAT_4 +#endif +#if (flash_EBIU_AMBCTL_WAT == 3) +#define flash_EBIU_AMBCTL0_WAT B0WAT_3 +#endif +#if (flash_EBIU_AMBCTL_WAT == 2) +#define flash_EBIU_AMBCTL0_WAT B0WAT_2 +#endif +#if (flash_EBIU_AMBCTL_WAT == 1) +#define flash_EBIU_AMBCTL0_WAT B0WAT_1 +#endif + +#if (flash_EBIU_AMBCTL_RAT > 14) +#define flash_EBIU_AMBCTL0_RAT B0RAT_15 +#endif +#if (flash_EBIU_AMBCTL_RAT == 14) +#define flash_EBIU_AMBCTL0_RAT B0RAT_14 +#endif +#if (flash_EBIU_AMBCTL_RAT == 13) +#define flash_EBIU_AMBCTL0_RAT B0RAT_13 +#endif +#if (flash_EBIU_AMBCTL_RAT == 12) +#define flash_EBIU_AMBCTL0_RAT B0RAT_12 +#endif +#if (flash_EBIU_AMBCTL_RAT == 11) +#define flash_EBIU_AMBCTL0_RAT B0RAT_11 +#endif +#if (flash_EBIU_AMBCTL_RAT == 10) +#define flash_EBIU_AMBCTL0_RAT B0RAT_10 +#endif +#if (flash_EBIU_AMBCTL_RAT == 9) +#define flash_EBIU_AMBCTL0_RAT B0RAT_9 +#endif +#if (flash_EBIU_AMBCTL_RAT == 8) +#define flash_EBIU_AMBCTL0_RAT B0RAT_8 +#endif +#if (flash_EBIU_AMBCTL_RAT == 7) +#define flash_EBIU_AMBCTL0_RAT B0RAT_7 +#endif +#if (flash_EBIU_AMBCTL_RAT == 6) +#define flash_EBIU_AMBCTL0_RAT B0RAT_6 +#endif +#if (flash_EBIU_AMBCTL_RAT == 5) +#define flash_EBIU_AMBCTL0_RAT B0RAT_5 +#endif +#if (flash_EBIU_AMBCTL_RAT == 4) +#define flash_EBIU_AMBCTL0_RAT B0RAT_4 +#endif +#if (flash_EBIU_AMBCTL_RAT == 3) +#define flash_EBIU_AMBCTL0_RAT B0RAT_3 +#endif +#if (flash_EBIU_AMBCTL_RAT == 2) +#define flash_EBIU_AMBCTL0_RAT B0RAT_2 +#endif +#if (flash_EBIU_AMBCTL_RAT == 1) +#define flash_EBIU_AMBCTL0_RAT B0RAT_1 +#endif + +#define flash_EBIU_AMBCTL0 \ + (flash_EBIU_AMBCTL0_WAT | flash_EBIU_AMBCTL0_RAT | flash_EBIU_AMBCTL0_HT | \ + flash_EBIU_AMBCTL0_ST | flash_EBIU_AMBCTL0_TT | CONFIG_FLASH_SPEED_RDYEN) diff --git a/include/asm-blackfin/mach-bf548/mem_map.h b/include/asm-blackfin/mach-bf548/mem_map.h new file mode 100644 index 0000000000..72d80e8a6e --- /dev/null +++ b/include/asm-blackfin/mach-bf548/mem_map.h @@ -0,0 +1,97 @@ +/* + * file: include/asm-blackfin/mach-bf548/mem_map.h + * based on: + * author: + * + * created: + * description: + * Memory MAP Common header file for blackfin BF537/6/4 of processors. + * rev: + * + * modified: + * + * bugs: enter bugs at http://blackfin.uclinux.org/ + * + * this program is free software; you can redistribute it and/or modify + * it under the terms of the gnu general public license as published by + * the free software foundation; either version 2, or (at your option) + * any later version. + * + * this program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * merchantability or fitness for a particular purpose. see the + * gnu general public license for more details. + * + * you should have received a copy of the gnu general public license + * along with this program; see the file copying. + * if not, write to the free software foundation, + * 59 temple place - suite 330, boston, ma 02111-1307, usa. + */ + +#ifndef _MEM_MAP_548_H_ +#define _MEM_MAP_548_H_ + +#define COREMMR_BASE 0xFFE00000 /* Core MMRs */ +#define SYSMMR_BASE 0xFFC00000 /* System MMRs */ + +/* Async Memory Banks */ +#define ASYNC_BANK3_BASE 0x2C000000 /* Async Bank 3 */ +#define ASYNC_BANK3_SIZE 0x04000000 /* 64M */ +#define ASYNC_BANK2_BASE 0x28000000 /* Async Bank 2 */ +#define ASYNC_BANK2_SIZE 0x04000000 /* 64M */ +#define ASYNC_BANK1_BASE 0x24000000 /* Async Bank 1 */ +#define ASYNC_BANK1_SIZE 0x04000000 /* 64M */ +#define ASYNC_BANK0_BASE 0x20000000 /* Async Bank 0 */ +#define ASYNC_BANK0_SIZE 0x04000000 /* 64M */ + +/* Boot ROM Memory */ + +#define BOOT_ROM_START 0xEF000000 + +/* Level 1 Memory */ + +/* Memory Map for ADSP-BF548 processors */ +#ifdef CONFIG_BLKFIN_ICACHE +#define BLKFIN_ICACHESIZE (16*1024) +#else +#define BLKFIN_ICACHESIZE (0*1024) +#endif + +#define L1_CODE_START 0xFFA00000 +#define L1_DATA_A_START 0xFF800000 +#define L1_DATA_B_START 0xFF900000 + +#define L1_CODE_LENGTH 0xC000 + +#ifdef CONFIG_BLKFIN_DCACHE + +#ifdef CONFIG_BLKFIN_DCACHE_BANKA +#define DMEM_CNTR (ACACHE_BSRAM | ENDCPLB | PORT_PREF0) +#define L1_DATA_A_LENGTH (0x8000 - 0x4000) +#define L1_DATA_B_LENGTH 0x8000 +#define BLKFIN_DCACHESIZE (16*1024) +#define BLKFIN_DSUPBANKS 1 +#else +#define DMEM_CNTR (ACACHE_BCACHE | ENDCPLB | PORT_PREF0) +#define L1_DATA_A_LENGTH (0x8000 - 0x4000) +#define L1_DATA_B_LENGTH (0x8000 - 0x4000) +#define BLKFIN_DCACHESIZE (32*1024) +#define BLKFIN_DSUPBANKS 2 +#endif + +#else +#define DMEM_CNTR (ASRAM_BSRAM | ENDCPLB | PORT_PREF0) +#define L1_DATA_A_LENGTH 0x8000 +#define L1_DATA_B_LENGTH 0x8000 +#define BLKFIN_DCACHESIZE (0*1024) +#define BLKFIN_DSUPBANKS 0 +#endif /*CONFIG_BLKFIN_DCACHE*/ + +/* Scratch Pad Memory */ + +#if defined(CONFIG_BF54x) +#define L1_SCRATCH_START 0xFFB00000 +#define L1_SCRATCH_LENGTH 0x1000 +#endif + +#endif/* _MEM_MAP_548_H_ */ -- cgit v1.2.2 From 24a07a124198153540f8f43d9e91d16227aba66e Mon Sep 17 00:00:00 2001 From: Roy Huang Date: Thu, 12 Jul 2007 22:41:45 +0800 Subject: Blackfin arch: initial supporting for BF548-EZKIT The ADSP-BF54x was specifically designed to meet the needs of convergent multimedia applications where system performance and cost are essential ingredients. The integration of multimedia, human interface, and connectivity peripherals combined with increased system bandwidth and on-chip memory provides customers a platform to design the most demanding applications. Since now, ADSP-BF54x will be supported in the Linux kernel and bunch of related drivers such as USB OTG, ATAPI, NAND flash controller, LCD framebuffer, sound, touch screen will be submitted later. Please enjoy the show. Signed-off-by: Roy Huang Signed-off-by: Bryan Wu --- include/asm-blackfin/gpio.h | 6 + include/asm-blackfin/mach-bf533/dma.h | 3 + include/asm-blackfin/mach-bf537/dma.h | 3 + include/asm-blackfin/mach-bf548/anomaly.h | 2 + include/asm-blackfin/mach-bf548/bf548.h | 2 + include/asm-blackfin/mach-bf548/bfin_serial_5xx.h | 84 +- include/asm-blackfin/mach-bf548/blackfin.h | 16 +- include/asm-blackfin/mach-bf548/cdefBF54x_base.h | 46 +- include/asm-blackfin/mach-bf548/defBF542.h | 281 ----- include/asm-blackfin/mach-bf548/defBF544.h | 60 - include/asm-blackfin/mach-bf548/defBF548.h | 341 ------ include/asm-blackfin/mach-bf548/defBF549.h | 763 +----------- include/asm-blackfin/mach-bf548/defBF54x_base.h | 1281 ++------------------- include/asm-blackfin/mach-bf548/dma.h | 14 +- include/asm-blackfin/mach-bf548/gpio.h | 212 ++++ include/asm-blackfin/mach-bf548/irq.h | 174 ++- include/asm-blackfin/mach-bf561/dma.h | 3 + 17 files changed, 603 insertions(+), 2688 deletions(-) create mode 100644 include/asm-blackfin/mach-bf548/gpio.h (limited to 'include') diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h index d98d77ad71..bc0cca0285 100644 --- a/include/asm-blackfin/gpio.h +++ b/include/asm-blackfin/gpio.h @@ -204,6 +204,10 @@ #endif +#ifdef BF548_FAMILY +#include +#endif + #ifdef BF561_FAMILY #define MAX_BLACKFIN_GPIOS 48 #define PORT_FIO0 GPIO_0 @@ -264,6 +268,7 @@ unsigned short get_gpiop_maska(unsigned short); unsigned short get_gpiop_maskb(unsigned short); unsigned short get_gpiop_data(unsigned short); +#ifndef BF548_FAMILY struct gpio_port_t { unsigned short data; unsigned short dummy1; @@ -299,6 +304,7 @@ struct gpio_port_t { unsigned short dummy16; unsigned short inen; }; +#endif #ifdef CONFIG_PM #define PM_WAKE_RISING 0x1 diff --git a/include/asm-blackfin/mach-bf533/dma.h b/include/asm-blackfin/mach-bf533/dma.h index bd9d5e9430..16c672c01d 100644 --- a/include/asm-blackfin/mach-bf533/dma.h +++ b/include/asm-blackfin/mach-bf533/dma.h @@ -51,4 +51,7 @@ #define CH_MEM_STREAM1_DEST 10 /* TX */ #define CH_MEM_STREAM1_SRC 11 /* RX */ +extern int channel2irq(unsigned int channel); +extern struct dma_register *base_addr[]; + #endif diff --git a/include/asm-blackfin/mach-bf537/dma.h b/include/asm-blackfin/mach-bf537/dma.h index 7a96404087..021991984e 100644 --- a/include/asm-blackfin/mach-bf537/dma.h +++ b/include/asm-blackfin/mach-bf537/dma.h @@ -52,4 +52,7 @@ #define CH_MEM_STREAM1_DEST 14 /* TX */ #define CH_MEM_STREAM1_SRC 15 /* RX */ +extern int channel2irq(unsigned int channel); +extern struct dma_register *base_addr[]; + #endif diff --git a/include/asm-blackfin/mach-bf548/anomaly.h b/include/asm-blackfin/mach-bf548/anomaly.h index ddc150e6fb..aca1d4ba14 100644 --- a/include/asm-blackfin/mach-bf548/anomaly.h +++ b/include/asm-blackfin/mach-bf548/anomaly.h @@ -47,6 +47,8 @@ SPORT external receive and transmit clocks. */ #define ANOMALY_05000272 /* Certain data cache write through modes fail for VDDint <=0.9V */ +#define ANOMALY_05000281 /* False Hardware Error Exception when ISR context is + not restored */ #define ANOMALY_05000310 /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ #define ANOMALY_05000312 /* Errors When SSYNC, CSYNC, or Loads to LT, LB and diff --git a/include/asm-blackfin/mach-bf548/bf548.h b/include/asm-blackfin/mach-bf548/bf548.h index 0b21102044..163c79e3d2 100644 --- a/include/asm-blackfin/mach-bf548/bf548.h +++ b/include/asm-blackfin/mach-bf548/bf548.h @@ -30,6 +30,8 @@ #ifndef __MACH_BF548_H__ #define __MACH_BF548_H__ +#define SUPPORTED_REVID 0 + /* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */ #define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */ diff --git a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h index 8f5d9c4d8d..2f4afc90db 100644 --- a/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h +++ b/include/asm-blackfin/mach-bf548/bfin_serial_5xx.h @@ -1,34 +1,35 @@ #include #include -#define NR_PORTS 2 +#define NR_PORTS 4 -#define OFFSET_THR 0x00 /* Transmit Holding register */ -#define OFFSET_RBR 0x00 /* Receive Buffer register */ #define OFFSET_DLL 0x00 /* Divisor Latch (Low-Byte) */ -#define OFFSET_IER 0x04 /* Interrupt Enable Register */ #define OFFSET_DLH 0x04 /* Divisor Latch (High-Byte) */ -#define OFFSET_IIR 0x08 /* Interrupt Identification Register */ +#define OFFSET_GCTL 0x08 /* Global Control Register */ #define OFFSET_LCR 0x0C /* Line Control Register */ #define OFFSET_MCR 0x10 /* Modem Control Register */ #define OFFSET_LSR 0x14 /* Line Status Register */ #define OFFSET_MSR 0x18 /* Modem Status Register */ #define OFFSET_SCR 0x1C /* SCR Scratch Register */ -#define OFFSET_GCTL 0x24 /* Global Control Register */ +#define OFFSET_IER_SET 0x20 /* Set Interrupt Enable Register */ +#define OFFSET_IER_CLEAR 0x24 /* Clear Interrupt Enable Register */ +#define OFFSET_THR 0x28 /* Transmit Holding register */ +#define OFFSET_RBR 0x2C /* Receive Buffer register */ #define UART_GET_CHAR(uart) bfin_read16(((uart)->port.membase + OFFSET_RBR)) #define UART_GET_DLL(uart) bfin_read16(((uart)->port.membase + OFFSET_DLL)) -#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER)) #define UART_GET_DLH(uart) bfin_read16(((uart)->port.membase + OFFSET_DLH)) -#define UART_GET_IIR(uart) bfin_read16(((uart)->port.membase + OFFSET_IIR)) +#define UART_GET_IER(uart) bfin_read16(((uart)->port.membase + OFFSET_IER_SET)) #define UART_GET_LCR(uart) bfin_read16(((uart)->port.membase + OFFSET_LCR)) #define UART_GET_LSR(uart) bfin_read16(((uart)->port.membase + OFFSET_LSR)) #define UART_GET_GCTL(uart) bfin_read16(((uart)->port.membase + OFFSET_GCTL)) #define UART_PUT_CHAR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_THR),v) #define UART_PUT_DLL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLL),v) -#define UART_PUT_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER),v) +#define UART_SET_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_SET),v) +#define UART_CLEAR_IER(uart,v) bfin_write16(((uart)->port.membase + OFFSET_IER_CLEAR),v) #define UART_PUT_DLH(uart,v) bfin_write16(((uart)->port.membase + OFFSET_DLH),v) +#define UART_PUT_LSR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LSR),v) #define UART_PUT_LCR(uart,v) bfin_write16(((uart)->port.membase + OFFSET_LCR),v) #define UART_PUT_GCTL(uart,v) bfin_write16(((uart)->port.membase + OFFSET_GCTL),v) @@ -112,9 +113,29 @@ struct bfin_serial_res bfin_serial_resource[] = { CH_UART1_TX, CH_UART1_RX, #endif -#ifdef CONFIG_BFIN_UART1_CTSRTS - CONFIG_UART1_CTS_PIN, - CONFIG_UART1_RTS_PIN, + }, +#endif +#ifdef CONFIG_SERIAL_BFIN_UART2 + { + 0xFFC02100, + IRQ_UART2_RX, +#ifdef CONFIG_SERIAL_BFIN_DMA + CH_UART2_TX, + CH_UART2_RX, +#endif +#ifdef CONFIG_BFIN_UART2_CTSRTS + CONFIG_UART2_CTS_PIN, + CONFIG_UART2_RTS_PIN, +#endif + }, +#endif +#ifdef CONFIG_SERIAL_BFIN_UART3 + { + 0xFFC03100, + IRQ_UART3_RX, +#ifdef CONFIG_SERIAL_BFIN_DMA + CH_UART3_TX, + CH_UART3_RX, #endif }, #endif @@ -124,15 +145,40 @@ int nr_ports = ARRAY_SIZE(bfin_serial_resource); static void bfin_serial_hw_init(struct bfin_serial_port *uart) { - unsigned short val; - val = bfin_read16(BFIN_PORT_MUX); - val &= ~(PFDE | PFTE); - bfin_write16(BFIN_PORT_MUX, val); +#ifdef CONFIG_SERIAL_BFIN_UART0 + /* Enable UART0 RX and TX on pin 7 & 8 of PORT E */ + bfin_write_PORTE_FER(0x180 | bfin_read_PORTE_FER()); + bfin_write_PORTE_MUX(0x3C000 | bfin_read_PORTE_MUX()); +#endif + +#ifdef CONFIG_SERIAL_BFIN_UART1 + /* Enable UART1 RX and TX on pin 0 & 1 of PORT H */ + bfin_write_PORTH_FER(0x3 | bfin_read_PORTH_FER()); + bfin_write_PORTH_MUX(~0xF & bfin_read_PORTH_MUX()); +#ifdef CONFIG_BFIN_UART1_CTSRTS + /* Enable UART1 RTS and CTS on pin 9 & 10 of PORT E */ + bfin_write_PORTE_FER(0x600 | bfin_read_PORTE_FER()); + bfin_write_PORTE_MUX(~0x3C0000 & bfin_read_PORTE_MUX()); +#endif +#endif - val = bfin_read16(PORTF_FER); - val |= 0xF; - bfin_write16(PORTF_FER, val); +#ifdef CONFIG_SERIAL_BFIN_UART2 + /* Enable UART2 RX and TX on pin 4 & 5 of PORT B */ + bfin_write_PORTB_FER(0x30 | bfin_read_PORTB_FER()); + bfin_write_PORTB_MUX(~0xF00 & bfin_read_PORTB_MUX()); +#endif +#ifdef CONFIG_SERIAL_BFIN_UART3 + /* Enable UART3 RX and TX on pin 6 & 7 of PORT B */ + bfin_write_PORTB_FER(0xC0 | bfin_read_PORTB_FER()); + bfin_write_PORTB_MUX(~0xF000 | bfin_read_PORTB_MUX()); +#ifdef CONFIG_BFIN_UART3_CTSRTS + /* Enable UART3 RTS and CTS on pin 2 & 3 of PORT B */ + bfin_write_PORTB_FER(0xC | bfin_read_PORTB_FER()); + bfin_write_PORTB_MUX(~0xF0 | bfin_read_PORTB_MUX()); +#endif +#endif + SSYNC(); #ifdef CONFIG_SERIAL_BFIN_CTSRTS if (uart->cts_pin >= 0) { gpio_request(uart->cts_pin, NULL); diff --git a/include/asm-blackfin/mach-bf548/blackfin.h b/include/asm-blackfin/mach-bf548/blackfin.h index 094c41a631..791218fe7d 100644 --- a/include/asm-blackfin/mach-bf548/blackfin.h +++ b/include/asm-blackfin/mach-bf548/blackfin.h @@ -34,24 +34,26 @@ #define BF548_FAMILY +#include "bf548.h" +#include "mem_map.h" +#include "anomaly.h" + #ifdef CONFIG_BF542 -#include "bf542.h" +#include "defBF542.h" +#endif #ifdef CONFIG_BF544 -#include "bf544.h" +#include "defBF544.h" #endif #ifdef CONFIG_BF548 -#include "bf548.h" +#include "defBF548.h" #endif #ifdef CONFIG_BF549 -#include "bf549.h" +#include "defBF549.h" #endif -#include "mem_map.h" -#include "anomaly.h" - #if !(defined(__ASSEMBLY__) || defined(ASSEMBLY)) #ifdef CONFIG_BF542 #include "cdefBF542.h" diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h index 6bbcefeb36..b1338000e2 100644 --- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h @@ -31,7 +31,7 @@ #ifndef _CDEF_BF54X_H #define _CDEF_BF54X_H -#include +#include "defBF54x_base.h" /* ************************************************************** */ /* SYSTEM & MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF54x */ @@ -70,12 +70,18 @@ #define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val) #define bfin_read_SIC_IMASK2() bfin_read32(SIC_IMASK2) #define bfin_write_SIC_IMASK2(val) bfin_write32(SIC_IMASK2, val) +#define bfin_read_SIC_IMASK(x) bfin_read32(SIC_IMASK0 + (x << 2)) +#define bfin_write_SIC_IMASK(x, val) bfin_write32((SIC_IMASK0 + (x << 2)), val) + #define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0) #define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val) #define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1) #define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val) #define bfin_read_SIC_ISR2() bfin_read32(SIC_ISR2) #define bfin_write_SIC_ISR2(val) bfin_write32(SIC_ISR2, val) +#define bfin_read_SIC_ISR(x) bfin_read32(SIC_ISR0 + (x << 2)) +#define bfin_write_SIC_ISR(x, val) bfin_write32((SIC_ISR0 + (x << 2)), val) + #define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0) #define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val) #define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1) @@ -710,21 +716,21 @@ #define bfin_read_MDMA_D0_NEXT_DESC_PTR() bfin_read32(MDMA_D0_NEXT_DESC_PTR) #define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_write32(MDMA_D0_NEXT_DESC_PTR) #define bfin_read_MDMA_D0_START_ADDR() bfin_read32(MDMA_D0_START_ADDR) -#define bfin_write_MDMA_D0_START_ADDR(val) bfin_write32(MDMA_D0_START_ADDR) +#define bfin_write_MDMA_D0_START_ADDR(val) bfin_write32(MDMA_D0_START_ADDR, val) #define bfin_read_MDMA_D0_CONFIG() bfin_read16(MDMA_D0_CONFIG) #define bfin_write_MDMA_D0_CONFIG(val) bfin_write16(MDMA_D0_CONFIG, val) #define bfin_read_MDMA_D0_X_COUNT() bfin_read16(MDMA_D0_X_COUNT) #define bfin_write_MDMA_D0_X_COUNT(val) bfin_write16(MDMA_D0_X_COUNT, val) #define bfin_read_MDMA_D0_X_MODIFY() bfin_read16(MDMA_D0_X_MODIFY) -#define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write16(MDMA_D0_X_MODIFY) +#define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write16(MDMA_D0_X_MODIFY, val) #define bfin_read_MDMA_D0_Y_COUNT() bfin_read16(MDMA_D0_Y_COUNT) #define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write16(MDMA_D0_Y_COUNT, val) #define bfin_read_MDMA_D0_Y_MODIFY() bfin_read16(MDMA_D0_Y_MODIFY) -#define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write16(MDMA_D0_Y_MODIFY) +#define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write16(MDMA_D0_Y_MODIFY, val) #define bfin_read_MDMA_D0_CURR_DESC_PTR() bfin_read32(MDMA_D0_CURR_DESC_PTR) -#define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_write32(MDMA_D0_CURR_DESC_PTR) +#define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_write32(MDMA_D0_CURR_DESC_PTR, val) #define bfin_read_MDMA_D0_CURR_ADDR() bfin_read32(MDMA_D0_CURR_ADDR) -#define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_write32(MDMA_D0_CURR_ADDR) +#define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_write32(MDMA_D0_CURR_ADDR, val) #define bfin_read_MDMA_D0_IRQ_STATUS() bfin_read16(MDMA_D0_IRQ_STATUS) #define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write16(MDMA_D0_IRQ_STATUS, val) #define bfin_read_MDMA_D0_PERIPHERAL_MAP() bfin_read16(MDMA_D0_PERIPHERAL_MAP) @@ -734,23 +740,23 @@ #define bfin_read_MDMA_D0_CURR_Y_COUNT() bfin_read16(MDMA_D0_CURR_Y_COUNT) #define bfin_write_MDMA_D0_CURR_Y_COUNT(val) bfin_write16(MDMA_D0_CURR_Y_COUNT, val) #define bfin_read_MDMA_S0_NEXT_DESC_PTR() bfin_read32(MDMA_S0_NEXT_DESC_PTR) -#define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_write32(MDMA_S0_NEXT_DESC_PTR) +#define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_write32(MDMA_S0_NEXT_DESC_PTR, val) #define bfin_read_MDMA_S0_START_ADDR() bfin_read32(MDMA_S0_START_ADDR) -#define bfin_write_MDMA_S0_START_ADDR(val) bfin_write32(MDMA_S0_START_ADDR) +#define bfin_write_MDMA_S0_START_ADDR(val) bfin_write32(MDMA_S0_START_ADDR, val) #define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG) #define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG, val) #define bfin_read_MDMA_S0_X_COUNT() bfin_read16(MDMA_S0_X_COUNT) #define bfin_write_MDMA_S0_X_COUNT(val) bfin_write16(MDMA_S0_X_COUNT, val) #define bfin_read_MDMA_S0_X_MODIFY() bfin_read16(MDMA_S0_X_MODIFY) -#define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write16(MDMA_S0_X_MODIFY) +#define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write16(MDMA_S0_X_MODIFY, val) #define bfin_read_MDMA_S0_Y_COUNT() bfin_read16(MDMA_S0_Y_COUNT) #define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write16(MDMA_S0_Y_COUNT, val) #define bfin_read_MDMA_S0_Y_MODIFY() bfin_read16(MDMA_S0_Y_MODIFY) -#define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write16(MDMA_S0_Y_MODIFY) +#define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write16(MDMA_S0_Y_MODIFY, val) #define bfin_read_MDMA_S0_CURR_DESC_PTR() bfin_read32(MDMA_S0_CURR_DESC_PTR) -#define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_write32(MDMA_S0_CURR_DESC_PTR) +#define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_write32(MDMA_S0_CURR_DESC_PTR, val) #define bfin_read_MDMA_S0_CURR_ADDR() bfin_read32(MDMA_S0_CURR_ADDR) -#define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_write32(MDMA_S0_CURR_ADDR) +#define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_write32(MDMA_S0_CURR_ADDR, val) #define bfin_read_MDMA_S0_IRQ_STATUS() bfin_read16(MDMA_S0_IRQ_STATUS) #define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write16(MDMA_S0_IRQ_STATUS, val) #define bfin_read_MDMA_S0_PERIPHERAL_MAP() bfin_read16(MDMA_S0_PERIPHERAL_MAP) @@ -763,9 +769,9 @@ /* MDMA Stream 1 Registers */ #define bfin_read_MDMA_D1_NEXT_DESC_PTR() bfin_read32(MDMA_D1_NEXT_DESC_PTR) -#define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_write32(MDMA_D1_NEXT_DESC_PTR) +#define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_write32(MDMA_D1_NEXT_DESC_PTR, val) #define bfin_read_MDMA_D1_START_ADDR() bfin_read32(MDMA_D1_START_ADDR) -#define bfin_write_MDMA_D1_START_ADDR(val) bfin_write32(MDMA_D1_START_ADDR) +#define bfin_write_MDMA_D1_START_ADDR(val) bfin_write32(MDMA_D1_START_ADDR, val) #define bfin_read_MDMA_D1_CONFIG() bfin_read16(MDMA_D1_CONFIG) #define bfin_write_MDMA_D1_CONFIG(val) bfin_write16(MDMA_D1_CONFIG, val) #define bfin_read_MDMA_D1_X_COUNT() bfin_read16(MDMA_D1_X_COUNT) @@ -777,9 +783,9 @@ #define bfin_read_MDMA_D1_Y_MODIFY() bfin_read16(MDMA_D1_Y_MODIFY) #define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write16(MDMA_D1_Y_MODIFY) #define bfin_read_MDMA_D1_CURR_DESC_PTR() bfin_read32(MDMA_D1_CURR_DESC_PTR) -#define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_write32(MDMA_D1_CURR_DESC_PTR) +#define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_write32(MDMA_D1_CURR_DESC_PTR, val) #define bfin_read_MDMA_D1_CURR_ADDR() bfin_read32(MDMA_D1_CURR_ADDR) -#define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_write32(MDMA_D1_CURR_ADDR) +#define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_write32(MDMA_D1_CURR_ADDR, val) #define bfin_read_MDMA_D1_IRQ_STATUS() bfin_read16(MDMA_D1_IRQ_STATUS) #define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write16(MDMA_D1_IRQ_STATUS, val) #define bfin_read_MDMA_D1_PERIPHERAL_MAP() bfin_read16(MDMA_D1_PERIPHERAL_MAP) @@ -789,9 +795,9 @@ #define bfin_read_MDMA_D1_CURR_Y_COUNT() bfin_read16(MDMA_D1_CURR_Y_COUNT) #define bfin_write_MDMA_D1_CURR_Y_COUNT(val) bfin_write16(MDMA_D1_CURR_Y_COUNT, val) #define bfin_read_MDMA_S1_NEXT_DESC_PTR() bfin_read32(MDMA_S1_NEXT_DESC_PTR) -#define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_write32(MDMA_S1_NEXT_DESC_PTR) +#define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_write32(MDMA_S1_NEXT_DESC_PTR, val) #define bfin_read_MDMA_S1_START_ADDR() bfin_read32(MDMA_S1_START_ADDR) -#define bfin_write_MDMA_S1_START_ADDR(val) bfin_write32(MDMA_S1_START_ADDR) +#define bfin_write_MDMA_S1_START_ADDR(val) bfin_write32(MDMA_S1_START_ADDR, val) #define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG) #define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG, val) #define bfin_read_MDMA_S1_X_COUNT() bfin_read16(MDMA_S1_X_COUNT) @@ -803,9 +809,9 @@ #define bfin_read_MDMA_S1_Y_MODIFY() bfin_read16(MDMA_S1_Y_MODIFY) #define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write16(MDMA_S1_Y_MODIFY) #define bfin_read_MDMA_S1_CURR_DESC_PTR() bfin_read32(MDMA_S1_CURR_DESC_PTR) -#define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_write32(MDMA_S1_CURR_DESC_PTR) +#define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_write32(MDMA_S1_CURR_DESC_PTR, val) #define bfin_read_MDMA_S1_CURR_ADDR() bfin_read32(MDMA_S1_CURR_ADDR) -#define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_write32(MDMA_S1_CURR_ADDR) +#define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_write32(MDMA_S1_CURR_ADDR, val) #define bfin_read_MDMA_S1_IRQ_STATUS() bfin_read16(MDMA_S1_IRQ_STATUS) #define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write16(MDMA_S1_IRQ_STATUS, val) #define bfin_read_MDMA_S1_PERIPHERAL_MAP() bfin_read16(MDMA_S1_PERIPHERAL_MAP) diff --git a/include/asm-blackfin/mach-bf548/defBF542.h b/include/asm-blackfin/mach-bf548/defBF542.h index ac968fca5c..32d0713020 100644 --- a/include/asm-blackfin/mach-bf548/defBF542.h +++ b/include/asm-blackfin/mach-bf548/defBF542.h @@ -362,7 +362,6 @@ /* Bit masks for KPAD_CTL */ #define KPAD_EN 0x1 /* Keypad Enable */ -#define nKPAD_EN 0x0 #define KPAD_IRQMODE 0x6 /* Key Press Interrupt Enable */ #define KPAD_ROWEN 0x1c00 /* Row Enable Width */ #define KPAD_COLEN 0xe000 /* Column Enable Width */ @@ -384,29 +383,21 @@ /* Bit masks for KPAD_STAT */ #define KPAD_IRQ 0x1 /* Keypad Interrupt Status */ -#define nKPAD_IRQ 0x0 #define KPAD_MROWCOL 0x6 /* Multiple Row/Column Keypress Status */ #define KPAD_PRESSED 0x8 /* Key press current status */ -#define nKPAD_PRESSED 0x0 /* Bit masks for KPAD_SOFTEVAL */ #define KPAD_SOFTEVAL_E 0x2 /* Software Programmable Force Evaluate */ -#define nKPAD_SOFTEVAL_E 0x0 /* Bit masks for SDH_COMMAND */ #define CMD_IDX 0x3f /* Command Index */ #define CMD_RSP 0x40 /* Response */ -#define nCMD_RSP 0x0 #define CMD_L_RSP 0x80 /* Long Response */ -#define nCMD_L_RSP 0x0 #define CMD_INT_E 0x100 /* Command Interrupt */ -#define nCMD_INT_E 0x0 #define CMD_PEND_E 0x200 /* Command Pending */ -#define nCMD_PEND_E 0x0 #define CMD_E 0x400 /* Command Enable */ -#define nCMD_E 0x0 /* Bit masks for SDH_PWR_CTL */ @@ -415,21 +406,15 @@ #define TBD 0x3c /* TBD */ #endif #define SD_CMD_OD 0x40 /* Open Drain Output */ -#define nSD_CMD_OD 0x0 #define ROD_CTL 0x80 /* Rod Control */ -#define nROD_CTL 0x0 /* Bit masks for SDH_CLK_CTL */ #define CLKDIV 0xff /* MC_CLK Divisor */ #define CLK_E 0x100 /* MC_CLK Bus Clock Enable */ -#define nCLK_E 0x0 #define PWR_SV_E 0x200 /* Power Save Enable */ -#define nPWR_SV_E 0x0 #define CLKDIV_BYPASS 0x400 /* Bypass Divisor */ -#define nCLKDIV_BYPASS 0x0 #define WIDE_BUS 0x800 /* Wide Bus Mode Enable */ -#define nWIDE_BUS 0x0 /* Bit masks for SDH_RESP_CMD */ @@ -438,133 +423,74 @@ /* Bit masks for SDH_DATA_CTL */ #define DTX_E 0x1 /* Data Transfer Enable */ -#define nDTX_E 0x0 #define DTX_DIR 0x2 /* Data Transfer Direction */ -#define nDTX_DIR 0x0 #define DTX_MODE 0x4 /* Data Transfer Mode */ -#define nDTX_MODE 0x0 #define DTX_DMA_E 0x8 /* Data Transfer DMA Enable */ -#define nDTX_DMA_E 0x0 #define DTX_BLK_LGTH 0xf0 /* Data Transfer Block Length */ /* Bit masks for SDH_STATUS */ #define CMD_CRC_FAIL 0x1 /* CMD CRC Fail */ -#define nCMD_CRC_FAIL 0x0 #define DAT_CRC_FAIL 0x2 /* Data CRC Fail */ -#define nDAT_CRC_FAIL 0x0 #define CMD_TIMEOUT 0x4 /* CMD Time Out */ -#define nCMD_TIMEOUT 0x0 #define DAT_TIMEOUT 0x8 /* Data Time Out */ -#define nDAT_TIMEOUT 0x0 #define TX_UNDERRUN 0x10 /* Transmit Underrun */ -#define nTX_UNDERRUN 0x0 #define RX_OVERRUN 0x20 /* Receive Overrun */ -#define nRX_OVERRUN 0x0 #define CMD_RESP_END 0x40 /* CMD Response End */ -#define nCMD_RESP_END 0x0 #define CMD_SENT 0x80 /* CMD Sent */ -#define nCMD_SENT 0x0 #define DAT_END 0x100 /* Data End */ -#define nDAT_END 0x0 #define START_BIT_ERR 0x200 /* Start Bit Error */ -#define nSTART_BIT_ERR 0x0 #define DAT_BLK_END 0x400 /* Data Block End */ -#define nDAT_BLK_END 0x0 #define CMD_ACT 0x800 /* CMD Active */ -#define nCMD_ACT 0x0 #define TX_ACT 0x1000 /* Transmit Active */ -#define nTX_ACT 0x0 #define RX_ACT 0x2000 /* Receive Active */ -#define nRX_ACT 0x0 #define TX_FIFO_STAT 0x4000 /* Transmit FIFO Status */ -#define nTX_FIFO_STAT 0x0 #define RX_FIFO_STAT 0x8000 /* Receive FIFO Status */ -#define nRX_FIFO_STAT 0x0 #define TX_FIFO_FULL 0x10000 /* Transmit FIFO Full */ -#define nTX_FIFO_FULL 0x0 #define RX_FIFO_FULL 0x20000 /* Receive FIFO Full */ -#define nRX_FIFO_FULL 0x0 #define TX_FIFO_ZERO 0x40000 /* Transmit FIFO Empty */ -#define nTX_FIFO_ZERO 0x0 #define RX_DAT_ZERO 0x80000 /* Receive FIFO Empty */ -#define nRX_DAT_ZERO 0x0 #define TX_DAT_RDY 0x100000 /* Transmit Data Available */ -#define nTX_DAT_RDY 0x0 #define RX_FIFO_RDY 0x200000 /* Receive Data Available */ -#define nRX_FIFO_RDY 0x0 /* Bit masks for SDH_STATUS_CLR */ #define CMD_CRC_FAIL_STAT 0x1 /* CMD CRC Fail Status */ -#define nCMD_CRC_FAIL_STAT 0x0 #define DAT_CRC_FAIL_STAT 0x2 /* Data CRC Fail Status */ -#define nDAT_CRC_FAIL_STAT 0x0 #define CMD_TIMEOUT_STAT 0x4 /* CMD Time Out Status */ -#define nCMD_TIMEOUT_STAT 0x0 #define DAT_TIMEOUT_STAT 0x8 /* Data Time Out status */ -#define nDAT_TIMEOUT_STAT 0x0 #define TX_UNDERRUN_STAT 0x10 /* Transmit Underrun Status */ -#define nTX_UNDERRUN_STAT 0x0 #define RX_OVERRUN_STAT 0x20 /* Receive Overrun Status */ -#define nRX_OVERRUN_STAT 0x0 #define CMD_RESP_END_STAT 0x40 /* CMD Response End Status */ -#define nCMD_RESP_END_STAT 0x0 #define CMD_SENT_STAT 0x80 /* CMD Sent Status */ -#define nCMD_SENT_STAT 0x0 #define DAT_END_STAT 0x100 /* Data End Status */ -#define nDAT_END_STAT 0x0 #define START_BIT_ERR_STAT 0x200 /* Start Bit Error Status */ -#define nSTART_BIT_ERR_STAT 0x0 #define DAT_BLK_END_STAT 0x400 /* Data Block End Status */ -#define nDAT_BLK_END_STAT 0x0 /* Bit masks for SDH_MASK0 */ #define CMD_CRC_FAIL_MASK 0x1 /* CMD CRC Fail Mask */ -#define nCMD_CRC_FAIL_MASK 0x0 #define DAT_CRC_FAIL_MASK 0x2 /* Data CRC Fail Mask */ -#define nDAT_CRC_FAIL_MASK 0x0 #define CMD_TIMEOUT_MASK 0x4 /* CMD Time Out Mask */ -#define nCMD_TIMEOUT_MASK 0x0 #define DAT_TIMEOUT_MASK 0x8 /* Data Time Out Mask */ -#define nDAT_TIMEOUT_MASK 0x0 #define TX_UNDERRUN_MASK 0x10 /* Transmit Underrun Mask */ -#define nTX_UNDERRUN_MASK 0x0 #define RX_OVERRUN_MASK 0x20 /* Receive Overrun Mask */ -#define nRX_OVERRUN_MASK 0x0 #define CMD_RESP_END_MASK 0x40 /* CMD Response End Mask */ -#define nCMD_RESP_END_MASK 0x0 #define CMD_SENT_MASK 0x80 /* CMD Sent Mask */ -#define nCMD_SENT_MASK 0x0 #define DAT_END_MASK 0x100 /* Data End Mask */ -#define nDAT_END_MASK 0x0 #define START_BIT_ERR_MASK 0x200 /* Start Bit Error Mask */ -#define nSTART_BIT_ERR_MASK 0x0 #define DAT_BLK_END_MASK 0x400 /* Data Block End Mask */ -#define nDAT_BLK_END_MASK 0x0 #define CMD_ACT_MASK 0x800 /* CMD Active Mask */ -#define nCMD_ACT_MASK 0x0 #define TX_ACT_MASK 0x1000 /* Transmit Active Mask */ -#define nTX_ACT_MASK 0x0 #define RX_ACT_MASK 0x2000 /* Receive Active Mask */ -#define nRX_ACT_MASK 0x0 #define TX_FIFO_STAT_MASK 0x4000 /* Transmit FIFO Status Mask */ -#define nTX_FIFO_STAT_MASK 0x0 #define RX_FIFO_STAT_MASK 0x8000 /* Receive FIFO Status Mask */ -#define nRX_FIFO_STAT_MASK 0x0 #define TX_FIFO_FULL_MASK 0x10000 /* Transmit FIFO Full Mask */ -#define nTX_FIFO_FULL_MASK 0x0 #define RX_FIFO_FULL_MASK 0x20000 /* Receive FIFO Full Mask */ -#define nRX_FIFO_FULL_MASK 0x0 #define TX_FIFO_ZERO_MASK 0x40000 /* Transmit FIFO Empty Mask */ -#define nTX_FIFO_ZERO_MASK 0x0 #define RX_DAT_ZERO_MASK 0x80000 /* Receive FIFO Empty Mask */ -#define nRX_DAT_ZERO_MASK 0x0 #define TX_DAT_RDY_MASK 0x100000 /* Transmit Data Available Mask */ -#define nTX_DAT_RDY_MASK 0x0 #define RX_FIFO_RDY_MASK 0x200000 /* Receive Data Available Mask */ -#define nRX_FIFO_RDY_MASK 0x0 /* Bit masks for SDH_FIFO_CNT */ @@ -573,73 +499,47 @@ /* Bit masks for SDH_E_STATUS */ #define SDIO_INT_DET 0x2 /* SDIO Int Detected */ -#define nSDIO_INT_DET 0x0 #define SD_CARD_DET 0x10 /* SD Card Detect */ -#define nSD_CARD_DET 0x0 /* Bit masks for SDH_E_MASK */ #define SDIO_MSK 0x2 /* Mask SDIO Int Detected */ -#define nSDIO_MSK 0x0 #define SCD_MSK 0x40 /* Mask Card Detect */ -#define nSCD_MSK 0x0 /* Bit masks for SDH_CFG */ #define CLKS_EN 0x1 /* Clocks Enable */ -#define nCLKS_EN 0x0 #define SD4E 0x4 /* SDIO 4-Bit Enable */ -#define nSD4E 0x0 #define MWE 0x8 /* Moving Window Enable */ -#define nMWE 0x0 #define SD_RST 0x10 /* SDMMC Reset */ -#define nSD_RST 0x0 #define PUP_SDDAT 0x20 /* Pull-up SD_DAT */ -#define nPUP_SDDAT 0x0 #define PUP_SDDAT3 0x40 /* Pull-up SD_DAT3 */ -#define nPUP_SDDAT3 0x0 #define PD_SDDAT3 0x80 /* Pull-down SD_DAT3 */ -#define nPD_SDDAT3 0x0 /* Bit masks for SDH_RD_WAIT_EN */ #define RWR 0x1 /* Read Wait Request */ -#define nRWR 0x0 /* Bit masks for ATAPI_CONTROL */ #define PIO_START 0x1 /* Start PIO/Reg Op */ -#define nPIO_START 0x0 #define MULTI_START 0x2 /* Start Multi-DMA Op */ -#define nMULTI_START 0x0 #define ULTRA_START 0x4 /* Start Ultra-DMA Op */ -#define nULTRA_START 0x0 #define XFER_DIR 0x8 /* Transfer Direction */ -#define nXFER_DIR 0x0 #define IORDY_EN 0x10 /* IORDY Enable */ -#define nIORDY_EN 0x0 #define FIFO_FLUSH 0x20 /* Flush FIFOs */ -#define nFIFO_FLUSH 0x0 #define SOFT_RST 0x40 /* Soft Reset */ -#define nSOFT_RST 0x0 #define DEV_RST 0x80 /* Device Reset */ -#define nDEV_RST 0x0 #define TFRCNT_RST 0x100 /* Trans Count Reset */ -#define nTFRCNT_RST 0x0 #define END_ON_TERM 0x200 /* End/Terminate Select */ -#define nEND_ON_TERM 0x0 #define PIO_USE_DMA 0x400 /* PIO-DMA Enable */ -#define nPIO_USE_DMA 0x0 #define UDMAIN_FIFO_THRS 0xf000 /* Ultra DMA-IN FIFO Threshold */ /* Bit masks for ATAPI_STATUS */ #define PIO_XFER_ON 0x1 /* PIO transfer in progress */ -#define nPIO_XFER_ON 0x0 #define MULTI_XFER_ON 0x2 /* Multi-word DMA transfer in progress */ -#define nMULTI_XFER_ON 0x0 #define ULTRA_XFER_ON 0x4 /* Ultra DMA transfer in progress */ -#define nULTRA_XFER_ON 0x0 #define ULTRA_IN_FL 0xf0 /* Ultra DMA Input FIFO Level */ /* Bit masks for ATAPI_DEV_ADDR */ @@ -649,66 +549,39 @@ /* Bit masks for ATAPI_INT_MASK */ #define ATAPI_DEV_INT_MASK 0x1 /* Device interrupt mask */ -#define nATAPI_DEV_INT_MASK 0x0 #define PIO_DONE_MASK 0x2 /* PIO transfer done interrupt mask */ -#define nPIO_DONE_MASK 0x0 #define MULTI_DONE_MASK 0x4 /* Multi-DMA transfer done interrupt mask */ -#define nMULTI_DONE_MASK 0x0 #define UDMAIN_DONE_MASK 0x8 /* Ultra-DMA in transfer done interrupt mask */ -#define nUDMAIN_DONE_MASK 0x0 #define UDMAOUT_DONE_MASK 0x10 /* Ultra-DMA out transfer done interrupt mask */ -#define nUDMAOUT_DONE_MASK 0x0 #define HOST_TERM_XFER_MASK 0x20 /* Host terminate current transfer interrupt mask */ -#define nHOST_TERM_XFER_MASK 0x0 #define MULTI_TERM_MASK 0x40 /* Device terminate Multi-DMA transfer interrupt mask */ -#define nMULTI_TERM_MASK 0x0 #define UDMAIN_TERM_MASK 0x80 /* Device terminate Ultra-DMA-in transfer interrupt mask */ -#define nUDMAIN_TERM_MASK 0x0 #define UDMAOUT_TERM_MASK 0x100 /* Device terminate Ultra-DMA-out transfer interrupt mask */ -#define nUDMAOUT_TERM_MASK 0x0 /* Bit masks for ATAPI_INT_STATUS */ #define ATAPI_DEV_INT 0x1 /* Device interrupt status */ -#define nATAPI_DEV_INT 0x0 #define PIO_DONE_INT 0x2 /* PIO transfer done interrupt status */ -#define nPIO_DONE_INT 0x0 #define MULTI_DONE_INT 0x4 /* Multi-DMA transfer done interrupt status */ -#define nMULTI_DONE_INT 0x0 #define UDMAIN_DONE_INT 0x8 /* Ultra-DMA in transfer done interrupt status */ -#define nUDMAIN_DONE_INT 0x0 #define UDMAOUT_DONE_INT 0x10 /* Ultra-DMA out transfer done interrupt status */ -#define nUDMAOUT_DONE_INT 0x0 #define HOST_TERM_XFER_INT 0x20 /* Host terminate current transfer interrupt status */ -#define nHOST_TERM_XFER_INT 0x0 #define MULTI_TERM_INT 0x40 /* Device terminate Multi-DMA transfer interrupt status */ -#define nMULTI_TERM_INT 0x0 #define UDMAIN_TERM_INT 0x80 /* Device terminate Ultra-DMA-in transfer interrupt status */ -#define nUDMAIN_TERM_INT 0x0 #define UDMAOUT_TERM_INT 0x100 /* Device terminate Ultra-DMA-out transfer interrupt status */ -#define nUDMAOUT_TERM_INT 0x0 /* Bit masks for ATAPI_LINE_STATUS */ #define ATAPI_INTR 0x1 /* Device interrupt to host line status */ -#define nATAPI_INTR 0x0 #define ATAPI_DASP 0x2 /* Device dasp to host line status */ -#define nATAPI_DASP 0x0 #define ATAPI_CS0N 0x4 /* ATAPI chip select 0 line status */ -#define nATAPI_CS0N 0x0 #define ATAPI_CS1N 0x8 /* ATAPI chip select 1 line status */ -#define nATAPI_CS1N 0x0 #define ATAPI_ADDR 0x70 /* ATAPI address line status */ #define ATAPI_DMAREQ 0x80 /* ATAPI DMA request line status */ -#define nATAPI_DMAREQ 0x0 #define ATAPI_DMAACKN 0x100 /* ATAPI DMA acknowledge line status */ -#define nATAPI_DMAACKN 0x0 #define ATAPI_DIOWN 0x200 /* ATAPI write line status */ -#define nATAPI_DIOWN 0x0 #define ATAPI_DIORN 0x400 /* ATAPI read line status */ -#define nATAPI_DIORN 0x0 #define ATAPI_IORDY 0x800 /* ATAPI IORDY line status */ -#define nATAPI_IORDY 0x0 /* Bit masks for ATAPI_SM_STATE */ @@ -720,7 +593,6 @@ /* Bit masks for ATAPI_TERMINATE */ #define ATAPI_HOST_TERM 0x1 /* Host terminationation */ -#define nATAPI_HOST_TERM 0x0 /* Bit masks for ATAPI_REG_TIM_0 */ @@ -779,131 +651,77 @@ /* Bit masks for USB_POWER */ #define ENABLE_SUSPENDM 0x1 /* enable SuspendM output */ -#define nENABLE_SUSPENDM 0x0 #define SUSPEND_MODE 0x2 /* Suspend Mode indicator */ -#define nSUSPEND_MODE 0x0 #define RESUME_MODE 0x4 /* DMA Mode */ -#define nRESUME_MODE 0x0 #define RESET 0x8 /* Reset indicator */ -#define nRESET 0x0 #define HS_MODE 0x10 /* High Speed mode indicator */ -#define nHS_MODE 0x0 #define HS_ENABLE 0x20 /* high Speed Enable */ -#define nHS_ENABLE 0x0 #define SOFT_CONN 0x40 /* Soft connect */ -#define nSOFT_CONN 0x0 #define ISO_UPDATE 0x80 /* Isochronous update */ -#define nISO_UPDATE 0x0 /* Bit masks for USB_INTRTX */ #define EP0_TX 0x1 /* Tx Endpoint 0 interrupt */ -#define nEP0_TX 0x0 #define EP1_TX 0x2 /* Tx Endpoint 1 interrupt */ -#define nEP1_TX 0x0 #define EP2_TX 0x4 /* Tx Endpoint 2 interrupt */ -#define nEP2_TX 0x0 #define EP3_TX 0x8 /* Tx Endpoint 3 interrupt */ -#define nEP3_TX 0x0 #define EP4_TX 0x10 /* Tx Endpoint 4 interrupt */ -#define nEP4_TX 0x0 #define EP5_TX 0x20 /* Tx Endpoint 5 interrupt */ -#define nEP5_TX 0x0 #define EP6_TX 0x40 /* Tx Endpoint 6 interrupt */ -#define nEP6_TX 0x0 #define EP7_TX 0x80 /* Tx Endpoint 7 interrupt */ -#define nEP7_TX 0x0 /* Bit masks for USB_INTRRX */ #define EP1_RX 0x2 /* Rx Endpoint 1 interrupt */ -#define nEP1_RX 0x0 #define EP2_RX 0x4 /* Rx Endpoint 2 interrupt */ -#define nEP2_RX 0x0 #define EP3_RX 0x8 /* Rx Endpoint 3 interrupt */ -#define nEP3_RX 0x0 #define EP4_RX 0x10 /* Rx Endpoint 4 interrupt */ -#define nEP4_RX 0x0 #define EP5_RX 0x20 /* Rx Endpoint 5 interrupt */ -#define nEP5_RX 0x0 #define EP6_RX 0x40 /* Rx Endpoint 6 interrupt */ -#define nEP6_RX 0x0 #define EP7_RX 0x80 /* Rx Endpoint 7 interrupt */ -#define nEP7_RX 0x0 /* Bit masks for USB_INTRTXE */ #define EP0_TX_E 0x1 /* Endpoint 0 interrupt Enable */ -#define nEP0_TX_E 0x0 #define EP1_TX_E 0x2 /* Tx Endpoint 1 interrupt Enable */ -#define nEP1_TX_E 0x0 #define EP2_TX_E 0x4 /* Tx Endpoint 2 interrupt Enable */ -#define nEP2_TX_E 0x0 #define EP3_TX_E 0x8 /* Tx Endpoint 3 interrupt Enable */ -#define nEP3_TX_E 0x0 #define EP4_TX_E 0x10 /* Tx Endpoint 4 interrupt Enable */ -#define nEP4_TX_E 0x0 #define EP5_TX_E 0x20 /* Tx Endpoint 5 interrupt Enable */ -#define nEP5_TX_E 0x0 #define EP6_TX_E 0x40 /* Tx Endpoint 6 interrupt Enable */ -#define nEP6_TX_E 0x0 #define EP7_TX_E 0x80 /* Tx Endpoint 7 interrupt Enable */ -#define nEP7_TX_E 0x0 /* Bit masks for USB_INTRRXE */ #define EP1_RX_E 0x2 /* Rx Endpoint 1 interrupt Enable */ -#define nEP1_RX_E 0x0 #define EP2_RX_E 0x4 /* Rx Endpoint 2 interrupt Enable */ -#define nEP2_RX_E 0x0 #define EP3_RX_E 0x8 /* Rx Endpoint 3 interrupt Enable */ -#define nEP3_RX_E 0x0 #define EP4_RX_E 0x10 /* Rx Endpoint 4 interrupt Enable */ -#define nEP4_RX_E 0x0 #define EP5_RX_E 0x20 /* Rx Endpoint 5 interrupt Enable */ -#define nEP5_RX_E 0x0 #define EP6_RX_E 0x40 /* Rx Endpoint 6 interrupt Enable */ -#define nEP6_RX_E 0x0 #define EP7_RX_E 0x80 /* Rx Endpoint 7 interrupt Enable */ -#define nEP7_RX_E 0x0 /* Bit masks for USB_INTRUSB */ #define SUSPEND_B 0x1 /* Suspend indicator */ -#define nSUSPEND_B 0x0 #define RESUME_B 0x2 /* Resume indicator */ -#define nRESUME_B 0x0 #define RESET_OR_BABLE_B 0x4 /* Reset/babble indicator */ -#define nRESET_OR_BABLE_B 0x0 #define SOF_B 0x8 /* Start of frame */ -#define nSOF_B 0x0 #define CONN_B 0x10 /* Connection indicator */ -#define nCONN_B 0x0 #define DISCON_B 0x20 /* Disconnect indicator */ -#define nDISCON_B 0x0 #define SESSION_REQ_B 0x40 /* Session Request */ -#define nSESSION_REQ_B 0x0 #define VBUS_ERROR_B 0x80 /* Vbus threshold indicator */ -#define nVBUS_ERROR_B 0x0 /* Bit masks for USB_INTRUSBE */ #define SUSPEND_BE 0x1 /* Suspend indicator int enable */ -#define nSUSPEND_BE 0x0 #define RESUME_BE 0x2 /* Resume indicator int enable */ -#define nRESUME_BE 0x0 #define RESET_OR_BABLE_BE 0x4 /* Reset/babble indicator int enable */ -#define nRESET_OR_BABLE_BE 0x0 #define SOF_BE 0x8 /* Start of frame int enable */ -#define nSOF_BE 0x0 #define CONN_BE 0x10 /* Connection indicator int enable */ -#define nCONN_BE 0x0 #define DISCON_BE 0x20 /* Disconnect indicator int enable */ -#define nDISCON_BE 0x0 #define SESSION_REQ_BE 0x40 /* Session Request int enable */ -#define nSESSION_REQ_BE 0x0 #define VBUS_ERROR_BE 0x80 /* Vbus threshold indicator int enable */ -#define nVBUS_ERROR_BE 0x0 /* Bit masks for USB_FRAME */ @@ -916,117 +734,67 @@ /* Bit masks for USB_GLOBAL_CTL */ #define GLOBAL_ENA 0x1 /* enables USB module */ -#define nGLOBAL_ENA 0x0 #define EP1_TX_ENA 0x2 /* Transmit endpoint 1 enable */ -#define nEP1_TX_ENA 0x0 #define EP2_TX_ENA 0x4 /* Transmit endpoint 2 enable */ -#define nEP2_TX_ENA 0x0 #define EP3_TX_ENA 0x8 /* Transmit endpoint 3 enable */ -#define nEP3_TX_ENA 0x0 #define EP4_TX_ENA 0x10 /* Transmit endpoint 4 enable */ -#define nEP4_TX_ENA 0x0 #define EP5_TX_ENA 0x20 /* Transmit endpoint 5 enable */ -#define nEP5_TX_ENA 0x0 #define EP6_TX_ENA 0x40 /* Transmit endpoint 6 enable */ -#define nEP6_TX_ENA 0x0 #define EP7_TX_ENA 0x80 /* Transmit endpoint 7 enable */ -#define nEP7_TX_ENA 0x0 #define EP1_RX_ENA 0x100 /* Receive endpoint 1 enable */ -#define nEP1_RX_ENA 0x0 #define EP2_RX_ENA 0x200 /* Receive endpoint 2 enable */ -#define nEP2_RX_ENA 0x0 #define EP3_RX_ENA 0x400 /* Receive endpoint 3 enable */ -#define nEP3_RX_ENA 0x0 #define EP4_RX_ENA 0x800 /* Receive endpoint 4 enable */ -#define nEP4_RX_ENA 0x0 #define EP5_RX_ENA 0x1000 /* Receive endpoint 5 enable */ -#define nEP5_RX_ENA 0x0 #define EP6_RX_ENA 0x2000 /* Receive endpoint 6 enable */ -#define nEP6_RX_ENA 0x0 #define EP7_RX_ENA 0x4000 /* Receive endpoint 7 enable */ -#define nEP7_RX_ENA 0x0 /* Bit masks for USB_OTG_DEV_CTL */ #define SESSION 0x1 /* session indicator */ -#define nSESSION 0x0 #define HOST_REQ 0x2 /* Host negotiation request */ -#define nHOST_REQ 0x0 #define HOST_MODE 0x4 /* indicates USBDRC is a host */ -#define nHOST_MODE 0x0 #define VBUS0 0x8 /* Vbus level indicator[0] */ -#define nVBUS0 0x0 #define VBUS1 0x10 /* Vbus level indicator[1] */ -#define nVBUS1 0x0 #define LSDEV 0x20 /* Low-speed indicator */ -#define nLSDEV 0x0 #define FSDEV 0x40 /* Full or High-speed indicator */ -#define nFSDEV 0x0 #define B_DEVICE 0x80 /* A' or 'B' device indicator */ -#define nB_DEVICE 0x0 /* Bit masks for USB_OTG_VBUS_IRQ */ #define DRIVE_VBUS_ON 0x1 /* indicator to drive VBUS control circuit */ -#define nDRIVE_VBUS_ON 0x0 #define DRIVE_VBUS_OFF 0x2 /* indicator to shut off charge pump */ -#define nDRIVE_VBUS_OFF 0x0 #define CHRG_VBUS_START 0x4 /* indicator for external circuit to start charging VBUS */ -#define nCHRG_VBUS_START 0x0 #define CHRG_VBUS_END 0x8 /* indicator for external circuit to end charging VBUS */ -#define nCHRG_VBUS_END 0x0 #define DISCHRG_VBUS_START 0x10 /* indicator to start discharging VBUS */ -#define nDISCHRG_VBUS_START 0x0 #define DISCHRG_VBUS_END 0x20 /* indicator to stop discharging VBUS */ -#define nDISCHRG_VBUS_END 0x0 /* Bit masks for USB_OTG_VBUS_MASK */ #define DRIVE_VBUS_ON_ENA 0x1 /* enable DRIVE_VBUS_ON interrupt */ -#define nDRIVE_VBUS_ON_ENA 0x0 #define DRIVE_VBUS_OFF_ENA 0x2 /* enable DRIVE_VBUS_OFF interrupt */ -#define nDRIVE_VBUS_OFF_ENA 0x0 #define CHRG_VBUS_START_ENA 0x4 /* enable CHRG_VBUS_START interrupt */ -#define nCHRG_VBUS_START_ENA 0x0 #define CHRG_VBUS_END_ENA 0x8 /* enable CHRG_VBUS_END interrupt */ -#define nCHRG_VBUS_END_ENA 0x0 #define DISCHRG_VBUS_START_ENA 0x10 /* enable DISCHRG_VBUS_START interrupt */ -#define nDISCHRG_VBUS_START_ENA 0x0 #define DISCHRG_VBUS_END_ENA 0x20 /* enable DISCHRG_VBUS_END interrupt */ -#define nDISCHRG_VBUS_END_ENA 0x0 /* Bit masks for USB_CSR0 */ #define RXPKTRDY 0x1 /* data packet receive indicator */ -#define nRXPKTRDY 0x0 #define TXPKTRDY 0x2 /* data packet in FIFO indicator */ -#define nTXPKTRDY 0x0 #define STALL_SENT 0x4 /* STALL handshake sent */ -#define nSTALL_SENT 0x0 #define DATAEND 0x8 /* Data end indicator */ -#define nDATAEND 0x0 #define SETUPEND 0x10 /* Setup end */ -#define nSETUPEND 0x0 #define SENDSTALL 0x20 /* Send STALL handshake */ -#define nSENDSTALL 0x0 #define SERVICED_RXPKTRDY 0x40 /* used to clear the RxPktRdy bit */ -#define nSERVICED_RXPKTRDY 0x0 #define SERVICED_SETUPEND 0x80 /* used to clear the SetupEnd bit */ -#define nSERVICED_SETUPEND 0x0 #define FLUSHFIFO 0x100 /* flush endpoint FIFO */ -#define nFLUSHFIFO 0x0 #define STALL_RECEIVED_H 0x4 /* STALL handshake received host mode */ -#define nSTALL_RECEIVED_H 0x0 #define SETUPPKT_H 0x8 /* send Setup token host mode */ -#define nSETUPPKT_H 0x0 #define ERROR_H 0x10 /* timeout error indicator host mode */ -#define nERROR_H 0x0 #define REQPKT_H 0x20 /* Request an IN transaction host mode */ -#define nREQPKT_H 0x0 #define STATUSPKT_H 0x40 /* Status stage transaction host mode */ -#define nSTATUSPKT_H 0x0 #define NAK_TIMEOUT_H 0x80 /* EP0 halted after a NAK host mode */ -#define nNAK_TIMEOUT_H 0x0 /* Bit masks for USB_COUNT0 */ @@ -1047,37 +815,21 @@ /* Bit masks for USB_TXCSR */ #define TXPKTRDY_T 0x1 /* data packet in FIFO indicator */ -#define nTXPKTRDY_T 0x0 #define FIFO_NOT_EMPTY_T 0x2 /* FIFO not empty */ -#define nFIFO_NOT_EMPTY_T 0x0 #define UNDERRUN_T 0x4 /* TxPktRdy not set for an IN token */ -#define nUNDERRUN_T 0x0 #define FLUSHFIFO_T 0x8 /* flush endpoint FIFO */ -#define nFLUSHFIFO_T 0x0 #define STALL_SEND_T 0x10 /* issue a Stall handshake */ -#define nSTALL_SEND_T 0x0 #define STALL_SENT_T 0x20 /* Stall handshake transmitted */ -#define nSTALL_SENT_T 0x0 #define CLEAR_DATATOGGLE_T 0x40 /* clear endpoint data toggle */ -#define nCLEAR_DATATOGGLE_T 0x0 #define INCOMPTX_T 0x80 /* indicates that a large packet is split */ -#define nINCOMPTX_T 0x0 #define DMAREQMODE_T 0x400 /* DMA mode (0 or 1) selection */ -#define nDMAREQMODE_T 0x0 #define FORCE_DATATOGGLE_T 0x800 /* Force data toggle */ -#define nFORCE_DATATOGGLE_T 0x0 #define DMAREQ_ENA_T 0x1000 /* Enable DMA request for Tx EP */ -#define nDMAREQ_ENA_T 0x0 #define ISO_T 0x4000 /* enable Isochronous transfers */ -#define nISO_T 0x0 #define AUTOSET_T 0x8000 /* allows TxPktRdy to be set automatically */ -#define nAUTOSET_T 0x0 #define ERROR_TH 0x4 /* error condition host mode */ -#define nERROR_TH 0x0 #define STALL_RECEIVED_TH 0x20 /* Stall handshake received host mode */ -#define nSTALL_RECEIVED_TH 0x0 #define NAK_TIMEOUT_TH 0x80 /* NAK timeout host mode */ -#define nNAK_TIMEOUT_TH 0x0 /* Bit masks for USB_TXCOUNT */ @@ -1086,45 +838,25 @@ /* Bit masks for USB_RXCSR */ #define RXPKTRDY_R 0x1 /* data packet in FIFO indicator */ -#define nRXPKTRDY_R 0x0 #define FIFO_FULL_R 0x2 /* FIFO not empty */ -#define nFIFO_FULL_R 0x0 #define OVERRUN_R 0x4 /* TxPktRdy not set for an IN token */ -#define nOVERRUN_R 0x0 #define DATAERROR_R 0x8 /* Out packet cannot be loaded into Rx FIFO */ -#define nDATAERROR_R 0x0 #define FLUSHFIFO_R 0x10 /* flush endpoint FIFO */ -#define nFLUSHFIFO_R 0x0 #define STALL_SEND_R 0x20 /* issue a Stall handshake */ -#define nSTALL_SEND_R 0x0 #define STALL_SENT_R 0x40 /* Stall handshake transmitted */ -#define nSTALL_SENT_R 0x0 #define CLEAR_DATATOGGLE_R 0x80 /* clear endpoint data toggle */ -#define nCLEAR_DATATOGGLE_R 0x0 #define INCOMPRX_R 0x100 /* indicates that a large packet is split */ -#define nINCOMPRX_R 0x0 #define DMAREQMODE_R 0x800 /* DMA mode (0 or 1) selection */ -#define nDMAREQMODE_R 0x0 #define DISNYET_R 0x1000 /* disable Nyet handshakes */ -#define nDISNYET_R 0x0 #define DMAREQ_ENA_R 0x2000 /* Enable DMA request for Tx EP */ -#define nDMAREQ_ENA_R 0x0 #define ISO_R 0x4000 /* enable Isochronous transfers */ -#define nISO_R 0x0 #define AUTOCLEAR_R 0x8000 /* allows TxPktRdy to be set automatically */ -#define nAUTOCLEAR_R 0x0 #define ERROR_RH 0x4 /* TxPktRdy not set for an IN token host mode */ -#define nERROR_RH 0x0 #define REQPKT_RH 0x20 /* request an IN transaction host mode */ -#define nREQPKT_RH 0x0 #define STALL_RECEIVED_RH 0x40 /* Stall handshake received host mode */ -#define nSTALL_RECEIVED_RH 0x0 #define INCOMPRX_RH 0x100 /* indicates that a large packet is split host mode */ -#define nINCOMPRX_RH 0x0 #define DMAREQMODE_RH 0x800 /* DMA mode (0 or 1) selection host mode */ -#define nDMAREQMODE_RH 0x0 #define AUTOREQ_RH 0x4000 /* sets ReqPkt automatically host mode */ -#define nAUTOREQ_RH 0x0 /* Bit masks for USB_RXCOUNT */ @@ -1151,35 +883,22 @@ /* Bit masks for USB_DMA_INTERRUPT */ #define DMA0_INT 0x1 /* DMA0 pending interrupt */ -#define nDMA0_INT 0x0 #define DMA1_INT 0x2 /* DMA1 pending interrupt */ -#define nDMA1_INT 0x0 #define DMA2_INT 0x4 /* DMA2 pending interrupt */ -#define nDMA2_INT 0x0 #define DMA3_INT 0x8 /* DMA3 pending interrupt */ -#define nDMA3_INT 0x0 #define DMA4_INT 0x10 /* DMA4 pending interrupt */ -#define nDMA4_INT 0x0 #define DMA5_INT 0x20 /* DMA5 pending interrupt */ -#define nDMA5_INT 0x0 #define DMA6_INT 0x40 /* DMA6 pending interrupt */ -#define nDMA6_INT 0x0 #define DMA7_INT 0x80 /* DMA7 pending interrupt */ -#define nDMA7_INT 0x0 /* Bit masks for USB_DMAxCONTROL */ #define DMA_ENA 0x1 /* DMA enable */ -#define nDMA_ENA 0x0 #define DIRECTION 0x2 /* direction of DMA transfer */ -#define nDIRECTION 0x0 #define MODE 0x4 /* DMA Bus error */ -#define nMODE 0x0 #define INT_ENA 0x8 /* Interrupt enable */ -#define nINT_ENA 0x0 #define EPNUM 0xf0 /* EP number */ #define BUSERROR 0x100 /* DMA Bus error */ -#define nBUSERROR 0x0 /* Bit masks for USB_DMAxADDRHIGH */ diff --git a/include/asm-blackfin/mach-bf548/defBF544.h b/include/asm-blackfin/mach-bf548/defBF544.h index 8fc77ea12a..dd955dcd39 100644 --- a/include/asm-blackfin/mach-bf548/defBF544.h +++ b/include/asm-blackfin/mach-bf548/defBF544.h @@ -538,21 +538,13 @@ /* Bit masks for PIXC_CTL */ #define PIXC_EN 0x1 /* Pixel Compositor Enable */ -#define nPIXC_EN 0x0 #define OVR_A_EN 0x2 /* Overlay A Enable */ -#define nOVR_A_EN 0x0 #define OVR_B_EN 0x4 /* Overlay B Enable */ -#define nOVR_B_EN 0x0 #define IMG_FORM 0x8 /* Image Data Format */ -#define nIMG_FORM 0x0 #define OVR_FORM 0x10 /* Overlay Data Format */ -#define nOVR_FORM 0x0 #define OUT_FORM 0x20 /* Output Data Format */ -#define nOUT_FORM 0x0 #define UDS_MOD 0x40 /* Resampling Mode */ -#define nUDS_MOD 0x0 #define TC_EN 0x80 /* Transparent Color Enable */ -#define nTC_EN 0x0 #define IMG_STAT 0x300 /* Image FIFO Status */ #define OVR_STAT 0xc00 /* Overlay FIFO Status */ #define WM_LVL 0x3000 /* FIFO Watermark Level */ @@ -600,13 +592,9 @@ /* Bit masks for PIXC_INTRSTAT */ #define OVR_INT_EN 0x1 /* Interrupt at End of Last Valid Overlay */ -#define nOVR_INT_EN 0x0 #define FRM_INT_EN 0x2 /* Interrupt at End of Frame */ -#define nFRM_INT_EN 0x0 #define OVR_INT_STAT 0x4 /* Overlay Interrupt Status */ -#define nOVR_INT_STAT 0x0 #define FRM_INT_STAT 0x8 /* Frame Interrupt Status */ -#define nFRM_INT_STAT 0x0 /* Bit masks for PIXC_RYCON */ @@ -614,7 +602,6 @@ #define A12 0xffc00 /* A12 in the Coefficient Matrix */ #define A13 0x3ff00000 /* A13 in the Coefficient Matrix */ #define RY_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nRY_MULT4 0x0 /* Bit masks for PIXC_GUCON */ @@ -622,7 +609,6 @@ #define A22 0xffc00 /* A22 in the Coefficient Matrix */ #define A23 0x3ff00000 /* A23 in the Coefficient Matrix */ #define GU_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nGU_MULT4 0x0 /* Bit masks for PIXC_BVCON */ @@ -630,7 +616,6 @@ #define A32 0xffc00 /* A32 in the Coefficient Matrix */ #define A33 0x3ff00000 /* A33 in the Coefficient Matrix */ #define BV_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nBV_MULT4 0x0 /* Bit masks for PIXC_CCBIAS */ @@ -647,48 +632,28 @@ /* Bit masks for HOST_CONTROL */ #define HOST_EN 0x1 /* Host Enable */ -#define nHOST_EN 0x0 #define HOST_END 0x2 /* Host Endianess */ -#define nHOST_END 0x0 #define DATA_SIZE 0x4 /* Data Size */ -#define nDATA_SIZE 0x0 #define HOST_RST 0x8 /* Host Reset */ -#define nHOST_RST 0x0 #define HRDY_OVR 0x20 /* Host Ready Override */ -#define nHRDY_OVR 0x0 #define INT_MODE 0x40 /* Interrupt Mode */ -#define nINT_MODE 0x0 #define BT_EN 0x80 /* Bus Timeout Enable */ -#define nBT_EN 0x0 #define EHW 0x100 /* Enable Host Write */ -#define nEHW 0x0 #define EHR 0x200 /* Enable Host Read */ -#define nEHR 0x0 #define BDR 0x400 /* Burst DMA Requests */ -#define nBDR 0x0 /* Bit masks for HOST_STATUS */ #define READY 0x1 /* DMA Ready */ -#define nREADY 0x0 #define FIFOFULL 0x2 /* FIFO Full */ -#define nFIFOFULL 0x0 #define FIFOEMPTY 0x4 /* FIFO Empty */ -#define nFIFOEMPTY 0x0 #define COMPLETE 0x8 /* DMA Complete */ -#define nCOMPLETE 0x0 #define HSHK 0x10 /* Host Handshake */ -#define nHSHK 0x0 #define TIMEOUT 0x20 /* Host Timeout */ -#define nTIMEOUT 0x0 #define HIRQ 0x40 /* Host Interrupt Request */ -#define nHIRQ 0x0 #define ALLOW_CNFG 0x80 /* Allow New Configuration */ -#define nALLOW_CNFG 0x0 #define DMA_DIR 0x100 /* DMA Direction */ -#define nDMA_DIR 0x0 #define BTE 0x200 /* Bus Timeout Enabled */ -#define nBTE 0x0 /* Bit masks for HOST_TIMEOUT */ @@ -697,67 +662,42 @@ /* Bit masks for TIMER_ENABLE1 */ #define TIMEN8 0x1 /* Timer 8 Enable */ -#define nTIMEN8 0x0 #define TIMEN9 0x2 /* Timer 9 Enable */ -#define nTIMEN9 0x0 #define TIMEN10 0x4 /* Timer 10 Enable */ -#define nTIMEN10 0x0 /* Bit masks for TIMER_DISABLE1 */ #define TIMDIS8 0x1 /* Timer 8 Disable */ -#define nTIMDIS8 0x0 #define TIMDIS9 0x2 /* Timer 9 Disable */ -#define nTIMDIS9 0x0 #define TIMDIS10 0x4 /* Timer 10 Disable */ -#define nTIMDIS10 0x0 /* Bit masks for TIMER_STATUS1 */ #define TIMIL8 0x1 /* Timer 8 Interrupt */ -#define nTIMIL8 0x0 #define TIMIL9 0x2 /* Timer 9 Interrupt */ -#define nTIMIL9 0x0 #define TIMIL10 0x4 /* Timer 10 Interrupt */ -#define nTIMIL10 0x0 #define TOVF_ERR8 0x10 /* Timer 8 Counter Overflow */ -#define nTOVF_ERR8 0x0 #define TOVF_ERR9 0x20 /* Timer 9 Counter Overflow */ -#define nTOVF_ERR9 0x0 #define TOVF_ERR10 0x40 /* Timer 10 Counter Overflow */ -#define nTOVF_ERR10 0x0 #define TRUN8 0x1000 /* Timer 8 Slave Enable Status */ -#define nTRUN8 0x0 #define TRUN9 0x2000 /* Timer 9 Slave Enable Status */ -#define nTRUN9 0x0 #define TRUN10 0x4000 /* Timer 10 Slave Enable Status */ -#define nTRUN10 0x0 /* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */ /* Bit masks for HMDMAx_CONTROL */ #define HMDMAEN 0x1 /* Handshake MDMA Enable */ -#define nHMDMAEN 0x0 #define REP 0x2 /* Handshake MDMA Request Polarity */ -#define nREP 0x0 #define UTE 0x8 /* Urgency Threshold Enable */ -#define nUTE 0x0 #define OIE 0x10 /* Overflow Interrupt Enable */ -#define nOIE 0x0 #define BDIE 0x20 /* Block Done Interrupt Enable */ -#define nBDIE 0x0 #define MBDI 0x40 /* Mask Block Done Interrupt */ -#define nMBDI 0x0 #define DRQ 0x300 /* Handshake MDMA Request Type */ #define RBC 0x1000 /* Force Reload of BCOUNT */ -#define nRBC 0x0 #define PS 0x2000 /* Pin Status */ -#define nPS 0x0 #define OI 0x4000 /* Overflow Interrupt Generated */ -#define nOI 0x0 #define BDI 0x8000 /* Block Done Interrupt Generated */ -#define nBDI 0x0 /* ******************************************* */ /* MULTI BIT MACRO ENUMERATIONS */ diff --git a/include/asm-blackfin/mach-bf548/defBF548.h b/include/asm-blackfin/mach-bf548/defBF548.h index d9e3062a91..8d4214e080 100644 --- a/include/asm-blackfin/mach-bf548/defBF548.h +++ b/include/asm-blackfin/mach-bf548/defBF548.h @@ -899,21 +899,13 @@ /* Bit masks for PIXC_CTL */ #define PIXC_EN 0x1 /* Pixel Compositor Enable */ -#define nPIXC_EN 0x0 #define OVR_A_EN 0x2 /* Overlay A Enable */ -#define nOVR_A_EN 0x0 #define OVR_B_EN 0x4 /* Overlay B Enable */ -#define nOVR_B_EN 0x0 #define IMG_FORM 0x8 /* Image Data Format */ -#define nIMG_FORM 0x0 #define OVR_FORM 0x10 /* Overlay Data Format */ -#define nOVR_FORM 0x0 #define OUT_FORM 0x20 /* Output Data Format */ -#define nOUT_FORM 0x0 #define UDS_MOD 0x40 /* Resampling Mode */ -#define nUDS_MOD 0x0 #define TC_EN 0x80 /* Transparent Color Enable */ -#define nTC_EN 0x0 #define IMG_STAT 0x300 /* Image FIFO Status */ #define OVR_STAT 0xc00 /* Overlay FIFO Status */ #define WM_LVL 0x3000 /* FIFO Watermark Level */ @@ -961,13 +953,9 @@ /* Bit masks for PIXC_INTRSTAT */ #define OVR_INT_EN 0x1 /* Interrupt at End of Last Valid Overlay */ -#define nOVR_INT_EN 0x0 #define FRM_INT_EN 0x2 /* Interrupt at End of Frame */ -#define nFRM_INT_EN 0x0 #define OVR_INT_STAT 0x4 /* Overlay Interrupt Status */ -#define nOVR_INT_STAT 0x0 #define FRM_INT_STAT 0x8 /* Frame Interrupt Status */ -#define nFRM_INT_STAT 0x0 /* Bit masks for PIXC_RYCON */ @@ -975,7 +963,6 @@ #define A12 0xffc00 /* A12 in the Coefficient Matrix */ #define A13 0x3ff00000 /* A13 in the Coefficient Matrix */ #define RY_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nRY_MULT4 0x0 /* Bit masks for PIXC_GUCON */ @@ -983,7 +970,6 @@ #define A22 0xffc00 /* A22 in the Coefficient Matrix */ #define A23 0x3ff00000 /* A23 in the Coefficient Matrix */ #define GU_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nGU_MULT4 0x0 /* Bit masks for PIXC_BVCON */ @@ -991,7 +977,6 @@ #define A32 0xffc00 /* A32 in the Coefficient Matrix */ #define A33 0x3ff00000 /* A33 in the Coefficient Matrix */ #define BV_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nBV_MULT4 0x0 /* Bit masks for PIXC_CCBIAS */ @@ -1008,48 +993,28 @@ /* Bit masks for HOST_CONTROL */ #define HOST_EN 0x1 /* Host Enable */ -#define nHOST_EN 0x0 #define HOST_END 0x2 /* Host Endianess */ -#define nHOST_END 0x0 #define DATA_SIZE 0x4 /* Data Size */ -#define nDATA_SIZE 0x0 #define HOST_RST 0x8 /* Host Reset */ -#define nHOST_RST 0x0 #define HRDY_OVR 0x20 /* Host Ready Override */ -#define nHRDY_OVR 0x0 #define INT_MODE 0x40 /* Interrupt Mode */ -#define nINT_MODE 0x0 #define BT_EN 0x80 /* Bus Timeout Enable */ -#define nBT_EN 0x0 #define EHW 0x100 /* Enable Host Write */ -#define nEHW 0x0 #define EHR 0x200 /* Enable Host Read */ -#define nEHR 0x0 #define BDR 0x400 /* Burst DMA Requests */ -#define nBDR 0x0 /* Bit masks for HOST_STATUS */ #define READY 0x1 /* DMA Ready */ -#define nREADY 0x0 #define FIFOFULL 0x2 /* FIFO Full */ -#define nFIFOFULL 0x0 #define FIFOEMPTY 0x4 /* FIFO Empty */ -#define nFIFOEMPTY 0x0 #define COMPLETE 0x8 /* DMA Complete */ -#define nCOMPLETE 0x0 #define HSHK 0x10 /* Host Handshake */ -#define nHSHK 0x0 #define TIMEOUT 0x20 /* Host Timeout */ -#define nTIMEOUT 0x0 #define HIRQ 0x40 /* Host Interrupt Request */ -#define nHIRQ 0x0 #define ALLOW_CNFG 0x80 /* Allow New Configuration */ -#define nALLOW_CNFG 0x0 #define DMA_DIR 0x100 /* DMA Direction */ -#define nDMA_DIR 0x0 #define BTE 0x200 /* Bus Timeout Enabled */ -#define nBTE 0x0 /* Bit masks for HOST_TIMEOUT */ @@ -1058,7 +1023,6 @@ /* Bit masks for KPAD_CTL */ #define KPAD_EN 0x1 /* Keypad Enable */ -#define nKPAD_EN 0x0 #define KPAD_IRQMODE 0x6 /* Key Press Interrupt Enable */ #define KPAD_ROWEN 0x1c00 /* Row Enable Width */ #define KPAD_COLEN 0xe000 /* Column Enable Width */ @@ -1080,29 +1044,21 @@ /* Bit masks for KPAD_STAT */ #define KPAD_IRQ 0x1 /* Keypad Interrupt Status */ -#define nKPAD_IRQ 0x0 #define KPAD_MROWCOL 0x6 /* Multiple Row/Column Keypress Status */ #define KPAD_PRESSED 0x8 /* Key press current status */ -#define nKPAD_PRESSED 0x0 /* Bit masks for KPAD_SOFTEVAL */ #define KPAD_SOFTEVAL_E 0x2 /* Software Programmable Force Evaluate */ -#define nKPAD_SOFTEVAL_E 0x0 /* Bit masks for SDH_COMMAND */ #define CMD_IDX 0x3f /* Command Index */ #define CMD_RSP 0x40 /* Response */ -#define nCMD_RSP 0x0 #define CMD_L_RSP 0x80 /* Long Response */ -#define nCMD_L_RSP 0x0 #define CMD_INT_E 0x100 /* Command Interrupt */ -#define nCMD_INT_E 0x0 #define CMD_PEND_E 0x200 /* Command Pending */ -#define nCMD_PEND_E 0x0 #define CMD_E 0x400 /* Command Enable */ -#define nCMD_E 0x0 /* Bit masks for SDH_PWR_CTL */ @@ -1111,21 +1067,15 @@ #define TBD 0x3c /* TBD */ #endif #define SD_CMD_OD 0x40 /* Open Drain Output */ -#define nSD_CMD_OD 0x0 #define ROD_CTL 0x80 /* Rod Control */ -#define nROD_CTL 0x0 /* Bit masks for SDH_CLK_CTL */ #define CLKDIV 0xff /* MC_CLK Divisor */ #define CLK_E 0x100 /* MC_CLK Bus Clock Enable */ -#define nCLK_E 0x0 #define PWR_SV_E 0x200 /* Power Save Enable */ -#define nPWR_SV_E 0x0 #define CLKDIV_BYPASS 0x400 /* Bypass Divisor */ -#define nCLKDIV_BYPASS 0x0 #define WIDE_BUS 0x800 /* Wide Bus Mode Enable */ -#define nWIDE_BUS 0x0 /* Bit masks for SDH_RESP_CMD */ @@ -1134,133 +1084,74 @@ /* Bit masks for SDH_DATA_CTL */ #define DTX_E 0x1 /* Data Transfer Enable */ -#define nDTX_E 0x0 #define DTX_DIR 0x2 /* Data Transfer Direction */ -#define nDTX_DIR 0x0 #define DTX_MODE 0x4 /* Data Transfer Mode */ -#define nDTX_MODE 0x0 #define DTX_DMA_E 0x8 /* Data Transfer DMA Enable */ -#define nDTX_DMA_E 0x0 #define DTX_BLK_LGTH 0xf0 /* Data Transfer Block Length */ /* Bit masks for SDH_STATUS */ #define CMD_CRC_FAIL 0x1 /* CMD CRC Fail */ -#define nCMD_CRC_FAIL 0x0 #define DAT_CRC_FAIL 0x2 /* Data CRC Fail */ -#define nDAT_CRC_FAIL 0x0 #define CMD_TIMEOUT 0x4 /* CMD Time Out */ -#define nCMD_TIMEOUT 0x0 #define DAT_TIMEOUT 0x8 /* Data Time Out */ -#define nDAT_TIMEOUT 0x0 #define TX_UNDERRUN 0x10 /* Transmit Underrun */ -#define nTX_UNDERRUN 0x0 #define RX_OVERRUN 0x20 /* Receive Overrun */ -#define nRX_OVERRUN 0x0 #define CMD_RESP_END 0x40 /* CMD Response End */ -#define nCMD_RESP_END 0x0 #define CMD_SENT 0x80 /* CMD Sent */ -#define nCMD_SENT 0x0 #define DAT_END 0x100 /* Data End */ -#define nDAT_END 0x0 #define START_BIT_ERR 0x200 /* Start Bit Error */ -#define nSTART_BIT_ERR 0x0 #define DAT_BLK_END 0x400 /* Data Block End */ -#define nDAT_BLK_END 0x0 #define CMD_ACT 0x800 /* CMD Active */ -#define nCMD_ACT 0x0 #define TX_ACT 0x1000 /* Transmit Active */ -#define nTX_ACT 0x0 #define RX_ACT 0x2000 /* Receive Active */ -#define nRX_ACT 0x0 #define TX_FIFO_STAT 0x4000 /* Transmit FIFO Status */ -#define nTX_FIFO_STAT 0x0 #define RX_FIFO_STAT 0x8000 /* Receive FIFO Status */ -#define nRX_FIFO_STAT 0x0 #define TX_FIFO_FULL 0x10000 /* Transmit FIFO Full */ -#define nTX_FIFO_FULL 0x0 #define RX_FIFO_FULL 0x20000 /* Receive FIFO Full */ -#define nRX_FIFO_FULL 0x0 #define TX_FIFO_ZERO 0x40000 /* Transmit FIFO Empty */ -#define nTX_FIFO_ZERO 0x0 #define RX_DAT_ZERO 0x80000 /* Receive FIFO Empty */ -#define nRX_DAT_ZERO 0x0 #define TX_DAT_RDY 0x100000 /* Transmit Data Available */ -#define nTX_DAT_RDY 0x0 #define RX_FIFO_RDY 0x200000 /* Receive Data Available */ -#define nRX_FIFO_RDY 0x0 /* Bit masks for SDH_STATUS_CLR */ #define CMD_CRC_FAIL_STAT 0x1 /* CMD CRC Fail Status */ -#define nCMD_CRC_FAIL_STAT 0x0 #define DAT_CRC_FAIL_STAT 0x2 /* Data CRC Fail Status */ -#define nDAT_CRC_FAIL_STAT 0x0 #define CMD_TIMEOUT_STAT 0x4 /* CMD Time Out Status */ -#define nCMD_TIMEOUT_STAT 0x0 #define DAT_TIMEOUT_STAT 0x8 /* Data Time Out status */ -#define nDAT_TIMEOUT_STAT 0x0 #define TX_UNDERRUN_STAT 0x10 /* Transmit Underrun Status */ -#define nTX_UNDERRUN_STAT 0x0 #define RX_OVERRUN_STAT 0x20 /* Receive Overrun Status */ -#define nRX_OVERRUN_STAT 0x0 #define CMD_RESP_END_STAT 0x40 /* CMD Response End Status */ -#define nCMD_RESP_END_STAT 0x0 #define CMD_SENT_STAT 0x80 /* CMD Sent Status */ -#define nCMD_SENT_STAT 0x0 #define DAT_END_STAT 0x100 /* Data End Status */ -#define nDAT_END_STAT 0x0 #define START_BIT_ERR_STAT 0x200 /* Start Bit Error Status */ -#define nSTART_BIT_ERR_STAT 0x0 #define DAT_BLK_END_STAT 0x400 /* Data Block End Status */ -#define nDAT_BLK_END_STAT 0x0 /* Bit masks for SDH_MASK0 */ #define CMD_CRC_FAIL_MASK 0x1 /* CMD CRC Fail Mask */ -#define nCMD_CRC_FAIL_MASK 0x0 #define DAT_CRC_FAIL_MASK 0x2 /* Data CRC Fail Mask */ -#define nDAT_CRC_FAIL_MASK 0x0 #define CMD_TIMEOUT_MASK 0x4 /* CMD Time Out Mask */ -#define nCMD_TIMEOUT_MASK 0x0 #define DAT_TIMEOUT_MASK 0x8 /* Data Time Out Mask */ -#define nDAT_TIMEOUT_MASK 0x0 #define TX_UNDERRUN_MASK 0x10 /* Transmit Underrun Mask */ -#define nTX_UNDERRUN_MASK 0x0 #define RX_OVERRUN_MASK 0x20 /* Receive Overrun Mask */ -#define nRX_OVERRUN_MASK 0x0 #define CMD_RESP_END_MASK 0x40 /* CMD Response End Mask */ -#define nCMD_RESP_END_MASK 0x0 #define CMD_SENT_MASK 0x80 /* CMD Sent Mask */ -#define nCMD_SENT_MASK 0x0 #define DAT_END_MASK 0x100 /* Data End Mask */ -#define nDAT_END_MASK 0x0 #define START_BIT_ERR_MASK 0x200 /* Start Bit Error Mask */ -#define nSTART_BIT_ERR_MASK 0x0 #define DAT_BLK_END_MASK 0x400 /* Data Block End Mask */ -#define nDAT_BLK_END_MASK 0x0 #define CMD_ACT_MASK 0x800 /* CMD Active Mask */ -#define nCMD_ACT_MASK 0x0 #define TX_ACT_MASK 0x1000 /* Transmit Active Mask */ -#define nTX_ACT_MASK 0x0 #define RX_ACT_MASK 0x2000 /* Receive Active Mask */ -#define nRX_ACT_MASK 0x0 #define TX_FIFO_STAT_MASK 0x4000 /* Transmit FIFO Status Mask */ -#define nTX_FIFO_STAT_MASK 0x0 #define RX_FIFO_STAT_MASK 0x8000 /* Receive FIFO Status Mask */ -#define nRX_FIFO_STAT_MASK 0x0 #define TX_FIFO_FULL_MASK 0x10000 /* Transmit FIFO Full Mask */ -#define nTX_FIFO_FULL_MASK 0x0 #define RX_FIFO_FULL_MASK 0x20000 /* Receive FIFO Full Mask */ -#define nRX_FIFO_FULL_MASK 0x0 #define TX_FIFO_ZERO_MASK 0x40000 /* Transmit FIFO Empty Mask */ -#define nTX_FIFO_ZERO_MASK 0x0 #define RX_DAT_ZERO_MASK 0x80000 /* Receive FIFO Empty Mask */ -#define nRX_DAT_ZERO_MASK 0x0 #define TX_DAT_RDY_MASK 0x100000 /* Transmit Data Available Mask */ -#define nTX_DAT_RDY_MASK 0x0 #define RX_FIFO_RDY_MASK 0x200000 /* Receive Data Available Mask */ -#define nRX_FIFO_RDY_MASK 0x0 /* Bit masks for SDH_FIFO_CNT */ @@ -1269,73 +1160,47 @@ /* Bit masks for SDH_E_STATUS */ #define SDIO_INT_DET 0x2 /* SDIO Int Detected */ -#define nSDIO_INT_DET 0x0 #define SD_CARD_DET 0x10 /* SD Card Detect */ -#define nSD_CARD_DET 0x0 /* Bit masks for SDH_E_MASK */ #define SDIO_MSK 0x2 /* Mask SDIO Int Detected */ -#define nSDIO_MSK 0x0 #define SCD_MSK 0x40 /* Mask Card Detect */ -#define nSCD_MSK 0x0 /* Bit masks for SDH_CFG */ #define CLKS_EN 0x1 /* Clocks Enable */ -#define nCLKS_EN 0x0 #define SD4E 0x4 /* SDIO 4-Bit Enable */ -#define nSD4E 0x0 #define MWE 0x8 /* Moving Window Enable */ -#define nMWE 0x0 #define SD_RST 0x10 /* SDMMC Reset */ -#define nSD_RST 0x0 #define PUP_SDDAT 0x20 /* Pull-up SD_DAT */ -#define nPUP_SDDAT 0x0 #define PUP_SDDAT3 0x40 /* Pull-up SD_DAT3 */ -#define nPUP_SDDAT3 0x0 #define PD_SDDAT3 0x80 /* Pull-down SD_DAT3 */ -#define nPD_SDDAT3 0x0 /* Bit masks for SDH_RD_WAIT_EN */ #define RWR 0x1 /* Read Wait Request */ -#define nRWR 0x0 /* Bit masks for ATAPI_CONTROL */ #define PIO_START 0x1 /* Start PIO/Reg Op */ -#define nPIO_START 0x0 #define MULTI_START 0x2 /* Start Multi-DMA Op */ -#define nMULTI_START 0x0 #define ULTRA_START 0x4 /* Start Ultra-DMA Op */ -#define nULTRA_START 0x0 #define XFER_DIR 0x8 /* Transfer Direction */ -#define nXFER_DIR 0x0 #define IORDY_EN 0x10 /* IORDY Enable */ -#define nIORDY_EN 0x0 #define FIFO_FLUSH 0x20 /* Flush FIFOs */ -#define nFIFO_FLUSH 0x0 #define SOFT_RST 0x40 /* Soft Reset */ -#define nSOFT_RST 0x0 #define DEV_RST 0x80 /* Device Reset */ -#define nDEV_RST 0x0 #define TFRCNT_RST 0x100 /* Trans Count Reset */ -#define nTFRCNT_RST 0x0 #define END_ON_TERM 0x200 /* End/Terminate Select */ -#define nEND_ON_TERM 0x0 #define PIO_USE_DMA 0x400 /* PIO-DMA Enable */ -#define nPIO_USE_DMA 0x0 #define UDMAIN_FIFO_THRS 0xf000 /* Ultra DMA-IN FIFO Threshold */ /* Bit masks for ATAPI_STATUS */ #define PIO_XFER_ON 0x1 /* PIO transfer in progress */ -#define nPIO_XFER_ON 0x0 #define MULTI_XFER_ON 0x2 /* Multi-word DMA transfer in progress */ -#define nMULTI_XFER_ON 0x0 #define ULTRA_XFER_ON 0x4 /* Ultra DMA transfer in progress */ -#define nULTRA_XFER_ON 0x0 #define ULTRA_IN_FL 0xf0 /* Ultra DMA Input FIFO Level */ /* Bit masks for ATAPI_DEV_ADDR */ @@ -1345,66 +1210,39 @@ /* Bit masks for ATAPI_INT_MASK */ #define ATAPI_DEV_INT_MASK 0x1 /* Device interrupt mask */ -#define nATAPI_DEV_INT_MASK 0x0 #define PIO_DONE_MASK 0x2 /* PIO transfer done interrupt mask */ -#define nPIO_DONE_MASK 0x0 #define MULTI_DONE_MASK 0x4 /* Multi-DMA transfer done interrupt mask */ -#define nMULTI_DONE_MASK 0x0 #define UDMAIN_DONE_MASK 0x8 /* Ultra-DMA in transfer done interrupt mask */ -#define nUDMAIN_DONE_MASK 0x0 #define UDMAOUT_DONE_MASK 0x10 /* Ultra-DMA out transfer done interrupt mask */ -#define nUDMAOUT_DONE_MASK 0x0 #define HOST_TERM_XFER_MASK 0x20 /* Host terminate current transfer interrupt mask */ -#define nHOST_TERM_XFER_MASK 0x0 #define MULTI_TERM_MASK 0x40 /* Device terminate Multi-DMA transfer interrupt mask */ -#define nMULTI_TERM_MASK 0x0 #define UDMAIN_TERM_MASK 0x80 /* Device terminate Ultra-DMA-in transfer interrupt mask */ -#define nUDMAIN_TERM_MASK 0x0 #define UDMAOUT_TERM_MASK 0x100 /* Device terminate Ultra-DMA-out transfer interrupt mask */ -#define nUDMAOUT_TERM_MASK 0x0 /* Bit masks for ATAPI_INT_STATUS */ #define ATAPI_DEV_INT 0x1 /* Device interrupt status */ -#define nATAPI_DEV_INT 0x0 #define PIO_DONE_INT 0x2 /* PIO transfer done interrupt status */ -#define nPIO_DONE_INT 0x0 #define MULTI_DONE_INT 0x4 /* Multi-DMA transfer done interrupt status */ -#define nMULTI_DONE_INT 0x0 #define UDMAIN_DONE_INT 0x8 /* Ultra-DMA in transfer done interrupt status */ -#define nUDMAIN_DONE_INT 0x0 #define UDMAOUT_DONE_INT 0x10 /* Ultra-DMA out transfer done interrupt status */ -#define nUDMAOUT_DONE_INT 0x0 #define HOST_TERM_XFER_INT 0x20 /* Host terminate current transfer interrupt status */ -#define nHOST_TERM_XFER_INT 0x0 #define MULTI_TERM_INT 0x40 /* Device terminate Multi-DMA transfer interrupt status */ -#define nMULTI_TERM_INT 0x0 #define UDMAIN_TERM_INT 0x80 /* Device terminate Ultra-DMA-in transfer interrupt status */ -#define nUDMAIN_TERM_INT 0x0 #define UDMAOUT_TERM_INT 0x100 /* Device terminate Ultra-DMA-out transfer interrupt status */ -#define nUDMAOUT_TERM_INT 0x0 /* Bit masks for ATAPI_LINE_STATUS */ #define ATAPI_INTR 0x1 /* Device interrupt to host line status */ -#define nATAPI_INTR 0x0 #define ATAPI_DASP 0x2 /* Device dasp to host line status */ -#define nATAPI_DASP 0x0 #define ATAPI_CS0N 0x4 /* ATAPI chip select 0 line status */ -#define nATAPI_CS0N 0x0 #define ATAPI_CS1N 0x8 /* ATAPI chip select 1 line status */ -#define nATAPI_CS1N 0x0 #define ATAPI_ADDR 0x70 /* ATAPI address line status */ #define ATAPI_DMAREQ 0x80 /* ATAPI DMA request line status */ -#define nATAPI_DMAREQ 0x0 #define ATAPI_DMAACKN 0x100 /* ATAPI DMA acknowledge line status */ -#define nATAPI_DMAACKN 0x0 #define ATAPI_DIOWN 0x200 /* ATAPI write line status */ -#define nATAPI_DIOWN 0x0 #define ATAPI_DIORN 0x400 /* ATAPI read line status */ -#define nATAPI_DIORN 0x0 #define ATAPI_IORDY 0x800 /* ATAPI IORDY line status */ -#define nATAPI_IORDY 0x0 /* Bit masks for ATAPI_SM_STATE */ @@ -1416,7 +1254,6 @@ /* Bit masks for ATAPI_TERMINATE */ #define ATAPI_HOST_TERM 0x1 /* Host terminationation */ -#define nATAPI_HOST_TERM 0x0 /* Bit masks for ATAPI_REG_TIM_0 */ @@ -1471,41 +1308,26 @@ /* Bit masks for TIMER_ENABLE1 */ #define TIMEN8 0x1 /* Timer 8 Enable */ -#define nTIMEN8 0x0 #define TIMEN9 0x2 /* Timer 9 Enable */ -#define nTIMEN9 0x0 #define TIMEN10 0x4 /* Timer 10 Enable */ -#define nTIMEN10 0x0 /* Bit masks for TIMER_DISABLE1 */ #define TIMDIS8 0x1 /* Timer 8 Disable */ -#define nTIMDIS8 0x0 #define TIMDIS9 0x2 /* Timer 9 Disable */ -#define nTIMDIS9 0x0 #define TIMDIS10 0x4 /* Timer 10 Disable */ -#define nTIMDIS10 0x0 /* Bit masks for TIMER_STATUS1 */ #define TIMIL8 0x1 /* Timer 8 Interrupt */ -#define nTIMIL8 0x0 #define TIMIL9 0x2 /* Timer 9 Interrupt */ -#define nTIMIL9 0x0 #define TIMIL10 0x4 /* Timer 10 Interrupt */ -#define nTIMIL10 0x0 #define TOVF_ERR8 0x10 /* Timer 8 Counter Overflow */ -#define nTOVF_ERR8 0x0 #define TOVF_ERR9 0x20 /* Timer 9 Counter Overflow */ -#define nTOVF_ERR9 0x0 #define TOVF_ERR10 0x40 /* Timer 10 Counter Overflow */ -#define nTOVF_ERR10 0x0 #define TRUN8 0x1000 /* Timer 8 Slave Enable Status */ -#define nTRUN8 0x0 #define TRUN9 0x2000 /* Timer 9 Slave Enable Status */ -#define nTRUN9 0x0 #define TRUN10 0x4000 /* Timer 10 Slave Enable Status */ -#define nTRUN10 0x0 /* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */ @@ -1516,131 +1338,77 @@ /* Bit masks for USB_POWER */ #define ENABLE_SUSPENDM 0x1 /* enable SuspendM output */ -#define nENABLE_SUSPENDM 0x0 #define SUSPEND_MODE 0x2 /* Suspend Mode indicator */ -#define nSUSPEND_MODE 0x0 #define RESUME_MODE 0x4 /* DMA Mode */ -#define nRESUME_MODE 0x0 #define RESET 0x8 /* Reset indicator */ -#define nRESET 0x0 #define HS_MODE 0x10 /* High Speed mode indicator */ -#define nHS_MODE 0x0 #define HS_ENABLE 0x20 /* high Speed Enable */ -#define nHS_ENABLE 0x0 #define SOFT_CONN 0x40 /* Soft connect */ -#define nSOFT_CONN 0x0 #define ISO_UPDATE 0x80 /* Isochronous update */ -#define nISO_UPDATE 0x0 /* Bit masks for USB_INTRTX */ #define EP0_TX 0x1 /* Tx Endpoint 0 interrupt */ -#define nEP0_TX 0x0 #define EP1_TX 0x2 /* Tx Endpoint 1 interrupt */ -#define nEP1_TX 0x0 #define EP2_TX 0x4 /* Tx Endpoint 2 interrupt */ -#define nEP2_TX 0x0 #define EP3_TX 0x8 /* Tx Endpoint 3 interrupt */ -#define nEP3_TX 0x0 #define EP4_TX 0x10 /* Tx Endpoint 4 interrupt */ -#define nEP4_TX 0x0 #define EP5_TX 0x20 /* Tx Endpoint 5 interrupt */ -#define nEP5_TX 0x0 #define EP6_TX 0x40 /* Tx Endpoint 6 interrupt */ -#define nEP6_TX 0x0 #define EP7_TX 0x80 /* Tx Endpoint 7 interrupt */ -#define nEP7_TX 0x0 /* Bit masks for USB_INTRRX */ #define EP1_RX 0x2 /* Rx Endpoint 1 interrupt */ -#define nEP1_RX 0x0 #define EP2_RX 0x4 /* Rx Endpoint 2 interrupt */ -#define nEP2_RX 0x0 #define EP3_RX 0x8 /* Rx Endpoint 3 interrupt */ -#define nEP3_RX 0x0 #define EP4_RX 0x10 /* Rx Endpoint 4 interrupt */ -#define nEP4_RX 0x0 #define EP5_RX 0x20 /* Rx Endpoint 5 interrupt */ -#define nEP5_RX 0x0 #define EP6_RX 0x40 /* Rx Endpoint 6 interrupt */ -#define nEP6_RX 0x0 #define EP7_RX 0x80 /* Rx Endpoint 7 interrupt */ -#define nEP7_RX 0x0 /* Bit masks for USB_INTRTXE */ #define EP0_TX_E 0x1 /* Endpoint 0 interrupt Enable */ -#define nEP0_TX_E 0x0 #define EP1_TX_E 0x2 /* Tx Endpoint 1 interrupt Enable */ -#define nEP1_TX_E 0x0 #define EP2_TX_E 0x4 /* Tx Endpoint 2 interrupt Enable */ -#define nEP2_TX_E 0x0 #define EP3_TX_E 0x8 /* Tx Endpoint 3 interrupt Enable */ -#define nEP3_TX_E 0x0 #define EP4_TX_E 0x10 /* Tx Endpoint 4 interrupt Enable */ -#define nEP4_TX_E 0x0 #define EP5_TX_E 0x20 /* Tx Endpoint 5 interrupt Enable */ -#define nEP5_TX_E 0x0 #define EP6_TX_E 0x40 /* Tx Endpoint 6 interrupt Enable */ -#define nEP6_TX_E 0x0 #define EP7_TX_E 0x80 /* Tx Endpoint 7 interrupt Enable */ -#define nEP7_TX_E 0x0 /* Bit masks for USB_INTRRXE */ #define EP1_RX_E 0x2 /* Rx Endpoint 1 interrupt Enable */ -#define nEP1_RX_E 0x0 #define EP2_RX_E 0x4 /* Rx Endpoint 2 interrupt Enable */ -#define nEP2_RX_E 0x0 #define EP3_RX_E 0x8 /* Rx Endpoint 3 interrupt Enable */ -#define nEP3_RX_E 0x0 #define EP4_RX_E 0x10 /* Rx Endpoint 4 interrupt Enable */ -#define nEP4_RX_E 0x0 #define EP5_RX_E 0x20 /* Rx Endpoint 5 interrupt Enable */ -#define nEP5_RX_E 0x0 #define EP6_RX_E 0x40 /* Rx Endpoint 6 interrupt Enable */ -#define nEP6_RX_E 0x0 #define EP7_RX_E 0x80 /* Rx Endpoint 7 interrupt Enable */ -#define nEP7_RX_E 0x0 /* Bit masks for USB_INTRUSB */ #define SUSPEND_B 0x1 /* Suspend indicator */ -#define nSUSPEND_B 0x0 #define RESUME_B 0x2 /* Resume indicator */ -#define nRESUME_B 0x0 #define RESET_OR_BABLE_B 0x4 /* Reset/babble indicator */ -#define nRESET_OR_BABLE_B 0x0 #define SOF_B 0x8 /* Start of frame */ -#define nSOF_B 0x0 #define CONN_B 0x10 /* Connection indicator */ -#define nCONN_B 0x0 #define DISCON_B 0x20 /* Disconnect indicator */ -#define nDISCON_B 0x0 #define SESSION_REQ_B 0x40 /* Session Request */ -#define nSESSION_REQ_B 0x0 #define VBUS_ERROR_B 0x80 /* Vbus threshold indicator */ -#define nVBUS_ERROR_B 0x0 /* Bit masks for USB_INTRUSBE */ #define SUSPEND_BE 0x1 /* Suspend indicator int enable */ -#define nSUSPEND_BE 0x0 #define RESUME_BE 0x2 /* Resume indicator int enable */ -#define nRESUME_BE 0x0 #define RESET_OR_BABLE_BE 0x4 /* Reset/babble indicator int enable */ -#define nRESET_OR_BABLE_BE 0x0 #define SOF_BE 0x8 /* Start of frame int enable */ -#define nSOF_BE 0x0 #define CONN_BE 0x10 /* Connection indicator int enable */ -#define nCONN_BE 0x0 #define DISCON_BE 0x20 /* Disconnect indicator int enable */ -#define nDISCON_BE 0x0 #define SESSION_REQ_BE 0x40 /* Session Request int enable */ -#define nSESSION_REQ_BE 0x0 #define VBUS_ERROR_BE 0x80 /* Vbus threshold indicator int enable */ -#define nVBUS_ERROR_BE 0x0 /* Bit masks for USB_FRAME */ @@ -1653,117 +1421,67 @@ /* Bit masks for USB_GLOBAL_CTL */ #define GLOBAL_ENA 0x1 /* enables USB module */ -#define nGLOBAL_ENA 0x0 #define EP1_TX_ENA 0x2 /* Transmit endpoint 1 enable */ -#define nEP1_TX_ENA 0x0 #define EP2_TX_ENA 0x4 /* Transmit endpoint 2 enable */ -#define nEP2_TX_ENA 0x0 #define EP3_TX_ENA 0x8 /* Transmit endpoint 3 enable */ -#define nEP3_TX_ENA 0x0 #define EP4_TX_ENA 0x10 /* Transmit endpoint 4 enable */ -#define nEP4_TX_ENA 0x0 #define EP5_TX_ENA 0x20 /* Transmit endpoint 5 enable */ -#define nEP5_TX_ENA 0x0 #define EP6_TX_ENA 0x40 /* Transmit endpoint 6 enable */ -#define nEP6_TX_ENA 0x0 #define EP7_TX_ENA 0x80 /* Transmit endpoint 7 enable */ -#define nEP7_TX_ENA 0x0 #define EP1_RX_ENA 0x100 /* Receive endpoint 1 enable */ -#define nEP1_RX_ENA 0x0 #define EP2_RX_ENA 0x200 /* Receive endpoint 2 enable */ -#define nEP2_RX_ENA 0x0 #define EP3_RX_ENA 0x400 /* Receive endpoint 3 enable */ -#define nEP3_RX_ENA 0x0 #define EP4_RX_ENA 0x800 /* Receive endpoint 4 enable */ -#define nEP4_RX_ENA 0x0 #define EP5_RX_ENA 0x1000 /* Receive endpoint 5 enable */ -#define nEP5_RX_ENA 0x0 #define EP6_RX_ENA 0x2000 /* Receive endpoint 6 enable */ -#define nEP6_RX_ENA 0x0 #define EP7_RX_ENA 0x4000 /* Receive endpoint 7 enable */ -#define nEP7_RX_ENA 0x0 /* Bit masks for USB_OTG_DEV_CTL */ #define SESSION 0x1 /* session indicator */ -#define nSESSION 0x0 #define HOST_REQ 0x2 /* Host negotiation request */ -#define nHOST_REQ 0x0 #define HOST_MODE 0x4 /* indicates USBDRC is a host */ -#define nHOST_MODE 0x0 #define VBUS0 0x8 /* Vbus level indicator[0] */ -#define nVBUS0 0x0 #define VBUS1 0x10 /* Vbus level indicator[1] */ -#define nVBUS1 0x0 #define LSDEV 0x20 /* Low-speed indicator */ -#define nLSDEV 0x0 #define FSDEV 0x40 /* Full or High-speed indicator */ -#define nFSDEV 0x0 #define B_DEVICE 0x80 /* A' or 'B' device indicator */ -#define nB_DEVICE 0x0 /* Bit masks for USB_OTG_VBUS_IRQ */ #define DRIVE_VBUS_ON 0x1 /* indicator to drive VBUS control circuit */ -#define nDRIVE_VBUS_ON 0x0 #define DRIVE_VBUS_OFF 0x2 /* indicator to shut off charge pump */ -#define nDRIVE_VBUS_OFF 0x0 #define CHRG_VBUS_START 0x4 /* indicator for external circuit to start charging VBUS */ -#define nCHRG_VBUS_START 0x0 #define CHRG_VBUS_END 0x8 /* indicator for external circuit to end charging VBUS */ -#define nCHRG_VBUS_END 0x0 #define DISCHRG_VBUS_START 0x10 /* indicator to start discharging VBUS */ -#define nDISCHRG_VBUS_START 0x0 #define DISCHRG_VBUS_END 0x20 /* indicator to stop discharging VBUS */ -#define nDISCHRG_VBUS_END 0x0 /* Bit masks for USB_OTG_VBUS_MASK */ #define DRIVE_VBUS_ON_ENA 0x1 /* enable DRIVE_VBUS_ON interrupt */ -#define nDRIVE_VBUS_ON_ENA 0x0 #define DRIVE_VBUS_OFF_ENA 0x2 /* enable DRIVE_VBUS_OFF interrupt */ -#define nDRIVE_VBUS_OFF_ENA 0x0 #define CHRG_VBUS_START_ENA 0x4 /* enable CHRG_VBUS_START interrupt */ -#define nCHRG_VBUS_START_ENA 0x0 #define CHRG_VBUS_END_ENA 0x8 /* enable CHRG_VBUS_END interrupt */ -#define nCHRG_VBUS_END_ENA 0x0 #define DISCHRG_VBUS_START_ENA 0x10 /* enable DISCHRG_VBUS_START interrupt */ -#define nDISCHRG_VBUS_START_ENA 0x0 #define DISCHRG_VBUS_END_ENA 0x20 /* enable DISCHRG_VBUS_END interrupt */ -#define nDISCHRG_VBUS_END_ENA 0x0 /* Bit masks for USB_CSR0 */ #define RXPKTRDY 0x1 /* data packet receive indicator */ -#define nRXPKTRDY 0x0 #define TXPKTRDY 0x2 /* data packet in FIFO indicator */ -#define nTXPKTRDY 0x0 #define STALL_SENT 0x4 /* STALL handshake sent */ -#define nSTALL_SENT 0x0 #define DATAEND 0x8 /* Data end indicator */ -#define nDATAEND 0x0 #define SETUPEND 0x10 /* Setup end */ -#define nSETUPEND 0x0 #define SENDSTALL 0x20 /* Send STALL handshake */ -#define nSENDSTALL 0x0 #define SERVICED_RXPKTRDY 0x40 /* used to clear the RxPktRdy bit */ -#define nSERVICED_RXPKTRDY 0x0 #define SERVICED_SETUPEND 0x80 /* used to clear the SetupEnd bit */ -#define nSERVICED_SETUPEND 0x0 #define FLUSHFIFO 0x100 /* flush endpoint FIFO */ -#define nFLUSHFIFO 0x0 #define STALL_RECEIVED_H 0x4 /* STALL handshake received host mode */ -#define nSTALL_RECEIVED_H 0x0 #define SETUPPKT_H 0x8 /* send Setup token host mode */ -#define nSETUPPKT_H 0x0 #define ERROR_H 0x10 /* timeout error indicator host mode */ -#define nERROR_H 0x0 #define REQPKT_H 0x20 /* Request an IN transaction host mode */ -#define nREQPKT_H 0x0 #define STATUSPKT_H 0x40 /* Status stage transaction host mode */ -#define nSTATUSPKT_H 0x0 #define NAK_TIMEOUT_H 0x80 /* EP0 halted after a NAK host mode */ -#define nNAK_TIMEOUT_H 0x0 /* Bit masks for USB_COUNT0 */ @@ -1784,37 +1502,21 @@ /* Bit masks for USB_TXCSR */ #define TXPKTRDY_T 0x1 /* data packet in FIFO indicator */ -#define nTXPKTRDY_T 0x0 #define FIFO_NOT_EMPTY_T 0x2 /* FIFO not empty */ -#define nFIFO_NOT_EMPTY_T 0x0 #define UNDERRUN_T 0x4 /* TxPktRdy not set for an IN token */ -#define nUNDERRUN_T 0x0 #define FLUSHFIFO_T 0x8 /* flush endpoint FIFO */ -#define nFLUSHFIFO_T 0x0 #define STALL_SEND_T 0x10 /* issue a Stall handshake */ -#define nSTALL_SEND_T 0x0 #define STALL_SENT_T 0x20 /* Stall handshake transmitted */ -#define nSTALL_SENT_T 0x0 #define CLEAR_DATATOGGLE_T 0x40 /* clear endpoint data toggle */ -#define nCLEAR_DATATOGGLE_T 0x0 #define INCOMPTX_T 0x80 /* indicates that a large packet is split */ -#define nINCOMPTX_T 0x0 #define DMAREQMODE_T 0x400 /* DMA mode (0 or 1) selection */ -#define nDMAREQMODE_T 0x0 #define FORCE_DATATOGGLE_T 0x800 /* Force data toggle */ -#define nFORCE_DATATOGGLE_T 0x0 #define DMAREQ_ENA_T 0x1000 /* Enable DMA request for Tx EP */ -#define nDMAREQ_ENA_T 0x0 #define ISO_T 0x4000 /* enable Isochronous transfers */ -#define nISO_T 0x0 #define AUTOSET_T 0x8000 /* allows TxPktRdy to be set automatically */ -#define nAUTOSET_T 0x0 #define ERROR_TH 0x4 /* error condition host mode */ -#define nERROR_TH 0x0 #define STALL_RECEIVED_TH 0x20 /* Stall handshake received host mode */ -#define nSTALL_RECEIVED_TH 0x0 #define NAK_TIMEOUT_TH 0x80 /* NAK timeout host mode */ -#define nNAK_TIMEOUT_TH 0x0 /* Bit masks for USB_TXCOUNT */ @@ -1823,45 +1525,25 @@ /* Bit masks for USB_RXCSR */ #define RXPKTRDY_R 0x1 /* data packet in FIFO indicator */ -#define nRXPKTRDY_R 0x0 #define FIFO_FULL_R 0x2 /* FIFO not empty */ -#define nFIFO_FULL_R 0x0 #define OVERRUN_R 0x4 /* TxPktRdy not set for an IN token */ -#define nOVERRUN_R 0x0 #define DATAERROR_R 0x8 /* Out packet cannot be loaded into Rx FIFO */ -#define nDATAERROR_R 0x0 #define FLUSHFIFO_R 0x10 /* flush endpoint FIFO */ -#define nFLUSHFIFO_R 0x0 #define STALL_SEND_R 0x20 /* issue a Stall handshake */ -#define nSTALL_SEND_R 0x0 #define STALL_SENT_R 0x40 /* Stall handshake transmitted */ -#define nSTALL_SENT_R 0x0 #define CLEAR_DATATOGGLE_R 0x80 /* clear endpoint data toggle */ -#define nCLEAR_DATATOGGLE_R 0x0 #define INCOMPRX_R 0x100 /* indicates that a large packet is split */ -#define nINCOMPRX_R 0x0 #define DMAREQMODE_R 0x800 /* DMA mode (0 or 1) selection */ -#define nDMAREQMODE_R 0x0 #define DISNYET_R 0x1000 /* disable Nyet handshakes */ -#define nDISNYET_R 0x0 #define DMAREQ_ENA_R 0x2000 /* Enable DMA request for Tx EP */ -#define nDMAREQ_ENA_R 0x0 #define ISO_R 0x4000 /* enable Isochronous transfers */ -#define nISO_R 0x0 #define AUTOCLEAR_R 0x8000 /* allows TxPktRdy to be set automatically */ -#define nAUTOCLEAR_R 0x0 #define ERROR_RH 0x4 /* TxPktRdy not set for an IN token host mode */ -#define nERROR_RH 0x0 #define REQPKT_RH 0x20 /* request an IN transaction host mode */ -#define nREQPKT_RH 0x0 #define STALL_RECEIVED_RH 0x40 /* Stall handshake received host mode */ -#define nSTALL_RECEIVED_RH 0x0 #define INCOMPRX_RH 0x100 /* indicates that a large packet is split host mode */ -#define nINCOMPRX_RH 0x0 #define DMAREQMODE_RH 0x800 /* DMA mode (0 or 1) selection host mode */ -#define nDMAREQMODE_RH 0x0 #define AUTOREQ_RH 0x4000 /* sets ReqPkt automatically host mode */ -#define nAUTOREQ_RH 0x0 /* Bit masks for USB_RXCOUNT */ @@ -1888,35 +1570,22 @@ /* Bit masks for USB_DMA_INTERRUPT */ #define DMA0_INT 0x1 /* DMA0 pending interrupt */ -#define nDMA0_INT 0x0 #define DMA1_INT 0x2 /* DMA1 pending interrupt */ -#define nDMA1_INT 0x0 #define DMA2_INT 0x4 /* DMA2 pending interrupt */ -#define nDMA2_INT 0x0 #define DMA3_INT 0x8 /* DMA3 pending interrupt */ -#define nDMA3_INT 0x0 #define DMA4_INT 0x10 /* DMA4 pending interrupt */ -#define nDMA4_INT 0x0 #define DMA5_INT 0x20 /* DMA5 pending interrupt */ -#define nDMA5_INT 0x0 #define DMA6_INT 0x40 /* DMA6 pending interrupt */ -#define nDMA6_INT 0x0 #define DMA7_INT 0x80 /* DMA7 pending interrupt */ -#define nDMA7_INT 0x0 /* Bit masks for USB_DMAxCONTROL */ #define DMA_ENA 0x1 /* DMA enable */ -#define nDMA_ENA 0x0 #define DIRECTION 0x2 /* direction of DMA transfer */ -#define nDIRECTION 0x0 #define MODE 0x4 /* DMA Bus error */ -#define nMODE 0x0 #define INT_ENA 0x8 /* Interrupt enable */ -#define nINT_ENA 0x0 #define EPNUM 0xf0 /* EP number */ #define BUSERROR 0x100 /* DMA Bus error */ -#define nBUSERROR 0x0 /* Bit masks for USB_DMAxADDRHIGH */ @@ -1937,26 +1606,16 @@ /* Bit masks for HMDMAx_CONTROL */ #define HMDMAEN 0x1 /* Handshake MDMA Enable */ -#define nHMDMAEN 0x0 #define REP 0x2 /* Handshake MDMA Request Polarity */ -#define nREP 0x0 #define UTE 0x8 /* Urgency Threshold Enable */ -#define nUTE 0x0 #define OIE 0x10 /* Overflow Interrupt Enable */ -#define nOIE 0x0 #define BDIE 0x20 /* Block Done Interrupt Enable */ -#define nBDIE 0x0 #define MBDI 0x40 /* Mask Block Done Interrupt */ -#define nMBDI 0x0 #define DRQ 0x300 /* Handshake MDMA Request Type */ #define RBC 0x1000 /* Force Reload of BCOUNT */ -#define nRBC 0x0 #define PS 0x2000 /* Pin Status */ -#define nPS 0x0 #define OI 0x4000 /* Overflow Interrupt Generated */ -#define nOI 0x0 #define BDI 0x8000 /* Block Done Interrupt Generated */ -#define nBDI 0x0 /* ******************************************* */ /* MULTI BIT MACRO ENUMERATIONS */ diff --git a/include/asm-blackfin/mach-bf548/defBF549.h b/include/asm-blackfin/mach-bf548/defBF549.h index b1cc1c073b..c2f4734da4 100644 --- a/include/asm-blackfin/mach-bf548/defBF549.h +++ b/include/asm-blackfin/mach-bf548/defBF549.h @@ -1070,21 +1070,13 @@ /* Bit masks for PIXC_CTL */ #define PIXC_EN 0x1 /* Pixel Compositor Enable */ -#define nPIXC_EN 0x0 #define OVR_A_EN 0x2 /* Overlay A Enable */ -#define nOVR_A_EN 0x0 #define OVR_B_EN 0x4 /* Overlay B Enable */ -#define nOVR_B_EN 0x0 #define IMG_FORM 0x8 /* Image Data Format */ -#define nIMG_FORM 0x0 #define OVR_FORM 0x10 /* Overlay Data Format */ -#define nOVR_FORM 0x0 #define OUT_FORM 0x20 /* Output Data Format */ -#define nOUT_FORM 0x0 #define UDS_MOD 0x40 /* Resampling Mode */ -#define nUDS_MOD 0x0 #define TC_EN 0x80 /* Transparent Color Enable */ -#define nTC_EN 0x0 #define IMG_STAT 0x300 /* Image FIFO Status */ #define OVR_STAT 0xc00 /* Overlay FIFO Status */ #define WM_LVL 0x3000 /* FIFO Watermark Level */ @@ -1132,13 +1124,9 @@ /* Bit masks for PIXC_INTRSTAT */ #define OVR_INT_EN 0x1 /* Interrupt at End of Last Valid Overlay */ -#define nOVR_INT_EN 0x0 #define FRM_INT_EN 0x2 /* Interrupt at End of Frame */ -#define nFRM_INT_EN 0x0 #define OVR_INT_STAT 0x4 /* Overlay Interrupt Status */ -#define nOVR_INT_STAT 0x0 #define FRM_INT_STAT 0x8 /* Frame Interrupt Status */ -#define nFRM_INT_STAT 0x0 /* Bit masks for PIXC_RYCON */ @@ -1146,7 +1134,6 @@ #define A12 0xffc00 /* A12 in the Coefficient Matrix */ #define A13 0x3ff00000 /* A13 in the Coefficient Matrix */ #define RY_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nRY_MULT4 0x0 /* Bit masks for PIXC_GUCON */ @@ -1154,7 +1141,6 @@ #define A22 0xffc00 /* A22 in the Coefficient Matrix */ #define A23 0x3ff00000 /* A23 in the Coefficient Matrix */ #define GU_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nGU_MULT4 0x0 /* Bit masks for PIXC_BVCON */ @@ -1162,7 +1148,6 @@ #define A32 0xffc00 /* A32 in the Coefficient Matrix */ #define A33 0x3ff00000 /* A33 in the Coefficient Matrix */ #define BV_MULT4 0x40000000 /* Multiply Row by 4 */ -#define nBV_MULT4 0x0 /* Bit masks for PIXC_CCBIAS */ @@ -1179,48 +1164,28 @@ /* Bit masks for HOST_CONTROL */ #define HOST_EN 0x1 /* Host Enable */ -#define nHOST_EN 0x0 #define HOST_END 0x2 /* Host Endianess */ -#define nHOST_END 0x0 #define DATA_SIZE 0x4 /* Data Size */ -#define nDATA_SIZE 0x0 #define HOST_RST 0x8 /* Host Reset */ -#define nHOST_RST 0x0 #define HRDY_OVR 0x20 /* Host Ready Override */ -#define nHRDY_OVR 0x0 #define INT_MODE 0x40 /* Interrupt Mode */ -#define nINT_MODE 0x0 #define BT_EN 0x80 /* Bus Timeout Enable */ -#define nBT_EN 0x0 #define EHW 0x100 /* Enable Host Write */ -#define nEHW 0x0 #define EHR 0x200 /* Enable Host Read */ -#define nEHR 0x0 #define BDR 0x400 /* Burst DMA Requests */ -#define nBDR 0x0 /* Bit masks for HOST_STATUS */ #define READY 0x1 /* DMA Ready */ -#define nREADY 0x0 #define FIFOFULL 0x2 /* FIFO Full */ -#define nFIFOFULL 0x0 #define FIFOEMPTY 0x4 /* FIFO Empty */ -#define nFIFOEMPTY 0x0 -#define COMPLETE 0x8 /* DMA Complete */ -#define nCOMPLETE 0x0 +#define DMA_COMPLETE 0x8 /* DMA Complete */ #define HSHK 0x10 /* Host Handshake */ -#define nHSHK 0x0 #define TIMEOUT 0x20 /* Host Timeout */ -#define nTIMEOUT 0x0 #define HIRQ 0x40 /* Host Interrupt Request */ -#define nHIRQ 0x0 #define ALLOW_CNFG 0x80 /* Allow New Configuration */ -#define nALLOW_CNFG 0x0 #define DMA_DIR 0x100 /* DMA Direction */ -#define nDMA_DIR 0x0 #define BTE 0x200 /* Bus Timeout Enabled */ -#define nBTE 0x0 /* Bit masks for HOST_TIMEOUT */ @@ -1229,71 +1194,41 @@ /* Bit masks for MXVR_CONFIG */ #define MXVREN 0x1 /* MXVR Enable */ -#define nMXVREN 0x0 #define MMSM 0x2 /* MXVR Master/Slave Mode Select */ -#define nMMSM 0x0 #define ACTIVE 0x4 /* Active Mode */ -#define nACTIVE 0x0 #define SDELAY 0x8 /* Synchronous Data Delay */ -#define nSDELAY 0x0 #define NCMRXEN 0x10 /* Normal Control Message Receive Enable */ -#define nNCMRXEN 0x0 #define RWRRXEN 0x20 /* Remote Write Receive Enable */ -#define nRWRRXEN 0x0 #define MTXEN 0x40 /* MXVR Transmit Data Enable */ -#define nMTXEN 0x0 #define MTXONB 0x80 /* MXVR Phy Transmitter On */ -#define nMTXONB 0x0 #define EPARITY 0x100 /* Even Parity Select */ -#define nEPARITY 0x0 #define MSB 0x1e00 /* Master Synchronous Boundary */ #define APRXEN 0x2000 /* Asynchronous Packet Receive Enable */ -#define nAPRXEN 0x0 #define WAKEUP 0x4000 /* Wake-Up */ -#define nWAKEUP 0x0 #define LMECH 0x8000 /* Lock Mechanism Select */ -#define nLMECH 0x0 /* Bit masks for MXVR_STATE_0 */ #define NACT 0x1 /* Network Activity */ -#define nNACT 0x0 #define SBLOCK 0x2 /* Super Block Lock */ -#define nSBLOCK 0x0 #define FMPLLST 0xc /* Frequency Multiply PLL SM State */ #define CDRPLLST 0xe0 /* Clock/Data Recovery PLL SM State */ #define APBSY 0x100 /* Asynchronous Packet Transmit Buffer Busy */ -#define nAPBSY 0x0 #define APARB 0x200 /* Asynchronous Packet Arbitrating */ -#define nAPARB 0x0 #define APTX 0x400 /* Asynchronous Packet Transmitting */ -#define nAPTX 0x0 #define APRX 0x800 /* Receiving Asynchronous Packet */ -#define nAPRX 0x0 #define CMBSY 0x1000 /* Control Message Transmit Buffer Busy */ -#define nCMBSY 0x0 #define CMARB 0x2000 /* Control Message Arbitrating */ -#define nCMARB 0x0 #define CMTX 0x4000 /* Control Message Transmitting */ -#define nCMTX 0x0 #define CMRX 0x8000 /* Receiving Control Message */ -#define nCMRX 0x0 #define MRXONB 0x10000 /* MRXONB Pin State */ -#define nMRXONB 0x0 #define RGSIP 0x20000 /* Remote Get Source In Progress */ -#define nRGSIP 0x0 #define DALIP 0x40000 /* Resource Deallocate In Progress */ -#define nDALIP 0x0 #define ALIP 0x80000 /* Resource Allocate In Progress */ -#define nALIP 0x0 #define RRDIP 0x100000 /* Remote Read In Progress */ -#define nRRDIP 0x0 #define RWRIP 0x200000 /* Remote Write In Progress */ -#define nRWRIP 0x0 #define FLOCK 0x400000 /* Frame Lock */ -#define nFLOCK 0x0 #define BLOCK 0x800000 /* Block Lock */ -#define nBLOCK 0x0 #define RSB 0xf000000 /* Received Synchronous Boundary */ #define DERRNUM 0xf0000000 /* DMA Error Channel Number */ @@ -1302,535 +1237,343 @@ #define SRXNUMB 0xf /* Synchronous Receive FIFO Number of Bytes */ #define STXNUMB 0xf0 /* Synchronous Transmit FIFO Number of Bytes */ #define APCONT 0x100 /* Asynchronous Packet Continuation */ -#define nAPCONT 0x0 #define OBERRNUM 0xe00 /* DMA Out of Bounds Error Channel Number */ #define DMAACTIVE0 0x10000 /* DMA0 Active */ -#define nDMAACTIVE0 0x0 #define DMAACTIVE1 0x20000 /* DMA1 Active */ -#define nDMAACTIVE1 0x0 #define DMAACTIVE2 0x40000 /* DMA2 Active */ -#define nDMAACTIVE2 0x0 #define DMAACTIVE3 0x80000 /* DMA3 Active */ -#define nDMAACTIVE3 0x0 #define DMAACTIVE4 0x100000 /* DMA4 Active */ -#define nDMAACTIVE4 0x0 #define DMAACTIVE5 0x200000 /* DMA5 Active */ -#define nDMAACTIVE5 0x0 #define DMAACTIVE6 0x400000 /* DMA6 Active */ -#define nDMAACTIVE6 0x0 #define DMAACTIVE7 0x800000 /* DMA7 Active */ -#define nDMAACTIVE7 0x0 #define DMAPMEN0 0x1000000 /* DMA0 Pattern Matching Enabled */ -#define nDMAPMEN0 0x0 #define DMAPMEN1 0x2000000 /* DMA1 Pattern Matching Enabled */ -#define nDMAPMEN1 0x0 #define DMAPMEN2 0x4000000 /* DMA2 Pattern Matching Enabled */ -#define nDMAPMEN2 0x0 #define DMAPMEN3 0x8000000 /* DMA3 Pattern Matching Enabled */ -#define nDMAPMEN3 0x0 #define DMAPMEN4 0x10000000 /* DMA4 Pattern Matching Enabled */ -#define nDMAPMEN4 0x0 #define DMAPMEN5 0x20000000 /* DMA5 Pattern Matching Enabled */ -#define nDMAPMEN5 0x0 #define DMAPMEN6 0x40000000 /* DMA6 Pattern Matching Enabled */ -#define nDMAPMEN6 0x0 #define DMAPMEN7 0x80000000 /* DMA7 Pattern Matching Enabled */ -#define nDMAPMEN7 0x0 /* Bit masks for MXVR_INT_STAT_0 */ #define NI2A 0x1 /* Network Inactive to Active */ -#define nNI2A 0x0 #define NA2I 0x2 /* Network Active to Inactive */ -#define nNA2I 0x0 #define SBU2L 0x4 /* Super Block Unlock to Lock */ -#define nSBU2L 0x0 #define SBL2U 0x8 /* Super Block Lock to Unlock */ -#define nSBL2U 0x0 #define PRU 0x10 /* Position Register Updated */ -#define nPRU 0x0 #define MPRU 0x20 /* Maximum Position Register Updated */ -#define nMPRU 0x0 #define DRU 0x40 /* Delay Register Updated */ -#define nDRU 0x0 #define MDRU 0x80 /* Maximum Delay Register Updated */ -#define nMDRU 0x0 #define SBU 0x100 /* Synchronous Boundary Updated */ -#define nSBU 0x0 #define ATU 0x200 /* Allocation Table Updated */ -#define nATU 0x0 #define FCZ0 0x400 /* Frame Counter 0 Zero */ -#define nFCZ0 0x0 #define FCZ1 0x800 /* Frame Counter 1 Zero */ -#define nFCZ1 0x0 #define PERR 0x1000 /* Parity Error */ -#define nPERR 0x0 #define MH2L 0x2000 /* MRXONB High to Low */ -#define nMH2L 0x0 #define ML2H 0x4000 /* MRXONB Low to High */ -#define nML2H 0x0 #define WUP 0x8000 /* Wake-Up Preamble Received */ -#define nWUP 0x0 #define FU2L 0x10000 /* Frame Unlock to Lock */ -#define nFU2L 0x0 #define FL2U 0x20000 /* Frame Lock to Unlock */ -#define nFL2U 0x0 #define BU2L 0x40000 /* Block Unlock to Lock */ -#define nBU2L 0x0 #define BL2U 0x80000 /* Block Lock to Unlock */ -#define nBL2U 0x0 #define OBERR 0x100000 /* DMA Out of Bounds Error */ -#define nOBERR 0x0 #define PFL 0x200000 /* PLL Frequency Locked */ -#define nPFL 0x0 #define SCZ 0x400000 /* System Clock Counter Zero */ -#define nSCZ 0x0 #define FERR 0x800000 /* FIFO Error */ -#define nFERR 0x0 #define CMR 0x1000000 /* Control Message Received */ -#define nCMR 0x0 #define CMROF 0x2000000 /* Control Message Receive Buffer Overflow */ -#define nCMROF 0x0 #define CMTS 0x4000000 /* Control Message Transmit Buffer Successfully Sent */ -#define nCMTS 0x0 #define CMTC 0x8000000 /* Control Message Transmit Buffer Successfully Cancelled */ -#define nCMTC 0x0 #define RWRC 0x10000000 /* Remote Write Control Message Completed */ -#define nRWRC 0x0 #define BCZ 0x20000000 /* Block Counter Zero */ -#define nBCZ 0x0 #define BMERR 0x40000000 /* Biphase Mark Coding Error */ -#define nBMERR 0x0 #define DERR 0x80000000 /* DMA Error */ -#define nDERR 0x0 /* Bit masks for MXVR_INT_STAT_1 */ #define HDONE0 0x1 /* DMA0 Half Done */ -#define nHDONE0 0x0 #define DONE0 0x2 /* DMA0 Done */ -#define nDONE0 0x0 #define APR 0x4 /* Asynchronous Packet Received */ -#define nAPR 0x0 #define APROF 0x8 /* Asynchronous Packet Receive Buffer Overflow */ -#define nAPROF 0x0 #define HDONE1 0x10 /* DMA1 Half Done */ -#define nHDONE1 0x0 #define DONE1 0x20 /* DMA1 Done */ -#define nDONE1 0x0 #define APTS 0x40 /* Asynchronous Packet Transmit Buffer Successfully Sent */ -#define nAPTS 0x0 #define APTC 0x80 /* Asynchronous Packet Transmit Buffer Successfully Cancelled */ -#define nAPTC 0x0 #define HDONE2 0x100 /* DMA2 Half Done */ -#define nHDONE2 0x0 #define DONE2 0x200 /* DMA2 Done */ -#define nDONE2 0x0 #define APRCE 0x400 /* Asynchronous Packet Receive CRC Error */ -#define nAPRCE 0x0 #define APRPE 0x800 /* Asynchronous Packet Receive Packet Error */ -#define nAPRPE 0x0 #define HDONE3 0x1000 /* DMA3 Half Done */ -#define nHDONE3 0x0 #define DONE3 0x2000 /* DMA3 Done */ -#define nDONE3 0x0 #define HDONE4 0x10000 /* DMA4 Half Done */ -#define nHDONE4 0x0 #define DONE4 0x20000 /* DMA4 Done */ -#define nDONE4 0x0 #define HDONE5 0x100000 /* DMA5 Half Done */ -#define nHDONE5 0x0 #define DONE5 0x200000 /* DMA5 Done */ -#define nDONE5 0x0 #define HDONE6 0x1000000 /* DMA6 Half Done */ -#define nHDONE6 0x0 #define DONE6 0x2000000 /* DMA6 Done */ -#define nDONE6 0x0 #define HDONE7 0x10000000 /* DMA7 Half Done */ -#define nHDONE7 0x0 #define DONE7 0x20000000 /* DMA7 Done */ -#define nDONE7 0x0 /* Bit masks for MXVR_INT_EN_0 */ #define NI2AEN 0x1 /* Network Inactive to Active Interrupt Enable */ -#define nNI2AEN 0x0 #define NA2IEN 0x2 /* Network Active to Inactive Interrupt Enable */ -#define nNA2IEN 0x0 #define SBU2LEN 0x4 /* Super Block Unlock to Lock Interrupt Enable */ -#define nSBU2LEN 0x0 #define SBL2UEN 0x8 /* Super Block Lock to Unlock Interrupt Enable */ -#define nSBL2UEN 0x0 #define PRUEN 0x10 /* Position Register Updated Interrupt Enable */ -#define nPRUEN 0x0 #define MPRUEN 0x20 /* Maximum Position Register Updated Interrupt Enable */ -#define nMPRUEN 0x0 #define DRUEN 0x40 /* Delay Register Updated Interrupt Enable */ -#define nDRUEN 0x0 #define MDRUEN 0x80 /* Maximum Delay Register Updated Interrupt Enable */ -#define nMDRUEN 0x0 #define SBUEN 0x100 /* Synchronous Boundary Updated Interrupt Enable */ -#define nSBUEN 0x0 #define ATUEN 0x200 /* Allocation Table Updated Interrupt Enable */ -#define nATUEN 0x0 #define FCZ0EN 0x400 /* Frame Counter 0 Zero Interrupt Enable */ -#define nFCZ0EN 0x0 #define FCZ1EN 0x800 /* Frame Counter 1 Zero Interrupt Enable */ -#define nFCZ1EN 0x0 #define PERREN 0x1000 /* Parity Error Interrupt Enable */ -#define nPERREN 0x0 #define MH2LEN 0x2000 /* MRXONB High to Low Interrupt Enable */ -#define nMH2LEN 0x0 #define ML2HEN 0x4000 /* MRXONB Low to High Interrupt Enable */ -#define nML2HEN 0x0 #define WUPEN 0x8000 /* Wake-Up Preamble Received Interrupt Enable */ -#define nWUPEN 0x0 #define FU2LEN 0x10000 /* Frame Unlock to Lock Interrupt Enable */ -#define nFU2LEN 0x0 #define FL2UEN 0x20000 /* Frame Lock to Unlock Interrupt Enable */ -#define nFL2UEN 0x0 #define BU2LEN 0x40000 /* Block Unlock to Lock Interrupt Enable */ -#define nBU2LEN 0x0 #define BL2UEN 0x80000 /* Block Lock to Unlock Interrupt Enable */ -#define nBL2UEN 0x0 #define OBERREN 0x100000 /* DMA Out of Bounds Error Interrupt Enable */ -#define nOBERREN 0x0 #define PFLEN 0x200000 /* PLL Frequency Locked Interrupt Enable */ -#define nPFLEN 0x0 #define SCZEN 0x400000 /* System Clock Counter Zero Interrupt Enable */ -#define nSCZEN 0x0 #define FERREN 0x800000 /* FIFO Error Interrupt Enable */ -#define nFERREN 0x0 #define CMREN 0x1000000 /* Control Message Received Interrupt Enable */ -#define nCMREN 0x0 #define CMROFEN 0x2000000 /* Control Message Receive Buffer Overflow Interrupt Enable */ -#define nCMROFEN 0x0 #define CMTSEN 0x4000000 /* Control Message Transmit Buffer Successfully Sent Interrupt Enable */ -#define nCMTSEN 0x0 #define CMTCEN 0x8000000 /* Control Message Transmit Buffer Successfully Cancelled Interrupt Enable */ -#define nCMTCEN 0x0 #define RWRCEN 0x10000000 /* Remote Write Control Message Completed Interrupt Enable */ -#define nRWRCEN 0x0 #define BCZEN 0x20000000 /* Block Counter Zero Interrupt Enable */ -#define nBCZEN 0x0 #define BMERREN 0x40000000 /* Biphase Mark Coding Error Interrupt Enable */ -#define nBMERREN 0x0 #define DERREN 0x80000000 /* DMA Error Interrupt Enable */ -#define nDERREN 0x0 /* Bit masks for MXVR_INT_EN_1 */ #define HDONEEN0 0x1 /* DMA0 Half Done Interrupt Enable */ -#define nHDONEEN0 0x0 #define DONEEN0 0x2 /* DMA0 Done Interrupt Enable */ -#define nDONEEN0 0x0 #define APREN 0x4 /* Asynchronous Packet Received Interrupt Enable */ -#define nAPREN 0x0 #define APROFEN 0x8 /* Asynchronous Packet Receive Buffer Overflow Interrupt Enable */ -#define nAPROFEN 0x0 #define HDONEEN1 0x10 /* DMA1 Half Done Interrupt Enable */ -#define nHDONEEN1 0x0 #define DONEEN1 0x20 /* DMA1 Done Interrupt Enable */ -#define nDONEEN1 0x0 #define APTSEN 0x40 /* Asynchronous Packet Transmit Buffer Successfully Sent Interrupt Enable */ -#define nAPTSEN 0x0 #define APTCEN 0x80 /* Asynchronous Packet Transmit Buffer Successfully Cancelled Interrupt Enable */ -#define nAPTCEN 0x0 #define HDONEEN2 0x100 /* DMA2 Half Done Interrupt Enable */ -#define nHDONEEN2 0x0 #define DONEEN2 0x200 /* DMA2 Done Interrupt Enable */ -#define nDONEEN2 0x0 #define APRCEEN 0x400 /* Asynchronous Packet Receive CRC Error Interrupt Enable */ -#define nAPRCEEN 0x0 #define APRPEEN 0x800 /* Asynchronous Packet Receive Packet Error Interrupt Enable */ -#define nAPRPEEN 0x0 #define HDONEEN3 0x1000 /* DMA3 Half Done Interrupt Enable */ -#define nHDONEEN3 0x0 #define DONEEN3 0x2000 /* DMA3 Done Interrupt Enable */ -#define nDONEEN3 0x0 #define HDONEEN4 0x10000 /* DMA4 Half Done Interrupt Enable */ -#define nHDONEEN4 0x0 #define DONEEN4 0x20000 /* DMA4 Done Interrupt Enable */ -#define nDONEEN4 0x0 #define HDONEEN5 0x100000 /* DMA5 Half Done Interrupt Enable */ -#define nHDONEEN5 0x0 #define DONEEN5 0x200000 /* DMA5 Done Interrupt Enable */ -#define nDONEEN5 0x0 #define HDONEEN6 0x1000000 /* DMA6 Half Done Interrupt Enable */ -#define nHDONEEN6 0x0 #define DONEEN6 0x2000000 /* DMA6 Done Interrupt Enable */ -#define nDONEEN6 0x0 #define HDONEEN7 0x10000000 /* DMA7 Half Done Interrupt Enable */ -#define nHDONEEN7 0x0 #define DONEEN7 0x20000000 /* DMA7 Done Interrupt Enable */ -#define nDONEEN7 0x0 /* Bit masks for MXVR_POSITION */ #define POSITION 0x3f /* Node Position */ #define PVALID 0x8000 /* Node Position Valid */ -#define nPVALID 0x0 /* Bit masks for MXVR_MAX_POSITION */ #define MPOSITION 0x3f /* Maximum Node Position */ #define MPVALID 0x8000 /* Maximum Node Position Valid */ -#define nMPVALID 0x0 /* Bit masks for MXVR_DELAY */ #define DELAY 0x3f /* Node Frame Delay */ #define DVALID 0x8000 /* Node Frame Delay Valid */ -#define nDVALID 0x0 /* Bit masks for MXVR_MAX_DELAY */ #define MDELAY 0x3f /* Maximum Node Frame Delay */ #define MDVALID 0x8000 /* Maximum Node Frame Delay Valid */ -#define nMDVALID 0x0 /* Bit masks for MXVR_LADDR */ #define LADDR 0xffff /* Logical Address */ #define LVALID 0x80000000 /* Logical Address Valid */ -#define nLVALID 0x0 /* Bit masks for MXVR_GADDR */ #define GADDRL 0xff /* Group Address Lower Byte */ #define GVALID 0x8000 /* Group Address Valid */ -#define nGVALID 0x0 /* Bit masks for MXVR_AADDR */ #define AADDR 0xffff /* Alternate Address */ #define AVALID 0x80000000 /* Alternate Address Valid */ -#define nAVALID 0x0 /* Bit masks for MXVR_ALLOC_0 */ #define CL0 0x7f /* Channel 0 Connection Label */ #define CIU0 0x80 /* Channel 0 In Use */ -#define nCIU0 0x0 #define CL1 0x7f00 /* Channel 0 Connection Label */ #define CIU1 0x8000 /* Channel 0 In Use */ -#define nCIU1 0x0 #define CL2 0x7f0000 /* Channel 0 Connection Label */ #define CIU2 0x800000 /* Channel 0 In Use */ -#define nCIU2 0x0 #define CL3 0x7f000000 /* Channel 0 Connection Label */ #define CIU3 0x80000000 /* Channel 0 In Use */ -#define nCIU3 0x0 /* Bit masks for MXVR_ALLOC_1 */ #define CL4 0x7f /* Channel 4 Connection Label */ #define CIU4 0x80 /* Channel 4 In Use */ -#define nCIU4 0x0 #define CL5 0x7f00 /* Channel 5 Connection Label */ #define CIU5 0x8000 /* Channel 5 In Use */ -#define nCIU5 0x0 #define CL6 0x7f0000 /* Channel 6 Connection Label */ #define CIU6 0x800000 /* Channel 6 In Use */ -#define nCIU6 0x0 #define CL7 0x7f000000 /* Channel 7 Connection Label */ #define CIU7 0x80000000 /* Channel 7 In Use */ -#define nCIU7 0x0 /* Bit masks for MXVR_ALLOC_2 */ #define CL8 0x7f /* Channel 8 Connection Label */ #define CIU8 0x80 /* Channel 8 In Use */ -#define nCIU8 0x0 #define CL9 0x7f00 /* Channel 9 Connection Label */ #define CIU9 0x8000 /* Channel 9 In Use */ -#define nCIU9 0x0 #define CL10 0x7f0000 /* Channel 10 Connection Label */ #define CIU10 0x800000 /* Channel 10 In Use */ -#define nCIU10 0x0 #define CL11 0x7f000000 /* Channel 11 Connection Label */ #define CIU11 0x80000000 /* Channel 11 In Use */ -#define nCIU11 0x0 /* Bit masks for MXVR_ALLOC_3 */ #define CL12 0x7f /* Channel 12 Connection Label */ #define CIU12 0x80 /* Channel 12 In Use */ -#define nCIU12 0x0 #define CL13 0x7f00 /* Channel 13 Connection Label */ #define CIU13 0x8000 /* Channel 13 In Use */ -#define nCIU13 0x0 #define CL14 0x7f0000 /* Channel 14 Connection Label */ #define CIU14 0x800000 /* Channel 14 In Use */ -#define nCIU14 0x0 #define CL15 0x7f000000 /* Channel 15 Connection Label */ #define CIU15 0x80000000 /* Channel 15 In Use */ -#define nCIU15 0x0 /* Bit masks for MXVR_ALLOC_4 */ #define CL16 0x7f /* Channel 16 Connection Label */ #define CIU16 0x80 /* Channel 16 In Use */ -#define nCIU16 0x0 #define CL17 0x7f00 /* Channel 17 Connection Label */ #define CIU17 0x8000 /* Channel 17 In Use */ -#define nCIU17 0x0 #define CL18 0x7f0000 /* Channel 18 Connection Label */ #define CIU18 0x800000 /* Channel 18 In Use */ -#define nCIU18 0x0 #define CL19 0x7f000000 /* Channel 19 Connection Label */ #define CIU19 0x80000000 /* Channel 19 In Use */ -#define nCIU19 0x0 /* Bit masks for MXVR_ALLOC_5 */ #define CL20 0x7f /* Channel 20 Connection Label */ #define CIU20 0x80 /* Channel 20 In Use */ -#define nCIU20 0x0 #define CL21 0x7f00 /* Channel 21 Connection Label */ #define CIU21 0x8000 /* Channel 21 In Use */ -#define nCIU21 0x0 #define CL22 0x7f0000 /* Channel 22 Connection Label */ #define CIU22 0x800000 /* Channel 22 In Use */ -#define nCIU22 0x0 #define CL23 0x7f000000 /* Channel 23 Connection Label */ #define CIU23 0x80000000 /* Channel 23 In Use */ -#define nCIU23 0x0 /* Bit masks for MXVR_ALLOC_6 */ #define CL24 0x7f /* Channel 24 Connection Label */ #define CIU24 0x80 /* Channel 24 In Use */ -#define nCIU24 0x0 #define CL25 0x7f00 /* Channel 25 Connection Label */ #define CIU25 0x8000 /* Channel 25 In Use */ -#define nCIU25 0x0 #define CL26 0x7f0000 /* Channel 26 Connection Label */ #define CIU26 0x800000 /* Channel 26 In Use */ -#define nCIU26 0x0 #define CL27 0x7f000000 /* Channel 27 Connection Label */ #define CIU27 0x80000000 /* Channel 27 In Use */ -#define nCIU27 0x0 /* Bit masks for MXVR_ALLOC_7 */ #define CL28 0x7f /* Channel 28 Connection Label */ #define CIU28 0x80 /* Channel 28 In Use */ -#define nCIU28 0x0 #define CL29 0x7f00 /* Channel 29 Connection Label */ #define CIU29 0x8000 /* Channel 29 In Use */ -#define nCIU29 0x0 #define CL30 0x7f0000 /* Channel 30 Connection Label */ #define CIU30 0x800000 /* Channel 30 In Use */ -#define nCIU30 0x0 #define CL31 0x7f000000 /* Channel 31 Connection Label */ #define CIU31 0x80000000 /* Channel 31 In Use */ -#define nCIU31 0x0 /* Bit masks for MXVR_ALLOC_8 */ #define CL32 0x7f /* Channel 32 Connection Label */ #define CIU32 0x80 /* Channel 32 In Use */ -#define nCIU32 0x0 #define CL33 0x7f00 /* Channel 33 Connection Label */ #define CIU33 0x8000 /* Channel 33 In Use */ -#define nCIU33 0x0 #define CL34 0x7f0000 /* Channel 34 Connection Label */ #define CIU34 0x800000 /* Channel 34 In Use */ -#define nCIU34 0x0 #define CL35 0x7f000000 /* Channel 35 Connection Label */ #define CIU35 0x80000000 /* Channel 35 In Use */ -#define nCIU35 0x0 /* Bit masks for MXVR_ALLOC_9 */ #define CL36 0x7f /* Channel 36 Connection Label */ #define CIU36 0x80 /* Channel 36 In Use */ -#define nCIU36 0x0 #define CL37 0x7f00 /* Channel 37 Connection Label */ #define CIU37 0x8000 /* Channel 37 In Use */ -#define nCIU37 0x0 #define CL38 0x7f0000 /* Channel 38 Connection Label */ #define CIU38 0x800000 /* Channel 38 In Use */ -#define nCIU38 0x0 #define CL39 0x7f000000 /* Channel 39 Connection Label */ #define CIU39 0x80000000 /* Channel 39 In Use */ -#define nCIU39 0x0 /* Bit masks for MXVR_ALLOC_10 */ #define CL40 0x7f /* Channel 40 Connection Label */ #define CIU40 0x80 /* Channel 40 In Use */ -#define nCIU40 0x0 #define CL41 0x7f00 /* Channel 41 Connection Label */ #define CIU41 0x8000 /* Channel 41 In Use */ -#define nCIU41 0x0 #define CL42 0x7f0000 /* Channel 42 Connection Label */ #define CIU42 0x800000 /* Channel 42 In Use */ -#define nCIU42 0x0 #define CL43 0x7f000000 /* Channel 43 Connection Label */ #define CIU43 0x80000000 /* Channel 43 In Use */ -#define nCIU43 0x0 /* Bit masks for MXVR_ALLOC_11 */ #define CL44 0x7f /* Channel 44 Connection Label */ #define CIU44 0x80 /* Channel 44 In Use */ -#define nCIU44 0x0 #define CL45 0x7f00 /* Channel 45 Connection Label */ #define CIU45 0x8000 /* Channel 45 In Use */ -#define nCIU45 0x0 #define CL46 0x7f0000 /* Channel 46 Connection Label */ #define CIU46 0x800000 /* Channel 46 In Use */ -#define nCIU46 0x0 #define CL47 0x7f000000 /* Channel 47 Connection Label */ #define CIU47 0x80000000 /* Channel 47 In Use */ -#define nCIU47 0x0 /* Bit masks for MXVR_ALLOC_12 */ #define CL48 0x7f /* Channel 48 Connection Label */ #define CIU48 0x80 /* Channel 48 In Use */ -#define nCIU48 0x0 #define CL49 0x7f00 /* Channel 49 Connection Label */ #define CIU49 0x8000 /* Channel 49 In Use */ -#define nCIU49 0x0 #define CL50 0x7f0000 /* Channel 50 Connection Label */ #define CIU50 0x800000 /* Channel 50 In Use */ -#define nCIU50 0x0 #define CL51 0x7f000000 /* Channel 51 Connection Label */ #define CIU51 0x80000000 /* Channel 51 In Use */ -#define nCIU51 0x0 /* Bit masks for MXVR_ALLOC_13 */ #define CL52 0x7f /* Channel 52 Connection Label */ #define CIU52 0x80 /* Channel 52 In Use */ -#define nCIU52 0x0 #define CL53 0x7f00 /* Channel 53 Connection Label */ #define CIU53 0x8000 /* Channel 53 In Use */ -#define nCIU53 0x0 #define CL54 0x7f0000 /* Channel 54 Connection Label */ #define CIU54 0x800000 /* Channel 54 In Use */ -#define nCIU54 0x0 #define CL55 0x7f000000 /* Channel 55 Connection Label */ #define CIU55 0x80000000 /* Channel 55 In Use */ -#define nCIU55 0x0 /* Bit masks for MXVR_ALLOC_14 */ #define CL56 0x7f /* Channel 56 Connection Label */ #define CIU56 0x80 /* Channel 56 In Use */ -#define nCIU56 0x0 #define CL57 0x7f00 /* Channel 57 Connection Label */ #define CIU57 0x8000 /* Channel 57 In Use */ -#define nCIU57 0x0 #define CL58 0x7f0000 /* Channel 58 Connection Label */ #define CIU58 0x800000 /* Channel 58 In Use */ -#define nCIU58 0x0 #define CL59 0x7f000000 /* Channel 59 Connection Label */ #define CIU59 0x80000000 /* Channel 59 In Use */ -#define nCIU59 0x0 /* MXVR_SYNC_LCHAN_0 Masks */ @@ -1926,19 +1669,13 @@ /* Bit masks for MXVR_DMAx_CONFIG */ #define MDMAEN 0x1 /* DMA Channel Enable */ -#define nMDMAEN 0x0 #define DD 0x2 /* DMA Channel Direction */ -#define nDD 0x0 #define BY4SWAPEN 0x20 /* DMA Channel Four Byte Swap Enable */ -#define nBY4SWAPEN 0x0 #define LCHAN 0x3c0 /* DMA Channel Logical Channel */ #define BITSWAPEN 0x400 /* DMA Channel Bit Swap Enable */ -#define nBITSWAPEN 0x0 #define BY2SWAPEN 0x800 /* DMA Channel Two Byte Swap Enable */ -#define nBY2SWAPEN 0x0 #define MFLOW 0x7000 /* DMA Channel Operation Flow */ #define FIXEDPM 0x80000 /* DMA Channel Fixed Pattern Matching Select */ -#define nFIXEDPM 0x0 #define STARTPAT 0x300000 /* DMA Channel Start Pattern Select */ #define STOPPAT 0xc00000 /* DMA Channel Stop Pattern Select */ #define COUNTPOS 0x1c000000 /* DMA Channel Count Position */ @@ -1946,94 +1683,71 @@ /* Bit masks for MXVR_AP_CTL */ #define STARTAP 0x1 /* Start Asynchronous Packet Transmission */ -#define nSTARTAP 0x0 #define CANCELAP 0x2 /* Cancel Asynchronous Packet Transmission */ -#define nCANCELAP 0x0 #define RESETAP 0x4 /* Reset Asynchronous Packet Arbitration */ -#define nRESETAP 0x0 #define APRBE0 0x4000 /* Asynchronous Packet Receive Buffer Entry 0 */ -#define nAPRBE0 0x0 #define APRBE1 0x8000 /* Asynchronous Packet Receive Buffer Entry 1 */ -#define nAPRBE1 0x0 /* Bit masks for MXVR_APRB_START_ADDR */ -#define MXVR_APRB_START_ADDR 0x1fffffe /* Asynchronous Packet Receive Buffer Start Address */ +#define MXVR_APRB_START_ADDR_MASK 0x1fffffe /* Asynchronous Packet Receive Buffer Start Address */ /* Bit masks for MXVR_APRB_CURR_ADDR */ -#define MXVR_APRB_CURR_ADDR 0xffffffff /* Asynchronous Packet Receive Buffer Current Address */ +#define MXVR_APRB_CURR_ADDR_MASK 0xffffffff /* Asynchronous Packet Receive Buffer Current Address */ /* Bit masks for MXVR_APTB_START_ADDR */ -#define MXVR_APTB_START_ADDR 0x1fffffe /* Asynchronous Packet Transmit Buffer Start Address */ +#define MXVR_APTB_START_ADDR_MASK 0x1fffffe /* Asynchronous Packet Transmit Buffer Start Address */ /* Bit masks for MXVR_APTB_CURR_ADDR */ -#define MXVR_APTB_CURR_ADDR 0xffffffff /* Asynchronous Packet Transmit Buffer Current Address */ +#define MXVR_APTB_CURR_ADDR_MASK 0xffffffff /* Asynchronous Packet Transmit Buffer Current Address */ /* Bit masks for MXVR_CM_CTL */ #define STARTCM 0x1 /* Start Control Message Transmission */ -#define nSTARTCM 0x0 #define CANCELCM 0x2 /* Cancel Control Message Transmission */ -#define nCANCELCM 0x0 #define CMRBE0 0x10000 /* Control Message Receive Buffer Entry 0 */ -#define nCMRBE0 0x0 #define CMRBE1 0x20000 /* Control Message Receive Buffer Entry 1 */ -#define nCMRBE1 0x0 #define CMRBE2 0x40000 /* Control Message Receive Buffer Entry 2 */ -#define nCMRBE2 0x0 #define CMRBE3 0x80000 /* Control Message Receive Buffer Entry 3 */ -#define nCMRBE3 0x0 #define CMRBE4 0x100000 /* Control Message Receive Buffer Entry 4 */ -#define nCMRBE4 0x0 #define CMRBE5 0x200000 /* Control Message Receive Buffer Entry 5 */ -#define nCMRBE5 0x0 #define CMRBE6 0x400000 /* Control Message Receive Buffer Entry 6 */ -#define nCMRBE6 0x0 #define CMRBE7 0x800000 /* Control Message Receive Buffer Entry 7 */ -#define nCMRBE7 0x0 #define CMRBE8 0x1000000 /* Control Message Receive Buffer Entry 8 */ -#define nCMRBE8 0x0 #define CMRBE9 0x2000000 /* Control Message Receive Buffer Entry 9 */ -#define nCMRBE9 0x0 #define CMRBE10 0x4000000 /* Control Message Receive Buffer Entry 10 */ -#define nCMRBE10 0x0 #define CMRBE11 0x8000000 /* Control Message Receive Buffer Entry 11 */ -#define nCMRBE11 0x0 #define CMRBE12 0x10000000 /* Control Message Receive Buffer Entry 12 */ -#define nCMRBE12 0x0 #define CMRBE13 0x20000000 /* Control Message Receive Buffer Entry 13 */ -#define nCMRBE13 0x0 #define CMRBE14 0x40000000 /* Control Message Receive Buffer Entry 14 */ -#define nCMRBE14 0x0 #define CMRBE15 0x80000000 /* Control Message Receive Buffer Entry 15 */ -#define nCMRBE15 0x0 /* Bit masks for MXVR_CMRB_START_ADDR */ -#define MXVR_CMRB_START_ADDR 0x1fffffe /* Control Message Receive Buffer Start Address */ +#define MXVR_CMRB_START_ADDR_MASK 0x1fffffe /* Control Message Receive Buffer Start Address */ /* Bit masks for MXVR_CMRB_CURR_ADDR */ -#define MXVR_CMRB_CURR_ADDR 0xffffffff /* Control Message Receive Buffer Current Address */ +#define MXVR_CMRB_CURR_ADDR_MASK 0xffffffff /* Control Message Receive Buffer Current Address */ /* Bit masks for MXVR_CMTB_START_ADDR */ -#define MXVR_CMTB_START_ADDR 0x1fffffe /* Control Message Transmit Buffer Start Address */ +#define MXVR_CMTB_START_ADDR_MASK 0x1fffffe /* Control Message Transmit Buffer Start Address */ /* Bit masks for MXVR_CMTB_CURR_ADDR */ -#define MXVR_CMTB_CURR_ADDR 0xffffffff /* Control Message Transmit Buffer Current Address */ +#define MXVR_CMTB_CURR_ADDR_MASK 0xffffffff /* Control Message Transmit Buffer Current Address */ /* Bit masks for MXVR_RRDB_START_ADDR */ -#define MXVR_RRDB_START_ADDR 0x1fffffe /* Remote Read Buffer Start Address */ +#define MXVR_RRDB_START_ADDR_MASK 0x1fffffe /* Remote Read Buffer Start Address */ /* Bit masks for MXVR_RRDB_CURR_ADDR */ -#define MXVR_RRDB_CURR_ADDR 0xffffffff /* Remote Read Buffer Current Address */ +#define MXVR_RRDB_CURR_ADDR_MASK 0xffffffff /* Remote Read Buffer Current Address */ /* Bit masks for MXVR_PAT_DATAx */ @@ -2045,136 +1759,72 @@ /* Bit masks for MXVR_PAT_EN_0 */ #define MATCH_EN_0_0 0x1 /* Pattern Match Enable Byte 0 Bit 0 */ -#define nMATCH_EN_0_0 0x0 #define MATCH_EN_0_1 0x2 /* Pattern Match Enable Byte 0 Bit 1 */ -#define nMATCH_EN_0_1 0x0 #define MATCH_EN_0_2 0x4 /* Pattern Match Enable Byte 0 Bit 2 */ -#define nMATCH_EN_0_2 0x0 #define MATCH_EN_0_3 0x8 /* Pattern Match Enable Byte 0 Bit 3 */ -#define nMATCH_EN_0_3 0x0 #define MATCH_EN_0_4 0x10 /* Pattern Match Enable Byte 0 Bit 4 */ -#define nMATCH_EN_0_4 0x0 #define MATCH_EN_0_5 0x20 /* Pattern Match Enable Byte 0 Bit 5 */ -#define nMATCH_EN_0_5 0x0 #define MATCH_EN_0_6 0x40 /* Pattern Match Enable Byte 0 Bit 6 */ -#define nMATCH_EN_0_6 0x0 #define MATCH_EN_0_7 0x80 /* Pattern Match Enable Byte 0 Bit 7 */ -#define nMATCH_EN_0_7 0x0 #define MATCH_EN_1_0 0x100 /* Pattern Match Enable Byte 1 Bit 0 */ -#define nMATCH_EN_1_0 0x0 #define MATCH_EN_1_1 0x200 /* Pattern Match Enable Byte 1 Bit 1 */ -#define nMATCH_EN_1_1 0x0 #define MATCH_EN_1_2 0x400 /* Pattern Match Enable Byte 1 Bit 2 */ -#define nMATCH_EN_1_2 0x0 #define MATCH_EN_1_3 0x800 /* Pattern Match Enable Byte 1 Bit 3 */ -#define nMATCH_EN_1_3 0x0 #define MATCH_EN_1_4 0x1000 /* Pattern Match Enable Byte 1 Bit 4 */ -#define nMATCH_EN_1_4 0x0 #define MATCH_EN_1_5 0x2000 /* Pattern Match Enable Byte 1 Bit 5 */ -#define nMATCH_EN_1_5 0x0 #define MATCH_EN_1_6 0x4000 /* Pattern Match Enable Byte 1 Bit 6 */ -#define nMATCH_EN_1_6 0x0 #define MATCH_EN_1_7 0x8000 /* Pattern Match Enable Byte 1 Bit 7 */ -#define nMATCH_EN_1_7 0x0 #define MATCH_EN_2_0 0x10000 /* Pattern Match Enable Byte 2 Bit 0 */ -#define nMATCH_EN_2_0 0x0 #define MATCH_EN_2_1 0x20000 /* Pattern Match Enable Byte 2 Bit 1 */ -#define nMATCH_EN_2_1 0x0 #define MATCH_EN_2_2 0x40000 /* Pattern Match Enable Byte 2 Bit 2 */ -#define nMATCH_EN_2_2 0x0 #define MATCH_EN_2_3 0x80000 /* Pattern Match Enable Byte 2 Bit 3 */ -#define nMATCH_EN_2_3 0x0 #define MATCH_EN_2_4 0x100000 /* Pattern Match Enable Byte 2 Bit 4 */ -#define nMATCH_EN_2_4 0x0 #define MATCH_EN_2_5 0x200000 /* Pattern Match Enable Byte 2 Bit 5 */ -#define nMATCH_EN_2_5 0x0 #define MATCH_EN_2_6 0x400000 /* Pattern Match Enable Byte 2 Bit 6 */ -#define nMATCH_EN_2_6 0x0 #define MATCH_EN_2_7 0x800000 /* Pattern Match Enable Byte 2 Bit 7 */ -#define nMATCH_EN_2_7 0x0 #define MATCH_EN_3_0 0x1000000 /* Pattern Match Enable Byte 3 Bit 0 */ -#define nMATCH_EN_3_0 0x0 #define MATCH_EN_3_1 0x2000000 /* Pattern Match Enable Byte 3 Bit 1 */ -#define nMATCH_EN_3_1 0x0 #define MATCH_EN_3_2 0x4000000 /* Pattern Match Enable Byte 3 Bit 2 */ -#define nMATCH_EN_3_2 0x0 #define MATCH_EN_3_3 0x8000000 /* Pattern Match Enable Byte 3 Bit 3 */ -#define nMATCH_EN_3_3 0x0 #define MATCH_EN_3_4 0x10000000 /* Pattern Match Enable Byte 3 Bit 4 */ -#define nMATCH_EN_3_4 0x0 #define MATCH_EN_3_5 0x20000000 /* Pattern Match Enable Byte 3 Bit 5 */ -#define nMATCH_EN_3_5 0x0 #define MATCH_EN_3_6 0x40000000 /* Pattern Match Enable Byte 3 Bit 6 */ -#define nMATCH_EN_3_6 0x0 #define MATCH_EN_3_7 0x80000000 /* Pattern Match Enable Byte 3 Bit 7 */ -#define nMATCH_EN_3_7 0x0 /* Bit masks for MXVR_PAT_EN_1 */ #define MATCH_EN_0_0 0x1 /* Pattern Match Enable Byte 0 Bit 0 */ -#define nMATCH_EN_0_0 0x0 #define MATCH_EN_0_1 0x2 /* Pattern Match Enable Byte 0 Bit 1 */ -#define nMATCH_EN_0_1 0x0 #define MATCH_EN_0_2 0x4 /* Pattern Match Enable Byte 0 Bit 2 */ -#define nMATCH_EN_0_2 0x0 #define MATCH_EN_0_3 0x8 /* Pattern Match Enable Byte 0 Bit 3 */ -#define nMATCH_EN_0_3 0x0 #define MATCH_EN_0_4 0x10 /* Pattern Match Enable Byte 0 Bit 4 */ -#define nMATCH_EN_0_4 0x0 #define MATCH_EN_0_5 0x20 /* Pattern Match Enable Byte 0 Bit 5 */ -#define nMATCH_EN_0_5 0x0 #define MATCH_EN_0_6 0x40 /* Pattern Match Enable Byte 0 Bit 6 */ -#define nMATCH_EN_0_6 0x0 #define MATCH_EN_0_7 0x80 /* Pattern Match Enable Byte 0 Bit 7 */ -#define nMATCH_EN_0_7 0x0 #define MATCH_EN_1_0 0x100 /* Pattern Match Enable Byte 1 Bit 0 */ -#define nMATCH_EN_1_0 0x0 #define MATCH_EN_1_1 0x200 /* Pattern Match Enable Byte 1 Bit 1 */ -#define nMATCH_EN_1_1 0x0 #define MATCH_EN_1_2 0x400 /* Pattern Match Enable Byte 1 Bit 2 */ -#define nMATCH_EN_1_2 0x0 #define MATCH_EN_1_3 0x800 /* Pattern Match Enable Byte 1 Bit 3 */ -#define nMATCH_EN_1_3 0x0 #define MATCH_EN_1_4 0x1000 /* Pattern Match Enable Byte 1 Bit 4 */ -#define nMATCH_EN_1_4 0x0 #define MATCH_EN_1_5 0x2000 /* Pattern Match Enable Byte 1 Bit 5 */ -#define nMATCH_EN_1_5 0x0 #define MATCH_EN_1_6 0x4000 /* Pattern Match Enable Byte 1 Bit 6 */ -#define nMATCH_EN_1_6 0x0 #define MATCH_EN_1_7 0x8000 /* Pattern Match Enable Byte 1 Bit 7 */ -#define nMATCH_EN_1_7 0x0 #define MATCH_EN_2_0 0x10000 /* Pattern Match Enable Byte 2 Bit 0 */ -#define nMATCH_EN_2_0 0x0 #define MATCH_EN_2_1 0x20000 /* Pattern Match Enable Byte 2 Bit 1 */ -#define nMATCH_EN_2_1 0x0 #define MATCH_EN_2_2 0x40000 /* Pattern Match Enable Byte 2 Bit 2 */ -#define nMATCH_EN_2_2 0x0 #define MATCH_EN_2_3 0x80000 /* Pattern Match Enable Byte 2 Bit 3 */ -#define nMATCH_EN_2_3 0x0 #define MATCH_EN_2_4 0x100000 /* Pattern Match Enable Byte 2 Bit 4 */ -#define nMATCH_EN_2_4 0x0 #define MATCH_EN_2_5 0x200000 /* Pattern Match Enable Byte 2 Bit 5 */ -#define nMATCH_EN_2_5 0x0 #define MATCH_EN_2_6 0x400000 /* Pattern Match Enable Byte 2 Bit 6 */ -#define nMATCH_EN_2_6 0x0 #define MATCH_EN_2_7 0x800000 /* Pattern Match Enable Byte 2 Bit 7 */ -#define nMATCH_EN_2_7 0x0 #define MATCH_EN_3_0 0x1000000 /* Pattern Match Enable Byte 3 Bit 0 */ -#define nMATCH_EN_3_0 0x0 #define MATCH_EN_3_1 0x2000000 /* Pattern Match Enable Byte 3 Bit 1 */ -#define nMATCH_EN_3_1 0x0 #define MATCH_EN_3_2 0x4000000 /* Pattern Match Enable Byte 3 Bit 2 */ -#define nMATCH_EN_3_2 0x0 #define MATCH_EN_3_3 0x8000000 /* Pattern Match Enable Byte 3 Bit 3 */ -#define nMATCH_EN_3_3 0x0 #define MATCH_EN_3_4 0x10000000 /* Pattern Match Enable Byte 3 Bit 4 */ -#define nMATCH_EN_3_4 0x0 #define MATCH_EN_3_5 0x20000000 /* Pattern Match Enable Byte 3 Bit 5 */ -#define nMATCH_EN_3_5 0x0 #define MATCH_EN_3_6 0x40000000 /* Pattern Match Enable Byte 3 Bit 6 */ -#define nMATCH_EN_3_6 0x0 #define MATCH_EN_3_7 0x80000000 /* Pattern Match Enable Byte 3 Bit 7 */ -#define nMATCH_EN_3_7 0x0 /* Bit masks for MXVR_FRAME_CNT_0 */ @@ -2188,226 +1838,166 @@ #define TX_CH0 0x3f /* Transmit Channel 0 */ #define MUTE_CH0 0x80 /* Mute Channel 0 */ -#define nMUTE_CH0 0x0 #define TX_CH1 0x3f00 /* Transmit Channel 0 */ #define MUTE_CH1 0x8000 /* Mute Channel 0 */ -#define nMUTE_CH1 0x0 #define TX_CH2 0x3f0000 /* Transmit Channel 0 */ #define MUTE_CH2 0x800000 /* Mute Channel 0 */ -#define nMUTE_CH2 0x0 #define TX_CH3 0x3f000000 /* Transmit Channel 0 */ #define MUTE_CH3 0x80000000 /* Mute Channel 0 */ -#define nMUTE_CH3 0x0 /* Bit masks for MXVR_ROUTING_1 */ #define TX_CH4 0x3f /* Transmit Channel 4 */ #define MUTE_CH4 0x80 /* Mute Channel 4 */ -#define nMUTE_CH4 0x0 #define TX_CH5 0x3f00 /* Transmit Channel 5 */ #define MUTE_CH5 0x8000 /* Mute Channel 5 */ -#define nMUTE_CH5 0x0 #define TX_CH6 0x3f0000 /* Transmit Channel 6 */ #define MUTE_CH6 0x800000 /* Mute Channel 6 */ -#define nMUTE_CH6 0x0 #define TX_CH7 0x3f000000 /* Transmit Channel 7 */ #define MUTE_CH7 0x80000000 /* Mute Channel 7 */ -#define nMUTE_CH7 0x0 /* Bit masks for MXVR_ROUTING_2 */ #define TX_CH8 0x3f /* Transmit Channel 8 */ #define MUTE_CH8 0x80 /* Mute Channel 8 */ -#define nMUTE_CH8 0x0 #define TX_CH9 0x3f00 /* Transmit Channel 9 */ #define MUTE_CH9 0x8000 /* Mute Channel 9 */ -#define nMUTE_CH9 0x0 #define TX_CH10 0x3f0000 /* Transmit Channel 10 */ #define MUTE_CH10 0x800000 /* Mute Channel 10 */ -#define nMUTE_CH10 0x0 #define TX_CH11 0x3f000000 /* Transmit Channel 11 */ #define MUTE_CH11 0x80000000 /* Mute Channel 11 */ -#define nMUTE_CH11 0x0 /* Bit masks for MXVR_ROUTING_3 */ #define TX_CH12 0x3f /* Transmit Channel 12 */ #define MUTE_CH12 0x80 /* Mute Channel 12 */ -#define nMUTE_CH12 0x0 #define TX_CH13 0x3f00 /* Transmit Channel 13 */ #define MUTE_CH13 0x8000 /* Mute Channel 13 */ -#define nMUTE_CH13 0x0 #define TX_CH14 0x3f0000 /* Transmit Channel 14 */ #define MUTE_CH14 0x800000 /* Mute Channel 14 */ -#define nMUTE_CH14 0x0 #define TX_CH15 0x3f000000 /* Transmit Channel 15 */ #define MUTE_CH15 0x80000000 /* Mute Channel 15 */ -#define nMUTE_CH15 0x0 /* Bit masks for MXVR_ROUTING_4 */ #define TX_CH16 0x3f /* Transmit Channel 16 */ #define MUTE_CH16 0x80 /* Mute Channel 16 */ -#define nMUTE_CH16 0x0 #define TX_CH17 0x3f00 /* Transmit Channel 17 */ #define MUTE_CH17 0x8000 /* Mute Channel 17 */ -#define nMUTE_CH17 0x0 #define TX_CH18 0x3f0000 /* Transmit Channel 18 */ #define MUTE_CH18 0x800000 /* Mute Channel 18 */ -#define nMUTE_CH18 0x0 #define TX_CH19 0x3f000000 /* Transmit Channel 19 */ #define MUTE_CH19 0x80000000 /* Mute Channel 19 */ -#define nMUTE_CH19 0x0 /* Bit masks for MXVR_ROUTING_5 */ #define TX_CH20 0x3f /* Transmit Channel 20 */ #define MUTE_CH20 0x80 /* Mute Channel 20 */ -#define nMUTE_CH20 0x0 #define TX_CH21 0x3f00 /* Transmit Channel 21 */ #define MUTE_CH21 0x8000 /* Mute Channel 21 */ -#define nMUTE_CH21 0x0 #define TX_CH22 0x3f0000 /* Transmit Channel 22 */ #define MUTE_CH22 0x800000 /* Mute Channel 22 */ -#define nMUTE_CH22 0x0 #define TX_CH23 0x3f000000 /* Transmit Channel 23 */ #define MUTE_CH23 0x80000000 /* Mute Channel 23 */ -#define nMUTE_CH23 0x0 /* Bit masks for MXVR_ROUTING_6 */ #define TX_CH24 0x3f /* Transmit Channel 24 */ #define MUTE_CH24 0x80 /* Mute Channel 24 */ -#define nMUTE_CH24 0x0 #define TX_CH25 0x3f00 /* Transmit Channel 25 */ #define MUTE_CH25 0x8000 /* Mute Channel 25 */ -#define nMUTE_CH25 0x0 #define TX_CH26 0x3f0000 /* Transmit Channel 26 */ #define MUTE_CH26 0x800000 /* Mute Channel 26 */ -#define nMUTE_CH26 0x0 #define TX_CH27 0x3f000000 /* Transmit Channel 27 */ #define MUTE_CH27 0x80000000 /* Mute Channel 27 */ -#define nMUTE_CH27 0x0 /* Bit masks for MXVR_ROUTING_7 */ #define TX_CH28 0x3f /* Transmit Channel 28 */ #define MUTE_CH28 0x80 /* Mute Channel 28 */ -#define nMUTE_CH28 0x0 #define TX_CH29 0x3f00 /* Transmit Channel 29 */ #define MUTE_CH29 0x8000 /* Mute Channel 29 */ -#define nMUTE_CH29 0x0 #define TX_CH30 0x3f0000 /* Transmit Channel 30 */ #define MUTE_CH30 0x800000 /* Mute Channel 30 */ -#define nMUTE_CH30 0x0 #define TX_CH31 0x3f000000 /* Transmit Channel 31 */ #define MUTE_CH31 0x80000000 /* Mute Channel 31 */ -#define nMUTE_CH31 0x0 /* Bit masks for MXVR_ROUTING_8 */ #define TX_CH32 0x3f /* Transmit Channel 32 */ #define MUTE_CH32 0x80 /* Mute Channel 32 */ -#define nMUTE_CH32 0x0 #define TX_CH33 0x3f00 /* Transmit Channel 33 */ #define MUTE_CH33 0x8000 /* Mute Channel 33 */ -#define nMUTE_CH33 0x0 #define TX_CH34 0x3f0000 /* Transmit Channel 34 */ #define MUTE_CH34 0x800000 /* Mute Channel 34 */ -#define nMUTE_CH34 0x0 #define TX_CH35 0x3f000000 /* Transmit Channel 35 */ #define MUTE_CH35 0x80000000 /* Mute Channel 35 */ -#define nMUTE_CH35 0x0 /* Bit masks for MXVR_ROUTING_9 */ #define TX_CH36 0x3f /* Transmit Channel 36 */ #define MUTE_CH36 0x80 /* Mute Channel 36 */ -#define nMUTE_CH36 0x0 #define TX_CH37 0x3f00 /* Transmit Channel 37 */ #define MUTE_CH37 0x8000 /* Mute Channel 37 */ -#define nMUTE_CH37 0x0 #define TX_CH38 0x3f0000 /* Transmit Channel 38 */ #define MUTE_CH38 0x800000 /* Mute Channel 38 */ -#define nMUTE_CH38 0x0 #define TX_CH39 0x3f000000 /* Transmit Channel 39 */ #define MUTE_CH39 0x80000000 /* Mute Channel 39 */ -#define nMUTE_CH39 0x0 /* Bit masks for MXVR_ROUTING_10 */ #define TX_CH40 0x3f /* Transmit Channel 40 */ #define MUTE_CH40 0x80 /* Mute Channel 40 */ -#define nMUTE_CH40 0x0 #define TX_CH41 0x3f00 /* Transmit Channel 41 */ #define MUTE_CH41 0x8000 /* Mute Channel 41 */ -#define nMUTE_CH41 0x0 #define TX_CH42 0x3f0000 /* Transmit Channel 42 */ #define MUTE_CH42 0x800000 /* Mute Channel 42 */ -#define nMUTE_CH42 0x0 #define TX_CH43 0x3f000000 /* Transmit Channel 43 */ #define MUTE_CH43 0x80000000 /* Mute Channel 43 */ -#define nMUTE_CH43 0x0 /* Bit masks for MXVR_ROUTING_11 */ #define TX_CH44 0x3f /* Transmit Channel 44 */ #define MUTE_CH44 0x80 /* Mute Channel 44 */ -#define nMUTE_CH44 0x0 #define TX_CH45 0x3f00 /* Transmit Channel 45 */ #define MUTE_CH45 0x8000 /* Mute Channel 45 */ -#define nMUTE_CH45 0x0 #define TX_CH46 0x3f0000 /* Transmit Channel 46 */ #define MUTE_CH46 0x800000 /* Mute Channel 46 */ -#define nMUTE_CH46 0x0 #define TX_CH47 0x3f000000 /* Transmit Channel 47 */ #define MUTE_CH47 0x80000000 /* Mute Channel 47 */ -#define nMUTE_CH47 0x0 /* Bit masks for MXVR_ROUTING_12 */ #define TX_CH48 0x3f /* Transmit Channel 48 */ #define MUTE_CH48 0x80 /* Mute Channel 48 */ -#define nMUTE_CH48 0x0 #define TX_CH49 0x3f00 /* Transmit Channel 49 */ #define MUTE_CH49 0x8000 /* Mute Channel 49 */ -#define nMUTE_CH49 0x0 #define TX_CH50 0x3f0000 /* Transmit Channel 50 */ #define MUTE_CH50 0x800000 /* Mute Channel 50 */ -#define nMUTE_CH50 0x0 #define TX_CH51 0x3f000000 /* Transmit Channel 51 */ #define MUTE_CH51 0x80000000 /* Mute Channel 51 */ -#define nMUTE_CH51 0x0 /* Bit masks for MXVR_ROUTING_13 */ #define TX_CH52 0x3f /* Transmit Channel 52 */ #define MUTE_CH52 0x80 /* Mute Channel 52 */ -#define nMUTE_CH52 0x0 #define TX_CH53 0x3f00 /* Transmit Channel 53 */ #define MUTE_CH53 0x8000 /* Mute Channel 53 */ -#define nMUTE_CH53 0x0 #define TX_CH54 0x3f0000 /* Transmit Channel 54 */ #define MUTE_CH54 0x800000 /* Mute Channel 54 */ -#define nMUTE_CH54 0x0 #define TX_CH55 0x3f000000 /* Transmit Channel 55 */ #define MUTE_CH55 0x80000000 /* Mute Channel 55 */ -#define nMUTE_CH55 0x0 /* Bit masks for MXVR_ROUTING_14 */ #define TX_CH56 0x3f /* Transmit Channel 56 */ #define MUTE_CH56 0x80 /* Mute Channel 56 */ -#define nMUTE_CH56 0x0 #define TX_CH57 0x3f00 /* Transmit Channel 57 */ #define MUTE_CH57 0x8000 /* Mute Channel 57 */ -#define nMUTE_CH57 0x0 #define TX_CH58 0x3f0000 /* Transmit Channel 58 */ #define MUTE_CH58 0x800000 /* Mute Channel 58 */ -#define nMUTE_CH58 0x0 #define TX_CH59 0x3f000000 /* Transmit Channel 59 */ #define MUTE_CH59 0x80000000 /* Mute Channel 59 */ -#define nMUTE_CH59 0x0 /* Bit masks for MXVR_BLOCK_CNT */ @@ -2416,53 +2006,37 @@ /* Bit masks for MXVR_CLK_CTL */ #define MXTALCEN 0x1 /* MXVR Crystal Oscillator Clock Enable */ -#define nMXTALCEN 0x0 #define MXTALFEN 0x2 /* MXVR Crystal Oscillator Feedback Enable */ -#define nMXTALFEN 0x0 #define MXTALMUL 0x30 /* MXVR Crystal Multiplier */ #define CLKX3SEL 0x80 /* Clock Generation Source Select */ -#define nCLKX3SEL 0x0 #define MMCLKEN 0x100 /* Master Clock Enable */ -#define nMMCLKEN 0x0 #define MMCLKMUL 0x1e00 /* Master Clock Multiplication Factor */ #define PLLSMPS 0xe000 /* MXVR PLL State Machine Prescaler */ #define MBCLKEN 0x10000 /* Bit Clock Enable */ -#define nMBCLKEN 0x0 #define MBCLKDIV 0x1e0000 /* Bit Clock Divide Factor */ #define INVRX 0x800000 /* Invert Receive Data */ -#define nINVRX 0x0 #define MFSEN 0x1000000 /* Frame Sync Enable */ -#define nMFSEN 0x0 #define MFSDIV 0x1e000000 /* Frame Sync Divide Factor */ #define MFSSEL 0x60000000 /* Frame Sync Select */ #define MFSSYNC 0x80000000 /* Frame Sync Synchronization Select */ -#define nMFSSYNC 0x0 /* Bit masks for MXVR_CDRPLL_CTL */ #define CDRSMEN 0x1 /* MXVR CDRPLL State Machine Enable */ -#define nCDRSMEN 0x0 #define CDRRSTB 0x2 /* MXVR CDRPLL Reset */ -#define nCDRRSTB 0x0 #define CDRSVCO 0x4 /* MXVR CDRPLL Start VCO */ -#define nCDRSVCO 0x0 #define CDRMODE 0x8 /* MXVR CDRPLL CDR Mode Select */ -#define nCDRMODE 0x0 #define CDRSCNT 0x3f0 /* MXVR CDRPLL Start Counter */ #define CDRLCNT 0xfc00 /* MXVR CDRPLL Lock Counter */ #define CDRSHPSEL 0x3f0000 /* MXVR CDRPLL Shaper Select */ #define CDRSHPEN 0x800000 /* MXVR CDRPLL Shaper Enable */ -#define nCDRSHPEN 0x0 #define CDRCPSEL 0xff000000 /* MXVR CDRPLL Charge Pump Current Select */ /* Bit masks for MXVR_FMPLL_CTL */ #define FMSMEN 0x1 /* MXVR FMPLL State Machine Enable */ -#define nFMSMEN 0x0 #define FMRSTB 0x2 /* MXVR FMPLL Reset */ -#define nFMRSTB 0x0 #define FMSVCO 0x4 /* MXVR FMPLL Start VCO */ -#define nFMSVCO 0x0 #define FMSCNT 0x3f0 /* MXVR FMPLL Start Counter */ #define FMLCNT 0xfc00 /* MXVR FMPLL Lock Counter */ #define FMCPSEL 0xff000000 /* MXVR FMPLL Charge Pump Current Select */ @@ -2470,15 +2044,10 @@ /* Bit masks for MXVR_PIN_CTL */ #define MTXONBOD 0x1 /* MTXONB Open Drain Select */ -#define nMTXONBOD 0x0 #define MTXONBG 0x2 /* MTXONB Gates MTX Select */ -#define nMTXONBG 0x0 #define MFSOE 0x10 /* MFS Output Enable */ -#define nMFSOE 0x0 #define MFSGPSEL 0x20 /* MFS General Purpose Output Select */ -#define nMFSGPSEL 0x0 #define MFSGPDAT 0x40 /* MFS General Purpose Output Data */ -#define nMFSGPDAT 0x0 /* Bit masks for MXVR_SCLK_CNT */ @@ -2487,7 +2056,6 @@ /* Bit masks for KPAD_CTL */ #define KPAD_EN 0x1 /* Keypad Enable */ -#define nKPAD_EN 0x0 #define KPAD_IRQMODE 0x6 /* Key Press Interrupt Enable */ #define KPAD_ROWEN 0x1c00 /* Row Enable Width */ #define KPAD_COLEN 0xe000 /* Column Enable Width */ @@ -2509,29 +2077,21 @@ /* Bit masks for KPAD_STAT */ #define KPAD_IRQ 0x1 /* Keypad Interrupt Status */ -#define nKPAD_IRQ 0x0 #define KPAD_MROWCOL 0x6 /* Multiple Row/Column Keypress Status */ #define KPAD_PRESSED 0x8 /* Key press current status */ -#define nKPAD_PRESSED 0x0 /* Bit masks for KPAD_SOFTEVAL */ #define KPAD_SOFTEVAL_E 0x2 /* Software Programmable Force Evaluate */ -#define nKPAD_SOFTEVAL_E 0x0 /* Bit masks for SDH_COMMAND */ #define CMD_IDX 0x3f /* Command Index */ #define CMD_RSP 0x40 /* Response */ -#define nCMD_RSP 0x0 #define CMD_L_RSP 0x80 /* Long Response */ -#define nCMD_L_RSP 0x0 #define CMD_INT_E 0x100 /* Command Interrupt */ -#define nCMD_INT_E 0x0 #define CMD_PEND_E 0x200 /* Command Pending */ -#define nCMD_PEND_E 0x0 #define CMD_E 0x400 /* Command Enable */ -#define nCMD_E 0x0 /* Bit masks for SDH_PWR_CTL */ @@ -2540,21 +2100,15 @@ #define TBD 0x3c /* TBD */ #endif #define SD_CMD_OD 0x40 /* Open Drain Output */ -#define nSD_CMD_OD 0x0 #define ROD_CTL 0x80 /* Rod Control */ -#define nROD_CTL 0x0 /* Bit masks for SDH_CLK_CTL */ #define CLKDIV 0xff /* MC_CLK Divisor */ #define CLK_E 0x100 /* MC_CLK Bus Clock Enable */ -#define nCLK_E 0x0 #define PWR_SV_E 0x200 /* Power Save Enable */ -#define nPWR_SV_E 0x0 #define CLKDIV_BYPASS 0x400 /* Bypass Divisor */ -#define nCLKDIV_BYPASS 0x0 #define WIDE_BUS 0x800 /* Wide Bus Mode Enable */ -#define nWIDE_BUS 0x0 /* Bit masks for SDH_RESP_CMD */ @@ -2563,133 +2117,74 @@ /* Bit masks for SDH_DATA_CTL */ #define DTX_E 0x1 /* Data Transfer Enable */ -#define nDTX_E 0x0 #define DTX_DIR 0x2 /* Data Transfer Direction */ -#define nDTX_DIR 0x0 #define DTX_MODE 0x4 /* Data Transfer Mode */ -#define nDTX_MODE 0x0 #define DTX_DMA_E 0x8 /* Data Transfer DMA Enable */ -#define nDTX_DMA_E 0x0 #define DTX_BLK_LGTH 0xf0 /* Data Transfer Block Length */ /* Bit masks for SDH_STATUS */ #define CMD_CRC_FAIL 0x1 /* CMD CRC Fail */ -#define nCMD_CRC_FAIL 0x0 #define DAT_CRC_FAIL 0x2 /* Data CRC Fail */ -#define nDAT_CRC_FAIL 0x0 -#define CMD_TIMEOUT 0x4 /* CMD Time Out */ -#define nCMD_TIMEOUT 0x0 -#define DAT_TIMEOUT 0x8 /* Data Time Out */ -#define nDAT_TIMEOUT 0x0 +#define CMD_TIME_OUT 0x4 /* CMD Time Out */ +#define DAT_TIME_OUT 0x8 /* Data Time Out */ #define TX_UNDERRUN 0x10 /* Transmit Underrun */ -#define nTX_UNDERRUN 0x0 #define RX_OVERRUN 0x20 /* Receive Overrun */ -#define nRX_OVERRUN 0x0 #define CMD_RESP_END 0x40 /* CMD Response End */ -#define nCMD_RESP_END 0x0 #define CMD_SENT 0x80 /* CMD Sent */ -#define nCMD_SENT 0x0 #define DAT_END 0x100 /* Data End */ -#define nDAT_END 0x0 #define START_BIT_ERR 0x200 /* Start Bit Error */ -#define nSTART_BIT_ERR 0x0 #define DAT_BLK_END 0x400 /* Data Block End */ -#define nDAT_BLK_END 0x0 #define CMD_ACT 0x800 /* CMD Active */ -#define nCMD_ACT 0x0 #define TX_ACT 0x1000 /* Transmit Active */ -#define nTX_ACT 0x0 #define RX_ACT 0x2000 /* Receive Active */ -#define nRX_ACT 0x0 #define TX_FIFO_STAT 0x4000 /* Transmit FIFO Status */ -#define nTX_FIFO_STAT 0x0 #define RX_FIFO_STAT 0x8000 /* Receive FIFO Status */ -#define nRX_FIFO_STAT 0x0 #define TX_FIFO_FULL 0x10000 /* Transmit FIFO Full */ -#define nTX_FIFO_FULL 0x0 #define RX_FIFO_FULL 0x20000 /* Receive FIFO Full */ -#define nRX_FIFO_FULL 0x0 #define TX_FIFO_ZERO 0x40000 /* Transmit FIFO Empty */ -#define nTX_FIFO_ZERO 0x0 #define RX_DAT_ZERO 0x80000 /* Receive FIFO Empty */ -#define nRX_DAT_ZERO 0x0 #define TX_DAT_RDY 0x100000 /* Transmit Data Available */ -#define nTX_DAT_RDY 0x0 #define RX_FIFO_RDY 0x200000 /* Receive Data Available */ -#define nRX_FIFO_RDY 0x0 /* Bit masks for SDH_STATUS_CLR */ #define CMD_CRC_FAIL_STAT 0x1 /* CMD CRC Fail Status */ -#define nCMD_CRC_FAIL_STAT 0x0 #define DAT_CRC_FAIL_STAT 0x2 /* Data CRC Fail Status */ -#define nDAT_CRC_FAIL_STAT 0x0 #define CMD_TIMEOUT_STAT 0x4 /* CMD Time Out Status */ -#define nCMD_TIMEOUT_STAT 0x0 #define DAT_TIMEOUT_STAT 0x8 /* Data Time Out status */ -#define nDAT_TIMEOUT_STAT 0x0 #define TX_UNDERRUN_STAT 0x10 /* Transmit Underrun Status */ -#define nTX_UNDERRUN_STAT 0x0 #define RX_OVERRUN_STAT 0x20 /* Receive Overrun Status */ -#define nRX_OVERRUN_STAT 0x0 #define CMD_RESP_END_STAT 0x40 /* CMD Response End Status */ -#define nCMD_RESP_END_STAT 0x0 #define CMD_SENT_STAT 0x80 /* CMD Sent Status */ -#define nCMD_SENT_STAT 0x0 #define DAT_END_STAT 0x100 /* Data End Status */ -#define nDAT_END_STAT 0x0 #define START_BIT_ERR_STAT 0x200 /* Start Bit Error Status */ -#define nSTART_BIT_ERR_STAT 0x0 #define DAT_BLK_END_STAT 0x400 /* Data Block End Status */ -#define nDAT_BLK_END_STAT 0x0 /* Bit masks for SDH_MASK0 */ #define CMD_CRC_FAIL_MASK 0x1 /* CMD CRC Fail Mask */ -#define nCMD_CRC_FAIL_MASK 0x0 #define DAT_CRC_FAIL_MASK 0x2 /* Data CRC Fail Mask */ -#define nDAT_CRC_FAIL_MASK 0x0 #define CMD_TIMEOUT_MASK 0x4 /* CMD Time Out Mask */ -#define nCMD_TIMEOUT_MASK 0x0 #define DAT_TIMEOUT_MASK 0x8 /* Data Time Out Mask */ -#define nDAT_TIMEOUT_MASK 0x0 #define TX_UNDERRUN_MASK 0x10 /* Transmit Underrun Mask */ -#define nTX_UNDERRUN_MASK 0x0 #define RX_OVERRUN_MASK 0x20 /* Receive Overrun Mask */ -#define nRX_OVERRUN_MASK 0x0 #define CMD_RESP_END_MASK 0x40 /* CMD Response End Mask */ -#define nCMD_RESP_END_MASK 0x0 #define CMD_SENT_MASK 0x80 /* CMD Sent Mask */ -#define nCMD_SENT_MASK 0x0 #define DAT_END_MASK 0x100 /* Data End Mask */ -#define nDAT_END_MASK 0x0 #define START_BIT_ERR_MASK 0x200 /* Start Bit Error Mask */ -#define nSTART_BIT_ERR_MASK 0x0 #define DAT_BLK_END_MASK 0x400 /* Data Block End Mask */ -#define nDAT_BLK_END_MASK 0x0 #define CMD_ACT_MASK 0x800 /* CMD Active Mask */ -#define nCMD_ACT_MASK 0x0 #define TX_ACT_MASK 0x1000 /* Transmit Active Mask */ -#define nTX_ACT_MASK 0x0 #define RX_ACT_MASK 0x2000 /* Receive Active Mask */ -#define nRX_ACT_MASK 0x0 #define TX_FIFO_STAT_MASK 0x4000 /* Transmit FIFO Status Mask */ -#define nTX_FIFO_STAT_MASK 0x0 #define RX_FIFO_STAT_MASK 0x8000 /* Receive FIFO Status Mask */ -#define nRX_FIFO_STAT_MASK 0x0 #define TX_FIFO_FULL_MASK 0x10000 /* Transmit FIFO Full Mask */ -#define nTX_FIFO_FULL_MASK 0x0 #define RX_FIFO_FULL_MASK 0x20000 /* Receive FIFO Full Mask */ -#define nRX_FIFO_FULL_MASK 0x0 #define TX_FIFO_ZERO_MASK 0x40000 /* Transmit FIFO Empty Mask */ -#define nTX_FIFO_ZERO_MASK 0x0 #define RX_DAT_ZERO_MASK 0x80000 /* Receive FIFO Empty Mask */ -#define nRX_DAT_ZERO_MASK 0x0 #define TX_DAT_RDY_MASK 0x100000 /* Transmit Data Available Mask */ -#define nTX_DAT_RDY_MASK 0x0 #define RX_FIFO_RDY_MASK 0x200000 /* Receive Data Available Mask */ -#define nRX_FIFO_RDY_MASK 0x0 /* Bit masks for SDH_FIFO_CNT */ @@ -2698,73 +2193,47 @@ /* Bit masks for SDH_E_STATUS */ #define SDIO_INT_DET 0x2 /* SDIO Int Detected */ -#define nSDIO_INT_DET 0x0 #define SD_CARD_DET 0x10 /* SD Card Detect */ -#define nSD_CARD_DET 0x0 /* Bit masks for SDH_E_MASK */ #define SDIO_MSK 0x2 /* Mask SDIO Int Detected */ -#define nSDIO_MSK 0x0 #define SCD_MSK 0x40 /* Mask Card Detect */ -#define nSCD_MSK 0x0 /* Bit masks for SDH_CFG */ #define CLKS_EN 0x1 /* Clocks Enable */ -#define nCLKS_EN 0x0 #define SD4E 0x4 /* SDIO 4-Bit Enable */ -#define nSD4E 0x0 #define MWE 0x8 /* Moving Window Enable */ -#define nMWE 0x0 #define SD_RST 0x10 /* SDMMC Reset */ -#define nSD_RST 0x0 #define PUP_SDDAT 0x20 /* Pull-up SD_DAT */ -#define nPUP_SDDAT 0x0 #define PUP_SDDAT3 0x40 /* Pull-up SD_DAT3 */ -#define nPUP_SDDAT3 0x0 #define PD_SDDAT3 0x80 /* Pull-down SD_DAT3 */ -#define nPD_SDDAT3 0x0 /* Bit masks for SDH_RD_WAIT_EN */ #define RWR 0x1 /* Read Wait Request */ -#define nRWR 0x0 /* Bit masks for ATAPI_CONTROL */ #define PIO_START 0x1 /* Start PIO/Reg Op */ -#define nPIO_START 0x0 #define MULTI_START 0x2 /* Start Multi-DMA Op */ -#define nMULTI_START 0x0 #define ULTRA_START 0x4 /* Start Ultra-DMA Op */ -#define nULTRA_START 0x0 #define XFER_DIR 0x8 /* Transfer Direction */ -#define nXFER_DIR 0x0 #define IORDY_EN 0x10 /* IORDY Enable */ -#define nIORDY_EN 0x0 #define FIFO_FLUSH 0x20 /* Flush FIFOs */ -#define nFIFO_FLUSH 0x0 #define SOFT_RST 0x40 /* Soft Reset */ -#define nSOFT_RST 0x0 #define DEV_RST 0x80 /* Device Reset */ -#define nDEV_RST 0x0 #define TFRCNT_RST 0x100 /* Trans Count Reset */ -#define nTFRCNT_RST 0x0 #define END_ON_TERM 0x200 /* End/Terminate Select */ -#define nEND_ON_TERM 0x0 #define PIO_USE_DMA 0x400 /* PIO-DMA Enable */ -#define nPIO_USE_DMA 0x0 #define UDMAIN_FIFO_THRS 0xf000 /* Ultra DMA-IN FIFO Threshold */ /* Bit masks for ATAPI_STATUS */ #define PIO_XFER_ON 0x1 /* PIO transfer in progress */ -#define nPIO_XFER_ON 0x0 #define MULTI_XFER_ON 0x2 /* Multi-word DMA transfer in progress */ -#define nMULTI_XFER_ON 0x0 #define ULTRA_XFER_ON 0x4 /* Ultra DMA transfer in progress */ -#define nULTRA_XFER_ON 0x0 #define ULTRA_IN_FL 0xf0 /* Ultra DMA Input FIFO Level */ /* Bit masks for ATAPI_DEV_ADDR */ @@ -2774,66 +2243,39 @@ /* Bit masks for ATAPI_INT_MASK */ #define ATAPI_DEV_INT_MASK 0x1 /* Device interrupt mask */ -#define nATAPI_DEV_INT_MASK 0x0 #define PIO_DONE_MASK 0x2 /* PIO transfer done interrupt mask */ -#define nPIO_DONE_MASK 0x0 #define MULTI_DONE_MASK 0x4 /* Multi-DMA transfer done interrupt mask */ -#define nMULTI_DONE_MASK 0x0 #define UDMAIN_DONE_MASK 0x8 /* Ultra-DMA in transfer done interrupt mask */ -#define nUDMAIN_DONE_MASK 0x0 #define UDMAOUT_DONE_MASK 0x10 /* Ultra-DMA out transfer done interrupt mask */ -#define nUDMAOUT_DONE_MASK 0x0 #define HOST_TERM_XFER_MASK 0x20 /* Host terminate current transfer interrupt mask */ -#define nHOST_TERM_XFER_MASK 0x0 #define MULTI_TERM_MASK 0x40 /* Device terminate Multi-DMA transfer interrupt mask */ -#define nMULTI_TERM_MASK 0x0 #define UDMAIN_TERM_MASK 0x80 /* Device terminate Ultra-DMA-in transfer interrupt mask */ -#define nUDMAIN_TERM_MASK 0x0 #define UDMAOUT_TERM_MASK 0x100 /* Device terminate Ultra-DMA-out transfer interrupt mask */ -#define nUDMAOUT_TERM_MASK 0x0 /* Bit masks for ATAPI_INT_STATUS */ #define ATAPI_DEV_INT 0x1 /* Device interrupt status */ -#define nATAPI_DEV_INT 0x0 #define PIO_DONE_INT 0x2 /* PIO transfer done interrupt status */ -#define nPIO_DONE_INT 0x0 #define MULTI_DONE_INT 0x4 /* Multi-DMA transfer done interrupt status */ -#define nMULTI_DONE_INT 0x0 #define UDMAIN_DONE_INT 0x8 /* Ultra-DMA in transfer done interrupt status */ -#define nUDMAIN_DONE_INT 0x0 #define UDMAOUT_DONE_INT 0x10 /* Ultra-DMA out transfer done interrupt status */ -#define nUDMAOUT_DONE_INT 0x0 #define HOST_TERM_XFER_INT 0x20 /* Host terminate current transfer interrupt status */ -#define nHOST_TERM_XFER_INT 0x0 #define MULTI_TERM_INT 0x40 /* Device terminate Multi-DMA transfer interrupt status */ -#define nMULTI_TERM_INT 0x0 #define UDMAIN_TERM_INT 0x80 /* Device terminate Ultra-DMA-in transfer interrupt status */ -#define nUDMAIN_TERM_INT 0x0 #define UDMAOUT_TERM_INT 0x100 /* Device terminate Ultra-DMA-out transfer interrupt status */ -#define nUDMAOUT_TERM_INT 0x0 /* Bit masks for ATAPI_LINE_STATUS */ #define ATAPI_INTR 0x1 /* Device interrupt to host line status */ -#define nATAPI_INTR 0x0 #define ATAPI_DASP 0x2 /* Device dasp to host line status */ -#define nATAPI_DASP 0x0 #define ATAPI_CS0N 0x4 /* ATAPI chip select 0 line status */ -#define nATAPI_CS0N 0x0 #define ATAPI_CS1N 0x8 /* ATAPI chip select 1 line status */ -#define nATAPI_CS1N 0x0 #define ATAPI_ADDR 0x70 /* ATAPI address line status */ #define ATAPI_DMAREQ 0x80 /* ATAPI DMA request line status */ -#define nATAPI_DMAREQ 0x0 #define ATAPI_DMAACKN 0x100 /* ATAPI DMA acknowledge line status */ -#define nATAPI_DMAACKN 0x0 #define ATAPI_DIOWN 0x200 /* ATAPI write line status */ -#define nATAPI_DIOWN 0x0 #define ATAPI_DIORN 0x400 /* ATAPI read line status */ -#define nATAPI_DIORN 0x0 #define ATAPI_IORDY 0x800 /* ATAPI IORDY line status */ -#define nATAPI_IORDY 0x0 /* Bit masks for ATAPI_SM_STATE */ @@ -2845,7 +2287,6 @@ /* Bit masks for ATAPI_TERMINATE */ #define ATAPI_HOST_TERM 0x1 /* Host terminationation */ -#define nATAPI_HOST_TERM 0x0 /* Bit masks for ATAPI_REG_TIM_0 */ @@ -2900,41 +2341,26 @@ /* Bit masks for TIMER_ENABLE1 */ #define TIMEN8 0x1 /* Timer 8 Enable */ -#define nTIMEN8 0x0 #define TIMEN9 0x2 /* Timer 9 Enable */ -#define nTIMEN9 0x0 #define TIMEN10 0x4 /* Timer 10 Enable */ -#define nTIMEN10 0x0 /* Bit masks for TIMER_DISABLE1 */ #define TIMDIS8 0x1 /* Timer 8 Disable */ -#define nTIMDIS8 0x0 #define TIMDIS9 0x2 /* Timer 9 Disable */ -#define nTIMDIS9 0x0 #define TIMDIS10 0x4 /* Timer 10 Disable */ -#define nTIMDIS10 0x0 /* Bit masks for TIMER_STATUS1 */ #define TIMIL8 0x1 /* Timer 8 Interrupt */ -#define nTIMIL8 0x0 #define TIMIL9 0x2 /* Timer 9 Interrupt */ -#define nTIMIL9 0x0 #define TIMIL10 0x4 /* Timer 10 Interrupt */ -#define nTIMIL10 0x0 #define TOVF_ERR8 0x10 /* Timer 8 Counter Overflow */ -#define nTOVF_ERR8 0x0 #define TOVF_ERR9 0x20 /* Timer 9 Counter Overflow */ -#define nTOVF_ERR9 0x0 #define TOVF_ERR10 0x40 /* Timer 10 Counter Overflow */ -#define nTOVF_ERR10 0x0 #define TRUN8 0x1000 /* Timer 8 Slave Enable Status */ -#define nTRUN8 0x0 #define TRUN9 0x2000 /* Timer 9 Slave Enable Status */ -#define nTRUN9 0x0 #define TRUN10 0x4000 /* Timer 10 Slave Enable Status */ -#define nTRUN10 0x0 /* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */ @@ -2945,131 +2371,77 @@ /* Bit masks for USB_POWER */ #define ENABLE_SUSPENDM 0x1 /* enable SuspendM output */ -#define nENABLE_SUSPENDM 0x0 #define SUSPEND_MODE 0x2 /* Suspend Mode indicator */ -#define nSUSPEND_MODE 0x0 #define RESUME_MODE 0x4 /* DMA Mode */ -#define nRESUME_MODE 0x0 #define RESET 0x8 /* Reset indicator */ -#define nRESET 0x0 #define HS_MODE 0x10 /* High Speed mode indicator */ -#define nHS_MODE 0x0 #define HS_ENABLE 0x20 /* high Speed Enable */ -#define nHS_ENABLE 0x0 #define SOFT_CONN 0x40 /* Soft connect */ -#define nSOFT_CONN 0x0 #define ISO_UPDATE 0x80 /* Isochronous update */ -#define nISO_UPDATE 0x0 /* Bit masks for USB_INTRTX */ #define EP0_TX 0x1 /* Tx Endpoint 0 interrupt */ -#define nEP0_TX 0x0 #define EP1_TX 0x2 /* Tx Endpoint 1 interrupt */ -#define nEP1_TX 0x0 #define EP2_TX 0x4 /* Tx Endpoint 2 interrupt */ -#define nEP2_TX 0x0 #define EP3_TX 0x8 /* Tx Endpoint 3 interrupt */ -#define nEP3_TX 0x0 #define EP4_TX 0x10 /* Tx Endpoint 4 interrupt */ -#define nEP4_TX 0x0 #define EP5_TX 0x20 /* Tx Endpoint 5 interrupt */ -#define nEP5_TX 0x0 #define EP6_TX 0x40 /* Tx Endpoint 6 interrupt */ -#define nEP6_TX 0x0 #define EP7_TX 0x80 /* Tx Endpoint 7 interrupt */ -#define nEP7_TX 0x0 /* Bit masks for USB_INTRRX */ #define EP1_RX 0x2 /* Rx Endpoint 1 interrupt */ -#define nEP1_RX 0x0 #define EP2_RX 0x4 /* Rx Endpoint 2 interrupt */ -#define nEP2_RX 0x0 #define EP3_RX 0x8 /* Rx Endpoint 3 interrupt */ -#define nEP3_RX 0x0 #define EP4_RX 0x10 /* Rx Endpoint 4 interrupt */ -#define nEP4_RX 0x0 #define EP5_RX 0x20 /* Rx Endpoint 5 interrupt */ -#define nEP5_RX 0x0 #define EP6_RX 0x40 /* Rx Endpoint 6 interrupt */ -#define nEP6_RX 0x0 #define EP7_RX 0x80 /* Rx Endpoint 7 interrupt */ -#define nEP7_RX 0x0 /* Bit masks for USB_INTRTXE */ #define EP0_TX_E 0x1 /* Endpoint 0 interrupt Enable */ -#define nEP0_TX_E 0x0 #define EP1_TX_E 0x2 /* Tx Endpoint 1 interrupt Enable */ -#define nEP1_TX_E 0x0 #define EP2_TX_E 0x4 /* Tx Endpoint 2 interrupt Enable */ -#define nEP2_TX_E 0x0 #define EP3_TX_E 0x8 /* Tx Endpoint 3 interrupt Enable */ -#define nEP3_TX_E 0x0 #define EP4_TX_E 0x10 /* Tx Endpoint 4 interrupt Enable */ -#define nEP4_TX_E 0x0 #define EP5_TX_E 0x20 /* Tx Endpoint 5 interrupt Enable */ -#define nEP5_TX_E 0x0 #define EP6_TX_E 0x40 /* Tx Endpoint 6 interrupt Enable */ -#define nEP6_TX_E 0x0 #define EP7_TX_E 0x80 /* Tx Endpoint 7 interrupt Enable */ -#define nEP7_TX_E 0x0 /* Bit masks for USB_INTRRXE */ #define EP1_RX_E 0x2 /* Rx Endpoint 1 interrupt Enable */ -#define nEP1_RX_E 0x0 #define EP2_RX_E 0x4 /* Rx Endpoint 2 interrupt Enable */ -#define nEP2_RX_E 0x0 #define EP3_RX_E 0x8 /* Rx Endpoint 3 interrupt Enable */ -#define nEP3_RX_E 0x0 #define EP4_RX_E 0x10 /* Rx Endpoint 4 interrupt Enable */ -#define nEP4_RX_E 0x0 #define EP5_RX_E 0x20 /* Rx Endpoint 5 interrupt Enable */ -#define nEP5_RX_E 0x0 #define EP6_RX_E 0x40 /* Rx Endpoint 6 interrupt Enable */ -#define nEP6_RX_E 0x0 #define EP7_RX_E 0x80 /* Rx Endpoint 7 interrupt Enable */ -#define nEP7_RX_E 0x0 /* Bit masks for USB_INTRUSB */ #define SUSPEND_B 0x1 /* Suspend indicator */ -#define nSUSPEND_B 0x0 #define RESUME_B 0x2 /* Resume indicator */ -#define nRESUME_B 0x0 #define RESET_OR_BABLE_B 0x4 /* Reset/babble indicator */ -#define nRESET_OR_BABLE_B 0x0 #define SOF_B 0x8 /* Start of frame */ -#define nSOF_B 0x0 #define CONN_B 0x10 /* Connection indicator */ -#define nCONN_B 0x0 #define DISCON_B 0x20 /* Disconnect indicator */ -#define nDISCON_B 0x0 #define SESSION_REQ_B 0x40 /* Session Request */ -#define nSESSION_REQ_B 0x0 #define VBUS_ERROR_B 0x80 /* Vbus threshold indicator */ -#define nVBUS_ERROR_B 0x0 /* Bit masks for USB_INTRUSBE */ #define SUSPEND_BE 0x1 /* Suspend indicator int enable */ -#define nSUSPEND_BE 0x0 #define RESUME_BE 0x2 /* Resume indicator int enable */ -#define nRESUME_BE 0x0 #define RESET_OR_BABLE_BE 0x4 /* Reset/babble indicator int enable */ -#define nRESET_OR_BABLE_BE 0x0 #define SOF_BE 0x8 /* Start of frame int enable */ -#define nSOF_BE 0x0 #define CONN_BE 0x10 /* Connection indicator int enable */ -#define nCONN_BE 0x0 #define DISCON_BE 0x20 /* Disconnect indicator int enable */ -#define nDISCON_BE 0x0 #define SESSION_REQ_BE 0x40 /* Session Request int enable */ -#define nSESSION_REQ_BE 0x0 #define VBUS_ERROR_BE 0x80 /* Vbus threshold indicator int enable */ -#define nVBUS_ERROR_BE 0x0 /* Bit masks for USB_FRAME */ @@ -3082,117 +2454,67 @@ /* Bit masks for USB_GLOBAL_CTL */ #define GLOBAL_ENA 0x1 /* enables USB module */ -#define nGLOBAL_ENA 0x0 #define EP1_TX_ENA 0x2 /* Transmit endpoint 1 enable */ -#define nEP1_TX_ENA 0x0 #define EP2_TX_ENA 0x4 /* Transmit endpoint 2 enable */ -#define nEP2_TX_ENA 0x0 #define EP3_TX_ENA 0x8 /* Transmit endpoint 3 enable */ -#define nEP3_TX_ENA 0x0 #define EP4_TX_ENA 0x10 /* Transmit endpoint 4 enable */ -#define nEP4_TX_ENA 0x0 #define EP5_TX_ENA 0x20 /* Transmit endpoint 5 enable */ -#define nEP5_TX_ENA 0x0 #define EP6_TX_ENA 0x40 /* Transmit endpoint 6 enable */ -#define nEP6_TX_ENA 0x0 #define EP7_TX_ENA 0x80 /* Transmit endpoint 7 enable */ -#define nEP7_TX_ENA 0x0 #define EP1_RX_ENA 0x100 /* Receive endpoint 1 enable */ -#define nEP1_RX_ENA 0x0 #define EP2_RX_ENA 0x200 /* Receive endpoint 2 enable */ -#define nEP2_RX_ENA 0x0 #define EP3_RX_ENA 0x400 /* Receive endpoint 3 enable */ -#define nEP3_RX_ENA 0x0 #define EP4_RX_ENA 0x800 /* Receive endpoint 4 enable */ -#define nEP4_RX_ENA 0x0 #define EP5_RX_ENA 0x1000 /* Receive endpoint 5 enable */ -#define nEP5_RX_ENA 0x0 #define EP6_RX_ENA 0x2000 /* Receive endpoint 6 enable */ -#define nEP6_RX_ENA 0x0 #define EP7_RX_ENA 0x4000 /* Receive endpoint 7 enable */ -#define nEP7_RX_ENA 0x0 /* Bit masks for USB_OTG_DEV_CTL */ #define SESSION 0x1 /* session indicator */ -#define nSESSION 0x0 #define HOST_REQ 0x2 /* Host negotiation request */ -#define nHOST_REQ 0x0 #define HOST_MODE 0x4 /* indicates USBDRC is a host */ -#define nHOST_MODE 0x0 #define VBUS0 0x8 /* Vbus level indicator[0] */ -#define nVBUS0 0x0 #define VBUS1 0x10 /* Vbus level indicator[1] */ -#define nVBUS1 0x0 #define LSDEV 0x20 /* Low-speed indicator */ -#define nLSDEV 0x0 #define FSDEV 0x40 /* Full or High-speed indicator */ -#define nFSDEV 0x0 #define B_DEVICE 0x80 /* A' or 'B' device indicator */ -#define nB_DEVICE 0x0 /* Bit masks for USB_OTG_VBUS_IRQ */ #define DRIVE_VBUS_ON 0x1 /* indicator to drive VBUS control circuit */ -#define nDRIVE_VBUS_ON 0x0 #define DRIVE_VBUS_OFF 0x2 /* indicator to shut off charge pump */ -#define nDRIVE_VBUS_OFF 0x0 #define CHRG_VBUS_START 0x4 /* indicator for external circuit to start charging VBUS */ -#define nCHRG_VBUS_START 0x0 #define CHRG_VBUS_END 0x8 /* indicator for external circuit to end charging VBUS */ -#define nCHRG_VBUS_END 0x0 #define DISCHRG_VBUS_START 0x10 /* indicator to start discharging VBUS */ -#define nDISCHRG_VBUS_START 0x0 #define DISCHRG_VBUS_END 0x20 /* indicator to stop discharging VBUS */ -#define nDISCHRG_VBUS_END 0x0 /* Bit masks for USB_OTG_VBUS_MASK */ #define DRIVE_VBUS_ON_ENA 0x1 /* enable DRIVE_VBUS_ON interrupt */ -#define nDRIVE_VBUS_ON_ENA 0x0 #define DRIVE_VBUS_OFF_ENA 0x2 /* enable DRIVE_VBUS_OFF interrupt */ -#define nDRIVE_VBUS_OFF_ENA 0x0 #define CHRG_VBUS_START_ENA 0x4 /* enable CHRG_VBUS_START interrupt */ -#define nCHRG_VBUS_START_ENA 0x0 #define CHRG_VBUS_END_ENA 0x8 /* enable CHRG_VBUS_END interrupt */ -#define nCHRG_VBUS_END_ENA 0x0 #define DISCHRG_VBUS_START_ENA 0x10 /* enable DISCHRG_VBUS_START interrupt */ -#define nDISCHRG_VBUS_START_ENA 0x0 #define DISCHRG_VBUS_END_ENA 0x20 /* enable DISCHRG_VBUS_END interrupt */ -#define nDISCHRG_VBUS_END_ENA 0x0 /* Bit masks for USB_CSR0 */ #define RXPKTRDY 0x1 /* data packet receive indicator */ -#define nRXPKTRDY 0x0 #define TXPKTRDY 0x2 /* data packet in FIFO indicator */ -#define nTXPKTRDY 0x0 #define STALL_SENT 0x4 /* STALL handshake sent */ -#define nSTALL_SENT 0x0 #define DATAEND 0x8 /* Data end indicator */ -#define nDATAEND 0x0 #define SETUPEND 0x10 /* Setup end */ -#define nSETUPEND 0x0 #define SENDSTALL 0x20 /* Send STALL handshake */ -#define nSENDSTALL 0x0 #define SERVICED_RXPKTRDY 0x40 /* used to clear the RxPktRdy bit */ -#define nSERVICED_RXPKTRDY 0x0 #define SERVICED_SETUPEND 0x80 /* used to clear the SetupEnd bit */ -#define nSERVICED_SETUPEND 0x0 #define FLUSHFIFO 0x100 /* flush endpoint FIFO */ -#define nFLUSHFIFO 0x0 #define STALL_RECEIVED_H 0x4 /* STALL handshake received host mode */ -#define nSTALL_RECEIVED_H 0x0 #define SETUPPKT_H 0x8 /* send Setup token host mode */ -#define nSETUPPKT_H 0x0 #define ERROR_H 0x10 /* timeout error indicator host mode */ -#define nERROR_H 0x0 #define REQPKT_H 0x20 /* Request an IN transaction host mode */ -#define nREQPKT_H 0x0 #define STATUSPKT_H 0x40 /* Status stage transaction host mode */ -#define nSTATUSPKT_H 0x0 #define NAK_TIMEOUT_H 0x80 /* EP0 halted after a NAK host mode */ -#define nNAK_TIMEOUT_H 0x0 /* Bit masks for USB_COUNT0 */ @@ -3213,37 +2535,21 @@ /* Bit masks for USB_TXCSR */ #define TXPKTRDY_T 0x1 /* data packet in FIFO indicator */ -#define nTXPKTRDY_T 0x0 #define FIFO_NOT_EMPTY_T 0x2 /* FIFO not empty */ -#define nFIFO_NOT_EMPTY_T 0x0 #define UNDERRUN_T 0x4 /* TxPktRdy not set for an IN token */ -#define nUNDERRUN_T 0x0 #define FLUSHFIFO_T 0x8 /* flush endpoint FIFO */ -#define nFLUSHFIFO_T 0x0 #define STALL_SEND_T 0x10 /* issue a Stall handshake */ -#define nSTALL_SEND_T 0x0 #define STALL_SENT_T 0x20 /* Stall handshake transmitted */ -#define nSTALL_SENT_T 0x0 #define CLEAR_DATATOGGLE_T 0x40 /* clear endpoint data toggle */ -#define nCLEAR_DATATOGGLE_T 0x0 #define INCOMPTX_T 0x80 /* indicates that a large packet is split */ -#define nINCOMPTX_T 0x0 #define DMAREQMODE_T 0x400 /* DMA mode (0 or 1) selection */ -#define nDMAREQMODE_T 0x0 #define FORCE_DATATOGGLE_T 0x800 /* Force data toggle */ -#define nFORCE_DATATOGGLE_T 0x0 #define DMAREQ_ENA_T 0x1000 /* Enable DMA request for Tx EP */ -#define nDMAREQ_ENA_T 0x0 #define ISO_T 0x4000 /* enable Isochronous transfers */ -#define nISO_T 0x0 #define AUTOSET_T 0x8000 /* allows TxPktRdy to be set automatically */ -#define nAUTOSET_T 0x0 #define ERROR_TH 0x4 /* error condition host mode */ -#define nERROR_TH 0x0 #define STALL_RECEIVED_TH 0x20 /* Stall handshake received host mode */ -#define nSTALL_RECEIVED_TH 0x0 #define NAK_TIMEOUT_TH 0x80 /* NAK timeout host mode */ -#define nNAK_TIMEOUT_TH 0x0 /* Bit masks for USB_TXCOUNT */ @@ -3252,45 +2558,25 @@ /* Bit masks for USB_RXCSR */ #define RXPKTRDY_R 0x1 /* data packet in FIFO indicator */ -#define nRXPKTRDY_R 0x0 #define FIFO_FULL_R 0x2 /* FIFO not empty */ -#define nFIFO_FULL_R 0x0 #define OVERRUN_R 0x4 /* TxPktRdy not set for an IN token */ -#define nOVERRUN_R 0x0 #define DATAERROR_R 0x8 /* Out packet cannot be loaded into Rx FIFO */ -#define nDATAERROR_R 0x0 #define FLUSHFIFO_R 0x10 /* flush endpoint FIFO */ -#define nFLUSHFIFO_R 0x0 #define STALL_SEND_R 0x20 /* issue a Stall handshake */ -#define nSTALL_SEND_R 0x0 #define STALL_SENT_R 0x40 /* Stall handshake transmitted */ -#define nSTALL_SENT_R 0x0 #define CLEAR_DATATOGGLE_R 0x80 /* clear endpoint data toggle */ -#define nCLEAR_DATATOGGLE_R 0x0 #define INCOMPRX_R 0x100 /* indicates that a large packet is split */ -#define nINCOMPRX_R 0x0 #define DMAREQMODE_R 0x800 /* DMA mode (0 or 1) selection */ -#define nDMAREQMODE_R 0x0 #define DISNYET_R 0x1000 /* disable Nyet handshakes */ -#define nDISNYET_R 0x0 #define DMAREQ_ENA_R 0x2000 /* Enable DMA request for Tx EP */ -#define nDMAREQ_ENA_R 0x0 #define ISO_R 0x4000 /* enable Isochronous transfers */ -#define nISO_R 0x0 #define AUTOCLEAR_R 0x8000 /* allows TxPktRdy to be set automatically */ -#define nAUTOCLEAR_R 0x0 #define ERROR_RH 0x4 /* TxPktRdy not set for an IN token host mode */ -#define nERROR_RH 0x0 #define REQPKT_RH 0x20 /* request an IN transaction host mode */ -#define nREQPKT_RH 0x0 #define STALL_RECEIVED_RH 0x40 /* Stall handshake received host mode */ -#define nSTALL_RECEIVED_RH 0x0 #define INCOMPRX_RH 0x100 /* indicates that a large packet is split host mode */ -#define nINCOMPRX_RH 0x0 #define DMAREQMODE_RH 0x800 /* DMA mode (0 or 1) selection host mode */ -#define nDMAREQMODE_RH 0x0 #define AUTOREQ_RH 0x4000 /* sets ReqPkt automatically host mode */ -#define nAUTOREQ_RH 0x0 /* Bit masks for USB_RXCOUNT */ @@ -3317,35 +2603,22 @@ /* Bit masks for USB_DMA_INTERRUPT */ #define DMA0_INT 0x1 /* DMA0 pending interrupt */ -#define nDMA0_INT 0x0 #define DMA1_INT 0x2 /* DMA1 pending interrupt */ -#define nDMA1_INT 0x0 #define DMA2_INT 0x4 /* DMA2 pending interrupt */ -#define nDMA2_INT 0x0 #define DMA3_INT 0x8 /* DMA3 pending interrupt */ -#define nDMA3_INT 0x0 #define DMA4_INT 0x10 /* DMA4 pending interrupt */ -#define nDMA4_INT 0x0 #define DMA5_INT 0x20 /* DMA5 pending interrupt */ -#define nDMA5_INT 0x0 #define DMA6_INT 0x40 /* DMA6 pending interrupt */ -#define nDMA6_INT 0x0 #define DMA7_INT 0x80 /* DMA7 pending interrupt */ -#define nDMA7_INT 0x0 /* Bit masks for USB_DMAxCONTROL */ #define DMA_ENA 0x1 /* DMA enable */ -#define nDMA_ENA 0x0 #define DIRECTION 0x2 /* direction of DMA transfer */ -#define nDIRECTION 0x0 #define MODE 0x4 /* DMA Bus error */ -#define nMODE 0x0 #define INT_ENA 0x8 /* Interrupt enable */ -#define nINT_ENA 0x0 #define EPNUM 0xf0 /* EP number */ #define BUSERROR 0x100 /* DMA Bus error */ -#define nBUSERROR 0x0 /* Bit masks for USB_DMAxADDRHIGH */ @@ -3366,26 +2639,16 @@ /* Bit masks for HMDMAx_CONTROL */ #define HMDMAEN 0x1 /* Handshake MDMA Enable */ -#define nHMDMAEN 0x0 #define REP 0x2 /* Handshake MDMA Request Polarity */ -#define nREP 0x0 #define UTE 0x8 /* Urgency Threshold Enable */ -#define nUTE 0x0 #define OIE 0x10 /* Overflow Interrupt Enable */ -#define nOIE 0x0 #define BDIE 0x20 /* Block Done Interrupt Enable */ -#define nBDIE 0x0 #define MBDI 0x40 /* Mask Block Done Interrupt */ -#define nMBDI 0x0 #define DRQ 0x300 /* Handshake MDMA Request Type */ #define RBC 0x1000 /* Force Reload of BCOUNT */ -#define nRBC 0x0 #define PS 0x2000 /* Pin Status */ -#define nPS 0x0 #define OI 0x4000 /* Overflow Interrupt Generated */ -#define nOI 0x0 #define BDI 0x8000 /* Block Done Interrupt Generated */ -#define nBDI 0x0 /* ******************************************* */ /* MULTI BIT MACRO ENUMERATIONS */ diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h index a1b200fe6a..2381ac50a2 100644 --- a/include/asm-blackfin/mach-bf548/defBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h @@ -46,7 +46,7 @@ /* Debug/MP/Emulation Registers (0xFFC00014 - 0xFFC00014) */ -#define CHIPID 0xffc00014 +#define CHIPID 0xffc00014 /* System Reset and Interrupt Controller (0xFFC00100 - 0xFFC00104) */ @@ -1512,231 +1512,144 @@ /* and MULTI BIT READ MACROS */ /* ********************************************************** */ +/* SIC_IMASK Masks */ +#define SIC_UNMASK_ALL 0x00000000 /* Unmask all peripheral interrupts */ +#define SIC_MASK_ALL 0xFFFFFFFF /* Mask all peripheral interrupts */ +#define SIC_MASK(x) (1 << (x)) /* Mask Peripheral #x interrupt */ +#define SIC_UNMASK(x) (0xFFFFFFFF ^ (1 << (x))) /* Unmask Peripheral #x interrupt */ + +/* SIC_IWR Masks */ +#define IWR_DISABLE_ALL 0x00000000 /* Wakeup Disable all peripherals */ +#define IWR_ENABLE_ALL 0xFFFFFFFF /* Wakeup Enable all peripherals */ +#define IWR_ENABLE(x) (1 << (x)) /* Wakeup Enable Peripheral #x */ +#define IWR_DISABLE(x) (0xFFFFFFFF ^ (1 << (x))) /* Wakeup Disable Peripheral #x */ + /* Bit masks for SIC_IAR0 */ -#define IRQ_PLL_WAKEUP 0x1 /* PLL Wakeup */ -#define nIRQ_PLL_WAKEUP 0x0 +#define PLL_WAKEUP 0x1 /* PLL Wakeup */ /* Bit masks for SIC_IWR0, SIC_IMASK0, SIC_ISR0 */ -#define IRQ_DMA0_ERR 0x2 /* DMA Controller 0 Error */ -#define nIRQ_DMA0_ERR 0x0 -#define IRQ_EPPI0_ERR 0x4 /* EPPI0 Error */ -#define nIRQ_EPPI0_ERR 0x0 -#define IRQ_SPORT0_ERR 0x8 /* SPORT0 Error */ -#define nIRQ_SPORT0_ERR 0x0 -#define IRQ_SPORT1_ERR 0x10 /* SPORT1 Error */ -#define nIRQ_SPORT1_ERR 0x0 -#define IRQ_SPI0_ERR 0x20 /* SPI0 Error */ -#define nIRQ_SPI0_ERR 0x0 -#define IRQ_UART0_ERR 0x40 /* UART0 Error */ -#define nIRQ_UART0_ERR 0x0 -#define IRQ_RTC 0x80 /* Real-Time Clock */ -#define nIRQ_RTC 0x0 -#define IRQ_DMA12 0x100 /* DMA Channel 12 */ -#define nIRQ_DMA12 0x0 -#define IRQ_DMA0 0x200 /* DMA Channel 0 */ -#define nIRQ_DMA0 0x0 -#define IRQ_DMA1 0x400 /* DMA Channel 1 */ -#define nIRQ_DMA1 0x0 -#define IRQ_DMA2 0x800 /* DMA Channel 2 */ -#define nIRQ_DMA2 0x0 -#define IRQ_DMA3 0x1000 /* DMA Channel 3 */ -#define nIRQ_DMA3 0x0 -#define IRQ_DMA4 0x2000 /* DMA Channel 4 */ -#define nIRQ_DMA4 0x0 -#define IRQ_DMA6 0x4000 /* DMA Channel 6 */ -#define nIRQ_DMA6 0x0 -#define IRQ_DMA7 0x8000 /* DMA Channel 7 */ -#define nIRQ_DMA7 0x0 -#define IRQ_PINT0 0x80000 /* Pin Interrupt 0 */ -#define nIRQ_PINT0 0x0 -#define IRQ_PINT1 0x100000 /* Pin Interrupt 1 */ -#define nIRQ_PINT1 0x0 -#define IRQ_MDMA0 0x200000 /* Memory DMA Stream 0 */ -#define nIRQ_MDMA0 0x0 -#define IRQ_MDMA1 0x400000 /* Memory DMA Stream 1 */ -#define nIRQ_MDMA1 0x0 -#define IRQ_WDOG 0x800000 /* Watchdog Timer */ -#define nIRQ_WDOG 0x0 -#define IRQ_DMA1_ERR 0x1000000 /* DMA Controller 1 Error */ -#define nIRQ_DMA1_ERR 0x0 -#define IRQ_SPORT2_ERR 0x2000000 /* SPORT2 Error */ -#define nIRQ_SPORT2_ERR 0x0 -#define IRQ_SPORT3_ERR 0x4000000 /* SPORT3 Error */ -#define nIRQ_SPORT3_ERR 0x0 -#define IRQ_MXVR_SD 0x8000000 /* MXVR Synchronous Data */ -#define nIRQ_MXVR_SD 0x0 -#define IRQ_SPI1_ERR 0x10000000 /* SPI1 Error */ -#define nIRQ_SPI1_ERR 0x0 -#define IRQ_SPI2_ERR 0x20000000 /* SPI2 Error */ -#define nIRQ_SPI2_ERR 0x0 -#define IRQ_UART1_ERR 0x40000000 /* UART1 Error */ -#define nIRQ_UART1_ERR 0x0 -#define IRQ_UART2_ERR 0x80000000 /* UART2 Error */ -#define nIRQ_UART2_ERR 0x0 +#define DMA0_ERR 0x2 /* DMA Controller 0 Error */ +#define EPPI0_ERR 0x4 /* EPPI0 Error */ +#define SPORT0_ERR 0x8 /* SPORT0 Error */ +#define SPORT1_ERR 0x10 /* SPORT1 Error */ +#define SPI0_ERR 0x20 /* SPI0 Error */ +#define UART0_ERR 0x40 /* UART0 Error */ +#define RTC 0x80 /* Real-Time Clock */ +#define DMA12 0x100 /* DMA Channel 12 */ +#define DMA0 0x200 /* DMA Channel 0 */ +#define DMA1 0x400 /* DMA Channel 1 */ +#define DMA2 0x800 /* DMA Channel 2 */ +#define DMA3 0x1000 /* DMA Channel 3 */ +#define DMA4 0x2000 /* DMA Channel 4 */ +#define DMA6 0x4000 /* DMA Channel 6 */ +#define DMA7 0x8000 /* DMA Channel 7 */ +#define PINT0 0x80000 /* Pin Interrupt 0 */ +#define PINT1 0x100000 /* Pin Interrupt 1 */ +#define MDMA0 0x200000 /* Memory DMA Stream 0 */ +#define MDMA1 0x400000 /* Memory DMA Stream 1 */ +#define WDOG 0x800000 /* Watchdog Timer */ +#define DMA1_ERR 0x1000000 /* DMA Controller 1 Error */ +#define SPORT2_ERR 0x2000000 /* SPORT2 Error */ +#define SPORT3_ERR 0x4000000 /* SPORT3 Error */ +#define MXVR_SD 0x8000000 /* MXVR Synchronous Data */ +#define SPI1_ERR 0x10000000 /* SPI1 Error */ +#define SPI2_ERR 0x20000000 /* SPI2 Error */ +#define UART1_ERR 0x40000000 /* UART1 Error */ +#define UART2_ERR 0x80000000 /* UART2 Error */ /* Bit masks for SIC_IWR1, SIC_IMASK1, SIC_ISR1 */ -#define IRQ_CAN0_ERR 0x1 /* CAN0 Error */ -#define nIRQ_CAN0_ERR 0x0 -#define IRQ_DMA18 0x2 /* DMA Channel 18 */ -#define nIRQ_DMA18 0x0 -#define IRQ_DMA19 0x4 /* DMA Channel 19 */ -#define nIRQ_DMA19 0x0 -#define IRQ_DMA20 0x8 /* DMA Channel 20 */ -#define nIRQ_DMA20 0x0 -#define IRQ_DMA21 0x10 /* DMA Channel 21 */ -#define nIRQ_DMA21 0x0 -#define IRQ_DMA13 0x20 /* DMA Channel 13 */ -#define nIRQ_DMA13 0x0 -#define IRQ_DMA14 0x40 /* DMA Channel 14 */ -#define nIRQ_DMA14 0x0 -#define IRQ_DMA5 0x80 /* DMA Channel 5 */ -#define nIRQ_DMA5 0x0 -#define IRQ_DMA23 0x100 /* DMA Channel 23 */ -#define nIRQ_DMA23 0x0 -#define IRQ_DMA8 0x200 /* DMA Channel 8 */ -#define nIRQ_DMA8 0x0 -#define IRQ_DMA9 0x400 /* DMA Channel 9 */ -#define nIRQ_DMA9 0x0 -#define IRQ_DMA10 0x800 /* DMA Channel 10 */ -#define nIRQ_DMA10 0x0 -#define IRQ_DMA11 0x1000 /* DMA Channel 11 */ -#define nIRQ_DMA11 0x0 -#define IRQ_TWI0 0x2000 /* TWI0 */ -#define nIRQ_TWI0 0x0 -#define IRQ_TWI1 0x4000 /* TWI1 */ -#define nIRQ_TWI1 0x0 -#define IRQ_CAN0_RX 0x8000 /* CAN0 Receive */ -#define nIRQ_CAN0_RX 0x0 -#define IRQ_CAN0_TX 0x10000 /* CAN0 Transmit */ -#define nIRQ_CAN0_TX 0x0 -#define IRQ_MDMA2 0x20000 /* Memory DMA Stream 0 */ -#define nIRQ_MDMA2 0x0 -#define IRQ_MDMA3 0x40000 /* Memory DMA Stream 1 */ -#define nIRQ_MDMA3 0x0 -#define IRQ_MXVR_STAT 0x80000 /* MXVR Status */ -#define nIRQ_MXVR_STAT 0x0 -#define IRQ_MXVR_CM 0x100000 /* MXVR Control Message */ -#define nIRQ_MXVR_CM 0x0 -#define IRQ_MXVR_AP 0x200000 /* MXVR Asynchronous Packet */ -#define nIRQ_MXVR_AP 0x0 -#define IRQ_EPPI1_ERR 0x400000 /* EPPI1 Error */ -#define nIRQ_EPPI1_ERR 0x0 -#define IRQ_EPPI2_ERR 0x800000 /* EPPI2 Error */ -#define nIRQ_EPPI2_ERR 0x0 -#define IRQ_UART3_ERR 0x1000000 /* UART3 Error */ -#define nIRQ_UART3_ERR 0x0 -#define IRQ_HOST_ERR 0x2000000 /* Host DMA Port Error */ -#define nIRQ_HOST_ERR 0x0 -#define IRQ_USB_ERR 0x4000000 /* USB Error */ -#define nIRQ_USB_ERR 0x0 -#define IRQ_PIXC_ERR 0x8000000 /* Pixel Compositor Error */ -#define nIRQ_PIXC_ERR 0x0 -#define IRQ_NFC_ERR 0x10000000 /* Nand Flash Controller Error */ -#define nIRQ_NFC_ERR 0x0 -#define IRQ_ATAPI_ERR 0x20000000 /* ATAPI Error */ -#define nIRQ_ATAPI_ERR 0x0 -#define IRQ_CAN1_ERR 0x40000000 /* CAN1 Error */ -#define nIRQ_CAN1_ERR 0x0 -#define IRQ_DMAR0_ERR 0x80000000 /* DMAR0 Overflow Error */ -#define nIRQ_DMAR0_ERR 0x0 -#define IRQ_DMAR1_ERR 0x80000000 /* DMAR1 Overflow Error */ -#define nIRQ_DMAR1_ERR 0x0 -#define IRQ_DMAR0 0x80000000 /* DMAR0 Block */ -#define nIRQ_DMAR0 0x0 -#define IRQ_DMAR1 0x80000000 /* DMAR1 Block */ -#define nIRQ_DMAR1 0x0 +#define CAN0_ERR 0x1 /* CAN0 Error */ +#define DMA18 0x2 /* DMA Channel 18 */ +#define DMA19 0x4 /* DMA Channel 19 */ +#define DMA20 0x8 /* DMA Channel 20 */ +#define DMA21 0x10 /* DMA Channel 21 */ +#define DMA13 0x20 /* DMA Channel 13 */ +#define DMA14 0x40 /* DMA Channel 14 */ +#define DMA5 0x80 /* DMA Channel 5 */ +#define DMA23 0x100 /* DMA Channel 23 */ +#define DMA8 0x200 /* DMA Channel 8 */ +#define DMA9 0x400 /* DMA Channel 9 */ +#define DMA10 0x800 /* DMA Channel 10 */ +#define DMA11 0x1000 /* DMA Channel 11 */ +#define TWI0 0x2000 /* TWI0 */ +#define TWI1 0x4000 /* TWI1 */ +#define CAN0_RX 0x8000 /* CAN0 Receive */ +#define CAN0_TX 0x10000 /* CAN0 Transmit */ +#define MDMA2 0x20000 /* Memory DMA Stream 0 */ +#define MDMA3 0x40000 /* Memory DMA Stream 1 */ +#define MXVR_STAT 0x80000 /* MXVR Status */ +#define MXVR_CM 0x100000 /* MXVR Control Message */ +#define MXVR_AP 0x200000 /* MXVR Asynchronous Packet */ +#define EPPI1_ERR 0x400000 /* EPPI1 Error */ +#define EPPI2_ERR 0x800000 /* EPPI2 Error */ +#define UART3_ERR 0x1000000 /* UART3 Error */ +#define HOST_ERR 0x2000000 /* Host DMA Port Error */ +#define USB_ERR 0x4000000 /* USB Error */ +#define PIXC_ERR 0x8000000 /* Pixel Compositor Error */ +#define NFC_ERR 0x10000000 /* Nand Flash Controller Error */ +#define ATAPI_ERR 0x20000000 /* ATAPI Error */ +#define CAN1_ERR 0x40000000 /* CAN1 Error */ +#define DMAR0_ERR 0x80000000 /* DMAR0 Overflow Error */ +#define DMAR1_ERR 0x80000000 /* DMAR1 Overflow Error */ +#define DMAR0 0x80000000 /* DMAR0 Block */ +#define DMAR1 0x80000000 /* DMAR1 Block */ /* Bit masks for SIC_IWR2, SIC_IMASK2, SIC_ISR2 */ -#define IRQ_DMA15 0x1 /* DMA Channel 15 */ -#define nIRQ_DMA15 0x0 -#define IRQ_DMA16 0x2 /* DMA Channel 16 */ -#define nIRQ_DMA16 0x0 -#define IRQ_DMA17 0x4 /* DMA Channel 17 */ -#define nIRQ_DMA17 0x0 -#define IRQ_DMA22 0x8 /* DMA Channel 22 */ -#define nIRQ_DMA22 0x0 -#define IRQ_CNT 0x10 /* Counter */ -#define nIRQ_CNT 0x0 -#define IRQ_KEY 0x20 /* Keypad */ -#define nIRQ_KEY 0x0 -#define IRQ_CAN1_RX 0x40 /* CAN1 Receive */ -#define nIRQ_CAN1_RX 0x0 -#define IRQ_CAN1_TX 0x80 /* CAN1 Transmit */ -#define nIRQ_CAN1_TX 0x0 -#define IRQ_SDH_MASK0 0x100 /* SDH Mask 0 */ -#define nIRQ_SDH_MASK0 0x0 -#define IRQ_SDH_MASK1 0x200 /* SDH Mask 1 */ -#define nIRQ_SDH_MASK1 0x0 -#define IRQ_USB_EINT 0x400 /* USB Exception */ -#define nIRQ_USB_EINT 0x0 -#define IRQ_USB_INT0 0x800 /* USB Interrupt 0 */ -#define nIRQ_USB_INT0 0x0 -#define IRQ_USB_INT1 0x1000 /* USB Interrupt 1 */ -#define nIRQ_USB_INT1 0x0 -#define IRQ_USB_INT2 0x2000 /* USB Interrupt 2 */ -#define nIRQ_USB_INT2 0x0 -#define IRQ_USB_DMAINT 0x4000 /* USB DMA */ -#define nIRQ_USB_DMAINT 0x0 -#define IRQ_OTPSEC 0x8000 /* OTP Access Complete */ -#define nIRQ_OTPSEC 0x0 -#define IRQ_TIMER0 0x400000 /* Timer 0 */ -#define nIRQ_TIMER0 0x0 -#define IRQ_TIMER1 0x800000 /* Timer 1 */ -#define nIRQ_TIMER1 0x0 -#define IRQ_TIMER2 0x1000000 /* Timer 2 */ -#define nIRQ_TIMER2 0x0 -#define IRQ_TIMER3 0x2000000 /* Timer 3 */ -#define nIRQ_TIMER3 0x0 -#define IRQ_TIMER4 0x4000000 /* Timer 4 */ -#define nIRQ_TIMER4 0x0 -#define IRQ_TIMER5 0x8000000 /* Timer 5 */ -#define nIRQ_TIMER5 0x0 -#define IRQ_TIMER6 0x10000000 /* Timer 6 */ -#define nIRQ_TIMER6 0x0 -#define IRQ_TIMER7 0x20000000 /* Timer 7 */ -#define nIRQ_TIMER7 0x0 -#define IRQ_PINT2 0x40000000 /* Pin Interrupt 2 */ -#define nIRQ_PINT2 0x0 -#define IRQ_PINT3 0x80000000 /* Pin Interrupt 3 */ -#define nIRQ_PINT3 0x0 +#define DMA15 0x1 /* DMA Channel 15 */ +#define DMA16 0x2 /* DMA Channel 16 */ +#define DMA17 0x4 /* DMA Channel 17 */ +#define DMA22 0x8 /* DMA Channel 22 */ +#define CNT 0x10 /* Counter */ +#define KEY 0x20 /* Keypad */ +#define CAN1_RX 0x40 /* CAN1 Receive */ +#define CAN1_TX 0x80 /* CAN1 Transmit */ +#define SDH_INT_MASK0 0x100 /* SDH Mask 0 */ +#define SDH_INT_MASK1 0x200 /* SDH Mask 1 */ +#define USB_EINT 0x400 /* USB Exception */ +#define USB_INT0 0x800 /* USB Interrupt 0 */ +#define USB_INT1 0x1000 /* USB Interrupt 1 */ +#define USB_INT2 0x2000 /* USB Interrupt 2 */ +#define USB_DMAINT 0x4000 /* USB DMA */ +#define OTPSEC 0x8000 /* OTP Access Complete */ +#define TIMER0 0x400000 /* Timer 0 */ +#define TIMER1 0x800000 /* Timer 1 */ +#define TIMER2 0x1000000 /* Timer 2 */ +#define TIMER3 0x2000000 /* Timer 3 */ +#define TIMER4 0x4000000 /* Timer 4 */ +#define TIMER5 0x8000000 /* Timer 5 */ +#define TIMER6 0x10000000 /* Timer 6 */ +#define TIMER7 0x20000000 /* Timer 7 */ +#define PINT2 0x40000000 /* Pin Interrupt 2 */ +#define PINT3 0x80000000 /* Pin Interrupt 3 */ /* Bit masks for DMAx_CONFIG, MDMA_Sx_CONFIG, MDMA_Dx_CONFIG */ #define DMAEN 0x1 /* DMA Channel Enable */ -#define nDMAEN 0x0 #define WNR 0x2 /* DMA Direction */ -#define nWNR 0x0 -#define WDSIZE 0xc /* Transfer Word Size */ +#define WDSIZE_8 0x0 /* Transfer Word Size = 8 */ +#define WDSIZE_16 0x4 /* Transfer Word Size = 16 */ +#define WDSIZE_32 0x8 /* Transfer Word Size = 32 */ #define DMA2D 0x10 /* DMA Mode */ -#define nDMA2D 0x0 #define RESTART 0x20 /* Work Unit Transitions */ -#define nRESTART 0x0 #define DI_SEL 0x40 /* Data Interrupt Timing Select */ -#define nDI_SEL 0x0 #define DI_EN 0x80 /* Data Interrupt Enable */ -#define nDI_EN 0x0 #define NDSIZE 0xf00 /* Flex Descriptor Size */ #define DMAFLOW 0xf000 /* Next Operation */ /* Bit masks for DMAx_IRQ_STATUS, MDMA_Sx_IRQ_STATUS, MDMA_Dx_IRQ_STATUS */ #define DMA_DONE 0x1 /* DMA Completion Interrupt Status */ -#define nDMA_DONE 0x0 #define DMA_ERR 0x2 /* DMA Error Interrupt Status */ -#define nDMA_ERR 0x0 #define DFETCH 0x4 /* DMA Descriptor Fetch */ -#define nDFETCH 0x0 #define DMA_RUN 0x8 /* DMA Channel Running */ -#define nDMA_RUN 0x0 /* Bit masks for DMAx_PERIPHERAL_MAP, MDMA_Sx_IRQ_STATUS, MDMA_Dx_IRQ_STATUS */ #define CTYPE 0x40 /* DMA Channel Type */ -#define nCTYPE 0x0 #define PMAP 0xf000 /* Peripheral Mapped To This Channel */ /* Bit masks for DMACx_TCPER */ @@ -1756,29 +1669,28 @@ /* Bit masks for DMAC1_PERIMUX */ #define PMUXSDH 0x1 /* Peripheral Select for DMA22 channel */ -#define nPMUXSDH 0x0 -/* Bit masks for EBIU_AMGCTL */ +/* ********************* ASYNCHRONOUS MEMORY CONTROLLER MASKS *************************/ +/* EBIU_AMGCTL Masks */ +#define AMCKEN 0x0001 /* Enable CLKOUT */ +#define AMBEN_NONE 0x0000 /* All Banks Disabled */ +#define AMBEN_B0 0x0002 /* Enable Async Memory Bank 0 only */ +#define AMBEN_B0_B1 0x0004 /* Enable Async Memory Banks 0 & 1 only */ +#define AMBEN_B0_B1_B2 0x0006 /* Enable Async Memory Banks 0, 1, and 2 */ +#define AMBEN_ALL 0x0008 /* Enable Async Memory Banks (all) 0, 1, 2, and 3 */ -#define AMCKEN 0x1 /* Async Memory Enable */ -#define nAMCKEN 0x0 -#define AMBEN 0xe /* Async bank enable */ /* Bit masks for EBIU_AMBCTL0 */ #define B0RDYEN 0x1 /* Bank 0 ARDY Enable */ -#define nB0RDYEN 0x0 #define B0RDYPOL 0x2 /* Bank 0 ARDY Polarity */ -#define nB0RDYPOL 0x0 #define B0TT 0xc /* Bank 0 transition time */ #define B0ST 0x30 /* Bank 0 Setup time */ #define B0HT 0xc0 /* Bank 0 Hold time */ #define B0RAT 0xf00 /* Bank 0 Read access time */ #define B0WAT 0xf000 /* Bank 0 write access time */ #define B1RDYEN 0x10000 /* Bank 1 ARDY Enable */ -#define nB1RDYEN 0x0 #define B1RDYPOL 0x20000 /* Bank 1 ARDY Polarity */ -#define nB1RDYPOL 0x0 #define B1TT 0xc0000 /* Bank 1 transition time */ #define B1ST 0x300000 /* Bank 1 Setup time */ #define B1HT 0xc00000 /* Bank 1 Hold time */ @@ -1788,18 +1700,14 @@ /* Bit masks for EBIU_AMBCTL1 */ #define B2RDYEN 0x1 /* Bank 2 ARDY Enable */ -#define nB2RDYEN 0x0 #define B2RDYPOL 0x2 /* Bank 2 ARDY Polarity */ -#define nB2RDYPOL 0x0 #define B2TT 0xc /* Bank 2 transition time */ #define B2ST 0x30 /* Bank 2 Setup time */ #define B2HT 0xc0 /* Bank 2 Hold time */ #define B2RAT 0xf00 /* Bank 2 Read access time */ #define B2WAT 0xf000 /* Bank 2 write access time */ #define B3RDYEN 0x10000 /* Bank 3 ARDY Enable */ -#define nB3RDYEN 0x0 #define B3RDYPOL 0x20000 /* Bank 3 ARDY Polarity */ -#define nB3RDYPOL 0x0 #define B3TT 0xc0000 /* Bank 3 transition time */ #define B3ST 0x300000 /* Bank 3 Setup time */ #define B3HT 0xc00000 /* Bank 3 Hold time */ @@ -1823,19 +1731,15 @@ /* Bit masks for EBIU_FCTL */ #define TESTSETLOCK 0x1 /* Test set lock */ -#define nTESTSETLOCK 0x0 #define BCLK 0x6 /* Burst clock frequency */ #define PGWS 0x38 /* Page wait states */ #define PGSZ 0x40 /* Page size */ -#define nPGSZ 0x0 #define RDDL 0x380 /* Read data delay */ /* Bit masks for EBIU_ARBSTAT */ #define ARBSTAT 0x1 /* Arbitration status */ -#define nARBSTAT 0x0 #define BGSTAT 0x2 /* Bus grant status */ -#define nBGSTAT 0x0 /* Bit masks for EBIU_DDRCTL0 */ @@ -1861,9 +1765,7 @@ #define BURSTLENGTH 0x7 /* Burst length */ #define CASLATENCY 0x70 /* CAS latency */ #define DLLRESET 0x100 /* DLL Reset */ -#define nDLLRESET 0x0 #define REGE 0x1000 /* Register mode enable */ -#define nREGE 0x0 /* Bit masks for EBIU_DDRCTL3 */ @@ -1876,30 +1778,19 @@ #define DEB3_PFLEN 0x30 /* Pre fetch length for DEB3 accesses */ #define DEB_ARB_PRIORITY 0x700 /* Arbitration between DEB busses */ #define DEB1_URGENT 0x1000 /* DEB1 Urgent */ -#define nDEB1_URGENT 0x0 #define DEB2_URGENT 0x2000 /* DEB2 Urgent */ -#define nDEB2_URGENT 0x0 #define DEB3_URGENT 0x4000 /* DEB3 Urgent */ -#define nDEB3_URGENT 0x0 /* Bit masks for EBIU_ERRMST */ #define DEB1_ERROR 0x1 /* DEB1 Error */ -#define nDEB1_ERROR 0x0 #define DEB2_ERROR 0x2 /* DEB2 Error */ -#define nDEB2_ERROR 0x0 #define DEB3_ERROR 0x4 /* DEB3 Error */ -#define nDEB3_ERROR 0x0 #define CORE_ERROR 0x8 /* Core error */ -#define nCORE_ERROR 0x0 #define DEB_MERROR 0x10 /* DEB1 Error (2nd) */ -#define nDEB_MERROR 0x0 #define DEB2_MERROR 0x20 /* DEB2 Error (2nd) */ -#define nDEB2_MERROR 0x0 #define DEB3_MERROR 0x40 /* DEB3 Error (2nd) */ -#define nDEB3_MERROR 0x0 #define CORE_MERROR 0x80 /* Core Error (2nd) */ -#define nCORE_MERROR 0x0 /* Bit masks for EBIU_ERRADD */ @@ -1908,15 +1799,10 @@ /* Bit masks for EBIU_RSTCTL */ #define DDRSRESET 0x1 /* DDR soft reset */ -#define nDDRSRESET 0x0 #define PFTCHSRESET 0x4 /* DDR prefetch reset */ -#define nPFTCHSRESET 0x0 #define SRREQ 0x8 /* Self-refresh request */ -#define nSRREQ 0x0 #define SRACK 0x10 /* Self-refresh acknowledge */ -#define nSRACK 0x0 #define MDDRENABLE 0x20 /* Mobile DDR enable */ -#define nMDDRENABLE 0x0 /* Bit masks for EBIU_DDRBRC0 */ @@ -2013,136 +1899,74 @@ /* Bit masks for EBIU_DDRMCEN */ #define B0WCENABLE 0x1 /* Bank 0 write count enable */ -#define nB0WCENABLE 0x0 #define B1WCENABLE 0x2 /* Bank 1 write count enable */ -#define nB1WCENABLE 0x0 #define B2WCENABLE 0x4 /* Bank 2 write count enable */ -#define nB2WCENABLE 0x0 #define B3WCENABLE 0x8 /* Bank 3 write count enable */ -#define nB3WCENABLE 0x0 #define B4WCENABLE 0x10 /* Bank 4 write count enable */ -#define nB4WCENABLE 0x0 #define B5WCENABLE 0x20 /* Bank 5 write count enable */ -#define nB5WCENABLE 0x0 #define B6WCENABLE 0x40 /* Bank 6 write count enable */ -#define nB6WCENABLE 0x0 #define B7WCENABLE 0x80 /* Bank 7 write count enable */ -#define nB7WCENABLE 0x0 #define B0RCENABLE 0x100 /* Bank 0 read count enable */ -#define nB0RCENABLE 0x0 #define B1RCENABLE 0x200 /* Bank 1 read count enable */ -#define nB1RCENABLE 0x0 #define B2RCENABLE 0x400 /* Bank 2 read count enable */ -#define nB2RCENABLE 0x0 #define B3RCENABLE 0x800 /* Bank 3 read count enable */ -#define nB3RCENABLE 0x0 #define B4RCENABLE 0x1000 /* Bank 4 read count enable */ -#define nB4RCENABLE 0x0 #define B5RCENABLE 0x2000 /* Bank 5 read count enable */ -#define nB5RCENABLE 0x0 #define B6RCENABLE 0x4000 /* Bank 6 read count enable */ -#define nB6RCENABLE 0x0 #define B7RCENABLE 0x8000 /* Bank 7 read count enable */ -#define nB7RCENABLE 0x0 #define ROWACTCENABLE 0x10000 /* DDR Row activate count enable */ -#define nROWACTCENABLE 0x0 #define RWTCENABLE 0x20000 /* DDR R/W Turn around count enable */ -#define nRWTCENABLE 0x0 #define ARCENABLE 0x40000 /* DDR Auto-refresh count enable */ -#define nARCENABLE 0x0 #define GC0ENABLE 0x100000 /* DDR Grant count 0 enable */ -#define nGC0ENABLE 0x0 #define GC1ENABLE 0x200000 /* DDR Grant count 1 enable */ -#define nGC1ENABLE 0x0 #define GC2ENABLE 0x400000 /* DDR Grant count 2 enable */ -#define nGC2ENABLE 0x0 #define GC3ENABLE 0x800000 /* DDR Grant count 3 enable */ -#define nGC3ENABLE 0x0 #define GCCONTROL 0x3000000 /* DDR Grant Count Control */ /* Bit masks for EBIU_DDRMCCL */ #define CB0WCOUNT 0x1 /* Clear write count 0 */ -#define nCB0WCOUNT 0x0 #define CB1WCOUNT 0x2 /* Clear write count 1 */ -#define nCB1WCOUNT 0x0 #define CB2WCOUNT 0x4 /* Clear write count 2 */ -#define nCB2WCOUNT 0x0 #define CB3WCOUNT 0x8 /* Clear write count 3 */ -#define nCB3WCOUNT 0x0 #define CB4WCOUNT 0x10 /* Clear write count 4 */ -#define nCB4WCOUNT 0x0 #define CB5WCOUNT 0x20 /* Clear write count 5 */ -#define nCB5WCOUNT 0x0 #define CB6WCOUNT 0x40 /* Clear write count 6 */ -#define nCB6WCOUNT 0x0 #define CB7WCOUNT 0x80 /* Clear write count 7 */ -#define nCB7WCOUNT 0x0 #define CBRCOUNT 0x100 /* Clear read count 0 */ -#define nCBRCOUNT 0x0 #define CB1RCOUNT 0x200 /* Clear read count 1 */ -#define nCB1RCOUNT 0x0 #define CB2RCOUNT 0x400 /* Clear read count 2 */ -#define nCB2RCOUNT 0x0 #define CB3RCOUNT 0x800 /* Clear read count 3 */ -#define nCB3RCOUNT 0x0 #define CB4RCOUNT 0x1000 /* Clear read count 4 */ -#define nCB4RCOUNT 0x0 #define CB5RCOUNT 0x2000 /* Clear read count 5 */ -#define nCB5RCOUNT 0x0 #define CB6RCOUNT 0x4000 /* Clear read count 6 */ -#define nCB6RCOUNT 0x0 #define CB7RCOUNT 0x8000 /* Clear read count 7 */ -#define nCB7RCOUNT 0x0 #define CRACOUNT 0x10000 /* Clear row activation count */ -#define nCRACOUNT 0x0 #define CRWTACOUNT 0x20000 /* Clear R/W turn-around count */ -#define nCRWTACOUNT 0x0 #define CARCOUNT 0x40000 /* Clear auto-refresh count */ -#define nCARCOUNT 0x0 #define CG0COUNT 0x100000 /* Clear grant count 0 */ -#define nCG0COUNT 0x0 #define CG1COUNT 0x200000 /* Clear grant count 1 */ -#define nCG1COUNT 0x0 #define CG2COUNT 0x400000 /* Clear grant count 2 */ -#define nCG2COUNT 0x0 #define CG3COUNT 0x800000 /* Clear grant count 3 */ -#define nCG3COUNT 0x0 /* Bit masks for (PORTx is PORTA - PORTJ) includes PORTx_FER, PORTx_SET, PORTx_CLEAR, PORTx_DIR_SET, PORTx_DIR_CLEAR, PORTx_INEN */ #define Px0 0x1 /* GPIO 0 */ -#define nPx0 0x0 #define Px1 0x2 /* GPIO 1 */ -#define nPx1 0x0 #define Px2 0x4 /* GPIO 2 */ -#define nPx2 0x0 #define Px3 0x8 /* GPIO 3 */ -#define nPx3 0x0 #define Px4 0x10 /* GPIO 4 */ -#define nPx4 0x0 #define Px5 0x20 /* GPIO 5 */ -#define nPx5 0x0 #define Px6 0x40 /* GPIO 6 */ -#define nPx6 0x0 #define Px7 0x80 /* GPIO 7 */ -#define nPx7 0x0 #define Px8 0x100 /* GPIO 8 */ -#define nPx8 0x0 #define Px9 0x200 /* GPIO 9 */ -#define nPx9 0x0 #define Px10 0x400 /* GPIO 10 */ -#define nPx10 0x0 #define Px11 0x800 /* GPIO 11 */ -#define nPx11 0x0 #define Px12 0x1000 /* GPIO 12 */ -#define nPx12 0x0 #define Px13 0x2000 /* GPIO 13 */ -#define nPx13 0x0 #define Px14 0x4000 /* GPIO 14 */ -#define nPx14 0x0 #define Px15 0x8000 /* GPIO 15 */ -#define nPx15 0x0 /* Bit masks for PORTA_MUX - PORTJ_MUX */ @@ -2167,223 +1991,129 @@ /* Bit masks for PINTx_MASK_SET/CLEAR, PINTx_REQUEST, PINTx_LATCH, PINTx_EDGE_SET/CLEAR, PINTx_INVERT_SET/CLEAR, PINTx_PINTSTATE */ #define IB0 0x1 /* Interrupt Bit 0 */ -#define nIB0 0x0 #define IB1 0x2 /* Interrupt Bit 1 */ -#define nIB1 0x0 #define IB2 0x4 /* Interrupt Bit 2 */ -#define nIB2 0x0 #define IB3 0x8 /* Interrupt Bit 3 */ -#define nIB3 0x0 #define IB4 0x10 /* Interrupt Bit 4 */ -#define nIB4 0x0 #define IB5 0x20 /* Interrupt Bit 5 */ -#define nIB5 0x0 #define IB6 0x40 /* Interrupt Bit 6 */ -#define nIB6 0x0 #define IB7 0x80 /* Interrupt Bit 7 */ -#define nIB7 0x0 #define IB8 0x100 /* Interrupt Bit 8 */ -#define nIB8 0x0 #define IB9 0x200 /* Interrupt Bit 9 */ -#define nIB9 0x0 #define IB10 0x400 /* Interrupt Bit 10 */ -#define nIB10 0x0 #define IB11 0x800 /* Interrupt Bit 11 */ -#define nIB11 0x0 #define IB12 0x1000 /* Interrupt Bit 12 */ -#define nIB12 0x0 #define IB13 0x2000 /* Interrupt Bit 13 */ -#define nIB13 0x0 #define IB14 0x4000 /* Interrupt Bit 14 */ -#define nIB14 0x0 #define IB15 0x8000 /* Interrupt Bit 15 */ -#define nIB15 0x0 /* Bit masks for TIMERx_CONFIG */ #define TMODE 0x3 /* Timer Mode */ #define PULSE_HI 0x4 /* Pulse Polarity */ -#define nPULSE_HI 0x0 #define PERIOD_CNT 0x8 /* Period Count */ -#define nPERIOD_CNT 0x0 #define IRQ_ENA 0x10 /* Interrupt Request Enable */ -#define nIRQ_ENA 0x0 #define TIN_SEL 0x20 /* Timer Input Select */ -#define nTIN_SEL 0x0 #define OUT_DIS 0x40 /* Output Pad Disable */ -#define nOUT_DIS 0x0 #define CLK_SEL 0x80 /* Timer Clock Select */ -#define nCLK_SEL 0x0 #define TOGGLE_HI 0x100 /* Toggle Mode */ -#define nTOGGLE_HI 0x0 #define EMU_RUN 0x200 /* Emulation Behavior Select */ -#define nEMU_RUN 0x0 #define ERR_TYP 0xc000 /* Error Type */ /* Bit masks for TIMER_ENABLE0 */ #define TIMEN0 0x1 /* Timer 0 Enable */ -#define nTIMEN0 0x0 #define TIMEN1 0x2 /* Timer 1 Enable */ -#define nTIMEN1 0x0 #define TIMEN2 0x4 /* Timer 2 Enable */ -#define nTIMEN2 0x0 #define TIMEN3 0x8 /* Timer 3 Enable */ -#define nTIMEN3 0x0 #define TIMEN4 0x10 /* Timer 4 Enable */ -#define nTIMEN4 0x0 #define TIMEN5 0x20 /* Timer 5 Enable */ -#define nTIMEN5 0x0 #define TIMEN6 0x40 /* Timer 6 Enable */ -#define nTIMEN6 0x0 #define TIMEN7 0x80 /* Timer 7 Enable */ -#define nTIMEN7 0x0 /* Bit masks for TIMER_DISABLE0 */ #define TIMDIS0 0x1 /* Timer 0 Disable */ -#define nTIMDIS0 0x0 #define TIMDIS1 0x2 /* Timer 1 Disable */ -#define nTIMDIS1 0x0 #define TIMDIS2 0x4 /* Timer 2 Disable */ -#define nTIMDIS2 0x0 #define TIMDIS3 0x8 /* Timer 3 Disable */ -#define nTIMDIS3 0x0 #define TIMDIS4 0x10 /* Timer 4 Disable */ -#define nTIMDIS4 0x0 #define TIMDIS5 0x20 /* Timer 5 Disable */ -#define nTIMDIS5 0x0 #define TIMDIS6 0x40 /* Timer 6 Disable */ -#define nTIMDIS6 0x0 #define TIMDIS7 0x80 /* Timer 7 Disable */ -#define nTIMDIS7 0x0 /* Bit masks for TIMER_STATUS0 */ #define TIMIL0 0x1 /* Timer 0 Interrupt */ -#define nTIMIL0 0x0 #define TIMIL1 0x2 /* Timer 1 Interrupt */ -#define nTIMIL1 0x0 #define TIMIL2 0x4 /* Timer 2 Interrupt */ -#define nTIMIL2 0x0 #define TIMIL3 0x8 /* Timer 3 Interrupt */ -#define nTIMIL3 0x0 #define TOVF_ERR0 0x10 /* Timer 0 Counter Overflow */ -#define nTOVF_ERR0 0x0 #define TOVF_ERR1 0x20 /* Timer 1 Counter Overflow */ -#define nTOVF_ERR1 0x0 #define TOVF_ERR2 0x40 /* Timer 2 Counter Overflow */ -#define nTOVF_ERR2 0x0 #define TOVF_ERR3 0x80 /* Timer 3 Counter Overflow */ -#define nTOVF_ERR3 0x0 #define TRUN0 0x1000 /* Timer 0 Slave Enable Status */ -#define nTRUN0 0x0 #define TRUN1 0x2000 /* Timer 1 Slave Enable Status */ -#define nTRUN1 0x0 #define TRUN2 0x4000 /* Timer 2 Slave Enable Status */ -#define nTRUN2 0x0 #define TRUN3 0x8000 /* Timer 3 Slave Enable Status */ -#define nTRUN3 0x0 #define TIMIL4 0x10000 /* Timer 4 Interrupt */ -#define nTIMIL4 0x0 #define TIMIL5 0x20000 /* Timer 5 Interrupt */ -#define nTIMIL5 0x0 #define TIMIL6 0x40000 /* Timer 6 Interrupt */ -#define nTIMIL6 0x0 #define TIMIL7 0x80000 /* Timer 7 Interrupt */ -#define nTIMIL7 0x0 #define TOVF_ERR4 0x100000 /* Timer 4 Counter Overflow */ -#define nTOVF_ERR4 0x0 #define TOVF_ERR5 0x200000 /* Timer 5 Counter Overflow */ -#define nTOVF_ERR5 0x0 #define TOVF_ERR6 0x400000 /* Timer 6 Counter Overflow */ -#define nTOVF_ERR6 0x0 #define TOVF_ERR7 0x800000 /* Timer 7 Counter Overflow */ -#define nTOVF_ERR7 0x0 #define TRUN4 0x10000000 /* Timer 4 Slave Enable Status */ -#define nTRUN4 0x0 #define TRUN5 0x20000000 /* Timer 5 Slave Enable Status */ -#define nTRUN5 0x0 #define TRUN6 0x40000000 /* Timer 6 Slave Enable Status */ -#define nTRUN6 0x0 #define TRUN7 0x80000000 /* Timer 7 Slave Enable Status */ -#define nTRUN7 0x0 /* Bit masks for WDOG_CTL */ #define WDEV 0x6 /* Watchdog Event */ #define WDEN 0xff0 /* Watchdog Enable */ #define WDRO 0x8000 /* Watchdog Rolled Over */ -#define nWDRO 0x0 /* Bit masks for CNT_CONFIG */ #define CNTE 0x1 /* Counter Enable */ -#define nCNTE 0x0 #define DEBE 0x2 /* Debounce Enable */ -#define nDEBE 0x0 #define CDGINV 0x10 /* CDG Pin Polarity Invert */ -#define nCDGINV 0x0 #define CUDINV 0x20 /* CUD Pin Polarity Invert */ -#define nCUDINV 0x0 #define CZMINV 0x40 /* CZM Pin Polarity Invert */ -#define nCZMINV 0x0 #define CNTMODE 0x700 /* Counter Operating Mode */ #define ZMZC 0x800 /* CZM Zeroes Counter Enable */ -#define nZMZC 0x0 #define BNDMODE 0x3000 /* Boundary register Mode */ #define INPDIS 0x8000 /* CUG and CDG Input Disable */ -#define nINPDIS 0x0 /* Bit masks for CNT_IMASK */ #define ICIE 0x1 /* Illegal Gray/Binary Code Interrupt Enable */ -#define nICIE 0x0 #define UCIE 0x2 /* Up count Interrupt Enable */ -#define nUCIE 0x0 #define DCIE 0x4 /* Down count Interrupt Enable */ -#define nDCIE 0x0 #define MINCIE 0x8 /* Min Count Interrupt Enable */ -#define nMINCIE 0x0 #define MAXCIE 0x10 /* Max Count Interrupt Enable */ -#define nMAXCIE 0x0 #define COV31IE 0x20 /* Bit 31 Overflow Interrupt Enable */ -#define nCOV31IE 0x0 #define COV15IE 0x40 /* Bit 15 Overflow Interrupt Enable */ -#define nCOV15IE 0x0 #define CZEROIE 0x80 /* Count to Zero Interrupt Enable */ -#define nCZEROIE 0x0 #define CZMIE 0x100 /* CZM Pin Interrupt Enable */ -#define nCZMIE 0x0 #define CZMEIE 0x200 /* CZM Error Interrupt Enable */ -#define nCZMEIE 0x0 #define CZMZIE 0x400 /* CZM Zeroes Counter Interrupt Enable */ -#define nCZMZIE 0x0 /* Bit masks for CNT_STATUS */ #define ICII 0x1 /* Illegal Gray/Binary Code Interrupt Identifier */ -#define nICII 0x0 #define UCII 0x2 /* Up count Interrupt Identifier */ -#define nUCII 0x0 #define DCII 0x4 /* Down count Interrupt Identifier */ -#define nDCII 0x0 #define MINCII 0x8 /* Min Count Interrupt Identifier */ -#define nMINCII 0x0 #define MAXCII 0x10 /* Max Count Interrupt Identifier */ -#define nMAXCII 0x0 #define COV31II 0x20 /* Bit 31 Overflow Interrupt Identifier */ -#define nCOV31II 0x0 #define COV15II 0x40 /* Bit 15 Overflow Interrupt Identifier */ -#define nCOV15II 0x0 #define CZEROII 0x80 /* Count to Zero Interrupt Identifier */ -#define nCZEROII 0x0 #define CZMII 0x100 /* CZM Pin Interrupt Identifier */ -#define nCZMII 0x0 #define CZMEII 0x200 /* CZM Error Interrupt Identifier */ -#define nCZMEII 0x0 #define CZMZII 0x400 /* CZM Zeroes Counter Interrupt Identifier */ -#define nCZMZII 0x0 /* Bit masks for CNT_COMMAND */ @@ -2391,7 +2121,6 @@ #define W1LMIN 0xf0 /* Load Min Register */ #define W1LMAX 0xf00 /* Load Max Register */ #define W1ZMONCE 0x1000 /* Enable CZM Clear Counter Once */ -#define nW1ZMONCE 0x0 /* Bit masks for CNT_DEBOUNCE */ @@ -2407,42 +2136,25 @@ /* Bit masks for RTC_ICTL */ #define STOPWATCH_INTERRUPT_ENABLE 0x1 /* Stopwatch Interrupt Enable */ -#define nSTOPWATCH_INTERRUPT_ENABLE 0x0 #define ALARM_INTERRUPT_ENABLE 0x2 /* Alarm Interrupt Enable */ -#define nALARM_INTERRUPT_ENABLE 0x0 #define SECONDS_INTERRUPT_ENABLE 0x4 /* Seconds Interrupt Enable */ -#define nSECONDS_INTERRUPT_ENABLE 0x0 #define MINUTES_INTERRUPT_ENABLE 0x8 /* Minutes Interrupt Enable */ -#define nMINUTES_INTERRUPT_ENABLE 0x0 #define HOURS_INTERRUPT_ENABLE 0x10 /* Hours Interrupt Enable */ -#define nHOURS_INTERRUPT_ENABLE 0x0 #define TWENTY_FOUR_HOURS_INTERRUPT_ENABLE 0x20 /* 24 Hours Interrupt Enable */ -#define nTWENTY_FOUR_HOURS_INTERRUPT_ENABLE 0x0 #define DAY_ALARM_INTERRUPT_ENABLE 0x40 /* Day Alarm Interrupt Enable */ -#define nDAY_ALARM_INTERRUPT_ENABLE 0x0 #define WRITE_COMPLETE_INTERRUPT_ENABLE 0x8000 /* Write Complete Interrupt Enable */ -#define nWRITE_COMPLETE_INTERRUPT_ENABLE 0x0 /* Bit masks for RTC_ISTAT */ #define STOPWATCH_EVENT_FLAG 0x1 /* Stopwatch Event Flag */ -#define nSTOPWATCH_EVENT_FLAG 0x0 #define ALARM_EVENT_FLAG 0x2 /* Alarm Event Flag */ -#define nALARM_EVENT_FLAG 0x0 #define SECONDS_EVENT_FLAG 0x4 /* Seconds Event Flag */ -#define nSECONDS_EVENT_FLAG 0x0 #define MINUTES_EVENT_FLAG 0x8 /* Minutes Event Flag */ -#define nMINUTES_EVENT_FLAG 0x0 #define HOURS_EVENT_FLAG 0x10 /* Hours Event Flag */ -#define nHOURS_EVENT_FLAG 0x0 #define TWENTY_FOUR_HOURS_EVENT_FLAG 0x20 /* 24 Hours Event Flag */ -#define nTWENTY_FOUR_HOURS_EVENT_FLAG 0x0 #define DAY_ALARM_EVENT_FLAG 0x40 /* Day Alarm Event Flag */ -#define nDAY_ALARM_EVENT_FLAG 0x0 #define WRITE_PENDING__STATUS 0x4000 /* Write Pending Status */ -#define nWRITE_PENDING__STATUS 0x0 #define WRITE_COMPLETE 0x8000 /* Write Complete */ -#define nWRITE_COMPLETE 0x0 /* Bit masks for RTC_SWCNT */ @@ -2458,21 +2170,15 @@ /* Bit masks for RTC_PREN */ #define PREN 0x1 /* Prescaler Enable */ -#define nPREN 0x0 /* Bit masks for OTP_CONTROL */ #define FUSE_FADDR 0x1ff /* OTP/Fuse Address */ #define FIEN 0x800 /* OTP/Fuse Interrupt Enable */ -#define nFIEN 0x0 #define FTESTDEC 0x1000 /* OTP/Fuse Test Decoder */ -#define nFTESTDEC 0x0 #define FWRTEST 0x2000 /* OTP/Fuse Write Test */ -#define nFWRTEST 0x0 #define FRDEN 0x4000 /* OTP/Fuse Read Enable */ -#define nFRDEN 0x0 #define FWREN 0x8000 /* OTP/Fuse Write Enable */ -#define nFWREN 0x0 /* Bit masks for OTP_BEN */ @@ -2481,15 +2187,10 @@ /* Bit masks for OTP_STATUS */ #define FCOMP 0x1 /* OTP/Fuse Access Complete */ -#define nFCOMP 0x0 #define FERROR 0x2 /* OTP/Fuse Access Error */ -#define nFERROR 0x0 #define MMRGLOAD 0x10 /* Memory Mapped Register Gasket Load */ -#define nMMRGLOAD 0x0 #define MMRGLOCK 0x20 /* Memory Mapped Register Gasket Lock */ -#define nMMRGLOCK 0x0 #define FPGMEN 0x40 /* OTP/Fuse Program Enable */ -#define nFPGMEN 0x0 /* Bit masks for OTP_TIMING */ @@ -2503,42 +2204,29 @@ /* Bit masks for SECURE_SYSSWT */ #define EMUDABL 0x1 /* Emulation Disable. */ -#define nEMUDABL 0x0 #define RSTDABL 0x2 /* Reset Disable */ -#define nRSTDABL 0x0 #define L1IDABL 0x1c /* L1 Instruction Memory Disable. */ #define L1DADABL 0xe0 /* L1 Data Bank A Memory Disable. */ #define L1DBDABL 0x700 /* L1 Data Bank B Memory Disable. */ #define DMA0OVR 0x800 /* DMA0 Memory Access Override */ -#define nDMA0OVR 0x0 #define DMA1OVR 0x1000 /* DMA1 Memory Access Override */ -#define nDMA1OVR 0x0 #define EMUOVR 0x4000 /* Emulation Override */ -#define nEMUOVR 0x0 #define OTPSEN 0x8000 /* OTP Secrets Enable. */ -#define nOTPSEN 0x0 #define L2DABL 0x70000 /* L2 Memory Disable. */ /* Bit masks for SECURE_CONTROL */ #define SECURE0 0x1 /* SECURE 0 */ -#define nSECURE0 0x0 #define SECURE1 0x2 /* SECURE 1 */ -#define nSECURE1 0x0 #define SECURE2 0x4 /* SECURE 2 */ -#define nSECURE2 0x0 #define SECURE3 0x8 /* SECURE 3 */ -#define nSECURE3 0x0 /* Bit masks for SECURE_STATUS */ #define SECMODE 0x3 /* Secured Mode Control State */ #define NMI 0x4 /* Non Maskable Interrupt */ -#define nNMI 0x0 #define AFVALID 0x8 /* Authentication Firmware Valid */ -#define nAFVALID 0x0 #define AFEXIT 0x10 /* Authentication Firmware Exit */ -#define nAFEXIT 0x0 #define SECSTAT 0xe0 /* Secure Status */ /* Bit masks for PLL_DIV */ @@ -2550,42 +2238,25 @@ #define MSEL 0x7e00 /* Multiplier Select */ #define BYPASS 0x100 /* PLL Bypass Enable */ -#define nBYPASS 0x0 #define OUTPUT_DELAY 0x80 /* External Memory Output Delay Enable */ -#define nOUTPUT_DELAY 0x0 #define INPUT_DELAY 0x40 /* External Memory Input Delay Enable */ -#define nINPUT_DELAY 0x0 #define PDWN 0x20 /* Power Down */ -#define nPDWN 0x0 #define STOPCK 0x8 /* Stop Clock */ -#define nSTOPCK 0x0 #define PLL_OFF 0x2 /* Disable PLL */ -#define nPLL_OFF 0x0 #define DF 0x1 /* Divide Frequency */ -#define nDF 0x0 /* Bit masks for PLL_STAT */ #define PLL_LOCKED 0x20 /* PLL Locked Status */ -#define nPLL_LOCKED 0x0 #define ACTIVE_PLLDISABLED 0x4 /* Active Mode With PLL Disabled */ -#define nACTIVE_PLLDISABLED 0x0 #define FULL_ON 0x2 /* Full-On Mode */ -#define nFULL_ON 0x0 #define ACTIVE_PLLENABLED 0x1 /* Active Mode With PLL Enabled */ -#define nACTIVE_PLLENABLED 0x0 #define RTCWS 0x400 /* RTC/Reset Wake-Up Status */ -#define nRTCWS 0x0 #define CANWS 0x800 /* CAN Wake-Up Status */ -#define nCANWS 0x0 #define USBWS 0x2000 /* USB Wake-Up Status */ -#define nUSBWS 0x0 #define KPADWS 0x4000 /* Keypad Wake-Up Status */ -#define nKPADWS 0x0 #define ROTWS 0x8000 /* Rotary Wake-Up Status */ -#define nROTWS 0x0 #define GPWS 0x1000 /* General-Purpose Wake-Up Status */ -#define nGPWS 0x0 /* Bit masks for VR_CTL */ @@ -2593,79 +2264,52 @@ #define GAIN 0xc /* Voltage Output Level Gain */ #define VLEV 0xf0 /* Internal Voltage Level */ #define SCKELOW 0x8000 /* Drive SCKE Low During Reset Enable */ -#define nSCKELOW 0x0 #define WAKE 0x100 /* RTC/Reset Wake-Up Enable */ -#define nWAKE 0x0 #define CANWE 0x200 /* CAN0/1 Wake-Up Enable */ -#define nCANWE 0x0 #define GPWE 0x400 /* General-Purpose Wake-Up Enable */ -#define nGPWE 0x0 #define USBWE 0x800 /* USB Wake-Up Enable */ -#define nUSBWE 0x0 #define KPADWE 0x1000 /* Keypad Wake-Up Enable */ -#define nKPADWE 0x0 #define ROTWE 0x2000 /* Rotary Wake-Up Enable */ -#define nROTWE 0x0 /* Bit masks for NFC_CTL */ #define WR_DLY 0xf /* Write Strobe Delay */ #define RD_DLY 0xf0 /* Read Strobe Delay */ #define NWIDTH 0x100 /* NAND Data Width */ -#define nNWIDTH 0x0 #define PG_SIZE 0x200 /* Page Size */ -#define nPG_SIZE 0x0 /* Bit masks for NFC_STAT */ #define NBUSY 0x1 /* Not Busy */ -#define nNBUSY 0x0 #define WB_FULL 0x2 /* Write Buffer Full */ -#define nWB_FULL 0x0 #define PG_WR_STAT 0x4 /* Page Write Pending */ -#define nPG_WR_STAT 0x0 #define PG_RD_STAT 0x8 /* Page Read Pending */ -#define nPG_RD_STAT 0x0 #define WB_EMPTY 0x10 /* Write Buffer Empty */ -#define nWB_EMPTY 0x0 /* Bit masks for NFC_IRQSTAT */ #define NBUSYIRQ 0x1 /* Not Busy IRQ */ -#define nNBUSYIRQ 0x0 #define WB_OVF 0x2 /* Write Buffer Overflow */ -#define nWB_OVF 0x0 #define WB_EDGE 0x4 /* Write Buffer Edge Detect */ -#define nWB_EDGE 0x0 #define RD_RDY 0x8 /* Read Data Ready */ -#define nRD_RDY 0x0 #define WR_DONE 0x10 /* Page Write Done */ -#define nWR_DONE 0x0 /* Bit masks for NFC_IRQMASK */ #define MASK_BUSYIRQ 0x1 /* Mask Not Busy IRQ */ -#define nMASK_BUSYIRQ 0x0 #define MASK_WBOVF 0x2 /* Mask Write Buffer Overflow */ -#define nMASK_WBOVF 0x0 #define MASK_WBEMPTY 0x4 /* Mask Write Buffer Empty */ -#define nMASK_WBEMPTY 0x0 #define MASK_RDRDY 0x8 /* Mask Read Data Ready */ -#define nMASK_RDRDY 0x0 #define MASK_WRDONE 0x10 /* Mask Write Done */ -#define nMASK_WRDONE 0x0 /* Bit masks for NFC_RST */ #define ECC_RST 0x1 /* ECC (and NFC counters) Reset */ -#define nECC_RST 0x0 /* Bit masks for NFC_PGCTL */ #define PG_RD_START 0x1 /* Page Read Start */ -#define nPG_RD_START 0x0 #define PG_WR_START 0x2 /* Page Write Start */ -#define nPG_WR_START 0x0 /* Bit masks for NFC_ECC0 */ @@ -2690,56 +2334,34 @@ /* Bit masks for CAN0_CONTROL */ #define SRS 0x1 /* Software Reset */ -#define nSRS 0x0 #define DNM 0x2 /* DeviceNet Mode */ -#define nDNM 0x0 #define ABO 0x4 /* Auto Bus On */ -#define nABO 0x0 #define WBA 0x10 /* Wakeup On CAN Bus Activity */ -#define nWBA 0x0 #define SMR 0x20 /* Sleep Mode Request */ -#define nSMR 0x0 #define CSR 0x40 /* CAN Suspend Mode Request */ -#define nCSR 0x0 #define CCR 0x80 /* CAN Configuration Mode Request */ -#define nCCR 0x0 /* Bit masks for CAN0_STATUS */ #define WT 0x1 /* CAN Transmit Warning Flag */ -#define nWT 0x0 #define WR 0x2 /* CAN Receive Warning Flag */ -#define nWR 0x0 #define EP 0x4 /* CAN Error Passive Mode */ -#define nEP 0x0 #define EBO 0x8 /* CAN Error Bus Off Mode */ -#define nEBO 0x0 #define CSA 0x40 /* CAN Suspend Mode Acknowledge */ -#define nCSA 0x0 #define CCA 0x80 /* CAN Configuration Mode Acknowledge */ -#define nCCA 0x0 #define MBPTR 0x1f00 /* Mailbox Pointer */ #define TRM 0x4000 /* Transmit Mode Status */ -#define nTRM 0x0 #define REC 0x8000 /* Receive Mode Status */ -#define nREC 0x0 /* Bit masks for CAN0_DEBUG */ #define DEC 0x1 /* Disable Transmit/Receive Error Counters */ -#define nDEC 0x0 #define DRI 0x2 /* Disable CANRX Input Pin */ -#define nDRI 0x0 #define DTO 0x4 /* Disable CANTX Output Pin */ -#define nDTO 0x0 #define DIL 0x8 /* Disable Internal Loop */ -#define nDIL 0x0 #define MAA 0x10 /* Mode Auto-Acknowledge */ -#define nMAA 0x0 #define MRB 0x20 /* Mode Read Back */ -#define nMRB 0x0 #define CDE 0x8000 /* CAN Debug Mode Enable */ -#define nCDE 0x0 /* Bit masks for CAN0_CLOCK */ @@ -2749,111 +2371,69 @@ #define SJW 0x300 /* Synchronization Jump Width */ #define SAM 0x80 /* Sampling */ -#define nSAM 0x0 #define TSEG2 0x70 /* Time Segment 2 */ #define TSEG1 0xf /* Time Segment 1 */ /* Bit masks for CAN0_INTR */ #define CANRX 0x80 /* Serial Input From Transceiver */ -#define nCANRX 0x0 #define CANTX 0x40 /* Serial Output To Transceiver */ -#define nCANTX 0x0 #define SMACK 0x8 /* Sleep Mode Acknowledge */ -#define nSMACK 0x0 #define GIRQ 0x4 /* Global Interrupt Request Status */ -#define nGIRQ 0x0 #define MBTIRQ 0x2 /* Mailbox Transmit Interrupt Request */ -#define nMBTIRQ 0x0 #define MBRIRQ 0x1 /* Mailbox Receive Interrupt Request */ -#define nMBRIRQ 0x0 /* Bit masks for CAN0_GIM */ #define EWTIM 0x1 /* Error Warning Transmit Interrupt Mask */ -#define nEWTIM 0x0 #define EWRIM 0x2 /* Error Warning Receive Interrupt Mask */ -#define nEWRIM 0x0 #define EPIM 0x4 /* Error Passive Interrupt Mask */ -#define nEPIM 0x0 #define BOIM 0x8 /* Bus Off Interrupt Mask */ -#define nBOIM 0x0 #define WUIM 0x10 /* Wakeup Interrupt Mask */ -#define nWUIM 0x0 #define UIAIM 0x20 /* Unimplemented Address Interrupt Mask */ -#define nUIAIM 0x0 #define AAIM 0x40 /* Abort Acknowledge Interrupt Mask */ -#define nAAIM 0x0 #define RMLIM 0x80 /* Receive Message Lost Interrupt Mask */ -#define nRMLIM 0x0 #define UCEIM 0x100 /* Universal Counter Exceeded Interrupt Mask */ -#define nUCEIM 0x0 #define ADIM 0x400 /* Access Denied Interrupt Mask */ -#define nADIM 0x0 /* Bit masks for CAN0_GIS */ #define EWTIS 0x1 /* Error Warning Transmit Interrupt Status */ -#define nEWTIS 0x0 #define EWRIS 0x2 /* Error Warning Receive Interrupt Status */ -#define nEWRIS 0x0 #define EPIS 0x4 /* Error Passive Interrupt Status */ -#define nEPIS 0x0 #define BOIS 0x8 /* Bus Off Interrupt Status */ -#define nBOIS 0x0 #define WUIS 0x10 /* Wakeup Interrupt Status */ -#define nWUIS 0x0 #define UIAIS 0x20 /* Unimplemented Address Interrupt Status */ -#define nUIAIS 0x0 #define AAIS 0x40 /* Abort Acknowledge Interrupt Status */ -#define nAAIS 0x0 #define RMLIS 0x80 /* Receive Message Lost Interrupt Status */ -#define nRMLIS 0x0 #define UCEIS 0x100 /* Universal Counter Exceeded Interrupt Status */ -#define nUCEIS 0x0 #define ADIS 0x400 /* Access Denied Interrupt Status */ -#define nADIS 0x0 /* Bit masks for CAN0_GIF */ #define EWTIF 0x1 /* Error Warning Transmit Interrupt Flag */ -#define nEWTIF 0x0 #define EWRIF 0x2 /* Error Warning Receive Interrupt Flag */ -#define nEWRIF 0x0 #define EPIF 0x4 /* Error Passive Interrupt Flag */ -#define nEPIF 0x0 #define BOIF 0x8 /* Bus Off Interrupt Flag */ -#define nBOIF 0x0 #define WUIF 0x10 /* Wakeup Interrupt Flag */ -#define nWUIF 0x0 #define UIAIF 0x20 /* Unimplemented Address Interrupt Flag */ -#define nUIAIF 0x0 #define AAIF 0x40 /* Abort Acknowledge Interrupt Flag */ -#define nAAIF 0x0 #define RMLIF 0x80 /* Receive Message Lost Interrupt Flag */ -#define nRMLIF 0x0 #define UCEIF 0x100 /* Universal Counter Exceeded Interrupt Flag */ -#define nUCEIF 0x0 #define ADIF 0x400 /* Access Denied Interrupt Flag */ -#define nADIF 0x0 /* Bit masks for CAN0_MBTD */ #define TDR 0x80 /* Temporary Disable Request */ -#define nTDR 0x0 #define TDA 0x40 /* Temporary Disable Acknowledge */ -#define nTDA 0x0 #define TDPTR 0x1f /* Temporary Disable Pointer */ /* Bit masks for CAN0_UCCNF */ #define UCCNF 0xf /* Universal Counter Configuration */ #define UCRC 0x20 /* Universal Counter Reload/Clear */ -#define nUCRC 0x0 #define UCCT 0x40 /* Universal Counter CAN Trigger */ -#define nUCCT 0x0 #define UCE 0x80 /* Universal Counter Enable */ -#define nUCE 0x0 /* Bit masks for CAN0_UCCNT */ @@ -2871,17 +2451,11 @@ /* Bit masks for CAN0_ESR */ #define FER 0x80 /* Form Error */ -#define nFER 0x0 #define BEF 0x40 /* Bit Error Flag */ -#define nBEF 0x0 #define SA0 0x20 /* Stuck At Dominant */ -#define nSA0 0x0 #define CRCE 0x10 /* CRC Error */ -#define nCRCE 0x0 #define SER 0x8 /* Stuff Bit Error */ -#define nSER 0x0 #define ACKE 0x4 /* Acknowledge Error */ -#define nACKE 0x0 /* Bit masks for CAN0_EWR */ @@ -2891,11 +2465,8 @@ /* Bit masks for CAN0_AMxx_H */ #define FDF 0x8000 /* Filter On Data Field */ -#define nFDF 0x0 #define FMD 0x4000 /* Full Mask Data */ -#define nFMD 0x0 #define AMIDE 0x2000 /* Acceptance Mask Identifier Extension */ -#define nAMIDE 0x0 #define BASEID 0x1ffc /* Base Identifier */ #define EXTID_HI 0x3 /* Extended Identifier High Bits */ @@ -2907,11 +2478,8 @@ /* Bit masks for CAN0_MBxx_ID1 */ #define AME 0x8000 /* Acceptance Mask Enable */ -#define nAME 0x0 #define RTR 0x4000 /* Remote Transmission Request */ -#define nRTR 0x0 #define IDE 0x2000 /* Identifier Extension */ -#define nIDE 0x0 #define BASEID 0x1ffc /* Base Identifier */ #define EXTID_HI 0x3 /* Extended Identifier High Bits */ @@ -2951,977 +2519,534 @@ /* Bit masks for CAN0_MC1 */ #define MC0 0x1 /* Mailbox 0 Enable */ -#define nMC0 0x0 #define MC1 0x2 /* Mailbox 1 Enable */ -#define nMC1 0x0 #define MC2 0x4 /* Mailbox 2 Enable */ -#define nMC2 0x0 #define MC3 0x8 /* Mailbox 3 Enable */ -#define nMC3 0x0 #define MC4 0x10 /* Mailbox 4 Enable */ -#define nMC4 0x0 #define MC5 0x20 /* Mailbox 5 Enable */ -#define nMC5 0x0 #define MC6 0x40 /* Mailbox 6 Enable */ -#define nMC6 0x0 #define MC7 0x80 /* Mailbox 7 Enable */ -#define nMC7 0x0 #define MC8 0x100 /* Mailbox 8 Enable */ -#define nMC8 0x0 #define MC9 0x200 /* Mailbox 9 Enable */ -#define nMC9 0x0 #define MC10 0x400 /* Mailbox 10 Enable */ -#define nMC10 0x0 #define MC11 0x800 /* Mailbox 11 Enable */ -#define nMC11 0x0 #define MC12 0x1000 /* Mailbox 12 Enable */ -#define nMC12 0x0 #define MC13 0x2000 /* Mailbox 13 Enable */ -#define nMC13 0x0 #define MC14 0x4000 /* Mailbox 14 Enable */ -#define nMC14 0x0 #define MC15 0x8000 /* Mailbox 15 Enable */ -#define nMC15 0x0 /* Bit masks for CAN0_MC2 */ #define MC16 0x1 /* Mailbox 16 Enable */ -#define nMC16 0x0 #define MC17 0x2 /* Mailbox 17 Enable */ -#define nMC17 0x0 #define MC18 0x4 /* Mailbox 18 Enable */ -#define nMC18 0x0 #define MC19 0x8 /* Mailbox 19 Enable */ -#define nMC19 0x0 #define MC20 0x10 /* Mailbox 20 Enable */ -#define nMC20 0x0 #define MC21 0x20 /* Mailbox 21 Enable */ -#define nMC21 0x0 #define MC22 0x40 /* Mailbox 22 Enable */ -#define nMC22 0x0 #define MC23 0x80 /* Mailbox 23 Enable */ -#define nMC23 0x0 #define MC24 0x100 /* Mailbox 24 Enable */ -#define nMC24 0x0 #define MC25 0x200 /* Mailbox 25 Enable */ -#define nMC25 0x0 #define MC26 0x400 /* Mailbox 26 Enable */ -#define nMC26 0x0 #define MC27 0x800 /* Mailbox 27 Enable */ -#define nMC27 0x0 #define MC28 0x1000 /* Mailbox 28 Enable */ -#define nMC28 0x0 #define MC29 0x2000 /* Mailbox 29 Enable */ -#define nMC29 0x0 #define MC30 0x4000 /* Mailbox 30 Enable */ -#define nMC30 0x0 #define MC31 0x8000 /* Mailbox 31 Enable */ -#define nMC31 0x0 /* Bit masks for CAN0_MD1 */ #define MD0 0x1 /* Mailbox 0 Receive Enable */ -#define nMD0 0x0 #define MD1 0x2 /* Mailbox 1 Receive Enable */ -#define nMD1 0x0 #define MD2 0x4 /* Mailbox 2 Receive Enable */ -#define nMD2 0x0 #define MD3 0x8 /* Mailbox 3 Receive Enable */ -#define nMD3 0x0 #define MD4 0x10 /* Mailbox 4 Receive Enable */ -#define nMD4 0x0 #define MD5 0x20 /* Mailbox 5 Receive Enable */ -#define nMD5 0x0 #define MD6 0x40 /* Mailbox 6 Receive Enable */ -#define nMD6 0x0 #define MD7 0x80 /* Mailbox 7 Receive Enable */ -#define nMD7 0x0 #define MD8 0x100 /* Mailbox 8 Receive Enable */ -#define nMD8 0x0 #define MD9 0x200 /* Mailbox 9 Receive Enable */ -#define nMD9 0x0 #define MD10 0x400 /* Mailbox 10 Receive Enable */ -#define nMD10 0x0 #define MD11 0x800 /* Mailbox 11 Receive Enable */ -#define nMD11 0x0 #define MD12 0x1000 /* Mailbox 12 Receive Enable */ -#define nMD12 0x0 #define MD13 0x2000 /* Mailbox 13 Receive Enable */ -#define nMD13 0x0 #define MD14 0x4000 /* Mailbox 14 Receive Enable */ -#define nMD14 0x0 #define MD15 0x8000 /* Mailbox 15 Receive Enable */ -#define nMD15 0x0 /* Bit masks for CAN0_MD2 */ #define MD16 0x1 /* Mailbox 16 Receive Enable */ -#define nMD16 0x0 #define MD17 0x2 /* Mailbox 17 Receive Enable */ -#define nMD17 0x0 #define MD18 0x4 /* Mailbox 18 Receive Enable */ -#define nMD18 0x0 #define MD19 0x8 /* Mailbox 19 Receive Enable */ -#define nMD19 0x0 #define MD20 0x10 /* Mailbox 20 Receive Enable */ -#define nMD20 0x0 #define MD21 0x20 /* Mailbox 21 Receive Enable */ -#define nMD21 0x0 #define MD22 0x40 /* Mailbox 22 Receive Enable */ -#define nMD22 0x0 #define MD23 0x80 /* Mailbox 23 Receive Enable */ -#define nMD23 0x0 #define MD24 0x100 /* Mailbox 24 Receive Enable */ -#define nMD24 0x0 #define MD25 0x200 /* Mailbox 25 Receive Enable */ -#define nMD25 0x0 #define MD26 0x400 /* Mailbox 26 Receive Enable */ -#define nMD26 0x0 #define MD27 0x800 /* Mailbox 27 Receive Enable */ -#define nMD27 0x0 #define MD28 0x1000 /* Mailbox 28 Receive Enable */ -#define nMD28 0x0 #define MD29 0x2000 /* Mailbox 29 Receive Enable */ -#define nMD29 0x0 #define MD30 0x4000 /* Mailbox 30 Receive Enable */ -#define nMD30 0x0 #define MD31 0x8000 /* Mailbox 31 Receive Enable */ -#define nMD31 0x0 /* Bit masks for CAN0_RMP1 */ #define RMP0 0x1 /* Mailbox 0 Receive Message Pending */ -#define nRMP0 0x0 #define RMP1 0x2 /* Mailbox 1 Receive Message Pending */ -#define nRMP1 0x0 #define RMP2 0x4 /* Mailbox 2 Receive Message Pending */ -#define nRMP2 0x0 #define RMP3 0x8 /* Mailbox 3 Receive Message Pending */ -#define nRMP3 0x0 #define RMP4 0x10 /* Mailbox 4 Receive Message Pending */ -#define nRMP4 0x0 #define RMP5 0x20 /* Mailbox 5 Receive Message Pending */ -#define nRMP5 0x0 #define RMP6 0x40 /* Mailbox 6 Receive Message Pending */ -#define nRMP6 0x0 #define RMP7 0x80 /* Mailbox 7 Receive Message Pending */ -#define nRMP7 0x0 #define RMP8 0x100 /* Mailbox 8 Receive Message Pending */ -#define nRMP8 0x0 #define RMP9 0x200 /* Mailbox 9 Receive Message Pending */ -#define nRMP9 0x0 #define RMP10 0x400 /* Mailbox 10 Receive Message Pending */ -#define nRMP10 0x0 #define RMP11 0x800 /* Mailbox 11 Receive Message Pending */ -#define nRMP11 0x0 #define RMP12 0x1000 /* Mailbox 12 Receive Message Pending */ -#define nRMP12 0x0 #define RMP13 0x2000 /* Mailbox 13 Receive Message Pending */ -#define nRMP13 0x0 #define RMP14 0x4000 /* Mailbox 14 Receive Message Pending */ -#define nRMP14 0x0 #define RMP15 0x8000 /* Mailbox 15 Receive Message Pending */ -#define nRMP15 0x0 /* Bit masks for CAN0_RMP2 */ #define RMP16 0x1 /* Mailbox 16 Receive Message Pending */ -#define nRMP16 0x0 #define RMP17 0x2 /* Mailbox 17 Receive Message Pending */ -#define nRMP17 0x0 #define RMP18 0x4 /* Mailbox 18 Receive Message Pending */ -#define nRMP18 0x0 #define RMP19 0x8 /* Mailbox 19 Receive Message Pending */ -#define nRMP19 0x0 #define RMP20 0x10 /* Mailbox 20 Receive Message Pending */ -#define nRMP20 0x0 #define RMP21 0x20 /* Mailbox 21 Receive Message Pending */ -#define nRMP21 0x0 #define RMP22 0x40 /* Mailbox 22 Receive Message Pending */ -#define nRMP22 0x0 #define RMP23 0x80 /* Mailbox 23 Receive Message Pending */ -#define nRMP23 0x0 #define RMP24 0x100 /* Mailbox 24 Receive Message Pending */ -#define nRMP24 0x0 #define RMP25 0x200 /* Mailbox 25 Receive Message Pending */ -#define nRMP25 0x0 #define RMP26 0x400 /* Mailbox 26 Receive Message Pending */ -#define nRMP26 0x0 #define RMP27 0x800 /* Mailbox 27 Receive Message Pending */ -#define nRMP27 0x0 #define RMP28 0x1000 /* Mailbox 28 Receive Message Pending */ -#define nRMP28 0x0 #define RMP29 0x2000 /* Mailbox 29 Receive Message Pending */ -#define nRMP29 0x0 #define RMP30 0x4000 /* Mailbox 30 Receive Message Pending */ -#define nRMP30 0x0 #define RMP31 0x8000 /* Mailbox 31 Receive Message Pending */ -#define nRMP31 0x0 /* Bit masks for CAN0_RML1 */ #define RML0 0x1 /* Mailbox 0 Receive Message Lost */ -#define nRML0 0x0 #define RML1 0x2 /* Mailbox 1 Receive Message Lost */ -#define nRML1 0x0 #define RML2 0x4 /* Mailbox 2 Receive Message Lost */ -#define nRML2 0x0 #define RML3 0x8 /* Mailbox 3 Receive Message Lost */ -#define nRML3 0x0 #define RML4 0x10 /* Mailbox 4 Receive Message Lost */ -#define nRML4 0x0 #define RML5 0x20 /* Mailbox 5 Receive Message Lost */ -#define nRML5 0x0 #define RML6 0x40 /* Mailbox 6 Receive Message Lost */ -#define nRML6 0x0 #define RML7 0x80 /* Mailbox 7 Receive Message Lost */ -#define nRML7 0x0 #define RML8 0x100 /* Mailbox 8 Receive Message Lost */ -#define nRML8 0x0 #define RML9 0x200 /* Mailbox 9 Receive Message Lost */ -#define nRML9 0x0 #define RML10 0x400 /* Mailbox 10 Receive Message Lost */ -#define nRML10 0x0 #define RML11 0x800 /* Mailbox 11 Receive Message Lost */ -#define nRML11 0x0 #define RML12 0x1000 /* Mailbox 12 Receive Message Lost */ -#define nRML12 0x0 #define RML13 0x2000 /* Mailbox 13 Receive Message Lost */ -#define nRML13 0x0 #define RML14 0x4000 /* Mailbox 14 Receive Message Lost */ -#define nRML14 0x0 #define RML15 0x8000 /* Mailbox 15 Receive Message Lost */ -#define nRML15 0x0 /* Bit masks for CAN0_RML2 */ #define RML16 0x1 /* Mailbox 16 Receive Message Lost */ -#define nRML16 0x0 #define RML17 0x2 /* Mailbox 17 Receive Message Lost */ -#define nRML17 0x0 #define RML18 0x4 /* Mailbox 18 Receive Message Lost */ -#define nRML18 0x0 #define RML19 0x8 /* Mailbox 19 Receive Message Lost */ -#define nRML19 0x0 #define RML20 0x10 /* Mailbox 20 Receive Message Lost */ -#define nRML20 0x0 #define RML21 0x20 /* Mailbox 21 Receive Message Lost */ -#define nRML21 0x0 #define RML22 0x40 /* Mailbox 22 Receive Message Lost */ -#define nRML22 0x0 #define RML23 0x80 /* Mailbox 23 Receive Message Lost */ -#define nRML23 0x0 #define RML24 0x100 /* Mailbox 24 Receive Message Lost */ -#define nRML24 0x0 #define RML25 0x200 /* Mailbox 25 Receive Message Lost */ -#define nRML25 0x0 #define RML26 0x400 /* Mailbox 26 Receive Message Lost */ -#define nRML26 0x0 #define RML27 0x800 /* Mailbox 27 Receive Message Lost */ -#define nRML27 0x0 #define RML28 0x1000 /* Mailbox 28 Receive Message Lost */ -#define nRML28 0x0 #define RML29 0x2000 /* Mailbox 29 Receive Message Lost */ -#define nRML29 0x0 #define RML30 0x4000 /* Mailbox 30 Receive Message Lost */ -#define nRML30 0x0 #define RML31 0x8000 /* Mailbox 31 Receive Message Lost */ -#define nRML31 0x0 /* Bit masks for CAN0_OPSS1 */ #define OPSS0 0x1 /* Mailbox 0 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS0 0x0 #define OPSS1 0x2 /* Mailbox 1 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS1 0x0 #define OPSS2 0x4 /* Mailbox 2 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS2 0x0 #define OPSS3 0x8 /* Mailbox 3 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS3 0x0 #define OPSS4 0x10 /* Mailbox 4 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS4 0x0 #define OPSS5 0x20 /* Mailbox 5 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS5 0x0 #define OPSS6 0x40 /* Mailbox 6 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS6 0x0 #define OPSS7 0x80 /* Mailbox 7 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS7 0x0 #define OPSS8 0x100 /* Mailbox 8 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS8 0x0 #define OPSS9 0x200 /* Mailbox 9 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS9 0x0 #define OPSS10 0x400 /* Mailbox 10 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS10 0x0 #define OPSS11 0x800 /* Mailbox 11 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS11 0x0 #define OPSS12 0x1000 /* Mailbox 12 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS12 0x0 #define OPSS13 0x2000 /* Mailbox 13 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS13 0x0 #define OPSS14 0x4000 /* Mailbox 14 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS14 0x0 #define OPSS15 0x8000 /* Mailbox 15 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS15 0x0 /* Bit masks for CAN0_OPSS2 */ #define OPSS16 0x1 /* Mailbox 16 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS16 0x0 #define OPSS17 0x2 /* Mailbox 17 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS17 0x0 #define OPSS18 0x4 /* Mailbox 18 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS18 0x0 #define OPSS19 0x8 /* Mailbox 19 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS19 0x0 #define OPSS20 0x10 /* Mailbox 20 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS20 0x0 #define OPSS21 0x20 /* Mailbox 21 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS21 0x0 #define OPSS22 0x40 /* Mailbox 22 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS22 0x0 #define OPSS23 0x80 /* Mailbox 23 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS23 0x0 #define OPSS24 0x100 /* Mailbox 24 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS24 0x0 #define OPSS25 0x200 /* Mailbox 25 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS25 0x0 #define OPSS26 0x400 /* Mailbox 26 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS26 0x0 #define OPSS27 0x800 /* Mailbox 27 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS27 0x0 #define OPSS28 0x1000 /* Mailbox 28 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS28 0x0 #define OPSS29 0x2000 /* Mailbox 29 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS29 0x0 #define OPSS30 0x4000 /* Mailbox 30 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS30 0x0 #define OPSS31 0x8000 /* Mailbox 31 Overwrite Protection/Single-Shot Transmission Enable */ -#define nOPSS31 0x0 /* Bit masks for CAN0_TRS1 */ #define TRS0 0x1 /* Mailbox 0 Transmit Request Set */ -#define nTRS0 0x0 #define TRS1 0x2 /* Mailbox 1 Transmit Request Set */ -#define nTRS1 0x0 #define TRS2 0x4 /* Mailbox 2 Transmit Request Set */ -#define nTRS2 0x0 #define TRS3 0x8 /* Mailbox 3 Transmit Request Set */ -#define nTRS3 0x0 #define TRS4 0x10 /* Mailbox 4 Transmit Request Set */ -#define nTRS4 0x0 #define TRS5 0x20 /* Mailbox 5 Transmit Request Set */ -#define nTRS5 0x0 #define TRS6 0x40 /* Mailbox 6 Transmit Request Set */ -#define nTRS6 0x0 #define TRS7 0x80 /* Mailbox 7 Transmit Request Set */ -#define nTRS7 0x0 #define TRS8 0x100 /* Mailbox 8 Transmit Request Set */ -#define nTRS8 0x0 #define TRS9 0x200 /* Mailbox 9 Transmit Request Set */ -#define nTRS9 0x0 #define TRS10 0x400 /* Mailbox 10 Transmit Request Set */ -#define nTRS10 0x0 #define TRS11 0x800 /* Mailbox 11 Transmit Request Set */ -#define nTRS11 0x0 #define TRS12 0x1000 /* Mailbox 12 Transmit Request Set */ -#define nTRS12 0x0 #define TRS13 0x2000 /* Mailbox 13 Transmit Request Set */ -#define nTRS13 0x0 #define TRS14 0x4000 /* Mailbox 14 Transmit Request Set */ -#define nTRS14 0x0 #define TRS15 0x8000 /* Mailbox 15 Transmit Request Set */ -#define nTRS15 0x0 /* Bit masks for CAN0_TRS2 */ #define TRS16 0x1 /* Mailbox 16 Transmit Request Set */ -#define nTRS16 0x0 #define TRS17 0x2 /* Mailbox 17 Transmit Request Set */ -#define nTRS17 0x0 #define TRS18 0x4 /* Mailbox 18 Transmit Request Set */ -#define nTRS18 0x0 #define TRS19 0x8 /* Mailbox 19 Transmit Request Set */ -#define nTRS19 0x0 #define TRS20 0x10 /* Mailbox 20 Transmit Request Set */ -#define nTRS20 0x0 #define TRS21 0x20 /* Mailbox 21 Transmit Request Set */ -#define nTRS21 0x0 #define TRS22 0x40 /* Mailbox 22 Transmit Request Set */ -#define nTRS22 0x0 #define TRS23 0x80 /* Mailbox 23 Transmit Request Set */ -#define nTRS23 0x0 #define TRS24 0x100 /* Mailbox 24 Transmit Request Set */ -#define nTRS24 0x0 #define TRS25 0x200 /* Mailbox 25 Transmit Request Set */ -#define nTRS25 0x0 #define TRS26 0x400 /* Mailbox 26 Transmit Request Set */ -#define nTRS26 0x0 #define TRS27 0x800 /* Mailbox 27 Transmit Request Set */ -#define nTRS27 0x0 #define TRS28 0x1000 /* Mailbox 28 Transmit Request Set */ -#define nTRS28 0x0 #define TRS29 0x2000 /* Mailbox 29 Transmit Request Set */ -#define nTRS29 0x0 #define TRS30 0x4000 /* Mailbox 30 Transmit Request Set */ -#define nTRS30 0x0 #define TRS31 0x8000 /* Mailbox 31 Transmit Request Set */ -#define nTRS31 0x0 /* Bit masks for CAN0_TRR1 */ #define TRR0 0x1 /* Mailbox 0 Transmit Request Reset */ -#define nTRR0 0x0 #define TRR1 0x2 /* Mailbox 1 Transmit Request Reset */ -#define nTRR1 0x0 #define TRR2 0x4 /* Mailbox 2 Transmit Request Reset */ -#define nTRR2 0x0 #define TRR3 0x8 /* Mailbox 3 Transmit Request Reset */ -#define nTRR3 0x0 #define TRR4 0x10 /* Mailbox 4 Transmit Request Reset */ -#define nTRR4 0x0 #define TRR5 0x20 /* Mailbox 5 Transmit Request Reset */ -#define nTRR5 0x0 #define TRR6 0x40 /* Mailbox 6 Transmit Request Reset */ -#define nTRR6 0x0 #define TRR7 0x80 /* Mailbox 7 Transmit Request Reset */ -#define nTRR7 0x0 #define TRR8 0x100 /* Mailbox 8 Transmit Request Reset */ -#define nTRR8 0x0 #define TRR9 0x200 /* Mailbox 9 Transmit Request Reset */ -#define nTRR9 0x0 #define TRR10 0x400 /* Mailbox 10 Transmit Request Reset */ -#define nTRR10 0x0 #define TRR11 0x800 /* Mailbox 11 Transmit Request Reset */ -#define nTRR11 0x0 #define TRR12 0x1000 /* Mailbox 12 Transmit Request Reset */ -#define nTRR12 0x0 #define TRR13 0x2000 /* Mailbox 13 Transmit Request Reset */ -#define nTRR13 0x0 #define TRR14 0x4000 /* Mailbox 14 Transmit Request Reset */ -#define nTRR14 0x0 #define TRR15 0x8000 /* Mailbox 15 Transmit Request Reset */ -#define nTRR15 0x0 /* Bit masks for CAN0_TRR2 */ #define TRR16 0x1 /* Mailbox 16 Transmit Request Reset */ -#define nTRR16 0x0 #define TRR17 0x2 /* Mailbox 17 Transmit Request Reset */ -#define nTRR17 0x0 #define TRR18 0x4 /* Mailbox 18 Transmit Request Reset */ -#define nTRR18 0x0 #define TRR19 0x8 /* Mailbox 19 Transmit Request Reset */ -#define nTRR19 0x0 #define TRR20 0x10 /* Mailbox 20 Transmit Request Reset */ -#define nTRR20 0x0 #define TRR21 0x20 /* Mailbox 21 Transmit Request Reset */ -#define nTRR21 0x0 #define TRR22 0x40 /* Mailbox 22 Transmit Request Reset */ -#define nTRR22 0x0 #define TRR23 0x80 /* Mailbox 23 Transmit Request Reset */ -#define nTRR23 0x0 #define TRR24 0x100 /* Mailbox 24 Transmit Request Reset */ -#define nTRR24 0x0 #define TRR25 0x200 /* Mailbox 25 Transmit Request Reset */ -#define nTRR25 0x0 #define TRR26 0x400 /* Mailbox 26 Transmit Request Reset */ -#define nTRR26 0x0 #define TRR27 0x800 /* Mailbox 27 Transmit Request Reset */ -#define nTRR27 0x0 #define TRR28 0x1000 /* Mailbox 28 Transmit Request Reset */ -#define nTRR28 0x0 #define TRR29 0x2000 /* Mailbox 29 Transmit Request Reset */ -#define nTRR29 0x0 #define TRR30 0x4000 /* Mailbox 30 Transmit Request Reset */ -#define nTRR30 0x0 #define TRR31 0x8000 /* Mailbox 31 Transmit Request Reset */ -#define nTRR31 0x0 /* Bit masks for CAN0_AA1 */ #define AA0 0x1 /* Mailbox 0 Abort Acknowledge */ -#define nAA0 0x0 #define AA1 0x2 /* Mailbox 1 Abort Acknowledge */ -#define nAA1 0x0 #define AA2 0x4 /* Mailbox 2 Abort Acknowledge */ -#define nAA2 0x0 #define AA3 0x8 /* Mailbox 3 Abort Acknowledge */ -#define nAA3 0x0 #define AA4 0x10 /* Mailbox 4 Abort Acknowledge */ -#define nAA4 0x0 #define AA5 0x20 /* Mailbox 5 Abort Acknowledge */ -#define nAA5 0x0 #define AA6 0x40 /* Mailbox 6 Abort Acknowledge */ -#define nAA6 0x0 #define AA7 0x80 /* Mailbox 7 Abort Acknowledge */ -#define nAA7 0x0 #define AA8 0x100 /* Mailbox 8 Abort Acknowledge */ -#define nAA8 0x0 #define AA9 0x200 /* Mailbox 9 Abort Acknowledge */ -#define nAA9 0x0 #define AA10 0x400 /* Mailbox 10 Abort Acknowledge */ -#define nAA10 0x0 #define AA11 0x800 /* Mailbox 11 Abort Acknowledge */ -#define nAA11 0x0 #define AA12 0x1000 /* Mailbox 12 Abort Acknowledge */ -#define nAA12 0x0 #define AA13 0x2000 /* Mailbox 13 Abort Acknowledge */ -#define nAA13 0x0 #define AA14 0x4000 /* Mailbox 14 Abort Acknowledge */ -#define nAA14 0x0 #define AA15 0x8000 /* Mailbox 15 Abort Acknowledge */ -#define nAA15 0x0 /* Bit masks for CAN0_AA2 */ #define AA16 0x1 /* Mailbox 16 Abort Acknowledge */ -#define nAA16 0x0 #define AA17 0x2 /* Mailbox 17 Abort Acknowledge */ -#define nAA17 0x0 #define AA18 0x4 /* Mailbox 18 Abort Acknowledge */ -#define nAA18 0x0 #define AA19 0x8 /* Mailbox 19 Abort Acknowledge */ -#define nAA19 0x0 #define AA20 0x10 /* Mailbox 20 Abort Acknowledge */ -#define nAA20 0x0 #define AA21 0x20 /* Mailbox 21 Abort Acknowledge */ -#define nAA21 0x0 #define AA22 0x40 /* Mailbox 22 Abort Acknowledge */ -#define nAA22 0x0 #define AA23 0x80 /* Mailbox 23 Abort Acknowledge */ -#define nAA23 0x0 #define AA24 0x100 /* Mailbox 24 Abort Acknowledge */ -#define nAA24 0x0 #define AA25 0x200 /* Mailbox 25 Abort Acknowledge */ -#define nAA25 0x0 #define AA26 0x400 /* Mailbox 26 Abort Acknowledge */ -#define nAA26 0x0 #define AA27 0x800 /* Mailbox 27 Abort Acknowledge */ -#define nAA27 0x0 #define AA28 0x1000 /* Mailbox 28 Abort Acknowledge */ -#define nAA28 0x0 #define AA29 0x2000 /* Mailbox 29 Abort Acknowledge */ -#define nAA29 0x0 #define AA30 0x4000 /* Mailbox 30 Abort Acknowledge */ -#define nAA30 0x0 #define AA31 0x8000 /* Mailbox 31 Abort Acknowledge */ -#define nAA31 0x0 /* Bit masks for CAN0_TA1 */ #define TA0 0x1 /* Mailbox 0 Transmit Acknowledge */ -#define nTA0 0x0 #define TA1 0x2 /* Mailbox 1 Transmit Acknowledge */ -#define nTA1 0x0 #define TA2 0x4 /* Mailbox 2 Transmit Acknowledge */ -#define nTA2 0x0 #define TA3 0x8 /* Mailbox 3 Transmit Acknowledge */ -#define nTA3 0x0 #define TA4 0x10 /* Mailbox 4 Transmit Acknowledge */ -#define nTA4 0x0 #define TA5 0x20 /* Mailbox 5 Transmit Acknowledge */ -#define nTA5 0x0 #define TA6 0x40 /* Mailbox 6 Transmit Acknowledge */ -#define nTA6 0x0 #define TA7 0x80 /* Mailbox 7 Transmit Acknowledge */ -#define nTA7 0x0 #define TA8 0x100 /* Mailbox 8 Transmit Acknowledge */ -#define nTA8 0x0 #define TA9 0x200 /* Mailbox 9 Transmit Acknowledge */ -#define nTA9 0x0 #define TA10 0x400 /* Mailbox 10 Transmit Acknowledge */ -#define nTA10 0x0 #define TA11 0x800 /* Mailbox 11 Transmit Acknowledge */ -#define nTA11 0x0 #define TA12 0x1000 /* Mailbox 12 Transmit Acknowledge */ -#define nTA12 0x0 #define TA13 0x2000 /* Mailbox 13 Transmit Acknowledge */ -#define nTA13 0x0 #define TA14 0x4000 /* Mailbox 14 Transmit Acknowledge */ -#define nTA14 0x0 #define TA15 0x8000 /* Mailbox 15 Transmit Acknowledge */ -#define nTA15 0x0 /* Bit masks for CAN0_TA2 */ #define TA16 0x1 /* Mailbox 16 Transmit Acknowledge */ -#define nTA16 0x0 #define TA17 0x2 /* Mailbox 17 Transmit Acknowledge */ -#define nTA17 0x0 #define TA18 0x4 /* Mailbox 18 Transmit Acknowledge */ -#define nTA18 0x0 #define TA19 0x8 /* Mailbox 19 Transmit Acknowledge */ -#define nTA19 0x0 #define TA20 0x10 /* Mailbox 20 Transmit Acknowledge */ -#define nTA20 0x0 #define TA21 0x20 /* Mailbox 21 Transmit Acknowledge */ -#define nTA21 0x0 #define TA22 0x40 /* Mailbox 22 Transmit Acknowledge */ -#define nTA22 0x0 #define TA23 0x80 /* Mailbox 23 Transmit Acknowledge */ -#define nTA23 0x0 #define TA24 0x100 /* Mailbox 24 Transmit Acknowledge */ -#define nTA24 0x0 #define TA25 0x200 /* Mailbox 25 Transmit Acknowledge */ -#define nTA25 0x0 #define TA26 0x400 /* Mailbox 26 Transmit Acknowledge */ -#define nTA26 0x0 #define TA27 0x800 /* Mailbox 27 Transmit Acknowledge */ -#define nTA27 0x0 #define TA28 0x1000 /* Mailbox 28 Transmit Acknowledge */ -#define nTA28 0x0 #define TA29 0x2000 /* Mailbox 29 Transmit Acknowledge */ -#define nTA29 0x0 #define TA30 0x4000 /* Mailbox 30 Transmit Acknowledge */ -#define nTA30 0x0 #define TA31 0x8000 /* Mailbox 31 Transmit Acknowledge */ -#define nTA31 0x0 /* Bit masks for CAN0_RFH1 */ #define RFH0 0x1 /* Mailbox 0 Remote Frame Handling Enable */ -#define nRFH0 0x0 #define RFH1 0x2 /* Mailbox 1 Remote Frame Handling Enable */ -#define nRFH1 0x0 #define RFH2 0x4 /* Mailbox 2 Remote Frame Handling Enable */ -#define nRFH2 0x0 #define RFH3 0x8 /* Mailbox 3 Remote Frame Handling Enable */ -#define nRFH3 0x0 #define RFH4 0x10 /* Mailbox 4 Remote Frame Handling Enable */ -#define nRFH4 0x0 #define RFH5 0x20 /* Mailbox 5 Remote Frame Handling Enable */ -#define nRFH5 0x0 #define RFH6 0x40 /* Mailbox 6 Remote Frame Handling Enable */ -#define nRFH6 0x0 #define RFH7 0x80 /* Mailbox 7 Remote Frame Handling Enable */ -#define nRFH7 0x0 #define RFH8 0x100 /* Mailbox 8 Remote Frame Handling Enable */ -#define nRFH8 0x0 #define RFH9 0x200 /* Mailbox 9 Remote Frame Handling Enable */ -#define nRFH9 0x0 #define RFH10 0x400 /* Mailbox 10 Remote Frame Handling Enable */ -#define nRFH10 0x0 #define RFH11 0x800 /* Mailbox 11 Remote Frame Handling Enable */ -#define nRFH11 0x0 #define RFH12 0x1000 /* Mailbox 12 Remote Frame Handling Enable */ -#define nRFH12 0x0 #define RFH13 0x2000 /* Mailbox 13 Remote Frame Handling Enable */ -#define nRFH13 0x0 #define RFH14 0x4000 /* Mailbox 14 Remote Frame Handling Enable */ -#define nRFH14 0x0 #define RFH15 0x8000 /* Mailbox 15 Remote Frame Handling Enable */ -#define nRFH15 0x0 /* Bit masks for CAN0_RFH2 */ #define RFH16 0x1 /* Mailbox 16 Remote Frame Handling Enable */ -#define nRFH16 0x0 #define RFH17 0x2 /* Mailbox 17 Remote Frame Handling Enable */ -#define nRFH17 0x0 #define RFH18 0x4 /* Mailbox 18 Remote Frame Handling Enable */ -#define nRFH18 0x0 #define RFH19 0x8 /* Mailbox 19 Remote Frame Handling Enable */ -#define nRFH19 0x0 #define RFH20 0x10 /* Mailbox 20 Remote Frame Handling Enable */ -#define nRFH20 0x0 #define RFH21 0x20 /* Mailbox 21 Remote Frame Handling Enable */ -#define nRFH21 0x0 #define RFH22 0x40 /* Mailbox 22 Remote Frame Handling Enable */ -#define nRFH22 0x0 #define RFH23 0x80 /* Mailbox 23 Remote Frame Handling Enable */ -#define nRFH23 0x0 #define RFH24 0x100 /* Mailbox 24 Remote Frame Handling Enable */ -#define nRFH24 0x0 #define RFH25 0x200 /* Mailbox 25 Remote Frame Handling Enable */ -#define nRFH25 0x0 #define RFH26 0x400 /* Mailbox 26 Remote Frame Handling Enable */ -#define nRFH26 0x0 #define RFH27 0x800 /* Mailbox 27 Remote Frame Handling Enable */ -#define nRFH27 0x0 #define RFH28 0x1000 /* Mailbox 28 Remote Frame Handling Enable */ -#define nRFH28 0x0 #define RFH29 0x2000 /* Mailbox 29 Remote Frame Handling Enable */ -#define nRFH29 0x0 #define RFH30 0x4000 /* Mailbox 30 Remote Frame Handling Enable */ -#define nRFH30 0x0 #define RFH31 0x8000 /* Mailbox 31 Remote Frame Handling Enable */ -#define nRFH31 0x0 /* Bit masks for CAN0_MBIM1 */ #define MBIM0 0x1 /* Mailbox 0 Mailbox Interrupt Mask */ -#define nMBIM0 0x0 #define MBIM1 0x2 /* Mailbox 1 Mailbox Interrupt Mask */ -#define nMBIM1 0x0 #define MBIM2 0x4 /* Mailbox 2 Mailbox Interrupt Mask */ -#define nMBIM2 0x0 #define MBIM3 0x8 /* Mailbox 3 Mailbox Interrupt Mask */ -#define nMBIM3 0x0 #define MBIM4 0x10 /* Mailbox 4 Mailbox Interrupt Mask */ -#define nMBIM4 0x0 #define MBIM5 0x20 /* Mailbox 5 Mailbox Interrupt Mask */ -#define nMBIM5 0x0 #define MBIM6 0x40 /* Mailbox 6 Mailbox Interrupt Mask */ -#define nMBIM6 0x0 #define MBIM7 0x80 /* Mailbox 7 Mailbox Interrupt Mask */ -#define nMBIM7 0x0 #define MBIM8 0x100 /* Mailbox 8 Mailbox Interrupt Mask */ -#define nMBIM8 0x0 #define MBIM9 0x200 /* Mailbox 9 Mailbox Interrupt Mask */ -#define nMBIM9 0x0 #define MBIM10 0x400 /* Mailbox 10 Mailbox Interrupt Mask */ -#define nMBIM10 0x0 #define MBIM11 0x800 /* Mailbox 11 Mailbox Interrupt Mask */ -#define nMBIM11 0x0 #define MBIM12 0x1000 /* Mailbox 12 Mailbox Interrupt Mask */ -#define nMBIM12 0x0 #define MBIM13 0x2000 /* Mailbox 13 Mailbox Interrupt Mask */ -#define nMBIM13 0x0 #define MBIM14 0x4000 /* Mailbox 14 Mailbox Interrupt Mask */ -#define nMBIM14 0x0 #define MBIM15 0x8000 /* Mailbox 15 Mailbox Interrupt Mask */ -#define nMBIM15 0x0 /* Bit masks for CAN0_MBIM2 */ #define MBIM16 0x1 /* Mailbox 16 Mailbox Interrupt Mask */ -#define nMBIM16 0x0 #define MBIM17 0x2 /* Mailbox 17 Mailbox Interrupt Mask */ -#define nMBIM17 0x0 #define MBIM18 0x4 /* Mailbox 18 Mailbox Interrupt Mask */ -#define nMBIM18 0x0 #define MBIM19 0x8 /* Mailbox 19 Mailbox Interrupt Mask */ -#define nMBIM19 0x0 #define MBIM20 0x10 /* Mailbox 20 Mailbox Interrupt Mask */ -#define nMBIM20 0x0 #define MBIM21 0x20 /* Mailbox 21 Mailbox Interrupt Mask */ -#define nMBIM21 0x0 #define MBIM22 0x40 /* Mailbox 22 Mailbox Interrupt Mask */ -#define nMBIM22 0x0 #define MBIM23 0x80 /* Mailbox 23 Mailbox Interrupt Mask */ -#define nMBIM23 0x0 #define MBIM24 0x100 /* Mailbox 24 Mailbox Interrupt Mask */ -#define nMBIM24 0x0 #define MBIM25 0x200 /* Mailbox 25 Mailbox Interrupt Mask */ -#define nMBIM25 0x0 #define MBIM26 0x400 /* Mailbox 26 Mailbox Interrupt Mask */ -#define nMBIM26 0x0 #define MBIM27 0x800 /* Mailbox 27 Mailbox Interrupt Mask */ -#define nMBIM27 0x0 #define MBIM28 0x1000 /* Mailbox 28 Mailbox Interrupt Mask */ -#define nMBIM28 0x0 #define MBIM29 0x2000 /* Mailbox 29 Mailbox Interrupt Mask */ -#define nMBIM29 0x0 #define MBIM30 0x4000 /* Mailbox 30 Mailbox Interrupt Mask */ -#define nMBIM30 0x0 #define MBIM31 0x8000 /* Mailbox 31 Mailbox Interrupt Mask */ -#define nMBIM31 0x0 /* Bit masks for CAN0_MBTIF1 */ #define MBTIF0 0x1 /* Mailbox 0 Mailbox Transmit Interrupt Flag */ -#define nMBTIF0 0x0 #define MBTIF1 0x2 /* Mailbox 1 Mailbox Transmit Interrupt Flag */ -#define nMBTIF1 0x0 #define MBTIF2 0x4 /* Mailbox 2 Mailbox Transmit Interrupt Flag */ -#define nMBTIF2 0x0 #define MBTIF3 0x8 /* Mailbox 3 Mailbox Transmit Interrupt Flag */ -#define nMBTIF3 0x0 #define MBTIF4 0x10 /* Mailbox 4 Mailbox Transmit Interrupt Flag */ -#define nMBTIF4 0x0 #define MBTIF5 0x20 /* Mailbox 5 Mailbox Transmit Interrupt Flag */ -#define nMBTIF5 0x0 #define MBTIF6 0x40 /* Mailbox 6 Mailbox Transmit Interrupt Flag */ -#define nMBTIF6 0x0 #define MBTIF7 0x80 /* Mailbox 7 Mailbox Transmit Interrupt Flag */ -#define nMBTIF7 0x0 #define MBTIF8 0x100 /* Mailbox 8 Mailbox Transmit Interrupt Flag */ -#define nMBTIF8 0x0 #define MBTIF9 0x200 /* Mailbox 9 Mailbox Transmit Interrupt Flag */ -#define nMBTIF9 0x0 #define MBTIF10 0x400 /* Mailbox 10 Mailbox Transmit Interrupt Flag */ -#define nMBTIF10 0x0 #define MBTIF11 0x800 /* Mailbox 11 Mailbox Transmit Interrupt Flag */ -#define nMBTIF11 0x0 #define MBTIF12 0x1000 /* Mailbox 12 Mailbox Transmit Interrupt Flag */ -#define nMBTIF12 0x0 #define MBTIF13 0x2000 /* Mailbox 13 Mailbox Transmit Interrupt Flag */ -#define nMBTIF13 0x0 #define MBTIF14 0x4000 /* Mailbox 14 Mailbox Transmit Interrupt Flag */ -#define nMBTIF14 0x0 #define MBTIF15 0x8000 /* Mailbox 15 Mailbox Transmit Interrupt Flag */ -#define nMBTIF15 0x0 /* Bit masks for CAN0_MBTIF2 */ #define MBTIF16 0x1 /* Mailbox 16 Mailbox Transmit Interrupt Flag */ -#define nMBTIF16 0x0 #define MBTIF17 0x2 /* Mailbox 17 Mailbox Transmit Interrupt Flag */ -#define nMBTIF17 0x0 #define MBTIF18 0x4 /* Mailbox 18 Mailbox Transmit Interrupt Flag */ -#define nMBTIF18 0x0 #define MBTIF19 0x8 /* Mailbox 19 Mailbox Transmit Interrupt Flag */ -#define nMBTIF19 0x0 #define MBTIF20 0x10 /* Mailbox 20 Mailbox Transmit Interrupt Flag */ -#define nMBTIF20 0x0 #define MBTIF21 0x20 /* Mailbox 21 Mailbox Transmit Interrupt Flag */ -#define nMBTIF21 0x0 #define MBTIF22 0x40 /* Mailbox 22 Mailbox Transmit Interrupt Flag */ -#define nMBTIF22 0x0 #define MBTIF23 0x80 /* Mailbox 23 Mailbox Transmit Interrupt Flag */ -#define nMBTIF23 0x0 #define MBTIF24 0x100 /* Mailbox 24 Mailbox Transmit Interrupt Flag */ -#define nMBTIF24 0x0 #define MBTIF25 0x200 /* Mailbox 25 Mailbox Transmit Interrupt Flag */ -#define nMBTIF25 0x0 #define MBTIF26 0x400 /* Mailbox 26 Mailbox Transmit Interrupt Flag */ -#define nMBTIF26 0x0 #define MBTIF27 0x800 /* Mailbox 27 Mailbox Transmit Interrupt Flag */ -#define nMBTIF27 0x0 #define MBTIF28 0x1000 /* Mailbox 28 Mailbox Transmit Interrupt Flag */ -#define nMBTIF28 0x0 #define MBTIF29 0x2000 /* Mailbox 29 Mailbox Transmit Interrupt Flag */ -#define nMBTIF29 0x0 #define MBTIF30 0x4000 /* Mailbox 30 Mailbox Transmit Interrupt Flag */ -#define nMBTIF30 0x0 #define MBTIF31 0x8000 /* Mailbox 31 Mailbox Transmit Interrupt Flag */ -#define nMBTIF31 0x0 /* Bit masks for CAN0_MBRIF1 */ #define MBRIF0 0x1 /* Mailbox 0 Mailbox Receive Interrupt Flag */ -#define nMBRIF0 0x0 #define MBRIF1 0x2 /* Mailbox 1 Mailbox Receive Interrupt Flag */ -#define nMBRIF1 0x0 #define MBRIF2 0x4 /* Mailbox 2 Mailbox Receive Interrupt Flag */ -#define nMBRIF2 0x0 #define MBRIF3 0x8 /* Mailbox 3 Mailbox Receive Interrupt Flag */ -#define nMBRIF3 0x0 #define MBRIF4 0x10 /* Mailbox 4 Mailbox Receive Interrupt Flag */ -#define nMBRIF4 0x0 #define MBRIF5 0x20 /* Mailbox 5 Mailbox Receive Interrupt Flag */ -#define nMBRIF5 0x0 #define MBRIF6 0x40 /* Mailbox 6 Mailbox Receive Interrupt Flag */ -#define nMBRIF6 0x0 #define MBRIF7 0x80 /* Mailbox 7 Mailbox Receive Interrupt Flag */ -#define nMBRIF7 0x0 #define MBRIF8 0x100 /* Mailbox 8 Mailbox Receive Interrupt Flag */ -#define nMBRIF8 0x0 #define MBRIF9 0x200 /* Mailbox 9 Mailbox Receive Interrupt Flag */ -#define nMBRIF9 0x0 #define MBRIF10 0x400 /* Mailbox 10 Mailbox Receive Interrupt Flag */ -#define nMBRIF10 0x0 #define MBRIF11 0x800 /* Mailbox 11 Mailbox Receive Interrupt Flag */ -#define nMBRIF11 0x0 #define MBRIF12 0x1000 /* Mailbox 12 Mailbox Receive Interrupt Flag */ -#define nMBRIF12 0x0 #define MBRIF13 0x2000 /* Mailbox 13 Mailbox Receive Interrupt Flag */ -#define nMBRIF13 0x0 #define MBRIF14 0x4000 /* Mailbox 14 Mailbox Receive Interrupt Flag */ -#define nMBRIF14 0x0 #define MBRIF15 0x8000 /* Mailbox 15 Mailbox Receive Interrupt Flag */ -#define nMBRIF15 0x0 /* Bit masks for CAN0_MBRIF2 */ #define MBRIF16 0x1 /* Mailbox 16 Mailbox Receive Interrupt Flag */ -#define nMBRIF16 0x0 #define MBRIF17 0x2 /* Mailbox 17 Mailbox Receive Interrupt Flag */ -#define nMBRIF17 0x0 #define MBRIF18 0x4 /* Mailbox 18 Mailbox Receive Interrupt Flag */ -#define nMBRIF18 0x0 #define MBRIF19 0x8 /* Mailbox 19 Mailbox Receive Interrupt Flag */ -#define nMBRIF19 0x0 #define MBRIF20 0x10 /* Mailbox 20 Mailbox Receive Interrupt Flag */ -#define nMBRIF20 0x0 #define MBRIF21 0x20 /* Mailbox 21 Mailbox Receive Interrupt Flag */ -#define nMBRIF21 0x0 #define MBRIF22 0x40 /* Mailbox 22 Mailbox Receive Interrupt Flag */ -#define nMBRIF22 0x0 #define MBRIF23 0x80 /* Mailbox 23 Mailbox Receive Interrupt Flag */ -#define nMBRIF23 0x0 #define MBRIF24 0x100 /* Mailbox 24 Mailbox Receive Interrupt Flag */ -#define nMBRIF24 0x0 #define MBRIF25 0x200 /* Mailbox 25 Mailbox Receive Interrupt Flag */ -#define nMBRIF25 0x0 #define MBRIF26 0x400 /* Mailbox 26 Mailbox Receive Interrupt Flag */ -#define nMBRIF26 0x0 #define MBRIF27 0x800 /* Mailbox 27 Mailbox Receive Interrupt Flag */ -#define nMBRIF27 0x0 #define MBRIF28 0x1000 /* Mailbox 28 Mailbox Receive Interrupt Flag */ -#define nMBRIF28 0x0 #define MBRIF29 0x2000 /* Mailbox 29 Mailbox Receive Interrupt Flag */ -#define nMBRIF29 0x0 #define MBRIF30 0x4000 /* Mailbox 30 Mailbox Receive Interrupt Flag */ -#define nMBRIF30 0x0 #define MBRIF31 0x8000 /* Mailbox 31 Mailbox Receive Interrupt Flag */ -#define nMBRIF31 0x0 /* Bit masks for EPPIx_STATUS */ #define CFIFO_ERR 0x1 /* Chroma FIFO Error */ -#define nCFIFO_ERR 0x0 #define YFIFO_ERR 0x2 /* Luma FIFO Error */ -#define nYFIFO_ERR 0x0 #define LTERR_OVR 0x4 /* Line Track Overflow */ -#define nLTERR_OVR 0x0 #define LTERR_UNDR 0x8 /* Line Track Underflow */ -#define nLTERR_UNDR 0x0 #define FTERR_OVR 0x10 /* Frame Track Overflow */ -#define nFTERR_OVR 0x0 #define FTERR_UNDR 0x20 /* Frame Track Underflow */ -#define nFTERR_UNDR 0x0 #define ERR_NCOR 0x40 /* Preamble Error Not Corrected */ -#define nERR_NCOR 0x0 #define DMA1URQ 0x80 /* DMA1 Urgent Request */ -#define nDMA1URQ 0x0 #define DMA0URQ 0x100 /* DMA0 Urgent Request */ -#define nDMA0URQ 0x0 #define ERR_DET 0x4000 /* Preamble Error Detected */ -#define nERR_DET 0x0 #define FLD 0x8000 /* Field */ -#define nFLD 0x0 /* Bit masks for EPPIx_CONTROL */ #define EPPI_EN 0x1 /* Enable */ -#define nEPPI_EN 0x0 #define EPPI_DIR 0x2 /* Direction */ -#define nEPPI_DIR 0x0 #define XFR_TYPE 0xc /* Operating Mode */ #define FS_CFG 0x30 /* Frame Sync Configuration */ #define FLD_SEL 0x40 /* Field Select/Trigger */ -#define nFLD_SEL 0x0 #define ITU_TYPE 0x80 /* ITU Interlaced or Progressive */ -#define nITU_TYPE 0x0 #define BLANKGEN 0x100 /* ITU Output Mode with Internal Blanking Generation */ -#define nBLANKGEN 0x0 #define ICLKGEN 0x200 /* Internal Clock Generation */ -#define nICLKGEN 0x0 #define IFSGEN 0x400 /* Internal Frame Sync Generation */ -#define nIFSGEN 0x0 #define POLC 0x1800 /* Frame Sync and Data Driving/Sampling Edges */ #define POLS 0x6000 /* Frame Sync Polarity */ #define DLENGTH 0x38000 /* Data Length */ #define SKIP_EN 0x40000 /* Skip Enable */ -#define nSKIP_EN 0x0 #define SKIP_EO 0x80000 /* Skip Even or Odd */ -#define nSKIP_EO 0x0 #define PACKEN 0x100000 /* Packing/Unpacking Enable */ -#define nPACKEN 0x0 #define SWAPEN 0x200000 /* Swap Enable */ -#define nSWAPEN 0x0 #define SIGN_EXT 0x400000 /* Sign Extension or Zero-filled / Data Split Format */ -#define nSIGN_EXT 0x0 #define SPLT_EVEN_ODD 0x800000 /* Split Even and Odd Data Samples */ -#define nSPLT_EVEN_ODD 0x0 #define SUBSPLT_ODD 0x1000000 /* Sub-split Odd Samples */ -#define nSUBSPLT_ODD 0x0 #define DMACFG 0x2000000 /* One or Two DMA Channels Mode */ -#define nDMACFG 0x0 #define RGB_FMT_EN 0x4000000 /* RGB Formatting Enable */ -#define nRGB_FMT_EN 0x0 #define FIFO_RWM 0x18000000 /* FIFO Regular Watermarks */ #define FIFO_UWM 0x60000000 /* FIFO Urgent Watermarks */ @@ -3951,60 +3076,36 @@ /* Bit masks for SPIx_CTL */ #define SPE 0x4000 /* SPI Enable */ -#define nSPE 0x0 #define WOM 0x2000 /* Write Open Drain Master */ -#define nWOM 0x0 #define MSTR 0x1000 /* Master Mode */ -#define nMSTR 0x0 #define CPOL 0x800 /* Clock Polarity */ -#define nCPOL 0x0 #define CPHA 0x400 /* Clock Phase */ -#define nCPHA 0x0 #define LSBF 0x200 /* LSB First */ -#define nLSBF 0x0 #define SIZE 0x100 /* Size of Words */ -#define nSIZE 0x0 #define EMISO 0x20 /* Enable MISO Output */ -#define nEMISO 0x0 #define PSSE 0x10 /* Slave-Select Enable */ -#define nPSSE 0x0 #define GM 0x8 /* Get More Data */ -#define nGM 0x0 #define SZ 0x4 /* Send Zero */ -#define nSZ 0x0 #define TIMOD 0x3 /* Transfer Initiation Mode */ /* Bit masks for SPIx_FLG */ #define FLS1 0x2 /* Slave Select Enable 1 */ -#define nFLS1 0x0 #define FLS2 0x4 /* Slave Select Enable 2 */ -#define nFLS2 0x0 #define FLS3 0x8 /* Slave Select Enable 3 */ -#define nFLS3 0x0 #define FLG1 0x200 /* Slave Select Value 1 */ -#define nFLG1 0x0 #define FLG2 0x400 /* Slave Select Value 2 */ -#define nFLG2 0x0 #define FLG3 0x800 /* Slave Select Value 3 */ -#define nFLG3 0x0 /* Bit masks for SPIx_STAT */ #define TXCOL 0x40 /* Transmit Collision Error */ -#define nTXCOL 0x0 #define RXS 0x20 /* RDBR Data Buffer Status */ -#define nRXS 0x0 #define RBSY 0x10 /* Receive Error */ -#define nRBSY 0x0 #define TXS 0x8 /* TDBR Data Buffer Status */ -#define nTXS 0x0 #define TXE 0x4 /* Transmission Error */ -#define nTXE 0x0 #define MODF 0x2 /* Mode Fault Error */ -#define nMODF 0x0 #define SPIF 0x1 /* SPI Finished */ -#define nSPIF 0x0 /* Bit masks for SPIx_TDBR */ @@ -4028,9 +3129,7 @@ #define PRESCALE 0x7f /* Prescale Value */ #define TWI_ENA 0x80 /* TWI Enable */ -#define nTWI_ENA 0x0 #define SCCB 0x200 /* Serial Camera Control Bus */ -#define nSCCB 0x0 /* Bit maskes for TWIx_CLKDIV */ @@ -4040,13 +3139,9 @@ /* Bit maskes for TWIx_SLAVE_CTL */ #define SEN 0x1 /* Slave Enable */ -#define nSEN 0x0 #define STDVAL 0x4 /* Slave Transmit Data Valid */ -#define nSTDVAL 0x0 #define NAK 0x8 /* Not Acknowledge */ -#define nNAK 0x0 #define GEN 0x10 /* General Call Enable */ -#define nGEN 0x0 /* Bit maskes for TWIx_SLAVE_ADDR */ @@ -4055,27 +3150,18 @@ /* Bit maskes for TWIx_SLAVE_STAT */ #define SDIR 0x1 /* Slave Transfer Direction */ -#define nSDIR 0x0 #define GCALL 0x2 /* General Call */ -#define nGCALL 0x0 /* Bit maskes for TWIx_MASTER_CTL */ #define MEN 0x1 /* Master Mode Enable */ -#define nMEN 0x0 #define MDIR 0x4 /* Master Transfer Direction */ -#define nMDIR 0x0 #define FAST 0x8 /* Fast Mode */ -#define nFAST 0x0 #define STOP 0x10 /* Issue Stop Condition */ -#define nSTOP 0x0 #define RSTART 0x20 /* Repeat Start */ -#define nRSTART 0x0 #define DCNT 0x3fc0 /* Data Transfer Count */ #define SDAOVR 0x4000 /* Serial Data Override */ -#define nSDAOVR 0x0 #define SCLOVR 0x8000 /* Serial Clock Override */ -#define nSCLOVR 0x0 /* Bit maskes for TWIx_MASTER_ADDR */ @@ -4084,34 +3170,21 @@ /* Bit maskes for TWIx_MASTER_STAT */ #define MPROG 0x1 /* Master Transfer in Progress */ -#define nMPROG 0x0 #define LOSTARB 0x2 /* Lost Arbitration */ -#define nLOSTARB 0x0 #define ANAK 0x4 /* Address Not Acknowledged */ -#define nANAK 0x0 #define DNAK 0x8 /* Data Not Acknowledged */ -#define nDNAK 0x0 #define BUFRDERR 0x10 /* Buffer Read Error */ -#define nBUFRDERR 0x0 #define BUFWRERR 0x20 /* Buffer Write Error */ -#define nBUFWRERR 0x0 #define SDASEN 0x40 /* Serial Data Sense */ -#define nSDASEN 0x0 #define SCLSEN 0x80 /* Serial Clock Sense */ -#define nSCLSEN 0x0 #define BUSBUSY 0x100 /* Bus Busy */ -#define nBUSBUSY 0x0 /* Bit maskes for TWIx_FIFO_CTL */ #define XMTFLUSH 0x1 /* Transmit Buffer Flush */ -#define nXMTFLUSH 0x0 #define RCVFLUSH 0x2 /* Receive Buffer Flush */ -#define nRCVFLUSH 0x0 #define XMTINTLEN 0x4 /* Transmit Buffer Interrupt Length */ -#define nXMTINTLEN 0x0 #define RCVINTLEN 0x8 /* Receive Buffer Interrupt Length */ -#define nRCVINTLEN 0x0 /* Bit maskes for TWIx_FIFO_STAT */ @@ -4121,40 +3194,24 @@ /* Bit maskes for TWIx_INT_MASK */ #define SINITM 0x1 /* Slave Transfer Initiated Interrupt Mask */ -#define nSINITM 0x0 #define SCOMPM 0x2 /* Slave Transfer Complete Interrupt Mask */ -#define nSCOMPM 0x0 #define SERRM 0x4 /* Slave Transfer Error Interrupt Mask */ -#define nSERRM 0x0 #define SOVFM 0x8 /* Slave Overflow Interrupt Mask */ -#define nSOVFM 0x0 #define MCOMPM 0x10 /* Master Transfer Complete Interrupt Mask */ -#define nMCOMPM 0x0 #define MERRM 0x20 /* Master Transfer Error Interrupt Mask */ -#define nMERRM 0x0 #define XMTSERVM 0x40 /* Transmit FIFO Service Interrupt Mask */ -#define nXMTSERVM 0x0 #define RCVSERVM 0x80 /* Receive FIFO Service Interrupt Mask */ -#define nRCVSERVM 0x0 /* Bit maskes for TWIx_INT_STAT */ #define SINIT 0x1 /* Slave Transfer Initiated */ -#define nSINIT 0x0 #define SCOMP 0x2 /* Slave Transfer Complete */ -#define nSCOMP 0x0 #define SERR 0x4 /* Slave Transfer Error */ -#define nSERR 0x0 #define SOVF 0x8 /* Slave Overflow */ -#define nSOVF 0x0 #define MCOMP 0x10 /* Master Transfer Complete */ -#define nMCOMP 0x0 #define MERR 0x20 /* Master Transfer Error */ -#define nMERR 0x0 #define XMTSERV 0x40 /* Transmit FIFO Service */ -#define nXMTSERV 0x0 #define RCVSERV 0x80 /* Receive FIFO Service */ -#define nRCVSERV 0x0 /* Bit maskes for TWIx_XMT_DATA8 */ @@ -4175,81 +3232,51 @@ /* Bit masks for SPORTx_TCR1 */ #define TCKFE 0x4000 /* Clock Falling Edge Select */ -#define nTCKFE 0x0 #define LATFS 0x2000 /* Late Transmit Frame Sync */ -#define nLATFS 0x0 #define LTFS 0x1000 /* Low Transmit Frame Sync Select */ -#define nLTFS 0x0 #define DITFS 0x800 /* Data-Independent Transmit Frame Sync Select */ -#define nDITFS 0x0 #define TFSR 0x400 /* Transmit Frame Sync Required Select */ -#define nTFSR 0x0 #define ITFS 0x200 /* Internal Transmit Frame Sync Select */ -#define nITFS 0x0 #define TLSBIT 0x10 /* Transmit Bit Order */ -#define nTLSBIT 0x0 #define TDTYPE 0xc /* Data Formatting Type Select */ #define ITCLK 0x2 /* Internal Transmit Clock Select */ -#define nITCLK 0x0 #define TSPEN 0x1 /* Transmit Enable */ -#define nTSPEN 0x0 /* Bit masks for SPORTx_TCR2 */ #define TRFST 0x400 /* Left/Right Order */ -#define nTRFST 0x0 #define TSFSE 0x200 /* Transmit Stereo Frame Sync Enable */ -#define nTSFSE 0x0 #define TXSE 0x100 /* TxSEC Enable */ -#define nTXSE 0x0 #define SLEN_T 0x1f /* SPORT Word Length */ /* Bit masks for SPORTx_RCR1 */ #define RCKFE 0x4000 /* Clock Falling Edge Select */ -#define nRCKFE 0x0 #define LARFS 0x2000 /* Late Receive Frame Sync */ -#define nLARFS 0x0 #define LRFS 0x1000 /* Low Receive Frame Sync Select */ -#define nLRFS 0x0 #define RFSR 0x400 /* Receive Frame Sync Required Select */ -#define nRFSR 0x0 #define IRFS 0x200 /* Internal Receive Frame Sync Select */ -#define nIRFS 0x0 #define RLSBIT 0x10 /* Receive Bit Order */ -#define nRLSBIT 0x0 #define RDTYPE 0xc /* Data Formatting Type Select */ #define IRCLK 0x2 /* Internal Receive Clock Select */ -#define nIRCLK 0x0 #define RSPEN 0x1 /* Receive Enable */ -#define nRSPEN 0x0 /* Bit masks for SPORTx_RCR2 */ #define RRFST 0x400 /* Left/Right Order */ -#define nRRFST 0x0 #define RSFSE 0x200 /* Receive Stereo Frame Sync Enable */ -#define nRSFSE 0x0 #define RXSE 0x100 /* RxSEC Enable */ -#define nRXSE 0x0 #define SLEN_R 0x1f /* SPORT Word Length */ /* Bit masks for SPORTx_STAT */ #define TXHRE 0x40 /* Transmit Hold Register Empty */ -#define nTXHRE 0x0 #define TOVF 0x20 /* Sticky Transmit Overflow Status */ -#define nTOVF 0x0 #define TUVF 0x10 /* Sticky Transmit Underflow Status */ -#define nTUVF 0x0 #define TXF 0x8 /* Transmit FIFO Full Status */ -#define nTXF 0x0 #define ROVF 0x4 /* Sticky Receive Overflow Status */ -#define nROVF 0x0 #define RUVF 0x2 /* Sticky Receive Underflow Status */ -#define nRUVF 0x0 #define RXNE 0x1 /* Receive FIFO Not Empty Status */ -#define nRXNE 0x0 /* Bit masks for SPORTx_MCMC1 */ @@ -4260,13 +3287,9 @@ #define MFD 0xf000 /* Multi channel Frame Delay */ #define FSDR 0x80 /* Frame Sync to Data Relationship */ -#define nFSDR 0x0 #define MCMEM 0x10 /* Multi channel Frame Mode Enable */ -#define nMCMEM 0x0 #define MCDRXPE 0x8 /* Multi channel DMA Receive Packing */ -#define nMCDRXPE 0x0 #define MCDTXPE 0x4 /* Multi channel DMA Transmit Packing */ -#define nMCDTXPE 0x0 #define MCCRM 0x3 /* 2X Clock Recovery Mode */ /* Bit masks for SPORTx_CHNL */ @@ -4280,115 +3303,59 @@ #define WLS 0x3 /* Word Length Select */ #endif #define STB 0x4 /* Stop Bits */ -#define nSTB 0x0 #define PEN 0x8 /* Parity Enable */ -#define nPEN 0x0 #define EPS 0x10 /* Even Parity Select */ -#define nEPS 0x0 #define STP 0x20 /* Sticky Parity */ -#define nSTP 0x0 #define SB 0x40 /* Set Break */ -#define nSB 0x0 /* Bit masks for UARTx_MCR */ #define XOFF 0x1 /* Transmitter Off */ -#define nXOFF 0x0 #define MRTS 0x2 /* Manual Request To Send */ -#define nMRTS 0x0 #define RFIT 0x4 /* Receive FIFO IRQ Threshold */ -#define nRFIT 0x0 #define RFRT 0x8 /* Receive FIFO RTS Threshold */ -#define nRFRT 0x0 #define LOOP_ENA 0x10 /* Loopback Mode Enable */ -#define nLOOP_ENA 0x0 #define FCPOL 0x20 /* Flow Control Pin Polarity */ -#define nFCPOL 0x0 #define ARTS 0x40 /* Automatic Request To Send */ -#define nARTS 0x0 #define ACTS 0x80 /* Automatic Clear To Send */ -#define nACTS 0x0 /* Bit masks for UARTx_LSR */ #define DR 0x1 /* Data Ready */ -#define nDR 0x0 #define OE 0x2 /* Overrun Error */ -#define nOE 0x0 #define PE 0x4 /* Parity Error */ -#define nPE 0x0 #define FE 0x8 /* Framing Error */ -#define nFE 0x0 #define BI 0x10 /* Break Interrupt */ -#define nBI 0x0 #define THRE 0x20 /* THR Empty */ -#define nTHRE 0x0 #define TEMT 0x40 /* Transmitter Empty */ -#define nTEMT 0x0 #define TFI 0x80 /* Transmission Finished Indicator */ -#define nTFI 0x0 /* Bit masks for UARTx_MSR */ #define SCTS 0x1 /* Sticky CTS */ -#define nSCTS 0x0 #define CTS 0x10 /* Clear To Send */ -#define nCTS 0x0 #define RFCS 0x20 /* Receive FIFO Count Status */ -#define nRFCS 0x0 - -/* Bit masks for UARTx_IER_SET */ - -#define ERBFI_S 0x1 /* Enable Receive Buffer Full Interrupt */ -#define nERBFI_S 0x0 -#define ETBEI_S 0x2 /* Enable Transmit Buffer Empty Interrupt */ -#define nETBEI_S 0x0 -#define ELSI_S 0x4 /* Enable Receive Status Interrupt */ -#define nELSI_S 0x0 -#define EDSSI_S 0x8 /* Enable Modem Status Interrupt */ -#define nEDSSI_S 0x0 -#define EDTPTI_S 0x10 /* Enable DMA Transmit PIRQ Interrupt */ -#define nEDTPTI_S 0x0 -#define ETFI_S 0x20 /* Enable Transmission Finished Interrupt */ -#define nETFI_S 0x0 -#define ERFCI_S 0x40 /* Enable Receive FIFO Count Interrupt */ -#define nERFCI_S 0x0 - -/* Bit masks for UARTx_IER_CLEAR */ - -#define ERBFI_C 0x1 /* Enable Receive Buffer Full Interrupt */ -#define nERBFI_C 0x0 -#define ETBEI_C 0x2 /* Enable Transmit Buffer Empty Interrupt */ -#define nETBEI_C 0x0 -#define ELSI_C 0x4 /* Enable Receive Status Interrupt */ -#define nELSI_C 0x0 -#define EDSSI_C 0x8 /* Enable Modem Status Interrupt */ -#define nEDSSI_C 0x0 -#define EDTPTI_C 0x10 /* Enable DMA Transmit PIRQ Interrupt */ -#define nEDTPTI_C 0x0 -#define ETFI_C 0x20 /* Enable Transmission Finished Interrupt */ -#define nETFI_C 0x0 -#define ERFCI_C 0x40 /* Enable Receive FIFO Count Interrupt */ -#define nERFCI_C 0x0 + +/* Bit masks for UARTx_IER_SET & UARTx_IER_CLEAR */ + +#define ERBFI 0x1 /* Enable Receive Buffer Full Interrupt */ +#define ETBEI 0x2 /* Enable Transmit Buffer Empty Interrupt */ +#define ELSI 0x4 /* Enable Receive Status Interrupt */ +#define EDSSI 0x8 /* Enable Modem Status Interrupt */ +#define EDTPTI 0x10 /* Enable DMA Transmit PIRQ Interrupt */ +#define ETFI 0x20 /* Enable Transmission Finished Interrupt */ +#define ERFCI 0x40 /* Enable Receive FIFO Count Interrupt */ /* Bit masks for UARTx_GCTL */ #define UCEN 0x1 /* UART Enable */ -#define nUCEN 0x0 #define IREN 0x2 /* IrDA Mode Enable */ -#define nIREN 0x0 #define TPOLC 0x4 /* IrDA TX Polarity Change */ -#define nTPOLC 0x0 #define RPOLC 0x8 /* IrDA RX Polarity Change */ -#define nRPOLC 0x0 #define FPE 0x10 /* Force Parity Error */ -#define nFPE 0x0 #define FFE 0x20 /* Force Framing Error */ -#define nFFE 0x0 #define EDBO 0x40 /* Enable Divide-by-One */ -#define nEDBO 0x0 #define EGLSI 0x80 /* Enable Global LS Interrupt */ -#define nEGLSI 0x0 /* ******************************************* */ diff --git a/include/asm-blackfin/mach-bf548/dma.h b/include/asm-blackfin/mach-bf548/dma.h index 5a334c813c..fcc8b4c34c 100644 --- a/include/asm-blackfin/mach-bf548/dma.h +++ b/include/asm-blackfin/mach-bf548/dma.h @@ -44,7 +44,6 @@ #define CH_UART1_TX 9 #define CH_ATAPI_RX 10 #define CH_ATAPI_TX 11 - #define CH_EPPI0 12 #define CH_EPPI1 13 #define CH_EPPI2 14 @@ -58,6 +57,17 @@ #define CH_SDH 22 #define CH_SPI2 23 -#define MAX_BLACKFIN_DMA_CHANNEL CH_SPI2 +#define CH_MEM_STREAM0_DEST 24 +#define CH_MEM_STREAM0_SRC 25 +#define CH_MEM_STREAM1_DEST 26 +#define CH_MEM_STREAM1_SRC 27 +#define CH_MEM_STREAM2_DEST 28 +#define CH_MEM_STREAM2_SRC 29 +#define CH_MEM_STREAM3_DEST 30 +#define CH_MEM_STREAM3_SRC 31 + +#define MAX_BLACKFIN_DMA_CHANNEL 32 +extern int channel2irq(unsigned int channel); +extern struct dma_register *base_addr[]; #endif diff --git a/include/asm-blackfin/mach-bf548/gpio.h b/include/asm-blackfin/mach-bf548/gpio.h new file mode 100644 index 0000000000..45289425ce --- /dev/null +++ b/include/asm-blackfin/mach-bf548/gpio.h @@ -0,0 +1,212 @@ +/* + * File: include/asm-blackfin/mach-bf548/gpio.h + * Based on: + * Author: Michael Hennerich (hennerich@blackfin.uclinux.org) + * + * Created: + * Description: + * + * Modified: + * Copyright 2004-2007 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + + + +#define GPIO_PA0 0 +#define GPIO_PA1 1 +#define GPIO_PA2 2 +#define GPIO_PA3 3 +#define GPIO_PA4 4 +#define GPIO_PA5 5 +#define GPIO_PA6 6 +#define GPIO_PA7 7 +#define GPIO_PA8 8 +#define GPIO_PA9 9 +#define GPIO_PA10 10 +#define GPIO_PA11 11 +#define GPIO_PA12 12 +#define GPIO_PA13 13 +#define GPIO_PA14 14 +#define GPIO_PA15 15 +#define GPIO_PB0 16 +#define GPIO_PB1 17 +#define GPIO_PB2 18 +#define GPIO_PB3 19 +#define GPIO_PB4 20 +#define GPIO_PB5 21 +#define GPIO_PB6 22 +#define GPIO_PB7 23 +#define GPIO_PB8 24 +#define GPIO_PB9 25 +#define GPIO_PB10 26 +#define GPIO_PB11 27 +#define GPIO_PB12 28 +#define GPIO_PB13 29 +#define GPIO_PB14 30 +#define GPIO_PB15 31 /* N/A */ +#define GPIO_PC0 32 +#define GPIO_PC1 33 +#define GPIO_PC2 34 +#define GPIO_PC3 35 +#define GPIO_PC4 36 +#define GPIO_PC5 37 +#define GPIO_PC6 38 +#define GPIO_PC7 39 +#define GPIO_PC8 40 +#define GPIO_PC9 41 +#define GPIO_PC10 42 +#define GPIO_PC11 43 +#define GPIO_PC12 44 +#define GPIO_PC13 45 +#define GPIO_PC14 46 /* N/A */ +#define GPIO_PC15 47 /* N/A */ +#define GPIO_PD0 48 +#define GPIO_PD1 49 +#define GPIO_PD2 50 +#define GPIO_PD3 51 +#define GPIO_PD4 52 +#define GPIO_PD5 53 +#define GPIO_PD6 54 +#define GPIO_PD7 55 +#define GPIO_PD8 56 +#define GPIO_PD9 57 +#define GPIO_PD10 58 +#define GPIO_PD11 59 +#define GPIO_PD12 60 +#define GPIO_PD13 61 +#define GPIO_PD14 62 +#define GPIO_PD15 63 +#define GPIO_PE0 64 +#define GPIO_PE1 65 +#define GPIO_PE2 66 +#define GPIO_PE3 67 +#define GPIO_PE4 68 +#define GPIO_PE5 69 +#define GPIO_PE6 70 +#define GPIO_PE7 71 +#define GPIO_PE8 72 +#define GPIO_PE9 73 +#define GPIO_PE10 74 +#define GPIO_PE11 75 +#define GPIO_PE12 76 +#define GPIO_PE13 77 +#define GPIO_PE14 78 +#define GPIO_PE15 79 +#define GPIO_PF0 80 +#define GPIO_PF1 81 +#define GPIO_PF2 82 +#define GPIO_PF3 83 +#define GPIO_PF4 84 +#define GPIO_PF5 85 +#define GPIO_PF6 86 +#define GPIO_PF7 87 +#define GPIO_PF8 88 +#define GPIO_PF9 89 +#define GPIO_PF10 90 +#define GPIO_PF11 91 +#define GPIO_PF12 92 +#define GPIO_PF13 93 +#define GPIO_PF14 94 +#define GPIO_PF15 95 +#define GPIO_PG0 96 +#define GPIO_PG1 97 +#define GPIO_PG2 98 +#define GPIO_PG3 99 +#define GPIO_PG4 100 +#define GPIO_PG5 101 +#define GPIO_PG6 102 +#define GPIO_PG7 103 +#define GPIO_PG8 104 +#define GPIO_PG9 105 +#define GPIO_PG10 106 +#define GPIO_PG11 107 +#define GPIO_PG12 108 +#define GPIO_PG13 109 +#define GPIO_PG14 110 +#define GPIO_PG15 111 +#define GPIO_PH0 112 +#define GPIO_PH1 113 +#define GPIO_PH2 114 +#define GPIO_PH3 115 +#define GPIO_PH4 116 +#define GPIO_PH5 117 +#define GPIO_PH6 118 +#define GPIO_PH7 119 +#define GPIO_PH8 120 +#define GPIO_PH9 121 +#define GPIO_PH10 122 +#define GPIO_PH11 123 +#define GPIO_PH12 124 +#define GPIO_PH13 125 +#define GPIO_PH14 126 /* N/A */ +#define GPIO_PH15 127 /* N/A */ +#define GPIO_PI0 128 +#define GPIO_PI1 129 +#define GPIO_PI2 130 +#define GPIO_PI3 131 +#define GPIO_PI4 132 +#define GPIO_PI5 133 +#define GPIO_PI6 134 +#define GPIO_PI7 135 +#define GPIO_PI8 136 +#define GPIO_PI9 137 +#define GPIO_PI10 138 +#define GPIO_PI11 139 +#define GPIO_PI12 140 +#define GPIO_PI13 141 +#define GPIO_PI14 142 +#define GPIO_PI15 143 +#define GPIO_PJ0 144 +#define GPIO_PJ1 145 +#define GPIO_PJ2 146 +#define GPIO_PJ3 147 +#define GPIO_PJ4 148 +#define GPIO_PJ5 149 +#define GPIO_PJ6 150 +#define GPIO_PJ7 151 +#define GPIO_PJ8 152 +#define GPIO_PJ9 153 +#define GPIO_PJ10 154 +#define GPIO_PJ11 155 +#define GPIO_PJ12 156 +#define GPIO_PJ13 157 +#define GPIO_PJ14 158 +#define GPIO_PJ15 159 + +#define MAX_BLACKFIN_GPIOS 160 + +struct gpio_port_t { + unsigned short port_fer; + unsigned short dummy1; + unsigned short port_data; + unsigned short dummy2; + unsigned short port_set; + unsigned short dummy3; + unsigned short port_clear; + unsigned short dummy4; + unsigned short port_dir_set; + unsigned short dummy5; + unsigned short port_dir_clear; + unsigned short dummy6; + unsigned short port_inen; + unsigned short dummy7; + unsigned int port_mux; +}; + diff --git a/include/asm-blackfin/mach-bf548/irq.h b/include/asm-blackfin/mach-bf548/irq.h index a7f6703ea1..93f5db0f46 100644 --- a/include/asm-blackfin/mach-bf548/irq.h +++ b/include/asm-blackfin/mach-bf548/irq.h @@ -51,7 +51,7 @@ Events (highest priority) EMU 0 (lowest priority) IVG15 32 * */ -#define NR_PERI_INTS 32 +#define NR_PERI_INTS (32 * 3) /* The ABSTRACT IRQ definitions */ /** the first seven of the following are fixed, the rest you change if you need to **/ @@ -92,7 +92,7 @@ Events (highest priority) EMU 0 #define IRQ_DMAC1_ERR BFIN_IRQ(24) /* DMAC1 Status (Error) Interrupt */ #define IRQ_SPORT2_ERR BFIN_IRQ(25) /* SPORT2 Error Interrupt */ #define IRQ_SPORT3_ERR BFIN_IRQ(26) /* SPORT3 Error Interrupt */ -#define IRQ_MXVR BFIN_IRQ(27) /* SPORT3 Error Interrupt */ +#define IRQ_MXVR_DATA BFIN_IRQ(27) /* MXVR Data Interrupt */ #define IRQ_SPI1_ERR BFIN_IRQ(28) /* SPI1 Status (Error) Interrupt */ #define IRQ_SPI2_ERR BFIN_IRQ(29) /* SPI2 Status (Error) Interrupt */ #define IRQ_UART1_ERR BFIN_IRQ(30) /* UART1 Status (Error) Interrupt */ @@ -102,8 +102,8 @@ Events (highest priority) EMU 0 #define IRQ_SPORT2_TX BFIN_IRQ(34) /* SPORT2 TX (DMA19) Interrupt */ #define IRQ_SPORT3_RX BFIN_IRQ(35) /* SPORT3 RX (DMA20) Interrupt */ #define IRQ_SPORT3_TX BFIN_IRQ(36) /* SPORT3 TX (DMA21) Interrupt */ -#define IRQ_EPP1 BFIN_IRQ(37) /* EPP1 (DMA13) Interrupt */ -#define IRQ_EPP2 BFIN_IRQ(38) /* EPP2 (DMA14) Interrupt */ +#define IRQ_EPPI1 BFIN_IRQ(37) /* EPP1 (DMA13) Interrupt */ +#define IRQ_EPPI2 BFIN_IRQ(38) /* EPP2 (DMA14) Interrupt */ #define IRQ_SPI1 BFIN_IRQ(39) /* SPI1 (DMA5) Interrupt */ #define IRQ_SPI2 BFIN_IRQ(40) /* SPI2 (DMA23) Interrupt */ #define IRQ_UART1_RX BFIN_IRQ(41) /* UART1 RX (DMA8) Interrupt */ @@ -143,14 +143,14 @@ Events (highest priority) EMU 0 #define IRQ_USB_INT2 BFIN_IRQ(77) /* USB INT2 Interrupt */ #define IRQ_USB_DMA BFIN_IRQ(78) /* USB DMA Interrupt */ #define IRQ_OPTSEC BFIN_IRQ(79) /* OTPSEC Interrupt */ -#define IRQ_TMR0 BFIN_IRQ(86) /* Timer 0 Interrupt */ -#define IRQ_TMR1 BFIN_IRQ(87) /* Timer 1 Interrupt */ -#define IRQ_TMR2 BFIN_IRQ(88) /* Timer 2 Interrupt */ -#define IRQ_TMR3 BFIN_IRQ(89) /* Timer 3 Interrupt */ -#define IRQ_TMR4 BFIN_IRQ(90) /* Timer 4 Interrupt */ -#define IRQ_TMR5 BFIN_IRQ(91) /* Timer 5 Interrupt */ -#define IRQ_TMR6 BFIN_IRQ(92) /* Timer 6 Interrupt */ -#define IRQ_TMR7 BFIN_IRQ(93) /* Timer 7 Interrupt */ +#define IRQ_TIMER0 BFIN_IRQ(86) /* Timer 0 Interrupt */ +#define IRQ_TIMER1 BFIN_IRQ(87) /* Timer 1 Interrupt */ +#define IRQ_TIMER2 BFIN_IRQ(88) /* Timer 2 Interrupt */ +#define IRQ_TIMER3 BFIN_IRQ(89) /* Timer 3 Interrupt */ +#define IRQ_TIMER4 BFIN_IRQ(90) /* Timer 4 Interrupt */ +#define IRQ_TIMER5 BFIN_IRQ(91) /* Timer 5 Interrupt */ +#define IRQ_TIMER6 BFIN_IRQ(92) /* Timer 6 Interrupt */ +#define IRQ_TIMER7 BFIN_IRQ(93) /* Timer 7 Interrupt */ #define IRQ_PINT2 BFIN_IRQ(94) /* PINT2 Interrupt */ #define IRQ_PINT3 BFIN_IRQ(95) /* PINT3 Interrupt */ @@ -248,9 +248,9 @@ Events (highest priority) EMU 0 #ifdef CONFIG_IRQCHIP_DEMUX_GPIO -#define NR_IRQS (IRQ_PH15+1) +#define NR_IRQS (IRQ_PE15+1) #else -#define NR_IRQS (IRQ_UART1_ERROR+1) +#define NR_IRQS (SYS_IRQS+1) #endif #define IVG7 7 @@ -263,44 +263,116 @@ Events (highest priority) EMU 0 #define IVG14 14 #define IVG15 15 -/* IAR0 BIT FIELDS*/ -#define IRQ_PLL_WAKEUP_POS 0 -#define IRQ_DMA_ERROR_POS 4 -#define IRQ_ERROR_POS 8 -#define IRQ_RTC_POS 12 -#define IRQ_PPI_POS 16 -#define IRQ_SPORT0_RX_POS 20 -#define IRQ_SPORT0_TX_POS 24 -#define IRQ_SPORT1_RX_POS 28 +/* IAR0 BIT FIELDS */ +#define IRQ_PLL_WAKEUP_POS 0 +#define IRQ_DMAC0_ERR_POS 4 +#define IRQ_EPPI0_ERR_POS 8 +#define IRQ_SPORT0_ERR_POS 12 +#define IRQ_SPORT1_ERR_POS 16 +#define IRQ_SPI0_ERR_POS 20 +#define IRQ_UART0_ERR_POS 24 +#define IRQ_RTC_POS 28 -/* IAR1 BIT FIELDS*/ -#define IRQ_SPORT1_TX_POS 0 -#define IRQ_TWI_POS 4 -#define IRQ_SPI_POS 8 -#define IRQ_UART0_RX_POS 12 -#define IRQ_UART0_TX_POS 16 -#define IRQ_UART1_RX_POS 20 -#define IRQ_UART1_TX_POS 24 -#define IRQ_CAN_RX_POS 28 +/* IAR1 BIT FIELDS */ +#define IRQ_EPPI0_POS 0 +#define IRQ_SPORT0_RX_POS 4 +#define IRQ_SPORT0_TX_POS 8 +#define IRQ_SPORT1_RX_POS 12 +#define IRQ_SPORT1_TX_POS 16 +#define IRQ_SPI0_POS 20 +#define IRQ_UART0_RX_POS 24 +#define IRQ_UART0_TX_POS 28 -/* IAR2 BIT FIELDS*/ -#define IRQ_CAN_TX_POS 0 -#define IRQ_MAC_RX_POS 4 -#define IRQ_MAC_TX_POS 8 -#define IRQ_TMR0_POS 12 -#define IRQ_TMR1_POS 16 -#define IRQ_TMR2_POS 20 -#define IRQ_TMR3_POS 24 -#define IRQ_TMR4_POS 28 +/* IAR2 BIT FIELDS */ +#define IRQ_TIMER8_POS 0 +#define IRQ_TIMER9_POS 4 +#define IRQ_TIMER10_POS 8 +#define IRQ_PINT0_POS 12 +#define IRQ_PINT1_POS 16 +#define IRQ_MDMAS0_POS 20 +#define IRQ_MDMAS1_POS 24 +#define IRQ_WATCHDOG_POS 28 -/* IAR3 BIT FIELDS*/ -#define IRQ_TMR5_POS 0 -#define IRQ_TMR6_POS 4 -#define IRQ_TMR7_POS 8 -#define IRQ_PROG_INTA_POS 12 -#define IRQ_PORTG_INTB_POS 16 -#define IRQ_MEM_DMA0_POS 20 -#define IRQ_MEM_DMA1_POS 24 -#define IRQ_WATCH_POS 28 +/* IAR3 BIT FIELDS */ +#define IRQ_DMAC1_ERR_POS 0 +#define IRQ_SPORT2_ERR_POS 4 +#define IRQ_SPORT3_ERR_POS 8 +#define IRQ_MXVR_DATA_POS 12 +#define IRQ_SPI1_ERR_POS 16 +#define IRQ_SPI2_ERR_POS 20 +#define IRQ_UART1_ERR_POS 24 +#define IRQ_UART2_ERR_POS 28 -#endif /* _BF537_IRQ_H_ */ +/* IAR4 BIT FILEDS */ +#define IRQ_CAN0_ERR_POS 0 +#define IRQ_SPORT2_RX_POS 4 +#define IRQ_SPORT2_TX_POS 8 +#define IRQ_SPORT3_RX_POS 12 +#define IRQ_SPORT3_TX_POS 16 +#define IRQ_EPPI1_POS 20 +#define IRQ_EPPI2_POS 24 +#define IRQ_SPI1_POS 28 + +/* IAR5 BIT FIELDS */ +#define IRQ_SPI2_POS 0 +#define IRQ_UART1_RX_POS 4 +#define IRQ_UART1_TX_POS 8 +#define IRQ_ATAPI_RX_POS 12 +#define IRQ_ATAPI_TX_POS 16 +#define IRQ_TWI0_POS 20 +#define IRQ_TWI1_POS 24 +#define IRQ_CAN0_RX_POS 28 + +/* IAR6 BIT FIELDS */ +#define IRQ_CAN0_TX_POS 0 +#define IRQ_MDMAS2_POS 4 +#define IRQ_MDMAS3_POS 8 +#define IRQ_MXVR_ERR_POS 12 +#define IRQ_MXVR_MSG_POS 16 +#define IRQ_MXVR_PKT_POS 20 +#define IRQ_EPPI1_ERR_POS 24 +#define IRQ_EPPI2_ERR_POS 28 + +/* IAR7 BIT FIELDS */ +#define IRQ_UART3_ERR_POS 0 +#define IRQ_HOST_ERR_POS 4 +#define IRQ_PIXC_ERR_POS 12 +#define IRQ_NFC_ERR_POS 16 +#define IRQ_ATAPI_ERR_POS 20 +#define IRQ_CAN1_ERR_POS 24 +#define IRQ_HS_DMA_ERR_POS 28 + +/* IAR8 BIT FIELDS */ +#define IRQ_PIXC_IN0_POS 0 +#define IRQ_PIXC_IN1_POS 4 +#define IRQ_PIXC_OUT_POS 8 +#define IRQ_SDH_POS 12 +#define IRQ_CNT_POS 16 +#define IRQ_KEY_POS 20 +#define IRQ_CAN1_RX_POS 24 +#define IRQ_CAN1_TX_POS 28 + +/* IAR9 BIT FIELDS */ +#define IRQ_SDH_MASK0_POS 0 +#define IRQ_SDH_MASK1_POS 4 +#define IRQ_USB_INT0_POS 12 +#define IRQ_USB_INT1_POS 16 +#define IRQ_USB_INT2_POS 20 +#define IRQ_USB_DMA_POS 24 +#define IRQ_OTPSEC_POS 28 + +/* IAR10 BIT FIELDS */ +#define IRQ_TIMER0_POS 24 +#define IRQ_TIMER1_POS 28 + +/* IAR11 BIT FIELDS */ +#define IRQ_TIMER2_POS 0 +#define IRQ_TIMER3_POS 4 +#define IRQ_TIMER4_POS 8 +#define IRQ_TIMER5_POS 12 +#define IRQ_TIMER6_POS 16 +#define IRQ_TIMER7_POS 20 +#define IRQ_PINT2_POS 24 +#define IRQ_PINT3_POS 28 + +#endif /* _BF548_IRQ_H_ */ diff --git a/include/asm-blackfin/mach-bf561/dma.h b/include/asm-blackfin/mach-bf561/dma.h index 21d982003e..766334b7d8 100644 --- a/include/asm-blackfin/mach-bf561/dma.h +++ b/include/asm-blackfin/mach-bf561/dma.h @@ -32,4 +32,7 @@ #define CH_IMEM_STREAM1_SRC 34 #define CH_IMEM_STREAM1_DEST 35 +extern int channel2irq(unsigned int channel); +extern struct dma_register *base_addr[]; + #endif -- cgit v1.2.2 From 7adfb58fbd0a27469d26536f99b66391c4c8e2a0 Mon Sep 17 00:00:00 2001 From: Bernd Schmidt Date: Thu, 21 Jun 2007 11:34:16 +0800 Subject: Blackfin arch: defines and provides entry points for certain user space functions at fixed addresses This patch defines (and provides) entry points for certain user space functions at fixed addresses. The Blackfin has no usable atomic instructions, but we can ensure that these code sequences appear atomic from a user space point of view by detecting when we're in the process of executing them during the interrupt handler return path. This allows much more efficient pthread lock implementations than the bfin_spinlock syscall we're currently using. Also provided is a small sys_rt_sigreturn stub which can be used by the signal handler setup code. The signal.c part will be committed separately. Signed-off-by: Bernd Schmidt Signed-off-by: Bryan Wu --- include/asm-blackfin/Kbuild | 2 ++ include/asm-blackfin/bfin-global.h | 12 ++++++++++++ include/asm-blackfin/cplbinit.h | 4 ++-- include/asm-blackfin/fixed_code.h | 20 ++++++++++++++++++++ 4 files changed, 36 insertions(+), 2 deletions(-) create mode 100644 include/asm-blackfin/fixed_code.h (limited to 'include') diff --git a/include/asm-blackfin/Kbuild b/include/asm-blackfin/Kbuild index c68e1680da..71f8fe7832 100644 --- a/include/asm-blackfin/Kbuild +++ b/include/asm-blackfin/Kbuild @@ -1 +1,3 @@ include include/asm-generic/Kbuild.asm + +header-y += fixed_code.h diff --git a/include/asm-blackfin/bfin-global.h b/include/asm-blackfin/bfin-global.h index 57f37ccdcd..c4d6cbbf96 100644 --- a/include/asm-blackfin/bfin-global.h +++ b/include/asm-blackfin/bfin-global.h @@ -67,6 +67,18 @@ extern void evt14_softirq(void); extern asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs); extern void bfin_gpio_interrupt_setup(int irq, int irq_pfx, int type); +extern asmlinkage void finish_atomic_sections (struct pt_regs *regs); +extern char fixed_code_start; +extern char fixed_code_end; +extern int atomic_xchg32(void); +extern int atomic_cas32(void); +extern int atomic_add32(void); +extern int atomic_sub32(void); +extern int atomic_ior32(void); +extern int atomic_and32(void); +extern int atomic_xor32(void); +extern void sigreturn_stub(void); + extern void *l1_data_A_sram_alloc(size_t); extern void *l1_data_B_sram_alloc(size_t); extern void *l1_inst_sram_alloc(size_t); diff --git a/include/asm-blackfin/cplbinit.h b/include/asm-blackfin/cplbinit.h index 3bad2d1e6a..e14ea397cd 100644 --- a/include/asm-blackfin/cplbinit.h +++ b/include/asm-blackfin/cplbinit.h @@ -101,8 +101,8 @@ struct s_cplb { static struct cplb_desc cplb_data[] = { { .start = 0, - .end = SIZE_4K, - .psize = SIZE_4K, + .end = SIZE_1K, + .psize = SIZE_1K, .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB, .i_conf = SDRAM_OOPS, .d_conf = SDRAM_OOPS, diff --git a/include/asm-blackfin/fixed_code.h b/include/asm-blackfin/fixed_code.h new file mode 100644 index 0000000000..e6df84ee15 --- /dev/null +++ b/include/asm-blackfin/fixed_code.h @@ -0,0 +1,20 @@ +/* This file defines the fixed addresses where userspace programs can find + atomic code sequences. */ + +#define FIXED_CODE_START 0x400 + +#define SIGRETURN_STUB 0x400 + +#define ATOMIC_SEQS_START 0x410 + +#define ATOMIC_XCHG32 0x410 +#define ATOMIC_CAS32 0x420 +#define ATOMIC_ADD32 0x430 +#define ATOMIC_SUB32 0x440 +#define ATOMIC_IOR32 0x450 +#define ATOMIC_AND32 0x460 +#define ATOMIC_XOR32 0x470 + +#define ATOMIC_SEQS_END 0x480 + +#define FIXED_CODE_END 0x480 -- cgit v1.2.2 From 1c5d2265a82f8d3fa0471a60ca98072b3c53c299 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Thu, 21 Jun 2007 11:34:16 +0800 Subject: Blackfin arch: add missing implementations SIC_IWR crosses several registers SIC_IWR crosses several registers - add missing implementations - make sure SIC_IWR is SET after boot Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf548/cdefBF54x_base.h | 27 +++++++++++++++++++++++- include/asm-blackfin/mach-bf561/cdefBF561.h | 10 ++++++--- 2 files changed, 33 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h index b1338000e2..87f2385ed9 100644 --- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h @@ -32,6 +32,7 @@ #define _CDEF_BF54X_H #include "defBF54x_base.h" +#include /* ************************************************************** */ /* SYSTEM & MMR ADDRESS DEFINITIONS COMMON TO ALL ADSP-BF54x */ @@ -44,7 +45,31 @@ #define bfin_read_PLL_DIV() bfin_read16(PLL_DIV) #define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val) #define bfin_read_VR_CTL() bfin_read16(VR_CTL) -#define bfin_write_VR_CTL(val) bfin_write16(VR_CTL, val) +/* Writing to VR_CTL initiates a PLL relock sequence. */ +static __inline__ void bfin_write_VR_CTL(unsigned int val) +{ + unsigned long flags, iwr0, iwr1, iwr2; + + /* Enable the PLL Wakeup bit in SIC IWR */ + iwr0 = bfin_read32(SIC_IWR0); + iwr1 = bfin_read32(SIC_IWR1); + iwr2 = bfin_read32(SIC_IWR2); + /* Only allow PPL Wakeup) */ + bfin_write32(SIC_IWR0, IWR_ENABLE(0)); + bfin_write32(SIC_IWR1, 0); + bfin_write32(SIC_IWR2, 0); + + bfin_write16(VR_CTL, val); + __builtin_bfin_ssync(); + + local_irq_save(flags); + asm("IDLE;"); + local_irq_restore(flags); + bfin_write32(SIC_IWR0, iwr0); + bfin_write32(SIC_IWR1, iwr1); + bfin_write32(SIC_IWR2, iwr2); + +} #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) #define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT) diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h index b14f872e57..6e8b8168a9 100644 --- a/include/asm-blackfin/mach-bf561/cdefBF561.h +++ b/include/asm-blackfin/mach-bf561/cdefBF561.h @@ -57,12 +57,14 @@ /* Writing to VR_CTL initiates a PLL relock sequence. */ static __inline__ void bfin_write_VR_CTL(unsigned int val) { - unsigned long flags, iwr; + unsigned long flags, iwr0, iwr1; /* Enable the PLL Wakeup bit in SIC IWR */ - iwr = bfin_read32(SICA_IWR0); + iwr0 = bfin_read32(SICA_IWR0); + iwr1 = bfin_read32(SICA_IWR1); /* Only allow PPL Wakeup) */ bfin_write32(SICA_IWR0, IWR_ENABLE(0)); + bfin_write32(SICA_IWR1, 0); bfin_write16(VR_CTL, val); __builtin_bfin_ssync(); @@ -70,7 +72,9 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) local_irq_save(flags); asm("IDLE;"); local_irq_restore(flags); - bfin_write32(SICA_IWR0, iwr); + bfin_write32(SICA_IWR0, iwr0); + bfin_write32(SICA_IWR1, iwr1); + } #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) -- cgit v1.2.2 From 474f1a667d4bd40b6dcacc6870b70f4d2ba4e155 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Fri, 29 Jun 2007 16:35:17 +0800 Subject: Blackfin arch: kgdb specific code Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- include/asm-blackfin/kgdb.h | 183 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 183 insertions(+) create mode 100644 include/asm-blackfin/kgdb.h (limited to 'include') diff --git a/include/asm-blackfin/kgdb.h b/include/asm-blackfin/kgdb.h new file mode 100644 index 0000000000..532bd90520 --- /dev/null +++ b/include/asm-blackfin/kgdb.h @@ -0,0 +1,183 @@ +/* + * File: include/asm-blackfin/kgdb.h + * Based on: + * Author: Sonic Zhang + * + * Created: + * Description: + * + * Rev: $Id: kgdb_bfin_linux-2.6.x.patch 4934 2007-02-13 09:32:11Z sonicz $ + * + * Modified: + * Copyright 2005-2006 Analog Devices Inc. + * + * Bugs: Enter bugs at http://blackfin.uclinux.org/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see the file COPYING, or write + * to the Free Software Foundation, Inc., + * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef __ASM_BLACKFIN_KGDB_H__ +#define __ASM_BLACKFIN_KGDB_H__ + +#include + +/* gdb locks */ +#define KGDB_MAX_NO_CPUS 8 + +/************************************************************************/ +/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/ +/* at least NUMREGBYTES*2 are needed for register packets */ +/* Longer buffer is needed to list all threads */ +#define BUFMAX 2048 + +/* + * Note that this register image is different from + * the register image that Linux produces at interrupt time. + * + * Linux's register image is defined by struct pt_regs in ptrace.h. + */ +enum regnames { + /* Core Registers */ + BFIN_R0 = 0, + BFIN_R1, + BFIN_R2, + BFIN_R3, + BFIN_R4, + BFIN_R5, + BFIN_R6, + BFIN_R7, + BFIN_P0, + BFIN_P1, + BFIN_P2, + BFIN_P3, + BFIN_P4, + BFIN_P5, + BFIN_SP, + BFIN_FP, + BFIN_I0, + BFIN_I1, + BFIN_I2, + BFIN_I3, + BFIN_M0, + BFIN_M1, + BFIN_M2, + BFIN_M3, + BFIN_B0, + BFIN_B1, + BFIN_B2, + BFIN_B3, + BFIN_L0, + BFIN_L1, + BFIN_L2, + BFIN_L3, + BFIN_A0_DOT_X, + BFIN_A0_DOT_W, + BFIN_A1_DOT_X, + BFIN_A1_DOT_W, + BFIN_ASTAT, + BFIN_RETS, + BFIN_LC0, + BFIN_LT0, + BFIN_LB0, + BFIN_LC1, + BFIN_LT1, + BFIN_LB1, + BFIN_CYCLES, + BFIN_CYCLES2, + BFIN_USP, + BFIN_SEQSTAT, + BFIN_SYSCFG, + BFIN_RETI, + BFIN_RETX, + BFIN_RETN, + BFIN_RETE, + + /* Pseudo Registers */ + BFIN_PC, + BFIN_CC, + BFIN_EXTRA1, /* Address of .text section. */ + BFIN_EXTRA2, /* Address of .data section. */ + BFIN_EXTRA3, /* Address of .bss section. */ + BFIN_FDPIC_EXEC, + BFIN_FDPIC_INTERP, + + /* MMRs */ + BFIN_IPEND, + + /* LAST ENTRY SHOULD NOT BE CHANGED. */ + BFIN_NUM_REGS /* The number of all registers. */ +}; + +/* Number of bytes of registers. */ +#define NUMREGBYTES BFIN_NUM_REGS*4 + +#define BREAKPOINT() asm(" EXCPT 2;"); +#define BREAK_INSTR_SIZE 2 +#define HW_BREAKPOINT_NUM 6 + +/* Instruction watchpoint address control register bits mask */ +#define WPPWR 0x1 +#define WPIREN01 0x2 +#define WPIRINV01 0x4 +#define WPIAEN0 0x8 +#define WPIAEN1 0x10 +#define WPICNTEN0 0x20 +#define WPICNTEN1 0x40 +#define EMUSW0 0x80 +#define EMUSW1 0x100 +#define WPIREN23 0x200 +#define WPIRINV23 0x400 +#define WPIAEN2 0x800 +#define WPIAEN3 0x1000 +#define WPICNTEN2 0x2000 +#define WPICNTEN3 0x4000 +#define EMUSW2 0x8000 +#define EMUSW3 0x10000 +#define WPIREN45 0x20000 +#define WPIRINV45 0x40000 +#define WPIAEN4 0x80000 +#define WPIAEN5 0x100000 +#define WPICNTEN4 0x200000 +#define WPICNTEN5 0x400000 +#define EMUSW4 0x800000 +#define EMUSW5 0x1000000 +#define WPAND 0x2000000 + +/* Data watchpoint address control register bits mask */ +#define WPDREN01 0x1 +#define WPDRINV01 0x2 +#define WPDAEN0 0x4 +#define WPDAEN1 0x8 +#define WPDCNTEN0 0x10 +#define WPDCNTEN1 0x20 +#define WPDSRC0 0xc0 +#define WPDACC0 0x300 +#define WPDSRC1 0xc00 +#define WPDACC1 0x3000 + +/* Watchpoint status register bits mask */ +#define STATIA0 0x1 +#define STATIA1 0x2 +#define STATIA2 0x4 +#define STATIA3 0x8 +#define STATIA4 0x10 +#define STATIA5 0x20 +#define STATDA0 0x40 +#define STATDA1 0x80 + +extern void kgdb_print(const char *fmt, ...); + +#endif -- cgit v1.2.2 From 29440a2b4cd37e32dfe0fa60ef1665775b24dab1 Mon Sep 17 00:00:00 2001 From: Bernd Schmidt Date: Thu, 12 Jul 2007 16:25:29 +0800 Subject: Blackfin arch: Start untangling the CPLB handling code. - Move cache initialization to C from assembly. - Move anomaly workaround for writing [ID]MEM_CONTROL to assembly, so that we don't have to mess around with .align directives in C source. - Fix a bug where bfin_write_DMEM_CONTROL would write to IMEM_CONTROL - Break out CPLB related code from kernel/setup.c into their own file. - Don't define variables in header files, only declare them. Signed-off-by: Bernd Schmidt Signed-off-by: Bryan Wu --- include/asm-blackfin/cplbinit.h | 133 ++------------------- include/asm-blackfin/mach-common/cdef_LPBlackfin.h | 23 +--- 2 files changed, 15 insertions(+), 141 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/cplbinit.h b/include/asm-blackfin/cplbinit.h index e14ea397cd..bec6ecdf1b 100644 --- a/include/asm-blackfin/cplbinit.h +++ b/include/asm-blackfin/cplbinit.h @@ -57,8 +57,8 @@ struct cplb_tab { u16 size; }; -u_long icplb_table[MAX_CPLBS+1]; -u_long dcplb_table[MAX_CPLBS+1]; +extern u_long icplb_table[MAX_CPLBS+1]; +extern u_long dcplb_table[MAX_CPLBS+1]; /* Till here we are discussing about the static memory management model. * However, the operating envoronments commonly define more CPLB @@ -70,134 +70,27 @@ u_long dcplb_table[MAX_CPLBS+1]; */ #ifdef CONFIG_CPLB_SWITCH_TAB_L1 -u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]__attribute__((l1_data)); -u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]__attribute__((l1_data)); +extern u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]__attribute__((l1_data)); +extern u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]__attribute__((l1_data)); #ifdef CONFIG_CPLB_INFO -u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]__attribute__((l1_data)); -u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]__attribute__((l1_data)); +extern u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]__attribute__((l1_data)); +extern u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]__attribute__((l1_data)); #endif /* CONFIG_CPLB_INFO */ #else -u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]; -u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]; +extern u_long ipdt_table[MAX_SWITCH_I_CPLBS+1]; +extern u_long dpdt_table[MAX_SWITCH_D_CPLBS+1]; #ifdef CONFIG_CPLB_INFO -u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]; -u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]; +extern u_long ipdt_swapcount_table[MAX_SWITCH_I_CPLBS]; +extern u_long dpdt_swapcount_table[MAX_SWITCH_D_CPLBS]; #endif /* CONFIG_CPLB_INFO */ #endif /*CONFIG_CPLB_SWITCH_TAB_L1*/ -struct s_cplb { - struct cplb_tab init_i; - struct cplb_tab init_d; - struct cplb_tab switch_i; - struct cplb_tab switch_d; -}; +extern unsigned long reserved_mem_dcache_on; +extern unsigned long reserved_mem_icache_on; -#if defined(CONFIG_BLKFIN_DCACHE) || defined(CONFIG_BLKFIN_CACHE) -static struct cplb_desc cplb_data[] = { - { - .start = 0, - .end = SIZE_1K, - .psize = SIZE_1K, - .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB, - .i_conf = SDRAM_OOPS, - .d_conf = SDRAM_OOPS, -#if defined(CONFIG_DEBUG_HUNT_FOR_ZERO) - .valid = 1, -#else - .valid = 0, -#endif - .name = "ZERO Pointer Saveguard", - }, - { - .start = L1_CODE_START, - .end = L1_CODE_START + L1_CODE_LENGTH, - .psize = SIZE_4M, - .attr = INITIAL_T | SWITCH_T | I_CPLB, - .i_conf = L1_IMEMORY, - .d_conf = 0, - .valid = 1, - .name = "L1 I-Memory", - }, - { - .start = L1_DATA_A_START, - .end = L1_DATA_B_START + L1_DATA_B_LENGTH, - .psize = SIZE_4M, - .attr = INITIAL_T | SWITCH_T | D_CPLB, - .i_conf = 0, - .d_conf = L1_DMEMORY, -#if ((L1_DATA_A_LENGTH > 0) || (L1_DATA_B_LENGTH > 0)) - .valid = 1, -#else - .valid = 0, -#endif - .name = "L1 D-Memory", - }, - { - .start = 0, - .end = 0, /* dynamic */ - .psize = 0, - .attr = INITIAL_T | SWITCH_T | I_CPLB | D_CPLB, - .i_conf = SDRAM_IGENERIC, - .d_conf = SDRAM_DGENERIC, - .valid = 1, - .name = "SDRAM Kernel", - }, - { - .start = 0, /* dynamic */ - .end = 0, /* dynamic */ - .psize = 0, - .attr = INITIAL_T | SWITCH_T | D_CPLB, - .i_conf = SDRAM_IGENERIC, - .d_conf = SDRAM_DNON_CHBL, - .valid = 1, - .name = "SDRAM RAM MTD", - }, - { - .start = 0, /* dynamic */ - .end = 0, /* dynamic */ - .psize = SIZE_1M, - .attr = INITIAL_T | SWITCH_T | D_CPLB, - .d_conf = SDRAM_DNON_CHBL, - .valid = 1,//(DMA_UNCACHED_REGION > 0), - .name = "SDRAM Uncached DMA ZONE", - }, - { - .start = 0, /* dynamic */ - .end = 0, /* dynamic */ - .psize = 0, - .attr = SWITCH_T | D_CPLB, - .i_conf = 0, /* dynamic */ - .d_conf = 0, /* dynamic */ - .valid = 1, - .name = "SDRAM Reserved Memory", - }, - { - .start = ASYNC_BANK0_BASE, - .end = ASYNC_BANK3_BASE + ASYNC_BANK3_SIZE, - .psize = 0, - .attr = SWITCH_T | D_CPLB, - .d_conf = SDRAM_EBIU, - .valid = 1, - .name = "ASYNC Memory", - }, - { -#if defined(CONFIG_BF561) - .start = L2_SRAM, - .end = L2_SRAM_END, - .psize = SIZE_1M, - .attr = SWITCH_T | D_CPLB, - .i_conf = L2_MEMORY, - .d_conf = L2_MEMORY, - .valid = 1, -#else - .valid = 0, -#endif - .name = "L2 Memory", - } -}; -#endif +extern void generate_cpl_tables(void); diff --git a/include/asm-blackfin/mach-common/cdef_LPBlackfin.h b/include/asm-blackfin/mach-common/cdef_LPBlackfin.h index 58f878947c..94ed381e56 100644 --- a/include/asm-blackfin/mach-common/cdef_LPBlackfin.h +++ b/include/asm-blackfin/mach-common/cdef_LPBlackfin.h @@ -40,16 +40,7 @@ #define bfin_write_SRAM_BASE_ADDRESS(val) bfin_write32(SRAM_BASE_ADDRESS,val) #define bfin_read_DMEM_CONTROL() bfin_read32(DMEM_CONTROL) #ifdef ANOMALY_05000125 -static __inline__ void bfin_write_DMEM_CONTROL(unsigned int val) -{ - unsigned long flags, iwr; - - local_irq_save(flags); - __asm__(".align 8\n"); - bfin_write32(IMEM_CONTROL, val); - __builtin_bfin_ssync(); - local_irq_restore(flags); -} +extern void bfin_write_DMEM_CONTROL(unsigned int val); #else #define bfin_write_DMEM_CONTROL(val) bfin_write32(DMEM_CONTROL,val) #endif @@ -139,17 +130,7 @@ static __inline__ void bfin_write_DMEM_CONTROL(unsigned int val) */ #define bfin_read_IMEM_CONTROL() bfin_read32(IMEM_CONTROL) #ifdef ANOMALY_05000125 -static __inline__ void bfin_write_IMEM_CONTROL(unsigned int val) -{ - unsigned long flags, iwr; - - local_irq_save(flags); - __asm__(".align 8\n"); - bfin_write32(IMEM_CONTROL, val); - __builtin_bfin_ssync(); - local_irq_restore(flags); - -} +extern void bfin_write_IMEM_CONTROL(unsigned int val); #else #define bfin_write_IMEM_CONTROL(val) bfin_write32(IMEM_CONTROL,val) #endif -- cgit v1.2.2 From 669b792c77bbc30e9f4d9c95dbc918dc348c49c2 Mon Sep 17 00:00:00 2001 From: Robin Getz Date: Thu, 21 Jun 2007 16:34:08 +0800 Subject: Blackfin arch: Clean up trace buffer handling, No major functional changes. Turns on trace earlier, so crashes at kernel start should print out a trace, making things easier to debug. Signed-off-by: Robin Getz Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- include/asm-blackfin/trace.h | 52 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) create mode 100644 include/asm-blackfin/trace.h (limited to 'include') diff --git a/include/asm-blackfin/trace.h b/include/asm-blackfin/trace.h new file mode 100644 index 0000000000..9c2474c9a5 --- /dev/null +++ b/include/asm-blackfin/trace.h @@ -0,0 +1,52 @@ +/* + * Common header file for blackfin family of processors. + * + */ + +#ifndef _BLACKFIN_TRACE_ +#define _BLACKFIN_TRACE_ + +#ifndef __ASSEMBLY__ +/* Trace Macros for C files */ + +#define trace_buffer_save(x) \ + do { \ + (x) = bfin_read_TBUFCTL(); \ + bfin_write_TBUFCTL((x) & ~TBUFEN); \ + } while (0) + +#define trace_buffer_restore(x) \ + do { \ + bfin_write_TBUFCTL((x)); \ + } while (0) + +#else +/* Trace Macros for Assembly files */ + +#define TRACE_BUFFER_START(preg, dreg) trace_buffer_start(preg, dreg) +#define TRACE_BUFFER_STOP(preg, dreg) trace_buffer_stop(preg, dreg) + +#define trace_buffer_stop(preg, dreg) \ + preg.L = LO(TBUFCTL); \ + preg.H = HI(TBUFCTL); \ + dreg = 0x1; \ + [preg] = dreg; + +#define trace_buffer_start(preg, dreg) \ + preg.L = LO(TBUFCTL); \ + preg.H = HI(TBUFCTL); \ + dreg = 0x13; \ + [preg] = dreg; + +#ifdef CONFIG_DEBUG_BFIN_NO_KERN_HWTRACE +# define DEBUG_START_HWTRACE(preg, dreg) trace_buffer_start(preg, dreg) +# define DEBUG_STOP_HWTRACE(preg, dreg) trace_buffer_stop(preg, dreg) + +#else +# define DEBUG_START_HWTRACE(preg, dreg) +# define DEBUG_STOP_HWTRACE(preg, dreg) +#endif + +#endif /* __ASSEMBLY__ */ + +#endif /* _BLACKFIN_TRACE_ */ -- cgit v1.2.2 From 35923f12e42a3baf4ac6da7c05cf5f7478e5a7c6 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Mon, 4 Jun 2007 14:47:04 +1000 Subject: [POWERPC] Uninline and export virq_to_hw() Uninline virq_to_hw and export it so modules can use it. The alternative would be to export the irq_map array instead, but it's an infrequently called function, and keeping the array unexported seems considerably cleaner. Signed-off-by: Olof Johansson Signed-off-by: Paul Mackerras --- include/asm-powerpc/irq.h | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h index 4734cc178d..05dd5a3eb3 100644 --- a/include/asm-powerpc/irq.h +++ b/include/asm-powerpc/irq.h @@ -138,10 +138,7 @@ struct irq_map_entry { extern struct irq_map_entry irq_map[NR_IRQS]; -static inline irq_hw_number_t virq_to_hw(unsigned int virq) -{ - return irq_map[virq].hwirq; -} +extern irq_hw_number_t virq_to_hw(unsigned int virq); /** * irq_alloc_host - Allocate a new irq_host data structure -- cgit v1.2.2 From ee51de5645edee4124db6a479d2e135ebe436748 Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Mon, 4 Jun 2007 23:00:00 +1000 Subject: [POWERPC] Add irq_create_direct_mapping() This patch adds irq_create_direct_mapping(). This routine is an alternative to irq_create_mapping(), for irq controllers that can use linux virq numbers directly as hardware numbers. Signed-off-by: Michael Ellerman Acked-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/irq.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h index 05dd5a3eb3..0485c53db2 100644 --- a/include/asm-powerpc/irq.h +++ b/include/asm-powerpc/irq.h @@ -223,6 +223,15 @@ extern void irq_dispose_mapping(unsigned int virq); extern unsigned int irq_find_mapping(struct irq_host *host, irq_hw_number_t hwirq); +/** + * irq_create_direct_mapping - Allocate a virq for direct mapping + * @host: host to allocate the virq for or NULL for default host + * + * This routine is used for irq controllers which can choose the hardware + * interrupt numbers they generate. In such a case it's simplest to use + * the linux virq as the hardware interrupt number. + */ +extern unsigned int irq_create_direct_mapping(struct irq_host *host); /** * irq_radix_revmap - Find a linux virq from a hw irq number. -- cgit v1.2.2 From e3855fa5540617877907ca61c36d28e18d0f2473 Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Mon, 4 Jun 2007 23:00:02 +1000 Subject: [POWERPC] Add for_each_compatible_node() Signed-off-by: Michael Ellerman Acked-by: Benjamin Herrenschmidt Signed-off-by: Paul Mackerras --- include/asm-powerpc/prom.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h index 6845af93ba..1122a9278a 100644 --- a/include/asm-powerpc/prom.h +++ b/include/asm-powerpc/prom.h @@ -124,6 +124,9 @@ extern struct device_node *of_find_node_by_type(struct device_node *from, dn = of_find_node_by_type(dn, type)) extern struct device_node *of_find_compatible_node(struct device_node *from, const char *type, const char *compat); +#define for_each_compatible_node(dn, type, compatible) \ + for (dn = of_find_compatible_node(NULL, type, compatible); dn; \ + dn = of_find_compatible_node(dn, type, compatible)) extern struct device_node *of_find_node_by_path(const char *path); extern struct device_node *of_find_node_by_phandle(phandle handle); extern struct device_node *of_find_all_nodes(struct device_node *prev); -- cgit v1.2.2 From 4cefebb1b497a84d61f2fa29d497df75a84b69d4 Mon Sep 17 00:00:00 2001 From: Michael Neuling Date: Fri, 8 Jun 2007 13:18:50 +1000 Subject: [POWERPC] Fix stolen time for SMT without LPAR For POWERPC, stolen time accounts for cycles lost to the hypervisor or PURR cycles attributed to the other SMT thread. Hence, when a PURR is available, we should still calculate stolen time, irrespective of being virtualised. Signed-off-by: Michael Neuling Signed-off-by: Paul Mackerras --- include/asm-powerpc/time.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h index 3fd57c048f..2d00e13c98 100644 --- a/include/asm-powerpc/time.h +++ b/include/asm-powerpc/time.h @@ -232,7 +232,7 @@ extern void account_process_vtime(struct task_struct *tsk); #define account_process_vtime(tsk) do { } while (0) #endif -#if defined(CONFIG_VIRT_CPU_ACCOUNTING) && defined(CONFIG_PPC_SPLPAR) +#if defined(CONFIG_VIRT_CPU_ACCOUNTING) extern void calculate_steal_time(void); extern void snapshot_timebases(void); #else -- cgit v1.2.2 From b7abc5c53e3c65b8e931bd96db2d08ba670e111a Mon Sep 17 00:00:00 2001 From: "Sachin P. Sant" Date: Thu, 14 Jun 2007 15:31:34 +1000 Subject: [POWERPC] Fix Kexec/Kdump for power6 On Power machines supporting VRMA, Kexec/Kdump does not work. VRMA (virtual real-mode area) means that accesses with IR/DR = 0 (i.e. the MMU "off") actually still go through the hash table, using entries put there by the hypervisor. This means that when we clear out the hash table on kexec, we need to make sure these entries are left untouched. This also adds plpar_pte_read_raw() on the lines of plpar_pte_remove_raw(). Signed-off-by : Sachin Sant Signed-off-by : Mohan Kumar M Acked-by: Benjamin Herrenschmidt Acked-by: Olof Johansson Signed-off-by: Paul Mackerras --- include/asm-powerpc/mmu-hash64.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h index ba32019c51..695962f020 100644 --- a/include/asm-powerpc/mmu-hash64.h +++ b/include/asm-powerpc/mmu-hash64.h @@ -94,6 +94,9 @@ extern char initial_stab[]; #define HPTE_R_C ASM_CONST(0x0000000000000080) #define HPTE_R_R ASM_CONST(0x0000000000000100) +#define HPTE_V_1TB_SEG ASM_CONST(0x4000000000000000) +#define HPTE_V_VRMA_MASK ASM_CONST(0x4001ffffff000000) + /* Values for PP (assumes Ks=0, Kp=1) */ /* pp0 will always be 0 for linux */ #define PP_RWXX 0 /* Supervisor read/write, User none */ -- cgit v1.2.2 From 1322810c14c4b5126e731db2e1764b2e957a9b19 Mon Sep 17 00:00:00 2001 From: Masakazu Mokuno Date: Sat, 16 Jun 2007 07:18:48 +1000 Subject: [POWERPC] PS3: Compare firmware version Add a utility routine ps3_compare_firmware_version() to compare system firmware versions. Uses the existing ps3_get_firmware_version() routine. Signed-off-by: Masakazu Mokuno Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/ps3.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h index 1e04651eed..ac85d729f1 100644 --- a/include/asm-powerpc/ps3.h +++ b/include/asm-powerpc/ps3.h @@ -35,7 +35,8 @@ union ps3_firmware_version { }; }; -int ps3_get_firmware_version(union ps3_firmware_version *v); +void ps3_get_firmware_version(union ps3_firmware_version *v); +int ps3_compare_firmware_version(u16 major, u16 minor, u16 rev); /* 'Other OS' area */ -- cgit v1.2.2 From dc23fba7063867ed745cb6f0bd27a0dc5f558dbc Mon Sep 17 00:00:00 2001 From: Masashi Kimoto Date: Sat, 16 Jun 2007 07:19:10 +1000 Subject: [POWERPC] PS3: Add support for HDMI RGB Full Range mode Add support for HDMI RGB Full Range mode, which is available on system software 1.80 or newer. CC: Masashi Kimoto Signed-off-by: Geert Uytterhoeven Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/ps3av.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/ps3av.h b/include/asm-powerpc/ps3av.h index 9efc40f1c7..7f5948efca 100644 --- a/include/asm-powerpc/ps3av.h +++ b/include/asm-powerpc/ps3av.h @@ -159,6 +159,9 @@ #define PS3AV_CMD_VIDEO_FMT_X8R8G8B8 0x0000 /* video_out_format */ #define PS3AV_CMD_VIDEO_OUT_FORMAT_RGB_12BIT 0x0000 +/* video_cl_cnv */ +#define PS3AV_CMD_VIDEO_CL_CNV_ENABLE_LUT 0x0000 +#define PS3AV_CMD_VIDEO_CL_CNV_DISABLE_LUT 0x0010 /* video_sync */ #define PS3AV_CMD_VIDEO_SYNC_VSYNC 0x0001 #define PS3AV_CMD_VIDEO_SYNC_CSYNC 0x0004 @@ -311,6 +314,8 @@ #define PS3AV_MODE_MASK 0x000F #define PS3AV_MODE_HDCP_OFF 0x1000 /* Retail PS3 product doesn't support this */ #define PS3AV_MODE_DITHER 0x0800 +#define PS3AV_MODE_COLOR 0x0400 +#define PS3AV_MODE_WHITE 0x0200 #define PS3AV_MODE_FULL 0x0080 #define PS3AV_MODE_DVI 0x0040 #define PS3AV_MODE_RGB 0x0020 @@ -529,9 +534,9 @@ struct ps3av_pkt_video_mode { u32 video_out_format; /* in: out format */ u32 video_format; /* in: input frame buffer format */ u8 reserved3; - u8 reserved4; + u8 video_cl_cnv; /* in: color conversion */ u16 video_order; /* in: input RGB order */ - u32 reserved5; + u32 reserved4; }; /* video: format */ @@ -539,7 +544,8 @@ struct ps3av_pkt_video_format { struct ps3av_send_hdr send_hdr; u32 video_head; /* in: head */ u32 video_format; /* in: frame buffer format */ - u16 reserved; + u8 reserved; + u8 video_cl_cnv; /* in: color conversion */ u16 video_order; /* in: input RGB order */ }; -- cgit v1.2.2 From 6bb5cf1025414fe00b20f3bef56135849e4ed3b8 Mon Sep 17 00:00:00 2001 From: Geoff Levand Date: Sat, 16 Jun 2007 07:52:02 +1000 Subject: [POWERPC] PS3: System-bus rework Rework the PS3 system bus to unify device support. - DMA region sizes must be a power of two - storage bus DMA updates: - Small fixes for the PS3 DMA core: o fix alignment bug o kill superfluous test o indentation o spelling o export ps3_dma_region_{create,free}() - ps3_dma_region_init(): o Add `addr' and `len' parameters, so you can create a DMA region that does not cover all memory (use `NULL' and `0' to cover all memory). This is needed because there are not sufficient IOMMU resources to have all DMA regions cover all memory. o Uninline - Added remove and shutdown routines to all drivers. - Added loadable module support to all drivers. - Added HV calls for iopte management (needed by sound driver). Signed-off-by: MOKUNO Masakazu Signed-off-by: Geert Uytterhoeven Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/lv1call.h | 3 + include/asm-powerpc/ps3.h | 148 ++++++++++++++++++++++++++++-------------- 2 files changed, 101 insertions(+), 50 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/lv1call.h b/include/asm-powerpc/lv1call.h index f733beeea6..81713acf75 100644 --- a/include/asm-powerpc/lv1call.h +++ b/include/asm-powerpc/lv1call.h @@ -238,6 +238,7 @@ LV1_CALL(destruct_virtual_address_space, 1, 0, 10 ) LV1_CALL(configure_irq_state_bitmap, 3, 0, 11 ) LV1_CALL(connect_irq_plug_ext, 5, 0, 12 ) LV1_CALL(release_memory, 1, 0, 13 ) +LV1_CALL(put_iopte, 5, 0, 15 ) LV1_CALL(disconnect_irq_plug_ext, 3, 0, 17 ) LV1_CALL(construct_event_receive_port, 0, 1, 18 ) LV1_CALL(destruct_event_receive_port, 1, 0, 19 ) @@ -268,6 +269,8 @@ LV1_CALL(remove_repository_node, 4, 0, 93 ) LV1_CALL(read_htab_entries, 2, 5, 95 ) LV1_CALL(set_dabr, 2, 0, 96 ) LV1_CALL(get_total_execution_time, 2, 1, 103 ) +LV1_CALL(allocate_io_segment, 3, 1, 116 ) +LV1_CALL(release_io_segment, 2, 0, 117 ) LV1_CALL(construct_io_irq_outlet, 1, 1, 120 ) LV1_CALL(destruct_io_irq_outlet, 1, 0, 121 ) LV1_CALL(map_htab, 1, 1, 122 ) diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h index ac85d729f1..4f753907bb 100644 --- a/include/asm-powerpc/ps3.h +++ b/include/asm-powerpc/ps3.h @@ -49,18 +49,6 @@ enum ps3_param_av_multi_out { enum ps3_param_av_multi_out ps3_os_area_get_av_multi_out(void); -/** - * struct ps3_device_id - HV bus device identifier from the system repository - * @bus_id: HV bus id, {1..} (zero invalid) - * @dev_id: HV device id, {0..} - */ - -struct ps3_device_id { - unsigned int bus_id; - unsigned int dev_id; -}; - - /* dma routines */ enum ps3_dma_page_size { @@ -75,6 +63,8 @@ enum ps3_dma_region_type { PS3_DMA_INTERNAL = 2, }; +struct ps3_dma_region_ops; + /** * struct ps3_dma_region - A per device dma state variables structure * @did: The HV device id. @@ -82,21 +72,42 @@ enum ps3_dma_region_type { * @region_type: The HV region type. * @bus_addr: The 'translated' bus address of the region. * @len: The length in bytes of the region. + * @offset: The offset from the start of memory of the region. + * @ioid: The IOID of the device who owns this region * @chunk_list: Opaque variable used by the ioc page manager. + * @region_ops: struct ps3_dma_region_ops - dma region operations */ struct ps3_dma_region { - struct ps3_device_id did; + struct ps3_system_bus_device *dev; + /* device variables */ + const struct ps3_dma_region_ops *region_ops; + unsigned char ioid; enum ps3_dma_page_size page_size; enum ps3_dma_region_type region_type; - unsigned long bus_addr; unsigned long len; + unsigned long offset; + + /* driver variables (set by ps3_dma_region_create) */ + unsigned long bus_addr; struct { spinlock_t lock; struct list_head head; } chunk_list; }; +struct ps3_dma_region_ops { + int (*create)(struct ps3_dma_region *); + int (*free)(struct ps3_dma_region *); + int (*map)(struct ps3_dma_region *, + unsigned long virt_addr, + unsigned long len, + unsigned long *bus_addr, + u64 iopte_pp); + int (*unmap)(struct ps3_dma_region *, + unsigned long bus_addr, + unsigned long len); +}; /** * struct ps3_dma_region_init - Helper to initialize structure variables * @@ -104,18 +115,16 @@ struct ps3_dma_region { * ps3_system_bus_device_register. */ -static inline void ps3_dma_region_init(struct ps3_dma_region *r, - const struct ps3_device_id* did, enum ps3_dma_page_size page_size, - enum ps3_dma_region_type region_type) -{ - r->did = *did; - r->page_size = page_size; - r->region_type = region_type; -} +struct ps3_system_bus_device; + +int ps3_dma_region_init(struct ps3_system_bus_device *dev, + struct ps3_dma_region *r, enum ps3_dma_page_size page_size, + enum ps3_dma_region_type region_type, void *addr, unsigned long len); int ps3_dma_region_create(struct ps3_dma_region *r); int ps3_dma_region_free(struct ps3_dma_region *r); int ps3_dma_map(struct ps3_dma_region *r, unsigned long virt_addr, - unsigned long len, unsigned long *bus_addr); + unsigned long len, unsigned long *bus_addr, + u64 iopte_pp); int ps3_dma_unmap(struct ps3_dma_region *r, unsigned long bus_addr, unsigned long len); @@ -126,6 +135,7 @@ enum ps3_mmio_page_size { PS3_MMIO_64K = 16U }; +struct ps3_mmio_region_ops; /** * struct ps3_mmio_region - a per device mmio state variables structure * @@ -133,13 +143,18 @@ enum ps3_mmio_page_size { */ struct ps3_mmio_region { - struct ps3_device_id did; + struct ps3_system_bus_device *dev; + const struct ps3_mmio_region_ops *mmio_ops; unsigned long bus_addr; unsigned long len; enum ps3_mmio_page_size page_size; unsigned long lpar_addr; }; +struct ps3_mmio_region_ops { + int (*create)(struct ps3_mmio_region *); + int (*free)(struct ps3_mmio_region *); +}; /** * struct ps3_mmio_region_init - Helper to initialize structure variables * @@ -147,15 +162,9 @@ struct ps3_mmio_region { * ps3_system_bus_device_register. */ -static inline void ps3_mmio_region_init(struct ps3_mmio_region *r, - const struct ps3_device_id* did, unsigned long bus_addr, - unsigned long len, enum ps3_mmio_page_size page_size) -{ - r->did = *did; - r->bus_addr = bus_addr; - r->len = len; - r->page_size = page_size; -} +int ps3_mmio_region_init(struct ps3_system_bus_device *dev, + struct ps3_mmio_region *r, unsigned long bus_addr, unsigned long len, + enum ps3_mmio_page_size page_size); int ps3_mmio_region_create(struct ps3_mmio_region *r); int ps3_free_mmio_region(struct ps3_mmio_region *r); unsigned long ps3_mm_phys_to_lpar(unsigned long phys_addr); @@ -188,11 +197,10 @@ int ps3_spe_irq_setup(enum ps3_cpu_binding cpu, unsigned long spe_id, unsigned int class, unsigned int *virq); int ps3_spe_irq_destroy(unsigned int virq); -int ps3_sb_event_receive_port_setup(enum ps3_cpu_binding cpu, - const struct ps3_device_id *did, unsigned int interrupt_id, - unsigned int *virq); -int ps3_sb_event_receive_port_destroy(const struct ps3_device_id *did, - unsigned int interrupt_id, unsigned int virq); +int ps3_sb_event_receive_port_setup(struct ps3_system_bus_device *dev, + enum ps3_cpu_binding cpu, unsigned int *virq); +int ps3_sb_event_receive_port_destroy(struct ps3_system_bus_device *dev, + unsigned int virq); /* lv1 result codes */ @@ -290,11 +298,33 @@ static inline const char* ps3_result(int result) /* system bus routines */ enum ps3_match_id { - PS3_MATCH_ID_EHCI = 1, - PS3_MATCH_ID_OHCI, - PS3_MATCH_ID_GELIC, - PS3_MATCH_ID_AV_SETTINGS, - PS3_MATCH_ID_SYSTEM_MANAGER, + PS3_MATCH_ID_EHCI = 1, + PS3_MATCH_ID_OHCI = 2, + PS3_MATCH_ID_GELIC = 3, + PS3_MATCH_ID_AV_SETTINGS = 4, + PS3_MATCH_ID_SYSTEM_MANAGER = 5, + PS3_MATCH_ID_STOR_DISK = 6, + PS3_MATCH_ID_STOR_ROM = 7, + PS3_MATCH_ID_STOR_FLASH = 8, + PS3_MATCH_ID_SOUND = 9, + PS3_MATCH_ID_GRAPHICS = 10, +}; + +#define PS3_MODULE_ALIAS_EHCI "ps3:1" +#define PS3_MODULE_ALIAS_OHCI "ps3:2" +#define PS3_MODULE_ALIAS_GELIC "ps3:3" +#define PS3_MODULE_ALIAS_AV_SETTINGS "ps3:4" +#define PS3_MODULE_ALIAS_SYSTEM_MANAGER "ps3:5" +#define PS3_MODULE_ALIAS_STOR_DISK "ps3:6" +#define PS3_MODULE_ALIAS_STOR_ROM "ps3:7" +#define PS3_MODULE_ALIAS_STOR_FLASH "ps3:8" +#define PS3_MODULE_ALIAS_SOUND "ps3:9" +#define PS3_MODULE_ALIAS_GRAPHICS "ps3:10" + +enum ps3_system_bus_device_type { + PS3_DEVICE_TYPE_IOC0 = 1, + PS3_DEVICE_TYPE_SB, + PS3_DEVICE_TYPE_VUART, }; /** @@ -303,14 +333,23 @@ enum ps3_match_id { struct ps3_system_bus_device { enum ps3_match_id match_id; - struct ps3_device_id did; - unsigned int interrupt_id; -/* struct iommu_table *iommu_table; -- waiting for Ben's cleanups */ - struct ps3_dma_region *d_region; - struct ps3_mmio_region *m_region; + enum ps3_system_bus_device_type dev_type; + + unsigned int bus_id; /* SB */ + unsigned int dev_id; /* SB */ + unsigned int interrupt_id; /* SB */ + struct ps3_dma_region *d_region; /* SB, IOC0 */ + struct ps3_mmio_region *m_region; /* SB, IOC0*/ + unsigned int port_number; /* VUART */ + +/* struct iommu_table *iommu_table; -- waiting for BenH's cleanups */ struct device core; + void *driver_priv; /* private driver variables */ }; +int ps3_open_hv_device(struct ps3_system_bus_device *dev); +int ps3_close_hv_device(struct ps3_system_bus_device *dev); + /** * struct ps3_system_bus_driver - a driver for a device on the system bus */ @@ -320,6 +359,7 @@ struct ps3_system_bus_driver { struct device_driver core; int (*probe)(struct ps3_system_bus_device *); int (*remove)(struct ps3_system_bus_device *); + int (*shutdown)(struct ps3_system_bus_device *); /* int (*suspend)(struct ps3_system_bus_device *, pm_message_t); */ /* int (*resume)(struct ps3_system_bus_device *); */ }; @@ -327,16 +367,24 @@ struct ps3_system_bus_driver { int ps3_system_bus_device_register(struct ps3_system_bus_device *dev); int ps3_system_bus_driver_register(struct ps3_system_bus_driver *drv); void ps3_system_bus_driver_unregister(struct ps3_system_bus_driver *drv); -static inline struct ps3_system_bus_driver *to_ps3_system_bus_driver( + +static inline struct ps3_system_bus_driver *ps3_drv_to_system_bus_drv( struct device_driver *_drv) { return container_of(_drv, struct ps3_system_bus_driver, core); } -static inline struct ps3_system_bus_device *to_ps3_system_bus_device( +static inline struct ps3_system_bus_device *ps3_dev_to_system_bus_dev( struct device *_dev) { return container_of(_dev, struct ps3_system_bus_device, core); } +static inline struct ps3_system_bus_driver * + ps3_system_bus_dev_to_system_bus_drv(struct ps3_system_bus_device *_dev) +{ + BUG_ON(!_dev); + BUG_ON(!_dev->core.driver); + return ps3_drv_to_system_bus_drv(_dev->core.driver); +} /** * ps3_system_bus_set_drvdata - -- cgit v1.2.2 From 7626e78d29651d3075e88f233c0632867ea6a35c Mon Sep 17 00:00:00 2001 From: Geoff Levand Date: Sat, 16 Jun 2007 08:01:06 +1000 Subject: [POWERPC] PS3: Vuart rework PS3 vuart updates to reflect the new PS3 unified device support. - Move vuart devices to the PS3 system bus. - Replace use of ps3_vuart_port_device with ps3_system_bus_device. - Make the PS3 vuart bus driver a loadable module. - Add remove() and shutdown() routines. - Move ps3_vuart_work into ps3_vuart_port_priv.tx_list. - Remove redundant spinlock ps3_vuart_work.lock. - No longer free ps3_vuart_port_device.priv on shutdown. - Cleanup Kconfig defs. - Export symbols needed for modular port drivers. - Arrange to use port numbers found in repository. - Fix bugs in ps3_vuart_read_async() and polled reading - Cleanup handling of shared interrupt with ps3_vuart_bus_interrupt_get() and ps3_vuart_bus_interrupt_put() - Add more comments to vuart.c. Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/ps3.h | 17 ----------------- 1 file changed, 17 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h index 4f753907bb..433c38eb61 100644 --- a/include/asm-powerpc/ps3.h +++ b/include/asm-powerpc/ps3.h @@ -407,23 +407,6 @@ static inline void *ps3_system_bus_get_driver_data( extern struct bus_type ps3_system_bus_type; -/* vuart routines */ - -struct ps3_vuart_port_priv; - -/** - * struct ps3_vuart_port_device - a device on a vuart port - */ - -struct ps3_vuart_port_device { - enum ps3_match_id match_id; - struct device core; - struct ps3_vuart_port_priv* priv; /* private driver variables */ - -}; - -int ps3_vuart_port_device_register(struct ps3_vuart_port_device *dev); - /* system manager */ #ifdef CONFIG_PS3_SYS_MANAGER -- cgit v1.2.2 From 66c63b84b23d39ce191a18833b5a769370114ec9 Mon Sep 17 00:00:00 2001 From: Geoff Levand Date: Sat, 16 Jun 2007 08:03:54 +1000 Subject: [POWERPC] PS3: System manager re-work PS3 sys-manager updates to reflect the new PS3 unifed device support. Fixups to the PS3 sys-manager driver to properly support sys_reboot(). - Add varable request_tag to struct ps3_sys_manager_header. - Move ctrl_alt_del from PS3_SM_EVENT_POWER_RELEASED to PS3_SM_EVENT_POWER_PRESSED. - Make the PS3 sys-manager driver a loadable module. - Add new file sys-manager-core.c. - Add new struct ps3_sys_manager_ops for dynamic binding. - Put data sent to device on stack. - Add support for PS3_SM_SERVICE_ID_REQUEST_ERROR. Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/ps3.h | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h index 433c38eb61..a35aea2db9 100644 --- a/include/asm-powerpc/ps3.h +++ b/include/asm-powerpc/ps3.h @@ -409,13 +409,15 @@ extern struct bus_type ps3_system_bus_type; /* system manager */ -#ifdef CONFIG_PS3_SYS_MANAGER -void ps3_sys_manager_restart(void); +struct ps3_sys_manager_ops { + struct ps3_system_bus_device *dev; + void (*power_off)(struct ps3_system_bus_device *dev); + void (*restart)(struct ps3_system_bus_device *dev); +}; + +void ps3_sys_manager_register_ops(const struct ps3_sys_manager_ops *ops); void ps3_sys_manager_power_off(void); -#else -static inline void ps3_sys_manager_restart(void) {} -static inline void ps3_sys_manager_power_off(void) {} -#endif +void ps3_sys_manager_restart(void); struct ps3_prealloc { const char *name; @@ -426,4 +428,5 @@ struct ps3_prealloc { extern struct ps3_prealloc ps3fb_videomemory; + #endif -- cgit v1.2.2 From 13a5e30cf7407415387b5592b15ef4b352d28283 Mon Sep 17 00:00:00 2001 From: Geoff Levand Date: Sat, 16 Jun 2007 08:05:01 +1000 Subject: [POWERPC] PS3: Rework AV settings driver Make the PS3 ps3av driver a loadable module. - Replace static data with kmalloc()'ed. o Allocate struct ps3av dynamically, as it contains data used as vuart receive/transmit buffers o Move static recv_buf from ps3av_do_pkt() to struct ps3av - Move ps3av_vuart_{read,write}() from drivers/ps3/ps3av_cmd.c to drivers/ps3/ps3av.c and make them static as they're used in that file only. - Make device a PS3 system-bus device. - Update copyright formatting. - Make two new routines ps3av_register_flip_ctl() and ps3av_flip_ctl() to support late binding of the frame buffer flip control routine. Signed-off-by: Geert Uytterhoeven Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/ps3av.h | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/ps3av.h b/include/asm-powerpc/ps3av.h index 7f5948efca..7df4250802 100644 --- a/include/asm-powerpc/ps3av.h +++ b/include/asm-powerpc/ps3av.h @@ -1,20 +1,23 @@ /* - * Copyright (C) 2006 Sony Computer Entertainment Inc. - * Copyright 2006, 2007 Sony Corporation + * PS3 AV backend support. * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published - * by the Free Software Foundation; version 2 of the License. + * Copyright (C) 2007 Sony Computer Entertainment Inc. + * Copyright 2007 Sony Corp. * - * This program is distributed in the hope that it will be useful, but - * WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ + #ifndef _ASM_POWERPC_PS3AV_H_ #define _ASM_POWERPC_PS3AV_H_ @@ -704,12 +707,6 @@ static inline void ps3av_cmd_av_monitor_info_dump(const struct ps3av_pkt_av_get_ extern int ps3av_cmd_video_get_monitor_info(struct ps3av_pkt_av_get_monitor_info *, u32); -struct ps3_vuart_port_device; -extern int ps3av_vuart_write(struct ps3_vuart_port_device *dev, - const void *buf, unsigned long size); -extern int ps3av_vuart_read(struct ps3_vuart_port_device *dev, void *buf, - unsigned long size, int timeout); - extern int ps3av_set_video_mode(u32, int); extern int ps3av_set_audio_mode(u32, u32, u32, u32, u32); extern int ps3av_get_auto_mode(int); @@ -722,5 +719,8 @@ extern int ps3av_video_mute(int); extern int ps3av_audio_mute(int); extern int ps3av_dev_open(void); extern int ps3av_dev_close(void); +extern void ps3av_register_flip_ctl(void (*flip_ctl)(int on, void *data), + void *flip_data); +extern void ps3av_flip_ctl(int on); #endif /* _ASM_POWERPC_PS3AV_H_ */ -- cgit v1.2.2 From 9e6b99bd4494dadebb189d2db4d1f55ae726b0bb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Sat, 16 Jun 2007 08:05:38 +1000 Subject: [POWERPC] PS3: Frame buffer system-bus rework Convert the ps3fb device from a platform device to a PS3 system bus device. Fix the remove and shutdown methods to support kexec and to make ps3fb a loadable module. Signed-off-by: Geert Uytterhoeven Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/ps3fb.h | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/ps3fb.h b/include/asm-powerpc/ps3fb.h index ad81cf4319..3f121fe401 100644 --- a/include/asm-powerpc/ps3fb.h +++ b/include/asm-powerpc/ps3fb.h @@ -41,16 +41,4 @@ struct ps3fb_ioctl_res { __u32 num_frames; /* num of frame buffers */ }; -#ifdef __KERNEL__ - -#ifdef CONFIG_FB_PS3 -extern void ps3fb_flip_ctl(int on); -extern void ps3fb_cleanup(void); -#else -static inline void ps3fb_flip_ctl(int on) {} -static inline void ps3fb_cleanup(void) {} -#endif - -#endif /* __KERNEL__ */ - #endif /* _ASM_POWERPC_PS3FB_H_ */ -- cgit v1.2.2 From 32d7331852a07d1f94c6d1b817c7c45648aa0fe7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 22 Jun 2007 00:14:20 +1000 Subject: [POWERPC] PS3: Preallocate bootmem memory for the PS3 FLASH ROM storage driver Preallocate 256 KiB of bootmem memory for the PS3 FLASH ROM storage driver. This can be disabled by passing `ps3flash=off' on the kernel command line. Signed-off-by: Geert Uytterhoeven Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/ps3.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h index a35aea2db9..a6f3f5ee7c 100644 --- a/include/asm-powerpc/ps3.h +++ b/include/asm-powerpc/ps3.h @@ -427,6 +427,7 @@ struct ps3_prealloc { }; extern struct ps3_prealloc ps3fb_videomemory; +extern struct ps3_prealloc ps3flash_bounce_buffer; #endif -- cgit v1.2.2 From 80071802cb9c622dbd44bc6ba292f0683891ef44 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 22 Jun 2007 00:14:21 +1000 Subject: [POWERPC] PS3: Storage Driver Core Add storage driver core support for the PS3. PS3 storage devices are a special kind of PS3 system bus device. Signed-off-by: Geert Uytterhoeven Signed-off-by: Geoff Levand Signed-off-by: Paul Mackerras --- include/asm-powerpc/ps3stor.h | 71 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 71 insertions(+) create mode 100644 include/asm-powerpc/ps3stor.h (limited to 'include') diff --git a/include/asm-powerpc/ps3stor.h b/include/asm-powerpc/ps3stor.h new file mode 100644 index 0000000000..6fcaf714fa --- /dev/null +++ b/include/asm-powerpc/ps3stor.h @@ -0,0 +1,71 @@ +/* + * PS3 Storage Devices + * + * Copyright (C) 2007 Sony Computer Entertainment Inc. + * Copyright 2007 Sony Corp. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published + * by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. + */ + +#ifndef _ASM_POWERPC_PS3STOR_H_ +#define _ASM_POWERPC_PS3STOR_H_ + +#include + +#include + + +struct ps3_storage_region { + unsigned int id; + u64 start; + u64 size; +}; + +struct ps3_storage_device { + struct ps3_system_bus_device sbd; + + struct ps3_dma_region dma_region; + unsigned int irq; + u64 blk_size; + + u64 tag; + u64 lv1_status; + struct completion done; + + unsigned long bounce_size; + void *bounce_buf; + u64 bounce_lpar; + dma_addr_t bounce_dma; + + unsigned int num_regions; + unsigned long accessible_regions; + unsigned int region_idx; /* first accessible region */ + struct ps3_storage_region regions[0]; /* Must be last */ +}; + +static inline struct ps3_storage_device *to_ps3_storage_device(struct device *dev) +{ + return container_of(dev, struct ps3_storage_device, sbd.core); +} + +extern int ps3stor_setup(struct ps3_storage_device *dev, + irq_handler_t handler); +extern void ps3stor_teardown(struct ps3_storage_device *dev); +extern u64 ps3stor_read_write_sectors(struct ps3_storage_device *dev, u64 lpar, + u64 start_sector, u64 sectors, + int write); +extern u64 ps3stor_send_command(struct ps3_storage_device *dev, u64 cmd, + u64 arg1, u64 arg2, u64 arg3, u64 arg4); + +#endif /* _ASM_POWERPC_PS3STOR_H_ */ -- cgit v1.2.2 From 71712b455374a73af042fcfb5002fef5fd25ba44 Mon Sep 17 00:00:00 2001 From: Tony Breeds Date: Fri, 22 Jun 2007 16:54:30 +1000 Subject: [POWERPC] Move iSeries_tb_recal into its own late_initcall. Currently iSeries will recalibrate the cputime_factors in the first settimeofday() call. It seems the reason for doing this is to ensure a resaonable time delta after time_init(). On current kernels (with udev), this call is made 40-60 seconds into the boot process, by moving it to a late initcall it is called approximately 5 seconds after time_init() is called. This is sufficient to recalibrate the timebase. Signed-off-by: Tony Breeds CC: Stephen Rothwell Signed-off-by: Paul Mackerras --- include/asm-powerpc/time.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h index 2d00e13c98..d7f5ddfbaa 100644 --- a/include/asm-powerpc/time.h +++ b/include/asm-powerpc/time.h @@ -240,5 +240,7 @@ extern void snapshot_timebases(void); #define snapshot_timebases() do { } while (0) #endif +extern void iSeries_time_init_early(void); + #endif /* __KERNEL__ */ #endif /* __POWERPC_TIME_H */ -- cgit v1.2.2 From ea1a734ad73478dace97e9712101029f536d10a3 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Wed, 27 Jun 2007 16:54:58 +1000 Subject: [POWERPC] Abolish unused ucBoardRev variables asm-powerpc/processor.h declares, and arch/ppc/platforms/prep_setup.c defines variables ucBoardRev, ucBoardRevMaj and ucBoardRevMin which are used nowhere in the current kernel (neither in arch/ppc nor arch/powerpc). This removes them. Signed-off-by: David Gibson Signed-off-by: Paul Mackerras --- include/asm-powerpc/processor.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/processor.h b/include/asm-powerpc/processor.h index d947b16094..e28b108051 100644 --- a/include/asm-powerpc/processor.h +++ b/include/asm-powerpc/processor.h @@ -43,14 +43,6 @@ extern int _chrp_type; /* what kind of prep workstation we are */ extern int _prep_type; -/* - * This is used to identify the board type from a given PReP board - * vendor. Board revision is also made available. This will be moved - * elsewhere soon - */ -extern unsigned char ucBoardRev; -extern unsigned char ucBoardRevMaj, ucBoardRevMin; - #endif /* CONFIG_PPC_PREP */ #endif /* defined(__KERNEL__) && defined(CONFIG_PPC32) */ -- cgit v1.2.2 From 3dfaa762b59743719f00f2dc2f559de59f5502f7 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Mon, 18 Jun 2007 01:06:56 +0200 Subject: [POWERPC] kill isa_{io,mem}_base definitions for !PCI When CONFIG_PCI is disabled, the definitions for isa_io_base, isa_mem_base and pci_dram_offset are entirely unused, but they can result in link failure because they are defined in multiple places. The easiest fix is to just remove all these definitions. Signed-off-by: Arnd Bergmann --- include/asm-powerpc/mpc86xx.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/mpc86xx.h b/include/asm-powerpc/mpc86xx.h index b85df45b1a..15f650f987 100644 --- a/include/asm-powerpc/mpc86xx.h +++ b/include/asm-powerpc/mpc86xx.h @@ -19,12 +19,6 @@ #ifdef CONFIG_PPC_86xx -#define _IO_BASE isa_io_base -#define _ISA_MEM_BASE isa_mem_base -#ifdef CONFIG_PCI -#define PCI_DRAM_OFFSET pci_dram_offset -#endif - #define CPU0_BOOT_RELEASE 0x01000000 #define CPU1_BOOT_RELEASE 0x02000000 #define CPU_ALL_RELEASED (CPU0_BOOT_RELEASE | CPU1_BOOT_RELEASE) -- cgit v1.2.2 From 7d52c7b0cd46f42ae2c9df37f1a385d9aaf95842 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Fri, 22 Jun 2007 00:23:57 -0500 Subject: [POWERPC] Pass the pci_controller into pci_exclude_device There are times that we need to know which controller we are on to decide how to exclude devices properly. We now pass the pci_controller that we are going to use down to the pci_exclude_device function. This will greatly simplify being able to exclude the PHBs in multiple controller setups. Signed-off-by: Kumar Gala --- include/asm-powerpc/machdep.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/machdep.h b/include/asm-powerpc/machdep.h index 6cf1a831f5..71c6e7eb2a 100644 --- a/include/asm-powerpc/machdep.h +++ b/include/asm-powerpc/machdep.h @@ -218,7 +218,7 @@ struct machdep_calls { int (*pcibios_enable_device_hook)(struct pci_dev *, int initial); /* Called in indirect_* to avoid touching devices */ - int (*pci_exclude_device)(unsigned char, unsigned char); + int (*pci_exclude_device)(struct pci_controller *, unsigned char, unsigned char); /* Called at then very end of pcibios_init() */ void (*pcibios_after_init)(void); -- cgit v1.2.2 From 5ab65ecdaffd85753e7ad957622afcd709a39deb Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 25 Jun 2007 13:09:42 -0500 Subject: [POWERPC] Added self_busno to indicate which bus number the PHB is Added self_busno to pci_controller and indirect PCI ops to be set by board code to indicate which bus number to use when talking to the PHB. By default we use zero since the majority of controllers that have implicit mechanisms to talk to the PHBs use a bus number of zero. Signed-off-by: Kumar Gala --- include/asm-ppc/pci-bridge.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 4d35b844bc..2c2abdaad4 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -47,6 +47,7 @@ struct pci_controller { int first_busno; int last_busno; + int self_busno; int bus_offset; void __iomem *io_base_virt; -- cgit v1.2.2 From 0a3786c5f7575c0739ad94057213b931a9423502 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 25 Jun 2007 13:32:48 -0500 Subject: [POWERPC] Removed remnants of bus_offset Removed the remants of bus_offset and use self_busno in the mv64x60 case and use pci_assign_all_buses on 83xx/85xx. 83xx/85xx have multiple PHBs and the firmwares on these devices tend not to handle topologies with P2P bridges well so we let Linux just reassign the bus numbers to match. Signed-off-by: Kumar Gala --- include/asm-ppc/pci-bridge.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 2c2abdaad4..70aab66910 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -48,6 +48,7 @@ struct pci_controller { int first_busno; int last_busno; int self_busno; + /* bus_offset is only used by ARCH=ppc */ int bus_offset; void __iomem *io_base_virt; -- cgit v1.2.2 From ab0f9ad34d1eb31bb13cc4218d7717f8a85b12ed Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 25 Jun 2007 15:19:48 -0500 Subject: [POWERPC] Added indirect_type to handle variants of PCI ops The generic PCI config ops indirect support for ppc32 covers only two cases (implicit vs explicit) type 0/1 config cycles via set_cfg_type. Added a indirect_type bit mask to handle other variants. Added support for PCI-e extended registers and moved the cfg_type handling into the bit mask for ARCH=powerpc. We can also use this to handle indirect quirks. Signed-off-by: Kumar Gala --- include/asm-ppc/pci-bridge.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 70aab66910..0dee56b839 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -65,9 +65,19 @@ struct pci_controller { /* * If set, indirect method will set the cfg_type bit as * needed to generate type 1 configuration transactions. + * use only on ARCH=ppc */ int set_cfg_type; + /* + * Used for variants of PCI indirect handling and possible quirks: + * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 + * EXT_REG - provides access to PCI-e extended registers + */ +#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) +#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) + u32 indirect_type; + /* Currently, we limit ourselves to 1 IO range and 3 mem * ranges since the common pci_bus structure can't handle more */ -- cgit v1.2.2 From 476f5779b77a919f0ced5953de2bf3e0f2d02c07 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 26 Jun 2007 12:12:55 -0500 Subject: [POWERPC] 86xx: Workaround PCI_PRIMARY_BUS usage The Freescale PCI-e controllers have an issue in that they use the PCI_PRIMARY_BUS register in the virtual P2P bridge to determine which bus number to match on when generating a type 0 config cycle. The issue is if we are renumbering bus numbers to match Linux we will try setting the PCI_PRIMARY_BUS and will not know which bus number to use for generating type 0 config cycles. We surpress writing the register in the P2P bridge and always keep it at zero. In the future when proper PCI domain support is working we should be able to remove this. Signed-off-by: Kumar Gala --- include/asm-ppc/pci-bridge.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index 0dee56b839..c09fbf02ef 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -73,9 +73,14 @@ struct pci_controller { * Used for variants of PCI indirect handling and possible quirks: * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 * EXT_REG - provides access to PCI-e extended registers + * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS + * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS + * to determine which bus number to match on when generating type0 + * config cycles */ #define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) #define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) +#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004) u32 indirect_type; /* Currently, we limit ourselves to 1 IO range and 3 mem -- cgit v1.2.2 From 5531e41bf41b5bc34e3cb57af89b58a24fc0dd8d Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 27 Jun 2007 00:16:25 -0500 Subject: [POWERPC] Merge asm-ppc/pci-bridge.h into asm-power/pci-bridge.h Moved bits need for ppc32 from asm-ppc/pci-bridge.h into asm-powerpc/pci-bridge.h. Removed ARCH=powerpc specific bits (and comments related to ARCH=ppc) from asm-ppc/pci-bridge.h as its only used on ARCH=ppc. Signed-off-by: Kumar Gala --- include/asm-powerpc/pci-bridge.h | 138 ++++++++++++++++++++++++++++++++++----- include/asm-ppc/pci-bridge.h | 17 ----- 2 files changed, 120 insertions(+), 35 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index 5261527ed7..b0325931c3 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -3,7 +3,103 @@ #ifdef __KERNEL__ #ifndef CONFIG_PPC64 -#include +#include +#include + +struct device_node; +struct pci_controller; + +/* + * pci_io_base returns the memory address at which you can access + * the I/O space for PCI bus number `bus' (or NULL on error). + */ +extern void __iomem *pci_bus_io_base(unsigned int bus); +extern unsigned long pci_bus_io_base_phys(unsigned int bus); +extern unsigned long pci_bus_mem_base_phys(unsigned int bus); + +/* Allocate a new PCI host bridge structure */ +extern struct pci_controller* pcibios_alloc_controller(void); + +/* Helper function for setting up resources */ +extern void pci_init_resource(struct resource *res, resource_size_t start, + resource_size_t end, int flags, char *name); + +/* Get the PCI host controller for a bus */ +extern struct pci_controller* pci_bus_to_hose(int bus); + +/* + * Structure of a PCI controller (host bridge) + */ +struct pci_controller { + struct pci_bus *bus; + void *arch_data; + int index; /* PCI domain number */ + struct pci_controller *next; + struct device *parent; + + int first_busno; + int last_busno; + int self_busno; + + void __iomem *io_base_virt; + resource_size_t io_base_phys; + + /* Some machines (PReP) have a non 1:1 mapping of + * the PCI memory space in the CPU bus space + */ + resource_size_t pci_mem_offset; + + struct pci_ops *ops; + volatile unsigned int __iomem *cfg_addr; + volatile void __iomem *cfg_data; + + /* + * Used for variants of PCI indirect handling and possible quirks: + * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 + * EXT_REG - provides access to PCI-e extended registers + * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS + * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS + * to determine which bus number to match on when generating type0 + * config cycles + */ +#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) +#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) +#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004) + u32 indirect_type; + + /* Currently, we limit ourselves to 1 IO range and 3 mem + * ranges since the common pci_bus structure can't handle more + */ + struct resource io_resource; + struct resource mem_resources[3]; +}; + +static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) +{ + return bus->sysdata; +} + +/* These are used for config access before all the PCI probing + has been done. */ +int early_read_config_byte(struct pci_controller *hose, int bus, int dev_fn, + int where, u8 *val); +int early_read_config_word(struct pci_controller *hose, int bus, int dev_fn, + int where, u16 *val); +int early_read_config_dword(struct pci_controller *hose, int bus, int dev_fn, + int where, u32 *val); +int early_write_config_byte(struct pci_controller *hose, int bus, int dev_fn, + int where, u8 val); +int early_write_config_word(struct pci_controller *hose, int bus, int dev_fn, + int where, u16 val); +int early_write_config_dword(struct pci_controller *hose, int bus, int dev_fn, + int where, u32 val); + +extern void setup_indirect_pci_nomap(struct pci_controller* hose, + void __iomem *cfg_addr, void __iomem *cfg_data); +extern void setup_indirect_pci(struct pci_controller* hose, + u32 cfg_addr, u32 cfg_data); +extern void setup_grackle(struct pci_controller *hose); + #else #include @@ -49,8 +145,8 @@ struct pci_controller { */ struct resource io_resource; struct resource mem_resources[3]; - int global_number; - int local_number; + int global_number; + int local_number; unsigned long buid; unsigned long dma_window_base_cur; unsigned long dma_window_size; @@ -132,9 +228,6 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus) /** Find the bus corresponding to the indicated device node */ struct pci_bus * pcibios_find_pci_bus(struct device_node *dn); -extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, - struct device_node *dev, int primary); - /** Remove all of the PCI devices under this bus */ void pcibios_remove_pci_devices(struct pci_bus *bus); @@ -152,22 +245,10 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) return PCI_DN(busdn)->phb; } -extern struct pci_controller* -pci_find_hose_for_OF_device(struct device_node* node); - extern struct pci_controller * pcibios_alloc_controller(struct device_node *dev); extern void pcibios_free_controller(struct pci_controller *phb); -#ifdef CONFIG_PCI -extern unsigned long pci_address_to_pio(phys_addr_t address); -#else -static inline unsigned long pci_address_to_pio(phys_addr_t address) -{ - return (unsigned long)-1; -} -#endif - extern void isa_bridge_find_early(struct pci_controller *hose); extern int pcibios_unmap_io_space(struct pci_bus *bus); @@ -185,5 +266,26 @@ extern int pcibios_map_io_space(struct pci_bus *bus); #endif #endif /* CONFIG_PPC64 */ + +/* Get the PCI host controller for an OF device */ +extern struct pci_controller* +pci_find_hose_for_OF_device(struct device_node* node); + +/* Fill up host controller resources from the OF node */ +extern void +pci_process_bridge_OF_ranges(struct pci_controller *hose, + struct device_node *dev, int primary); + +#ifdef CONFIG_PCI +extern unsigned long pci_address_to_pio(phys_addr_t address); +#else +static inline unsigned long pci_address_to_pio(phys_addr_t address) +{ + return (unsigned long)-1; +} +#endif + + + #endif /* __KERNEL__ */ #endif diff --git a/include/asm-ppc/pci-bridge.h b/include/asm-ppc/pci-bridge.h index c09fbf02ef..4d35b844bc 100644 --- a/include/asm-ppc/pci-bridge.h +++ b/include/asm-ppc/pci-bridge.h @@ -47,8 +47,6 @@ struct pci_controller { int first_busno; int last_busno; - int self_busno; - /* bus_offset is only used by ARCH=ppc */ int bus_offset; void __iomem *io_base_virt; @@ -65,24 +63,9 @@ struct pci_controller { /* * If set, indirect method will set the cfg_type bit as * needed to generate type 1 configuration transactions. - * use only on ARCH=ppc */ int set_cfg_type; - /* - * Used for variants of PCI indirect handling and possible quirks: - * SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1 - * EXT_REG - provides access to PCI-e extended registers - * SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS - * on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS - * to determine which bus number to match on when generating type0 - * config cycles - */ -#define PPC_INDIRECT_TYPE_SET_CFG_TYPE (0x00000001) -#define PPC_INDIRECT_TYPE_EXT_REG (0x00000002) -#define PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS (0x00000004) - u32 indirect_type; - /* Currently, we limit ourselves to 1 IO range and 3 mem * ranges since the common pci_bus structure can't handle more */ -- cgit v1.2.2 From bf440b712d289b157c72f19b389b8d918a8c8c5c Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 27 Jun 2007 00:19:08 -0500 Subject: [POWERPC] Remove local_number from pci_controller We never actually read local_number so lets just remove it. Signed-off-by: Kumar Gala --- include/asm-powerpc/pci-bridge.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index b0325931c3..229ead98ed 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -146,7 +146,6 @@ struct pci_controller { struct resource io_resource; struct resource mem_resources[3]; int global_number; - int local_number; unsigned long buid; unsigned long dma_window_base_cur; unsigned long dma_window_size; -- cgit v1.2.2 From 6a506238b33efd93e60c1585d654b37e292183de Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 27 Jun 2007 01:14:04 -0500 Subject: [POWERPC] Removed dead code related to PCI on ppc32 There are no in kernel users of any off these functions and some of them were not even EXPORT_SYMBOL: - pci_bus_io_base() - pci_bus_io_base_phys() - pci_bus_mem_base_phys() - pci_resource_to_bus() - phys_to_bus() - pci_phys_to_bus() - pci_bus_to_phys() - pci_init_resource() - resource_fixup() Signed-off-by: Kumar Gala --- include/asm-powerpc/pci-bridge.h | 12 ------------ 1 file changed, 12 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index 229ead98ed..e2b2b6b7b6 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -9,21 +9,9 @@ struct device_node; struct pci_controller; -/* - * pci_io_base returns the memory address at which you can access - * the I/O space for PCI bus number `bus' (or NULL on error). - */ -extern void __iomem *pci_bus_io_base(unsigned int bus); -extern unsigned long pci_bus_io_base_phys(unsigned int bus); -extern unsigned long pci_bus_mem_base_phys(unsigned int bus); - /* Allocate a new PCI host bridge structure */ extern struct pci_controller* pcibios_alloc_controller(void); -/* Helper function for setting up resources */ -extern void pci_init_resource(struct resource *res, resource_size_t start, - resource_size_t end, int flags, char *name); - /* Get the PCI host controller for a bus */ extern struct pci_controller* pci_bus_to_hose(int bus); -- cgit v1.2.2 From 5516b540e98de6f7474a4e7149470ad6a0bbc54a Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 27 Jun 2007 01:17:57 -0500 Subject: [POWERPC] Use global_number in ppc32 pci_controller Make the pci_controller struct use global_number for the PHB domain number instead of index to match what ppc64 does and reuse its pci_domain_nr code. Introduced a pci-common.c to handle shared code between ppc32 & ppc64. Signed-off-by: Kumar Gala --- include/asm-powerpc/pci-bridge.h | 2 +- include/asm-powerpc/pci.h | 7 ++----- 2 files changed, 3 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index e2b2b6b7b6..80cfb4a750 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -21,7 +21,6 @@ extern struct pci_controller* pci_bus_to_hose(int bus); struct pci_controller { struct pci_bus *bus; void *arch_data; - int index; /* PCI domain number */ struct pci_controller *next; struct device *parent; @@ -60,6 +59,7 @@ struct pci_controller { */ struct resource io_resource; struct resource mem_resources[3]; + int global_number; /* PCI domain number */ }; static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h index 93e3752df6..0cd3e77efd 100644 --- a/include/asm-powerpc/pci.h +++ b/include/asm-powerpc/pci.h @@ -107,8 +107,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, #define get_pci_dma_ops() NULL #endif -extern int pci_domain_nr(struct pci_bus *bus); - /* Decide whether to display the domain number in /proc */ extern int pci_proc_domain(struct pci_bus *bus); @@ -130,9 +128,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, */ #define pci_dac_dma_supported(pci_dev, mask) (0) -/* Return the index of the PCI controller for device PDEV. */ -#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index - /* Set the name of the bus as it appears in /proc/bus/pci */ static inline int pci_proc_domain(struct pci_bus *bus) { @@ -141,6 +136,8 @@ static inline int pci_proc_domain(struct pci_bus *bus) #endif /* CONFIG_PPC64 */ +extern int pci_domain_nr(struct pci_bus *bus); + struct vm_area_struct; /* Map a range of PCI memory or I/O space for a device into user space */ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, -- cgit v1.2.2 From dbf8471f5294b27ba9b6232ffc177dcd4e0a2fa5 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 27 Jun 2007 01:56:50 -0500 Subject: [POWERPC] Merge ppc32 and ppc64 pcibios_alloc_controller() prototypes Make the ppc32 pcibios_alloc_controller take a device node to match the ppc64 prototypes and have it set arch_data. Signed-off-by: Kumar Gala --- include/asm-powerpc/pci-bridge.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index 80cfb4a750..d5a9c9f9ad 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -9,9 +9,6 @@ struct device_node; struct pci_controller; -/* Allocate a new PCI host bridge structure */ -extern struct pci_controller* pcibios_alloc_controller(void); - /* Get the PCI host controller for a bus */ extern struct pci_controller* pci_bus_to_hose(int bus); @@ -232,8 +229,6 @@ static inline struct pci_controller *pci_bus_to_host(struct pci_bus *bus) return PCI_DN(busdn)->phb; } -extern struct pci_controller * -pcibios_alloc_controller(struct device_node *dev); extern void pcibios_free_controller(struct pci_controller *phb); extern void isa_bridge_find_early(struct pci_controller *hose); @@ -263,6 +258,9 @@ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, struct device_node *dev, int primary); +/* Allocate a new PCI host bridge structure */ +extern struct pci_controller * +pcibios_alloc_controller(struct device_node *dev); #ifdef CONFIG_PCI extern unsigned long pci_address_to_pio(phys_addr_t address); #else -- cgit v1.2.2 From 0b1d40c4d4dd8f276d8d9730204b3a0a17ab0d61 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 27 Jun 2007 10:27:33 -0500 Subject: [POWERPC] Move pci_bus_to_hose users to pci_bus_to_host In the places we can move to using pci_bus_to_host, this allows us to make pci_bus_to_host static and remove its export. Signed-off-by: Kumar Gala --- include/asm-powerpc/pci-bridge.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index d5a9c9f9ad..69ea865c01 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -9,9 +9,6 @@ struct device_node; struct pci_controller; -/* Get the PCI host controller for a bus */ -extern struct pci_controller* pci_bus_to_hose(int bus); - /* * Structure of a PCI controller (host bridge) */ -- cgit v1.2.2 From a4c9e328279d55622d56507629d6b8942e8cc9c9 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Wed, 27 Jun 2007 13:09:43 -0500 Subject: [POWERPC] Use ppc64 style list management for pci_controller on ppc32 Use the ppc64 style list management and allocation functions for pci_controllers. This makes the pci_controller structs just a bit more common between ppc32 & ppc64. Signed-off-by: Kumar Gala --- include/asm-powerpc/pci-bridge.h | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/pci-bridge.h b/include/asm-powerpc/pci-bridge.h index 69ea865c01..e72c2a6085 100644 --- a/include/asm-powerpc/pci-bridge.h +++ b/include/asm-powerpc/pci-bridge.h @@ -2,9 +2,11 @@ #define _ASM_POWERPC_PCI_BRIDGE_H #ifdef __KERNEL__ -#ifndef CONFIG_PPC64 -#include #include +#include +#include + +#ifndef CONFIG_PPC64 struct device_node; struct pci_controller; @@ -14,8 +16,9 @@ struct pci_controller; */ struct pci_controller { struct pci_bus *bus; + char is_dynamic; void *arch_data; - struct pci_controller *next; + struct list_head list_node; struct device *parent; int first_busno; @@ -84,8 +87,6 @@ extern void setup_grackle(struct pci_controller *hose); #else -#include -#include /* * This program is free software; you can redistribute it and/or -- cgit v1.2.2 From 34e0fc89bdc1e6f50032dc43ed23167f5dbad6da Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Thu, 12 Jul 2007 16:17:18 +0800 Subject: Blackfin arch: Enable BF54x PIN/GPIO interrupts Signed-off-bu: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/hardirq.h | 4 ++ include/asm-blackfin/mach-bf548/irq.h | 101 ++++++++++++++++++++++++++++++++-- 2 files changed, 100 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/hardirq.h b/include/asm-blackfin/hardirq.h index 0cab0d35ba..b6b19f1b9d 100644 --- a/include/asm-blackfin/hardirq.h +++ b/include/asm-blackfin/hardirq.h @@ -28,7 +28,11 @@ typedef struct { * SOFTIRQ_MASK: 0x00ff0000 */ +#if NR_IRQS > 256 +#define HARDIRQ_BITS 9 +#else #define HARDIRQ_BITS 8 +#endif #ifdef NR_IRQS # if (1 << HARDIRQ_BITS) < NR_IRQS diff --git a/include/asm-blackfin/mach-bf548/irq.h b/include/asm-blackfin/mach-bf548/irq.h index 93f5db0f46..58c87f04e0 100644 --- a/include/asm-blackfin/mach-bf548/irq.h +++ b/include/asm-blackfin/mach-bf548/irq.h @@ -1,6 +1,6 @@ /* * file: include/asm-blackfin/mach-bf548/irq.h - * based on: include/asm-blackfin/mach-bf537/irq.h + * based on: include/asm-blackfin/mach-bf537/irq.h * author: Roy Huang (roy.huang@analog.com) * * created: @@ -190,7 +190,7 @@ Events (highest priority) EMU 0 #define IRQ_PB12 BFIN_PB_IRQ(12) #define IRQ_PB13 BFIN_PB_IRQ(13) #define IRQ_PB14 BFIN_PB_IRQ(14) -#define IRQ_PB15 BFIN_PB_IRQ(15) +#define IRQ_PB15 BFIN_PB_IRQ(15) /* N/A */ #define BFIN_PC_IRQ(x) ((x) + IRQ_PB15 + 1) #define IRQ_PC0 BFIN_PC_IRQ(0) @@ -207,8 +207,8 @@ Events (highest priority) EMU 0 #define IRQ_PC11 BFIN_PC_IRQ(11) #define IRQ_PC12 BFIN_PC_IRQ(12) #define IRQ_PC13 BFIN_PC_IRQ(13) -#define IRQ_PC14 BFIN_PC_IRQ(14) -#define IRQ_PC15 BFIN_PC_IRQ(15) +#define IRQ_PC14 BFIN_PC_IRQ(14) /* N/A */ +#define IRQ_PC15 BFIN_PC_IRQ(15) /* N/A */ #define BFIN_PD_IRQ(x) ((x) + IRQ_PC15 + 1) #define IRQ_PD0 BFIN_PD_IRQ(0) @@ -246,9 +246,100 @@ Events (highest priority) EMU 0 #define IRQ_PE14 BFIN_PE_IRQ(14) #define IRQ_PE15 BFIN_PE_IRQ(15) +#define BFIN_PF_IRQ(x) ((x) + IRQ_PE15 + 1) +#define IRQ_PF0 BFIN_PF_IRQ(0) +#define IRQ_PF1 BFIN_PF_IRQ(1) +#define IRQ_PF2 BFIN_PF_IRQ(2) +#define IRQ_PF3 BFIN_PF_IRQ(3) +#define IRQ_PF4 BFIN_PF_IRQ(4) +#define IRQ_PF5 BFIN_PF_IRQ(5) +#define IRQ_PF6 BFIN_PF_IRQ(6) +#define IRQ_PF7 BFIN_PF_IRQ(7) +#define IRQ_PF8 BFIN_PF_IRQ(8) +#define IRQ_PF9 BFIN_PF_IRQ(9) +#define IRQ_PF10 BFIN_PF_IRQ(10) +#define IRQ_PF11 BFIN_PF_IRQ(11) +#define IRQ_PF12 BFIN_PF_IRQ(12) +#define IRQ_PF13 BFIN_PF_IRQ(13) +#define IRQ_PF14 BFIN_PF_IRQ(14) +#define IRQ_PF15 BFIN_PF_IRQ(15) + +#define BFIN_PG_IRQ(x) ((x) + IRQ_PF15 + 1) +#define IRQ_PG0 BFIN_PG_IRQ(0) +#define IRQ_PG1 BFIN_PG_IRQ(1) +#define IRQ_PG2 BFIN_PG_IRQ(2) +#define IRQ_PG3 BFIN_PG_IRQ(3) +#define IRQ_PG4 BFIN_PG_IRQ(4) +#define IRQ_PG5 BFIN_PG_IRQ(5) +#define IRQ_PG6 BFIN_PG_IRQ(6) +#define IRQ_PG7 BFIN_PG_IRQ(7) +#define IRQ_PG8 BFIN_PG_IRQ(8) +#define IRQ_PG9 BFIN_PG_IRQ(9) +#define IRQ_PG10 BFIN_PG_IRQ(10) +#define IRQ_PG11 BFIN_PG_IRQ(11) +#define IRQ_PG12 BFIN_PG_IRQ(12) +#define IRQ_PG13 BFIN_PG_IRQ(13) +#define IRQ_PG14 BFIN_PG_IRQ(14) +#define IRQ_PG15 BFIN_PG_IRQ(15) + +#define BFIN_PH_IRQ(x) ((x) + IRQ_PG15 + 1) +#define IRQ_PH0 BFIN_PH_IRQ(0) +#define IRQ_PH1 BFIN_PH_IRQ(1) +#define IRQ_PH2 BFIN_PH_IRQ(2) +#define IRQ_PH3 BFIN_PH_IRQ(3) +#define IRQ_PH4 BFIN_PH_IRQ(4) +#define IRQ_PH5 BFIN_PH_IRQ(5) +#define IRQ_PH6 BFIN_PH_IRQ(6) +#define IRQ_PH7 BFIN_PH_IRQ(7) +#define IRQ_PH8 BFIN_PH_IRQ(8) +#define IRQ_PH9 BFIN_PH_IRQ(9) +#define IRQ_PH10 BFIN_PH_IRQ(10) +#define IRQ_PH11 BFIN_PH_IRQ(11) +#define IRQ_PH12 BFIN_PH_IRQ(12) +#define IRQ_PH13 BFIN_PH_IRQ(13) +#define IRQ_PH14 BFIN_PH_IRQ(14) /* N/A */ +#define IRQ_PH15 BFIN_PH_IRQ(15) /* N/A */ + +#define BFIN_PI_IRQ(x) ((x) + IRQ_PH15 + 1) +#define IRQ_PI0 BFIN_PI_IRQ(0) +#define IRQ_PI1 BFIN_PI_IRQ(1) +#define IRQ_PI2 BFIN_PI_IRQ(2) +#define IRQ_PI3 BFIN_PI_IRQ(3) +#define IRQ_PI4 BFIN_PI_IRQ(4) +#define IRQ_PI5 BFIN_PI_IRQ(5) +#define IRQ_PI6 BFIN_PI_IRQ(6) +#define IRQ_PI7 BFIN_PI_IRQ(7) +#define IRQ_PI8 BFIN_PI_IRQ(8) +#define IRQ_PI9 BFIN_PI_IRQ(9) +#define IRQ_PI10 BFIN_PI_IRQ(10) +#define IRQ_PI11 BFIN_PI_IRQ(11) +#define IRQ_PI12 BFIN_PI_IRQ(12) +#define IRQ_PI13 BFIN_PI_IRQ(13) +#define IRQ_PI14 BFIN_PI_IRQ(14) +#define IRQ_PI15 BFIN_PI_IRQ(15) + +#if 0 +#define BFIN_PJ_IRQ(x) ((x) + IRQ_PI15 + 1) +#define IRQ_PJ0 BFIN_PJ_IRQ(0) +#define IRQ_PJ1 BFIN_PJ_IRQ(1) +#define IRQ_PJ2 BFIN_PJ_IRQ(2) +#define IRQ_PJ3 BFIN_PJ_IRQ(3) +#define IRQ_PJ4 BFIN_PJ_IRQ(4) +#define IRQ_PJ5 BFIN_PJ_IRQ(5) +#define IRQ_PJ6 BFIN_PJ_IRQ(6) +#define IRQ_PJ7 BFIN_PJ_IRQ(7) +#define IRQ_PJ8 BFIN_PJ_IRQ(8) +#define IRQ_PJ9 BFIN_PJ_IRQ(9) +#define IRQ_PJ10 BFIN_PJ_IRQ(10) +#define IRQ_PJ11 BFIN_PJ_IRQ(11) +#define IRQ_PJ12 BFIN_PJ_IRQ(12) +#define IRQ_PJ13 BFIN_PJ_IRQ(13) +#define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */ +#define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */ +#endif #ifdef CONFIG_IRQCHIP_DEMUX_GPIO -#define NR_IRQS (IRQ_PE15+1) +#define NR_IRQS (IRQ_PI15+1) #else #define NR_IRQS (SYS_IRQS+1) #endif -- cgit v1.2.2 From cefe658bca9cf1d4af841c45d170ebd0f881889e Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Mon, 2 Jul 2007 11:45:50 +0800 Subject: Blackfin arch: add BF54x missing GPIO access functions Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/gpio.h | 4 +++- include/asm-blackfin/mach-bf548/gpio.h | 4 ++-- 2 files changed, 5 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h index bc0cca0285..e679703f7a 100644 --- a/include/asm-blackfin/gpio.h +++ b/include/asm-blackfin/gpio.h @@ -234,6 +234,7 @@ * MODIFICATION HISTORY : **************************************************************/ +#ifndef BF548_FAMILY void set_gpio_dir(unsigned short, unsigned short); void set_gpio_inen(unsigned short, unsigned short); void set_gpio_polar(unsigned short, unsigned short); @@ -268,7 +269,6 @@ unsigned short get_gpiop_maska(unsigned short); unsigned short get_gpiop_maskb(unsigned short); unsigned short get_gpiop_data(unsigned short); -#ifndef BF548_FAMILY struct gpio_port_t { unsigned short data; unsigned short dummy1; @@ -363,8 +363,10 @@ void gpio_free(unsigned short); void gpio_set_value(unsigned short gpio, unsigned short arg); unsigned short gpio_get_value(unsigned short gpio); +#ifndef BF548_FAMILY #define gpio_get_value(gpio) get_gpio_data(gpio) #define gpio_set_value(gpio, value) set_gpio_data(gpio, value) +#endif void gpio_direction_input(unsigned short gpio); void gpio_direction_output(unsigned short gpio); diff --git a/include/asm-blackfin/mach-bf548/gpio.h b/include/asm-blackfin/mach-bf548/gpio.h index 45289425ce..8c5847a668 100644 --- a/include/asm-blackfin/mach-bf548/gpio.h +++ b/include/asm-blackfin/mach-bf548/gpio.h @@ -187,8 +187,8 @@ #define GPIO_PJ11 155 #define GPIO_PJ12 156 #define GPIO_PJ13 157 -#define GPIO_PJ14 158 -#define GPIO_PJ15 159 +#define GPIO_PJ14 158 /* N/A */ +#define GPIO_PJ15 159 /* N/A */ #define MAX_BLACKFIN_GPIOS 160 -- cgit v1.2.2 From be7031773eded128675de6da778234a935c8d8ea Mon Sep 17 00:00:00 2001 From: Sebastian Siewior Date: Fri, 29 Jun 2007 10:57:50 +1000 Subject: [POWERPC] spufs: Add bit definition Add a bit define from book, and replace one hex number with a symbol, for clarity. Signed-off-by: Sebastian Siewior Signed-off-by: Jeremy Kerr Signed-off-by: Paul Mackerras --- include/asm-powerpc/spu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h index 31d5054be2..5f894b61e2 100644 --- a/include/asm-powerpc/spu.h +++ b/include/asm-powerpc/spu.h @@ -448,6 +448,7 @@ struct spu_priv1 { #define MFC_STATE1_PROBLEM_STATE_MASK 0x08ull #define MFC_STATE1_RELOCATE_MASK 0x10ull #define MFC_STATE1_MASTER_RUN_CONTROL_MASK 0x20ull +#define MFC_STATE1_TABLE_SEARCH_MASK 0x40ull u64 mfc_lpid_RW; /* 0x008 */ u64 spu_idr_RW; /* 0x010 */ u64 mfc_vr_RO; /* 0x018 */ -- cgit v1.2.2 From e9f8a0b65ac716fd7974159240ce34bddea780b3 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Fri, 29 Jun 2007 10:58:03 +1000 Subject: [POWERPC] spufs: Add stat file to spufs Export per-context statistics in spufs. Signed-off-by: Christoph Hellwig Signed-off-by: Arnd Bergmann Signed-off-by: Jeremy Kerr Signed-off-by: Paul Mackerras --- include/asm-powerpc/spu.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h index 5f894b61e2..5957fcdda0 100644 --- a/include/asm-powerpc/spu.h +++ b/include/asm-powerpc/spu.h @@ -156,6 +156,12 @@ struct spu { u64 shadow_int_mask_RW[3]; struct sys_device sysdev; + + struct { + /* protected by interrupt reentrancy */ + unsigned long long slb_flt; + unsigned long long class2_intr; + } stats; }; struct spu *spu_alloc(void); -- cgit v1.2.2 From fe2f896d67b89a409c366c9a69e30291ab124467 Mon Sep 17 00:00:00 2001 From: Christoph Hellwig Date: Fri, 29 Jun 2007 10:58:07 +1000 Subject: [POWERPC] spufs: Add spu stats in sysfs Export spu statistics in sysfs. Signed-off-by: Christoph Hellwig Signed-off-by: Arnd Bergmann Signed-off-by: Jeremy Kerr Signed-off-by: Paul Mackerras --- include/asm-powerpc/spu.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h index 5957fcdda0..eedc828cef 100644 --- a/include/asm-powerpc/spu.h +++ b/include/asm-powerpc/spu.h @@ -106,6 +106,14 @@ struct spu_context; struct spu_runqueue; struct device_node; +enum spu_utilization_state { + SPU_UTIL_SYSTEM, + SPU_UTIL_USER, + SPU_UTIL_IOWAIT, + SPU_UTIL_IDLE, + SPU_UTIL_MAX +}; + struct spu { const char *name; unsigned long local_store_phys; @@ -159,8 +167,17 @@ struct spu { struct { /* protected by interrupt reentrancy */ + enum spu_utilization_state utilization_state; + unsigned long tstamp; /* time of last ctx switch */ + unsigned long times[SPU_UTIL_MAX]; + unsigned long long vol_ctx_switch; + unsigned long long invol_ctx_switch; + unsigned long long min_flt; + unsigned long long maj_flt; + unsigned long long hash_flt; unsigned long long slb_flt; unsigned long long class2_intr; + unsigned long long libassist; } stats; }; -- cgit v1.2.2 From a0a3f6c69b45dcafefdce5dbac2221c02aaae871 Mon Sep 17 00:00:00 2001 From: Bob Moore Date: Tue, 27 Mar 2007 20:25:46 -0400 Subject: ACPICA: Changes for Cygwin compatibility Allow generation of ACPICA apps on Cygwin. Signed-off-by: Bob Moore Signed-off-by: Len Brown --- include/acpi/platform/acenv.h | 2 +- include/acpi/platform/aclinux.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/acpi/platform/acenv.h b/include/acpi/platform/acenv.h index dab2ec59a3..c785485e62 100644 --- a/include/acpi/platform/acenv.h +++ b/include/acpi/platform/acenv.h @@ -136,7 +136,7 @@ /*! [Begin] no source code translation */ -#if defined(__linux__) +#if defined(_LINUX) || defined(__linux__) #include "aclinux.h" #elif defined(_AED_EFI) diff --git a/include/acpi/platform/aclinux.h b/include/acpi/platform/aclinux.h index a568717f98..6ed15a0978 100644 --- a/include/acpi/platform/aclinux.h +++ b/include/acpi/platform/aclinux.h @@ -91,7 +91,10 @@ #define ACPI_USE_NATIVE_DIVIDE #endif +#ifndef __cdecl #define __cdecl +#endif + #define ACPI_FLUSH_CPU_CACHE() #endif /* __KERNEL__ */ -- cgit v1.2.2 From 67f74c9d223815e30eac456b4956a846143b65c6 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Fri, 15 Jun 2007 15:33:09 +1000 Subject: [POWERPC] Split out asm-ppc/mmu.h portions for Freescale Book-E arch/powerpc still relies on asm-ppc/mmu.h for some 32-bit MMU types. This patch is another step towards fixing this. It takes the portions of asm-ppc/mmu.h related to Freescale Book-E which are still relevant in arch/powerpc and puts them in a new asm-powerpc/mmu-fsl-booke.h, included when appropriate from asm-powerpc/mmu.h. Signed-off-by: David Gibson Signed-off-by: Kumar Gala --- include/asm-powerpc/mmu-fsl-booke.h | 88 +++++++++++++++++++++++++++++++++++++ include/asm-powerpc/mmu.h | 3 ++ 2 files changed, 91 insertions(+) create mode 100644 include/asm-powerpc/mmu-fsl-booke.h (limited to 'include') diff --git a/include/asm-powerpc/mmu-fsl-booke.h b/include/asm-powerpc/mmu-fsl-booke.h new file mode 100644 index 0000000000..37580004cd --- /dev/null +++ b/include/asm-powerpc/mmu-fsl-booke.h @@ -0,0 +1,88 @@ +#ifndef _ASM_POWERPC_MMU_FSL_BOOKE_H_ +#define _ASM_POWERPC_MMU_FSL_BOOKE_H_ +/* + * Freescale Book-E MMU support + */ + +/* Book-E defined page sizes */ +#define BOOKE_PAGESZ_1K 0 +#define BOOKE_PAGESZ_4K 1 +#define BOOKE_PAGESZ_16K 2 +#define BOOKE_PAGESZ_64K 3 +#define BOOKE_PAGESZ_256K 4 +#define BOOKE_PAGESZ_1M 5 +#define BOOKE_PAGESZ_4M 6 +#define BOOKE_PAGESZ_16M 7 +#define BOOKE_PAGESZ_64M 8 +#define BOOKE_PAGESZ_256M 9 +#define BOOKE_PAGESZ_1GB 10 +#define BOOKE_PAGESZ_4GB 11 +#define BOOKE_PAGESZ_16GB 12 +#define BOOKE_PAGESZ_64GB 13 +#define BOOKE_PAGESZ_256GB 14 +#define BOOKE_PAGESZ_1TB 15 + +#define MAS0_TLBSEL(x) ((x << 28) & 0x30000000) +#define MAS0_ESEL(x) ((x << 16) & 0x0FFF0000) +#define MAS0_NV(x) ((x) & 0x00000FFF) + +#define MAS1_VALID 0x80000000 +#define MAS1_IPROT 0x40000000 +#define MAS1_TID(x) ((x << 16) & 0x3FFF0000) +#define MAS1_TS 0x00001000 +#define MAS1_TSIZE(x) ((x << 8) & 0x00000F00) + +#define MAS2_EPN 0xFFFFF000 +#define MAS2_X0 0x00000040 +#define MAS2_X1 0x00000020 +#define MAS2_W 0x00000010 +#define MAS2_I 0x00000008 +#define MAS2_M 0x00000004 +#define MAS2_G 0x00000002 +#define MAS2_E 0x00000001 + +#define MAS3_RPN 0xFFFFF000 +#define MAS3_U0 0x00000200 +#define MAS3_U1 0x00000100 +#define MAS3_U2 0x00000080 +#define MAS3_U3 0x00000040 +#define MAS3_UX 0x00000020 +#define MAS3_SX 0x00000010 +#define MAS3_UW 0x00000008 +#define MAS3_SW 0x00000004 +#define MAS3_UR 0x00000002 +#define MAS3_SR 0x00000001 + +#define MAS4_TLBSELD(x) MAS0_TLBSEL(x) +#define MAS4_TIDDSEL 0x000F0000 +#define MAS4_TSIZED(x) MAS1_TSIZE(x) +#define MAS4_X0D 0x00000040 +#define MAS4_X1D 0x00000020 +#define MAS4_WD 0x00000010 +#define MAS4_ID 0x00000008 +#define MAS4_MD 0x00000004 +#define MAS4_GD 0x00000002 +#define MAS4_ED 0x00000001 + +#define MAS6_SPID0 0x3FFF0000 +#define MAS6_SPID1 0x00007FFE +#define MAS6_SAS 0x00000001 +#define MAS6_SPID MAS6_SPID0 + +#define MAS7_RPN 0xFFFFFFFF + +#ifndef __ASSEMBLY__ + +#ifndef CONFIG_PHYS_64BIT +typedef unsigned long phys_addr_t; +#else +typedef unsigned long long phys_addr_t; +#endif + +typedef struct { + unsigned long id; + unsigned long vdso_base; +} mm_context_t; +#endif /* !__ASSEMBLY__ */ + +#endif /* _ASM_POWERPC_MMU_FSL_BOOKE_H_ */ diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h index dae6a71fba..9b7140391c 100644 --- a/include/asm-powerpc/mmu.h +++ b/include/asm-powerpc/mmu.h @@ -11,6 +11,9 @@ #elif defined(CONFIG_44x) /* 44x-style software loaded TLB */ # include +#elif defined(CONFIG_FSL_BOOKE) +/* Freescale Book-E software loaded TLB */ +# include #else /* Other 32-bit. FIXME: split up the other 32-bit MMU types, and * revise for arch/powerpc */ -- cgit v1.2.2 From 3120234551ebf5f6e24a23082334eb3897b5db41 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Fri, 22 Jun 2007 14:58:55 +1000 Subject: [POWERPC] Split out asm-ppc/mmu.h portions for PowerPC 8xx arch/powerpc still relies on asm-ppc/mmu.h for some 32-bit MMU types. This patch is another step towards fixing this. It takes the portions of asm-ppc/mmu.h related to 8xx embedded CPUs which are still relevant in arch/powerpc and puts them in a new asm-powerpc/mmu-8xx.h, included when appropriate from asm-powerpc/mmu.h. Signed-off-by: David Gibson Signed-off-by: Kumar Gala --- include/asm-powerpc/mmu-8xx.h | 147 ++++++++++++++++++++++++++++++++++++++++++ include/asm-powerpc/mmu.h | 7 +- 2 files changed, 150 insertions(+), 4 deletions(-) create mode 100644 include/asm-powerpc/mmu-8xx.h (limited to 'include') diff --git a/include/asm-powerpc/mmu-8xx.h b/include/asm-powerpc/mmu-8xx.h new file mode 100644 index 0000000000..952bd8899f --- /dev/null +++ b/include/asm-powerpc/mmu-8xx.h @@ -0,0 +1,147 @@ +#ifndef _ASM_POWERPC_MMU_8XX_H_ +#define _ASM_POWERPC_MMU_8XX_H_ +/* + * PPC8xx support + */ + +/* Control/status registers for the MPC8xx. + * A write operation to these registers causes serialized access. + * During software tablewalk, the registers used perform mask/shift-add + * operations when written/read. A TLB entry is created when the Mx_RPN + * is written, and the contents of several registers are used to + * create the entry. + */ +#define SPRN_MI_CTR 784 /* Instruction TLB control register */ +#define MI_GPM 0x80000000 /* Set domain manager mode */ +#define MI_PPM 0x40000000 /* Set subpage protection */ +#define MI_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */ +#define MI_RSV4I 0x08000000 /* Reserve 4 TLB entries */ +#define MI_PPCS 0x02000000 /* Use MI_RPN prob/priv state */ +#define MI_IDXMASK 0x00001f00 /* TLB index to be loaded */ +#define MI_RESETVAL 0x00000000 /* Value of register at reset */ + +/* These are the Ks and Kp from the PowerPC books. For proper operation, + * Ks = 0, Kp = 1. + */ +#define SPRN_MI_AP 786 +#define MI_Ks 0x80000000 /* Should not be set */ +#define MI_Kp 0x40000000 /* Should always be set */ + +/* The effective page number register. When read, contains the information + * about the last instruction TLB miss. When MI_RPN is written, bits in + * this register are used to create the TLB entry. + */ +#define SPRN_MI_EPN 787 +#define MI_EPNMASK 0xfffff000 /* Effective page number for entry */ +#define MI_EVALID 0x00000200 /* Entry is valid */ +#define MI_ASIDMASK 0x0000000f /* ASID match value */ + /* Reset value is undefined */ + +/* A "level 1" or "segment" or whatever you want to call it register. + * For the instruction TLB, it contains bits that get loaded into the + * TLB entry when the MI_RPN is written. + */ +#define SPRN_MI_TWC 789 +#define MI_APG 0x000001e0 /* Access protection group (0) */ +#define MI_GUARDED 0x00000010 /* Guarded storage */ +#define MI_PSMASK 0x0000000c /* Mask of page size bits */ +#define MI_PS8MEG 0x0000000c /* 8M page size */ +#define MI_PS512K 0x00000004 /* 512K page size */ +#define MI_PS4K_16K 0x00000000 /* 4K or 16K page size */ +#define MI_SVALID 0x00000001 /* Segment entry is valid */ + /* Reset value is undefined */ + +/* Real page number. Defined by the pte. Writing this register + * causes a TLB entry to be created for the instruction TLB, using + * additional information from the MI_EPN, and MI_TWC registers. + */ +#define SPRN_MI_RPN 790 + +/* Define an RPN value for mapping kernel memory to large virtual + * pages for boot initialization. This has real page number of 0, + * large page size, shared page, cache enabled, and valid. + * Also mark all subpages valid and write access. + */ +#define MI_BOOTINIT 0x000001fd + +#define SPRN_MD_CTR 792 /* Data TLB control register */ +#define MD_GPM 0x80000000 /* Set domain manager mode */ +#define MD_PPM 0x40000000 /* Set subpage protection */ +#define MD_CIDEF 0x20000000 /* Set cache inhibit when MMU dis */ +#define MD_WTDEF 0x10000000 /* Set writethrough when MMU dis */ +#define MD_RSV4I 0x08000000 /* Reserve 4 TLB entries */ +#define MD_TWAM 0x04000000 /* Use 4K page hardware assist */ +#define MD_PPCS 0x02000000 /* Use MI_RPN prob/priv state */ +#define MD_IDXMASK 0x00001f00 /* TLB index to be loaded */ +#define MD_RESETVAL 0x04000000 /* Value of register at reset */ + +#define SPRN_M_CASID 793 /* Address space ID (context) to match */ +#define MC_ASIDMASK 0x0000000f /* Bits used for ASID value */ + + +/* These are the Ks and Kp from the PowerPC books. For proper operation, + * Ks = 0, Kp = 1. + */ +#define SPRN_MD_AP 794 +#define MD_Ks 0x80000000 /* Should not be set */ +#define MD_Kp 0x40000000 /* Should always be set */ + +/* The effective page number register. When read, contains the information + * about the last instruction TLB miss. When MD_RPN is written, bits in + * this register are used to create the TLB entry. + */ +#define SPRN_MD_EPN 795 +#define MD_EPNMASK 0xfffff000 /* Effective page number for entry */ +#define MD_EVALID 0x00000200 /* Entry is valid */ +#define MD_ASIDMASK 0x0000000f /* ASID match value */ + /* Reset value is undefined */ + +/* The pointer to the base address of the first level page table. + * During a software tablewalk, reading this register provides the address + * of the entry associated with MD_EPN. + */ +#define SPRN_M_TWB 796 +#define M_L1TB 0xfffff000 /* Level 1 table base address */ +#define M_L1INDX 0x00000ffc /* Level 1 index, when read */ + /* Reset value is undefined */ + +/* A "level 1" or "segment" or whatever you want to call it register. + * For the data TLB, it contains bits that get loaded into the TLB entry + * when the MD_RPN is written. It is also provides the hardware assist + * for finding the PTE address during software tablewalk. + */ +#define SPRN_MD_TWC 797 +#define MD_L2TB 0xfffff000 /* Level 2 table base address */ +#define MD_L2INDX 0xfffffe00 /* Level 2 index (*pte), when read */ +#define MD_APG 0x000001e0 /* Access protection group (0) */ +#define MD_GUARDED 0x00000010 /* Guarded storage */ +#define MD_PSMASK 0x0000000c /* Mask of page size bits */ +#define MD_PS8MEG 0x0000000c /* 8M page size */ +#define MD_PS512K 0x00000004 /* 512K page size */ +#define MD_PS4K_16K 0x00000000 /* 4K or 16K page size */ +#define MD_WT 0x00000002 /* Use writethrough page attribute */ +#define MD_SVALID 0x00000001 /* Segment entry is valid */ + /* Reset value is undefined */ + + +/* Real page number. Defined by the pte. Writing this register + * causes a TLB entry to be created for the data TLB, using + * additional information from the MD_EPN, and MD_TWC registers. + */ +#define SPRN_MD_RPN 798 + +/* This is a temporary storage register that could be used to save + * a processor working register during a tablewalk. + */ +#define SPRN_M_TW 799 + +#ifndef __ASSEMBLY__ +typedef unsigned long phys_addr_t; + +typedef struct { + unsigned long id; + unsigned long vdso_base; +} mm_context_t; +#endif /* !__ASSEMBLY__ */ + +#endif /* _ASM_POWERPC_MMU_8XX_H_ */ diff --git a/include/asm-powerpc/mmu.h b/include/asm-powerpc/mmu.h index 9b7140391c..d44d211e75 100644 --- a/include/asm-powerpc/mmu.h +++ b/include/asm-powerpc/mmu.h @@ -14,10 +14,9 @@ #elif defined(CONFIG_FSL_BOOKE) /* Freescale Book-E software loaded TLB */ # include -#else -/* Other 32-bit. FIXME: split up the other 32-bit MMU types, and - * revise for arch/powerpc */ -# include +#elif defined (CONFIG_PPC_8xx) +/* Motorola/Freescale 8xx software loaded TLB */ +# include #endif #endif /* __KERNEL__ */ -- cgit v1.2.2 From 80a7cc6cf1126bc09beee3dded2820bfa18ce347 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Tue, 3 Jul 2007 03:22:05 -0500 Subject: [POWERPC] Merge asm-ppc/mmu_context.h into asm-power/mmu_context.h Just did a directly merge from asm-ppc into asm-powerpc. This is the last header that we directly include from asm-powerpc. Signed-off-by: Kumar Gala --- include/asm-powerpc/mmu_context.h | 202 +++++++++++++++++++++++++++++++++++++- 1 file changed, 198 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/mmu_context.h b/include/asm-powerpc/mmu_context.h index 40c9e5a13f..f863ac2140 100644 --- a/include/asm-powerpc/mmu_context.h +++ b/include/asm-powerpc/mmu_context.h @@ -2,16 +2,210 @@ #define __ASM_POWERPC_MMU_CONTEXT_H #ifdef __KERNEL__ +#include +#include +#include + #ifndef CONFIG_PPC64 -#include +#include +#include + +/* + * On 32-bit PowerPC 6xx/7xx/7xxx CPUs, we use a set of 16 VSIDs + * (virtual segment identifiers) for each context. Although the + * hardware supports 24-bit VSIDs, and thus >1 million contexts, + * we only use 32,768 of them. That is ample, since there can be + * at most around 30,000 tasks in the system anyway, and it means + * that we can use a bitmap to indicate which contexts are in use. + * Using a bitmap means that we entirely avoid all of the problems + * that we used to have when the context number overflowed, + * particularly on SMP systems. + * -- paulus. + */ + +/* + * This function defines the mapping from contexts to VSIDs (virtual + * segment IDs). We use a skew on both the context and the high 4 bits + * of the 32-bit virtual address (the "effective segment ID") in order + * to spread out the entries in the MMU hash table. Note, if this + * function is changed then arch/ppc/mm/hashtable.S will have to be + * changed to correspond. + */ +#define CTX_TO_VSID(ctx, va) (((ctx) * (897 * 16) + ((va) >> 28) * 0x111) \ + & 0xffffff) + +/* + The MPC8xx has only 16 contexts. We rotate through them on each + task switch. A better way would be to keep track of tasks that + own contexts, and implement an LRU usage. That way very active + tasks don't always have to pay the TLB reload overhead. The + kernel pages are mapped shared, so the kernel can run on behalf + of any task that makes a kernel entry. Shared does not mean they + are not protected, just that the ASID comparison is not performed. + -- Dan + + The IBM4xx has 256 contexts, so we can just rotate through these + as a way of "switching" contexts. If the TID of the TLB is zero, + the PID/TID comparison is disabled, so we can use a TID of zero + to represent all kernel pages as shared among all contexts. + -- Dan + */ + +static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk) +{ +} + +#ifdef CONFIG_8xx +#define NO_CONTEXT 16 +#define LAST_CONTEXT 15 +#define FIRST_CONTEXT 0 + +#elif defined(CONFIG_4xx) +#define NO_CONTEXT 256 +#define LAST_CONTEXT 255 +#define FIRST_CONTEXT 1 + +#elif defined(CONFIG_E200) || defined(CONFIG_E500) +#define NO_CONTEXT 256 +#define LAST_CONTEXT 255 +#define FIRST_CONTEXT 1 + +#else + +/* PPC 6xx, 7xx CPUs */ +#define NO_CONTEXT ((unsigned long) -1) +#define LAST_CONTEXT 32767 +#define FIRST_CONTEXT 1 +#endif + +/* + * Set the current MMU context. + * On 32-bit PowerPCs (other than the 8xx embedded chips), this is done by + * loading up the segment registers for the user part of the address space. + * + * Since the PGD is immediately available, it is much faster to simply + * pass this along as a second parameter, which is required for 8xx and + * can be used for debugging on all processors (if you happen to have + * an Abatron). + */ +extern void set_context(unsigned long contextid, pgd_t *pgd); + +/* + * Bitmap of contexts in use. + * The size of this bitmap is LAST_CONTEXT + 1 bits. + */ +extern unsigned long context_map[]; + +/* + * This caches the next context number that we expect to be free. + * Its use is an optimization only, we can't rely on this context + * number to be free, but it usually will be. + */ +extern unsigned long next_mmu_context; + +/* + * If we don't have sufficient contexts to give one to every task + * that could be in the system, we need to be able to steal contexts. + * These variables support that. + */ +#if LAST_CONTEXT < 30000 +#define FEW_CONTEXTS 1 +extern atomic_t nr_free_contexts; +extern struct mm_struct *context_mm[LAST_CONTEXT+1]; +extern void steal_context(void); +#endif + +/* + * Get a new mmu context for the address space described by `mm'. + */ +static inline void get_mmu_context(struct mm_struct *mm) +{ + unsigned long ctx; + + if (mm->context.id != NO_CONTEXT) + return; +#ifdef FEW_CONTEXTS + while (atomic_dec_if_positive(&nr_free_contexts) < 0) + steal_context(); +#endif + ctx = next_mmu_context; + while (test_and_set_bit(ctx, context_map)) { + ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx); + if (ctx > LAST_CONTEXT) + ctx = 0; + } + next_mmu_context = (ctx + 1) & LAST_CONTEXT; + mm->context.id = ctx; +#ifdef FEW_CONTEXTS + context_mm[ctx] = mm; +#endif +} + +/* + * Set up the context for a new address space. + */ +static inline int init_new_context(struct task_struct *t, struct mm_struct *mm) +{ + mm->context.id = NO_CONTEXT; + mm->context.vdso_base = 0; + return 0; +} + +/* + * We're finished using the context for an address space. + */ +static inline void destroy_context(struct mm_struct *mm) +{ + preempt_disable(); + if (mm->context.id != NO_CONTEXT) { + clear_bit(mm->context.id, context_map); + mm->context.id = NO_CONTEXT; +#ifdef FEW_CONTEXTS + atomic_inc(&nr_free_contexts); +#endif + } + preempt_enable(); +} + +static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, + struct task_struct *tsk) +{ +#ifdef CONFIG_ALTIVEC + if (cpu_has_feature(CPU_FTR_ALTIVEC)) + asm volatile ("dssall;\n" +#ifndef CONFIG_POWER4 + "sync;\n" /* G4 needs a sync here, G5 apparently not */ +#endif + : : ); +#endif /* CONFIG_ALTIVEC */ + + tsk->thread.pgdir = next->pgd; + + /* No need to flush userspace segments if the mm doesnt change */ + if (prev == next) + return; + + /* Setup new userspace context */ + get_mmu_context(next); + set_context(next->context.id, next->pgd); +} + +#define deactivate_mm(tsk,mm) do { } while (0) + +/* + * After we have set current->mm to a new value, this activates + * the context for the new mm so we see the new mappings. + */ +#define activate_mm(active_mm, mm) switch_mm(active_mm, mm, current) + +extern void mmu_context_init(void); + + #else #include #include #include -#include -#include -#include /* * Copyright (C) 2001 PPC 64 Team, IBM Corp -- cgit v1.2.2 From 864bdfb912e372670b5b2541dac9d273a4a7722a Mon Sep 17 00:00:00 2001 From: Zhang Rui Date: Tue, 19 Jun 2007 11:40:03 +0800 Subject: ACPI: Export events via generic netlink Upon ACPI events, send an "acpi_event" via Generic Netlink. This is in addition to /proc/acpi/event, which remains intact for now. Thanks to Jamal for his great help. Signed-off-by: Zhang Rui Signed-off-by: Len Brown --- include/acpi/acpi_bus.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index c6fa5e023b..5e3dcf3299 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -321,7 +321,8 @@ struct acpi_bus_event { }; extern struct kset acpi_subsys; - +extern int acpi_bus_generate_genetlink_event(struct acpi_device *device, + u8 type, int data); /* * External Functions */ -- cgit v1.2.2 From 75f016a7ce75220d898608791870ab7da549a430 Mon Sep 17 00:00:00 2001 From: Nobuhiro Iwamatsu Date: Fri, 6 Jul 2007 10:26:03 +0900 Subject: sh: Fix timer-tmu build for SH-3. With the TMU register definitions being renamed on SH-4, SH-3 ended up breaking. Update the TSTR define to match the SH-4 convention. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Paul Mundt --- include/asm-sh/cpu-sh3/timer.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h index b2394cf76f..4928b08f9d 100644 --- a/include/asm-sh/cpu-sh3/timer.h +++ b/include/asm-sh/cpu-sh3/timer.h @@ -29,7 +29,7 @@ #endif #if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710) -#define TMU_TSTR 0xa412fe92 /* Byte access */ +#define TMU_012_TSTR 0xa412fe92 /* Byte access */ #define TMU0_TCOR 0xa412fe94 /* Long access */ #define TMU0_TCNT 0xa412fe98 /* Long access */ @@ -44,7 +44,7 @@ #define TMU2_TCR 0xa412feb4 /* Word access */ #else -#define TMU_TSTR 0xfffffe92 /* Byte access */ +#define TMU_012_TSTR 0xfffffe92 /* Byte access */ #define TMU0_TCOR 0xfffffe94 /* Long access */ #define TMU0_TCNT 0xfffffe98 /* Long access */ -- cgit v1.2.2 From 1b898040e214d1f5acd3baf14f07ef5f610d5c8a Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Sat, 7 Jul 2007 07:28:11 +0900 Subject: sh: Add parport stub for SuperIO ports. Some boards have SuperIOs with PC-style parports, toss in the stub so these can be supported. Signed-off-by: Paul Mundt --- include/asm-sh/parport.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 include/asm-sh/parport.h (limited to 'include') diff --git a/include/asm-sh/parport.h b/include/asm-sh/parport.h new file mode 100644 index 0000000000..f67ba60a2a --- /dev/null +++ b/include/asm-sh/parport.h @@ -0,0 +1,16 @@ +/* + * Copyright (C) 1999, 2000 Tim Waugh + * + * This file should only be included by drivers/parport/parport_pc.c. + */ +#ifndef __ASM_SH_PARPORT_H +#define __ASM_SH_PARPORT_H + +static int __devinit parport_pc_find_isa_ports(int autoirq, int autodma); + +static int __devinit parport_pc_find_nonpci_ports(int autoirq, int autodma) +{ + return parport_pc_find_isa_ports(autoirq, autodma); +} + +#endif /* __ASM_SH_PARPORT_H */ -- cgit v1.2.2 From d7ad2254fa7cc11aec3faeba076c1243f6adeb47 Mon Sep 17 00:00:00 2001 From: John Keller Date: Mon, 9 Jul 2007 11:42:24 -0700 Subject: [IA64] SN: Correct ROM resource length for BIOS copy On SN systems, when setting the IORESOURCE_ROM_BIOS_COPY resource flag, the resource length should be set to the actual size of the ROM image so that a call to pci_map_rom() returns the correct size. Signed-off-by: John Keller Signed-off-by: Andrew Morton Signed-off-by: Tony Luck --- include/linux/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 086a0e5a63..acb9387c03 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -560,6 +560,7 @@ void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); void __iomem __must_check *pci_map_rom_copy(struct pci_dev *pdev, size_t *size); void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); void pci_remove_rom(struct pci_dev *pdev); +size_t pci_get_rom_size(void __iomem *rom, size_t size); /* Power management related routines */ int pci_save_state(struct pci_dev *dev); -- cgit v1.2.2 From 149983af609e8f5c57157467baf8545d17b8a6a1 Mon Sep 17 00:00:00 2001 From: Dotan Barak Date: Tue, 26 Jun 2007 15:55:28 +0300 Subject: mlx4_core: Get the maximum message size from reported device capabilities Get the maximum message size from the device capabilities returned from the QUERY_DEV_CAP firmware command, rather than hard-coding 2 GB. Signed-off-by: Dotan Barak Signed-off-by: Michael S. Tsirkin Signed-off-by: Roland Dreier --- include/linux/mlx4/device.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h index b372f5910f..8209387ee8 100644 --- a/include/linux/mlx4/device.h +++ b/include/linux/mlx4/device.h @@ -172,6 +172,7 @@ struct mlx4_caps { int num_pds; int reserved_pds; int mtt_entry_sz; + u32 max_msg_sz; u32 page_size_cap; u32 flags; u16 stat_rate_support; -- cgit v1.2.2 From 74a0ba61b1ca96d6bb98889a7d95cd057165da49 Mon Sep 17 00:00:00 2001 From: Kumar Gala Date: Mon, 9 Jul 2007 23:49:09 -0500 Subject: [POWERPC] Move inline asm eieio to using eieio inline function Use the eieio function so we can redefine what eieio does rather than direct inline asm. This is part code clean up and partially because not all PPCs have eieio (book-e has mbar that maps to eieio). Signed-off-by: Kumar Gala --- include/asm-powerpc/system.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index 09621f611d..eff3de9537 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h @@ -43,7 +43,7 @@ #ifdef CONFIG_SMP #define smp_mb() mb() #define smp_rmb() rmb() -#define smp_wmb() __asm__ __volatile__ ("eieio" : : : "memory") +#define smp_wmb() eieio() #define smp_read_barrier_depends() read_barrier_depends() #else #define smp_mb() barrier() -- cgit v1.2.2 From 80128ff79d282cf71b1819dbca9b8dd47d8ed3e8 Mon Sep 17 00:00:00 2001 From: Vitaly Bordug Date: Mon, 9 Jul 2007 11:37:35 -0700 Subject: [POWERPC] 8xx: mpc885ads pcmcia support Adds support for PowerQuicc on-chip PCMCIA. The driver is implemented as of_device, so only arch/powerpc stuff is capable to use it, which now implies only mpc885ads reference board. To cope with the code that should be hooked inside driver, but is really board specific (like set_voltage), global structure mpc8xx_pcmcia_ops holds necessary function pointers that are filled in the BSP code. [akpm@linux-foundation.org: whitespace diddles] Signed-off-by: Vitaly Bordug Acked-by: Arnd Bergmann Acked-by: Olof Johansson Cc: Dominik Brodowski Cc: Paul Mackerras Cc: Benjamin Herrenschmidt Signed-off-by: Andrew Morton Signed-off-by: Kumar Gala --- include/asm-powerpc/mpc8xx.h | 4 ++++ include/linux/fsl_devices.h | 5 +++++ 2 files changed, 9 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/mpc8xx.h b/include/asm-powerpc/mpc8xx.h index 580371120e..2be014b6f5 100644 --- a/include/asm-powerpc/mpc8xx.h +++ b/include/asm-powerpc/mpc8xx.h @@ -23,6 +23,10 @@ #include #endif +#ifdef CONFIG_PCMCIA_M8XX +extern struct mpc8xx_pcmcia_ops m8xx_pcmcia_ops; +#endif + #endif /* CONFIG_8xx */ #endif /* __CONFIG_8xx_DEFS */ #endif /* __KERNEL__ */ diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h index 73710d6177..12e631f0fb 100644 --- a/include/linux/fsl_devices.h +++ b/include/linux/fsl_devices.h @@ -120,5 +120,10 @@ struct fsl_spi_platform_data { u32 sysclk; }; +struct mpc8xx_pcmcia_ops { + void(*hw_ctrl)(int slot, int enable); + int(*voltage_set)(int slot, int vcc, int vpp); +}; + #endif /* _FSL_DEVICE_H_ */ #endif /* __KERNEL__ */ -- cgit v1.2.2 From d3b814bb1e8b0c63449a3430196c20cbe24a3e67 Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Tue, 19 Jun 2007 16:07:58 +1000 Subject: [POWERPC] Generalise device_node flag interface The struct device_node currently has a _flags variable, although it's only used for one flag - OF_DYNAMIC. Generalise the flag accessors so we can use them with other flags in future. Signed-off-by: Michael Ellerman Signed-off-by: Paul Mackerras --- include/asm-powerpc/prom.h | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h index 1122a9278a..f1006b91bd 100644 --- a/include/asm-powerpc/prom.h +++ b/include/asm-powerpc/prom.h @@ -98,10 +98,18 @@ struct device_node { extern struct device_node *of_chosen; /* flag descriptions */ -#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */ +#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */ + +static inline int of_node_check_flag(struct device_node *n, unsigned long flag) +{ + return test_bit(flag, &n->_flags); +} + +static inline void of_node_set_flag(struct device_node *n, unsigned long flag) +{ + set_bit(flag, &n->_flags); +} -#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags) -#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags) #define HAVE_ARCH_DEVTREE_FIXUPS -- cgit v1.2.2 From 6a281856c02d2291df2f7d9df5bfdee2e7bdd747 Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Tue, 19 Jun 2007 16:08:00 +1000 Subject: [POWERPC] Add a warning to help trackdown device_node refcounting bugs When the refcount for a device node goes to 0, we call the destructor - of_node_release(). This should only happen if we've already detached the node from the device tree. So add a flag OF_DETACHED which tracks detached-ness, and if we find ourselves in of_node_release() without it set, issue a warning and don't free the device_node. To avoid warning continuously reinitialise the kref to a sane value. Signed-off-by: Michael Ellerman Signed-off-by: Paul Mackerras --- include/asm-powerpc/prom.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-powerpc/prom.h b/include/asm-powerpc/prom.h index f1006b91bd..1632baa17d 100644 --- a/include/asm-powerpc/prom.h +++ b/include/asm-powerpc/prom.h @@ -99,6 +99,7 @@ extern struct device_node *of_chosen; /* flag descriptions */ #define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */ +#define OF_DETACHED 2 /* node has been detached from the device tree */ static inline int of_node_check_flag(struct device_node *n, unsigned long flag) { -- cgit v1.2.2 From 94a3807c2a547283bb2fb1728609ad51c09d5f79 Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Wed, 20 Jun 2007 10:54:19 +1000 Subject: [POWERPC] Make the debugfs "powerpc" dir globally accessible The prom.c debugging code creates a "powerpc" directory in debugfs, which is nice, but doesn't allow any other debugging code to stick things under "powerpc" in debugfs. So make it global. While we're there we should make the prom.c debugging code depend on CONFIG_DEBUG_FS, because it doesn't work otherwise. Signed-off-by: Michael Ellerman Signed-off-by: Paul Mackerras --- include/asm-powerpc/system.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h index eff3de9537..32aa42b748 100644 --- a/include/asm-powerpc/system.h +++ b/include/asm-powerpc/system.h @@ -559,5 +559,7 @@ static inline void create_function_call(unsigned long addr, void * func) extern void account_system_vtime(struct task_struct *); #endif +extern struct dentry *powerpc_debugfs_root; + #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_SYSTEM_H */ -- cgit v1.2.2 From 078f194045f892a10f4a5406e7cb06a7f8d42c57 Mon Sep 17 00:00:00 2001 From: will schmidt Date: Wed, 27 Jun 2007 02:12:33 +1000 Subject: [POWERPC] Oprofile enhanced instruction sampling support Oprofile enhanced instruction sampling support. When performing instruction sampling, the mmcra[SLOT] field can be used to more accurately identify the address of the sampled instruction. Tested on power4, js20, power5 and power5+. Signed-off-by: Will Schmidt cc: Maynard Johnson Signed-off-by: Paul Mackerras --- include/asm-powerpc/reg.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/reg.h b/include/asm-powerpc/reg.h index 749c7f953b..281011e953 100644 --- a/include/asm-powerpc/reg.h +++ b/include/asm-powerpc/reg.h @@ -453,6 +453,8 @@ #define SPRN_MMCRA 0x312 #define MMCRA_SIHV 0x10000000UL /* state of MSR HV when SIAR set */ #define MMCRA_SIPR 0x08000000UL /* state of MSR PR when SIAR set */ +#define MMCRA_SLOT 0x07000000UL /* SLOT bits (37-39) */ +#define MMCRA_SLOT_SHIFT 24 #define MMCRA_SAMPLE_ENABLE 0x00000001UL /* enable sampling */ #define POWER6_MMCRA_SIHV 0x0000040000000000ULL #define POWER6_MMCRA_SIPR 0x0000020000000000ULL -- cgit v1.2.2 From b6f41cc8304ce04a5afa3e1e5d2ff6e8088831b7 Mon Sep 17 00:00:00 2001 From: Josh Boyer Date: Tue, 3 Jul 2007 02:06:53 +1000 Subject: [POWERPC] Consolidate PowerPC 750 cputable features The 750 CPU_FTR macros have quite a bit of duplication in them. Consolidate them to use CPU_FTRS_750 and only list the unique features for derivatives. Signed-off-by: Josh Boyer Signed-off-by: Paul Mackerras --- include/asm-powerpc/cputable.h | 26 ++++++-------------------- 1 file changed, 6 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index c8f0aa2286..3dc8e2dfca 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -225,26 +225,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ CPU_FTR_PPC_LE) -#define CPU_FTRS_750CL (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ - CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) -#define CPU_FTRS_750FX1 (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ - CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM | CPU_FTR_PPC_LE) -#define CPU_FTRS_750FX2 (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ - CPU_FTR_NO_DPM | CPU_FTR_PPC_LE) -#define CPU_FTRS_750FX (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ - CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) -#define CPU_FTRS_750GX (CPU_FTR_COMMON | \ - CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ - CPU_FTR_TAU | CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP | \ - CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS | CPU_FTR_PPC_LE) +#define CPU_FTRS_750CL (CPU_FTRS_750 | CPU_FTR_HAS_HIGH_BATS) +#define CPU_FTRS_750FX1 (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM) +#define CPU_FTRS_750FX2 (CPU_FTRS_750 | CPU_FTR_NO_DPM) +#define CPU_FTRS_750FX (CPU_FTRS_750 | CPU_FTR_DUAL_PLL_750FX | \ + CPU_FTR_HAS_HIGH_BATS) +#define CPU_FTRS_750GX (CPU_FTRS_750FX) #define CPU_FTRS_7400_NOTAU (CPU_FTR_COMMON | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | CPU_FTR_L2CR | \ CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE | \ -- cgit v1.2.2 From bd67fcf9ba8474e8eef649a79aba5b3479b01272 Mon Sep 17 00:00:00 2001 From: Tony Breeds Date: Wed, 4 Jul 2007 14:04:31 +1000 Subject: [POWERPC] Add __read_mostly support for powerpc Signed-off-by: Tony Breeds Signed-off-by: Paul Mackerras --- include/asm-powerpc/cache.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/cache.h b/include/asm-powerpc/cache.h index 642be62cf3..53507046a1 100644 --- a/include/asm-powerpc/cache.h +++ b/include/asm-powerpc/cache.h @@ -34,5 +34,9 @@ struct ppc64_caches { extern struct ppc64_caches ppc64_caches; #endif /* __powerpc64__ && ! __ASSEMBLY__ */ +#if !defined(__ASSEMBLY__) +#define __read_mostly __attribute__((__section__(".data.read_mostly"))) +#endif + #endif /* __KERNEL__ */ #endif /* _ASM_POWERPC_CACHE_H */ -- cgit v1.2.2 From 665f5600cb80c9cfa2e9bc832f9cd28164d8e283 Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Mon, 9 Jul 2007 11:37:39 -0700 Subject: [POWERPC] Enable arbitary speed tty ioctls and split input/output speed Adding the defines/macros activates the existing code in the tty layer and allows this platform to use the arbitary speed ioctl setting layer Signed-off-by: David Woodhouse Cc: Alan Cox Signed-off-by: Andrew Morton Signed-off-by: Paul Mackerras --- include/asm-powerpc/termbits.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-powerpc/termbits.h b/include/asm-powerpc/termbits.h index 5e79198f7d..6698188ca5 100644 --- a/include/asm-powerpc/termbits.h +++ b/include/asm-powerpc/termbits.h @@ -152,6 +152,10 @@ struct ktermios { #define B3000000 00034 #define B3500000 00035 #define B4000000 00036 +#define BOTHER 00037 + +#define CIBAUD 077600000 +#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ #define CSIZE 00001400 #define CS5 00000000 -- cgit v1.2.2 From 4c62b53454a83178676e5ecae6665447d363c7b4 Mon Sep 17 00:00:00 2001 From: Satyam Sharma Date: Wed, 27 Jun 2007 16:02:14 +0530 Subject: configfs: misc cleanups 1. item.c:config_item_cleanup() is a private function (only called by config_item_release() in same file). However, it is spuriously exported in include/linux/configfs.h, so remove that export and make it static in item.c. Also, it is no longer exported / interface function, so no need to give comment for this function (the comment was stating obvious thing, anyway). 2. Kernel-doc comment format does not allow empty line between end of comment and start of function (declaration line). There were several such spurious empty lines in item.c, so fix them. fs/configfs/item.c | 15 +++------------ include/linux/configfs.h | 1 - 2 files changed, 3 insertions(+), 13 deletions(-) Signed-off-by: Satyam Sharma Signed-off-by: Joel Becker Signed-off-by: Mark Fasheh --- include/linux/configfs.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/configfs.h b/include/linux/configfs.h index fef6f3d0a4..3d4a96eb0e 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -75,7 +75,6 @@ extern void config_item_init(struct config_item *); extern void config_item_init_type_name(struct config_item *item, const char *name, struct config_item_type *type); -extern void config_item_cleanup(struct config_item *); extern struct config_item * config_item_get(struct config_item *); extern void config_item_put(struct config_item *); -- cgit v1.2.2 From 9b1d9aa4e9c5cafe73b9df21d758b50b5d75264d Mon Sep 17 00:00:00 2001 From: Satyam Sharma Date: Wed, 4 Jul 2007 16:37:06 +0530 Subject: [PATCH] configfs+dlm: Separate out __CONFIGFS_ATTR into configfs.h fs/dlm/config.c contains a useful generic macro called __CONFIGFS_ATTR that is similar to sysfs' __ATTR macro that makes defining attributes easy for any user of configfs. Separate it out into configfs.h so that other users (forthcoming in dynamic netconsole patchset) can use it too. Signed-off-by: Satyam Sharma Cc: David Teigland Signed-off-by: Joel Becker Signed-off-by: Mark Fasheh --- include/linux/configfs.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) (limited to 'include') diff --git a/include/linux/configfs.h b/include/linux/configfs.h index 3d4a96eb0e..def7c83d43 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -130,6 +130,22 @@ struct configfs_attribute { mode_t ca_mode; }; +/* + * Users often need to create attribute structures for their configurable + * attributes, containing a configfs_attribute member and function pointers + * for the show() and store() operations on that attribute. They can use + * this macro (similar to sysfs' __ATTR) to make defining attributes easier. + */ +#define __CONFIGFS_ATTR(_name, _mode, _show, _store) \ +{ \ + .attr = { \ + .ca_name = __stringify(_name), \ + .ca_mode = _mode, \ + .ca_owner = THIS_MODULE, \ + }, \ + .show = _show, \ + .store = _store, \ +} /* * If allow_link() exists, the item can symlink(2) out to other -- cgit v1.2.2 From 3fe6c5ce1176cf661dbe71fc43b627c1a742a89a Mon Sep 17 00:00:00 2001 From: Satyam Sharma Date: Wed, 4 Jul 2007 16:37:16 +0530 Subject: [PATCH] configfs+dlm: Rename config_group_find_obj and state semantics clearly Configfs being based upon sysfs code, config_group_find_obj() is probably so named because of the similar kset_find_obj() in sysfs. However, "kobject"s in sysfs become "config_item"s in configfs, so let's call it config_group_find_item() instead, for sake of uniformity, and make corresponding change in the users of this function. BTW a crucial difference between kset_find_obj and config_group_find_item is in locking expectations. kset_find_obj does its locking by itself, but config_group_find_item expects the *caller* to do the locking. The reason for this: kset's have their own locks, config_group's don't but instead rely on the subsystem mutex. And, subsystem needn't necessarily be around when config_group_find_item() is called. So let's state these locking semantics explicitly, and rectify the comment, otherwise bugs could continue to occur in future, as they did in the past (refer commit d82b8191e238 in gfs2-2.6-fixes.git). [ I also took the opportunity to fix some bad whitespace and double-empty lines. --Joel ] [ Conflict in fs/dlm/config.c with commit 3168b0780d06ace875696f8a648d04d6089654e5 manually resolved. --Mark ] Signed-off-by: Satyam Sharma Cc: David Teigland Signed-off-by: Joel Becker Signed-off-by: Mark Fasheh --- include/linux/configfs.h | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/configfs.h b/include/linux/configfs.h index def7c83d43..bbb1b6cafa 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -86,12 +86,10 @@ struct config_item_type { struct configfs_attribute **ct_attrs; }; - /** * group - a group of config_items of a specific type, belonging * to a specific subsystem. */ - struct config_group { struct config_item cg_item; struct list_head cg_children; @@ -99,13 +97,11 @@ struct config_group { struct config_group **default_groups; }; - extern void config_group_init(struct config_group *group); extern void config_group_init_type_name(struct config_group *group, const char *name, struct config_item_type *type); - static inline struct config_group *to_config_group(struct config_item *item) { return item ? container_of(item,struct config_group,cg_item) : NULL; @@ -121,7 +117,8 @@ static inline void config_group_put(struct config_group *group) config_item_put(&group->cg_item); } -extern struct config_item *config_group_find_obj(struct config_group *, const char *); +extern struct config_item *config_group_find_item(struct config_group *, + const char *); struct configfs_attribute { -- cgit v1.2.2 From e6bd07aee739566803425acdbf5cdb29919164e1 Mon Sep 17 00:00:00 2001 From: Joel Becker Date: Fri, 6 Jul 2007 23:33:17 -0700 Subject: configfs: Convert subsystem semaphore to mutex Convert the su_sem member of struct configfs_subsystem to a struct mutex, as that's what it is. Also convert all the users and update Documentation/configfs.txt and Documentation/configfs_example.c accordingly. [ Conflict in fs/dlm/config.c with commit 3168b0780d06ace875696f8a648d04d6089654e5 manually resolved. --Mark ] Inspired-by: Satyam Sharma Signed-off-by: Joel Becker Signed-off-by: Mark Fasheh --- include/linux/configfs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/configfs.h b/include/linux/configfs.h index bbb1b6cafa..5ce0fc4e3b 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -40,9 +40,9 @@ #include #include #include +#include #include -#include #define CONFIGFS_ITEM_NAME_LEN 20 @@ -174,7 +174,7 @@ struct configfs_group_operations { struct configfs_subsystem { struct config_group su_group; - struct semaphore su_sem; + struct mutex su_mutex; }; static inline struct configfs_subsystem *to_configfs_subsystem(struct config_group *group) -- cgit v1.2.2 From 299894cc9001b09e3e9685f2709b49e7e1092ccc Mon Sep 17 00:00:00 2001 From: Joel Becker Date: Fri, 6 Oct 2006 17:33:23 -0700 Subject: configfs: accessing item hierarchy during rmdir(2) Add a notification callback, ops->disconnect_notify(). It has the same prototype as ->drop_item(), but it will be called just before the item linkage is broken. This way, configfs users who want to do work while the object is still in the heirarchy have a chance. Client drivers will still need to config_item_put() in their ->drop_item(), if they implement it. They need do nothing in ->disconnect_notify(). They don't have to provide it if they don't care. But someone who wants to be notified before ci_parent is set to NULL can now be notified. Signed-off-by: Joel Becker Signed-off-by: Mark Fasheh --- include/linux/configfs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/configfs.h b/include/linux/configfs.h index 5ce0fc4e3b..8227e730da 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -169,6 +169,7 @@ struct configfs_group_operations { struct config_item *(*make_item)(struct config_group *group, const char *name); struct config_group *(*make_group)(struct config_group *group, const char *name); int (*commit_item)(struct config_item *item); + void (*disconnect_notify)(struct config_group *group, struct config_item *item); void (*drop_item)(struct config_group *group, struct config_item *item); }; -- cgit v1.2.2 From 631d1febab8e546e3bb800bdfe2c212b8adf87de Mon Sep 17 00:00:00 2001 From: Joel Becker Date: Mon, 18 Jun 2007 18:06:09 -0700 Subject: configfs: config item dependancies. Sometimes other drivers depend on particular configfs items. For example, ocfs2 mounts depend on a heartbeat region item. If that region item is removed with rmdir(2), the ocfs2 mount must BUG or go readonly. Not happy. This provides two additional API calls: configfs_depend_item() and configfs_undepend_item(). A client driver can call configfs_depend_item() on an existing item to tell configfs that it is depended on. configfs will then return -EBUSY from rmdir(2) for that item. When the item is no longer depended on, the client driver calls configfs_undepend_item() on it. These API cannot be called underneath any configfs callbacks, as they will conflict. They can block and allocate. A client driver probably shouldn't calling them of its own gumption. Rather it should be providing an API that external subsystems call. How does this work? Imagine the ocfs2 mount process. When it mounts, it asks for a heart region item. This is done via a call into the heartbeat code. Inside the heartbeat code, the region item is looked up. Here, the heartbeat code calls configfs_depend_item(). If it succeeds, then heartbeat knows the region is safe to give to ocfs2. If it fails, it was being torn down anyway, and heartbeat can gracefully pass up an error. [ Fixed some bad whitespace in configfs.txt. --Mark ] Signed-off-by: Joel Becker Signed-off-by: Mark Fasheh --- include/linux/configfs.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/configfs.h b/include/linux/configfs.h index 8227e730da..8c6967f3fb 100644 --- a/include/linux/configfs.h +++ b/include/linux/configfs.h @@ -188,6 +188,11 @@ static inline struct configfs_subsystem *to_configfs_subsystem(struct config_gro int configfs_register_subsystem(struct configfs_subsystem *subsys); void configfs_unregister_subsystem(struct configfs_subsystem *subsys); +/* These functions can sleep and can alloc with GFP_KERNEL */ +/* WARNING: These cannot be called underneath configfs callbacks!! */ +int configfs_depend_item(struct configfs_subsystem *subsys, struct config_item *target); +void configfs_undepend_item(struct configfs_subsystem *subsys, struct config_item *target); + #endif /* __KERNEL__ */ #endif /* _CONFIGFS_H_ */ -- cgit v1.2.2 From 45a66c1c3ff88e8050dd25e81bafdf79a12a8042 Mon Sep 17 00:00:00 2001 From: Oleg Nesterov Date: Mon, 9 Jul 2007 11:46:13 -0700 Subject: libata-core: convert to use cancel_rearming_delayed_work() We should not use cancel_work_sync(delayed_work->work). This works, but not good. We can use cancel_rearming_delayed_work(), this also simplifies the code. Signed-off-by: Oleg Nesterov Signed-off-by: Andrew Morton Signed-off-by: Jeff Garzik --- include/linux/libata.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/libata.h b/include/linux/libata.h index a3df64677a..bf98d44c81 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -196,7 +196,6 @@ enum { ATA_PFLAG_SCSI_HOTPLUG = (1 << 6), /* SCSI hotplug scheduled */ ATA_PFLAG_INITIALIZING = (1 << 7), /* being initialized, don't touch */ - ATA_PFLAG_FLUSH_PORT_TASK = (1 << 16), /* flush port task */ ATA_PFLAG_SUSPENDED = (1 << 17), /* port is suspended (power) */ ATA_PFLAG_PM_PENDING = (1 << 18), /* PM operation pending */ ATA_PFLAG_GTM_VALID = (1 << 19), /* acpi_gtm data valid */ -- cgit v1.2.2 From d583bc18812f8da52bf25eef9cd111e5fd46a6ab Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Wed, 4 Jul 2007 18:02:07 +0900 Subject: libata: simplify PCI legacy SFF host handling With PCI resource fix up for legacy hosts. We can use the same code path to allocate IO resources and initialize host for both legacy and native SFF hosts. Only IRQ requesting needs to be different. Rename ata_pci_*_native_host() to ata_pci_*_sff_host(), kill all legacy specific functions and use the renamed functions instead. This simplifies code a lot. Signed-off-by: Tejun Heo Cc: Alan Cox Signed-off-by: Jeff Garzik --- include/linux/libata.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/libata.h b/include/linux/libata.h index bf98d44c81..0c8b6578bd 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -870,11 +870,11 @@ struct pci_bits { unsigned long val; }; -extern int ata_pci_init_native_host(struct ata_host *host); +extern int ata_pci_init_sff_host(struct ata_host *host); extern int ata_pci_init_bmdma(struct ata_host *host); -extern int ata_pci_prepare_native_host(struct pci_dev *pdev, - const struct ata_port_info * const * ppi, - struct ata_host **r_host); +extern int ata_pci_prepare_sff_host(struct pci_dev *pdev, + const struct ata_port_info * const * ppi, + struct ata_host **r_host); extern int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits); extern unsigned long ata_pci_default_filter(struct ata_device *, unsigned long); #endif /* CONFIG_PCI */ -- cgit v1.2.2 From 75683fe7153c3817bb4fd4491e2a5913af6c463e Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 5 Jul 2007 13:31:27 +0900 Subject: libata: clean up horkage handling Horkage handling had the following problems. * dev->horkage was positioned after ATA_DEVICE_CLEAR_OFFSET, so it was cleared before the device is configured. This broke HORKAGE_DIAGNOSTIC. * Some used dev->horkage while others called ata_device_blacklisted() directly. This was at best confusing. This patch moves dev->horkage right after dev->flags and set the field according to the blacklist during device configuration. All users test against dev->horkage. ata_device_blacklisted() now has only one user, make it static. While at it, rename it to ata_dev_blacklisted() for consistency. Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik --- include/linux/libata.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/libata.h b/include/linux/libata.h index 0c8b6578bd..47cd2a1c55 100644 --- a/include/linux/libata.h +++ b/include/linux/libata.h @@ -434,6 +434,7 @@ struct ata_device { struct ata_port *ap; unsigned int devno; /* 0 or 1 */ unsigned long flags; /* ATA_DFLAG_xxx */ + unsigned int horkage; /* List of broken features */ struct scsi_device *sdev; /* attached SCSI device */ #ifdef CONFIG_ATA_ACPI acpi_handle acpi_handle; @@ -465,7 +466,6 @@ struct ata_device { /* error history */ struct ata_ering ering; int spdn_cnt; - unsigned int horkage; /* List of broken features */ }; /* Offset into struct ata_device. Fields above it are maintained @@ -793,7 +793,6 @@ extern void ata_id_string(const u16 *id, unsigned char *s, extern void ata_id_c_string(const u16 *id, unsigned char *s, unsigned int ofs, unsigned int len); extern void ata_id_to_dma_mode(struct ata_device *dev, u8 unknown); -extern unsigned long ata_device_blacklisted(const struct ata_device *dev); extern void ata_bmdma_setup (struct ata_queued_cmd *qc); extern void ata_bmdma_start (struct ata_queued_cmd *qc); extern void ata_bmdma_stop(struct ata_queued_cmd *qc); -- cgit v1.2.2 From 814600ee10d3c056ada315cdbdc2ebe48f54c75a Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Sun, 1 Jul 2007 19:05:58 +0900 Subject: libata-link: add PMP related ATA constants Add Port Multiplier related ATA constants and macros. Some of these will be used by ata_link implementation. Signed-off-by: Tejun Heo Signed-off-by: Jeff Garzik --- include/linux/ata.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'include') diff --git a/include/linux/ata.h b/include/linux/ata.h index 407dc7e098..b5a20162af 100644 --- a/include/linux/ata.h +++ b/include/linux/ata.h @@ -164,6 +164,8 @@ enum { ATA_CMD_SET_MAX = 0xF9, ATA_CMD_SET_MAX_EXT = 0x37, ATA_CMD_READ_LOG_EXT = 0x2f, + ATA_CMD_PMP_READ = 0xE4, + ATA_CMD_PMP_WRITE = 0xE8, /* READ_LOG_EXT pages */ ATA_LOG_SATA_NCQ = 0x10, @@ -212,6 +214,28 @@ enum { 0=to device, 1=to host */ ATAPI_CDB_LEN = 16, + /* PMP stuff */ + SATA_PMP_MAX_PORTS = 15, + SATA_PMP_CTRL_PORT = 15, + + SATA_PMP_GSCR_DWORDS = 128, + SATA_PMP_GSCR_PROD_ID = 0, + SATA_PMP_GSCR_REV = 1, + SATA_PMP_GSCR_PORT_INFO = 2, + SATA_PMP_GSCR_ERROR = 32, + SATA_PMP_GSCR_ERROR_EN = 33, + SATA_PMP_GSCR_FEAT = 64, + SATA_PMP_GSCR_FEAT_EN = 96, + + SATA_PMP_PSCR_STATUS = 0, + SATA_PMP_PSCR_ERROR = 1, + SATA_PMP_PSCR_CONTROL = 2, + + SATA_PMP_FEAT_BIST = (1 << 0), + SATA_PMP_FEAT_PMREQ = (1 << 1), + SATA_PMP_FEAT_DYNSSC = (1 << 2), + SATA_PMP_FEAT_NOTIFY = (1 << 3), + /* cable types */ ATA_CBL_NONE = 0, ATA_CBL_PATA40 = 1, @@ -418,4 +442,9 @@ static inline int lba_48_ok(u64 block, u32 n_block) return ((block + n_block - 1) < ((u64)1 << 48)) && (n_block <= 65536); } +#define sata_pmp_gscr_vendor(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] & 0xffff) +#define sata_pmp_gscr_devid(gscr) ((gscr)[SATA_PMP_GSCR_PROD_ID] >> 16) +#define sata_pmp_gscr_rev(gscr) (((gscr)[SATA_PMP_GSCR_REV] >> 8) & 0xff) +#define sata_pmp_gscr_ports(gscr) ((gscr)[SATA_PMP_GSCR_PORT_INFO] & 0xf) + #endif /* __LINUX_ATA_H__ */ -- cgit v1.2.2 From 3c0c9e389bb9618fee2300eea2d135e4db64c4ba Mon Sep 17 00:00:00 2001 From: Brian King Date: Wed, 11 Jul 2007 00:41:14 +1000 Subject: [POWERPC] Add H_ILLAN_ATTRIBUTES hcall number Adds the number for the H_ILLAN_ATTRIBUTES hcall. Signed-off-by: Brian King Signed-off-by: Paul Mackerras --- include/asm-powerpc/hvcall.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-powerpc/hvcall.h b/include/asm-powerpc/hvcall.h index 62efd9d7a4..bf6cd7cb99 100644 --- a/include/asm-powerpc/hvcall.h +++ b/include/asm-powerpc/hvcall.h @@ -206,6 +206,7 @@ #define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 #define H_QUERY_INT_STATE 0x1E4 #define H_POLL_PENDING 0x1D8 +#define H_ILLAN_ATTRIBUTES 0x244 #define H_JOIN 0x298 #define H_VASI_STATE 0x2A4 #define H_ENABLE_CRQ 0x2B0 -- cgit v1.2.2 From 88be9f990fe70f0f177ef44a16a477599e91f825 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Tue, 5 Jun 2007 10:42:27 -0400 Subject: NFS: Replace vfsmount and dentry in nfs_open_context with struct path Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 0543439a97..07eea8f64e 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -31,6 +31,7 @@ #include #include +#include #include #include #include @@ -70,8 +71,7 @@ struct nfs_access_entry { struct nfs4_state; struct nfs_open_context { atomic_t count; - struct vfsmount *vfsmnt; - struct dentry *dentry; + struct path path; struct rpc_cred *cred; struct nfs4_state *state; fl_owner_t lockowner; -- cgit v1.2.2 From aa53ed541a1fec78a78d02afc8b042d040cc080d Mon Sep 17 00:00:00 2001 From: Jeff Layton Date: Tue, 5 Jun 2007 14:49:03 -0400 Subject: NFS4: on a O_EXCL OPEN make sure SETATTR sets the fields holding the verifier The Linux NFS4 client simply skips over the bitmask in an O_EXCL open call and so it doesn't bother to reset any fields that may be holding the verifier. This patch has us save the first two words of the bitmask (which is all the current client has #defines for). The client then later checks this bitmask and turns on the appropriate flags in the sattr->ia_verify field for the following SETATTR call. This patch only currently checks to see if the server used the atime and mtime slots for the verifier (which is what the Linux server uses for this). I'm not sure of what other fields the server could reasonably use, but adding checks for others should be trivial. Signed-off-by: Jeff Layton Signed-off-by: Trond Myklebust --- include/linux/nfs4.h | 1 + include/linux/nfs_xdr.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/nfs4.h b/include/linux/nfs4.h index 7e7f33a38f..8726491de1 100644 --- a/include/linux/nfs4.h +++ b/include/linux/nfs4.h @@ -15,6 +15,7 @@ #include +#define NFS4_BITMAP_SIZE 2 #define NFS4_VERIFIER_SIZE 8 #define NFS4_STATEID_SIZE 16 #define NFS4_FHSIZE 128 diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h index 10c26ed0db..f7100df3a6 100644 --- a/include/linux/nfs_xdr.h +++ b/include/linux/nfs_xdr.h @@ -144,6 +144,7 @@ struct nfs_openres { nfs4_stateid delegation; __u32 do_recall; __u64 maxsize; + __u32 attrset[NFS4_BITMAP_SIZE]; }; /* -- cgit v1.2.2 From c03b40246123b2ced79e2620d1d2c089bb12369a Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sun, 17 Jun 2007 13:26:38 -0400 Subject: NFS: Convert struct nfs_page to use krefs Signed-off-by: Trond Myklebust --- include/linux/nfs_page.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h index bd193af801..c780e7e39f 100644 --- a/include/linux/nfs_page.h +++ b/include/linux/nfs_page.h @@ -16,7 +16,7 @@ #include #include -#include +#include /* * Valid flags for the radix tree @@ -42,7 +42,7 @@ struct nfs_page { unsigned int wb_offset, /* Offset & ~PAGE_CACHE_MASK */ wb_pgbase, /* Start of page data */ wb_bytes; /* Length of request */ - atomic_t wb_count; /* reference count */ + struct kref wb_kref; /* reference count */ unsigned long wb_flags; struct nfs_writeverf wb_verf; /* Commit cookie */ }; @@ -89,7 +89,7 @@ extern void nfs_clear_page_writeback(struct nfs_page *req); /* - * Lock the page of an asynchronous request without incrementing the wb_count + * Lock the page of an asynchronous request without getting a new reference */ static inline int nfs_lock_request_dontget(struct nfs_page *req) @@ -98,14 +98,14 @@ nfs_lock_request_dontget(struct nfs_page *req) } /* - * Lock the page of an asynchronous request + * Lock the page of an asynchronous request and take a reference */ static inline int nfs_lock_request(struct nfs_page *req) { if (test_and_set_bit(PG_BUSY, &req->wb_flags)) return 0; - atomic_inc(&req->wb_count); + kref_get(&req->wb_kref); return 1; } -- cgit v1.2.2 From 9fd367f0f376ccfb2592eed9be0eece70429894f Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sun, 17 Jun 2007 15:10:24 -0400 Subject: NFS cleanup: Rename NFS_PAGE_TAG_WRITEBACK to NFS_PAGE_TAG_LOCKED Signed-off-by: Trond Myklebust --- include/linux/nfs_page.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h index c780e7e39f..042434c39b 100644 --- a/include/linux/nfs_page.h +++ b/include/linux/nfs_page.h @@ -21,7 +21,7 @@ /* * Valid flags for the radix tree */ -#define NFS_PAGE_TAG_WRITEBACK 0 +#define NFS_PAGE_TAG_LOCKED 0 /* * Valid flags for a dirty buffer @@ -84,8 +84,7 @@ extern void nfs_pageio_complete(struct nfs_pageio_descriptor *desc); extern void nfs_pageio_cond_complete(struct nfs_pageio_descriptor *, pgoff_t); extern int nfs_wait_on_request(struct nfs_page *); extern void nfs_unlock_request(struct nfs_page *req); -extern int nfs_set_page_writeback_locked(struct nfs_page *req); -extern void nfs_clear_page_writeback(struct nfs_page *req); +extern void nfs_clear_page_tag_locked(struct nfs_page *req); /* -- cgit v1.2.2 From 5c36968343fcd013a3f7ae93f246c2e75596780b Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sun, 17 Jun 2007 15:27:42 -0400 Subject: NFS cleanup: speed up nfs_scan_commit using radix tree tags Add a tag for requests that are waiting for a COMMIT Signed-off-by: Trond Myklebust --- include/linux/nfs_page.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h index 042434c39b..481a42105d 100644 --- a/include/linux/nfs_page.h +++ b/include/linux/nfs_page.h @@ -22,6 +22,7 @@ * Valid flags for the radix tree */ #define NFS_PAGE_TAG_LOCKED 0 +#define NFS_PAGE_TAG_COMMIT 1 /* * Valid flags for a dirty buffer @@ -71,8 +72,8 @@ extern void nfs_clear_request(struct nfs_page *req); extern void nfs_release_request(struct nfs_page *req); -extern int nfs_scan_list(struct nfs_inode *nfsi, struct list_head *head, struct list_head *dst, - pgoff_t idx_start, unsigned int npages); +extern int nfs_scan_list(struct nfs_inode *nfsi, struct list_head *dst, + pgoff_t idx_start, unsigned int npages, int tag); extern void nfs_pageio_init(struct nfs_pageio_descriptor *desc, struct inode *inode, int (*doio)(struct inode *, struct list_head *, unsigned int, size_t, int), -- cgit v1.2.2 From 2aefa104313996d1a9582476cee53d1296c834bf Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sun, 17 Jun 2007 15:40:59 -0400 Subject: NFS: Remove the redundant 'dirty' and 'commit' lists from nfs_inode Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 5 +---- include/linux/nfs_page.h | 5 +---- 2 files changed, 2 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 07eea8f64e..a942054767 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -156,12 +156,9 @@ struct nfs_inode { * This is the list of dirty unwritten pages. */ spinlock_t req_lock; - struct list_head dirty; - struct list_head commit; struct radix_tree_root nfs_page_tree; - unsigned int ndirty, - ncommit, + unsigned int ncommit, npages; /* Open contexts for shared mmap writes */ diff --git a/include/linux/nfs_page.h b/include/linux/nfs_page.h index 481a42105d..78e60798d1 100644 --- a/include/linux/nfs_page.h +++ b/include/linux/nfs_page.h @@ -34,8 +34,7 @@ struct nfs_inode; struct nfs_page { - struct list_head wb_list, /* Defines state of page: */ - *wb_list_head; /* read/write/commit */ + struct list_head wb_list; /* Defines state of page: */ struct page *wb_page; /* page to read in/write out */ struct nfs_open_context *wb_context; /* File state context info */ atomic_t wb_complete; /* i/os we're waiting for */ @@ -118,7 +117,6 @@ static inline void nfs_list_add_request(struct nfs_page *req, struct list_head *head) { list_add_tail(&req->wb_list, head); - req->wb_list_head = head; } @@ -132,7 +130,6 @@ nfs_list_remove_request(struct nfs_page *req) if (list_empty(&req->wb_list)) return; list_del_init(&req->wb_list); - req->wb_list_head = NULL; } static inline struct nfs_page * -- cgit v1.2.2 From dce34ce298d85b81630401f4feb4bd7ac77fe9c7 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sun, 17 Jun 2007 15:47:53 -0400 Subject: NFS: Prevent integer overflow in nfs_scan_list() Also ensure that nfs_inode ncommit and npages are large enough to represent all possible values for the number of pages. Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index a942054767..750708ccd7 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -158,7 +158,7 @@ struct nfs_inode { spinlock_t req_lock; struct radix_tree_root nfs_page_tree; - unsigned int ncommit, + unsigned long ncommit, npages; /* Open contexts for shared mmap writes */ -- cgit v1.2.2 From 3bec63db55463365110d00721ed60a31e4614cb6 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sun, 17 Jun 2007 16:02:44 -0400 Subject: NFS: Convert struct nfs_open_context to use a kref Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 750708ccd7..bf24151d63 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -30,6 +30,7 @@ #ifdef __KERNEL__ #include +#include #include #include #include @@ -70,7 +71,7 @@ struct nfs_access_entry { struct nfs4_state; struct nfs_open_context { - atomic_t count; + struct kref kref; struct path path; struct rpc_cred *cred; struct nfs4_state *state; -- cgit v1.2.2 From 6529eba08fe7297852391a468d95322913de73fa Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Thu, 14 Jun 2007 16:40:14 -0400 Subject: SUNRPC: Move rpc_task->tk_task list into struct rpc_clnt Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 4 ++++ include/linux/sunrpc/sched.h | 5 ----- 2 files changed, 4 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index 66611423c8..0801ab5407 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -26,6 +26,8 @@ struct rpc_inode; struct rpc_clnt { atomic_t cl_count; /* Number of clones */ atomic_t cl_users; /* number of references */ + struct list_head cl_clients; /* Global list of clients */ + struct list_head cl_tasks; /* List of tasks */ struct rpc_xprt * cl_xprt; /* transport */ struct rpc_procinfo * cl_procinfo; /* procedure info */ u32 cl_prog, /* RPC program number */ @@ -122,6 +124,8 @@ struct rpc_clnt *rpc_clone_client(struct rpc_clnt *); int rpc_shutdown_client(struct rpc_clnt *); int rpc_destroy_client(struct rpc_clnt *); void rpc_release_client(struct rpc_clnt *); +void rpc_register_client(struct rpc_clnt *); +void rpc_unregister_client(struct rpc_clnt *); int rpcb_register(u32, u32, int, unsigned short, int *); void rpcb_getport(struct rpc_task *); diff --git a/include/linux/sunrpc/sched.h b/include/linux/sunrpc/sched.h index 2047fb202a..3387b008cd 100644 --- a/include/linux/sunrpc/sched.h +++ b/include/linux/sunrpc/sched.h @@ -110,11 +110,6 @@ struct rpc_task { if (!list_empty(head) && \ ((task=list_entry((head)->next, struct rpc_task, u.tk_wait.list)),1)) -/* .. and walking list of all tasks */ -#define alltask_for_each(task, pos, head) \ - list_for_each(pos, head) \ - if ((task=list_entry(pos, struct rpc_task, tk_task)),1) - typedef void (*rpc_action)(struct rpc_task *); struct rpc_call_ops { -- cgit v1.2.2 From 4bef61ff7514396419563ca54fd42ef846485b06 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 16 Jun 2007 14:17:01 -0400 Subject: SUNRPC: Add a per-rpc_clnt spinlock Use that to protect the rpc_clnt->cl_tasks list instead of using a global lock. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index 0801ab5407..2f4b520a74 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -28,6 +28,7 @@ struct rpc_clnt { atomic_t cl_users; /* number of references */ struct list_head cl_clients; /* Global list of clients */ struct list_head cl_tasks; /* List of tasks */ + spinlock_t cl_lock; /* spinlock */ struct rpc_xprt * cl_xprt; /* transport */ struct rpc_procinfo * cl_procinfo; /* procedure info */ u32 cl_prog, /* RPC program number */ -- cgit v1.2.2 From 34f52e3591f241b825353ba27def956d8487c400 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Thu, 14 Jun 2007 16:40:31 -0400 Subject: SUNRPC: Convert rpc_clnt->cl_users to a kref Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index 2f4b520a74..003d8ea70c 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -24,8 +24,8 @@ struct rpc_inode; * The high-level client handle */ struct rpc_clnt { + struct kref cl_kref; /* Number of references */ atomic_t cl_count; /* Number of clones */ - atomic_t cl_users; /* number of references */ struct list_head cl_clients; /* Global list of clients */ struct list_head cl_tasks; /* List of tasks */ spinlock_t cl_lock; /* spinlock */ -- cgit v1.2.2 From 848f1fe6be2e290691bb6c13cbb8fd92bd0cfaab Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 9 Jun 2007 19:39:12 -0400 Subject: SUNRPC: Kill rpc_clnt->cl_dead Its use is at best racy, and there is only one user (lockd), which has additional locking that makes the whole thing redundant. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index 003d8ea70c..ab3ef6d629 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -45,8 +45,7 @@ struct rpc_clnt { cl_intr : 1,/* interruptible */ cl_discrtry : 1,/* disconnect before retry */ cl_autobind : 1,/* use getport() */ - cl_oneshot : 1,/* dispose after use */ - cl_dead : 1;/* abandoned */ + cl_oneshot : 1;/* dispose after use */ struct rpc_rtt * cl_rtt; /* RTO estimator data */ -- cgit v1.2.2 From 90c5755ff5111ffdcca10a1e8a823dba29f37b6d Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 9 Jun 2007 19:49:36 -0400 Subject: SUNRPC: Kill rpc_clnt->cl_oneshot Replace it with explicit calls to rpc_shutdown_client() or rpc_destroy_client() (for the case of asynchronous calls). Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index ab3ef6d629..fe7ea65ed0 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -44,8 +44,7 @@ struct rpc_clnt { unsigned int cl_softrtry : 1,/* soft timeouts */ cl_intr : 1,/* interruptible */ cl_discrtry : 1,/* disconnect before retry */ - cl_autobind : 1,/* use getport() */ - cl_oneshot : 1;/* dispose after use */ + cl_autobind : 1;/* use getport() */ struct rpc_rtt * cl_rtt; /* RTO estimator data */ @@ -112,10 +111,9 @@ struct rpc_create_args { #define RPC_CLNT_CREATE_HARDRTRY (1UL << 0) #define RPC_CLNT_CREATE_INTR (1UL << 1) #define RPC_CLNT_CREATE_AUTOBIND (1UL << 2) -#define RPC_CLNT_CREATE_ONESHOT (1UL << 3) -#define RPC_CLNT_CREATE_NONPRIVPORT (1UL << 4) -#define RPC_CLNT_CREATE_NOPING (1UL << 5) -#define RPC_CLNT_CREATE_DISCRTRY (1UL << 6) +#define RPC_CLNT_CREATE_NONPRIVPORT (1UL << 3) +#define RPC_CLNT_CREATE_NOPING (1UL << 4) +#define RPC_CLNT_CREATE_DISCRTRY (1UL << 5) struct rpc_clnt *rpc_create(struct rpc_create_args *args); struct rpc_clnt *rpc_bind_new_program(struct rpc_clnt *, -- cgit v1.2.2 From 4c402b40970382ded616eadd544fd63feb76cc79 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Thu, 14 Jun 2007 16:40:32 -0400 Subject: SUNRPC: Remove rpc_clnt->cl_count The kref now does most of what cl_count + cl_user used to do. The only remaining role for cl_count is to tell us if we are in a 'shutdown' phase. We can provide that information using a single bit field instead of a full atomic counter. Also rename rpc_destroy_client() to rpc_close_client(), which reflects better what its role is these days. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index fe7ea65ed0..cf03494c36 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -25,7 +25,6 @@ struct rpc_inode; */ struct rpc_clnt { struct kref cl_kref; /* Number of references */ - atomic_t cl_count; /* Number of clones */ struct list_head cl_clients; /* Global list of clients */ struct list_head cl_tasks; /* List of tasks */ spinlock_t cl_lock; /* spinlock */ @@ -119,8 +118,7 @@ struct rpc_clnt *rpc_create(struct rpc_create_args *args); struct rpc_clnt *rpc_bind_new_program(struct rpc_clnt *, struct rpc_program *, int); struct rpc_clnt *rpc_clone_client(struct rpc_clnt *); -int rpc_shutdown_client(struct rpc_clnt *); -int rpc_destroy_client(struct rpc_clnt *); +void rpc_shutdown_client(struct rpc_clnt *); void rpc_release_client(struct rpc_clnt *); void rpc_register_client(struct rpc_clnt *); void rpc_unregister_client(struct rpc_clnt *); -- cgit v1.2.2 From f61534dfd38f895b203e2aadaba04f21a992ca8c Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Thu, 14 Jun 2007 17:31:58 -0400 Subject: SUNRPC: Remove redundant calls to rpciod_up()/rpciod_down() Signed-off-by: Trond Myklebust --- include/linux/nfs_fs_sb.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h index 52b4378311..144d955dc4 100644 --- a/include/linux/nfs_fs_sb.h +++ b/include/linux/nfs_fs_sb.h @@ -16,7 +16,6 @@ struct nfs_client { #define NFS_CS_INITING 1 /* busy initialising */ int cl_nfsversion; /* NFS protocol version */ unsigned long cl_res_state; /* NFS resources state */ -#define NFS_CS_RPCIOD 0 /* - rpciod started */ #define NFS_CS_CALLBACK 1 /* - callback started */ #define NFS_CS_IDMAP 2 /* - idmap started */ #define NFS_CS_RENEWD 3 /* - renewd started */ -- cgit v1.2.2 From 188fef11db219f13f32d055ba59985e7d1a349fe Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 16 Jun 2007 14:18:40 -0400 Subject: SUNRPC: Move rpc_register_client and friends into net/sunrpc/clnt.c Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index cf03494c36..a451351c7e 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -120,8 +120,6 @@ struct rpc_clnt *rpc_bind_new_program(struct rpc_clnt *, struct rpc_clnt *rpc_clone_client(struct rpc_clnt *); void rpc_shutdown_client(struct rpc_clnt *); void rpc_release_client(struct rpc_clnt *); -void rpc_register_client(struct rpc_clnt *); -void rpc_unregister_client(struct rpc_clnt *); int rpcb_register(u32, u32, int, unsigned short, int *); void rpcb_getport(struct rpc_task *); -- cgit v1.2.2 From 4a8c1344dccb848dbcf0edabc8b5c51a8ecf2808 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Thu, 7 Jun 2007 10:14:14 -0400 Subject: SUNRPC: Add a backpointer from the struct rpc_cred to the rpc_auth Cleans up an issue whereby rpcsec_gss uses the rpc_clnt->cl_auth. If we want to be able to add several rpc_auths to a single rpc_clnt, then this abuse must go. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index 534cdc7be5..8ef27afeea 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -30,8 +30,11 @@ struct auth_cred { /* * Client user credentials */ +struct rpc_auth; +struct rpc_credops; struct rpc_cred { struct hlist_node cr_hash; /* hash chain */ + struct rpc_auth * cr_auth; struct rpc_credops * cr_ops; unsigned long cr_expire; /* when to gc */ atomic_t cr_count; /* ref count */ @@ -60,6 +63,7 @@ struct rpc_cred_cache { unsigned long expire; /* cache expiry interval */ }; +struct rpc_authops; struct rpc_auth { unsigned int au_cslack; /* call cred size estimate */ /* guess at number of u32's auth adds before -- cgit v1.2.2 From 6e84c7b66a0aa0be16a7728d1e687c57978dac2c Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Thu, 7 Jun 2007 15:31:36 -0400 Subject: SUNRPC: Add a downcall queue to struct rpc_inode Currently, the downcall queue is tied to the struct gss_auth, which means that different RPCSEC_GSS pseudoflavours must use different upcall pipes. Add a list to struct rpc_inode that can be used instead. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/rpc_pipe_fs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/sunrpc/rpc_pipe_fs.h b/include/linux/sunrpc/rpc_pipe_fs.h index ad293760f6..430cea1048 100644 --- a/include/linux/sunrpc/rpc_pipe_fs.h +++ b/include/linux/sunrpc/rpc_pipe_fs.h @@ -23,6 +23,7 @@ struct rpc_inode { void *private; struct list_head pipe; struct list_head in_upcall; + struct list_head in_downcall; int pipelen; int nreaders; int nwriters; -- cgit v1.2.2 From 03a1256f06cf1f58e33971fb4a524479e75c200e Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Fri, 8 Jun 2007 14:14:53 -0400 Subject: SUNRPC: Add a field to track the number of kernel users of an rpc_pipe This allows us to correctly deduce when we need to remove the pipe. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/rpc_pipe_fs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/sunrpc/rpc_pipe_fs.h b/include/linux/sunrpc/rpc_pipe_fs.h index 430cea1048..51b977a4ca 100644 --- a/include/linux/sunrpc/rpc_pipe_fs.h +++ b/include/linux/sunrpc/rpc_pipe_fs.h @@ -27,6 +27,7 @@ struct rpc_inode { int pipelen; int nreaders; int nwriters; + int nkern_readwriters; wait_queue_head_t waitq; #define RPC_PIPE_WAIT_FOR_OPEN 1 int flags; -- cgit v1.2.2 From 3ab9bb7243489f9db3abf3d05521ddfc6b184c0a Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 9 Jun 2007 15:41:42 -0400 Subject: SUNRPC: Fix a memory leak in the auth credcache code The leak only affects the RPCSEC_GSS caches, since they are the only ones that are dynamically allocated... Rename the existing rpcauth_free_credcache() to rpcauth_clear_credcache() in order to better describe its role, then add a new function rpcauth_destroy_credcache() that actually frees the cache in addition to clearing it out. Also move the call to destroy the credcache in gss_destroy() to come before the rpc upcall pipe is unlinked. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index 8ef27afeea..3972b8414c 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -143,7 +143,8 @@ int rpcauth_refreshcred(struct rpc_task *); void rpcauth_invalcred(struct rpc_task *); int rpcauth_uptodatecred(struct rpc_task *); int rpcauth_init_credcache(struct rpc_auth *, unsigned long); -void rpcauth_free_credcache(struct rpc_auth *); +void rpcauth_destroy_credcache(struct rpc_auth *); +void rpcauth_clear_credcache(struct rpc_cred_cache *); static inline struct rpc_cred * get_rpccred(struct rpc_cred *cred) -- cgit v1.2.2 From 64c91a1f1c8bc4295fd6b90df8adf911a7dd64f4 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 23 Jun 2007 10:17:16 -0400 Subject: SUNRPC: Make rpc_ping() static Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index a451351c7e..a0e51e1932 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -136,7 +136,6 @@ void rpc_clnt_sigunmask(struct rpc_clnt *clnt, sigset_t *oldset); void rpc_setbufsize(struct rpc_clnt *, unsigned int, unsigned int); size_t rpc_max_payload(struct rpc_clnt *); void rpc_force_rebind(struct rpc_clnt *); -int rpc_ping(struct rpc_clnt *clnt, int flags); size_t rpc_peeraddr(struct rpc_clnt *, struct sockaddr *, size_t); char * rpc_peeraddr2str(struct rpc_clnt *, enum rpc_display_format_t); -- cgit v1.2.2 From 5e1550d6a2c2dd33ff0ca5febefd8e9c65c6ca1e Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 23 Jun 2007 10:17:16 -0400 Subject: SUNRPC: Add the helper function 'rpc_call_null()' Does a NULL RPC call and returns a pointer to the resulting rpc_task. The call may be either synchronous or asynchronous. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index a0e51e1932..097984b038 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -130,6 +130,8 @@ int rpc_call_async(struct rpc_clnt *clnt, struct rpc_message *msg, void *calldata); int rpc_call_sync(struct rpc_clnt *clnt, struct rpc_message *msg, int flags); +struct rpc_task *rpc_call_null(struct rpc_clnt *clnt, struct rpc_cred *cred, + int flags); void rpc_restart_call(struct rpc_task *); void rpc_clnt_sigmask(struct rpc_clnt *clnt, sigset_t *oldset); void rpc_clnt_sigunmask(struct rpc_clnt *clnt, sigset_t *oldset); -- cgit v1.2.2 From de7a8ce38aea529876db3890b61947bc4bc004da Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 23 Jun 2007 10:46:47 -0400 Subject: SUNRPC: Rename rpcauth_destroy() to rpcauth_release() Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index 3972b8414c..bc77c73032 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -128,7 +128,7 @@ extern struct rpc_authops authdes_ops; int rpcauth_register(struct rpc_authops *); int rpcauth_unregister(struct rpc_authops *); struct rpc_auth * rpcauth_create(rpc_authflavor_t, struct rpc_clnt *); -void rpcauth_destroy(struct rpc_auth *); +void rpcauth_release(struct rpc_auth *); struct rpc_cred * rpcauth_lookup_credcache(struct rpc_auth *, struct auth_cred *, int); struct rpc_cred * rpcauth_lookupcred(struct rpc_auth *, int); struct rpc_cred * rpcauth_bindcred(struct rpc_task *); -- cgit v1.2.2 From f1c0a8615090359d57e096157feb9f900cbb233c Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 23 Jun 2007 20:17:58 -0400 Subject: SUNRPC: Mark auth and cred operation tables as constant. Also do the same for gss_api operation tables. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 15 ++++++--------- include/linux/sunrpc/gss_api.h | 2 +- 2 files changed, 7 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index bc77c73032..e606c28046 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -35,7 +35,7 @@ struct rpc_credops; struct rpc_cred { struct hlist_node cr_hash; /* hash chain */ struct rpc_auth * cr_auth; - struct rpc_credops * cr_ops; + const struct rpc_credops *cr_ops; unsigned long cr_expire; /* when to gc */ atomic_t cr_count; /* ref count */ unsigned short cr_flags; /* various flags */ @@ -73,7 +73,7 @@ struct rpc_auth { unsigned int au_verfsize; unsigned int au_flags; /* various flags */ - struct rpc_authops * au_ops; /* operations */ + const struct rpc_authops *au_ops; /* operations */ rpc_authflavor_t au_flavor; /* pseudoflavor (note may * differ from the flavor in * au_ops->au_flavor in gss @@ -119,14 +119,11 @@ struct rpc_credops { void *, __be32 *, void *); }; -extern struct rpc_authops authunix_ops; -extern struct rpc_authops authnull_ops; -#ifdef CONFIG_SUNRPC_SECURE -extern struct rpc_authops authdes_ops; -#endif +extern const struct rpc_authops authunix_ops; +extern const struct rpc_authops authnull_ops; -int rpcauth_register(struct rpc_authops *); -int rpcauth_unregister(struct rpc_authops *); +int rpcauth_register(const struct rpc_authops *); +int rpcauth_unregister(const struct rpc_authops *); struct rpc_auth * rpcauth_create(rpc_authflavor_t, struct rpc_clnt *); void rpcauth_release(struct rpc_auth *); struct rpc_cred * rpcauth_lookup_credcache(struct rpc_auth *, struct auth_cred *, int); diff --git a/include/linux/sunrpc/gss_api.h b/include/linux/sunrpc/gss_api.h index 5eca9e4420..bbac101ac3 100644 --- a/include/linux/sunrpc/gss_api.h +++ b/include/linux/sunrpc/gss_api.h @@ -77,7 +77,7 @@ struct gss_api_mech { struct module *gm_owner; struct xdr_netobj gm_oid; char *gm_name; - struct gss_api_ops *gm_ops; + const struct gss_api_ops *gm_ops; /* pseudoflavors supported by this mechanism: */ int gm_pf_num; struct pf_desc * gm_pfs; -- cgit v1.2.2 From 5fe4755e2526a2aa82b7ed8daeb3aed74a236925 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 23 Jun 2007 19:55:31 -0400 Subject: SUNRPC: Clean up rpc credential initialisation Add a helper rpc_cred_init() Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 1 + include/linux/sunrpc/auth_gss.h | 5 ----- 2 files changed, 1 insertion(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index e606c28046..d5bfc67461 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -127,6 +127,7 @@ int rpcauth_unregister(const struct rpc_authops *); struct rpc_auth * rpcauth_create(rpc_authflavor_t, struct rpc_clnt *); void rpcauth_release(struct rpc_auth *); struct rpc_cred * rpcauth_lookup_credcache(struct rpc_auth *, struct auth_cred *, int); +void rpcauth_init_cred(struct rpc_cred *, const struct auth_cred *, struct rpc_auth *, const struct rpc_credops *); struct rpc_cred * rpcauth_lookupcred(struct rpc_auth *, int); struct rpc_cred * rpcauth_bindcred(struct rpc_task *); void rpcauth_holdcred(struct rpc_task *); diff --git a/include/linux/sunrpc/auth_gss.h b/include/linux/sunrpc/auth_gss.h index 2db2fbf349..0bd1d06777 100644 --- a/include/linux/sunrpc/auth_gss.h +++ b/include/linux/sunrpc/auth_gss.h @@ -85,11 +85,6 @@ struct gss_cred { struct gss_upcall_msg *gc_upcall; }; -#define gc_uid gc_base.cr_uid -#define gc_count gc_base.cr_count -#define gc_flags gc_base.cr_flags -#define gc_expire gc_base.cr_expire - #endif /* __KERNEL__ */ #endif /* _LINUX_SUNRPC_AUTH_GSS_H */ -- cgit v1.2.2 From fc432dd90760a629c57026e57f65ff80a1a31d2f Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Mon, 25 Jun 2007 10:15:15 -0400 Subject: SUNRPC: Enforce atomic updates of rpc_cred->cr_flags Convert to the use of atomic bitops... Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index d5bfc67461..8586503d5e 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -36,19 +36,19 @@ struct rpc_cred { struct hlist_node cr_hash; /* hash chain */ struct rpc_auth * cr_auth; const struct rpc_credops *cr_ops; - unsigned long cr_expire; /* when to gc */ - atomic_t cr_count; /* ref count */ - unsigned short cr_flags; /* various flags */ #ifdef RPC_DEBUG unsigned long cr_magic; /* 0x0f4aa4f0 */ #endif + unsigned long cr_expire; /* when to gc */ + unsigned long cr_flags; /* various flags */ + atomic_t cr_count; /* ref count */ uid_t cr_uid; /* per-flavor data */ }; -#define RPCAUTH_CRED_NEW 0x0001 -#define RPCAUTH_CRED_UPTODATE 0x0002 +#define RPCAUTH_CRED_NEW 0 +#define RPCAUTH_CRED_UPTODATE 1 #define RPCAUTH_CRED_MAGIC 0x0f4aa4f0 -- cgit v1.2.2 From e092bdcd939416ef911090890096fe07d0281a5e Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sat, 23 Jun 2007 19:45:36 -0400 Subject: SUNRPC: cleanup rpc credential cache garbage collection Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index 8586503d5e..4e78f0c5f0 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -34,6 +34,7 @@ struct rpc_auth; struct rpc_credops; struct rpc_cred { struct hlist_node cr_hash; /* hash chain */ + struct list_head cr_lru; /* lru garbage collection */ struct rpc_auth * cr_auth; const struct rpc_credops *cr_ops; #ifdef RPC_DEBUG -- cgit v1.2.2 From 31be5bf15f3dafffce110eb1afadccbf2e3067b4 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sun, 24 Jun 2007 15:55:26 -0400 Subject: SUNRPC: Convert the credcache lookup code to use RCU Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index 4e78f0c5f0..5974e8a493 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -16,6 +16,7 @@ #include #include +#include /* size of the nodename buffer */ #define UNX_MAXNODENAME 32 @@ -35,6 +36,7 @@ struct rpc_credops; struct rpc_cred { struct hlist_node cr_hash; /* hash chain */ struct list_head cr_lru; /* lru garbage collection */ + struct rcu_head cr_rcu; struct rpc_auth * cr_auth; const struct rpc_credops *cr_ops; #ifdef RPC_DEBUG @@ -50,6 +52,7 @@ struct rpc_cred { }; #define RPCAUTH_CRED_NEW 0 #define RPCAUTH_CRED_UPTODATE 1 +#define RPCAUTH_CRED_HASHED 2 #define RPCAUTH_CRED_MAGIC 0x0f4aa4f0 -- cgit v1.2.2 From 9499b4341b56935f61af9e7e354e7d11e70f5258 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Sun, 24 Jun 2007 15:57:57 -0400 Subject: SUNRPC: Give credential cache a local spinlock Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index 5974e8a493..e5a3b5141e 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -63,6 +63,7 @@ struct rpc_cred { #define RPC_CREDCACHE_MASK (RPC_CREDCACHE_NR - 1) struct rpc_cred_cache { struct hlist_head hashtable[RPC_CREDCACHE_NR]; + spinlock_t lock; unsigned long nextgc; /* next garbage collection */ unsigned long expire; /* cache expiry interval */ }; @@ -126,6 +127,8 @@ struct rpc_credops { extern const struct rpc_authops authunix_ops; extern const struct rpc_authops authnull_ops; +void __init rpc_init_authunix(void); + int rpcauth_register(const struct rpc_authops *); int rpcauth_unregister(const struct rpc_authops *); struct rpc_auth * rpcauth_create(rpc_authflavor_t, struct rpc_clnt *); -- cgit v1.2.2 From f5c2187cfef628784d8a09b6d0f77888246d0c0f Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Mon, 25 Jun 2007 17:11:20 -0400 Subject: SUNRPC: Convert the credential garbage collector into a shrinker callback Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/auth.h b/include/linux/sunrpc/auth.h index e5a3b5141e..7a69ca3beb 100644 --- a/include/linux/sunrpc/auth.h +++ b/include/linux/sunrpc/auth.h @@ -64,8 +64,6 @@ struct rpc_cred { struct rpc_cred_cache { struct hlist_head hashtable[RPC_CREDCACHE_NR]; spinlock_t lock; - unsigned long nextgc; /* next garbage collection */ - unsigned long expire; /* cache expiry interval */ }; struct rpc_authops; @@ -128,6 +126,8 @@ extern const struct rpc_authops authunix_ops; extern const struct rpc_authops authnull_ops; void __init rpc_init_authunix(void); +void __init rpcauth_init_module(void); +void __exit rpcauth_remove_module(void); int rpcauth_register(const struct rpc_authops *); int rpcauth_unregister(const struct rpc_authops *); @@ -147,7 +147,7 @@ int rpcauth_unwrap_resp(struct rpc_task *task, kxdrproc_t decode, void *rqstp, int rpcauth_refreshcred(struct rpc_task *); void rpcauth_invalcred(struct rpc_task *); int rpcauth_uptodatecred(struct rpc_task *); -int rpcauth_init_credcache(struct rpc_auth *, unsigned long); +int rpcauth_init_credcache(struct rpc_auth *); void rpcauth_destroy_credcache(struct rpc_auth *); void rpcauth_clear_credcache(struct rpc_cred_cache *); -- cgit v1.2.2 From 5d28dc82074f1e64b22c9424b161abc1f5d6bcdb Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Tue, 26 Jun 2007 19:18:38 -0400 Subject: SUNRPC: Convert gss_ctx_lock to an RCU lock Signed-off-by: Trond Myklebust --- include/linux/sunrpc/auth_gss.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/sunrpc/auth_gss.h b/include/linux/sunrpc/auth_gss.h index 0bd1d06777..67658e17a3 100644 --- a/include/linux/sunrpc/auth_gss.h +++ b/include/linux/sunrpc/auth_gss.h @@ -75,6 +75,7 @@ struct gss_cl_ctx { struct xdr_netobj gc_wire_ctx; u32 gc_win; unsigned long gc_expiry; + struct rcu_head gc_rcu; }; struct gss_upcall_msg; -- cgit v1.2.2 From 1be27f36601973815171db684c711d30557cf50c Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Wed, 27 Jun 2007 14:29:04 -0400 Subject: SUNRPC: Remove the tk_auth macro... We should almost always be deferencing the rpc_auth struct by means of the credential's cr_auth field instead of the rpc_clnt->cl_auth anyway. Fix up that historical mistake, and remove the macro that propagated it. Signed-off-by: Trond Myklebust --- include/linux/sunrpc/sched.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/sunrpc/sched.h b/include/linux/sunrpc/sched.h index 3387b008cd..8ea077db00 100644 --- a/include/linux/sunrpc/sched.h +++ b/include/linux/sunrpc/sched.h @@ -98,7 +98,6 @@ struct rpc_task { unsigned short tk_pid; /* debugging aid */ #endif }; -#define tk_auth tk_client->cl_auth #define tk_xprt tk_client->cl_xprt /* support walking a list of tasks on a wait queue */ -- cgit v1.2.2 From 587142f85f796cf0b823dd3080e815f02ff6b952 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Mon, 2 Jul 2007 09:57:54 -0400 Subject: NFS: Replace NFS_I(inode)->req_lock with inode->i_lock There is no justification for keeping a special spinlock for the exclusive use of the NFS writeback code. Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index bf24151d63..cf395351cd 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -156,7 +156,6 @@ struct nfs_inode { /* * This is the list of dirty unwritten pages. */ - spinlock_t req_lock; struct radix_tree_root nfs_page_tree; unsigned long ncommit, -- cgit v1.2.2 From 7af654f8d1b7460415af5d1d326233478dd0f563 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Mon, 2 Jul 2007 12:49:23 -0400 Subject: NFSv4: Don't reuse expired nfs4_state_owner structs That just confuses certain NFSv4 servers. Signed-off-by: Trond Myklebust --- include/linux/nfs_fs_sb.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h index 144d955dc4..2cef0a68aa 100644 --- a/include/linux/nfs_fs_sb.h +++ b/include/linux/nfs_fs_sb.h @@ -44,8 +44,6 @@ struct nfs_client { struct list_head cl_delegations; struct list_head cl_state_owners; - struct list_head cl_unused; - int cl_nunused; spinlock_t cl_lock; unsigned long cl_lease_time; -- cgit v1.2.2 From 9f958ab8858c75df800e0121b1920182820cbc39 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Mon, 2 Jul 2007 13:58:33 -0400 Subject: NFSv4: Reduce the chances of an open_owner identifier collision Currently we just use a 32-bit counter. Signed-off-by: Trond Myklebust --- include/linux/nfs_fs_sb.h | 5 +++-- include/linux/nfs_xdr.h | 4 ++-- 2 files changed, 5 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_fs_sb.h b/include/linux/nfs_fs_sb.h index 2cef0a68aa..0cac49bc09 100644 --- a/include/linux/nfs_fs_sb.h +++ b/include/linux/nfs_fs_sb.h @@ -34,7 +34,8 @@ struct nfs_client { nfs4_verifier cl_confirm; unsigned long cl_state; - u32 cl_lockowner_id; + struct rb_root cl_openowner_id; + struct rb_root cl_lockowner_id; /* * The following rwsem ensures exclusive access to the server @@ -43,7 +44,7 @@ struct nfs_client { struct rw_semaphore cl_sem; struct list_head cl_delegations; - struct list_head cl_state_owners; + struct rb_root cl_state_owners; spinlock_t cl_lock; unsigned long cl_lease_time; diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h index f7100df3a6..38d77681cf 100644 --- a/include/linux/nfs_xdr.h +++ b/include/linux/nfs_xdr.h @@ -119,7 +119,7 @@ struct nfs_openargs { struct nfs_seqid * seqid; int open_flags; __u64 clientid; - __u32 id; + __u64 id; union { struct iattr * attrs; /* UNCHECKED, GUARDED */ nfs4_verifier verifier; /* EXCLUSIVE */ @@ -181,7 +181,7 @@ struct nfs_closeres { * */ struct nfs_lowner { __u64 clientid; - u32 id; + __u64 id; }; struct nfs_lock_args { -- cgit v1.2.2 From 412c77cee6d6e73fbe1dc3d67f52163efed33fc4 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Tue, 3 Jul 2007 16:10:55 -0400 Subject: NFSv4: Defer inode revalidation when setting up a delegation Currently we force a synchronous call to __nfs_revalidate_inode() in nfs_inode_set_delegation(). This not only ensures that we cannot call nfs_inode_set_delegation from an asynchronous context, but it also slows down any call to open(). Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index cf395351cd..e94971040d 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -184,6 +184,7 @@ struct nfs_inode { #define NFS_INO_INVALID_ACCESS 0x0008 /* cached access cred invalid */ #define NFS_INO_INVALID_ACL 0x0010 /* cached acls are invalid */ #define NFS_INO_REVAL_PAGECACHE 0x0020 /* must revalidate pagecache */ +#define NFS_INO_REVAL_FORCED 0x0040 /* force revalidation ignoring a delegation */ /* * Bit offsets in flags field -- cgit v1.2.2 From 433c92379d9c2c59c2ebc7628fe4fb02cfc2daf8 Mon Sep 17 00:00:00 2001 From: Chuck Lever Date: Sun, 1 Jul 2007 12:12:14 -0400 Subject: NFS: Clean up nfs_size_to_loff_t() Use the same file size limit that lockd uses. Signed-off-by: Chuck Lever Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index e94971040d..7deb5b0347 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -503,12 +503,10 @@ extern int nfsroot_mount(struct sockaddr_in *, char *, struct nfs_fh *, * inline functions */ -static inline loff_t -nfs_size_to_loff_t(__u64 size) +static inline loff_t nfs_size_to_loff_t(__u64 size) { - loff_t maxsz = (((loff_t) ULONG_MAX) << PAGE_CACHE_SHIFT) + PAGE_CACHE_SIZE - 1; - if (size > maxsz) - return maxsz; + if (size > (__u64) OFFSET_MAX - 1) + return OFFSET_MAX - 1; return (loff_t) size; } -- cgit v1.2.2 From 5680d48be88d12cd987e5579a6072a4ca34ca6ea Mon Sep 17 00:00:00 2001 From: Chuck Lever Date: Sun, 1 Jul 2007 12:12:24 -0400 Subject: NFS: Clean-up: Define macros for maximum host and export path name lengths Signed-off-by: Chuck Lever Signed-off-by: Trond Myklebust --- include/linux/nfs_mount.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/nfs_mount.h b/include/linux/nfs_mount.h index cc8b9c59ac..0b82a17c70 100644 --- a/include/linux/nfs_mount.h +++ b/include/linux/nfs_mount.h @@ -37,7 +37,7 @@ struct nfs_mount_data { int acdirmin; /* 1 */ int acdirmax; /* 1 */ struct sockaddr_in addr; /* 1 */ - char hostname[256]; /* 1 */ + char hostname[NFS_MAXNAMLEN + 1]; /* 1 */ int namlen; /* 2 */ unsigned int bsize; /* 3 */ struct nfs3_fh root; /* 4 */ -- cgit v1.2.2 From f18289931d705f9c4634b361341a1677bea97aca Mon Sep 17 00:00:00 2001 From: Chuck Lever Date: Sun, 1 Jul 2007 12:12:51 -0400 Subject: NFS: Add a new NFS debugging flag just for mount processing Note to self: fix up /usr/sbin/rpcdebug too Signed-off-by: Chuck Lever Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 7deb5b0347..04f659f1e5 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -553,6 +553,7 @@ extern void * nfs_root_data(void); #define NFSDBG_ROOT 0x0080 #define NFSDBG_CALLBACK 0x0100 #define NFSDBG_CLIENT 0x0200 +#define NFSDBG_MOUNT 0x0400 #define NFSDBG_ALL 0xFFFF #ifdef __KERNEL__ -- cgit v1.2.2 From cce63cd6374e6f1b4ea897ece1454feb13993d7c Mon Sep 17 00:00:00 2001 From: Chuck Lever Date: Sun, 1 Jul 2007 12:13:12 -0400 Subject: SUNRPC: Rename rpcb_getport_external routine In preparation for handling NFS mount option parsing in the kernel, rename rpcb_getport_external as rpcb_get_port_sync, and make it available always (instead of only when CONFIG_ROOT_NFS is enabled). Signed-off-by: Chuck Lever Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index 097984b038..b28d919c77 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -120,8 +120,10 @@ struct rpc_clnt *rpc_bind_new_program(struct rpc_clnt *, struct rpc_clnt *rpc_clone_client(struct rpc_clnt *); void rpc_shutdown_client(struct rpc_clnt *); void rpc_release_client(struct rpc_clnt *); + int rpcb_register(u32, u32, int, unsigned short, int *); void rpcb_getport(struct rpc_task *); +int rpcb_getport_sync(struct sockaddr_in *, __u32, __u32, int); void rpc_call_setup(struct rpc_task *, struct rpc_message *, int); @@ -141,10 +143,5 @@ void rpc_force_rebind(struct rpc_clnt *); size_t rpc_peeraddr(struct rpc_clnt *, struct sockaddr *, size_t); char * rpc_peeraddr2str(struct rpc_clnt *, enum rpc_display_format_t); -/* - * Helper function for NFSroot support - */ -int rpcb_getport_external(struct sockaddr_in *, __u32, __u32, int); - #endif /* __KERNEL__ */ #endif /* _LINUX_SUNRPC_CLNT_H */ -- cgit v1.2.2 From 45160d6275814e0c86206e6981f0b92c61a50a21 Mon Sep 17 00:00:00 2001 From: Chuck Lever Date: Sun, 1 Jul 2007 12:13:17 -0400 Subject: SUNRPC: Rename rpcb_getport to be consistent with new rpcb_getport_sync name Clean up, for consistency. Rename rpcb_getport as rpcb_getport_async, to match the naming scheme of rpcb_getport_sync. Signed-off-by: Chuck Lever Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index b28d919c77..c1b37972b0 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -122,8 +122,8 @@ void rpc_shutdown_client(struct rpc_clnt *); void rpc_release_client(struct rpc_clnt *); int rpcb_register(u32, u32, int, unsigned short, int *); -void rpcb_getport(struct rpc_task *); int rpcb_getport_sync(struct sockaddr_in *, __u32, __u32, int); +void rpcb_getport_async(struct rpc_task *); void rpc_call_setup(struct rpc_task *, struct rpc_message *, int); -- cgit v1.2.2 From 3ea97309e6b18bce200211b3f9188e8023321adc Mon Sep 17 00:00:00 2001 From: Chuck Lever Date: Sun, 1 Jul 2007 12:13:27 -0400 Subject: NFS: Remake nfsroot_mount as a permanent part of NFS client In preparation for supporting NFSv2 and NFSv3 mount option handling in the kernel NFS client, convert mount_clnt.c to be a permanent part of the NFS client, instead of built only when CONFIG_ROOT_NFS is enabled. In addition, we also replace the "struct sockaddr_in *" argument with something more generic, to help support IPv6 at some later point. Signed-off-by: Chuck Lever Signed-off-by: Trond Myklebust --- include/linux/nfs_fs.h | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h index 04f659f1e5..c098ae194f 100644 --- a/include/linux/nfs_fs.h +++ b/include/linux/nfs_fs.h @@ -494,10 +494,9 @@ static inline void nfs3_forget_cached_acls(struct inode *inode) /* * linux/fs/mount_clnt.c - * (Used only by nfsroot module) */ -extern int nfsroot_mount(struct sockaddr_in *, char *, struct nfs_fh *, - int, int); +extern int nfs_mount(struct sockaddr *, size_t, char *, char *, + int, int, struct nfs_fh *); /* * inline functions -- cgit v1.2.2 From 8007122520f0a3599bdc4df47358a5d83b2574aa Mon Sep 17 00:00:00 2001 From: Chuck Lever Date: Sun, 1 Jul 2007 12:13:59 -0400 Subject: NFS: Add support for mounting NFSv4 file systems with string options Signed-off-by: Chuck Lever Signed-off-by: Trond Myklebust --- include/linux/nfs4_mount.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/nfs4_mount.h b/include/linux/nfs4_mount.h index 26b4c83f83..d8d7480e5a 100644 --- a/include/linux/nfs4_mount.h +++ b/include/linux/nfs4_mount.h @@ -65,6 +65,6 @@ struct nfs4_mount_data { #define NFS4_MOUNT_NOCTO 0x0010 /* 1 */ #define NFS4_MOUNT_NOAC 0x0020 /* 1 */ #define NFS4_MOUNT_STRICTLOCK 0x1000 /* 1 */ -#define NFS4_MOUNT_FLAGMASK 0xFFFF +#define NFS4_MOUNT_FLAGMASK 0x1033 #endif -- cgit v1.2.2 From 75180df2ed467866ada839fe73cf7cc7d75c0a22 Mon Sep 17 00:00:00 2001 From: Trond Myklebust Date: Wed, 16 May 2007 16:53:28 -0400 Subject: NFS: Add the mount option "nosharecache" Prior to David Howell's mount changes in 2.6.18, users who mounted different directories which happened to be from the same filesystem on the server would get different super blocks, and hence could choose different mount options. As long as there were no hard linked files that crossed from one subtree to another, this was quite safe. Post the changes, if the two directories are on the same filesystem (have the same 'fsid'), they will share the same super block, and hence the same mount options. Add a flag to allow users to elect not to share the NFS super block with another mount point, even if the fsids are the same. This will allow users to set different mount options for the two different super blocks, as was previously possible. It is still up to the user to ensure that there are no cache coherency issues when doing this, however the default behaviour will be to share super blocks whenever two paths result in the same fsid. Signed-off-by: Trond Myklebust --- include/linux/nfs4_mount.h | 3 ++- include/linux/nfs_mount.h | 1 + 2 files changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/nfs4_mount.h b/include/linux/nfs4_mount.h index d8d7480e5a..a0dcf66556 100644 --- a/include/linux/nfs4_mount.h +++ b/include/linux/nfs4_mount.h @@ -65,6 +65,7 @@ struct nfs4_mount_data { #define NFS4_MOUNT_NOCTO 0x0010 /* 1 */ #define NFS4_MOUNT_NOAC 0x0020 /* 1 */ #define NFS4_MOUNT_STRICTLOCK 0x1000 /* 1 */ -#define NFS4_MOUNT_FLAGMASK 0x1033 +#define NFS4_MOUNT_UNSHARED 0x8000 /* 1 */ +#define NFS4_MOUNT_FLAGMASK 0x9033 #endif diff --git a/include/linux/nfs_mount.h b/include/linux/nfs_mount.h index 0b82a17c70..a3ade89a64 100644 --- a/include/linux/nfs_mount.h +++ b/include/linux/nfs_mount.h @@ -62,6 +62,7 @@ struct nfs_mount_data { #define NFS_MOUNT_STRICTLOCK 0x1000 /* reserved for NFSv4 */ #define NFS_MOUNT_SECFLAVOUR 0x2000 /* 5 */ #define NFS_MOUNT_NORDIRPLUS 0x4000 /* 5 */ +#define NFS_MOUNT_UNSHARED 0x8000 /* 5 */ #define NFS_MOUNT_FLAGMASK 0xFFFF #endif -- cgit v1.2.2 From 96802a095171f5b35cf0e1e0d4be943e6696a253 Mon Sep 17 00:00:00 2001 From: Frank van Maarseveen Date: Sun, 8 Jul 2007 13:08:54 +0200 Subject: SUNRPC: cleanup transport creation argument passing Cleanup argument passing to functions for creating an RPC transport. Signed-off-by: Frank van Maarseveen Signed-off-by: Trond Myklebust --- include/linux/sunrpc/xprt.h | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h index 34f7590506..ea828b09e4 100644 --- a/include/linux/sunrpc/xprt.h +++ b/include/linux/sunrpc/xprt.h @@ -17,6 +17,8 @@ #include #include +#ifdef __KERNEL__ + extern unsigned int xprt_udp_slot_table_entries; extern unsigned int xprt_tcp_slot_table_entries; @@ -194,7 +196,12 @@ struct rpc_xprt { char * address_strings[RPC_DISPLAY_MAX]; }; -#ifdef __KERNEL__ +struct rpc_xprtsock_create { + int proto; /* IPPROTO_UDP or IPPROTO_TCP */ + struct sockaddr * dstaddr; /* remote peer address */ + size_t addrlen; + struct rpc_timeout * timeout; /* optional timeout parameters */ +}; /* * Transport operations used by ULPs @@ -204,7 +211,7 @@ void xprt_set_timeout(struct rpc_timeout *to, unsigned int retr, unsigned long /* * Generic internal transport functions */ -struct rpc_xprt * xprt_create_transport(int proto, struct sockaddr *addr, size_t size, struct rpc_timeout *toparms); +struct rpc_xprt * xprt_create_transport(struct rpc_xprtsock_create *args); void xprt_connect(struct rpc_task *task); void xprt_reserve(struct rpc_task *task); int xprt_reserve_xprt(struct rpc_task *task); @@ -242,8 +249,8 @@ void xprt_disconnect(struct rpc_xprt *xprt); /* * Socket transport setup operations */ -struct rpc_xprt * xs_setup_udp(struct sockaddr *addr, size_t addrlen, struct rpc_timeout *to); -struct rpc_xprt * xs_setup_tcp(struct sockaddr *addr, size_t addrlen, struct rpc_timeout *to); +struct rpc_xprt * xs_setup_udp(struct rpc_xprtsock_create *args); +struct rpc_xprt * xs_setup_tcp(struct rpc_xprtsock_create *args); int init_socket_xprt(void); void cleanup_socket_xprt(void); -- cgit v1.2.2 From a97476926ec061f90b77da478620ea6dc71a3237 Mon Sep 17 00:00:00 2001 From: Frank van Maarseveen Date: Mon, 9 Jul 2007 22:21:39 +0200 Subject: SUNRPC server: record the destination address of a request Save the destination address of an incoming request over TCP like is done already for UDP. It is necessary later for callbacks by the server. Signed-off-by: Frank van Maarseveen Signed-off-by: Trond Myklebust --- include/linux/sunrpc/svcsock.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/sunrpc/svcsock.h b/include/linux/sunrpc/svcsock.h index e21dd93ac4..a53e0fa855 100644 --- a/include/linux/sunrpc/svcsock.h +++ b/include/linux/sunrpc/svcsock.h @@ -59,6 +59,7 @@ struct svc_sock { /* cache of various info for TCP sockets */ void *sk_info_authunix; + struct sockaddr_storage sk_local; /* local address */ struct sockaddr_storage sk_remote; /* remote peer's address */ int sk_remotelen; /* length of address */ }; -- cgit v1.2.2 From d3bc9a1deb8964d774af8535814cb91bf8f6def0 Mon Sep 17 00:00:00 2001 From: Frank van Maarseveen Date: Mon, 9 Jul 2007 22:23:35 +0200 Subject: SUNRPC client: add interface for binding to a local address In addition to binding to a local privileged port the NFS client should allow binding to a specific local address. This is used by the server for callbacks. The patch adds the necessary interface. Signed-off-by: Frank van Maarseveen Signed-off-by: Trond Myklebust --- include/linux/sunrpc/clnt.h | 1 + include/linux/sunrpc/xprt.h | 1 + 2 files changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/sunrpc/clnt.h b/include/linux/sunrpc/clnt.h index c1b37972b0..c0d9d14983 100644 --- a/include/linux/sunrpc/clnt.h +++ b/include/linux/sunrpc/clnt.h @@ -98,6 +98,7 @@ struct rpc_create_args { int protocol; struct sockaddr *address; size_t addrsize; + struct sockaddr *saddress; struct rpc_timeout *timeout; char *servername; struct rpc_program *program; diff --git a/include/linux/sunrpc/xprt.h b/include/linux/sunrpc/xprt.h index ea828b09e4..d11cedd14f 100644 --- a/include/linux/sunrpc/xprt.h +++ b/include/linux/sunrpc/xprt.h @@ -198,6 +198,7 @@ struct rpc_xprt { struct rpc_xprtsock_create { int proto; /* IPPROTO_UDP or IPPROTO_TCP */ + struct sockaddr * srcaddr; /* optional local address */ struct sockaddr * dstaddr; /* remote peer address */ size_t addrlen; struct rpc_timeout * timeout; /* optional timeout parameters */ -- cgit v1.2.2 From c98451bdb2f3e6d6cc1e03adad641e9497512b49 Mon Sep 17 00:00:00 2001 From: Frank van Maarseveen Date: Mon, 9 Jul 2007 22:25:29 +0200 Subject: NLM: fix source address of callback to client Use the destination address of the original NLM request as the source address in callbacks to the client. Signed-off-by: Frank van Maarseveen Signed-off-by: Trond Myklebust --- include/linux/lockd/lockd.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/lockd/lockd.h b/include/linux/lockd/lockd.h index 05707e2fcc..e2d1ce36b3 100644 --- a/include/linux/lockd/lockd.h +++ b/include/linux/lockd/lockd.h @@ -39,6 +39,7 @@ struct nlm_host { struct hlist_node h_hash; /* doubly linked list */ struct sockaddr_in h_addr; /* peer address */ + struct sockaddr_in h_saddr; /* our address (optional) */ struct rpc_clnt * h_rpcclnt; /* RPC client to talk to peer */ char * h_name; /* remote hostname */ u32 h_version; /* interface version */ -- cgit v1.2.2 From ef222013fc8c1a2fcba5c7ab169be8ffcb778ec4 Mon Sep 17 00:00:00 2001 From: Marcel Holtmann Date: Wed, 11 Jul 2007 06:42:04 +0200 Subject: [Bluetooth] Add hci_recv_fragment() helper function Most drivers must handle fragmented HCI data packets and events. This patch adds a generic function for their reassembly to the Bluetooth core layer and thus allows to shrink the complexity of the drivers. Signed-off-by: Marcel Holtmann --- include/net/bluetooth/hci_core.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h index c0fc39620f..7c78744ec0 100644 --- a/include/net/bluetooth/hci_core.h +++ b/include/net/bluetooth/hci_core.h @@ -109,6 +109,7 @@ struct hci_dev { struct sk_buff_head cmd_q; struct sk_buff *sent_cmd; + struct sk_buff *reassembly[3]; struct semaphore req_lock; wait_queue_head_t req_wait_q; @@ -437,6 +438,8 @@ static inline int hci_recv_frame(struct sk_buff *skb) return 0; } +int hci_recv_fragment(struct hci_dev *hdev, int type, void *data, int count); + int hci_register_sysfs(struct hci_dev *hdev); void hci_unregister_sysfs(struct hci_dev *hdev); void hci_conn_add_sysfs(struct hci_conn *conn); -- cgit v1.2.2 From 2aec5c602c6a44e2a3a173339a9ab94549658e4b Mon Sep 17 00:00:00 2001 From: Sean Hefty Date: Mon, 18 Jun 2007 11:03:58 -0700 Subject: IB/sa: Make sure SA queries use default P_Key MADs sent to the SA should use the the default P_Key (0x7fff/0xffff). There's no requirement that the default P_Key is stored at index 0 in the local P_Key table, so add code to the sa_query module to look up the index of the default P_Key when creating an address handle for the SA (which is done any time the P_Key table might change), and use this index for all SA queries. Signed-off-by: Sean Hefty Signed-off-by: Roland Dreier --- include/rdma/ib_mad.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/rdma/ib_mad.h b/include/rdma/ib_mad.h index 739fa4d0e5..30712ddd8a 100644 --- a/include/rdma/ib_mad.h +++ b/include/rdma/ib_mad.h @@ -111,6 +111,9 @@ #define IB_QP1_QKEY 0x80010000 #define IB_QP_SET_QKEY 0x80000000 +#define IB_DEFAULT_PKEY_PARTIAL 0x7FFF +#define IB_DEFAULT_PKEY_FULL 0xFFFF + enum { IB_MGMT_MAD_HDR = 24, IB_MGMT_MAD_DATA = 232, -- cgit v1.2.2 From 1d84612649427a85e1f311baa7215f9a6252d856 Mon Sep 17 00:00:00 2001 From: Sean Hefty Date: Mon, 18 Jun 2007 11:09:37 -0700 Subject: IB/cm: Include HCA ACK delay in local ACK timeout The IB CM should include the HCA ACK delay when calculating the local ACK timeout value to use for RC QPs. If the HCA ACK delay is large enough relative to the packet life time, then if it is not taken into account, the calculated timeout value ends up being too small, which can result in "retry exceeded" errors. Signed-off-by: Sean Hefty Signed-off-by: Roland Dreier --- include/rdma/ib_cm.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/rdma/ib_cm.h b/include/rdma/ib_cm.h index 5c070176d9..12243e80c7 100644 --- a/include/rdma/ib_cm.h +++ b/include/rdma/ib_cm.h @@ -385,7 +385,6 @@ struct ib_cm_rep_param { u8 private_data_len; u8 responder_resources; u8 initiator_depth; - u8 target_ack_delay; u8 failover_accepted; u8 flow_control; u8 rnr_retry_count; -- cgit v1.2.2 From e06e7c615877026544ad7f8b309d1a3706410383 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sun, 10 Jun 2007 17:22:39 -0700 Subject: [IPV4]: The scheduled removal of multipath cached routing support. With help from Chris Wedgwood. Signed-off-by: David S. Miller --- include/linux/Kbuild | 1 - include/linux/ip_mp_alg.h | 22 ----------- include/linux/rtnetlink.h | 2 +- include/net/dst.h | 1 - include/net/ip_fib.h | 16 -------- include/net/ip_mp_alg.h | 96 ----------------------------------------------- include/net/route.h | 1 - 7 files changed, 1 insertion(+), 138 deletions(-) delete mode 100644 include/linux/ip_mp_alg.h delete mode 100644 include/net/ip_mp_alg.h (limited to 'include') diff --git a/include/linux/Kbuild b/include/linux/Kbuild index afae306b17..d944516827 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -91,7 +91,6 @@ header-y += in6.h header-y += in_route.h header-y += ioctl.h header-y += ipmi_msgdefs.h -header-y += ip_mp_alg.h header-y += ipsec.h header-y += ipx.h header-y += irda.h diff --git a/include/linux/ip_mp_alg.h b/include/linux/ip_mp_alg.h deleted file mode 100644 index e234e2008f..0000000000 --- a/include/linux/ip_mp_alg.h +++ /dev/null @@ -1,22 +0,0 @@ -/* ip_mp_alg.h: IPV4 multipath algorithm support, user-visible values. - * - * Copyright (C) 2004, 2005 Einar Lueck - * Copyright (C) 2005 David S. Miller - */ - -#ifndef _LINUX_IP_MP_ALG_H -#define _LINUX_IP_MP_ALG_H - -enum ip_mp_alg { - IP_MP_ALG_NONE, - IP_MP_ALG_RR, - IP_MP_ALG_DRR, - IP_MP_ALG_RANDOM, - IP_MP_ALG_WRANDOM, - __IP_MP_ALG_MAX -}; - -#define IP_MP_ALG_MAX (__IP_MP_ALG_MAX - 1) - -#endif /* _LINUX_IP_MP_ALG_H */ - diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index 1fae30af91..6127858485 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -261,7 +261,7 @@ enum rtattr_type_t RTA_FLOW, RTA_CACHEINFO, RTA_SESSION, - RTA_MP_ALGO, + RTA_MP_ALGO, /* no longer used */ RTA_TABLE, __RTA_MAX }; diff --git a/include/net/dst.h b/include/net/dst.h index 82270f9332..e9ff4a4cae 100644 --- a/include/net/dst.h +++ b/include/net/dst.h @@ -47,7 +47,6 @@ struct dst_entry #define DST_NOXFRM 2 #define DST_NOPOLICY 4 #define DST_NOHASH 8 -#define DST_BALANCED 0x10 unsigned long expires; unsigned short header_len; /* more space at head required */ diff --git a/include/net/ip_fib.h b/include/net/ip_fib.h index 69252cbe05..8cadc77c7d 100644 --- a/include/net/ip_fib.h +++ b/include/net/ip_fib.h @@ -39,7 +39,6 @@ struct fib_config { int fc_mx_len; int fc_mp_len; u32 fc_flow; - u32 fc_mp_alg; u32 fc_nlflags; struct nl_info fc_nlinfo; }; @@ -85,9 +84,6 @@ struct fib_info { int fib_nhs; #ifdef CONFIG_IP_ROUTE_MULTIPATH int fib_power; -#endif -#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED - u32 fib_mp_alg; #endif struct fib_nh fib_nh[0]; #define fib_dev fib_nh[0].nh_dev @@ -103,10 +99,6 @@ struct fib_result { unsigned char nh_sel; unsigned char type; unsigned char scope; -#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED - __be32 network; - __be32 netmask; -#endif struct fib_info *fi; #ifdef CONFIG_IP_MULTIPLE_TABLES struct fib_rule *r; @@ -145,14 +137,6 @@ struct fib_result_nl { #define FIB_RES_DEV(res) (FIB_RES_NH(res).nh_dev) #define FIB_RES_OIF(res) (FIB_RES_NH(res).nh_oif) -#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED -#define FIB_RES_NETWORK(res) ((res).network) -#define FIB_RES_NETMASK(res) ((res).netmask) -#else /* CONFIG_IP_ROUTE_MULTIPATH_CACHED */ -#define FIB_RES_NETWORK(res) (0) -#define FIB_RES_NETMASK(res) (0) -#endif /* CONFIG_IP_ROUTE_MULTIPATH_WRANDOM */ - struct fib_table { struct hlist_node tb_hlist; u32 tb_id; diff --git a/include/net/ip_mp_alg.h b/include/net/ip_mp_alg.h deleted file mode 100644 index 25b56571e5..0000000000 --- a/include/net/ip_mp_alg.h +++ /dev/null @@ -1,96 +0,0 @@ -/* ip_mp_alg.h: IPV4 multipath algorithm support. - * - * Copyright (C) 2004, 2005 Einar Lueck - * Copyright (C) 2005 David S. Miller - */ - -#ifndef _NET_IP_MP_ALG_H -#define _NET_IP_MP_ALG_H - -#include -#include -#include - -struct fib_nh; - -struct ip_mp_alg_ops { - void (*mp_alg_select_route)(const struct flowi *flp, - struct rtable *rth, struct rtable **rp); - void (*mp_alg_flush)(void); - void (*mp_alg_set_nhinfo)(__be32 network, __be32 netmask, - unsigned char prefixlen, - const struct fib_nh *nh); - void (*mp_alg_remove)(struct rtable *rth); -}; - -extern int multipath_alg_register(struct ip_mp_alg_ops *, enum ip_mp_alg); -extern void multipath_alg_unregister(struct ip_mp_alg_ops *, enum ip_mp_alg); - -extern struct ip_mp_alg_ops *ip_mp_alg_table[]; - -static inline int multipath_select_route(const struct flowi *flp, - struct rtable *rth, - struct rtable **rp) -{ -#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED - struct ip_mp_alg_ops *ops = ip_mp_alg_table[rth->rt_multipath_alg]; - - /* mp_alg_select_route _MUST_ be implemented */ - if (ops && (rth->u.dst.flags & DST_BALANCED)) { - ops->mp_alg_select_route(flp, rth, rp); - return 1; - } -#endif - return 0; -} - -static inline void multipath_flush(void) -{ -#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED - int i; - - for (i = IP_MP_ALG_NONE; i <= IP_MP_ALG_MAX; i++) { - struct ip_mp_alg_ops *ops = ip_mp_alg_table[i]; - - if (ops && ops->mp_alg_flush) - ops->mp_alg_flush(); - } -#endif -} - -static inline void multipath_set_nhinfo(struct rtable *rth, - __be32 network, __be32 netmask, - unsigned char prefixlen, - const struct fib_nh *nh) -{ -#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED - struct ip_mp_alg_ops *ops = ip_mp_alg_table[rth->rt_multipath_alg]; - - if (ops && ops->mp_alg_set_nhinfo) - ops->mp_alg_set_nhinfo(network, netmask, prefixlen, nh); -#endif -} - -static inline void multipath_remove(struct rtable *rth) -{ -#ifdef CONFIG_IP_ROUTE_MULTIPATH_CACHED - struct ip_mp_alg_ops *ops = ip_mp_alg_table[rth->rt_multipath_alg]; - - if (ops && ops->mp_alg_remove && - (rth->u.dst.flags & DST_BALANCED)) - ops->mp_alg_remove(rth); -#endif -} - -static inline int multipath_comparekeys(const struct flowi *flp1, - const struct flowi *flp2) -{ - return flp1->fl4_dst == flp2->fl4_dst && - flp1->fl4_src == flp2->fl4_src && - flp1->oif == flp2->oif && - flp1->mark == flp2->mark && - !((flp1->fl4_tos ^ flp2->fl4_tos) & - (IPTOS_RT_MASK | RTO_ONLINK)); -} - -#endif /* _NET_IP_MP_ALG_H */ diff --git a/include/net/route.h b/include/net/route.h index 749e4dfe5f..188b8936bb 100644 --- a/include/net/route.h +++ b/include/net/route.h @@ -62,7 +62,6 @@ struct rtable unsigned rt_flags; __u16 rt_type; - __u16 rt_multipath_alg; __be32 rt_dst; /* Path destination */ __be32 rt_src; /* Path source */ -- cgit v1.2.2 From 05646c91109bfd129361d57dc5d98464ab6f6578 Mon Sep 17 00:00:00 2001 From: Allan Stephens Date: Sun, 10 Jun 2007 17:25:24 -0700 Subject: [TIPC]: Optimize stream send routine to avoid fragmentation This patch enhances TIPC's stream socket send routine so that it avoids transmitting data in chunks that require fragmentation and reassembly, thereby improving performance at both the sending and receiving ends of the connection. The "maximum packet size" hint that records MTU info allows the socket to decide how big a chunk it should send; in the event that the hint has become stale, fragmentation may still occur, but the data will be passed correctly and the hint will be updated in time for the following send. Note: The 66060 byte pseudo-MTU used for intra-node connections requires the send routine to perform an additional check to ensure it does not exceed TIPC"s limit of 66000 bytes of user data per chunk. Signed-off-by: Allan Stephens Signed-off-by: Jon Paul Maloy Signed-off-by: David S. Miller --- include/net/tipc/tipc_port.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/tipc/tipc_port.h b/include/net/tipc/tipc_port.h index 333bba6dc5..cfc4ba46de 100644 --- a/include/net/tipc/tipc_port.h +++ b/include/net/tipc/tipc_port.h @@ -1,8 +1,8 @@ /* * include/net/tipc/tipc_port.h: Include file for privileged access to TIPC ports * - * Copyright (c) 1994-2006, Ericsson AB - * Copyright (c) 2005, Wind River Systems + * Copyright (c) 1994-2007, Ericsson AB + * Copyright (c) 2005-2007, Wind River Systems * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -55,6 +55,7 @@ * @conn_unacked: number of unacknowledged messages received from peer port * @published: non-zero if port has one or more associated names * @congested: non-zero if cannot send because of link or port congestion + * @max_pkt: maximum packet size "hint" used when building messages sent by port * @ref: unique reference to port in TIPC object registry * @phdr: preformatted message header used when sending messages */ @@ -68,6 +69,7 @@ struct tipc_port { u32 conn_unacked; int published; u32 congested; + u32 max_pkt; u32 ref; struct tipc_msg phdr; }; -- cgit v1.2.2 From 8de0a15483b357d0f0b821330ec84d1660cadc4e Mon Sep 17 00:00:00 2001 From: Ville Tervo Date: Wed, 11 Jul 2007 09:23:41 +0200 Subject: [Bluetooth] Keep rfcomm_dev on the list until it is freed This patch changes the RFCOMM TTY release process so that the TTY is kept on the list until it is really freed. A new device flag is used to keep track of released TTYs. Signed-off-by: Ville Tervo Signed-off-by: Marcel Holtmann --- include/net/bluetooth/rfcomm.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/net/bluetooth/rfcomm.h b/include/net/bluetooth/rfcomm.h index 3c563f0290..25aa575db8 100644 --- a/include/net/bluetooth/rfcomm.h +++ b/include/net/bluetooth/rfcomm.h @@ -323,6 +323,7 @@ int rfcomm_connect_ind(struct rfcomm_session *s, u8 channel, struct rfcomm_dlc #define RFCOMM_RELEASE_ONHUP 1 #define RFCOMM_HANGUP_NOW 2 #define RFCOMM_TTY_ATTACHED 3 +#define RFCOMM_TTY_RELEASED 4 struct rfcomm_dev_req { s16 dev_id; -- cgit v1.2.2 From 8c7b7faaa630fef7f68d8728cee1cce398cc9697 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Tue, 10 Jul 2007 22:08:12 -0700 Subject: [NET]: Kill eth_copy_and_sum(). It hasn't "summed" anything in over 7 years, and it's just a straight mempcy ala skb_copy_to_linear_data() so just get rid of it. Signed-off-by: David S. Miller --- include/linux/etherdevice.h | 6 ------ 1 file changed, 6 deletions(-) (limited to 'include') diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h index 071c67abed..f48eb89efd 100644 --- a/include/linux/etherdevice.h +++ b/include/linux/etherdevice.h @@ -40,12 +40,6 @@ extern int eth_header_cache(struct neighbour *neigh, struct hh_cache *hh); extern struct net_device *alloc_etherdev(int sizeof_priv); -static inline void eth_copy_and_sum (struct sk_buff *dest, - const unsigned char *src, - int len, int base) -{ - memcpy (dest->data, src, len); -} /** * is_zero_ether_addr - Determine if give Ethernet address is all zeros. -- cgit v1.2.2 From 6472ce6096bf27d85a1f2580964a36f290bd60a9 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 13 Jun 2007 12:03:21 -0700 Subject: [NET]: Mark struct net_device * argument to netdev_priv const Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netdevice.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 3a70f553b2..94cc77cd3a 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -546,7 +546,7 @@ struct net_device #define NETDEV_ALIGN 32 #define NETDEV_ALIGN_CONST (NETDEV_ALIGN - 1) -static inline void *netdev_priv(struct net_device *dev) +static inline void *netdev_priv(const struct net_device *dev) { return (char *)dev + ((sizeof(struct net_device) + NETDEV_ALIGN_CONST) -- cgit v1.2.2 From 38f7b870d4a6a5d3ec21557e849620cb7d032965 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 13 Jun 2007 12:03:51 -0700 Subject: [RTNETLINK]: Link creation API Add rtnetlink API for creating, changing and deleting software devices. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/if_link.h | 13 +++++++++++ include/linux/netdevice.h | 3 +++ include/net/rtnetlink.h | 58 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 74 insertions(+) (limited to 'include') diff --git a/include/linux/if_link.h b/include/linux/if_link.h index 604c2434f7..3144babd23 100644 --- a/include/linux/if_link.h +++ b/include/linux/if_link.h @@ -76,6 +76,8 @@ enum #define IFLA_WEIGHT IFLA_WEIGHT IFLA_OPERSTATE, IFLA_LINKMODE, + IFLA_LINKINFO, +#define IFLA_LINKINFO IFLA_LINKINFO __IFLA_MAX }; @@ -140,4 +142,15 @@ struct ifla_cacheinfo __u32 retrans_time; }; +enum +{ + IFLA_INFO_UNSPEC, + IFLA_INFO_KIND, + IFLA_INFO_DATA, + IFLA_INFO_XSTATS, + __IFLA_INFO_MAX, +}; + +#define IFLA_INFO_MAX (__IFLA_INFO_MAX - 1) + #endif /* _LINUX_IF_LINK_H */ diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 94cc77cd3a..e7913ee558 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -540,6 +540,9 @@ struct net_device struct device dev; /* space for optional statistics and wireless sysfs groups */ struct attribute_group *sysfs_groups[3]; + + /* rtnetlink link ops */ + const struct rtnl_link_ops *rtnl_link_ops; }; #define to_net_dev(d) container_of(d, struct net_device, dev) diff --git a/include/net/rtnetlink.h b/include/net/rtnetlink.h index 3b3d474561..3861c05cdf 100644 --- a/include/net/rtnetlink.h +++ b/include/net/rtnetlink.h @@ -22,4 +22,62 @@ static inline int rtnl_msg_family(struct nlmsghdr *nlh) return AF_UNSPEC; } +/** + * struct rtnl_link_ops - rtnetlink link operations + * + * @list: Used internally + * @kind: Identifier + * @maxtype: Highest device specific netlink attribute number + * @policy: Netlink policy for device specific attribute validation + * @validate: Optional validation function for netlink/changelink parameters + * @priv_size: sizeof net_device private space + * @setup: net_device setup function + * @newlink: Function for configuring and registering a new device + * @changelink: Function for changing parameters of an existing device + * @dellink: Function to remove a device + * @get_size: Function to calculate required room for dumping device + * specific netlink attributes + * @fill_info: Function to dump device specific netlink attributes + * @get_xstats_size: Function to calculate required room for dumping devic + * specific statistics + * @fill_xstats: Function to dump device specific statistics + */ +struct rtnl_link_ops { + struct list_head list; + + const char *kind; + + size_t priv_size; + void (*setup)(struct net_device *dev); + + int maxtype; + const struct nla_policy *policy; + int (*validate)(struct nlattr *tb[], + struct nlattr *data[]); + + int (*newlink)(struct net_device *dev, + struct nlattr *tb[], + struct nlattr *data[]); + int (*changelink)(struct net_device *dev, + struct nlattr *tb[], + struct nlattr *data[]); + void (*dellink)(struct net_device *dev); + + size_t (*get_size)(const struct net_device *dev); + int (*fill_info)(struct sk_buff *skb, + const struct net_device *dev); + + size_t (*get_xstats_size)(const struct net_device *dev); + int (*fill_xstats)(struct sk_buff *skb, + const struct net_device *dev); +}; + +extern int __rtnl_link_register(struct rtnl_link_ops *ops); +extern void __rtnl_link_unregister(struct rtnl_link_ops *ops); + +extern int rtnl_link_register(struct rtnl_link_ops *ops); +extern void rtnl_link_unregister(struct rtnl_link_ops *ops); + +#define MODULE_ALIAS_RTNL_LINK(kind) MODULE_ALIAS("rtnl-link-" kind) + #endif -- cgit v1.2.2 From 734423cf38021966a5d3bd5f5c6aaecaf32fb4ac Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 13 Jun 2007 12:07:07 -0700 Subject: [VLAN]: Use 32 bit value for skb->priority mapping skb->priority has only 32 bits and even VLAN uses 32 bit values in its API. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/if_vlan.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h index 81e9bc9356..aeddb49193 100644 --- a/include/linux/if_vlan.h +++ b/include/linux/if_vlan.h @@ -99,7 +99,7 @@ static inline void vlan_group_set_device(struct vlan_group *vg, int vlan_id, } struct vlan_priority_tci_mapping { - unsigned long priority; + u32 priority; unsigned short vlan_qos; /* This should be shifted when first set, so we only do it * at provisioning time. * ((skb->priority << 13) & 0xE000) @@ -112,7 +112,7 @@ struct vlan_dev_info { /** This will be the mapping that correlates skb->priority to * 3 bits of VLAN QOS tags... */ - unsigned long ingress_priority_map[8]; + u32 ingress_priority_map[8]; struct vlan_priority_tci_mapping *egress_priority_map[16]; /* hash table */ unsigned short vlan_id; /* The VLAN Identifier for this interface. */ -- cgit v1.2.2 From b020cb488586f982f40eb257a32e92a4de710d65 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 13 Jun 2007 12:07:22 -0700 Subject: [VLAN]: Keep track of number of QoS mappings Keep track of the number of configured ingress/egress QoS mappings to avoid iteration while calculating the netlink attribute size. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/if_vlan.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h index aeddb49193..b46d4225f7 100644 --- a/include/linux/if_vlan.h +++ b/include/linux/if_vlan.h @@ -112,7 +112,10 @@ struct vlan_dev_info { /** This will be the mapping that correlates skb->priority to * 3 bits of VLAN QOS tags... */ + unsigned int nr_ingress_mappings; u32 ingress_priority_map[8]; + + unsigned int nr_egress_mappings; struct vlan_priority_tci_mapping *egress_priority_map[16]; /* hash table */ unsigned short vlan_id; /* The VLAN Identifier for this interface. */ -- cgit v1.2.2 From a4bf3af4ac46802436d352ef409cee4fe80445b3 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 13 Jun 2007 12:07:37 -0700 Subject: [VLAN]: Introduce symbolic constants for flag values Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/if_vlan.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h index b46d4225f7..c7912876a2 100644 --- a/include/linux/if_vlan.h +++ b/include/linux/if_vlan.h @@ -398,6 +398,10 @@ enum vlan_ioctl_cmds { GET_VLAN_VID_CMD /* Get the VID of this VLAN (specified by name) */ }; +enum vlan_flags { + VLAN_FLAG_REORDER_HDR = 0x1, +}; + enum vlan_name_types { VLAN_NAME_TYPE_PLUS_VID, /* Name will look like: vlan0005 */ VLAN_NAME_TYPE_RAW_PLUS_VID, /* name will look like: eth1.0005 */ -- cgit v1.2.2 From 07b5b17e157b7018d0ca40ca0d1581a23096fb45 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 13 Jun 2007 12:07:54 -0700 Subject: [VLAN]: Use rtnl_link API Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/if_link.h | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) (limited to 'include') diff --git a/include/linux/if_link.h b/include/linux/if_link.h index 3144babd23..422084d18c 100644 --- a/include/linux/if_link.h +++ b/include/linux/if_link.h @@ -153,4 +153,38 @@ enum #define IFLA_INFO_MAX (__IFLA_INFO_MAX - 1) +/* VLAN section */ + +enum +{ + IFLA_VLAN_UNSPEC, + IFLA_VLAN_ID, + IFLA_VLAN_FLAGS, + IFLA_VLAN_EGRESS_QOS, + IFLA_VLAN_INGRESS_QOS, + __IFLA_VLAN_MAX, +}; + +#define IFLA_VLAN_MAX (__IFLA_VLAN_MAX - 1) + +struct ifla_vlan_flags { + __u32 flags; + __u32 mask; +}; + +enum +{ + IFLA_VLAN_QOS_UNSPEC, + IFLA_VLAN_QOS_MAPPING, + __IFLA_VLAN_QOS_MAX +}; + +#define IFLA_VLAN_QOS_MAX (__IFLA_VLAN_QOS_MAX - 1) + +struct ifla_vlan_qos_mapping +{ + __u32 from; + __u32 to; +}; + #endif /* _LINUX_IF_LINK_H */ -- cgit v1.2.2 From f1c91da44728fba24927e44056a56e507c11cf7b Mon Sep 17 00:00:00 2001 From: Gerrit Renker Date: Sat, 16 Jun 2007 12:38:51 -0300 Subject: [KTIME]: Introduce ktime_us_delta This provides a reusable time difference function which returns the difference in microseconds, as often used in the DCCP code. Commiter note: renamed ktime_delta to ktime_us_delta and put it in ktime.h. Signed-off-by: Gerrit Renker Signed-off-by: Arnaldo Carvalho de Melo --- include/linux/ktime.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/ktime.h b/include/linux/ktime.h index 2b139f6602..923665958f 100644 --- a/include/linux/ktime.h +++ b/include/linux/ktime.h @@ -279,6 +279,11 @@ static inline s64 ktime_to_us(const ktime_t kt) return (s64) tv.tv_sec * USEC_PER_SEC + tv.tv_usec; } +static inline s64 ktime_us_delta(const ktime_t later, const ktime_t earlier) +{ + return ktime_to_us(ktime_sub(later, earlier)); +} + /* * The resolution of the clocks. The resolution value is returned in * the clock_getres() system call to give application programmers an -- cgit v1.2.2 From 1e180f726a58089d15637b5495fecbad8c50c833 Mon Sep 17 00:00:00 2001 From: Arnaldo Carvalho de Melo Date: Sat, 16 Jun 2007 12:39:38 -0300 Subject: [KTIME]: Introduce ktime_add_us Signed-off-by: Arnaldo Carvalho de Melo --- include/linux/ktime.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'include') diff --git a/include/linux/ktime.h b/include/linux/ktime.h index 923665958f..dae7143644 100644 --- a/include/linux/ktime.h +++ b/include/linux/ktime.h @@ -284,6 +284,11 @@ static inline s64 ktime_us_delta(const ktime_t later, const ktime_t earlier) return ktime_to_us(ktime_sub(later, earlier)); } +static inline ktime_t ktime_add_us(const ktime_t kt, const u64 usec) +{ + return ktime_add_ns(kt, usec * 1000); +} + /* * The resolution of the clocks. The resolution value is returned in * the clock_getres() system call to give application programmers an -- cgit v1.2.2 From 334a8132d9950f769f390f0f35c233d099688e7a Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Mon, 25 Jun 2007 04:35:20 -0700 Subject: [SKBUFF]: Keep track of writable header len of headerless clones Currently NAT (and others) that want to modify cloned skbs copy them, even if in the vast majority of cases its not necessary because the skb is a clone made by TCP and the portion NAT wants to modify is actually writable because TCP release the header reference before cloning. The problem is that there is no clean way for NAT to find out how long the writable header area is, so this patch introduces skb->hdr_len to hold this length. When a headerless skb is cloned skb->hdr_len is set to the current headroom, for regular clones it is copied from the original. A new function skb_clone_writable(skb, len) returns whether the skb is writable up to len bytes from skb->data. To avoid enlarging the skb the mac_len field is reduced to 16 bit and the new hdr_len field is put in the remaining 16 bit. I've done a few rough benchmarks of NAT (not with this exact patch, but a very similar one). As expected it saves huge amounts of system time in case of sendfile, bringing it down to basically the same amount as without NAT, with sendmsg it only helps on loopback, probably because of the large MTU. Transmit a 1GB file using sendfile/sendmsg over eth0/lo with and without NAT: - sendfile eth0, no NAT: sys 0m0.388s - sendfile eth0, NAT: sys 0m1.835s - sendfile eth0: NAT + path: sys 0m0.370s (~ -80%) - sendfile lo, no NAT: sys 0m0.258s - sendfile lo, NAT: sys 0m2.609s - sendfile lo, NAT + patch: sys 0m0.260s (~ -90%) - sendmsg eth0, no NAT: sys 0m2.508s - sendmsg eth0, NAT: sys 0m2.539s - sendmsg eth0, NAT + patch: sys 0m2.445s (no change) - sendmsg lo, no NAT: sys 0m2.151s - sendmsg lo, NAT: sys 0m3.557s - sendmsg lo, NAT + patch: sys 0m2.159s (~ -40%) I expect other users can see a similar performance improvement, packet mangling iptables targets, ipip and ip_gre come to mind .. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/skbuff.h | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 6f0b2f7d00..881fe80f01 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -147,8 +147,8 @@ struct skb_shared_info { /* We divide dataref into two halves. The higher 16 bits hold references * to the payload part of skb->data. The lower 16 bits hold references to - * the entire skb->data. It is up to the users of the skb to agree on - * where the payload starts. + * the entire skb->data. A clone of a headerless skb holds the length of + * the header in skb->hdr_len. * * All users must obey the rule that the skb->data reference count must be * greater than or equal to the payload reference count. @@ -206,6 +206,7 @@ typedef unsigned char *sk_buff_data_t; * @len: Length of actual data * @data_len: Data length * @mac_len: Length of link layer header + * @hdr_len: writable header length of cloned skb * @csum: Checksum (must include start/offset pair) * @csum_start: Offset from skb->head where checksumming should start * @csum_offset: Offset from csum_start where checksum should be stored @@ -260,8 +261,9 @@ struct sk_buff { char cb[48]; unsigned int len, - data_len, - mac_len; + data_len; + __u16 mac_len, + hdr_len; union { __wsum csum; struct { @@ -1321,6 +1323,20 @@ static inline struct sk_buff *netdev_alloc_skb(struct net_device *dev, return __netdev_alloc_skb(dev, length, GFP_ATOMIC); } +/** + * skb_clone_writable - is the header of a clone writable + * @skb: buffer to check + * @len: length up to which to write + * + * Returns true if modifying the header part of the cloned buffer + * does not requires the data to be copied. + */ +static inline int skb_clone_writable(struct sk_buff *skb, int len) +{ + return !skb_header_cloned(skb) && + skb_headroom(skb) + len <= skb->hdr_len; +} + /** * skb_cow - copy header of skb when it is required * @skb: buffer to cow -- cgit v1.2.2 From 1092cb219774a82b1f16781aec7b8d4ec727c981 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Mon, 25 Jun 2007 13:49:35 -0700 Subject: [NETLINK]: attr: add nested compat attribute type Add a nested compat attribute type that can be used to convert attributes that contain a structure to nested attributes in a backwards compatible way. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netlink.h | 84 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 84 insertions(+) (limited to 'include') diff --git a/include/net/netlink.h b/include/net/netlink.h index 7b510a9edb..d7b824be54 100644 --- a/include/net/netlink.h +++ b/include/net/netlink.h @@ -118,6 +118,9 @@ * Nested Attributes Construction: * nla_nest_start(skb, type) start a nested attribute * nla_nest_end(skb, nla) finalize a nested attribute + * nla_nest_compat_start(skb, type, start a nested compat attribute + * len, data) + * nla_nest_compat_end(skb, type) finalize a nested compat attribute * nla_nest_cancel(skb, nla) cancel nested attribute construction * * Attribute Length Calculations: @@ -152,6 +155,7 @@ * nla_find_nested() find attribute in nested attributes * nla_parse() parse and validate stream of attrs * nla_parse_nested() parse nested attribuets + * nla_parse_nested_compat() parse nested compat attributes * nla_for_each_attr() loop over all attributes * nla_for_each_nested() loop over the nested attributes *========================================================================= @@ -170,6 +174,7 @@ enum { NLA_FLAG, NLA_MSECS, NLA_NESTED, + NLA_NESTED_COMPAT, NLA_NUL_STRING, NLA_BINARY, __NLA_TYPE_MAX, @@ -190,6 +195,7 @@ enum { * NLA_NUL_STRING Maximum length of string (excluding NUL) * NLA_FLAG Unused * NLA_BINARY Maximum length of attribute payload + * NLA_NESTED_COMPAT Exact length of structure payload * All other Exact length of attribute payload * * Example: @@ -733,6 +739,39 @@ static inline int nla_parse_nested(struct nlattr *tb[], int maxtype, { return nla_parse(tb, maxtype, nla_data(nla), nla_len(nla), policy); } + +/** + * nla_parse_nested_compat - parse nested compat attributes + * @tb: destination array with maxtype+1 elements + * @maxtype: maximum attribute type to be expected + * @nla: attribute containing the nested attributes + * @data: pointer to point to contained structure + * @len: length of contained structure + * @policy: validation policy + * + * Parse a nested compat attribute. The compat attribute contains a structure + * and optionally a set of nested attributes. On success the data pointer + * points to the nested data and tb contains the parsed attributes + * (see nla_parse). + */ +static inline int __nla_parse_nested_compat(struct nlattr *tb[], int maxtype, + struct nlattr *nla, + const struct nla_policy *policy, + int len) +{ + if (nla_len(nla) < len) + return -1; + if (nla_len(nla) >= NLA_ALIGN(len) + sizeof(struct nlattr)) + return nla_parse_nested(tb, maxtype, + nla_data(nla) + NLA_ALIGN(len), + policy); + memset(tb, 0, sizeof(struct nlattr *) * (maxtype + 1)); + return 0; +} + +#define nla_parse_nested_compat(tb, maxtype, nla, policy, data, len) \ +({ data = nla_len(nla) >= len ? nla_data(nla) : NULL; \ + __nla_parse_nested_compat(tb, maxtype, nla, policy, len); }) /** * nla_put_u8 - Add a u16 netlink attribute to a socket buffer * @skb: socket buffer to add attribute to @@ -964,6 +1003,51 @@ static inline int nla_nest_end(struct sk_buff *skb, struct nlattr *start) return skb->len; } +/** + * nla_nest_compat_start - Start a new level of nested compat attributes + * @skb: socket buffer to add attributes to + * @attrtype: attribute type of container + * @attrlen: length of structure + * @data: pointer to structure + * + * Start a nested compat attribute that contains both a structure and + * a set of nested attributes. + * + * Returns the container attribute + */ +static inline struct nlattr *nla_nest_compat_start(struct sk_buff *skb, + int attrtype, int attrlen, + const void *data) +{ + struct nlattr *start = (struct nlattr *)skb_tail_pointer(skb); + + if (nla_put(skb, attrtype, attrlen, data) < 0) + return NULL; + if (nla_nest_start(skb, attrtype) == NULL) { + nlmsg_trim(skb, start); + return NULL; + } + return start; +} + +/** + * nla_nest_compat_end - Finalize nesting of compat attributes + * @skb: socket buffer the attribtues are stored in + * @start: container attribute + * + * Corrects the container attribute header to include the all + * appeneded attributes. + * + * Returns the total data length of the skb. + */ +static inline int nla_nest_compat_end(struct sk_buff *skb, struct nlattr *start) +{ + struct nlattr *nest = (void *)start + NLMSG_ALIGN(start->nla_len); + + start->nla_len = skb_tail_pointer(skb) - (unsigned char *)start; + return nla_nest_end(skb, nest); +} + /** * nla_nest_cancel - Cancel nesting of attributes * @skb: socket buffer the message is stored in -- cgit v1.2.2 From afdc3238ec948531205f5c5f77d2de7bae519c71 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Mon, 25 Jun 2007 14:30:16 -0700 Subject: [RTNETLINK]: Add nested compat attribute Add a nested compat attribute type that can be used to convert attributes that contain a structure to nested attributes in a backwards compatible way. The attribute looks like this: struct { [ compat contents ] struct rtattr { .rta_len = total size, .rta_type = type, } rta; struct old_structure struct; [ nested top-level attribute ] struct rtattr { .rta_len = nest size, .rta_type = type, } nest_attr; [ optional 0 .. n nested attributes ] struct rtattr { .rta_len = private attribute len, .rta_type = private attribute typ, } nested_attr; struct nested_data data; }; Since both userspace and kernel deal correctly with attributes that are larger than expected old versions will just parse the compat part and ignore the rest. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/rtnetlink.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'include') diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index 6127858485..6731e7f4cc 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -570,6 +570,8 @@ static __inline__ int rtattr_strcmp(const struct rtattr *rta, const char *str) } extern int rtattr_parse(struct rtattr *tb[], int maxattr, struct rtattr *rta, int len); +extern int rtattr_parse_nested_compat(struct rtattr *tb[], int maxattr, + struct rtattr *rta, void **data, int len); #define rtattr_parse_nested(tb, max, rta) \ rtattr_parse((tb), (max), RTA_DATA((rta)), RTA_PAYLOAD((rta))) @@ -638,6 +640,18 @@ extern void __rta_fill(struct sk_buff *skb, int attrtype, int attrlen, const voi ({ (start)->rta_len = skb_tail_pointer(skb) - (unsigned char *)(start); \ (skb)->len; }) +#define RTA_NEST_COMPAT(skb, type, attrlen, data) \ +({ struct rtattr *__start = (struct rtattr *)skb_tail_pointer(skb); \ + RTA_PUT(skb, type, attrlen, data); \ + RTA_NEST(skb, type); \ + __start; }) + +#define RTA_NEST_COMPAT_END(skb, start) \ +({ struct rtattr *__nest = (void *)(start) + NLMSG_ALIGN((start)->rta_len); \ + (start)->rta_len = skb_tail_pointer(skb) - (unsigned char *)(start); \ + RTA_NEST_END(skb, __nest); \ + (skb)->len; }) + #define RTA_NEST_CANCEL(skb, start) \ ({ if (start) \ skb_trim(skb, (unsigned char *) (start) - (skb)->data); \ -- cgit v1.2.2 From 2371baa4bdab3268b32009926f75e7a5d3a41506 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Tue, 26 Jun 2007 03:23:44 -0700 Subject: [RTNETLINK]: Fix rtnetlink compat attribute patch Sent the wrong patch previously. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/rtnetlink.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h index 6731e7f4cc..c91476ce31 100644 --- a/include/linux/rtnetlink.h +++ b/include/linux/rtnetlink.h @@ -570,12 +570,16 @@ static __inline__ int rtattr_strcmp(const struct rtattr *rta, const char *str) } extern int rtattr_parse(struct rtattr *tb[], int maxattr, struct rtattr *rta, int len); -extern int rtattr_parse_nested_compat(struct rtattr *tb[], int maxattr, - struct rtattr *rta, void **data, int len); +extern int __rtattr_parse_nested_compat(struct rtattr *tb[], int maxattr, + struct rtattr *rta, int len); #define rtattr_parse_nested(tb, max, rta) \ rtattr_parse((tb), (max), RTA_DATA((rta)), RTA_PAYLOAD((rta))) +#define rtattr_parse_nested_compat(tb, max, rta, data, len) \ +({ data = RTA_PAYLOAD(rta) >= len ? RTA_DATA(rta) : NULL; \ + __rtattr_parse_nested_compat(tb, max, rta, len); }) + extern int rtnetlink_send(struct sk_buff *skb, u32 pid, u32 group, int echo); extern int rtnl_unicast(struct sk_buff *skb, u32 pid); extern int rtnl_notify(struct sk_buff *skb, u32 pid, u32 group, -- cgit v1.2.2 From 136ebf08b46f839e2dc9db34322b654e5d9b9936 Mon Sep 17 00:00:00 2001 From: Masahide NAKAMURA Date: Tue, 26 Jun 2007 23:51:41 -0700 Subject: [IPV6] MIP6: Kill unnecessary ifdefs. Kill unnecessary CONFIG_IPV6_MIP6. o It is redundant for RAW socket to keep MH out with the config then it can handle any protocol. o Clean-up at AH. Signed-off-by: Masahide NAKAMURA Signed-off-by: David S. Miller --- include/net/flow.h | 4 ---- include/net/xfrm.h | 2 -- 2 files changed, 6 deletions(-) (limited to 'include') diff --git a/include/net/flow.h b/include/net/flow.h index f3cc1f8126..af59fa5cc1 100644 --- a/include/net/flow.h +++ b/include/net/flow.h @@ -67,20 +67,16 @@ struct flowi { __be32 spi; -#ifdef CONFIG_IPV6_MIP6 struct { __u8 type; } mht; -#endif } uli_u; #define fl_ip_sport uli_u.ports.sport #define fl_ip_dport uli_u.ports.dport #define fl_icmp_type uli_u.icmpt.type #define fl_icmp_code uli_u.icmpt.code #define fl_ipsec_spi uli_u.spi -#ifdef CONFIG_IPV6_MIP6 #define fl_mh_type uli_u.mht.type -#endif __u32 secid; /* used by xfrm; see secid.txt */ } __attribute__((__aligned__(BITS_PER_LONG/8))); diff --git a/include/net/xfrm.h b/include/net/xfrm.h index 311f25af5e..7720c1182b 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -509,11 +509,9 @@ __be16 xfrm_flowi_sport(struct flowi *fl) case IPPROTO_ICMPV6: port = htons(fl->fl_icmp_type); break; -#ifdef CONFIG_IPV6_MIP6 case IPPROTO_MH: port = htons(fl->fl_mh_type); break; -#endif default: port = 0; /*XXX*/ } -- cgit v1.2.2 From 59fbb3a61e02deaeaa4fb50792217921f3002d64 Mon Sep 17 00:00:00 2001 From: Masahide NAKAMURA Date: Tue, 26 Jun 2007 23:56:32 -0700 Subject: [IPV6] MIP6: Loadable module support for MIPv6. This patch makes MIPv6 loadable module named "mip6". Here is a modprobe.conf(5) example to load it automatically when user application uses XFRM state for MIPv6: alias xfrm-type-10-43 mip6 alias xfrm-type-10-60 mip6 Some MIPv6 feature is not included by this modular, however, it should not be affected to other features like either IPsec or IPv6 with and without the patch. We may discuss XFRM, MH (RAW socket) and ancillary data/sockopt separately for future work. Loadable features: * MH receiving check (to send ICMP error back) * RO header parsing and building (i.e. RH2 and HAO in DSTOPTS) * XFRM policy/state database handling for RO These are NOT covered as loadable: * Home Address flags and its rule on source address selection * XFRM sub policy (depends on its own kernel option) * XFRM functions to receive RO as IPv6 extension header * MH sending/receiving through raw socket if user application opens it (since raw socket allows to do so) * RH2 sending as ancillary data * RH2 operation with setsockopt(2) Signed-off-by: Masahide NAKAMURA Signed-off-by: David S. Miller --- include/linux/ipv6.h | 2 +- include/net/addrconf.h | 2 +- include/net/mip6.h | 4 ---- include/net/rawv6.h | 9 +++++++++ 4 files changed, 11 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h index 648bd1f091..213b63be3c 100644 --- a/include/linux/ipv6.h +++ b/include/linux/ipv6.h @@ -247,7 +247,7 @@ struct inet6_skb_parm { __u16 lastopt; __u32 nhoff; __u16 flags; -#ifdef CONFIG_IPV6_MIP6 +#if defined(CONFIG_IPV6_MIP6) || defined(CONFIG_IPV6_MIP6_MODULE) __u16 dsthao; #endif diff --git a/include/net/addrconf.h b/include/net/addrconf.h index f3531d0bcd..33b593e174 100644 --- a/include/net/addrconf.h +++ b/include/net/addrconf.h @@ -61,7 +61,7 @@ extern int addrconf_set_dstaddr(void __user *arg); extern int ipv6_chk_addr(struct in6_addr *addr, struct net_device *dev, int strict); -#ifdef CONFIG_IPV6_MIP6 +#if defined(CONFIG_IPV6_MIP6) || defined(CONFIG_IPV6_MIP6_MODULE) extern int ipv6_chk_home_addr(struct in6_addr *addr); #endif extern struct inet6_ifaddr * ipv6_get_ifaddr(struct in6_addr *addr, diff --git a/include/net/mip6.h b/include/net/mip6.h index 68263c6d99..63272610a2 100644 --- a/include/net/mip6.h +++ b/include/net/mip6.h @@ -54,8 +54,4 @@ struct ip6_mh { #define IP6_MH_TYPE_BERROR 7 /* Binding Error */ #define IP6_MH_TYPE_MAX IP6_MH_TYPE_BERROR -extern int mip6_init(void); -extern void mip6_fini(void); -extern int mip6_mh_filter(struct sock *sk, struct sk_buff *skb); - #endif diff --git a/include/net/rawv6.h b/include/net/rawv6.h index af8960878e..a5819891d5 100644 --- a/include/net/rawv6.h +++ b/include/net/rawv6.h @@ -3,6 +3,8 @@ #ifdef __KERNEL__ +#include + #define RAWV6_HTABLE_SIZE MAX_INET_PROTOS extern struct hlist_head raw_v6_htable[RAWV6_HTABLE_SIZE]; extern rwlock_t raw_v6_lock; @@ -23,6 +25,13 @@ extern void rawv6_err(struct sock *sk, int type, int code, int offset, __be32 info); +#if defined(CONFIG_IPV6_MIP6) || defined(CONFIG_IPV6_MIP6_MODULE) +int rawv6_mh_filter_register(int (*filter)(struct sock *sock, + struct sk_buff *skb)); +int rawv6_mh_filter_unregister(int (*filter)(struct sock *sock, + struct sk_buff *skb)); +#endif + #endif #endif -- cgit v1.2.2 From d3d6dd3adaaad71eae20902ed81808a66a40a5b9 Mon Sep 17 00:00:00 2001 From: Masahide NAKAMURA Date: Tue, 26 Jun 2007 23:57:49 -0700 Subject: [XFRM]: Add module alias for transformation type. It is clean-up for XFRM type modules and adds aliases with its protocol: ESP, AH, IPCOMP, IPIP and IPv6 for IPsec ROUTING and DSTOPTS for MIPv6 It is almost the same thing as XFRM mode alias, but it is added new defines XFRM_PROTO_XXX for preprocessing since some protocols are defined as enum. Signed-off-by: Masahide NAKAMURA Acked-by: Ingo Oeser Signed-off-by: David S. Miller --- include/net/xfrm.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/net/xfrm.h b/include/net/xfrm.h index 7720c1182b..ee3827f053 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -19,9 +19,19 @@ #include #include +#define XFRM_PROTO_ESP 50 +#define XFRM_PROTO_AH 51 +#define XFRM_PROTO_COMP 108 +#define XFRM_PROTO_IPIP 4 +#define XFRM_PROTO_IPV6 41 +#define XFRM_PROTO_ROUTING IPPROTO_ROUTING +#define XFRM_PROTO_DSTOPTS IPPROTO_DSTOPTS + #define XFRM_ALIGN8(len) (((len) + 7) & ~7) #define MODULE_ALIAS_XFRM_MODE(family, encap) \ MODULE_ALIAS("xfrm-mode-" __stringify(family) "-" __stringify(encap)) +#define MODULE_ALIAS_XFRM_TYPE(family, proto) \ + MODULE_ALIAS("xfrm-type-" __stringify(family) "-" __stringify(proto)) extern struct sock *xfrm_nl; extern u32 sysctl_xfrm_aevent_etime; -- cgit v1.2.2 From d212f87b068c9d72065ef579d85b5ee6b8b59381 Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Wed, 27 Jun 2007 00:47:37 -0700 Subject: [NET]: IPV6 checksum offloading in network devices The existing model for checksum offload does not correctly handle devices that can offload IPV4 and IPV6 only. The NETIF_F_HW_CSUM flag implies device can do any arbitrary protocol. This patch: * adds NETIF_F_IPV6_CSUM for those devices * fixes bnx2 and tg3 devices that need it * add NETIF_F_IPV6_CSUM to ipv6 output (incl GSO) * fixes assumptions about NETIF_F_ALL_CSUM in nat * adjusts bridge union of checksumming computation Signed-off-by: David S. Miller --- include/linux/netdevice.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index e7913ee558..7a8f22fb4e 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -314,9 +314,10 @@ struct net_device /* Net device features */ unsigned long features; #define NETIF_F_SG 1 /* Scatter/gather IO. */ -#define NETIF_F_IP_CSUM 2 /* Can checksum only TCP/UDP over IPv4. */ +#define NETIF_F_IP_CSUM 2 /* Can checksum TCP/UDP over IPv4. */ #define NETIF_F_NO_CSUM 4 /* Does not require checksum. F.e. loopack. */ #define NETIF_F_HW_CSUM 8 /* Can checksum all the packets. */ +#define NETIF_F_IPV6_CSUM 16 /* Can checksum TCP/UDP over IPV6 */ #define NETIF_F_HIGHDMA 32 /* Can DMA to high memory. */ #define NETIF_F_FRAGLIST 64 /* Scatter/gather IO. */ #define NETIF_F_HW_VLAN_TX 128 /* Transmit VLAN hw acceleration */ @@ -338,8 +339,11 @@ struct net_device /* List of features with software fallbacks. */ #define NETIF_F_GSO_SOFTWARE (NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6) + #define NETIF_F_GEN_CSUM (NETIF_F_NO_CSUM | NETIF_F_HW_CSUM) -#define NETIF_F_ALL_CSUM (NETIF_F_IP_CSUM | NETIF_F_GEN_CSUM) +#define NETIF_F_V4_CSUM (NETIF_F_GEN_CSUM | NETIF_F_IP_CSUM) +#define NETIF_F_V6_CSUM (NETIF_F_GEN_CSUM | NETIF_F_IPV6_CSUM) +#define NETIF_F_ALL_CSUM (NETIF_F_V4_CSUM | NETIF_F_V6_CSUM) struct net_device *next_sched; -- cgit v1.2.2 From bf742482d7a647c5c6f03f78eb35a862e159ecf5 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 27 Jun 2007 01:26:19 -0700 Subject: [NET]: dev: introduce generic net_device address lists Introduce struct dev_addr_list and list maintenance functions based on dev_mc_list and the related functions. This will be used by follow-up patches for both multicast and secondary unicast addresses. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netdevice.h | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 7a8f22fb4e..aa389c77aa 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -177,6 +177,14 @@ struct netif_rx_stats DECLARE_PER_CPU(struct netif_rx_stats, netdev_rx_stat); +struct dev_addr_list +{ + struct dev_addr_list *next; + u8 da_addr[MAX_ADDR_LEN]; + u8 da_addrlen; + int da_users; + int da_gusers; +}; /* * We tag multicasts with these structures. @@ -1008,6 +1016,9 @@ extern void dev_mc_upload(struct net_device *dev); extern int dev_mc_delete(struct net_device *dev, void *addr, int alen, int all); extern int dev_mc_add(struct net_device *dev, void *addr, int alen, int newonly); extern void dev_mc_discard(struct net_device *dev); +extern int __dev_addr_delete(struct dev_addr_list **list, void *addr, int alen, int all); +extern int __dev_addr_add(struct dev_addr_list **list, void *addr, int alen, int newonly); +extern void __dev_addr_discard(struct dev_addr_list **list); extern void dev_set_promiscuity(struct net_device *dev, int inc); extern void dev_set_allmulti(struct net_device *dev, int inc); extern void netdev_state_change(struct net_device *dev); -- cgit v1.2.2 From 3fba5a8b1e3df2384b90493538161e83cf15dd5f Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 27 Jun 2007 01:26:58 -0700 Subject: [NET]: dev_mcast: switch to generic net_device address lists Use generic net_device address lists for multicast list handling. Some defines are used to keep drivers working. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netdevice.h | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index aa389c77aa..9e114e77e5 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -189,15 +189,12 @@ struct dev_addr_list /* * We tag multicasts with these structures. */ - -struct dev_mc_list -{ - struct dev_mc_list *next; - __u8 dmi_addr[MAX_ADDR_LEN]; - unsigned char dmi_addrlen; - int dmi_users; - int dmi_gusers; -}; + +#define dev_mc_list dev_addr_list +#define dmi_addr da_addr +#define dmi_addrlen da_addrlen +#define dmi_users da_users +#define dmi_gusers da_gusers struct hh_cache { @@ -400,7 +397,7 @@ struct net_device unsigned char addr_len; /* hardware address length */ unsigned short dev_id; /* for shared network cards */ - struct dev_mc_list *mc_list; /* Multicast mac addresses */ + struct dev_addr_list *mc_list; /* Multicast mac addresses */ int mc_count; /* Number of installed mcasts */ int promiscuity; int allmulti; -- cgit v1.2.2 From 4417da668c0021903464f92db278ddae348e0299 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 27 Jun 2007 01:28:10 -0700 Subject: [NET]: dev: secondary unicast address support Add support for configuring secondary unicast addresses on network devices. To support this devices capable of filtering multiple unicast addresses need to change their set_multicast_list function to configure unicast filters as well and assign it to dev->set_rx_mode instead of dev->set_multicast_list. Other devices are put into promiscous mode when secondary unicast addresses are present. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netdevice.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 9e114e77e5..2c0cc19edf 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -397,6 +397,9 @@ struct net_device unsigned char addr_len; /* hardware address length */ unsigned short dev_id; /* for shared network cards */ + struct dev_addr_list *uc_list; /* Secondary unicast mac addresses */ + int uc_count; /* Number of installed ucasts */ + int uc_promisc; struct dev_addr_list *mc_list; /* Multicast mac addresses */ int mc_count; /* Number of installed mcasts */ int promiscuity; @@ -502,6 +505,8 @@ struct net_device void *saddr, unsigned len); int (*rebuild_header)(struct sk_buff *skb); +#define HAVE_SET_RX_MODE + void (*set_rx_mode)(struct net_device *dev); #define HAVE_MULTICAST void (*set_multicast_list)(struct net_device *dev); #define HAVE_SET_MAC_ADDR @@ -1008,8 +1013,11 @@ extern struct net_device *alloc_netdev(int sizeof_priv, const char *name, void (*setup)(struct net_device *)); extern int register_netdev(struct net_device *dev); extern void unregister_netdev(struct net_device *dev); -/* Functions used for multicast support */ -extern void dev_mc_upload(struct net_device *dev); +/* Functions used for secondary unicast and multicast support */ +extern void dev_set_rx_mode(struct net_device *dev); +extern void __dev_set_rx_mode(struct net_device *dev); +extern int dev_unicast_delete(struct net_device *dev, void *addr, int alen); +extern int dev_unicast_add(struct net_device *dev, void *addr, int alen); extern int dev_mc_delete(struct net_device *dev, void *addr, int alen, int all); extern int dev_mc_add(struct net_device *dev, void *addr, int alen, int newonly); extern void dev_mc_discard(struct net_device *dev); -- cgit v1.2.2 From 342f0234c71b40da785dd6a7ce1dd481ecbfdb81 Mon Sep 17 00:00:00 2001 From: James Chapman Date: Wed, 27 Jun 2007 15:37:46 -0700 Subject: [UDP]: Introduce UDP encapsulation type for L2TP This patch adds a new UDP_ENCAP_L2TPINUDP encapsulation type for UDP sockets. When a UDP socket's encap_type is UDP_ENCAP_L2TPINUDP, the skb is delivered to a function pointed to by the udp_sock's encap_rcv funcptr. If the skb isn't wanted by L2TP, it returns >0, which causes it to be passed through to UDP. Include padding to put the new encap_rcv field on a 4-byte boundary. Previously, the only user of UDP encap sockets was ESP, so when CONFIG_XFRM was not defined, some of the encap code was compiled out. This patch changes that. As a result, udp_encap_rcv() will now do a little more work when CONFIG_XFRM is not defined. Signed-off-by: James Chapman Signed-off-by: David S. Miller --- include/linux/udp.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include') diff --git a/include/linux/udp.h b/include/linux/udp.h index 6de445c31a..8ec703f462 100644 --- a/include/linux/udp.h +++ b/include/linux/udp.h @@ -42,6 +42,7 @@ static inline struct udphdr *udp_hdr(const struct sk_buff *skb) /* UDP encapsulation types */ #define UDP_ENCAP_ESPINUDP_NON_IKE 1 /* draft-ietf-ipsec-nat-t-ike-00/01 */ #define UDP_ENCAP_ESPINUDP 2 /* draft-ietf-ipsec-udp-encaps-06 */ +#define UDP_ENCAP_L2TPINUDP 3 /* rfc2661 */ #ifdef __KERNEL__ #include @@ -70,6 +71,11 @@ struct udp_sock { #define UDPLITE_SEND_CC 0x2 /* set via udplite setsockopt */ #define UDPLITE_RECV_CC 0x4 /* set via udplite setsocktopt */ __u8 pcflag; /* marks socket as UDP-Lite if > 0 */ + __u8 unused[3]; + /* + * For encapsulation sockets. + */ + int (*encap_rcv)(struct sock *sk, struct sk_buff *skb); }; static inline struct udp_sock *udp_sk(const struct sock *sk) -- cgit v1.2.2 From cf14a4d06742d59ecb2d837a3f53bb24d1ff9acb Mon Sep 17 00:00:00 2001 From: James Chapman Date: Wed, 27 Jun 2007 15:43:43 -0700 Subject: [L2TP]: Changes to existing ppp and socket kernel headers for L2TP Add struct sockaddr_pppol2tp to carry L2TP-specific address information for the PPPoX (PPPoL2TP) socket. Unfortunately we can't use the union inside struct sockaddr_pppox because the L2TP-specific data is larger than the current size of the union and we must preserve the size of struct sockaddr_pppox for binary compatibility. Also add a PPPIOCGL2TPSTATS ioctl to allow userspace to obtain L2TP counters and state from the kernel. Add new if_pppol2tp.h header. [ Modified to use aligned_u64 in statistics structure -DaveM ] Signed-off-by: James Chapman Signed-off-by: David S. Miller --- include/linux/Kbuild | 1 + include/linux/if_ppp.h | 16 +++++++++++ include/linux/if_pppol2tp.h | 69 +++++++++++++++++++++++++++++++++++++++++++++ include/linux/if_pppox.h | 16 +++++++++-- include/linux/socket.h | 1 + 5 files changed, 101 insertions(+), 2 deletions(-) create mode 100644 include/linux/if_pppol2tp.h (limited to 'include') diff --git a/include/linux/Kbuild b/include/linux/Kbuild index d944516827..127d2d192b 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild @@ -225,6 +225,7 @@ unifdef-y += if_fddi.h unifdef-y += if_frad.h unifdef-y += if_ltalk.h unifdef-y += if_link.h +unifdef-y += if_pppol2tp.h unifdef-y += if_pppox.h unifdef-y += if_shaper.h unifdef-y += if_tr.h diff --git a/include/linux/if_ppp.h b/include/linux/if_ppp.h index 768372f07c..0f2f70d4e4 100644 --- a/include/linux/if_ppp.h +++ b/include/linux/if_ppp.h @@ -110,6 +110,21 @@ struct ifpppcstatsreq { struct ppp_comp_stats stats; }; +/* For PPPIOCGL2TPSTATS */ +struct pppol2tp_ioc_stats { + __u16 tunnel_id; /* redundant */ + __u16 session_id; /* if zero, get tunnel stats */ + __u32 using_ipsec:1; /* valid only for session_id == 0 */ + aligned_u64 tx_packets; + aligned_u64 tx_bytes; + aligned_u64 tx_errors; + aligned_u64 rx_packets; + aligned_u64 rx_bytes; + aligned_u64 rx_seq_discards; + aligned_u64 rx_oos_packets; + aligned_u64 rx_errors; +}; + #define ifr__name b.ifr_ifrn.ifrn_name #define stats_ptr b.ifr_ifru.ifru_data @@ -146,6 +161,7 @@ struct ifpppcstatsreq { #define PPPIOCDISCONN _IO('t', 57) /* disconnect channel */ #define PPPIOCATTCHAN _IOW('t', 56, int) /* attach to ppp channel */ #define PPPIOCGCHAN _IOR('t', 55, int) /* get ppp channel number */ +#define PPPIOCGL2TPSTATS _IOR('t', 54, struct pppol2tp_ioc_stats) #define SIOCGPPPSTATS (SIOCDEVPRIVATE + 0) #define SIOCGPPPVER (SIOCDEVPRIVATE + 1) /* NEVER change this!! */ diff --git a/include/linux/if_pppol2tp.h b/include/linux/if_pppol2tp.h new file mode 100644 index 0000000000..516203b6fd --- /dev/null +++ b/include/linux/if_pppol2tp.h @@ -0,0 +1,69 @@ +/*************************************************************************** + * Linux PPP over L2TP (PPPoL2TP) Socket Implementation (RFC 2661) + * + * This file supplies definitions required by the PPP over L2TP driver + * (pppol2tp.c). All version information wrt this file is located in pppol2tp.c + * + * License: + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#ifndef __LINUX_IF_PPPOL2TP_H +#define __LINUX_IF_PPPOL2TP_H + +#include + +#ifdef __KERNEL__ +#include +#endif + +/* Structure used to connect() the socket to a particular tunnel UDP + * socket. + */ +struct pppol2tp_addr +{ + pid_t pid; /* pid that owns the fd. + * 0 => current */ + int fd; /* FD of UDP socket to use */ + + struct sockaddr_in addr; /* IP address and port to send to */ + + __be16 s_tunnel, s_session; /* For matching incoming packets */ + __be16 d_tunnel, d_session; /* For sending outgoing packets */ +}; + +/* Socket options: + * DEBUG - bitmask of debug message categories + * SENDSEQ - 0 => don't send packets with sequence numbers + * 1 => send packets with sequence numbers + * RECVSEQ - 0 => receive packet sequence numbers are optional + * 1 => drop receive packets without sequence numbers + * LNSMODE - 0 => act as LAC. + * 1 => act as LNS. + * REORDERTO - reorder timeout (in millisecs). If 0, don't try to reorder. + */ +enum { + PPPOL2TP_SO_DEBUG = 1, + PPPOL2TP_SO_RECVSEQ = 2, + PPPOL2TP_SO_SENDSEQ = 3, + PPPOL2TP_SO_LNSMODE = 4, + PPPOL2TP_SO_REORDERTO = 5, +}; + +/* Debug message categories for the DEBUG socket option */ +enum { + PPPOL2TP_MSG_DEBUG = (1 << 0), /* verbose debug (if + * compiled in) */ + PPPOL2TP_MSG_CONTROL = (1 << 1), /* userspace - kernel + * interface */ + PPPOL2TP_MSG_SEQ = (1 << 2), /* sequence numbers */ + PPPOL2TP_MSG_DATA = (1 << 3), /* data packets */ +}; + + + +#endif diff --git a/include/linux/if_pppox.h b/include/linux/if_pppox.h index 6f987be60f..25652545ba 100644 --- a/include/linux/if_pppox.h +++ b/include/linux/if_pppox.h @@ -27,6 +27,7 @@ #include #include #endif /* __KERNEL__ */ +#include /* For user-space programs to pick up these definitions * which they wouldn't get otherwise without defining __KERNEL__ @@ -50,8 +51,9 @@ struct pppoe_addr{ * Protocols supported by AF_PPPOX */ #define PX_PROTO_OE 0 /* Currently just PPPoE */ -#define PX_MAX_PROTO 1 - +#define PX_PROTO_OL2TP 1 /* Now L2TP also */ +#define PX_MAX_PROTO 2 + struct sockaddr_pppox { sa_family_t sa_family; /* address family, AF_PPPOX */ unsigned int sa_protocol; /* protocol identifier */ @@ -60,6 +62,16 @@ struct sockaddr_pppox { }sa_addr; }__attribute__ ((packed)); +/* The use of the above union isn't viable because the size of this + * struct must stay fixed over time -- applications use sizeof(struct + * sockaddr_pppox) to fill it. We use a protocol specific sockaddr + * type instead. + */ +struct sockaddr_pppol2tp { + sa_family_t sa_family; /* address family, AF_PPPOX */ + unsigned int sa_protocol; /* protocol identifier */ + struct pppol2tp_addr pppol2tp; +}__attribute__ ((packed)); /********************************************************************* * diff --git a/include/linux/socket.h b/include/linux/socket.h index 6e7c9483a6..fe195c97a8 100644 --- a/include/linux/socket.h +++ b/include/linux/socket.h @@ -287,6 +287,7 @@ struct ucred { #define SOL_NETLINK 270 #define SOL_TIPC 271 #define SOL_RXRPC 272 +#define SOL_PPPOL2TP 273 /* IPX options */ #define IPX_TYPE 1 -- cgit v1.2.2 From f25f4e44808f0f6c9875d94ef1c41ef86c288eb2 Mon Sep 17 00:00:00 2001 From: Peter P Waskiewicz Jr Date: Fri, 6 Jul 2007 13:36:20 -0700 Subject: [CORE] Stack changes to add multiqueue hardware support API Add the multiqueue hardware device support API to the core network stack. Allow drivers to allocate multiple queues and manage them at the netdev level if they choose to do so. Added a new field to sk_buff, namely queue_mapping, for drivers to know which tx_ring to select based on OS classification of the flow. Signed-off-by: Peter P Waskiewicz Jr Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/etherdevice.h | 3 +- include/linux/netdevice.h | 80 ++++++++++++++++++++++++++++++++++++++++++--- include/linux/skbuff.h | 25 ++++++++++++-- 3 files changed, 99 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h index f48eb89efd..6cdb97365e 100644 --- a/include/linux/etherdevice.h +++ b/include/linux/etherdevice.h @@ -39,7 +39,8 @@ extern void eth_header_cache_update(struct hh_cache *hh, struct net_device *dev extern int eth_header_cache(struct neighbour *neigh, struct hh_cache *hh); -extern struct net_device *alloc_etherdev(int sizeof_priv); +extern struct net_device *alloc_etherdev_mq(int sizeof_priv, unsigned int queue_count); +#define alloc_etherdev(sizeof_priv) alloc_etherdev_mq(sizeof_priv, 1) /** * is_zero_ether_addr - Determine if give Ethernet address is all zeros. diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 2c0cc19edf..9817821729 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -108,6 +108,14 @@ struct wireless_dev; #define MAX_HEADER (LL_MAX_HEADER + 48) #endif +struct net_device_subqueue +{ + /* Give a control state for each queue. This struct may contain + * per-queue locks in the future. + */ + unsigned long state; +}; + /* * Network device statistics. Akin to the 2.0 ether stats but * with byte counters. @@ -331,6 +339,7 @@ struct net_device #define NETIF_F_VLAN_CHALLENGED 1024 /* Device cannot handle VLAN packets */ #define NETIF_F_GSO 2048 /* Enable software GSO. */ #define NETIF_F_LLTX 4096 /* LockLess TX */ +#define NETIF_F_MULTI_QUEUE 16384 /* Has multiple TX/RX queues */ /* Segmentation offload features */ #define NETIF_F_GSO_SHIFT 16 @@ -557,6 +566,10 @@ struct net_device /* rtnetlink link ops */ const struct rtnl_link_ops *rtnl_link_ops; + + /* The TX queue control structures */ + unsigned int egress_subqueue_count; + struct net_device_subqueue egress_subqueue[0]; }; #define to_net_dev(d) container_of(d, struct net_device, dev) @@ -565,9 +578,7 @@ struct net_device static inline void *netdev_priv(const struct net_device *dev) { - return (char *)dev + ((sizeof(struct net_device) - + NETDEV_ALIGN_CONST) - & ~NETDEV_ALIGN_CONST); + return dev->priv; } #define SET_MODULE_OWNER(dev) do { } while (0) @@ -719,6 +730,62 @@ static inline int netif_running(const struct net_device *dev) return test_bit(__LINK_STATE_START, &dev->state); } +/* + * Routines to manage the subqueues on a device. We only need start + * stop, and a check if it's stopped. All other device management is + * done at the overall netdevice level. + * Also test the device if we're multiqueue. + */ +static inline void netif_start_subqueue(struct net_device *dev, u16 queue_index) +{ +#ifdef CONFIG_NETDEVICES_MULTIQUEUE + clear_bit(__LINK_STATE_XOFF, &dev->egress_subqueue[queue_index].state); +#endif +} + +static inline void netif_stop_subqueue(struct net_device *dev, u16 queue_index) +{ +#ifdef CONFIG_NETDEVICES_MULTIQUEUE +#ifdef CONFIG_NETPOLL_TRAP + if (netpoll_trap()) + return; +#endif + set_bit(__LINK_STATE_XOFF, &dev->egress_subqueue[queue_index].state); +#endif +} + +static inline int netif_subqueue_stopped(const struct net_device *dev, + u16 queue_index) +{ +#ifdef CONFIG_NETDEVICES_MULTIQUEUE + return test_bit(__LINK_STATE_XOFF, + &dev->egress_subqueue[queue_index].state); +#else + return 0; +#endif +} + +static inline void netif_wake_subqueue(struct net_device *dev, u16 queue_index) +{ +#ifdef CONFIG_NETDEVICES_MULTIQUEUE +#ifdef CONFIG_NETPOLL_TRAP + if (netpoll_trap()) + return; +#endif + if (test_and_clear_bit(__LINK_STATE_XOFF, + &dev->egress_subqueue[queue_index].state)) + __netif_schedule(dev); +#endif +} + +static inline int netif_is_multiqueue(const struct net_device *dev) +{ +#ifdef CONFIG_NETDEVICES_MULTIQUEUE + return (!!(NETIF_F_MULTI_QUEUE & dev->features)); +#else + return 0; +#endif +} /* Use this variant when it is known for sure that it * is executing from interrupt context. @@ -1009,8 +1076,11 @@ static inline void netif_tx_disable(struct net_device *dev) extern void ether_setup(struct net_device *dev); /* Support for loadable net-drivers */ -extern struct net_device *alloc_netdev(int sizeof_priv, const char *name, - void (*setup)(struct net_device *)); +extern struct net_device *alloc_netdev_mq(int sizeof_priv, const char *name, + void (*setup)(struct net_device *), + unsigned int queue_count); +#define alloc_netdev(sizeof_priv, name, setup) \ + alloc_netdev_mq(sizeof_priv, name, setup, 1) extern int register_netdev(struct net_device *dev); extern void unregister_netdev(struct net_device *dev); /* Functions used for secondary unicast and multicast support */ diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 881fe80f01..2d6a14f5f2 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -196,7 +196,6 @@ typedef unsigned char *sk_buff_data_t; * @sk: Socket we are owned by * @tstamp: Time we arrived * @dev: Device we arrived on/are leaving by - * @iif: ifindex of device we arrived on * @transport_header: Transport layer header * @network_header: Network layer header * @mac_header: Link layer header @@ -231,6 +230,8 @@ typedef unsigned char *sk_buff_data_t; * @nfctinfo: Relationship of this skb to the connection * @nfct_reasm: netfilter conntrack re-assembly pointer * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c + * @iif: ifindex of device we arrived on + * @queue_mapping: Queue mapping for multiqueue devices * @tc_index: Traffic control index * @tc_verd: traffic control verdict * @dma_cookie: a cookie to one of several possible DMA operations @@ -246,8 +247,6 @@ struct sk_buff { struct sock *sk; ktime_t tstamp; struct net_device *dev; - int iif; - /* 4 byte hole on 64 bit*/ struct dst_entry *dst; struct sec_path *sp; @@ -290,12 +289,18 @@ struct sk_buff { #ifdef CONFIG_BRIDGE_NETFILTER struct nf_bridge_info *nf_bridge; #endif + + int iif; + __u16 queue_mapping; + #ifdef CONFIG_NET_SCHED __u16 tc_index; /* traffic control index */ #ifdef CONFIG_NET_CLS_ACT __u16 tc_verd; /* traffic control verdict */ #endif #endif + /* 2 byte hole */ + #ifdef CONFIG_NET_DMA dma_cookie_t dma_cookie; #endif @@ -1725,6 +1730,20 @@ static inline void skb_init_secmark(struct sk_buff *skb) { } #endif +static inline void skb_set_queue_mapping(struct sk_buff *skb, u16 queue_mapping) +{ +#ifdef CONFIG_NETDEVICES_MULTIQUEUE + skb->queue_mapping = queue_mapping; +#endif +} + +static inline void skb_copy_queue_mapping(struct sk_buff *to, const struct sk_buff *from) +{ +#ifdef CONFIG_NETDEVICES_MULTIQUEUE + to->queue_mapping = from->queue_mapping; +#endif +} + static inline int skb_is_gso(const struct sk_buff *skb) { return skb_shinfo(skb)->gso_size; -- cgit v1.2.2 From d62733c8e437fdb58325617c4b3331769ba82d70 Mon Sep 17 00:00:00 2001 From: Peter P Waskiewicz Jr Date: Thu, 28 Jun 2007 21:04:31 -0700 Subject: [SCHED]: Qdisc changes and sch_rr added for multiqueue Add the new sch_rr qdisc for multiqueue network device support. Allow sch_prio and sch_rr to be compiled with or without multiqueue hardware support. sch_rr is part of sch_prio, and is referenced from MODULE_ALIAS. This was done since sch_prio and sch_rr only differ in their dequeue routine. Signed-off-by: Peter P Waskiewicz Jr Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/pkt_sched.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/linux/pkt_sched.h b/include/linux/pkt_sched.h index d10f353385..268c51599e 100644 --- a/include/linux/pkt_sched.h +++ b/include/linux/pkt_sched.h @@ -101,6 +101,15 @@ struct tc_prio_qopt __u8 priomap[TC_PRIO_MAX+1]; /* Map: logical priority -> PRIO band */ }; +enum +{ + TCA_PRIO_UNSPEC, + TCA_PRIO_MQ, + __TCA_PRIO_MAX +}; + +#define TCA_PRIO_MAX (__TCA_PRIO_MAX - 1) + /* TBF section */ struct tc_tbf_qopt -- cgit v1.2.2 From 61cbc2fca6335be52788773b21efdc52a2750924 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 30 Jun 2007 13:35:52 -0700 Subject: [NET]: Fix secondary unicast/multicast address count maintenance When a reference to an existing address is increased or decreased without hitting zero, the address count is incorrectly adjusted. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netdevice.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 9817821729..8590d685d9 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -1091,8 +1091,8 @@ extern int dev_unicast_add(struct net_device *dev, void *addr, int alen); extern int dev_mc_delete(struct net_device *dev, void *addr, int alen, int all); extern int dev_mc_add(struct net_device *dev, void *addr, int alen, int newonly); extern void dev_mc_discard(struct net_device *dev); -extern int __dev_addr_delete(struct dev_addr_list **list, void *addr, int alen, int all); -extern int __dev_addr_add(struct dev_addr_list **list, void *addr, int alen, int newonly); +extern int __dev_addr_delete(struct dev_addr_list **list, int *count, void *addr, int alen, int all); +extern int __dev_addr_add(struct dev_addr_list **list, int *count, void *addr, int alen, int newonly); extern void __dev_addr_discard(struct dev_addr_list **list); extern void dev_set_promiscuity(struct net_device *dev, int inc); extern void dev_set_allmulti(struct net_device *dev, int inc); -- cgit v1.2.2 From 628529b6ee334fedc8d25ce56205bb99566572b9 Mon Sep 17 00:00:00 2001 From: Jamal Hadi Salim Date: Mon, 2 Jul 2007 22:41:14 -0700 Subject: [XFRM] Introduce standalone SAD lookup This allows other in-kernel functions to do SAD lookups. The only known user at the moment is pktgen. Signed-off-by: Jamal Hadi Salim Signed-off-by: David S. Miller --- include/net/xfrm.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/net/xfrm.h b/include/net/xfrm.h index ee3827f053..d3a898b18f 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -928,6 +928,10 @@ extern struct xfrm_state *xfrm_state_find(xfrm_address_t *daddr, xfrm_address_t struct flowi *fl, struct xfrm_tmpl *tmpl, struct xfrm_policy *pol, int *err, unsigned short family); +extern struct xfrm_state * xfrm_stateonly_find(xfrm_address_t *daddr, + xfrm_address_t *saddr, + unsigned short family, + u8 mode, u8 proto, u32 reqid); extern int xfrm_state_check_expire(struct xfrm_state *x); extern void xfrm_state_insert(struct xfrm_state *x); extern int xfrm_state_add(struct xfrm_state *x); -- cgit v1.2.2 From 4bdf39911e7a887c4499161422423cbaf16684e8 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Mon, 2 Jul 2007 22:47:37 -0700 Subject: [NET_SCHED]: Remove unnecessary stats_lock pointers Remove stats_lock pointers from qdisc-internal structures, in all cases it points to dev->queue_lock. The only case where it is necessary is for top-level qdiscs, where it might also point to dev->ingress_lock in case of the ingress qdisc. Also remove it from actions completely, it always points to the actions internal lock. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/act_api.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/net/act_api.h b/include/net/act_api.h index 8b06c2f365..2f0273feab 100644 --- a/include/net/act_api.h +++ b/include/net/act_api.h @@ -19,7 +19,6 @@ struct tcf_common { struct gnet_stats_basic tcfc_bstats; struct gnet_stats_queue tcfc_qstats; struct gnet_stats_rate_est tcfc_rate_est; - spinlock_t *tcfc_stats_lock; spinlock_t tcfc_lock; }; #define tcf_next common.tcfc_next @@ -32,7 +31,6 @@ struct tcf_common { #define tcf_bstats common.tcfc_bstats #define tcf_qstats common.tcfc_qstats #define tcf_rate_est common.tcfc_rate_est -#define tcf_stats_lock common.tcfc_stats_lock #define tcf_lock common.tcfc_lock struct tcf_police { -- cgit v1.2.2 From 8c644623fe7e41f59fe97cdf666cba3cb7ced7d8 Mon Sep 17 00:00:00 2001 From: Guido Guenther Date: Mon, 2 Jul 2007 22:50:25 -0700 Subject: [NET]: Allow group ownership of TUN/TAP devices. Introduce a new syscall TUNSETGROUP for group ownership setting of tap devices. The user now is allowed to send packages if either his euid or his egid matches the one specified via tunctl (via -u or -g respecitvely). If both, gid and uid, are set via tunctl, both have to match. Signed-off-by: Guido Guenther Signed-off-by: Jeff Dike Signed-off-by: David S. Miller --- include/linux/if_tun.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/if_tun.h b/include/linux/if_tun.h index 88aef7b86e..42eb6945b9 100644 --- a/include/linux/if_tun.h +++ b/include/linux/if_tun.h @@ -36,6 +36,7 @@ struct tun_struct { unsigned long flags; int attached; uid_t owner; + gid_t group; wait_queue_head_t read_wait; struct sk_buff_head readq; @@ -78,6 +79,7 @@ struct tun_struct { #define TUNSETPERSIST _IOW('T', 203, int) #define TUNSETOWNER _IOW('T', 204, int) #define TUNSETLINK _IOW('T', 205, int) +#define TUNSETGROUP _IOW('T', 206, int) /* TUNSETIFF ifr flags */ #define IFF_TUN 0x0001 -- cgit v1.2.2 From 89da1ecf5483e6aa29b456a15ad6d05a6797c5a5 Mon Sep 17 00:00:00 2001 From: Samuel Ortiz Date: Mon, 2 Jul 2007 22:54:18 -0700 Subject: [IrDA]: Netlink layer. First IrDA configuration netlink layer implementation. Currently, we only support the set/get mode commands. Signed-off-by: Samuel Ortiz Signed-off-by: David S. Miller --- include/linux/irda.h | 27 +++++++++++++++++++++++++++ include/net/irda/irda.h | 3 +++ include/net/irda/irlap.h | 2 ++ 3 files changed, 32 insertions(+) (limited to 'include') diff --git a/include/linux/irda.h b/include/linux/irda.h index 945ba31108..35911bd4db 100644 --- a/include/linux/irda.h +++ b/include/linux/irda.h @@ -216,6 +216,33 @@ struct if_irda_req { #define ifr_dtr ifr_ifru.ifru_line.dtr #define ifr_rts ifr_ifru.ifru_line.rts + +/* IrDA netlink definitions */ +#define IRDA_NL_NAME "irda" +#define IRDA_NL_VERSION 1 + +enum irda_nl_commands { + IRDA_NL_CMD_UNSPEC, + IRDA_NL_CMD_SET_MODE, + IRDA_NL_CMD_GET_MODE, + + __IRDA_NL_CMD_AFTER_LAST +}; +#define IRDA_NL_CMD_MAX (__IRDA_NL_CMD_AFTER_LAST - 1) + +enum nl80211_attrs { + IRDA_NL_ATTR_UNSPEC, + IRDA_NL_ATTR_IFNAME, + IRDA_NL_ATTR_MODE, + + __IRDA_NL_ATTR_AFTER_LAST +}; +#define IRDA_NL_ATTR_MAX (__IRDA_NL_ATTR_AFTER_LAST - 1) + +/* IrDA modes */ +#define IRDA_MODE_PRIMARY 0x1 +#define IRDA_MODE_SECONDARY 0x2 + #endif /* KERNEL_IRDA_H */ diff --git a/include/net/irda/irda.h b/include/net/irda/irda.h index 36bee441aa..08387553b5 100644 --- a/include/net/irda/irda.h +++ b/include/net/irda/irda.h @@ -125,6 +125,9 @@ extern void irda_sysctl_unregister(void); extern int irsock_init(void); extern void irsock_cleanup(void); +extern int irda_nl_register(void); +extern void irda_nl_unregister(void); + extern int irlap_driver_rcv(struct sk_buff *skb, struct net_device *dev, struct packet_type *ptype, struct net_device *orig_dev); diff --git a/include/net/irda/irlap.h b/include/net/irda/irlap.h index a3d370efb9..9d0c78ea92 100644 --- a/include/net/irda/irlap.h +++ b/include/net/irda/irlap.h @@ -208,6 +208,8 @@ struct irlap_cb { int xbofs_delay; /* Nr of XBOF's used to MTT */ int bofs_count; /* Negotiated extra BOFs */ int next_bofs; /* Negotiated extra BOFs after next frame */ + + int mode; /* IrLAP mode (primary, secondary or monitor) */ }; /* -- cgit v1.2.2 From 411725280bd0058ebb83c0e32133b7a94902c3a6 Mon Sep 17 00:00:00 2001 From: Samuel Ortiz Date: Mon, 2 Jul 2007 22:55:31 -0700 Subject: [IrDA]: Monitor mode. Through the IrDA netlink set mode command, we switch to IrDA monitor mode, where one IrLAP instance receives all the packets on the media, without ever responding to them. Signed-off-by: Samuel Ortiz Signed-off-by: David S. Miller --- include/linux/irda.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/irda.h b/include/linux/irda.h index 35911bd4db..8e3735714c 100644 --- a/include/linux/irda.h +++ b/include/linux/irda.h @@ -242,6 +242,7 @@ enum nl80211_attrs { /* IrDA modes */ #define IRDA_MODE_PRIMARY 0x1 #define IRDA_MODE_SECONDARY 0x2 +#define IRDA_MODE_MONITOR 0x4 #endif /* KERNEL_IRDA_H */ -- cgit v1.2.2 From 067b207b281db5e3f03f8d244286c20f61aa2343 Mon Sep 17 00:00:00 2001 From: James Chapman Date: Thu, 5 Jul 2007 17:08:05 -0700 Subject: [UDP]: Cleanup UDP encapsulation code This cleanup fell out after adding L2TP support where a new encap_rcv funcptr was added to struct udp_sock. Have XFRM use the new encap_rcv funcptr, which allows us to move the XFRM encap code from udp.c into xfrm4_input.c. Make xfrm4_rcv_encap() static since it is no longer called externally. Signed-off-by: James Chapman Acked-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/xfrm.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/xfrm.h b/include/net/xfrm.h index d3a898b18f..ae959e9501 100644 --- a/include/net/xfrm.h +++ b/include/net/xfrm.h @@ -1003,7 +1003,7 @@ extern int xfrm6_find_1stfragopt(struct xfrm_state *x, struct sk_buff *skb, u8 **prevhdr); #ifdef CONFIG_XFRM -extern int xfrm4_rcv_encap(struct sk_buff *skb, __u16 encap_type); +extern int xfrm4_udp_encap_rcv(struct sock *sk, struct sk_buff *skb); extern int xfrm_user_policy(struct sock *sk, int optname, u8 __user *optval, int optlen); extern int xfrm_dst_lookup(struct xfrm_dst **dst, struct flowi *fl, unsigned short family); #else @@ -1012,12 +1012,13 @@ static inline int xfrm_user_policy(struct sock *sk, int optname, u8 __user *optv return -ENOPROTOOPT; } -static inline int xfrm4_rcv_encap(struct sk_buff *skb, __u16 encap_type) +static inline int xfrm4_udp_encap_rcv(struct sock *sk, struct sk_buff *skb) { /* should not happen */ kfree_skb(skb); return 0; } + static inline int xfrm_dst_lookup(struct xfrm_dst **dst, struct flowi *fl, unsigned short family) { return -EINVAL; -- cgit v1.2.2 From 7bfe24611671ec76b44281e582b38535e21f01a9 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:14:23 -0700 Subject: [NETFILTER]: ip6_tables: fix explanation of valid upper protocol number This explains the allowed upper protocol numbers. IP6T_F_NOPROTO was introduced to use 0 as Hop-by-Hop option header, not wildcard. But that seemed to be forgotten. 0 has been used as wildcard since 2002-08-23. Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter_ipv6/ip6_tables.h | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/netfilter_ipv6/ip6_tables.h b/include/linux/netfilter_ipv6/ip6_tables.h index 4686f8342c..9a720f0588 100644 --- a/include/linux/netfilter_ipv6/ip6_tables.h +++ b/include/linux/netfilter_ipv6/ip6_tables.h @@ -44,8 +44,14 @@ struct ip6t_ip6 { char iniface[IFNAMSIZ], outiface[IFNAMSIZ]; unsigned char iniface_mask[IFNAMSIZ], outiface_mask[IFNAMSIZ]; - /* ARGH, HopByHop uses 0, so can't do 0 = ANY, - instead IP6T_F_NOPROTO must be set */ + /* Upper protocol number + * - The allowed value is 0 (any) or protocol number of last parsable + * header, which is 50 (ESP), 59 (No Next Header), 135 (MH), or + * the non IPv6 extension headers. + * - The protocol numbers of IPv6 extension headers except of ESP and + * MH do not match any packets. + * - You also need to set IP6T_FLAGS_PROTO to "flags" to check protocol. + */ u_int16_t proto; /* TOS to match iff flags & IP6T_F_TOS */ u_int8_t tos; -- cgit v1.2.2 From cff533ac12494fa002e2c46acc94d670e5f636a2 Mon Sep 17 00:00:00 2001 From: Jan Engelhardt Date: Sat, 7 Jul 2007 22:15:12 -0700 Subject: [NETFILTER]: x_tables: switch hotdrop to bool Switch the "hotdrop" variables to boolean Signed-off-by: Jan Engelhardt Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter/x_tables.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/netfilter/x_tables.h b/include/linux/netfilter/x_tables.h index 7e733a6ba4..b8577d18d1 100644 --- a/include/linux/netfilter/x_tables.h +++ b/include/linux/netfilter/x_tables.h @@ -148,7 +148,7 @@ struct xt_match const void *matchinfo, int offset, unsigned int protoff, - int *hotdrop); + bool *hotdrop); /* Called when user tries to insert an entry of this type. */ /* Should return true or false. */ -- cgit v1.2.2 From 1d93a9cbad608f6398ba6c5b588c504ccd35a2ca Mon Sep 17 00:00:00 2001 From: Jan Engelhardt Date: Sat, 7 Jul 2007 22:15:35 -0700 Subject: [NETFILTER]: x_tables: switch xt_match->match to bool Switch the return type of match functions to boolean Signed-off-by: Jan Engelhardt Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter/x_tables.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/linux/netfilter/x_tables.h b/include/linux/netfilter/x_tables.h index b8577d18d1..304fce356a 100644 --- a/include/linux/netfilter/x_tables.h +++ b/include/linux/netfilter/x_tables.h @@ -141,14 +141,14 @@ struct xt_match /* Arguments changed since 2.6.9, as this must now handle non-linear skb, using skb_header_pointer and skb_ip_make_writable. */ - int (*match)(const struct sk_buff *skb, - const struct net_device *in, - const struct net_device *out, - const struct xt_match *match, - const void *matchinfo, - int offset, - unsigned int protoff, - bool *hotdrop); + bool (*match)(const struct sk_buff *skb, + const struct net_device *in, + const struct net_device *out, + const struct xt_match *match, + const void *matchinfo, + int offset, + unsigned int protoff, + bool *hotdrop); /* Called when user tries to insert an entry of this type. */ /* Should return true or false. */ -- cgit v1.2.2 From ccb79bdce71f2c04cfa9bfcbaf4d37e2f963d684 Mon Sep 17 00:00:00 2001 From: Jan Engelhardt Date: Sat, 7 Jul 2007 22:16:00 -0700 Subject: [NETFILTER]: x_tables: switch xt_match->checkentry to bool Switch the return type of match functions to boolean Signed-off-by: Jan Engelhardt Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter/x_tables.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/netfilter/x_tables.h b/include/linux/netfilter/x_tables.h index 304fce356a..5130dd60a2 100644 --- a/include/linux/netfilter/x_tables.h +++ b/include/linux/netfilter/x_tables.h @@ -152,11 +152,11 @@ struct xt_match /* Called when user tries to insert an entry of this type. */ /* Should return true or false. */ - int (*checkentry)(const char *tablename, - const void *ip, - const struct xt_match *match, - void *matchinfo, - unsigned int hook_mask); + bool (*checkentry)(const char *tablename, + const void *ip, + const struct xt_match *match, + void *matchinfo, + unsigned int hook_mask); /* Called when entry of this type deleted. */ void (*destroy)(const struct xt_match *match, void *matchinfo); -- cgit v1.2.2 From e1931b784a8de324abf310fa3b5e3f25d3988233 Mon Sep 17 00:00:00 2001 From: Jan Engelhardt Date: Sat, 7 Jul 2007 22:16:26 -0700 Subject: [NETFILTER]: x_tables: switch xt_target->checkentry to bool Switch the return type of target checkentry functions to boolean. Signed-off-by: Jan Engelhardt Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter/x_tables.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/netfilter/x_tables.h b/include/linux/netfilter/x_tables.h index 5130dd60a2..64f425a855 100644 --- a/include/linux/netfilter/x_tables.h +++ b/include/linux/netfilter/x_tables.h @@ -202,11 +202,11 @@ struct xt_target hook_mask is a bitmask of hooks from which it can be called. */ /* Should return true or false. */ - int (*checkentry)(const char *tablename, - const void *entry, - const struct xt_target *target, - void *targinfo, - unsigned int hook_mask); + bool (*checkentry)(const char *tablename, + const void *entry, + const struct xt_target *target, + void *targinfo, + unsigned int hook_mask); /* Called when entry of this type deleted. */ void (*destroy)(const struct xt_target *target, void *targinfo); -- cgit v1.2.2 From 1b50b8a371e90a5e110f466e4ac02cf6b5f681de Mon Sep 17 00:00:00 2001 From: Jan Engelhardt Date: Sat, 7 Jul 2007 22:20:36 -0700 Subject: [NETFILTER]: Add u32 match Along comes... xt_u32, a revamped ipt_u32 from POM-NG, Plus: * 2007-06-02: added ipv6 support * 2007-06-05: uses kmalloc for the big buffer * 2007-06-05: added inversion * 2007-06-20: use skb_copy_bits() and get rid of the big buffer and lock (suggested by Pablo Neira Ayuso) Signed-off-by: Jan Engelhardt Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter/xt_u32.h | 40 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 include/linux/netfilter/xt_u32.h (limited to 'include') diff --git a/include/linux/netfilter/xt_u32.h b/include/linux/netfilter/xt_u32.h new file mode 100644 index 0000000000..9947f56cdb --- /dev/null +++ b/include/linux/netfilter/xt_u32.h @@ -0,0 +1,40 @@ +#ifndef _XT_U32_H +#define _XT_U32_H 1 + +enum xt_u32_ops { + XT_U32_AND, + XT_U32_LEFTSH, + XT_U32_RIGHTSH, + XT_U32_AT, +}; + +struct xt_u32_location_element { + u_int32_t number; + u_int8_t nextop; +}; + +struct xt_u32_value_element { + u_int32_t min; + u_int32_t max; +}; + +/* + * Any way to allow for an arbitrary number of elements? + * For now, I settle with a limit of 10 each. + */ +#define XT_U32_MAXSIZE 10 + +struct xt_u32_test { + struct xt_u32_location_element location[XT_U32_MAXSIZE+1]; + struct xt_u32_value_element value[XT_U32_MAXSIZE+1]; + u_int8_t nnums; + u_int8_t nvalues; +}; + +struct xt_u32 { + struct xt_u32_test tests[XT_U32_MAXSIZE+1]; + u_int8_t ntests; + u_int8_t invert; +}; + +#endif /* _XT_U32_H */ -- cgit v1.2.2 From ba9dda3ab5a865542e69dfe01edb2436857c9420 Mon Sep 17 00:00:00 2001 From: Jozsef Kadlecsik Date: Sat, 7 Jul 2007 22:21:23 -0700 Subject: [NETFILTER]: x_tables: add TRACE target The TRACE target can be used to follow IP and IPv6 packets through the ruleset. Signed-off-by: Jozsef Kadlecsik Signed-off-by: Patrick NcHardy Signed-off-by: David S. Miller --- include/linux/skbuff.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 2d6a14f5f2..625d73b07a 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -227,6 +227,7 @@ typedef unsigned char *sk_buff_data_t; * @mark: Generic packet mark * @nfct: Associated connection, if any * @ipvs_property: skbuff is owned by ipvs + * @nf_trace: netfilter packet trace flag * @nfctinfo: Relationship of this skb to the connection * @nfct_reasm: netfilter conntrack re-assembly pointer * @nf_bridge: Saved data about a bridged frame - see br_netfilter.c @@ -278,7 +279,8 @@ struct sk_buff { nfctinfo:3; __u8 pkt_type:3, fclone:2, - ipvs_property:1; + ipvs_property:1, + nf_trace:1; __be16 protocol; void (*destructor)(struct sk_buff *skb); -- cgit v1.2.2 From 4ba887790ce2015e8c464809c0be902fb813ad15 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:22:33 -0700 Subject: [NETFILTER]: nf_nat: move NAT declarations from nf_conntrack_ipv4.h to nf_nat.h Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/ipv4/nf_conntrack_ipv4.h | 23 +---------------------- include/net/netfilter/nf_conntrack.h | 1 + include/net/netfilter/nf_nat.h | 18 ++++++++++++++++++ include/net/netfilter/nf_nat_core.h | 1 + 4 files changed, 21 insertions(+), 22 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/ipv4/nf_conntrack_ipv4.h b/include/net/netfilter/ipv4/nf_conntrack_ipv4.h index 1401ccc051..3ed4e14970 100644 --- a/include/net/netfilter/ipv4/nf_conntrack_ipv4.h +++ b/include/net/netfilter/ipv4/nf_conntrack_ipv4.h @@ -9,29 +9,8 @@ #ifndef _NF_CONNTRACK_IPV4_H #define _NF_CONNTRACK_IPV4_H -#ifdef CONFIG_NF_NAT_NEEDED -#include -#include - -/* per conntrack: nat application helper private data */ -union nf_conntrack_nat_help { - /* insert nat helper private data here */ - struct nf_nat_pptp nat_pptp_info; -}; - -struct nf_conn_nat { - struct nf_nat_info info; - union nf_conntrack_nat_help help; -#if defined(CONFIG_IP_NF_TARGET_MASQUERADE) || \ - defined(CONFIG_IP_NF_TARGET_MASQUERADE_MODULE) - int masq_index; -#endif -}; -#endif /* CONFIG_NF_NAT_NEEDED */ - /* Returns new sk_buff, or NULL */ -struct sk_buff * -nf_ct_ipv4_ct_gather_frags(struct sk_buff *skb); +struct sk_buff *nf_ct_ipv4_ct_gather_frags(struct sk_buff *skb); extern struct nf_conntrack_l4proto nf_conntrack_l4proto_tcp4; extern struct nf_conntrack_l4proto nf_conntrack_l4proto_udp4; diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index 4732432f8e..12a0e793cc 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -280,6 +280,7 @@ nf_conntrack_unregister_cache(u_int32_t features); * nat: nf_conn .. nf_conn_nat, nf_conn .. nf_conn_nat .. nf_conn help */ #ifdef CONFIG_NF_NAT_NEEDED +#include static inline struct nf_conn_nat *nfct_nat(const struct nf_conn *ct) { unsigned int offset = sizeof(struct nf_conn); diff --git a/include/net/netfilter/nf_nat.h b/include/net/netfilter/nf_nat.h index bc57dd7b9b..47d3dc107a 100644 --- a/include/net/netfilter/nf_nat.h +++ b/include/net/netfilter/nf_nat.h @@ -51,6 +51,7 @@ struct nf_nat_multi_range_compat #ifdef __KERNEL__ #include +#include /* The structure embedded in the conntrack structure. */ struct nf_nat_info @@ -59,6 +60,23 @@ struct nf_nat_info struct nf_nat_seq seq[IP_CT_DIR_MAX]; }; +/* per conntrack: nat application helper private data */ +union nf_conntrack_nat_help +{ + /* insert nat helper private data here */ + struct nf_nat_pptp nat_pptp_info; +}; + +struct nf_conn_nat +{ + struct nf_nat_info info; + union nf_conntrack_nat_help help; +#if defined(CONFIG_IP_NF_TARGET_MASQUERADE) || \ + defined(CONFIG_IP_NF_TARGET_MASQUERADE_MODULE) + int masq_index; +#endif +}; + struct nf_conn; /* Set up the info structure to map into this range. */ diff --git a/include/net/netfilter/nf_nat_core.h b/include/net/netfilter/nf_nat_core.h index 9778ffa934..c3cd127ba4 100644 --- a/include/net/netfilter/nf_nat_core.h +++ b/include/net/netfilter/nf_nat_core.h @@ -2,6 +2,7 @@ #define _NF_NAT_CORE_H #include #include +#include /* This header used to share core functionality between the standalone NAT module, and the compatibility layer's use of NAT for masquerading. */ -- cgit v1.2.2 From ecfab2c9fe5597221c2b30dec48634a2361a0d08 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:23:21 -0700 Subject: [NETFILTER]: nf_conntrack: introduce extension infrastructure Old space allocator of conntrack had problems about extensibility. - It required slab cache per combination of extensions. - It expected what extensions would be assigned, but it was impossible to expect that completely, then we allocated bigger memory object than really required. - It needed to search helper twice due to lock issue. Now basic informations of a connection are stored in 'struct nf_conn'. And a storage for extension (helper, NAT) is allocated by kmalloc. Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack.h | 3 ++ include/net/netfilter/nf_conntrack_extend.h | 80 +++++++++++++++++++++++++++++ 2 files changed, 83 insertions(+) create mode 100644 include/net/netfilter/nf_conntrack_extend.h (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index 12a0e793cc..c31382d3ef 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -131,6 +131,9 @@ struct nf_conn /* Storage reserved for other modules: */ union nf_conntrack_proto proto; + /* Extensions */ + struct nf_ct_ext *ext; + /* features dynamically at the end: helper, nat (both optional) */ char data[0]; }; diff --git a/include/net/netfilter/nf_conntrack_extend.h b/include/net/netfilter/nf_conntrack_extend.h new file mode 100644 index 0000000000..8a988d1364 --- /dev/null +++ b/include/net/netfilter/nf_conntrack_extend.h @@ -0,0 +1,80 @@ +#ifndef _NF_CONNTRACK_EXTEND_H +#define _NF_CONNTRACK_EXTEND_H + +#include + +enum nf_ct_ext_id +{ + NF_CT_EXT_NUM, +}; + +/* Extensions: optional stuff which isn't permanently in struct. */ +struct nf_ct_ext { + u8 offset[NF_CT_EXT_NUM]; + u8 len; + u8 real_len; + char data[0]; +}; + +static inline int nf_ct_ext_exist(const struct nf_conn *ct, u8 id) +{ + return (ct->ext && ct->ext->offset[id]); +} + +static inline void *__nf_ct_ext_find(const struct nf_conn *ct, u8 id) +{ + if (!nf_ct_ext_exist(ct, id)) + return NULL; + + return (void *)ct->ext + ct->ext->offset[id]; +} +#define nf_ct_ext_find(ext, id) \ + ((id##_TYPE *)__nf_ct_ext_find((ext), (id))) + +/* Destroy all relationships */ +extern void __nf_ct_ext_destroy(struct nf_conn *ct); +static inline void nf_ct_ext_destroy(struct nf_conn *ct) +{ + if (ct->ext) + __nf_ct_ext_destroy(ct); +} + +/* Free operation. If you want to free a object referred from private area, + * please implement __nf_ct_ext_free() and call it. + */ +static inline void nf_ct_ext_free(struct nf_conn *ct) +{ + if (ct->ext) + kfree(ct->ext); +} + +/* Add this type, returns pointer to data or NULL. */ +void * +__nf_ct_ext_add(struct nf_conn *ct, enum nf_ct_ext_id id, gfp_t gfp); +#define nf_ct_ext_add(ct, id, gfp) \ + ((id##_TYPE *)__nf_ct_ext_add((ct), (id), (gfp))) + +#define NF_CT_EXT_F_PREALLOC 0x0001 + +struct nf_ct_ext_type +{ + /* Destroys relationships (can be NULL). */ + void (*destroy)(struct nf_conn *ct); + /* Called when realloacted (can be NULL). + Contents has already been moved. */ + void (*move)(struct nf_conn *ct, void *old); + + enum nf_ct_ext_id id; + + unsigned int flags; + + /* Length and min alignment. */ + u8 len; + u8 align; + /* initial size of nf_ct_ext. */ + u8 alloc_size; +}; + +int nf_ct_extend_register(struct nf_ct_ext_type *type); +void nf_ct_extend_unregister(struct nf_ct_ext_type *type); +#endif /* _NF_CONNTRACK_EXTEND_H */ -- cgit v1.2.2 From ceceae1b1555a9afcb8dacf90df5fa1f20fd5466 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:23:42 -0700 Subject: [NETFILTER]: nf_conntrack: use extension infrastructure for helper Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack.h | 26 -------------------------- include/net/netfilter/nf_conntrack_core.h | 3 +++ include/net/netfilter/nf_conntrack_extend.h | 3 +++ include/net/netfilter/nf_conntrack_helper.h | 5 +++++ 4 files changed, 11 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index c31382d3ef..f1e0fee9aa 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -294,32 +294,6 @@ static inline struct nf_conn_nat *nfct_nat(const struct nf_conn *ct) offset = ALIGN(offset, __alignof__(struct nf_conn_nat)); return (struct nf_conn_nat *) ((void *)ct + offset); } - -static inline struct nf_conn_help *nfct_help(const struct nf_conn *ct) -{ - unsigned int offset = sizeof(struct nf_conn); - - if (!(ct->features & NF_CT_F_HELP)) - return NULL; - if (ct->features & NF_CT_F_NAT) { - offset = ALIGN(offset, __alignof__(struct nf_conn_nat)); - offset += sizeof(struct nf_conn_nat); - } - - offset = ALIGN(offset, __alignof__(struct nf_conn_help)); - return (struct nf_conn_help *) ((void *)ct + offset); -} -#else /* No NAT */ -static inline struct nf_conn_help *nfct_help(const struct nf_conn *ct) -{ - unsigned int offset = sizeof(struct nf_conn); - - if (!(ct->features & NF_CT_F_HELP)) - return NULL; - - offset = ALIGN(offset, __alignof__(struct nf_conn_help)); - return (struct nf_conn_help *) ((void *)ct + offset); -} #endif /* CONFIG_NF_NAT_NEEDED */ #endif /* __KERNEL__ */ #endif /* _NF_CONNTRACK_H */ diff --git a/include/net/netfilter/nf_conntrack_core.h b/include/net/netfilter/nf_conntrack_core.h index 9fb906688f..3bf7d05ea6 100644 --- a/include/net/netfilter/nf_conntrack_core.h +++ b/include/net/netfilter/nf_conntrack_core.h @@ -30,6 +30,9 @@ extern void nf_conntrack_cleanup(void); extern int nf_conntrack_proto_init(void); extern void nf_conntrack_proto_fini(void); +extern int nf_conntrack_helper_init(void); +extern void nf_conntrack_helper_fini(void); + struct nf_conntrack_l3proto; extern struct nf_conntrack_l3proto *nf_ct_find_l3proto(u_int16_t pf); /* Like above, but you already have conntrack read lock. */ diff --git a/include/net/netfilter/nf_conntrack_extend.h b/include/net/netfilter/nf_conntrack_extend.h index 8a988d1364..05357dc5d2 100644 --- a/include/net/netfilter/nf_conntrack_extend.h +++ b/include/net/netfilter/nf_conntrack_extend.h @@ -5,9 +5,12 @@ enum nf_ct_ext_id { + NF_CT_EXT_HELPER, NF_CT_EXT_NUM, }; +#define NF_CT_EXT_HELPER_TYPE struct nf_conn_help + /* Extensions: optional stuff which isn't permanently in struct. */ struct nf_ct_ext { u8 offset[NF_CT_EXT_NUM]; diff --git a/include/net/netfilter/nf_conntrack_helper.h b/include/net/netfilter/nf_conntrack_helper.h index 8c72ac9f0a..b43a75ba44 100644 --- a/include/net/netfilter/nf_conntrack_helper.h +++ b/include/net/netfilter/nf_conntrack_helper.h @@ -10,6 +10,7 @@ #ifndef _NF_CONNTRACK_HELPER_H #define _NF_CONNTRACK_HELPER_H #include +#include struct module; @@ -52,4 +53,8 @@ extern void nf_ct_helper_put(struct nf_conntrack_helper *helper); extern int nf_conntrack_helper_register(struct nf_conntrack_helper *); extern void nf_conntrack_helper_unregister(struct nf_conntrack_helper *); +static inline struct nf_conn_help *nfct_help(const struct nf_conn *ct) +{ + return nf_ct_ext_find(ct, NF_CT_EXT_HELPER); +} #endif /*_NF_CONNTRACK_HELPER_H*/ -- cgit v1.2.2 From e54cbc1f91dea4f98b6209e693d3b5eae46321bd Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:24:04 -0700 Subject: [NETFILTER]: nf_nat: add reference to conntrack from entry of bysource list I will split 'struct nf_nat_info' out from conntrack. So I cannot use 'offsetof' to get the pointer to conntrack from it. Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_nat.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_nat.h b/include/net/netfilter/nf_nat.h index 47d3dc107a..575dc8ac48 100644 --- a/include/net/netfilter/nf_nat.h +++ b/include/net/netfilter/nf_nat.h @@ -53,11 +53,14 @@ struct nf_nat_multi_range_compat #include #include +struct nf_conn; + /* The structure embedded in the conntrack structure. */ struct nf_nat_info { struct list_head bysource; struct nf_nat_seq seq[IP_CT_DIR_MAX]; + struct nf_conn *ct; }; /* per conntrack: nat application helper private data */ @@ -77,8 +80,6 @@ struct nf_conn_nat #endif }; -struct nf_conn; - /* Set up the info structure to map into this range. */ extern unsigned int nf_nat_setup_info(struct nf_conn *ct, const struct nf_nat_range *range, -- cgit v1.2.2 From 2d59e5ca8c7113ad91452f0f9259a4b55ee90323 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:24:28 -0700 Subject: [NETFILTER]: nf_nat: use extension infrastructure Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack.h | 17 ----------------- include/net/netfilter/nf_conntrack_extend.h | 2 ++ include/net/netfilter/nf_nat.h | 6 ++++++ 3 files changed, 8 insertions(+), 17 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index f1e0fee9aa..b2083d386f 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -278,22 +278,5 @@ nf_conntrack_register_cache(u_int32_t features, const char *name, size_t size); extern void nf_conntrack_unregister_cache(u_int32_t features); -/* valid combinations: - * basic: nf_conn, nf_conn .. nf_conn_help - * nat: nf_conn .. nf_conn_nat, nf_conn .. nf_conn_nat .. nf_conn help - */ -#ifdef CONFIG_NF_NAT_NEEDED -#include -static inline struct nf_conn_nat *nfct_nat(const struct nf_conn *ct) -{ - unsigned int offset = sizeof(struct nf_conn); - - if (!(ct->features & NF_CT_F_NAT)) - return NULL; - - offset = ALIGN(offset, __alignof__(struct nf_conn_nat)); - return (struct nf_conn_nat *) ((void *)ct + offset); -} -#endif /* CONFIG_NF_NAT_NEEDED */ #endif /* __KERNEL__ */ #endif /* _NF_CONNTRACK_H */ diff --git a/include/net/netfilter/nf_conntrack_extend.h b/include/net/netfilter/nf_conntrack_extend.h index 05357dc5d2..73b5711faf 100644 --- a/include/net/netfilter/nf_conntrack_extend.h +++ b/include/net/netfilter/nf_conntrack_extend.h @@ -6,10 +6,12 @@ enum nf_ct_ext_id { NF_CT_EXT_HELPER, + NF_CT_EXT_NAT, NF_CT_EXT_NUM, }; #define NF_CT_EXT_HELPER_TYPE struct nf_conn_help +#define NF_CT_EXT_NAT_TYPE struct nf_conn_nat /* Extensions: optional stuff which isn't permanently in struct. */ struct nf_ct_ext { diff --git a/include/net/netfilter/nf_nat.h b/include/net/netfilter/nf_nat.h index 575dc8ac48..0425e28c6a 100644 --- a/include/net/netfilter/nf_nat.h +++ b/include/net/netfilter/nf_nat.h @@ -52,6 +52,7 @@ struct nf_nat_multi_range_compat #ifdef __KERNEL__ #include #include +#include struct nf_conn; @@ -89,6 +90,11 @@ extern unsigned int nf_nat_setup_info(struct nf_conn *ct, extern int nf_nat_used_tuple(const struct nf_conntrack_tuple *tuple, const struct nf_conn *ignored_conntrack); +static inline struct nf_conn_nat *nfct_nat(const struct nf_conn *ct) +{ + return nf_ct_ext_find(ct, NF_CT_EXT_NAT); +} + extern int nf_nat_module_is_loaded; #else /* !__KERNEL__: iptables wants this to compile. */ -- cgit v1.2.2 From ff09b7493c8f433d3ffd6a31ad58d190f82ef0c5 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:25:28 -0700 Subject: [NETFILTER]: nf_nat: remove unused nf_nat_module_is_loaded Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_nat.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_nat.h b/include/net/netfilter/nf_nat.h index 0425e28c6a..0541eed500 100644 --- a/include/net/netfilter/nf_nat.h +++ b/include/net/netfilter/nf_nat.h @@ -95,8 +95,6 @@ static inline struct nf_conn_nat *nfct_nat(const struct nf_conn *ct) return nf_ct_ext_find(ct, NF_CT_EXT_NAT); } -extern int nf_nat_module_is_loaded; - #else /* !__KERNEL__: iptables wants this to compile. */ #define nf_nat_multi_range nf_nat_multi_range_compat #endif /*__KERNEL__*/ -- cgit v1.2.2 From dacd2a1a5cf621288833aa3c6e815b86a1536538 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:25:51 -0700 Subject: [NETFILTER]: nf_conntrack: remove old memory allocator of conntrack Now memory space for help and NAT are allocated by extension infrastructure. Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack.h | 14 -------------- include/net/netfilter/nf_conntrack_l3proto.h | 2 -- 2 files changed, 16 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index b2083d386f..71386e5c4b 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -117,9 +117,6 @@ struct nf_conn /* Unique ID that identifies this conntrack*/ unsigned int id; - /* features - nat, helper, ... used by allocating system */ - u_int32_t features; - #if defined(CONFIG_NF_CONNTRACK_MARK) u_int32_t mark; #endif @@ -133,9 +130,6 @@ struct nf_conn /* Extensions */ struct nf_ct_ext *ext; - - /* features dynamically at the end: helper, nat (both optional) */ - char data[0]; }; static inline struct nf_conn * @@ -265,14 +259,6 @@ do { \ local_bh_enable(); \ } while (0) -/* no helper, no nat */ -#define NF_CT_F_BASIC 0 -/* for helper */ -#define NF_CT_F_HELP 1 -/* for nat. */ -#define NF_CT_F_NAT 2 -#define NF_CT_F_NUM 4 - extern int nf_conntrack_register_cache(u_int32_t features, const char *name, size_t size); extern void diff --git a/include/net/netfilter/nf_conntrack_l3proto.h b/include/net/netfilter/nf_conntrack_l3proto.h index 96a58d8e1d..890752d7f6 100644 --- a/include/net/netfilter/nf_conntrack_l3proto.h +++ b/include/net/netfilter/nf_conntrack_l3proto.h @@ -64,8 +64,6 @@ struct nf_conntrack_l3proto int (*prepare)(struct sk_buff **pskb, unsigned int hooknum, unsigned int *dataoff, u_int8_t *protonum); - u_int32_t (*get_features)(const struct nf_conntrack_tuple *tuple); - int (*tuple_to_nfattr)(struct sk_buff *skb, const struct nf_conntrack_tuple *t); -- cgit v1.2.2 From d8a0509a696de60296a66ba4fe4f9eaade497103 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:26:16 -0700 Subject: [NETFILTER]: nf_nat: kill global 'destroy' operation This kills the global 'destroy' operation which was used by NAT. Instead it uses the extension infrastructure so that multiple extensions can register own operations. Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index 71386e5c4b..ef4a403878 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -213,9 +213,6 @@ extern void nf_conntrack_tcp_update(struct sk_buff *skb, struct nf_conn *conntrack, int dir); -/* Call me when a conntrack is destroyed. */ -extern void (*nf_conntrack_destroyed)(struct nf_conn *conntrack); - /* Fake conntrack entry for untracked connections */ extern struct nf_conn nf_conntrack_untracked; -- cgit v1.2.2 From b6b84d4a94e95727a4c65841eea23ac60c6aa329 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:26:35 -0700 Subject: [NETFILTER]: nf_nat: merge nf_conn and nf_nat_info Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_nat.h | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_nat.h b/include/net/netfilter/nf_nat.h index 0541eed500..d0e5e436dc 100644 --- a/include/net/netfilter/nf_nat.h +++ b/include/net/netfilter/nf_nat.h @@ -54,16 +54,6 @@ struct nf_nat_multi_range_compat #include #include -struct nf_conn; - -/* The structure embedded in the conntrack structure. */ -struct nf_nat_info -{ - struct list_head bysource; - struct nf_nat_seq seq[IP_CT_DIR_MAX]; - struct nf_conn *ct; -}; - /* per conntrack: nat application helper private data */ union nf_conntrack_nat_help { @@ -71,9 +61,14 @@ union nf_conntrack_nat_help struct nf_nat_pptp nat_pptp_info; }; +struct nf_conn; + +/* The structure embedded in the conntrack structure. */ struct nf_conn_nat { - struct nf_nat_info info; + struct list_head bysource; + struct nf_nat_seq seq[IP_CT_DIR_MAX]; + struct nf_conn *ct; union nf_conntrack_nat_help help; #if defined(CONFIG_IP_NF_TARGET_MASQUERADE) || \ defined(CONFIG_IP_NF_TARGET_MASQUERADE_MODULE) -- cgit v1.2.2 From f205c5e0c28aa7e0fb6eaaa66e97928f9d9e6994 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:28:14 -0700 Subject: [NETFILTER]: nf_conntrack: use hlists for conntrack hash Convert conntrack hash to hlists to reduce its size and cache footprint. Since the default hashsize to max. entries ratio sucks (1:16), this patch doesn't reduce the amount of memory used for the hash by default, but instead uses a better ratio of 1:8, which results in the same max. entries value. One thing worth noting is early_drop. It really should use LRU, so it now has to iterate over the entire chain to find the last unconfirmed entry. Since chains shouldn't be very long and the entire operation is very rare this shouldn't be a problem. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack_core.h | 4 ++-- include/net/netfilter/nf_conntrack_tuple.h | 3 +-- 2 files changed, 3 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack_core.h b/include/net/netfilter/nf_conntrack_core.h index 3bf7d05ea6..6351948654 100644 --- a/include/net/netfilter/nf_conntrack_core.h +++ b/include/net/netfilter/nf_conntrack_core.h @@ -84,9 +84,9 @@ print_tuple(struct seq_file *s, const struct nf_conntrack_tuple *tuple, struct nf_conntrack_l3proto *l3proto, struct nf_conntrack_l4proto *proto); -extern struct list_head *nf_conntrack_hash; +extern struct hlist_head *nf_conntrack_hash; extern struct list_head nf_conntrack_expect_list; extern rwlock_t nf_conntrack_lock ; -extern struct list_head unconfirmed; +extern struct hlist_head unconfirmed; #endif /* _NF_CONNTRACK_CORE_H */ diff --git a/include/net/netfilter/nf_conntrack_tuple.h b/include/net/netfilter/nf_conntrack_tuple.h index 5d72b16e87..d02ce876b4 100644 --- a/include/net/netfilter/nf_conntrack_tuple.h +++ b/include/net/netfilter/nf_conntrack_tuple.h @@ -125,8 +125,7 @@ DEBUGP("tuple %p: %u %u " NIP6_FMT " %hu -> " NIP6_FMT " %hu\n", \ /* Connections have two entries in the hash table: one for each way */ struct nf_conntrack_tuple_hash { - struct list_head list; - + struct hlist_node hnode; struct nf_conntrack_tuple tuple; }; -- cgit v1.2.2 From 330f7db5e578e1e298ba3a41748e5ea333a64a2b Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:28:42 -0700 Subject: [NETFILTER]: nf_conntrack: remove 'ignore_conntrack' argument from nf_conntrack_find_get All callers pass NULL, this also doesn't seem very useful for modules. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack_core.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack_core.h b/include/net/netfilter/nf_conntrack_core.h index 6351948654..2fa3a1bbc7 100644 --- a/include/net/netfilter/nf_conntrack_core.h +++ b/include/net/netfilter/nf_conntrack_core.h @@ -58,8 +58,7 @@ nf_ct_invert_tuple(struct nf_conntrack_tuple *inverse, /* Find a connection corresponding to a tuple. */ extern struct nf_conntrack_tuple_hash * -nf_conntrack_find_get(const struct nf_conntrack_tuple *tuple, - const struct nf_conn *ignored_conntrack); +nf_conntrack_find_get(const struct nf_conntrack_tuple *tuple); extern int __nf_conntrack_confirm(struct sk_buff **pskb); -- cgit v1.2.2 From ac565e5fc104fe1842a87f2206fcfb7b6dda903d Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:30:08 -0700 Subject: [NETFILTER]: nf_conntrack: export hash allocation/destruction functions Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index ef4a403878..8f2cbb965f 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -172,6 +172,10 @@ static inline void nf_ct_put(struct nf_conn *ct) extern int nf_ct_l3proto_try_module_get(unsigned short l3proto); extern void nf_ct_l3proto_module_put(unsigned short l3proto); +extern struct hlist_head *nf_ct_alloc_hashtable(int *sizep, int *vmalloced); +extern void nf_ct_free_hashtable(struct hlist_head *hash, int vmalloced, + int size); + extern struct nf_conntrack_tuple_hash * __nf_conntrack_find(const struct nf_conntrack_tuple *tuple, const struct nf_conn *ignored_conntrack); -- cgit v1.2.2 From 53aba5979e1d964c0234816eda2316f1c2e7946d Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:30:27 -0700 Subject: [NETFILTER]: nf_nat: use hlists for bysource hash Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_nat.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/net/netfilter/nf_nat.h b/include/net/netfilter/nf_nat.h index d0e5e436dc..6ae52f7c9f 100644 --- a/include/net/netfilter/nf_nat.h +++ b/include/net/netfilter/nf_nat.h @@ -66,7 +66,7 @@ struct nf_conn; /* The structure embedded in the conntrack structure. */ struct nf_conn_nat { - struct list_head bysource; + struct hlist_node bysource; struct nf_nat_seq seq[IP_CT_DIR_MAX]; struct nf_conn *ct; union nf_conntrack_nat_help help; -- cgit v1.2.2 From 6823645d608541c2c69e8a99454936e058c294e0 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:30:49 -0700 Subject: [NETFILTER]: nf_conntrack_expect: function naming unification Currently there is a wild mix of nf_conntrack_expect_, nf_ct_exp_, expect_, exp_, ... Consistently use nf_ct_ as prefix for exported functions. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack_core.h | 2 +- include/net/netfilter/nf_conntrack_ecache.h | 17 ++++++++--------- include/net/netfilter/nf_conntrack_expect.h | 28 ++++++++++++++-------------- 3 files changed, 23 insertions(+), 24 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack_core.h b/include/net/netfilter/nf_conntrack_core.h index 2fa3a1bbc7..a18f79c80d 100644 --- a/include/net/netfilter/nf_conntrack_core.h +++ b/include/net/netfilter/nf_conntrack_core.h @@ -84,7 +84,7 @@ print_tuple(struct seq_file *s, const struct nf_conntrack_tuple *tuple, struct nf_conntrack_l4proto *proto); extern struct hlist_head *nf_conntrack_hash; -extern struct list_head nf_conntrack_expect_list; +extern struct list_head nf_ct_expect_list; extern rwlock_t nf_conntrack_lock ; extern struct hlist_head unconfirmed; diff --git a/include/net/netfilter/nf_conntrack_ecache.h b/include/net/netfilter/nf_conntrack_ecache.h index 811c9073c5..f0b9078235 100644 --- a/include/net/netfilter/nf_conntrack_ecache.h +++ b/include/net/netfilter/nf_conntrack_ecache.h @@ -49,15 +49,15 @@ static inline void nf_conntrack_event(enum ip_conntrack_events event, atomic_notifier_call_chain(&nf_conntrack_chain, event, ct); } -extern struct atomic_notifier_head nf_conntrack_expect_chain; -extern int nf_conntrack_expect_register_notifier(struct notifier_block *nb); -extern int nf_conntrack_expect_unregister_notifier(struct notifier_block *nb); +extern struct atomic_notifier_head nf_ct_expect_chain; +extern int nf_ct_expect_register_notifier(struct notifier_block *nb); +extern int nf_ct_expect_unregister_notifier(struct notifier_block *nb); static inline void -nf_conntrack_expect_event(enum ip_conntrack_expect_events event, - struct nf_conntrack_expect *exp) +nf_ct_expect_event(enum ip_conntrack_expect_events event, + struct nf_conntrack_expect *exp) { - atomic_notifier_call_chain(&nf_conntrack_expect_chain, event, exp); + atomic_notifier_call_chain(&nf_ct_expect_chain, event, exp); } #else /* CONFIG_NF_CONNTRACK_EVENTS */ @@ -67,9 +67,8 @@ static inline void nf_conntrack_event_cache(enum ip_conntrack_events event, static inline void nf_conntrack_event(enum ip_conntrack_events event, struct nf_conn *ct) {} static inline void nf_ct_deliver_cached_events(const struct nf_conn *ct) {} -static inline void -nf_conntrack_expect_event(enum ip_conntrack_expect_events event, - struct nf_conntrack_expect *exp) {} +static inline void nf_ct_expect_event(enum ip_conntrack_expect_events event, + struct nf_conntrack_expect *exp) {} static inline void nf_ct_event_cache_flush(void) {} #endif /* CONFIG_NF_CONNTRACK_EVENTS */ diff --git a/include/net/netfilter/nf_conntrack_expect.h b/include/net/netfilter/nf_conntrack_expect.h index 173c7c1eff..c0b1d1fb23 100644 --- a/include/net/netfilter/nf_conntrack_expect.h +++ b/include/net/netfilter/nf_conntrack_expect.h @@ -6,8 +6,8 @@ #define _NF_CONNTRACK_EXPECT_H #include -extern struct list_head nf_conntrack_expect_list; -extern struct kmem_cache *nf_conntrack_expect_cachep; +extern struct list_head nf_ct_expect_list; +extern struct kmem_cache *nf_ct_expect_cachep; extern const struct file_operations exp_file_ops; struct nf_conntrack_expect @@ -54,27 +54,27 @@ struct nf_conntrack_expect struct nf_conntrack_expect * -__nf_conntrack_expect_find(const struct nf_conntrack_tuple *tuple); +__nf_ct_expect_find(const struct nf_conntrack_tuple *tuple); struct nf_conntrack_expect * -nf_conntrack_expect_find_get(const struct nf_conntrack_tuple *tuple); +nf_ct_expect_find_get(const struct nf_conntrack_tuple *tuple); struct nf_conntrack_expect * -find_expectation(const struct nf_conntrack_tuple *tuple); +nf_ct_find_expectation(const struct nf_conntrack_tuple *tuple); void nf_ct_unlink_expect(struct nf_conntrack_expect *exp); void nf_ct_remove_expectations(struct nf_conn *ct); -void nf_conntrack_unexpect_related(struct nf_conntrack_expect *exp); +void nf_ct_unexpect_related(struct nf_conntrack_expect *exp); /* Allocate space for an expectation: this is mandatory before calling - nf_conntrack_expect_related. You will have to call put afterwards. */ -struct nf_conntrack_expect *nf_conntrack_expect_alloc(struct nf_conn *me); -void nf_conntrack_expect_init(struct nf_conntrack_expect *, int, - union nf_conntrack_address *, - union nf_conntrack_address *, - u_int8_t, __be16 *, __be16 *); -void nf_conntrack_expect_put(struct nf_conntrack_expect *exp); -int nf_conntrack_expect_related(struct nf_conntrack_expect *expect); + nf_ct_expect_related. You will have to call put afterwards. */ +struct nf_conntrack_expect *nf_ct_expect_alloc(struct nf_conn *me); +void nf_ct_expect_init(struct nf_conntrack_expect *, int, + union nf_conntrack_address *, + union nf_conntrack_address *, + u_int8_t, __be16 *, __be16 *); +void nf_ct_expect_put(struct nf_conntrack_expect *exp); +int nf_ct_expect_related(struct nf_conntrack_expect *expect); #endif /*_NF_CONNTRACK_EXPECT_H*/ -- cgit v1.2.2 From d4156e8cd93f5772483928aaf4960120caebd789 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:31:32 -0700 Subject: [NETFILTER]: nf_conntrack: reduce masks to a subset of tuples Since conntrack currently allows to use masks for every bit of both helper and expectation tuples, we can't hash them and have to keep them on two global lists that are searched for every new connection. This patch removes the never used ability to use masks for the destination part of the expectation tuple and completely removes masks from helpers since the only reasonable choice is a full match on l3num, protonum and src.u.all. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack_expect.h | 3 +- include/net/netfilter/nf_conntrack_helper.h | 5 +-- include/net/netfilter/nf_conntrack_tuple.h | 65 +++++++++++++++++++---------- 3 files changed, 47 insertions(+), 26 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack_expect.h b/include/net/netfilter/nf_conntrack_expect.h index c0b1d1fb23..13643f7f74 100644 --- a/include/net/netfilter/nf_conntrack_expect.h +++ b/include/net/netfilter/nf_conntrack_expect.h @@ -16,7 +16,8 @@ struct nf_conntrack_expect struct list_head list; /* We expect this tuple, with the following mask */ - struct nf_conntrack_tuple tuple, mask; + struct nf_conntrack_tuple tuple; + struct nf_conntrack_tuple_mask mask; /* Function to call after setup and insertion */ void (*expectfn)(struct nf_conn *new, diff --git a/include/net/netfilter/nf_conntrack_helper.h b/include/net/netfilter/nf_conntrack_helper.h index b43a75ba44..d62e6f093a 100644 --- a/include/net/netfilter/nf_conntrack_helper.h +++ b/include/net/netfilter/nf_conntrack_helper.h @@ -24,10 +24,9 @@ struct nf_conntrack_helper * expected connections */ unsigned int timeout; /* timeout for expecteds */ - /* Mask of things we will help (compared against server response) */ + /* Tuple of things we will help (compared against server response) */ struct nf_conntrack_tuple tuple; - struct nf_conntrack_tuple mask; - + /* Function to call when data passes; return verdict, or -1 to invalidate. */ int (*help)(struct sk_buff **pskb, diff --git a/include/net/netfilter/nf_conntrack_tuple.h b/include/net/netfilter/nf_conntrack_tuple.h index d02ce876b4..99934ab538 100644 --- a/include/net/netfilter/nf_conntrack_tuple.h +++ b/include/net/netfilter/nf_conntrack_tuple.h @@ -100,6 +100,14 @@ struct nf_conntrack_tuple } dst; }; +struct nf_conntrack_tuple_mask +{ + struct { + union nf_conntrack_address u3; + union nf_conntrack_man_proto u; + } src; +}; + /* This is optimized opposed to a memset of the whole structure. Everything we * really care about is the source/destination unions */ #define NF_CT_TUPLE_U_BLANK(tuple) \ @@ -161,31 +169,44 @@ static inline int nf_ct_tuple_equal(const struct nf_conntrack_tuple *t1, return nf_ct_tuple_src_equal(t1, t2) && nf_ct_tuple_dst_equal(t1, t2); } +static inline int nf_ct_tuple_mask_equal(const struct nf_conntrack_tuple_mask *m1, + const struct nf_conntrack_tuple_mask *m2) +{ + return (m1->src.u3.all[0] == m2->src.u3.all[0] && + m1->src.u3.all[1] == m2->src.u3.all[1] && + m1->src.u3.all[2] == m2->src.u3.all[2] && + m1->src.u3.all[3] == m2->src.u3.all[3] && + m1->src.u.all == m2->src.u.all); +} + +static inline int nf_ct_tuple_src_mask_cmp(const struct nf_conntrack_tuple *t1, + const struct nf_conntrack_tuple *t2, + const struct nf_conntrack_tuple_mask *mask) +{ + int count; + + for (count = 0; count < NF_CT_TUPLE_L3SIZE; count++) { + if ((t1->src.u3.all[count] ^ t2->src.u3.all[count]) & + mask->src.u3.all[count]) + return 0; + } + + if ((t1->src.u.all ^ t2->src.u.all) & mask->src.u.all) + return 0; + + if (t1->src.l3num != t2->src.l3num || + t1->dst.protonum != t2->dst.protonum) + return 0; + + return 1; +} + static inline int nf_ct_tuple_mask_cmp(const struct nf_conntrack_tuple *t, const struct nf_conntrack_tuple *tuple, - const struct nf_conntrack_tuple *mask) + const struct nf_conntrack_tuple_mask *mask) { - int count = 0; - - for (count = 0; count < NF_CT_TUPLE_L3SIZE; count++){ - if ((t->src.u3.all[count] ^ tuple->src.u3.all[count]) & - mask->src.u3.all[count]) - return 0; - } - - for (count = 0; count < NF_CT_TUPLE_L3SIZE; count++){ - if ((t->dst.u3.all[count] ^ tuple->dst.u3.all[count]) & - mask->dst.u3.all[count]) - return 0; - } - - if ((t->src.u.all ^ tuple->src.u.all) & mask->src.u.all || - (t->dst.u.all ^ tuple->dst.u.all) & mask->dst.u.all || - (t->src.l3num ^ tuple->src.l3num) & mask->src.l3num || - (t->dst.protonum ^ tuple->dst.protonum) & mask->dst.protonum) - return 0; - - return 1; + return nf_ct_tuple_src_mask_cmp(t, tuple, mask) && + nf_ct_tuple_dst_equal(t, tuple); } #endif /* _NF_CONNTRACK_TUPLE_H */ -- cgit v1.2.2 From e9c1b084e17ca225b6be731b819308ee0f9e04b8 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:32:53 -0700 Subject: [NETFILTER]: nf_conntrack: move expectaton related init code to nf_conntrack_expect.c Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack_expect.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack_expect.h b/include/net/netfilter/nf_conntrack_expect.h index 13643f7f74..cf6a619664 100644 --- a/include/net/netfilter/nf_conntrack_expect.h +++ b/include/net/netfilter/nf_conntrack_expect.h @@ -7,8 +7,6 @@ #include extern struct list_head nf_ct_expect_list; -extern struct kmem_cache *nf_ct_expect_cachep; -extern const struct file_operations exp_file_ops; struct nf_conntrack_expect { @@ -53,6 +51,8 @@ struct nf_conntrack_expect #define NF_CT_EXPECT_PERMANENT 0x1 +int nf_conntrack_expect_init(void); +void nf_conntrack_expect_fini(void); struct nf_conntrack_expect * __nf_ct_expect_find(const struct nf_conntrack_tuple *tuple); -- cgit v1.2.2 From a71c085562bcc99e8b711cab4222bff1f6e955da Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:33:47 -0700 Subject: [NETFILTER]: nf_conntrack: use hashtable for expectations Currently all expectations are kept on a global list that - needs to be searched for every new conncetion - needs to be walked for evicting expectations when a master connection has reached its limit - needs to be walked on connection destruction for connections that have open expectations This is obviously not good, especially when considering helpers like H.323 that register *lots* of expectations and can set up permanent expectations, but it also allows for an easy DoS against firewalls using connection tracking helpers. Use a hashtable for expectations to avoid incurring the search overhead for every new connection. The default hash size is 1/256 of the conntrack hash table size, this can be overriden using a module parameter. This patch only introduces the hash table for expectation lookups and keeps other users to reduce the noise, the following patches will get rid of it completely. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack_core.h | 1 - include/net/netfilter/nf_conntrack_expect.h | 5 +++++ 2 files changed, 5 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack_core.h b/include/net/netfilter/nf_conntrack_core.h index a18f79c80d..4056f5f08d 100644 --- a/include/net/netfilter/nf_conntrack_core.h +++ b/include/net/netfilter/nf_conntrack_core.h @@ -84,7 +84,6 @@ print_tuple(struct seq_file *s, const struct nf_conntrack_tuple *tuple, struct nf_conntrack_l4proto *proto); extern struct hlist_head *nf_conntrack_hash; -extern struct list_head nf_ct_expect_list; extern rwlock_t nf_conntrack_lock ; extern struct hlist_head unconfirmed; diff --git a/include/net/netfilter/nf_conntrack_expect.h b/include/net/netfilter/nf_conntrack_expect.h index cf6a619664..424d4bdb98 100644 --- a/include/net/netfilter/nf_conntrack_expect.h +++ b/include/net/netfilter/nf_conntrack_expect.h @@ -7,12 +7,17 @@ #include extern struct list_head nf_ct_expect_list; +extern struct hlist_head *nf_ct_expect_hash; +extern unsigned int nf_ct_expect_hsize; struct nf_conntrack_expect { /* Internal linked list (global expectation list) */ struct list_head list; + /* Hash member */ + struct hlist_node hnode; + /* We expect this tuple, with the following mask */ struct nf_conntrack_tuple tuple; struct nf_conntrack_tuple_mask mask; -- cgit v1.2.2 From b560580a13b180bc1e3cad7ffbc93388cc39be5d Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:35:56 -0700 Subject: [NETFILTER]: nf_conntrack_expect: maintain per conntrack expectation list This patch brings back the per-conntrack expectation list that was removed around 2.6.10 to avoid walking all expectations on expectation eviction and conntrack destruction. As these were the last users of the global expectation list, this patch also kills that. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack.h | 2 ++ include/net/netfilter/nf_conntrack_expect.h | 5 ++--- include/net/netfilter/nf_conntrack_helper.h | 2 ++ 3 files changed, 6 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack.h b/include/net/netfilter/nf_conntrack.h index 8f2cbb965f..d4f02eb0c6 100644 --- a/include/net/netfilter/nf_conntrack.h +++ b/include/net/netfilter/nf_conntrack.h @@ -82,6 +82,8 @@ struct nf_conn_help { union nf_conntrack_help help; + struct hlist_head expectations; + /* Current number of expected connections */ unsigned int expecting; }; diff --git a/include/net/netfilter/nf_conntrack_expect.h b/include/net/netfilter/nf_conntrack_expect.h index 424d4bdb98..9d5af4e22c 100644 --- a/include/net/netfilter/nf_conntrack_expect.h +++ b/include/net/netfilter/nf_conntrack_expect.h @@ -6,14 +6,13 @@ #define _NF_CONNTRACK_EXPECT_H #include -extern struct list_head nf_ct_expect_list; extern struct hlist_head *nf_ct_expect_hash; extern unsigned int nf_ct_expect_hsize; struct nf_conntrack_expect { - /* Internal linked list (global expectation list) */ - struct list_head list; + /* Conntrack expectation list member */ + struct hlist_node lnode; /* Hash member */ struct hlist_node hnode; diff --git a/include/net/netfilter/nf_conntrack_helper.h b/include/net/netfilter/nf_conntrack_helper.h index d62e6f093a..2c0e2e0fb7 100644 --- a/include/net/netfilter/nf_conntrack_helper.h +++ b/include/net/netfilter/nf_conntrack_helper.h @@ -52,6 +52,8 @@ extern void nf_ct_helper_put(struct nf_conntrack_helper *helper); extern int nf_conntrack_helper_register(struct nf_conntrack_helper *); extern void nf_conntrack_helper_unregister(struct nf_conntrack_helper *); +extern struct nf_conn_help *nf_ct_helper_ext_add(struct nf_conn *ct, gfp_t gfp); + static inline struct nf_conn_help *nfct_help(const struct nf_conn *ct) { return nf_ct_ext_find(ct, NF_CT_EXT_HELPER); -- cgit v1.2.2 From f264a7df08d50bb4a23be6a9aa06940e497ac1c4 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:36:24 -0700 Subject: [NETFILTER]: nf_conntrack_expect: introduce nf_conntrack_expect_max sysct As a last step of preventing DoS by creating lots of expectations, this patch introduces a global maximum and a sysctl to control it. The default is initialized to 4 * the expectation hash table size, which results in 1/64 of the default maxmimum of conntracks. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack_expect.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack_expect.h b/include/net/netfilter/nf_conntrack_expect.h index 9d5af4e22c..cae1a0dce3 100644 --- a/include/net/netfilter/nf_conntrack_expect.h +++ b/include/net/netfilter/nf_conntrack_expect.h @@ -8,6 +8,7 @@ extern struct hlist_head *nf_ct_expect_hash; extern unsigned int nf_ct_expect_hsize; +extern unsigned int nf_ct_expect_max; struct nf_conntrack_expect { -- cgit v1.2.2 From b8a7fe6c10511fce10b20efa163123f4041f2550 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:36:46 -0700 Subject: [NETFILTER]: nf_conntrack_helper: use hashtable for conntrack helpers Eliminate the last global list searched for every new connection. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/net/netfilter/nf_conntrack_helper.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/netfilter/nf_conntrack_helper.h b/include/net/netfilter/nf_conntrack_helper.h index 2c0e2e0fb7..d04f99964d 100644 --- a/include/net/netfilter/nf_conntrack_helper.h +++ b/include/net/netfilter/nf_conntrack_helper.h @@ -15,8 +15,8 @@ struct module; struct nf_conntrack_helper -{ - struct list_head list; /* Internal use. */ +{ + struct hlist_node hnode; /* Internal use. */ const char *name; /* name of the module */ struct module *me; /* pointer to self */ -- cgit v1.2.2 From d3c3f4243e135b3d8c41d98be0cb2f54a4141abf Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:38:30 -0700 Subject: [NETFILTER]: ipt_CLUSTERIP: add compat code Adjust structure size and don't expect pointers passed in from userspace to be valid. Also replace an enum in an ABI structure by a fixed size type. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter_ipv4/ipt_CLUSTERIP.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/netfilter_ipv4/ipt_CLUSTERIP.h b/include/linux/netfilter_ipv4/ipt_CLUSTERIP.h index d9bceedfb3..daf50be22c 100644 --- a/include/linux/netfilter_ipv4/ipt_CLUSTERIP.h +++ b/include/linux/netfilter_ipv4/ipt_CLUSTERIP.h @@ -18,13 +18,13 @@ struct clusterip_config; struct ipt_clusterip_tgt_info { u_int32_t flags; - + /* only relevant for new ones */ u_int8_t clustermac[6]; u_int16_t num_total_nodes; u_int16_t num_local_nodes; u_int16_t local_nodes[CLUSTERIP_MAX_NODES]; - enum clusterip_hashmode hash_mode; + u_int32_t hash_mode; u_int32_t hash_initval; struct clusterip_config *config; -- cgit v1.2.2 From 0d53778e81ac7af266dac8a20cc328328c327112 Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Sat, 7 Jul 2007 22:39:38 -0700 Subject: [NETFILTER]: Convert DEBUGP to pr_debug Convert DEBUGP to pr_debug and fix lots of non-compiling debug statements. Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter/nf_conntrack_pptp.h | 2 ++ include/net/netfilter/nf_conntrack_tuple.h | 10 +++++----- 2 files changed, 7 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/netfilter/nf_conntrack_pptp.h b/include/linux/netfilter/nf_conntrack_pptp.h index 9d8144a488..c93061f331 100644 --- a/include/linux/netfilter/nf_conntrack_pptp.h +++ b/include/linux/netfilter/nf_conntrack_pptp.h @@ -4,6 +4,8 @@ #include +extern const char *pptp_msg_name[]; + /* state of the control session */ enum pptp_ctrlsess_state { PPTP_SESSION_NONE, /* no session present */ diff --git a/include/net/netfilter/nf_conntrack_tuple.h b/include/net/netfilter/nf_conntrack_tuple.h index 99934ab538..040dae5f0c 100644 --- a/include/net/netfilter/nf_conntrack_tuple.h +++ b/include/net/netfilter/nf_conntrack_tuple.h @@ -120,11 +120,11 @@ struct nf_conntrack_tuple_mask #ifdef __KERNEL__ -#define NF_CT_DUMP_TUPLE(tp) \ -DEBUGP("tuple %p: %u %u " NIP6_FMT " %hu -> " NIP6_FMT " %hu\n", \ - (tp), (tp)->src.l3num, (tp)->dst.protonum, \ - NIP6(*(struct in6_addr *)(tp)->src.u3.all), ntohs((tp)->src.u.all), \ - NIP6(*(struct in6_addr *)(tp)->dst.u3.all), ntohs((tp)->dst.u.all)) +#define NF_CT_DUMP_TUPLE(tp) \ +pr_debug("tuple %p: %u %u " NIP6_FMT " %hu -> " NIP6_FMT " %hu\n", \ + (tp), (tp)->src.l3num, (tp)->dst.protonum, \ + NIP6(*(struct in6_addr *)(tp)->src.u3.all), ntohs((tp)->src.u.all), \ + NIP6(*(struct in6_addr *)(tp)->dst.u3.all), ntohs((tp)->dst.u.all)) /* If we're the first tuple, it's the original dir. */ #define NF_CT_DIRECTION(h) \ -- cgit v1.2.2 From ce7663d84a87bb4e1743f62950bf7dceed723a13 Mon Sep 17 00:00:00 2001 From: Yasuyuki Kozakai Date: Sat, 7 Jul 2007 22:40:08 -0700 Subject: [NETFILTER]: nfnetlink_queue: don't unregister handler of other subsystem The queue handlers registered by ip[6]_queue.ko at initialization should not be unregistered according to requests from userland program using nfnetlink_queue. If we allow that, there is no way to register the handlers of built-in ip[6]_queue again. Signed-off-by: Yasuyuki Kozakai Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/netfilter.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/netfilter.h b/include/linux/netfilter.h index 10b5c62757..0eed0b7ab2 100644 --- a/include/linux/netfilter.h +++ b/include/linux/netfilter.h @@ -275,7 +275,8 @@ struct nf_queue_handler { }; extern int nf_register_queue_handler(int pf, struct nf_queue_handler *qh); -extern int nf_unregister_queue_handler(int pf); +extern int nf_unregister_queue_handler(int pf, + struct nf_queue_handler *qh); extern void nf_unregister_queue_handlers(struct nf_queue_handler *qh); extern void nf_reinject(struct sk_buff *skb, struct nf_info *info, -- cgit v1.2.2 From 4839c52b01ca91be1c62761e08fb3deb3881e857 Mon Sep 17 00:00:00 2001 From: Philippe De Muyter Date: Mon, 9 Jul 2007 15:32:57 -0700 Subject: [IPV4]: Make ip_tos2prio const. Signed-off-by: Philippe De Muyter Signed-off-by: David S. Miller --- include/net/route.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/net/route.h b/include/net/route.h index 188b8936bb..f7ce6259f8 100644 --- a/include/net/route.h +++ b/include/net/route.h @@ -135,7 +135,7 @@ static inline void ip_rt_put(struct rtable * rt) #define IPTOS_RT_MASK (IPTOS_TOS_MASK & ~3) -extern __u8 ip_tos2prio[16]; +extern const __u8 ip_tos2prio[16]; static inline char rt_tos2priority(u8 tos) { -- cgit v1.2.2 From 5b7f990927fe87ad3bec762a33c0e72bcbf6841e Mon Sep 17 00:00:00 2001 From: Marcel Holtmann Date: Wed, 11 Jul 2007 09:51:55 +0200 Subject: [Bluetooth] Add basics to better support and handle eSCO links To better support and handle eSCO links in the future a bunch of constants needs to be added and some basic routines need to be updated. This is the initial step. Signed-off-by: Marcel Holtmann --- include/net/bluetooth/hci.h | 18 ++++++++++++++++-- include/net/bluetooth/hci_core.h | 2 ++ 2 files changed, 18 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/net/bluetooth/hci.h b/include/net/bluetooth/hci.h index 93ce272a5d..ebfb96b411 100644 --- a/include/net/bluetooth/hci.h +++ b/include/net/bluetooth/hci.h @@ -107,14 +107,14 @@ enum { #define HCI_IDLE_TIMEOUT (6000) /* 6 seconds */ #define HCI_INIT_TIMEOUT (10000) /* 10 seconds */ -/* HCI Packet types */ +/* HCI data types */ #define HCI_COMMAND_PKT 0x01 #define HCI_ACLDATA_PKT 0x02 #define HCI_SCODATA_PKT 0x03 #define HCI_EVENT_PKT 0x04 #define HCI_VENDOR_PKT 0xff -/* HCI Packet types */ +/* HCI packet types */ #define HCI_DM1 0x0008 #define HCI_DM3 0x0400 #define HCI_DM5 0x4000 @@ -129,6 +129,14 @@ enum { #define SCO_PTYPE_MASK (HCI_HV1 | HCI_HV2 | HCI_HV3) #define ACL_PTYPE_MASK (~SCO_PTYPE_MASK) +/* eSCO packet types */ +#define ESCO_HV1 0x0001 +#define ESCO_HV2 0x0002 +#define ESCO_HV3 0x0004 +#define ESCO_EV3 0x0008 +#define ESCO_EV4 0x0010 +#define ESCO_EV5 0x0020 + /* ACL flags */ #define ACL_CONT 0x01 #define ACL_START 0x02 @@ -138,6 +146,7 @@ enum { /* Baseband links */ #define SCO_LINK 0x00 #define ACL_LINK 0x01 +#define ESCO_LINK 0x02 /* LMP features */ #define LMP_3SLOT 0x01 @@ -162,6 +171,11 @@ enum { #define LMP_PSCHEME 0x02 #define LMP_PCONTROL 0x04 +#define LMP_ESCO 0x80 + +#define LMP_EV4 0x01 +#define LMP_EV5 0x02 + #define LMP_SNIFF_SUBR 0x02 /* Connection modes */ diff --git a/include/net/bluetooth/hci_core.h b/include/net/bluetooth/hci_core.h index 7c78744ec0..8f67c8a716 100644 --- a/include/net/bluetooth/hci_core.h +++ b/include/net/bluetooth/hci_core.h @@ -78,6 +78,7 @@ struct hci_dev { __u16 voice_setting; __u16 pkt_type; + __u16 esco_type; __u16 link_policy; __u16 link_mode; @@ -452,6 +453,7 @@ void hci_conn_del_sysfs(struct hci_conn *conn); #define lmp_encrypt_capable(dev) ((dev)->features[0] & LMP_ENCRYPT) #define lmp_sniff_capable(dev) ((dev)->features[0] & LMP_SNIFF) #define lmp_sniffsubr_capable(dev) ((dev)->features[5] & LMP_SNIFF_SUBR) +#define lmp_esco_capable(dev) ((dev)->features[3] & LMP_ESCO) /* ----- HCI protocols ----- */ struct hci_proto { -- cgit v1.2.2 From c6c6e3e05c0b4349824efcdd36650e7be9d5c7c3 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Tue, 10 Jul 2007 22:41:55 -0700 Subject: [NET]: Update comments for skb checksums Rusty (whose comments we should all study and emulate :) pointed out that our comments for skb checksums are no longer up-to-date. So here is a patch to 1) add the case of partial checksums on input; 2) update partial checksum case to mention csum_start/csum_offset; 3) mention the new IPv6 feature bit. Signed-off-by: Herbert Xu Signed-off-by: David S. Miller --- include/linux/skbuff.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h index 625d73b07a..9391e4a4c3 100644 --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h @@ -65,13 +65,20 @@ * is able to produce some skb->csum, it MUST use COMPLETE, * not UNNECESSARY. * + * PARTIAL: identical to the case for output below. This may occur + * on a packet received directly from another Linux OS, e.g., + * a virtualised Linux kernel on the same host. The packet can + * be treated in the same way as UNNECESSARY except that on + * output (i.e., forwarding) the checksum must be filled in + * by the OS or the hardware. + * * B. Checksumming on output. * * NONE: skb is checksummed by protocol or csum is not required. * * PARTIAL: device is required to csum packet as seen by hard_start_xmit - * from skb->transport_header to the end and to record the checksum - * at skb->transport_header + skb->csum. + * from skb->csum_start to the end and to record the checksum + * at skb->csum_start + skb->csum_offset. * * Device must show its capabilities in dev->features, set * at device setup time. @@ -82,6 +89,7 @@ * TCP/UDP over IPv4. Sigh. Vendors like this * way by an unknown reason. Though, see comment above * about CHECKSUM_UNNECESSARY. 8) + * NETIF_F_IPV6_CSUM about as dumb as the last one but does IPv6 instead. * * Any questions? No questions, good. --ANK */ -- cgit v1.2.2 From bb4dbf9e61d0801927e7df2569bb3dd8287ea301 Mon Sep 17 00:00:00 2001 From: YOSHIFUJI Hideaki Date: Tue, 10 Jul 2007 22:55:49 -0700 Subject: [IPV6]: Do not send RH0 anymore. Based on . Signed-off-by: YOSHIFUJI Hideaki Signed-off-by: David S. Miller --- include/linux/ipv6.h | 4 ++-- include/net/ipv6.h | 4 ---- 2 files changed, 2 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h index 213b63be3c..cb3118cf27 100644 --- a/include/linux/ipv6.h +++ b/include/linux/ipv6.h @@ -27,8 +27,8 @@ struct in6_ifreq { int ifr6_ifindex; }; -#define IPV6_SRCRT_STRICT 0x01 /* this hop must be a neighbor */ -#define IPV6_SRCRT_TYPE_0 0 /* IPv6 type 0 Routing Header */ +#define IPV6_SRCRT_STRICT 0x01 /* Deprecated; will be removed */ +#define IPV6_SRCRT_TYPE_0 0 /* Deprecated; will be removed */ #define IPV6_SRCRT_TYPE_2 2 /* IPv6 type 2 Routing Header */ /* diff --git a/include/net/ipv6.h b/include/net/ipv6.h index 78a0d06d98..46b9dce82f 100644 --- a/include/net/ipv6.h +++ b/include/net/ipv6.h @@ -512,10 +512,6 @@ extern int ipv6_ext_hdr(u8 nexthdr); extern int ipv6_find_tlv(struct sk_buff *skb, int offset, int type); -extern struct ipv6_txoptions * ipv6_invert_rthdr(struct sock *sk, - struct ipv6_rt_hdr *hdr); - - /* * socket options (ipv6_sockglue.c) */ -- cgit v1.2.2 From 4c752098f529f41abfc985426a3eca0f2cb96676 Mon Sep 17 00:00:00 2001 From: YOSHIFUJI Hideaki Date: Wed, 23 May 2007 13:28:48 +0900 Subject: [IPV6]: Make IPV6_{RECV,2292}RTHDR boolean options. Because reversing RH0 is no longer supported by deprecation of RH0, let's make IPV6_{RECV,2292}RTHDR boolean options. Boolean are more appropriate from standard POV. Signed-off-by: YOSHIFUJI Hideaki Signed-off-by: David S. Miller --- include/linux/ipv6.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/ipv6.h b/include/linux/ipv6.h index cb3118cf27..97983dc9df 100644 --- a/include/linux/ipv6.h +++ b/include/linux/ipv6.h @@ -299,8 +299,8 @@ struct ipv6_pinfo { /* pktoption flags */ union { struct { - __u16 srcrt:2, - osrcrt:2, + __u16 srcrt:1, + osrcrt:1, rxinfo:1, rxoinfo:1, rxhlim:1, -- cgit v1.2.2 From ed8b548ce3cb988f59a0fd9af6ccdc4f8198cd19 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Date: Tue, 10 Jul 2007 23:02:12 -0700 Subject: [DECNET]: Another unnecessary net/tcp.h inclusion in net/dn.h MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No longer needed. Signed-off-by: Ilpo Järvinen Signed-off-by: David S. Miller --- include/net/dn.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/net/dn.h b/include/net/dn.h index ac4ce90917..627778384c 100644 --- a/include/net/dn.h +++ b/include/net/dn.h @@ -3,7 +3,6 @@ #include #include -#include #include #define dn_ntohs(x) le16_to_cpu(x) -- cgit v1.2.2 From e69ff734e15eb7f61621f8764ce0a2181823a737 Mon Sep 17 00:00:00 2001 From: Herbert Xu Date: Fri, 8 Jun 2007 16:26:08 +1000 Subject: [CRYPTO] cipher: Remove obsolete fields from cipher_tfm This removes all the unused block cipher fields from cipher_tfm. Signed-off-by: Herbert Xu --- include/linux/crypto.h | 20 -------------------- 1 file changed, 20 deletions(-) (limited to 'include') diff --git a/include/linux/crypto.h b/include/linux/crypto.h index 0de7e2ace8..357e8cfedc 100644 --- a/include/linux/crypto.h +++ b/include/linux/crypto.h @@ -295,28 +295,8 @@ struct blkcipher_tfm { }; struct cipher_tfm { - void *cit_iv; - unsigned int cit_ivsize; - u32 cit_mode; int (*cit_setkey)(struct crypto_tfm *tfm, const u8 *key, unsigned int keylen); - int (*cit_encrypt)(struct crypto_tfm *tfm, - struct scatterlist *dst, - struct scatterlist *src, - unsigned int nbytes); - int (*cit_encrypt_iv)(struct crypto_tfm *tfm, - struct scatterlist *dst, - struct scatterlist *src, - unsigned int nbytes, u8 *iv); - int (*cit_decrypt)(struct crypto_tfm *tfm, - struct scatterlist *dst, - struct scatterlist *src, - unsigned int nbytes); - int (*cit_decrypt_iv)(struct crypto_tfm *tfm, - struct scatterlist *dst, - struct scatterlist *src, - unsigned int nbytes, u8 *iv); - void (*cit_xor_block)(u8 *dst, const u8 *src); void (*cit_encrypt_one)(struct crypto_tfm *tfm, u8 *dst, const u8 *src); void (*cit_decrypt_one)(struct crypto_tfm *tfm, u8 *dst, const u8 *src); }; -- cgit v1.2.2 From 9e121327b37b751ef66e6f57e2d02dd568955148 Mon Sep 17 00:00:00 2001 From: Dean Nelson Date: Wed, 11 Jul 2007 10:22:16 -0500 Subject: [IA64] add sn_register_pmi_handler oemcall Add wrapper function to make SN_SAL_REGISTER_PMI_HANDLER ia64_sal_oemcall. Signed-off-by: Dean Nelson Signed-off-by: Tony Luck --- include/asm-ia64/sn/sn_sal.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'include') diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h index d3566a298f..676b31a08c 100644 --- a/include/asm-ia64/sn/sn_sal.h +++ b/include/asm-ia64/sn/sn_sal.h @@ -32,6 +32,7 @@ #define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010 #define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011 #define SN_SAL_PRINT_ERROR 0x02000012 +#define SN_SAL_REGISTER_PMI_HANDLER 0x02000014 #define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant #define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant #define SN_SAL_GET_SAPIC_INFO 0x0200001d @@ -679,6 +680,25 @@ sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr, return ret_stuff.status; } +/* + * Register or unregister a function to handle a PMI received by a CPU. + * Before calling the registered handler, SAL sets r1 to the value that + * was passed in as the global_pointer. + * + * If the handler pointer is NULL, then the currently registered handler + * will be unregistered. + * + * Returns 0 on success, or a negative value if an error occurred. + */ +static inline int +sn_register_pmi_handler(u64 handler, u64 global_pointer) +{ + struct ia64_sal_retval ret_stuff; + ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler, + global_pointer, 0, 0, 0, 0, 0); + return ret_stuff.status; +} + /* * Change or query the coherence domain for this partition. Each cpu-based * nasid is represented by a bit in an array of 64-bit words: -- cgit v1.2.2 From 1612b18ccb2318563ba51268289dc3271a6052f7 Mon Sep 17 00:00:00 2001 From: Russ Anderson Date: Fri, 18 May 2007 17:17:17 -0500 Subject: [IA64] Support multiple CPUs going through OS_MCA Linux does not gracefully deal with multiple processors going through OS_MCA aa part of the same MCA event. The first cpu into OS_MCA grabs the ia64_mca_serialize lock. Subsequent cpus wait for that lock, preventing them from reporting in as rendezvoused. The first cpu waits 5 seconds then complains that all the cpus have not rendezvoused. The first cpu then handles its MCA and frees up all the rendezvoused cpus and releases the ia64_mca_serialize lock. One of the subsequent cpus going thought OS_MCA then gets the ia64_mca_serialize lock, waits another 5 seconds and then complains that none of the other cpus have rendezvoused. This patch allows multiple CPUs to gracefully go through OS_MCA. The first CPU into ia64_mca_handler() grabs a mca_count lock. Subsequent CPUs into ia64_mca_handler() are added to a list of cpus that need to go through OS_MCA (a bit set in mca_cpu), and report in as rendezvoused, and but spin waiting their turn. The first CPU sees everyone rendezvous, handles his MCA, wakes up one of the other CPUs waiting to process their MCA (by clearing one mca_cpu bit), and then waits for the other cpus to complete their MCA handling. The next CPU handles his MCA and the process repeats until all the CPUs have handled their MCA. When the last CPU has handled it's MCA, it sets monarch_cpu to -1, releasing all the CPUs. In testing this works more reliably and faster. Thanks to Keith Owens for suggesting numerous improvements to this code. Signed-off-by: Russ Anderson Signed-off-by: Tony Luck --- include/asm-ia64/mca.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/asm-ia64/mca.h b/include/asm-ia64/mca.h index 41098f4596..edd5d01028 100644 --- a/include/asm-ia64/mca.h +++ b/include/asm-ia64/mca.h @@ -48,6 +48,7 @@ enum { IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0, IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1, IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2, + IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3, }; /* Information maintained by the MC infrastructure */ -- cgit v1.2.2 From 1fd05ba5a2f2aa8e7b9b52ef55df850e2e7d54c9 Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Wed, 11 Jul 2007 14:22:39 -0700 Subject: [AF_UNIX]: Rewrite garbage collector, fixes race. Throw out the old mark & sweep garbage collector and put in a refcounting cycle detecting one. The old one had a race with recvmsg, that resulted in false positives and hence data loss. The old algorithm operated on all unix sockets in the system, so any additional locking would have meant performance problems for all users of these. The new algorithm instead only operates on "in flight" sockets, which are very rare, and the additional locking for these doesn't negatively impact the vast majority of users. In fact it's probable, that there weren't *any* heavy senders of sockets over sockets, otherwise the above race would have been discovered long ago. The patch works OK with the app that exposed the race with the old code. The garbage collection has also been verified to work in a few simple cases. Signed-off-by: Miklos Szeredi Signed-off-by: David S. Miller --- include/net/af_unix.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/net/af_unix.h b/include/net/af_unix.h index 65f49fd7de..6de1e9e35c 100644 --- a/include/net/af_unix.h +++ b/include/net/af_unix.h @@ -79,9 +79,10 @@ struct unix_sock { struct mutex readlock; struct sock *peer; struct sock *other; - struct sock *gc_tree; + struct list_head link; atomic_t inflight; spinlock_t lock; + unsigned int gc_candidate : 1; wait_queue_head_t peer_wait; }; #define unix_sk(__sk) ((struct unix_sock *)__sk) -- cgit v1.2.2 From d556ad4bbe75faf17b239e151a9f003322b2e851 Mon Sep 17 00:00:00 2001 From: Peter Oruba Date: Tue, 15 May 2007 13:59:13 +0200 Subject: PCI: add PCI-X/PCI-Express read control interfaces This patch introduces an interface to read and write PCI-X / PCI-Express maximum read byte count values from PCI config space. There is a second function that returns the maximum _designed_ read byte count, which marks the maximum value for a device, since some drivers try to set MMRBC to the highest allowed value and rely on such a function. Based on patch set by Stephen Hemminger Cc: Stephen Hemminger Signed-off-by: Peter Oruba Signed-off-by: Greg Kroah-Hartman --- include/linux/pci.h | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 086a0e5a63..ac403d74a2 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -111,7 +111,8 @@ enum pcie_reset_state { typedef unsigned short __bitwise pci_bus_flags_t; enum pci_bus_flags { - PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, + PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, + PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, }; struct pci_cap_saved_state { @@ -549,6 +550,10 @@ void pci_intx(struct pci_dev *dev, int enable); void pci_msi_off(struct pci_dev *dev); int pci_set_dma_mask(struct pci_dev *dev, u64 mask); int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask); +int pcix_get_max_mmrbc(struct pci_dev *dev); +int pcix_get_mmrbc(struct pci_dev *dev); +int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); +int pcie_set_readrq(struct pci_dev *dev, int rq); void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); int __must_check pci_assign_resource(struct pci_dev *dev, int i); int __must_check pci_assign_resource_fixed(struct pci_dev *dev, int i); -- cgit v1.2.2 From 575e3348cb80c3265278756778d5091d5ca4efbf Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Tue, 8 May 2007 12:03:07 +1000 Subject: PCI: Use a weak symbol for the empty version of pcibios_add_platform_entries() I'm not sure if this is going to fly, weak symbols work on the compilers I'm using, but whether they work for all of the affected architectures I can't say. I've cc'ed as many arch maintainers/lists as I could find. But assuming they do, we can use a weak empty definition of pcibios_add_platform_entries() to avoid having an empty definition on every arch. Signed-off-by: Michael Ellerman Signed-off-by: Greg Kroah-Hartman --- include/asm-alpha/pci.h | 5 ----- include/asm-arm/pci.h | 4 ---- include/asm-cris/pci.h | 4 ---- include/asm-frv/pci.h | 4 ---- include/asm-h8300/pci.h | 4 ---- include/asm-i386/pci.h | 4 ---- include/asm-ia64/pci.h | 4 ---- include/asm-m68k/pci.h | 4 ---- include/asm-m68knommu/pci.h | 4 ---- include/asm-mips/pci.h | 4 ---- include/asm-parisc/pci.h | 4 ---- include/asm-powerpc/pci.h | 2 -- include/asm-ppc/pci.h | 2 -- include/asm-sh/pci.h | 4 ---- include/asm-sh64/pci.h | 4 ---- include/asm-sparc/pci.h | 4 ---- include/asm-sparc64/pci.h | 4 ---- include/asm-v850/pci.h | 4 ---- include/asm-x86_64/pci.h | 4 ---- include/asm-xtensa/pci.h | 4 ---- include/linux/pci.h | 2 ++ 21 files changed, 2 insertions(+), 77 deletions(-) (limited to 'include') diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h index 85aa1127c9..635d6f2b0b 100644 --- a/include/asm-alpha/pci.h +++ b/include/asm-alpha/pci.h @@ -275,11 +275,6 @@ static inline int pci_proc_domain(struct pci_bus *bus) return hose->need_domain_info; } -static inline void -pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - struct pci_dev *alpha_gendev_to_pci(struct device *dev); #endif /* __KERNEL__ */ diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h index f21abd4dda..9299a3c1ac 100644 --- a/include/asm-arm/pci.h +++ b/include/asm-arm/pci.h @@ -76,10 +76,6 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res) return root; } -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* __KERNEL__ */ #endif diff --git a/include/asm-cris/pci.h b/include/asm-cris/pci.h index b2ac8a331d..5f1986ef7d 100644 --- a/include/asm-cris/pci.h +++ b/include/asm-cris/pci.h @@ -89,10 +89,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* __KERNEL__ */ /* implement the pci_ DMA API in terms of the generic device dma_ one */ diff --git a/include/asm-frv/pci.h b/include/asm-frv/pci.h index f35a4511e7..3aee08c5a4 100644 --- a/include/asm-frv/pci.h +++ b/include/asm-frv/pci.h @@ -22,10 +22,6 @@ struct pci_dev; #define pcibios_assign_all_busses() 0 -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - extern void pcibios_set_master(struct pci_dev *dev); extern void pcibios_penalize_isa_irq(int irq); diff --git a/include/asm-h8300/pci.h b/include/asm-h8300/pci.h index 0c771b05fd..97389b35aa 100644 --- a/include/asm-h8300/pci.h +++ b/include/asm-h8300/pci.h @@ -22,8 +22,4 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) #define PCI_DMA_BUS_IS_PHYS (1) -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* _ASM_H8300_PCI_H */ diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h index 64b6d0baed..b974bd8ce9 100644 --- a/include/asm-i386/pci.h +++ b/include/asm-i386/pci.h @@ -94,10 +94,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h index 5a5d1c2ce3..26b69280f6 100644 --- a/include/asm-ia64/pci.h +++ b/include/asm-ia64/pci.h @@ -143,10 +143,6 @@ static inline int pci_proc_domain(struct pci_bus *bus) return (pci_domain_nr(bus) != 0); } -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - extern void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, struct resource *res); diff --git a/include/asm-m68k/pci.h b/include/asm-m68k/pci.h index 9d2c07abe4..678cb0b523 100644 --- a/include/asm-m68k/pci.h +++ b/include/asm-m68k/pci.h @@ -54,8 +54,4 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) */ #define PCI_DMA_BUS_IS_PHYS (1) -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* _ASM_M68K_PCI_H */ diff --git a/include/asm-m68knommu/pci.h b/include/asm-m68knommu/pci.h index e04c77e118..a99ce768f4 100644 --- a/include/asm-m68knommu/pci.h +++ b/include/asm-m68knommu/pci.h @@ -30,10 +30,6 @@ static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) */ #define pci_dac_dma_supported(pci_dev, mask) (0) -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* CONFIG_COMEMPCI */ #endif /* M68KNOMMU_PCI_H */ diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h index a59d54749e..6e8c5540bd 100644 --- a/include/asm-mips/pci.h +++ b/include/asm-mips/pci.h @@ -181,10 +181,6 @@ static inline int pci_proc_domain(struct pci_bus *bus) /* implement the pci_ DMA API in terms of the generic device dma_ one */ #include -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - /* Do platform specific device initialization at pci_enable_device() time */ extern int pcibios_plat_dev_init(struct pci_dev *dev); diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index 7b3be9ac0d..c331d49e45 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h @@ -284,10 +284,6 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res) return root; } -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - static inline void pcibios_penalize_isa_irq(int irq, int active) { /* We don't need to penalize isa irq's */ diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h index ce0f13e8eb..b36a284bed 100644 --- a/include/asm-powerpc/pci.h +++ b/include/asm-powerpc/pci.h @@ -243,8 +243,6 @@ extern void of_scan_bus(struct device_node *node, struct pci_bus *bus); extern int pci_read_irq_line(struct pci_dev *dev); -extern void pcibios_add_platform_entries(struct pci_dev *dev); - struct file; extern pgprot_t pci_phys_mem_access_prot(struct file *file, unsigned long pfn, diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h index 9d162028da..0a66a6f105 100644 --- a/include/asm-ppc/pci.h +++ b/include/asm-ppc/pci.h @@ -145,8 +145,6 @@ pcibios_select_root(struct pci_dev *pdev, struct resource *res) return root; } -extern void pcibios_add_platform_entries(struct pci_dev *dev); - struct file; extern pgprot_t pci_phys_mem_access_prot(struct file *file, unsigned long pfn, diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h index b1f9a9e023..6f741f3a5d 100644 --- a/include/asm-sh/pci.h +++ b/include/asm-sh/pci.h @@ -134,10 +134,6 @@ int pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin); int pciauto_assign_resources(int busno, struct pci_channel *hose); #endif -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* __KERNEL__ */ /* generic pci stuff */ diff --git a/include/asm-sh64/pci.h b/include/asm-sh64/pci.h index aa8043089b..0a2b2bd48b 100644 --- a/include/asm-sh64/pci.h +++ b/include/asm-sh64/pci.h @@ -104,10 +104,6 @@ extern void pcibios_fixup_irqs(void); extern int pciauto_assign_resources(int busno, struct pci_channel *hose); #endif -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* __KERNEL__ */ /* generic pci stuff */ diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h index a750c68840..a1ff7acc76 100644 --- a/include/asm-sparc/pci.h +++ b/include/asm-sparc/pci.h @@ -154,10 +154,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, } #endif -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) static inline int pci_dma_mapping_error(dma_addr_t dma_addr) diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h index 47cea16e1b..202915d827 100644 --- a/include/asm-sparc64/pci.h +++ b/include/asm-sparc64/pci.h @@ -303,10 +303,6 @@ pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, extern struct resource *pcibios_select_root(struct pci_dev *, struct resource *); -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) { return PCI_IRQ_NONE; diff --git a/include/asm-v850/pci.h b/include/asm-v850/pci.h index 4581826e1c..de2a7d0a81 100644 --- a/include/asm-v850/pci.h +++ b/include/asm-v850/pci.h @@ -116,8 +116,4 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max); extern void pci_iounmap (struct pci_dev *dev, void __iomem *addr); -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* __V850_PCI_H__ */ diff --git a/include/asm-x86_64/pci.h b/include/asm-x86_64/pci.h index 49c5e92805..d95c9e78fe 100644 --- a/include/asm-x86_64/pci.h +++ b/include/asm-x86_64/pci.h @@ -135,10 +135,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* __KERNEL__ */ /* generic pci stuff */ diff --git a/include/asm-xtensa/pci.h b/include/asm-xtensa/pci.h index 24eb7fc25d..644411c8e0 100644 --- a/include/asm-xtensa/pci.h +++ b/include/asm-xtensa/pci.h @@ -74,10 +74,6 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, /* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */ #define HAVE_PCI_MMAP 1 -static inline void pcibios_add_platform_entries(struct pci_dev *dev) -{ -} - #endif /* __KERNEL__ */ /* Implement the pci_ DMA API in terms of the generic device dma_ one */ diff --git a/include/linux/pci.h b/include/linux/pci.h index ac403d74a2..18319aba1a 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -881,5 +881,7 @@ extern int pci_pci_problems; extern unsigned long pci_cardbus_io_size; extern unsigned long pci_cardbus_mem_size; +extern void pcibios_add_platform_entries(struct pci_dev *dev); + #endif /* __KERNEL__ */ #endif /* LINUX_PCI_H */ -- cgit v1.2.2 From a2cd52ca904f5913651e71764755e712894ccc2f Mon Sep 17 00:00:00 2001 From: Michael Ellerman Date: Tue, 8 May 2007 12:03:08 +1000 Subject: PCI: Make pcibios_add_platform_entries() return errors Currently pcibios_add_platform_entries() returns void, but could fail, so instead have it return an int and propagate errors up to pci_create_sysfs_dev_files(). Fixes: arch/powerpc/kernel/pci_64.c: In function 'pcibios_add_platform_entries': arch/powerpc/kernel/pci_64.c:878: warning: ignoring return value of 'device_create_file', declared with attribute warn_unused_result arch/powerpc/kernel/pci_32.c: In function 'pcibios_add_platform_entries': arch/powerpc/kernel/pci_32.c:1043: warning: ignoring return value of 'device_create_file', declared with attribute warn_unused_result Signed-off-by: Michael Ellerman Signed-off-by: Greg Kroah-Hartman --- include/linux/pci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 18319aba1a..483db81477 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -881,7 +881,7 @@ extern int pci_pci_problems; extern unsigned long pci_cardbus_io_size; extern unsigned long pci_cardbus_mem_size; -extern void pcibios_add_platform_entries(struct pci_dev *dev); +extern int pcibios_add_platform_entries(struct pci_dev *dev); #endif /* __KERNEL__ */ #endif /* LINUX_PCI_H */ -- cgit v1.2.2 From adf809d01043d8808e47db2d35fc07b53062884e Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Mon, 21 May 2007 14:16:17 -0700 Subject: + pci_find_slot-mark-deprecated.patch added to -mm tree We've now fixed up most users of pci_find_slot, and the remainder are either hard and need someone with the hardware and info to work on it, or patches exist but are not yet merged. Time therefore for some gentle encouragement Signed-off-by: Alan Cox Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- include/linux/pci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 483db81477..4db7b5a18f 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -476,7 +476,7 @@ extern void pci_sort_breadthfirst(void); /* Generic PCI functions exported to card drivers */ struct pci_dev __deprecated *pci_find_device (unsigned int vendor, unsigned int device, const struct pci_dev *from); -struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn); +struct pci_dev __deprecated *pci_find_slot (unsigned int bus, unsigned int devfn); int pci_find_capability (struct pci_dev *dev, int cap); int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap); int pci_find_ext_capability (struct pci_dev *dev, int cap); -- cgit v1.2.2 From 65b3bc358a3195ebe459761a248cf33a61539947 Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Wed, 6 Jun 2007 11:46:49 +0800 Subject: PCI aer: fix stub return values The stubs used when advanced error reporting is not enabled must have same return type as real functions. Signed-off-by: Stephen Hemminger Acked-by: Zhang Yanmin Signed-off-by: Greg Kroah-Hartman --- include/linux/aer.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'include') diff --git a/include/linux/aer.h b/include/linux/aer.h index 402e178b38..64aacaed8d 100644 --- a/include/linux/aer.h +++ b/include/linux/aer.h @@ -14,10 +14,10 @@ extern int pci_find_aer_capability(struct pci_dev *dev); extern int pci_disable_pcie_error_reporting(struct pci_dev *dev); extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); #else -#define pci_enable_pcie_error_reporting(dev) do { } while (0) -#define pci_find_aer_capability(dev) do { } while (0) -#define pci_disable_pcie_error_reporting(dev) do { } while (0) -#define pci_cleanup_aer_uncorrect_error_status(dev) do { } while (0) +#define pci_enable_pcie_error_reporting(dev) (-EINVAL) +#define pci_find_aer_capability(dev) (0) +#define pci_disable_pcie_error_reporting(dev) (-EINVAL) +#define pci_cleanup_aer_uncorrect_error_status(dev) (-EINVAL) #endif #endif //_AER_H_ -- cgit v1.2.2 From f0dce411930d16a678173e534594bca160f5eaff Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Wed, 6 Jun 2007 11:50:34 +0800 Subject: PCI aer: add pci_cleanup_aer_correct_aer_status Function to clear bogus correctable errors. Analog to pci_aer_uncorrect_are_status. The Marvell chips seem to start out with a bogus value that needs to be cleared. Yanmin ported it to 2.6.22-rc4 by fixing a fuzz patch applying info. Signed-off-by: Stephen Hemminger Acked-by: Zhang Yanmin Signed-off-by: Greg Kroah-Hartman --- include/linux/aer.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/linux/aer.h b/include/linux/aer.h index 64aacaed8d..509656286e 100644 --- a/include/linux/aer.h +++ b/include/linux/aer.h @@ -13,11 +13,13 @@ extern int pci_enable_pcie_error_reporting(struct pci_dev *dev); extern int pci_find_aer_capability(struct pci_dev *dev); extern int pci_disable_pcie_error_reporting(struct pci_dev *dev); extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev); +extern int pci_cleanup_aer_correct_error_status(struct pci_dev *dev); #else #define pci_enable_pcie_error_reporting(dev) (-EINVAL) #define pci_find_aer_capability(dev) (0) #define pci_disable_pcie_error_reporting(dev) (-EINVAL) #define pci_cleanup_aer_uncorrect_error_status(dev) (-EINVAL) +#define pci_cleanup_aer_correct_error_status(dev) (-EINVAL) #endif #endif //_AER_H_ -- cgit v1.2.2 From 56906c612e10b5e32a48ccbe8a3c08ab6acf5a28 Mon Sep 17 00:00:00 2001 From: David Brownell Date: Mon, 7 May 2007 10:26:17 -0700 Subject: PCI: remove useless pci driver method Remove pointless and never-called enable_wake() hook from pci_driver and from documentation. Evidently this was introduced in the 2.4.6 kernel, but there's no evidence it was ever called; and it was rarely implemented. Signed-off-by: David Brownell Signed-off-by: Greg Kroah-Hartman --- include/linux/pci.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 4db7b5a18f..5be420ac63 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -371,7 +371,6 @@ struct pci_driver { int (*suspend_late) (struct pci_dev *dev, pm_message_t state); int (*resume_early) (struct pci_dev *dev); int (*resume) (struct pci_dev *dev); /* Device woken up */ - int (*enable_wake) (struct pci_dev *dev, pci_power_t state, int enable); /* Enable wake event */ void (*shutdown) (struct pci_dev *dev); struct pci_error_handlers *err_handler; -- cgit v1.2.2 From b8a3a5214d7cc115f1ca3a3967b7229d97c46f4a Mon Sep 17 00:00:00 2001 From: Auke Kok Date: Fri, 8 Jun 2007 15:46:30 -0700 Subject: PCI: read revision ID by default Currently there are 97 occurrences where drivers need the pci revision ID. We can do this once for all devices. Even the pci subsystem needs the revision several times for quirks. The extra u8 member pads out nicely in the pci_dev struct. Signed-off-by: Auke Kok Signed-off-by: Greg Kroah-Hartman --- include/linux/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 5be420ac63..45332440a2 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -139,6 +139,7 @@ struct pci_dev { unsigned short subsystem_vendor; unsigned short subsystem_device; unsigned int class; /* 3 bytes: (base,sub,prog-if) */ + u8 revision; /* PCI revision, low byte of class word */ u8 hdr_type; /* PCI header type (`multi' flag masked out) */ u8 rom_base_reg; /* which config register controls the ROM */ u8 pin; /* which interrupt pin this device uses */ -- cgit v1.2.2 From 1d0ed384c1f2582b6f7408642c77a78a0c410122 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Mon, 18 Jun 2007 10:58:13 +0200 Subject: PCI: ATM: lanai, change VENDOR to DEVICE lanai, change VENDOR to DEVICE There were 2 bad named macros in pci_ids (LANAI 2 and IHB). Rename it to DEVICE, because it's device id. Also make some cleanpu in pci_device_id table (use PCI_VDEVICE). Cc: Mitchell Blank Jr Signed-off-by: Jiri Slaby Signed-off-by: Greg Kroah-Hartman --- include/linux/pci_ids.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 75c4d4d068..a260a947c9 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1383,8 +1383,8 @@ #define PCI_VENDOR_ID_EF 0x111a #define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000 #define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002 -#define PCI_VENDOR_ID_EF_ATM_LANAI2 0x0003 -#define PCI_VENDOR_ID_EF_ATM_LANAIHB 0x0005 +#define PCI_DEVICE_ID_EF_ATM_LANAI2 0x0003 +#define PCI_DEVICE_ID_EF_ATM_LANAIHB 0x0005 #define PCI_VENDOR_ID_IDT 0x111d #define PCI_DEVICE_ID_IDT_IDT77201 0x0001 -- cgit v1.2.2 From c43eaa02abf3b034a9694dcca5c177ecb6072f89 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Mon, 18 Jun 2007 10:58:14 +0200 Subject: PCI: i386: traps, change VENDOR to DEVICE traps, change VENDOR to DEVICE Change macro for SGI lithium (arch/i386/mach-visws/traps.c) device from VENDOR to DEVICE, because it's a device id. Signed-off-by: Jiri Slaby Signed-off-by: Greg Kroah-Hartman --- include/linux/pci_ids.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index a260a947c9..228e0befed 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -944,8 +944,8 @@ #define PCI_VENDOR_ID_SGI 0x10a9 #define PCI_DEVICE_ID_SGI_IOC3 0x0003 +#define PCI_DEVICE_ID_SGI_LITHIUM 0x1002 #define PCI_DEVICE_ID_SGI_IOC4 0x100a -#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002 #define PCI_VENDOR_ID_WINBOND 0x10ad -- cgit v1.2.2 From 03966e097db1a3b7aff5d364277f2e66069923df Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Mon, 18 Jun 2007 10:55:30 +0200 Subject: PCI: pci_ids, reorder some entries pci_ids, reorder some entries Some lines are not vendor sorted, reorder it to comply with the rest of document. Signed-off-by: Jiri Slaby Signed-off-by: Greg Kroah-Hartman --- include/linux/pci_ids.h | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 228e0befed..0058fb920c 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -133,6 +133,9 @@ /* Vendors and devices. Sort key: vendor first, device next. */ +#define PCI_VENDOR_ID_TTTECH 0x0357 +#define PCI_DEVICE_ID_TTTECH_MC322 0x000a + #define PCI_VENDOR_ID_DYNALINK 0x0675 #define PCI_DEVICE_ID_DYNALINK_IS64PH 0x1702 @@ -1902,6 +1905,8 @@ #define PCI_DEVICE_ID_OXSEMI_16PCI952 0x9521 #define PCI_DEVICE_ID_OXSEMI_16PCI952PP 0x9523 +#define PCI_VENDOR_ID_CHELSIO 0x1425 + #define PCI_VENDOR_ID_SAMSUNG 0x144d #define PCI_VENDOR_ID_MYRICOM 0x14c1 @@ -2010,8 +2015,6 @@ #define PCI_DEVICE_ID_ENE_720 0x1421 #define PCI_DEVICE_ID_ENE_722 0x1422 -#define PCI_VENDOR_ID_CHELSIO 0x1425 - #define PCI_SUBVENDOR_ID_PERLE 0x155f #define PCI_SUBDEVICE_ID_PCI_RAS4 0xf001 #define PCI_SUBDEVICE_ID_PCI_RAS8 0xf010 @@ -2035,6 +2038,9 @@ #define PCI_DEVICE_ID_MELLANOX_SINAI_OLD 0x5e8c #define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274 +#define PCI_VENDOR_ID_QUICKNET 0x15e2 +#define PCI_DEVICE_ID_QUICKNET_XJ 0x0500 + #define PCI_VENDOR_ID_PDC 0x15e9 @@ -2412,13 +2418,7 @@ #define PCI_DEVICE_ID_TIGERJET_300 0x0001 #define PCI_DEVICE_ID_TIGERJET_100 0x0002 -#define PCI_VENDOR_ID_TTTECH 0x0357 -#define PCI_DEVICE_ID_TTTECH_MC322 0x000A - #define PCI_VENDOR_ID_XILINX_RME 0xea60 #define PCI_DEVICE_ID_RME_DIGI32 0x9896 #define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897 #define PCI_DEVICE_ID_RME_DIGI32_8 0x9898 - -#define PCI_VENDOR_ID_QUICKNET 0x15E2 -#define PCI_DEVICE_ID_QUICKNET_XJ 0x0500 -- cgit v1.2.2 From f732ee0b71365ddc20e6a0b408f9fd1732d7eb75 Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Mon, 18 Jun 2007 10:58:14 +0200 Subject: PCI: pci_ids, add atheros and 3com_2 vendors pci_ids, add atheros and 3com_2 vendors Atheros is wifi vendor. 3com_2 (0xa727) is an vendor id for one card with ath chip. Signed-off-by: Jiri Slaby Signed-off-by: Greg Kroah-Hartman --- include/linux/pci_ids.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 0058fb920c..0995e97b1c 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -2059,6 +2059,8 @@ #define PCI_DEVICE_ID_BCM1250_PCI 0x0001 #define PCI_DEVICE_ID_BCM1250_HT 0x0002 +#define PCI_VENDOR_ID_ATHEROS 0x168c + #define PCI_VENDOR_ID_NETCELL 0x169c #define PCI_DEVICE_ID_REVOLUTION 0x0044 @@ -2410,6 +2412,8 @@ #define PCI_DEVICE_ID_NETMOS_9845 0x9845 #define PCI_DEVICE_ID_NETMOS_9855 0x9855 +#define PCI_VENDOR_ID_3COM_2 0xa727 + #define PCI_SUBVENDOR_ID_EXSYS 0xd84d #define PCI_SUBDEVICE_ID_EXSYS_4014 0x4014 #define PCI_SUBDEVICE_ID_EXSYS_4055 0x4055 -- cgit v1.2.2 From 12bedda9f404c4d34eda6477b0ec32140d83501b Mon Sep 17 00:00:00 2001 From: Jiri Slaby Date: Mon, 18 Jun 2007 10:56:52 +0200 Subject: PCI: pci_ids, remove double or more empty lines pci_ids, remove two or more empty lines Signed-off-by: Jiri Slaby Signed-off-by: Greg Kroah-Hartman --- include/linux/pci_ids.h | 48 ------------------------------------------------ 1 file changed, 48 deletions(-) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 0995e97b1c..93961e9d03 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -735,7 +735,6 @@ #define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000 #define PCI_DEVICE_ID_ELSA_QS3000 0x3000 - #define PCI_VENDOR_ID_BUSLOGIC 0x104B #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040 @@ -781,7 +780,6 @@ #define PCI_VENDOR_ID_SONY 0x104d - /* Winbond have two vendor IDs! See 0x10ad as well */ #define PCI_VENDOR_ID_WINBOND2 0x1050 #define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a @@ -819,7 +817,6 @@ #define PCI_DEVICE_ID_PROMISE_20276 0x5275 #define PCI_DEVICE_ID_PROMISE_20277 0x7275 - #define PCI_VENDOR_ID_UMC 0x1060 #define PCI_DEVICE_ID_UMC_UM8673F 0x0101 #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a @@ -835,7 +832,6 @@ #define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56 #define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166 - #define PCI_VENDOR_ID_APPLE 0x106b #define PCI_DEVICE_ID_APPLE_BANDIT 0x0001 #define PCI_DEVICE_ID_APPLE_HYDRA 0x000e @@ -871,7 +867,6 @@ #define PCI_DEVICE_ID_YAMAHA_744 0x0010 #define PCI_DEVICE_ID_YAMAHA_754 0x0012 - #define PCI_VENDOR_ID_QLOGIC 0x1077 #define PCI_DEVICE_ID_QLOGIC_ISP10160 0x1016 #define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020 @@ -902,12 +897,9 @@ #define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103 #define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104 - - #define PCI_VENDOR_ID_CONTAQ 0x1080 #define PCI_DEVICE_ID_CONTAQ_82C693 0xc693 - #define PCI_VENDOR_ID_OLICOM 0x108d #define PCI_DEVICE_ID_OLICOM_OC2325 0x0012 #define PCI_DEVICE_ID_OLICOM_OC2183 0x0013 @@ -939,23 +931,19 @@ #define PCI_DEVICE_ID_SII_3112 0x3112 #define PCI_DEVICE_ID_SII_1210SA 0x0240 - #define PCI_VENDOR_ID_BROOKTREE 0x109e #define PCI_DEVICE_ID_BROOKTREE_878 0x0878 #define PCI_DEVICE_ID_BROOKTREE_879 0x0879 - #define PCI_VENDOR_ID_SGI 0x10a9 #define PCI_DEVICE_ID_SGI_IOC3 0x0003 #define PCI_DEVICE_ID_SGI_LITHIUM 0x1002 #define PCI_DEVICE_ID_SGI_IOC4 0x100a - #define PCI_VENDOR_ID_WINBOND 0x10ad #define PCI_DEVICE_ID_WINBOND_82C105 0x0105 #define PCI_DEVICE_ID_WINBOND_83C553 0x0565 - #define PCI_VENDOR_ID_PLX 0x10b5 #define PCI_DEVICE_ID_PLX_R685 0x1030 #define PCI_DEVICE_ID_PLX_ROMULUS 0x106a @@ -989,7 +977,6 @@ #define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909 #define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a - #define PCI_VENDOR_ID_AL 0x10b9 #define PCI_DEVICE_ID_AL_M1533 0x1533 #define PCI_DEVICE_ID_AL_M1535 0x1535 @@ -1012,18 +999,14 @@ #define PCI_DEVICE_ID_AL_M5451 0x5451 #define PCI_DEVICE_ID_AL_M7101 0x7101 - - #define PCI_VENDOR_ID_NEOMAGIC 0x10c8 #define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005 #define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006 #define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016 - #define PCI_VENDOR_ID_TCONRAD 0x10da #define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508 - #define PCI_VENDOR_ID_NVIDIA 0x10de #define PCI_DEVICE_ID_NVIDIA_TNT 0x0020 #define PCI_DEVICE_ID_NVIDIA_TNT2 0x0028 @@ -1244,9 +1227,6 @@ #define PCI_DEVICE_ID_IMS_TT128 0x9128 #define PCI_DEVICE_ID_IMS_TT3D 0x9135 - - - #define PCI_VENDOR_ID_INTERG 0x10ea #define PCI_DEVICE_ID_INTERG_1682 0x1682 #define PCI_DEVICE_ID_INTERG_2000 0x2000 @@ -1265,7 +1245,6 @@ #define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5 #define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6 - #define PCI_VENDOR_ID_INIT 0x1101 #define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */ @@ -1360,7 +1339,6 @@ #define PCI_VENDOR_ID_SIEMENS 0x110A #define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102 - #define PCI_VENDOR_ID_VORTEX 0x1119 #define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000 #define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001 @@ -1395,7 +1373,6 @@ #define PCI_VENDOR_ID_FORE 0x1127 #define PCI_DEVICE_ID_FORE_PCA200E 0x0300 - #define PCI_VENDOR_ID_PHILIPS 0x1131 #define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146 #define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730 @@ -1414,7 +1391,6 @@ #define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550 - #define PCI_VENDOR_ID_SYSKONNECT 0x1148 #define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200 #define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300 @@ -1422,7 +1398,6 @@ #define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400 #define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500 - #define PCI_VENDOR_ID_DIGI 0x114f #define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070 #define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071 @@ -1433,12 +1408,10 @@ #define PCI_DEVICE_ID_NEO_2RJ45 0x00CA #define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB - #define PCI_VENDOR_ID_XIRCOM 0x115d #define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101 #define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103 - #define PCI_VENDOR_ID_SERVERWORKS 0x1166 #define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008 #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 @@ -1507,7 +1480,6 @@ #define PCI_DEVICE_ID_ZEITNET_1221 0x0001 #define PCI_DEVICE_ID_ZEITNET_1225 0x0002 - #define PCI_VENDOR_ID_FUJITSU_ME 0x119e #define PCI_DEVICE_ID_FUJITSU_FS155 0x0001 #define PCI_DEVICE_ID_FUJITSU_FS50 0x0003 @@ -1525,28 +1497,23 @@ #define PCI_DEVICE_ID_V3_V960 0x0001 #define PCI_DEVICE_ID_V3_V351 0x0002 - #define PCI_VENDOR_ID_ATT 0x11c1 #define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480 - #define PCI_VENDOR_ID_SPECIALIX 0x11cb #define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000 #define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000 #define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004 - #define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4 #define PCI_DEVICE_ID_AD1889JS 0x1889 - #define PCI_DEVICE_ID_SEGA_BBA 0x1234 #define PCI_VENDOR_ID_ZORAN 0x11de #define PCI_DEVICE_ID_ZORAN_36057 0x6057 #define PCI_DEVICE_ID_ZORAN_36120 0x6120 - #define PCI_VENDOR_ID_COMPEX 0x11f6 #define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112 @@ -1605,8 +1572,6 @@ #define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005 #define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009 - - #define PCI_VENDOR_ID_AVM 0x1244 #define PCI_DEVICE_ID_AVM_B1 0x0700 #define PCI_DEVICE_ID_AVM_C4 0x0800 @@ -1615,7 +1580,6 @@ #define PCI_DEVICE_ID_AVM_C2 0x1100 #define PCI_DEVICE_ID_AVM_T1 0x1200 - #define PCI_VENDOR_ID_STALLION 0x124d /* Allied Telesyn */ @@ -1638,7 +1602,6 @@ #define PCI_VENDOR_ID_SATSAGEM 0x1267 #define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016 - #define PCI_VENDOR_ID_ENSONIQ 0x1274 #define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880 #define PCI_DEVICE_ID_ENSONIQ_ES1370 0x5000 @@ -1661,7 +1624,6 @@ #define PCI_VENDOR_ID_ALTEON 0x12ae - #define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001 #define PCI_SUBDEVICE_ID_CONNECT_TECH_BH4_232 0x0002 @@ -1692,7 +1654,6 @@ #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_4_485 0x0331 #define PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485 0x0332 - #define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2 #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018 @@ -1802,7 +1763,6 @@ #define PCI_DEVICE_ID_LMC_SSI 0x0005 #define PCI_DEVICE_ID_LMC_T1 0x0006 - #define PCI_VENDOR_ID_NETGEAR 0x1385 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a @@ -2019,7 +1979,6 @@ #define PCI_SUBDEVICE_ID_PCI_RAS4 0xf001 #define PCI_SUBDEVICE_ID_PCI_RAS8 0xf010 - #define PCI_VENDOR_ID_SYBA 0x1592 #define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782 #define PCI_DEVICE_ID_SYBA_1P_ECP 0x0783 @@ -2043,7 +2002,6 @@ #define PCI_VENDOR_ID_PDC 0x15e9 - #define PCI_VENDOR_ID_FARSITE 0x1619 #define PCI_DEVICE_ID_FARSITE_T2P 0x0400 #define PCI_DEVICE_ID_FARSITE_T4P 0x0440 @@ -2099,7 +2057,6 @@ #define PCI_DEVICE_ID_HERC_WIN 0x5732 #define PCI_DEVICE_ID_HERC_UNI 0x5832 - #define PCI_VENDOR_ID_SITECOM 0x182d #define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069 @@ -2135,12 +2092,9 @@ #define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007 #define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009 - #define PCI_VENDOR_ID_AKS 0x416c #define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100 - - #define PCI_VENDOR_ID_S3 0x5333 #define PCI_DEVICE_ID_S3_TRIO 0x8811 #define PCI_DEVICE_ID_S3_868 0x8880 @@ -2152,7 +2106,6 @@ #define PCI_VENDOR_ID_DUNORD 0x5544 #define PCI_DEVICE_ID_DUNORD_I3000 0x0001 - #define PCI_VENDOR_ID_DCI 0x6666 #define PCI_DEVICE_ID_DCI_PCCOM4 0x0001 #define PCI_DEVICE_ID_DCI_PCCOM8 0x0002 @@ -2396,7 +2349,6 @@ #define PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN 0x0500 #define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503 - #define PCI_VENDOR_ID_HOLTEK 0x9412 #define PCI_DEVICE_ID_HOLTEK_6565 0x6565 -- cgit v1.2.2 From 579082df38839efc5b14aa3f48b8806e3e8dc5c2 Mon Sep 17 00:00:00 2001 From: Rolf Eike Beer Date: Tue, 10 Jul 2007 13:35:05 +0200 Subject: PCI: Fix typo in include/linux/pci.h Signed-off-by: Rolf Eike Beer Signed-off-by: Greg Kroah-Hartman --- include/linux/pci.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index 45332440a2..a6657b7f24 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -315,7 +315,7 @@ struct pci_dynids { /* ---------------------------------------------------------------- */ /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides - * a set fof callbacks in struct pci_error_handlers, then that device driver + * a set of callbacks in struct pci_error_handlers, then that device driver * will be notified of PCI bus errors, and will be driven to recovery * when an error occurs. */ -- cgit v1.2.2 From caa5171622c8fef70fa20d2d74f4326866039df9 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Mon, 9 Jul 2007 11:55:51 -0700 Subject: PCI: remove pci_dac_dma_... APIs Based on replies to a respective query, remove the pci_dac_dma_...() APIs (except for pci_dac_dma_supported() on Alpha, where this function is used in non-DAC PCI DMA code). Signed-off-by: Jan Beulich Cc: Andi Kleen Cc: Jesse Barnes Cc: Christoph Hellwig Acked-by: David Miller Cc: Jeff Garzik Cc: Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- include/asm-alpha/pci.h | 24 ---------------------- include/asm-arm/pci.h | 5 ----- include/asm-cris/pci.h | 32 ----------------------------- include/asm-frv/pci.h | 3 --- include/asm-i386/pci.h | 33 ------------------------------ include/asm-ia64/pci.h | 8 -------- include/asm-m68knommu/pci.h | 6 ------ include/asm-mips/pci.h | 14 ------------- include/asm-parisc/pci.h | 3 --- include/asm-powerpc/dma-mapping.h | 1 - include/asm-powerpc/pci.h | 18 ---------------- include/asm-ppc/pci.h | 6 ------ include/asm-sh/pci.h | 5 ----- include/asm-sh64/pci.h | 5 ----- include/asm-sparc/pci.h | 2 -- include/asm-sparc64/pci.h | 43 --------------------------------------- include/asm-v850/rte_cb.h | 1 - include/asm-x86_64/pci.h | 40 ------------------------------------ include/asm-xtensa/pci.h | 3 --- 19 files changed, 252 deletions(-) (limited to 'include') diff --git a/include/asm-alpha/pci.h b/include/asm-alpha/pci.h index 635d6f2b0b..30ee7669b1 100644 --- a/include/asm-alpha/pci.h +++ b/include/asm-alpha/pci.h @@ -199,30 +199,6 @@ pci_dma_sync_sg_for_device(struct pci_dev *dev, struct scatterlist *sg, extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); -/* True if the machine supports DAC addressing, and DEV can - make use of it given MASK. */ -extern int pci_dac_dma_supported(struct pci_dev *hwdev, u64 mask); - -/* Convert to/from DAC dma address and struct page. */ -extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *, struct page *, - unsigned long, int); -extern struct page *pci_dac_dma_to_page(struct pci_dev *, dma64_addr_t); -extern unsigned long pci_dac_dma_to_offset(struct pci_dev *, dma64_addr_t); - -static inline void -pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, - size_t len, int direction) -{ - /* Nothing to do. */ -} - -static inline void -pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, - size_t len, int direction) -{ - /* Nothing to do. */ -} - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-arm/pci.h b/include/asm-arm/pci.h index 9299a3c1ac..ed3f898191 100644 --- a/include/asm-arm/pci.h +++ b/include/asm-arm/pci.h @@ -25,11 +25,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) */ #define PCI_DMA_BUS_IS_PHYS (0) -/* - * We don't support DAC DMA cycles. - */ -#define pci_dac_dma_supported(pci_dev, mask) (0) - /* * Whether pci_unmap_{single,page} is a nop depends upon the * configuration. diff --git a/include/asm-cris/pci.h b/include/asm-cris/pci.h index 5f1986ef7d..730ce40fdd 100644 --- a/include/asm-cris/pci.h +++ b/include/asm-cris/pci.h @@ -52,38 +52,6 @@ struct pci_dev; #define pci_unmap_len(PTR, LEN_NAME) (0) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) -/* This is always fine. */ -#define pci_dac_dma_supported(pci_dev, mask) (1) - -static inline dma64_addr_t -pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction) -{ - return ((dma64_addr_t) page_to_phys(page) + - (dma64_addr_t) offset); -} - -static inline struct page * -pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr) -{ - return pfn_to_page(dma_addr >> PAGE_SHIFT); -} - -static inline unsigned long -pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr) -{ - return (dma_addr & ~PAGE_MASK); -} - -static inline void -pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) -{ -} - -static inline void -pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) -{ -} - #define HAVE_PCI_MMAP extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); diff --git a/include/asm-frv/pci.h b/include/asm-frv/pci.h index 3aee08c5a4..585d9b4994 100644 --- a/include/asm-frv/pci.h +++ b/include/asm-frv/pci.h @@ -40,9 +40,6 @@ extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle); -/* This is always fine. */ -#define pci_dac_dma_supported(pci_dev, mask) (1) - /* Return the index of the PCI controller for device PDEV. */ #define pci_controller_num(PDEV) (0) diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h index b974bd8ce9..392d3fe5d4 100644 --- a/include/asm-i386/pci.h +++ b/include/asm-i386/pci.h @@ -56,39 +56,6 @@ struct pci_dev; #define pci_unmap_len(PTR, LEN_NAME) (0) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) -/* This is always fine. */ -#define pci_dac_dma_supported(pci_dev, mask) (1) - -static inline dma64_addr_t -pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction) -{ - return ((dma64_addr_t) page_to_phys(page) + - (dma64_addr_t) offset); -} - -static inline struct page * -pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr) -{ - return pfn_to_page(dma_addr >> PAGE_SHIFT); -} - -static inline unsigned long -pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr) -{ - return (dma_addr & ~PAGE_MASK); -} - -static inline void -pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) -{ -} - -static inline void -pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) -{ - flush_write_buffers(); -} - #define HAVE_PCI_MMAP extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h index 26b69280f6..3523d25845 100644 --- a/include/asm-ia64/pci.h +++ b/include/asm-ia64/pci.h @@ -71,14 +71,6 @@ pcibios_penalize_isa_irq (int irq, int active) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ (((PTR)->LEN_NAME) = (VAL)) -/* The ia64 platform always supports 64-bit addressing. */ -#define pci_dac_dma_supported(pci_dev, mask) (1) -#define pci_dac_page_to_dma(dev,pg,off,dir) ((dma_addr_t) page_to_bus(pg) + (off)) -#define pci_dac_dma_to_page(dev,dma_addr) (virt_to_page(bus_to_virt(dma_addr))) -#define pci_dac_dma_to_offset(dev,dma_addr) offset_in_page(dma_addr) -#define pci_dac_dma_sync_single_for_cpu(dev,dma_addr,len,dir) do { } while (0) -#define pci_dac_dma_sync_single_for_device(dev,dma_addr,len,dir) do { mb(); } while (0) - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-m68knommu/pci.h b/include/asm-m68knommu/pci.h index a99ce768f4..a13f3cc874 100644 --- a/include/asm-m68knommu/pci.h +++ b/include/asm-m68knommu/pci.h @@ -24,12 +24,6 @@ static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) return 1; } -/* - * Not supporting more than 32-bit PCI bus addresses now, but - * must satisfy references to this function. Change if needed. - */ -#define pci_dac_dma_supported(pci_dev, mask) (0) - #endif /* CONFIG_COMEMPCI */ #endif /* M68KNOMMU_PCI_H */ diff --git a/include/asm-mips/pci.h b/include/asm-mips/pci.h index 6e8c5540bd..4fcc185cb2 100644 --- a/include/asm-mips/pci.h +++ b/include/asm-mips/pci.h @@ -121,20 +121,6 @@ extern unsigned int PCI_DMA_BUS_IS_PHYS; #endif /* CONFIG_DMA_NEED_PCI_MAP_STATE */ -/* This is always fine. */ -#define pci_dac_dma_supported(pci_dev, mask) (1) - -extern dma64_addr_t pci_dac_page_to_dma(struct pci_dev *pdev, - struct page *page, unsigned long offset, int direction); -extern struct page *pci_dac_dma_to_page(struct pci_dev *pdev, - dma64_addr_t dma_addr); -extern unsigned long pci_dac_dma_to_offset(struct pci_dev *pdev, - dma64_addr_t dma_addr); -extern void pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, - dma64_addr_t dma_addr, size_t len, int direction); -extern void pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, - dma64_addr_t dma_addr, size_t len, int direction); - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-parisc/pci.h b/include/asm-parisc/pci.h index c331d49e45..61fbd57a83 100644 --- a/include/asm-parisc/pci.h +++ b/include/asm-parisc/pci.h @@ -238,9 +238,6 @@ extern inline void pcibios_register_hba(struct pci_hba_data *x) #define PCIBIOS_MIN_IO 0x10 #define PCIBIOS_MIN_MEM 0x1000 /* NBPG - but pci/setup-res.c dies */ -/* Don't support DAC yet. */ -#define pci_dac_dma_supported(pci_dev, mask) (0) - /* export the pci_ DMA API in terms of the dma_ one */ #include diff --git a/include/asm-powerpc/dma-mapping.h b/include/asm-powerpc/dma-mapping.h index a19a6f1a1c..f6bd804d90 100644 --- a/include/asm-powerpc/dma-mapping.h +++ b/include/asm-powerpc/dma-mapping.h @@ -61,7 +61,6 @@ struct dma_mapping_ops { void (*unmap_sg)(struct device *dev, struct scatterlist *sg, int nents, enum dma_data_direction direction); int (*dma_supported)(struct device *dev, u64 mask); - int (*dac_dma_supported)(struct device *dev, u64 mask); int (*set_dma_mask)(struct device *dev, u64 dma_mask); }; diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h index b36a284bed..e16e7bc9ab 100644 --- a/include/asm-powerpc/pci.h +++ b/include/asm-powerpc/pci.h @@ -74,18 +74,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) extern void set_pci_dma_ops(struct dma_mapping_ops *dma_ops); extern struct dma_mapping_ops *get_pci_dma_ops(void); -/* For DAC DMA, we currently don't support it by default, but - * we let 64-bit platforms override this. - */ -static inline int pci_dac_dma_supported(struct pci_dev *hwdev,u64 mask) -{ - struct dma_mapping_ops *d = get_pci_dma_ops(); - - if (d && d->dac_dma_supported) - return d->dac_dma_supported(&hwdev->dev, mask); - return 0; -} - static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, unsigned long *strategy_parameter) @@ -124,12 +112,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, } #endif -/* - * At present there are very few 32-bit PPC machines that can have - * memory above the 4GB point, and we don't support that. - */ -#define pci_dac_dma_supported(pci_dev, mask) (0) - /* Return the index of the PCI controller for device PDEV. */ #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h index 0a66a6f105..d2442cd72a 100644 --- a/include/asm-ppc/pci.h +++ b/include/asm-ppc/pci.h @@ -102,12 +102,6 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev, } #endif -/* - * At present there are very few 32-bit PPC machines that can have - * memory above the 4GB point, and we don't support that. - */ -#define pci_dac_dma_supported(pci_dev, mask) (0) - /* Return the index of the PCI controller for device PDEV. */ #define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h index 6f741f3a5d..2757ce096f 100644 --- a/include/asm-sh/pci.h +++ b/include/asm-sh/pci.h @@ -110,11 +110,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) #endif -/* Not supporting more than 32-bit PCI bus addresses now, but - * must satisfy references to this function. Change if needed. - */ -#define pci_dac_dma_supported(pci_dev, mask) (0) - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-sh64/pci.h b/include/asm-sh64/pci.h index 0a2b2bd48b..57a67cf7a5 100644 --- a/include/asm-sh64/pci.h +++ b/include/asm-sh64/pci.h @@ -72,11 +72,6 @@ static inline void pcibios_penalize_isa_irq(int irq, int active) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) #endif -/* Not supporting more than 32-bit PCI bus addresses now, but - * must satisfy references to this function. Change if needed. - */ -#define pci_dac_dma_supported(pci_dev, mask) (0) - /* These macros should be used after a pci_map_sg call has been done * to get bus addresses of each of the SG entries and their lengths. * You should only work with the number of sg entries pci_map_sg diff --git a/include/asm-sparc/pci.h b/include/asm-sparc/pci.h index a1ff7acc76..b93b6c79e0 100644 --- a/include/asm-sparc/pci.h +++ b/include/asm-sparc/pci.h @@ -142,8 +142,6 @@ static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask) return 1; } -#define pci_dac_dma_supported(dev, mask) (0) - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h index 202915d827..e11ac100f0 100644 --- a/include/asm-sparc64/pci.h +++ b/include/asm-sparc64/pci.h @@ -206,49 +206,6 @@ extern int pci_dma_supported(struct pci_dev *hwdev, u64 mask); #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) #define PCI64_ADDR_BASE 0xfffc000000000000UL -/* Usage of the pci_dac_foo interfaces is only valid if this - * test passes. - */ -#define pci_dac_dma_supported(pci_dev, mask) \ - ((((mask) & PCI64_REQUIRED_MASK) == PCI64_REQUIRED_MASK) ? 1 : 0) - -static inline dma64_addr_t -pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction) -{ - return (PCI64_ADDR_BASE + - __pa(page_address(page)) + offset); -} - -static inline struct page * -pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr) -{ - unsigned long paddr = (dma_addr & PAGE_MASK) - PCI64_ADDR_BASE; - - return virt_to_page(__va(paddr)); -} - -static inline unsigned long -pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr) -{ - return (dma_addr & ~PAGE_MASK); -} - -static inline void -pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) -{ - /* DAC cycle addressing does not make use of the - * PCI controller's streaming cache, so nothing to do. - */ -} - -static inline void -pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) -{ - /* DAC cycle addressing does not make use of the - * PCI controller's streaming cache, so nothing to do. - */ -} - #define PCI_DMA_ERROR_CODE (~(dma_addr_t)0x0) static inline int pci_dma_mapping_error(dma_addr_t dma_addr) diff --git a/include/asm-v850/rte_cb.h b/include/asm-v850/rte_cb.h index 9f7f02cb03..e85d261b79 100644 --- a/include/asm-v850/rte_cb.h +++ b/include/asm-v850/rte_cb.h @@ -64,7 +64,6 @@ /* As we don't really support PCI DMA to cpu memory, and use bounce-buffers instead, perversely enough, this becomes always true! */ # define pci_dma_supported(dev, mask) 1 -# define pci_dac_dma_supported(dev, mask) 0 # define pcibios_assign_all_busses() 1 #endif /* CONFIG_RTE_MB_A_PCI */ diff --git a/include/asm-x86_64/pci.h b/include/asm-x86_64/pci.h index d95c9e78fe..bda94fd517 100644 --- a/include/asm-x86_64/pci.h +++ b/include/asm-x86_64/pci.h @@ -54,14 +54,6 @@ extern int iommu_setup(char *opt); #if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU) -/* - * x86-64 always supports DAC, but sometimes it is useful to force - * devices through the IOMMU to get automatic sg list merging. - * Optional right now. - */ -extern int iommu_sac_force; -#define pci_dac_dma_supported(pci_dev, mask) (!iommu_sac_force) - #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ dma_addr_t ADDR_NAME; #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ @@ -78,8 +70,6 @@ extern int iommu_sac_force; #else /* No IOMMU */ -#define pci_dac_dma_supported(pci_dev, mask) 1 - #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) #define pci_unmap_addr(PTR, ADDR_NAME) (0) @@ -91,36 +81,6 @@ extern int iommu_sac_force; #include -static inline dma64_addr_t -pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction) -{ - return ((dma64_addr_t) page_to_phys(page) + - (dma64_addr_t) offset); -} - -static inline struct page * -pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr) -{ - return virt_to_page(__va(dma_addr)); -} - -static inline unsigned long -pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr) -{ - return (dma_addr & ~PAGE_MASK); -} - -static inline void -pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) -{ -} - -static inline void -pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction) -{ - flush_write_buffers(); -} - #ifdef CONFIG_PCI static inline void pci_dma_burst_advice(struct pci_dev *pdev, enum pci_dma_burst_strategy *strat, diff --git a/include/asm-xtensa/pci.h b/include/asm-xtensa/pci.h index 644411c8e0..66410acf18 100644 --- a/include/asm-xtensa/pci.h +++ b/include/asm-xtensa/pci.h @@ -64,9 +64,6 @@ struct pci_dev; #define pci_ubnmap_len(PTR, LEN_NAME) (0) #define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0) -/* We cannot access memory above 4GB */ -#define pci_dac_dma_supported(pci_dev, mask) (0) - /* Map a range of PCI memory or I/O space for a device into user space */ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma, enum pci_mmap_state mmap_state, int write_combine); -- cgit v1.2.2 From 694625c0b322905d6892fad873029f764cd4823f Mon Sep 17 00:00:00 2001 From: Randy Dunlap Date: Mon, 9 Jul 2007 11:55:54 -0700 Subject: PCI: add pci_try_set_mwi As suggested by Andrew, add pci_try_set_mwi(), which does not require return-value checking. - add pci_try_set_mwi() without __must_check - make it return 0 on success, errno if the "try" failed or error - review callers Signed-off-by: Randy Dunlap Cc: Alan Cox Signed-off-by: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- include/linux/pci.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/pci.h b/include/linux/pci.h index a6657b7f24..a5602e26f4 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -545,6 +545,7 @@ void pci_set_master(struct pci_dev *dev); int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); #define HAVE_PCI_SET_MWI int __must_check pci_set_mwi(struct pci_dev *dev); +int pci_try_set_mwi(struct pci_dev *dev); void pci_clear_mwi(struct pci_dev *dev); void pci_intx(struct pci_dev *dev, int enable); void pci_msi_off(struct pci_dev *dev); -- cgit v1.2.2 From cfc94cdf8e0f14e692a5a40ef3cc10f464b2511b Mon Sep 17 00:00:00 2001 From: Jan Kara Date: Wed, 9 May 2007 13:19:52 +0200 Subject: debugfs: add rename for debugfs files Implement debugfs_rename() to allow renaming files/directories in debugfs. Signed-off-by: Jan Kara Signed-off-by: Greg Kroah-Hartman --- include/linux/debugfs.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/linux/debugfs.h b/include/linux/debugfs.h index 5a9c49534d..104e51e20e 100644 --- a/include/linux/debugfs.h +++ b/include/linux/debugfs.h @@ -38,6 +38,9 @@ struct dentry *debugfs_create_symlink(const char *name, struct dentry *parent, void debugfs_remove(struct dentry *dentry); +struct dentry *debugfs_rename(struct dentry *old_dir, struct dentry *old_dentry, + struct dentry *new_dir, const char *new_name); + struct dentry *debugfs_create_u8(const char *name, mode_t mode, struct dentry *parent, u8 *value); struct dentry *debugfs_create_u16(const char *name, mode_t mode, @@ -85,6 +88,12 @@ static inline struct dentry *debugfs_create_symlink(const char *name, static inline void debugfs_remove(struct dentry *dentry) { } +static inline struct dentry *debugfs_rename(struct dentry *old_dir, struct dentry *old_dentry, + struct dentry *new_dir, char *new_name) +{ + return ERR_PTR(-ENODEV); +} + static inline struct dentry *debugfs_create_u8(const char *name, mode_t mode, struct dentry *parent, u8 *value) -- cgit v1.2.2 From 4f5c791a850e5305a5b1b48d0e4b4de248dc96f9 Mon Sep 17 00:00:00 2001 From: Lennart Poettering Date: Tue, 8 May 2007 22:07:02 +0200 Subject: DMI-based module autoloading The patch below adds DMI/SMBIOS based module autoloading to the Linux kernel. The idea is to load laptop drivers automatically (and other drivers which cannot be autoloaded otherwise), based on the DMI system identification information of the BIOS. Right now most distros manually try to load all available laptop drivers on bootup in the hope that at least one of them loads successfully. This patch does away with all that, and uses udev to automatically load matching drivers on the right machines. Basically the patch just exports the DMI information that has been parsed by the kernel anyway to userspace via a sysfs device /sys/class/dmi/id and makes sure that proper modalias attributes are available. Besides adding the "modalias" attribute it also adds attributes for a few other DMI fields which might be useful for writing udev rules. This patch is not an attempt to export the entire DMI/SMBIOS data to userspace. We already have "dmidecode" which parses the complete DMI info from userspace. The purpose of this patch is machine model identification and good udev integration. To take advantage of DMI based module autoloading, a driver should export one or more MODULE_ALIAS fields similar to these: MODULE_ALIAS("dmi:*:svnMICRO-STARINT'LCO.,LTD:pnMS-1013:pvr0131*:cvnMICRO-STARINT'LCO.,LTD:ct10:*"); MODULE_ALIAS("dmi:*:svnMicro-StarInternational:pnMS-1058:pvr0581:rvnMSI:rnMS-1058:*:ct10:*"); MODULE_ALIAS("dmi:*:svnMicro-StarInternational:pnMS-1412:*:rvnMSI:rnMS-1412:*:cvnMICRO-STARINT'LCO.,LTD:ct10:*"); MODULE_ALIAS("dmi:*:svnNOTEBOOK:pnSAM2000:pvr0131*:cvnMICRO-STARINT'LCO.,LTD:ct10:*"); These lines are specific to my msi-laptop.c driver. They are basically just a concatenation of a few carefully selected DMI fields with all potentially bad characters stripped. Besides laptop drivers, modules like "hdaps", the i2c modules and the hwmon modules are good candidates for "dmi:" MODULE_ALIAS lines. Besides merely exporting the DMI data via sysfs the patch adds support for a few more DMI fields. Especially the CHASSIS fields are very useful to identify different laptop modules. The patch also adds working MODULE_ALIAS lines to my msi-laptop.c driver. I'd like to thank Kay Sievers for helping me to clean up this patch for posting it on lkml. Patch is against Linus' current GIT HEAD. Should probably apply to older kernels as well without modification. Signed-off-by: Lennart Poettering Signed-off-by: Kay Sievers Signed-off-by: Greg Kroah-Hartman --- include/linux/dmi.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'include') diff --git a/include/linux/dmi.h b/include/linux/dmi.h index 904bf3d2d9..b8ac7b01c4 100644 --- a/include/linux/dmi.h +++ b/include/linux/dmi.h @@ -12,9 +12,17 @@ enum dmi_field { DMI_PRODUCT_NAME, DMI_PRODUCT_VERSION, DMI_PRODUCT_SERIAL, + DMI_PRODUCT_UUID, DMI_BOARD_VENDOR, DMI_BOARD_NAME, DMI_BOARD_VERSION, + DMI_BOARD_SERIAL, + DMI_BOARD_ASSET_TAG, + DMI_CHASSIS_VENDOR, + DMI_CHASSIS_TYPE, + DMI_CHASSIS_VERSION, + DMI_CHASSIS_SERIAL, + DMI_CHASSIS_ASSET_TAG, DMI_STRING_MAX, }; -- cgit v1.2.2 From 9cddad77574313fcee36c5e60122718daa7c0361 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Wed, 13 Jun 2007 15:53:34 +0200 Subject: PM: Remove pm_parent from struct dev_pm_info The pm_parent member of struct dev_pm_info (defined in include/linux/pm.h) is only used to check if the device's parent is in the right state while the device is being suspended or resumed. However, this can be done just as well with the help of the parent pointer in struct device, so pm_parent can be removed along with some code that handles it. Signed-off-by: Rafael J. Wysocki Acked-by: David Brownell Signed-off-by: Greg Kroah-Hartman --- include/linux/pm.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include') diff --git a/include/linux/pm.h b/include/linux/pm.h index b2c4fde4e9..3fd65ad4b0 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -269,13 +269,10 @@ struct dev_pm_info { unsigned should_wakeup:1; pm_message_t prev_state; void * saved_state; - struct device * pm_parent; struct list_head entry; #endif }; -extern void device_pm_set_parent(struct device * dev, struct device * parent); - extern int device_power_down(pm_message_t state); extern void device_power_up(void); extern void device_resume(void); -- cgit v1.2.2 From cc4900690bf77257996e90f0059eb074b8db52e6 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Wed, 13 Jun 2007 15:55:34 +0200 Subject: PM: Remove saved_state from struct dev_pm_info The saved_state member of struct dev_pm_info, defined in include/linux/pm.h, is not used anywhere, so it can be removed. Signed-off-by: Rafael J. Wysocki Signed-off-by: Greg Kroah-Hartman --- include/linux/pm.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/pm.h b/include/linux/pm.h index 3fd65ad4b0..6e7f066716 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -268,7 +268,6 @@ struct dev_pm_info { #ifdef CONFIG_PM unsigned should_wakeup:1; pm_message_t prev_state; - void * saved_state; struct list_head entry; #endif }; -- cgit v1.2.2 From 515c53576299e32d6bdb6295cfa2fe1307516eb4 Mon Sep 17 00:00:00 2001 From: "Rafael J. Wysocki" Date: Sun, 17 Jun 2007 19:48:06 +0200 Subject: PM: Remove prev_state from struct dev_pm_info The prev_state member of struct dev_pm_info (defined in include/linux/pm.h) is only used during a resume to check if the device's state before the suspend was 'off', in which case the device is not resumed. However, in such cases the decision whether or not to resume the device should be made on the driver level and the resume callbacks from the device's bus and class should be executed anyway (the may be needed for some things other than just powering on the device). Signed-off-by: Rafael J. Wysocki Signed-off-by: Greg Kroah-Hartman --- include/linux/pm.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/pm.h b/include/linux/pm.h index 6e7f066716..273781c82e 100644 --- a/include/linux/pm.h +++ b/include/linux/pm.h @@ -267,7 +267,6 @@ struct dev_pm_info { unsigned can_wakeup:1; #ifdef CONFIG_PM unsigned should_wakeup:1; - pm_message_t prev_state; struct list_head entry; #endif }; -- cgit v1.2.2 From 72dba584b695d8bc8c1a50ed54ad4cba7c62314d Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 14 Jun 2007 03:45:13 +0900 Subject: ida: implement idr based id allocator Implement idr based id allocator. ida is used the same way idr is used but lacks id -> ptr translation and thus consumes much less memory. struct ida_bitmap is attached as leaf nodes to idr tree which is managed by the idr code. Each ida_bitmap is 128bytes long and contains slightly less than a thousand slots. ida is more aggressive with releasing extra resources acquired using ida_pre_get(). After every successful id allocation, ida frees one reserved idr_layer if possible. Reserved ida_bitmap is not freed automatically but only one ida_bitmap is reserved and it's almost always used right away. Under most circumstances, ida won't hold on to memory for too long which isn't actively used. Signed-off-by: Tejun Heo Signed-off-by: Greg Kroah-Hartman --- include/linux/idr.h | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'include') diff --git a/include/linux/idr.h b/include/linux/idr.h index 826803449d..915572fa03 100644 --- a/include/linux/idr.h +++ b/include/linux/idr.h @@ -83,4 +83,33 @@ void idr_remove(struct idr *idp, int id); void idr_destroy(struct idr *idp); void idr_init(struct idr *idp); + +/* + * IDA - IDR based id allocator, use when translation from id to + * pointer isn't necessary. + */ +#define IDA_CHUNK_SIZE 128 /* 128 bytes per chunk */ +#define IDA_BITMAP_LONGS (128 / sizeof(long) - 1) +#define IDA_BITMAP_BITS (IDA_BITMAP_LONGS * sizeof(long) * 8) + +struct ida_bitmap { + long nr_busy; + unsigned long bitmap[IDA_BITMAP_LONGS]; +}; + +struct ida { + struct idr idr; + struct ida_bitmap *free_bitmap; +}; + +#define IDA_INIT(name) { .idr = IDR_INIT(name), .free_bitmap = NULL, } +#define DEFINE_IDA(name) struct ida name = IDA_INIT(name) + +int ida_pre_get(struct ida *ida, gfp_t gfp_mask); +int ida_get_new_above(struct ida *ida, int starting_id, int *p_id); +int ida_get_new(struct ida *ida, int *p_id); +void ida_remove(struct ida *ida, int id); +void ida_destroy(struct ida *ida); +void ida_init(struct ida *ida); + #endif /* __IDR_H__ */ -- cgit v1.2.2 From 0c096b507f15397da890051ee73de4266d3941fb Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 14 Jun 2007 03:45:15 +0900 Subject: sysfs: add sysfs_dirent->s_name Add s_name to sysfs_dirent. This is to further reduce dependency to the associated dentry. Name is copied for directories and symlinks but not for attributes. Where possible, name dereferences are converted to use sd->s_name. sysfs_symlink->link_name and sysfs_get_name() are unused now and removed. This change allows symlink to be implemented using sysfs_dirent tree proper, which is the last remaining dentry-dependent sysfs walk. Signed-off-by: Tejun Heo Signed-off-by: Greg Kroah-Hartman --- include/linux/sysfs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 7d5d1ec95c..2f86b080b3 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -76,6 +76,7 @@ struct sysfs_ops { #define SYSFS_KOBJ_BIN_ATTR 0x0008 #define SYSFS_KOBJ_LINK 0x0020 #define SYSFS_NOT_PINNED (SYSFS_KOBJ_ATTR | SYSFS_KOBJ_BIN_ATTR | SYSFS_KOBJ_LINK) +#define SYSFS_COPY_NAME (SYSFS_DIR | SYSFS_KOBJ_LINK) #ifdef CONFIG_SYSFS -- cgit v1.2.2 From 7b595756ec1f49e0049a9e01a1298d53a7faaa15 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 14 Jun 2007 03:45:17 +0900 Subject: sysfs: kill unnecessary attribute->owner sysfs is now completely out of driver/module lifetime game. After deletion, a sysfs node doesn't access anything outside sysfs proper, so there's no reason to hold onto the attribute owners. Note that often the wrong modules were accounted for as owners leading to accessing removed modules. This patch kills now unnecessary attribute->owner. Note that with this change, userland holding a sysfs node does not prevent the backing module from being unloaded. For more info regarding lifetime rule cleanup, please read the following message. http://article.gmane.org/gmane.linux.kernel/510293 (tweaked by Greg to not delete the field just yet, to make it easier to merge things properly.) Signed-off-by: Tejun Heo Cc: Cornelia Huck Cc: Andrew Morton Signed-off-by: Greg Kroah-Hartman --- include/linux/sysdev.h | 3 +-- include/linux/sysfs.h | 12 ++++++++---- 2 files changed, 9 insertions(+), 6 deletions(-) (limited to 'include') diff --git a/include/linux/sysdev.h b/include/linux/sysdev.h index e699ab279c..e285746588 100644 --- a/include/linux/sysdev.h +++ b/include/linux/sysdev.h @@ -101,8 +101,7 @@ struct sysdev_attribute { #define _SYSDEV_ATTR(_name,_mode,_show,_store) \ { \ - .attr = { .name = __stringify(_name), .mode = _mode, \ - .owner = THIS_MODULE }, \ + .attr = { .name = __stringify(_name), .mode = _mode }, \ .show = _show, \ .store = _store, \ } diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 2f86b080b3..161e19aa2b 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -20,9 +20,13 @@ struct module; struct nameidata; struct dentry; +/* FIXME + * The *owner field is no longer used, but leave around + * until the tree gets cleaned up fully. + */ struct attribute { const char * name; - struct module * owner; + struct module * owner; mode_t mode; }; @@ -39,14 +43,14 @@ struct attribute_group { */ #define __ATTR(_name,_mode,_show,_store) { \ - .attr = {.name = __stringify(_name), .mode = _mode, .owner = THIS_MODULE }, \ + .attr = {.name = __stringify(_name), .mode = _mode }, \ .show = _show, \ .store = _store, \ } #define __ATTR_RO(_name) { \ - .attr = { .name = __stringify(_name), .mode = 0444, .owner = THIS_MODULE }, \ - .show = _name##_show, \ + .attr = { .name = __stringify(_name), .mode = 0444 }, \ + .show = _name##_show, \ } #define __ATTR_NULL { .attr = { .name = NULL } } -- cgit v1.2.2 From ad6a1e1c66009ba9dcd2f5c90ffa1fb4ce72fce0 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 14 Jun 2007 03:45:17 +0900 Subject: driver-core: make devt_attr and uevent_attr static devt_attr and uevent_attr are either allocated dynamically with or embedded in device and class_device as they needed their owner field set to the module implementing the driver. Now that sysfs implements immediate disconnect and owner field removed from struct attribute, there is no reason to do this. Remove these attributes from [class_]device and use static attribute structures instead. Signed-off-by: Tejun Heo Signed-off-by: Greg Kroah-Hartman --- include/linux/device.h | 5 ----- 1 file changed, 5 deletions(-) (limited to 'include') diff --git a/include/linux/device.h b/include/linux/device.h index 2e1a2988b7..be2debed70 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -238,7 +238,6 @@ extern int __must_check class_device_create_file(struct class_device *, * @devt: for internal use by the driver core only. * @node: for internal use by the driver core only. * @kobj: for internal use by the driver core only. - * @devt_attr: for internal use by the driver core only. * @groups: optional additional groups to be created * @dev: if set, a symlink to the struct device is created in the sysfs * directory for this struct class device. @@ -263,8 +262,6 @@ struct class_device { struct kobject kobj; struct class * class; /* required */ dev_t devt; /* dev_t, creates the sysfs "dev" */ - struct class_device_attribute *devt_attr; - struct class_device_attribute uevent_attr; struct device * dev; /* not necessary, but nice to have */ void * class_data; /* class-specific data */ struct class_device *parent; /* parent of this child device, if there is one */ @@ -419,8 +416,6 @@ struct device { struct device_type *type; unsigned is_registered:1; unsigned uevent_suppress:1; - struct device_attribute uevent_attr; - struct device_attribute *devt_attr; struct semaphore sem; /* semaphore to synchronize calls to * its driver. -- cgit v1.2.2 From b402d72cf7b338a074e3c12b305ec79284e18845 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 14 Jun 2007 04:27:21 +0900 Subject: sysfs: rename sysfs_dirent->s_type to s_flags and make room for flags Rename sysfs_dirent->s_type to s_flags, pack type into lower eight bits and reserve the rest for flags. sysfs_type() can used to access the type. All existing sd->s_type accesses are converted to use sysfs_type(). While at it, type test is changed to equality test instead of bit-and test where appropriate. Signed-off-by: Tejun Heo Signed-off-by: Greg Kroah-Hartman --- include/linux/sysfs.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include') diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 161e19aa2b..5813550902 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -74,6 +74,7 @@ struct sysfs_ops { ssize_t (*store)(struct kobject *,struct attribute *,const char *, size_t); }; +#define SYSFS_TYPE_MASK 0x00ff #define SYSFS_ROOT 0x0001 #define SYSFS_DIR 0x0002 #define SYSFS_KOBJ_ATTR 0x0004 @@ -82,6 +83,8 @@ struct sysfs_ops { #define SYSFS_NOT_PINNED (SYSFS_KOBJ_ATTR | SYSFS_KOBJ_BIN_ATTR | SYSFS_KOBJ_LINK) #define SYSFS_COPY_NAME (SYSFS_DIR | SYSFS_KOBJ_LINK) +#define SYSFS_FLAG_MASK ~SYSFS_TYPE_MASK + #ifdef CONFIG_SYSFS extern int sysfs_schedule_callback(struct kobject *kobj, -- cgit v1.2.2 From 380e6fbb729a55b73d5d8409551474884e0d93fc Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 14 Jun 2007 04:27:22 +0900 Subject: sysfs: implement SYSFS_FLAG_REMOVED flag Implement SYSFS_FLAG_REMOVED flag which currently is used only to improve sanity check in sysfs_deactivate(). The flag will be used to make directory entries reclamiable. Signed-off-by: Tejun Heo Signed-off-by: Greg Kroah-Hartman --- include/linux/sysfs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 5813550902..2a6df6444e 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -84,6 +84,7 @@ struct sysfs_ops { #define SYSFS_COPY_NAME (SYSFS_DIR | SYSFS_KOBJ_LINK) #define SYSFS_FLAG_MASK ~SYSFS_TYPE_MASK +#define SYSFS_FLAG_REMOVED 0x0100 #ifdef CONFIG_SYSFS -- cgit v1.2.2 From 608e266a2d4e62c1b98c1c573064b6afe8c06a58 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 14 Jun 2007 04:27:22 +0900 Subject: sysfs: make kobj point to sysfs_dirent instead of dentry As kobj sysfs dentries and inodes are gonna be made reclaimable, dentry can't be used as naming token for sysfs file/directory, replace kobj->dentry with kobj->sd. The only external interface change is shadow directory handling. All other changes are contained in kobj and sysfs. Signed-off-by: Tejun Heo Signed-off-by: Greg Kroah-Hartman --- include/linux/kobject.h | 9 +++++---- include/linux/sysfs.h | 19 +++++++++++-------- 2 files changed, 16 insertions(+), 12 deletions(-) (limited to 'include') diff --git a/include/linux/kobject.h b/include/linux/kobject.h index c288e41ba3..06cbf41d32 100644 --- a/include/linux/kobject.h +++ b/include/linux/kobject.h @@ -55,7 +55,7 @@ struct kobject { struct kobject * parent; struct kset * kset; struct kobj_type * ktype; - struct dentry * dentry; + struct sysfs_dirent * sd; wait_queue_head_t poll; }; @@ -71,13 +71,14 @@ extern void kobject_init(struct kobject *); extern void kobject_cleanup(struct kobject *); extern int __must_check kobject_add(struct kobject *); -extern int __must_check kobject_shadow_add(struct kobject *, struct dentry *); +extern int __must_check kobject_shadow_add(struct kobject *kobj, + struct sysfs_dirent *shadow_parent); extern void kobject_del(struct kobject *); extern int __must_check kobject_rename(struct kobject *, const char *new_name); extern int __must_check kobject_shadow_rename(struct kobject *kobj, - struct dentry *new_parent, - const char *new_name); + struct sysfs_dirent *new_parent, + const char *new_name); extern int __must_check kobject_move(struct kobject *, struct kobject *); extern int __must_check kobject_register(struct kobject *); diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 2a6df6444e..4c43030fae 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -19,6 +19,7 @@ struct kobject; struct module; struct nameidata; struct dentry; +struct sysfs_dirent; /* FIXME * The *owner field is no longer used, but leave around @@ -92,13 +93,14 @@ extern int sysfs_schedule_callback(struct kobject *kobj, void (*func)(void *), void *data, struct module *owner); extern int __must_check -sysfs_create_dir(struct kobject *, struct dentry *); +sysfs_create_dir(struct kobject *kobj, struct sysfs_dirent *shadow_parent_sd); extern void sysfs_remove_dir(struct kobject *); extern int __must_check -sysfs_rename_dir(struct kobject *, struct dentry *, const char *new_name); +sysfs_rename_dir(struct kobject *kobj, struct sysfs_dirent *new_parent_sd, + const char *new_name); extern int __must_check sysfs_move_dir(struct kobject *, struct kobject *); @@ -138,8 +140,8 @@ void sysfs_notify(struct kobject * k, char *dir, char *attr); extern int sysfs_make_shadowed_dir(struct kobject *kobj, void * (*follow_link)(struct dentry *, struct nameidata *)); -extern struct dentry *sysfs_create_shadow_dir(struct kobject *kobj); -extern void sysfs_remove_shadow_dir(struct dentry *dir); +extern struct sysfs_dirent *sysfs_create_shadow_dir(struct kobject *kobj); +extern void sysfs_remove_shadow_dir(struct sysfs_dirent *shadow_sd); extern int __must_check sysfs_init(void); @@ -151,7 +153,8 @@ static inline int sysfs_schedule_callback(struct kobject *kobj, return -ENOSYS; } -static inline int sysfs_create_dir(struct kobject * k, struct dentry *shadow) +static inline int sysfs_create_dir(struct kobject *kobj, + struct sysfs_dirent *shadow_parent_sd) { return 0; } @@ -161,9 +164,9 @@ static inline void sysfs_remove_dir(struct kobject * k) ; } -static inline int sysfs_rename_dir(struct kobject * k, - struct dentry *new_parent, - const char *new_name) +static inline int sysfs_rename_dir(struct kobject *kobj, + struct sysfs_dirent *new_parent_sd, + const char *new_name) { return 0; } -- cgit v1.2.2 From 51225039f3cf9d250596d1344494b293274b9169 Mon Sep 17 00:00:00 2001 From: Tejun Heo Date: Thu, 14 Jun 2007 04:27:25 +0900 Subject: sysfs: make directory dentries and inodes reclaimable This patch makes dentries and inodes for sysfs directories reclaimable. * sysfs_notify() is modified to walk sysfs_dirent tree instead of dentry tree. * sysfs_update_file() and sysfs_chmod_file() use sysfs_get_dentry() to grab the victim dentry. * sysfs_rename_dir() and sysfs_move_dir() grab all dentries using sysfs_get_dentry() on startup. * Dentries for all shadowed directories are pinned in memory to serve as lookup start point. Signed-off-by: Tejun Heo Signed-off-by: Greg Kroah-Hartman --- include/linux/sysfs.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 4c43030fae..2f58ca1af7 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -81,7 +81,6 @@ struct sysfs_ops { #define SYSFS_KOBJ_ATTR 0x0004 #define SYSFS_KOBJ_BIN_ATTR 0x0008 #define SYSFS_KOBJ_LINK 0x0020 -#define SYSFS_NOT_PINNED (SYSFS_KOBJ_ATTR | SYSFS_KOBJ_BIN_ATTR | SYSFS_KOBJ_LINK) #define SYSFS_COPY_NAME (SYSFS_DIR | SYSFS_KOBJ_LINK) #define SYSFS_FLAG_MASK ~SYSFS_TYPE_MASK -- cgit v1.2.2 From 91a6902958f052358899f58683d44e36228d85c2 Mon Sep 17 00:00:00 2001 From: Zhang Rui Date: Sat, 9 Jun 2007 13:57:22 +0800 Subject: sysfs: add parameter "struct bin_attribute *" in .read/.write methods for sysfs binary attributes Well, first of all, I don't want to change so many files either. What I do: Adding a new parameter "struct bin_attribute *" in the .read/.write methods for the sysfs binary attributes. In fact, only the four lines change in fs/sysfs/bin.c and include/linux/sysfs.h do the real work. But I have to update all the files that use binary attributes to make them compatible with the new .read and .write methods. I'm not sure if I missed any. :( Why I do this: For a sysfs attribute, we can get a pointer pointing to the struct attribute in the .show/.store method, while we can't do this for the binary attributes. I don't know why this is different, but this does make it not so handy to use the binary attributes as the regular ones. So I think this patch is reasonable. :) Who benefits from it: The patch that exposes ACPI tables in sysfs requires such an improvement. All the table binary attributes share the same .read method. Parameter "struct bin_attribute *" is used to get the table signature and instance number which are used to distinguish different ACPI table binary attributes. Without this parameter, we need to offer different .read methods for different ACPI table binary attributes. This is impossible as there are various ACPI tables on different platforms, and we don't know what they are until they are loaded. Signed-off-by: Zhang Rui Signed-off-by: Greg Kroah-Hartman --- include/linux/sysfs.h | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/sysfs.h b/include/linux/sysfs.h index 2f58ca1af7..be8228e50a 100644 --- a/include/linux/sysfs.h +++ b/include/linux/sysfs.h @@ -64,8 +64,10 @@ struct bin_attribute { struct attribute attr; size_t size; void *private; - ssize_t (*read)(struct kobject *, char *, loff_t, size_t); - ssize_t (*write)(struct kobject *, char *, loff_t, size_t); + ssize_t (*read)(struct kobject *, struct bin_attribute *, + char *, loff_t, size_t); + ssize_t (*write)(struct kobject *, struct bin_attribute *, + char *, loff_t, size_t); int (*mmap)(struct kobject *, struct bin_attribute *attr, struct vm_area_struct *vma); }; -- cgit v1.2.2 From be15d65d97f924e11ad7b59b1dc23b9db8d02209 Mon Sep 17 00:00:00 2001 From: Kristoffer Ericson Date: Thu, 12 Jul 2007 10:44:41 +0900 Subject: sh: hd64461.h cleanup and added comments. Now that we dont have PIO mapping anymore we need to make sure we got the correct value in our headers. Some well needed comments have also been added. Signed-off-by: Kristoffer Ericson Signed-off-by: Paul Mundt --- include/asm-sh/hd64461.h | 397 ++++++++++++++++++++++++++--------------------- 1 file changed, 219 insertions(+), 178 deletions(-) (limited to 'include') diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h index c9050b2b55..4dd8592ca0 100644 --- a/include/asm-sh/hd64461.h +++ b/include/asm-sh/hd64461.h @@ -1,200 +1,241 @@ #ifndef __ASM_SH_HD64461 #define __ASM_SH_HD64461 /* - * $Id: hd64461.h,v 1.5 2004/03/16 00:07:51 lethal Exp $ + * Copyright (C) 2007 Kristoffer Ericson + * Copyright (C) 2004 Paul Mundt * Copyright (C) 2000 YAEGASHI Takeshi - * Hitachi HD64461 companion chip support + * + * Hitachi HD64461 companion chip support + * (please note manual reference 0x10000000 = 0xb0000000) */ /* Constants for PCMCIA mappings */ -#define HD64461_PCC_WINDOW 0x01000000 - -#define HD64461_PCC0_BASE 0xb8000000 /* area 6 */ -#define HD64461_PCC0_ATTR (HD64461_PCC0_BASE) -#define HD64461_PCC0_COMM (HD64461_PCC0_BASE+HD64461_PCC_WINDOW) -#define HD64461_PCC0_IO (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW) - -#define HD64461_PCC1_BASE 0xb4000000 /* area 5 */ -#define HD64461_PCC1_ATTR (HD64461_PCC1_BASE) -#define HD64461_PCC1_COMM (HD64461_PCC1_BASE+HD64461_PCC_WINDOW) - -#define HD64461_STBCR 0x10000 -#define HD64461_STBCR_CKIO_STBY 0x2000 -#define HD64461_STBCR_SAFECKE_IST 0x1000 -#define HD64461_STBCR_SLCKE_IST 0x0800 -#define HD64461_STBCR_SAFECKE_OST 0x0400 -#define HD64461_STBCR_SLCKE_OST 0x0200 -#define HD64461_STBCR_SMIAST 0x0100 -#define HD64461_STBCR_SLCDST 0x0080 -#define HD64461_STBCR_SPC0ST 0x0040 -#define HD64461_STBCR_SPC1ST 0x0020 -#define HD64461_STBCR_SAFEST 0x0010 -#define HD64461_STBCR_STM0ST 0x0008 -#define HD64461_STBCR_STM1ST 0x0004 -#define HD64461_STBCR_SIRST 0x0002 -#define HD64461_STBCR_SURTST 0x0001 - -#define HD64461_SYSCR 0x10002 -#define HD64461_SCPUCR 0x10004 - -#define HD64461_LCDCBAR 0x11000 -#define HD64461_LCDCLOR 0x11002 -#define HD64461_LCDCCR 0x11004 -#define HD64461_LCDCCR_STBACK 0x0400 -#define HD64461_LCDCCR_STREQ 0x0100 -#define HD64461_LCDCCR_MOFF 0x0080 -#define HD64461_LCDCCR_REFSEL 0x0040 -#define HD64461_LCDCCR_EPON 0x0020 -#define HD64461_LCDCCR_SPON 0x0010 - -#define HD64461_LDR1 0x11010 -#define HD64461_LDR1_DON 0x01 -#define HD64461_LDR1_DINV 0x80 - -#define HD64461_LDR2 0x11012 -#define HD64461_LDHNCR 0x11014 -#define HD64461_LDHNSR 0x11016 -#define HD64461_LDVNTR 0x11018 -#define HD64461_LDVNDR 0x1101a -#define HD64461_LDVSPR 0x1101c -#define HD64461_LDR3 0x1101e - -#define HD64461_CPTWAR 0x11030 -#define HD64461_CPTWDR 0x11032 -#define HD64461_CPTRAR 0x11034 -#define HD64461_CPTRDR 0x11036 - -#define HD64461_GRDOR 0x11040 -#define HD64461_GRSCR 0x11042 -#define HD64461_GRCFGR 0x11044 -#define HD64461_GRCFGR_ACCSTATUS 0x10 -#define HD64461_GRCFGR_ACCRESET 0x08 -#define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 -#define HD64461_GRCFGR_ACCSTART_LINE 0x04 -#define HD64461_GRCFGR_COLORDEPTH16 0x01 - -#define HD64461_LNSARH 0x11046 -#define HD64461_LNSARL 0x11048 -#define HD64461_LNAXLR 0x1104a -#define HD64461_LNDGR 0x1104c -#define HD64461_LNAXR 0x1104e -#define HD64461_LNERTR 0x11050 -#define HD64461_LNMDR 0x11052 -#define HD64461_BBTSSARH 0x11054 -#define HD64461_BBTSSARL 0x11056 -#define HD64461_BBTDSARH 0x11058 -#define HD64461_BBTDSARL 0x1105a -#define HD64461_BBTDWR 0x1105c -#define HD64461_BBTDHR 0x1105e -#define HD64461_BBTPARH 0x11060 -#define HD64461_BBTPARL 0x11062 -#define HD64461_BBTMARH 0x11064 -#define HD64461_BBTMARL 0x11066 -#define HD64461_BBTROPR 0x11068 -#define HD64461_BBTMDR 0x1106a +#define HD64461_PCC_WINDOW 0x01000000 + +/* Area 6 - Slot 0 - memory and/or IO card */ +#define HD64461_PCC0_BASE (CONFIG_HD64461_IOBASE + 0x8000000) +#define HD64461_PCC0_ATTR (HD64461_PCC0_BASE) /* 0xb80000000 */ +#define HD64461_PCC0_COMM (HD64461_PCC0_BASE+HD64461_PCC_WINDOW) /* 0xb90000000 */ +#define HD64461_PCC0_IO (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW) /* 0xba0000000 */ + +/* Area 5 - Slot 1 - memory card only */ +#define HD64461_PCC1_BASE (CONFIG_HD64461_IOBASE + 0x4000000) +#define HD64461_PCC1_ATTR (HD64461_PCC1_BASE) /* 0xb4000000 */ +#define HD64461_PCC1_COMM (HD64461_PCC1_BASE+HD64461_PCC_WINDOW) /* 0xb5000000 */ + +/* Standby Control Register for HD64461 */ +#define HD64461_STBCR CONFIG_HD64461_IOBASE +#define HD64461_STBCR_CKIO_STBY 0x2000 +#define HD64461_STBCR_SAFECKE_IST 0x1000 +#define HD64461_STBCR_SLCKE_IST 0x0800 +#define HD64461_STBCR_SAFECKE_OST 0x0400 +#define HD64461_STBCR_SLCKE_OST 0x0200 +#define HD64461_STBCR_SMIAST 0x0100 +#define HD64461_STBCR_SLCDST 0x0080 +#define HD64461_STBCR_SPC0ST 0x0040 +#define HD64461_STBCR_SPC1ST 0x0020 +#define HD64461_STBCR_SAFEST 0x0010 +#define HD64461_STBCR_STM0ST 0x0008 +#define HD64461_STBCR_STM1ST 0x0004 +#define HD64461_STBCR_SIRST 0x0002 +#define HD64461_STBCR_SURTST 0x0001 + +/* System Configuration Register */ +#define HD64461_SYSCR (CONFIG_HD64461_IOBASE + 0x02) + +/* CPU Data Bus Control Register */ +#define HD64461_SCPUCR (CONFIG_HD64461_IOBASE + 0x04) + +/* Base Adress Register */ +#define HD64461_LCDCBAR (CONFIG_HD64461_IOBASE + 0x1000) + +/* Line increment adress */ +#define HD64461_LCDCLOR (CONFIG_HD64461_IOBASE + 0x1002) + +/* Controls LCD controller */ +#define HD64461_LCDCCR (CONFIG_HD64461_IOBASE + 0x1004) + +/* LCCDR control bits */ +#define HD64461_LCDCCR_STBACK 0x0400 /* Standby Back */ +#define HD64461_LCDCCR_STREQ 0x0100 /* Standby Request */ +#define HD64461_LCDCCR_MOFF 0x0080 /* Memory Off */ +#define HD64461_LCDCCR_REFSEL 0x0040 /* Refresh Select */ +#define HD64461_LCDCCR_EPON 0x0020 /* End Power On */ +#define HD64461_LCDCCR_SPON 0x0010 /* Start Power On */ + +/* Controls LCD (1) */ +#define HD64461_LDR1 (CONFIG_HD64461_IOBASE + 0x1010) +#define HD64461_LDR1_DON 0x01 /* Display On */ +#define HD64461_LDR1_DINV 0x80 /* Display Invert */ + +/* Controls LCD (2) */ +#define HD64461_LDR2 (CONFIG_HD64461_IOBASE + 0x1012) +#define HD64461_LDHNCR (CONFIG_HD64461_IOBASE + 0x1014) /* Number of horizontal characters */ +#define HD64461_LDHNSR (CONFIG_HD64461_IOBASE + 0x1016) /* Specify output start position + width of CL1 */ +#define HD64461_LDVNTR (CONFIG_HD64461_IOBASE + 0x1018) /* Specify total vertical lines */ +#define HD64461_LDVNDR (CONFIG_HD64461_IOBASE + 0x101a) /* specify number of display vertical lines */ +#define HD64461_LDVSPR (CONFIG_HD64461_IOBASE + 0x101c) /* specify vertical synchronization pos and AC nr */ + +/* Controls LCD (3) */ +#define HD64461_LDR3 (CONFIG_HD64461_IOBASE + 0x101e) + +/* Palette Registers */ +#define HD64461_CPTWAR (CONFIG_HD64461_IOBASE + 0x1030) /* Color Palette Write Adress Register */ +#define HD64461_CPTWDR (CONFIG_HD64461_IOBASE + 0x1032) /* Color Palette Write Data Register */ +#define HD64461_CPTRAR (CONFIG_HD64461_IOBASE + 0x1034) /* Color Palette Read Adress Register */ +#define HD64461_CPTRDR (CONFIG_HD64461_IOBASE + 0x1036) /* Color Palette Read Data Register */ + +#define HD64461_GRDOR (CONFIG_HD64461_IOBASE + 0x1040) /* Display Resolution Offset Register */ +#define HD64461_GRSCR (CONFIG_HD64461_IOBASE + 0x1042) /* Solid Color Register */ +#define HD64461_GRCFGR (CONFIG_HD64461_IOBASE + 0x1044) /* Accelerator Configuration Register */ + +#define HD64461_GRCFGR_ACCSTATUS 0x10 /* Accelerator Status */ +#define HD64461_GRCFGR_ACCRESET 0x08 /* Accelerator Reset */ +#define HD64461_GRCFGR_ACCSTART_BITBLT 0x06 /* Accelerator Start BITBLT */ +#define HD64461_GRCFGR_ACCSTART_LINE 0x04 /* Accelerator Start Line Drawing */ +#define HD64461_GRCFGR_COLORDEPTH16 0x01 /* Sets Colordepth 16 for Accelerator */ +#define HD64461_GRCFGR_COLORDEPTH8 0x01 /* Sets Colordepth 8 for Accelerator */ + +/* Line Drawing Registers */ +#define HD64461_LNSARH (CONFIG_HD64461_IOBASE + 0x1046) /* Line Start Adress Register (H) */ +#define HD64461_LNSARL (CONFIG_HD64461_IOBASE + 0x1048) /* Line Start Adress Register (L) */ +#define HD64461_LNAXLR (CONFIG_HD64461_IOBASE + 0x104a) /* Axis Pixel Length Register */ +#define HD64461_LNDGR (CONFIG_HD64461_IOBASE + 0x104c) /* Diagonal Register */ +#define HD64461_LNAXR (CONFIG_HD64461_IOBASE + 0x104e) /* Axial Register */ +#define HD64461_LNERTR (CONFIG_HD64461_IOBASE + 0x1050) /* Start Error Term Register */ +#define HD64461_LNMDR (CONFIG_HD64461_IOBASE + 0x1052) /* Line Mode Register */ + +/* BitBLT Registers */ +#define HD64461_BBTSSARH (CONFIG_HD64461_IOBASE + 0x1054) /* Source Start Adress Register (H) */ +#define HD64461_BBTSSARL (CONFIG_HD64461_IOBASE + 0x1056) /* Source Start Adress Register (L) */ +#define HD64461_BBTDSARH (CONFIG_HD64461_IOBASE + 0x1058) /* Destination Start Adress Register (H) */ +#define HD64461_BBTDSARL (CONFIG_HD64461_IOBASE + 0x105a) /* Destination Start Adress Register (L) */ +#define HD64461_BBTDWR (CONFIG_HD64461_IOBASE + 0x105c) /* Destination Block Width Register */ +#define HD64461_BBTDHR (CONFIG_HD64461_IOBASE + 0x105e) /* Destination Block Height Register */ +#define HD64461_BBTPARH (CONFIG_HD64461_IOBASE + 0x1060) /* Pattern Start Adress Register (H) */ +#define HD64461_BBTPARL (CONFIG_HD64461_IOBASE + 0x1062) /* Pattern Start Adress Register (L) */ +#define HD64461_BBTMARH (CONFIG_HD64461_IOBASE + 0x1064) /* Mask Start Adress Register (H) */ +#define HD64461_BBTMARL (CONFIG_HD64461_IOBASE + 0x1066) /* Mask Start Adress Register (L) */ +#define HD64461_BBTROPR (CONFIG_HD64461_IOBASE + 0x1068) /* ROP Register */ +#define HD64461_BBTMDR (CONFIG_HD64461_IOBASE + 0x106a) /* BitBLT Mode Register */ /* PC Card Controller Registers */ -#define HD64461_PCC0ISR 0x12000 /* socket 0 interface status */ -#define HD64461_PCC0GCR 0x12002 /* socket 0 general control */ -#define HD64461_PCC0CSCR 0x12004 /* socket 0 card status change */ -#define HD64461_PCC0CSCIER 0x12006 /* socket 0 card status change interrupt enable */ -#define HD64461_PCC0SCR 0x12008 /* socket 0 software control */ -#define HD64461_PCC1ISR 0x12010 /* socket 1 interface status */ -#define HD64461_PCC1GCR 0x12012 /* socket 1 general control */ -#define HD64461_PCC1CSCR 0x12014 /* socket 1 card status change */ -#define HD64461_PCC1CSCIER 0x12016 /* socket 1 card status change interrupt enable */ -#define HD64461_PCC1SCR 0x12018 /* socket 1 software control */ +/* Maps to Physical Area 6 */ +#define HD64461_PCC0ISR (CONFIG_HD64461_IOBASE + 0x2000) /* socket 0 interface status */ +#define HD64461_PCC0GCR (CONFIG_HD64461_IOBASE + 0x2002) /* socket 0 general control */ +#define HD64461_PCC0CSCR (CONFIG_HD64461_IOBASE + 0x2004) /* socket 0 card status change */ +#define HD64461_PCC0CSCIER (CONFIG_HD64461_IOBASE + 0x2006) /* socket 0 card status change interrupt enable */ +#define HD64461_PCC0SCR (CONFIG_HD64461_IOBASE + 0x2008) /* socket 0 software control */ +/* Maps to Physical Area 5 */ +#define HD64461_PCC1ISR (CONFIG_HD64461_IOBASE + 0x2010) /* socket 1 interface status */ +#define HD64461_PCC1GCR (CONFIG_HD64461_IOBASE + 0x2012) /* socket 1 general control */ +#define HD64461_PCC1CSCR (CONFIG_HD64461_IOBASE + 0x2014) /* socket 1 card status change */ +#define HD64461_PCC1CSCIER (CONFIG_HD64461_IOBASE + 0x2016) /* socket 1 card status change interrupt enable */ +#define HD64461_PCC1SCR (CONFIG_HD64461_IOBASE + 0x2018) /* socket 1 software control */ /* PCC Interface Status Register */ -#define HD64461_PCCISR_READY 0x80 /* card ready */ -#define HD64461_PCCISR_MWP 0x40 /* card write-protected */ -#define HD64461_PCCISR_VS2 0x20 /* voltage select pin 2 */ -#define HD64461_PCCISR_VS1 0x10 /* voltage select pin 1 */ -#define HD64461_PCCISR_CD2 0x08 /* card detect 2 */ -#define HD64461_PCCISR_CD1 0x04 /* card detect 1 */ -#define HD64461_PCCISR_BVD2 0x02 /* battery 1 */ -#define HD64461_PCCISR_BVD1 0x01 /* battery 1 */ - -#define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */ -#define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */ -#define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */ -#define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */ -#define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */ -#define HD64461_PCCISR_BVD_BATDEAD2 0x00 /* battery dead */ +#define HD64461_PCCISR_READY 0x80 /* card ready */ +#define HD64461_PCCISR_MWP 0x40 /* card write-protected */ +#define HD64461_PCCISR_VS2 0x20 /* voltage select pin 2 */ +#define HD64461_PCCISR_VS1 0x10 /* voltage select pin 1 */ +#define HD64461_PCCISR_CD2 0x08 /* card detect 2 */ +#define HD64461_PCCISR_CD1 0x04 /* card detect 1 */ +#define HD64461_PCCISR_BVD2 0x02 /* battery 1 */ +#define HD64461_PCCISR_BVD1 0x01 /* battery 1 */ + +#define HD64461_PCCISR_PCD_MASK 0x0c /* card detect */ +#define HD64461_PCCISR_BVD_MASK 0x03 /* battery voltage */ +#define HD64461_PCCISR_BVD_BATGOOD 0x03 /* battery good */ +#define HD64461_PCCISR_BVD_BATWARN 0x01 /* battery low warning */ +#define HD64461_PCCISR_BVD_BATDEAD1 0x02 /* battery dead */ +#define HD64461_PCCISR_BVD_BATDEAD2 0x00 /* battery dead */ /* PCC General Control Register */ -#define HD64461_PCCGCR_DRVE 0x80 /* output drive */ -#define HD64461_PCCGCR_PCCR 0x40 /* PC card reset */ -#define HD64461_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ -#define HD64461_PCCGCR_VCC0 0x10 /* voltage control pin VCC0SEL0 */ -#define HD64461_PCCGCR_PMMOD 0x08 /* memory mode */ -#define HD64461_PCCGCR_PA25 0x04 /* pin A25 */ -#define HD64461_PCCGCR_PA24 0x02 /* pin A24 */ -#define HD64461_PCCGCR_REG 0x01 /* pin PCC0REG# */ +#define HD64461_PCCGCR_DRVE 0x80 /* output drive */ +#define HD64461_PCCGCR_PCCR 0x40 /* PC card reset */ +#define HD64461_PCCGCR_PCCT 0x20 /* PC card type, 1=IO&mem, 0=mem */ +#define HD64461_PCCGCR_VCC0 0x10 /* voltage control pin VCC0SEL0 */ +#define HD64461_PCCGCR_PMMOD 0x08 /* memory mode */ +#define HD64461_PCCGCR_PA25 0x04 /* pin A25 */ +#define HD64461_PCCGCR_PA24 0x02 /* pin A24 */ +#define HD64461_PCCGCR_REG 0x01 /* pin PCC0REG# */ /* PCC Card Status Change Register */ -#define HD64461_PCCCSCR_SCDI 0x80 /* sw card detect intr */ -#define HD64461_PCCCSCR_SRV1 0x40 /* reserved */ -#define HD64461_PCCCSCR_IREQ 0x20 /* IREQ intr req */ -#define HD64461_PCCCSCR_SC 0x10 /* STSCHG (status change) pin */ -#define HD64461_PCCCSCR_CDC 0x08 /* CD (card detect) change */ -#define HD64461_PCCCSCR_RC 0x04 /* READY change */ -#define HD64461_PCCCSCR_BW 0x02 /* battery warning change */ -#define HD64461_PCCCSCR_BD 0x01 /* battery dead change */ +#define HD64461_PCCCSCR_SCDI 0x80 /* sw card detect intr */ +#define HD64461_PCCCSCR_SRV1 0x40 /* reserved */ +#define HD64461_PCCCSCR_IREQ 0x20 /* IREQ intr req */ +#define HD64461_PCCCSCR_SC 0x10 /* STSCHG (status change) pin */ +#define HD64461_PCCCSCR_CDC 0x08 /* CD (card detect) change */ +#define HD64461_PCCCSCR_RC 0x04 /* READY change */ +#define HD64461_PCCCSCR_BW 0x02 /* battery warning change */ +#define HD64461_PCCCSCR_BD 0x01 /* battery dead change */ /* PCC Card Status Change Interrupt Enable Register */ -#define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */ -#define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */ -#define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */ -#define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */ -#define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */ -#define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */ - -#define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */ -#define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */ -#define HD64461_PCCCSCIER_RE 0x04 /* ready change enable */ -#define HD64461_PCCCSCIER_BWE 0x02 /* battery warn change enable */ -#define HD64461_PCCCSCIER_BDE 0x01 /* battery dead change enable*/ +#define HD64461_PCCCSCIER_CRE 0x80 /* change reset enable */ +#define HD64461_PCCCSCIER_IREQE_MASK 0x60 /* IREQ enable */ +#define HD64461_PCCCSCIER_IREQE_DISABLED 0x00 /* IREQ disabled */ +#define HD64461_PCCCSCIER_IREQE_LEVEL 0x20 /* IREQ level-triggered */ +#define HD64461_PCCCSCIER_IREQE_FALLING 0x40 /* IREQ falling-edge-trig */ +#define HD64461_PCCCSCIER_IREQE_RISING 0x60 /* IREQ rising-edge-trig */ + +#define HD64461_PCCCSCIER_SCE 0x10 /* status change enable */ +#define HD64461_PCCCSCIER_CDE 0x08 /* card detect change enable */ +#define HD64461_PCCCSCIER_RE 0x04 /* ready change enable */ +#define HD64461_PCCCSCIER_BWE 0x02 /* battery warn change enable */ +#define HD64461_PCCCSCIER_BDE 0x01 /* battery dead change enable*/ /* PCC Software Control Register */ -#define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */ -#define HD64461_PCCSCR_SWP 0x01 /* write protect */ - -#define HD64461_P0OCR 0x1202a -#define HD64461_P1OCR 0x1202c -#define HD64461_PGCR 0x1202e - -#define HD64461_GPACR 0x14000 -#define HD64461_GPBCR 0x14002 -#define HD64461_GPCCR 0x14004 -#define HD64461_GPDCR 0x14006 -#define HD64461_GPADR 0x14010 -#define HD64461_GPBDR 0x14012 -#define HD64461_GPCDR 0x14014 -#define HD64461_GPDDR 0x14016 -#define HD64461_GPAICR 0x14020 -#define HD64461_GPBICR 0x14022 -#define HD64461_GPCICR 0x14024 -#define HD64461_GPDICR 0x14026 -#define HD64461_GPAISR 0x14040 -#define HD64461_GPBISR 0x14042 -#define HD64461_GPCISR 0x14044 -#define HD64461_GPDISR 0x14046 - -#define HD64461_NIRR 0x15000 -#define HD64461_NIMR 0x15002 - -#define HD64461_IRQBASE 64 -#define HD64461_IRQ_NUM 16 - -#define HD64461_IRQ_UART (HD64461_IRQBASE+5) -#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6) -#define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9) -#define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10) -#define HD64461_IRQ_GPIO (HD64461_IRQBASE+11) -#define HD64461_IRQ_AFE (HD64461_IRQBASE+12) -#define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13) -#define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14) +#define HD64461_PCCSCR_VCC1 0x02 /* voltage control pin 1 */ +#define HD64461_PCCSCR_SWP 0x01 /* write protect */ + +/* PCC0 Output Pins Control Register */ +#define HD64461_P0OCR (CONFIG_HD64461_IOBASE + 0x202a) + +/* PCC1 Output Pins Control Register */ +#define HD64461_P1OCR (CONFIG_HD64461_IOBASE + 0x202c) + +/* PC Card General Control Register */ +#define HD64461_PGCR (CONFIG_HD64461_IOBASE + 0x202e) + +/* Port Control Registers */ +#define HD64461_GPACR (CONFIG_HD64461_IOBASE + 0x4000) /* Port A - Handles IRDA/TIMER */ +#define HD64461_GPBCR (CONFIG_HD64461_IOBASE + 0x4002) /* Port B - Handles UART */ +#define HD64461_GPCCR (CONFIG_HD64461_IOBASE + 0x4004) /* Port C - Handles PCMCIA 1 */ +#define HD64461_GPDCR (CONFIG_HD64461_IOBASE + 0x4006) /* Port D - Handles PCMCIA 1 */ + +/* Port Control Data Registers */ +#define HD64461_GPADR (CONFIG_HD64461_IOBASE + 0x4010) /* A */ +#define HD64461_GPBDR (CONFIG_HD64461_IOBASE + 0x4012) /* B */ +#define HD64461_GPCDR (CONFIG_HD64461_IOBASE + 0x4014) /* C */ +#define HD64461_GPDDR (CONFIG_HD64461_IOBASE + 0x4016) /* D */ + +/* Interrupt Control Registers */ +#define HD64461_GPAICR (CONFIG_HD64461_IOBASE + 0x4020) /* A */ +#define HD64461_GPBICR (CONFIG_HD64461_IOBASE + 0x4022) /* B */ +#define HD64461_GPCICR (CONFIG_HD64461_IOBASE + 0x4024) /* C */ +#define HD64461_GPDICR (CONFIG_HD64461_IOBASE + 0x4026) /* D */ + +/* Interrupt Status Registers */ +#define HD64461_GPAISR (CONFIG_HD64461_IOBASE + 0x4040) /* A */ +#define HD64461_GPBISR (CONFIG_HD64461_IOBASE + 0x4042) /* B */ +#define HD64461_GPCISR (CONFIG_HD64461_IOBASE + 0x4044) /* C */ +#define HD64461_GPDISR (CONFIG_HD64461_IOBASE + 0x4046) /* D */ + +/* Interrupt Request Register & Interrupt Mask Register */ +#define HD64461_NIRR (CONFIG_HD64461_IOBASE + 0x5000) +#define HD64461_NIMR (CONFIG_HD64461_IOBASE + 0x5002) + +#define HD64461_IRQBASE OFFCHIP_IRQ_BASE +#define HD64461_IRQ_NUM 16 + +#define HD64461_IRQ_UART (HD64461_IRQBASE+5) +#define HD64461_IRQ_IRDA (HD64461_IRQBASE+6) +#define HD64461_IRQ_TMU1 (HD64461_IRQBASE+9) +#define HD64461_IRQ_TMU0 (HD64461_IRQBASE+10) +#define HD64461_IRQ_GPIO (HD64461_IRQBASE+11) +#define HD64461_IRQ_AFE (HD64461_IRQBASE+12) +#define HD64461_IRQ_PCC1 (HD64461_IRQBASE+13) +#define HD64461_IRQ_PCC0 (HD64461_IRQBASE+14) #define __IO_PREFIX hd64461 #include -- cgit v1.2.2 From 29578624e354f56143d92510fff33a8b2aaa2c03 Mon Sep 17 00:00:00 2001 From: Olaf Kirch Date: Wed, 11 Jul 2007 19:32:02 -0700 Subject: [NET]: Fix races in net_rx_action vs netpoll. Keep netpoll/poll_napi from messing with the poll_list. Only net_rx_action is allowed to manipulate the list. Signed-off-by: Olaf Kirch Signed-off-by: David S. Miller --- include/linux/netdevice.h | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'include') diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h index 8590d685d9..79cc3dab4b 100644 --- a/include/linux/netdevice.h +++ b/include/linux/netdevice.h @@ -261,6 +261,8 @@ enum netdev_state_t __LINK_STATE_LINKWATCH_PENDING, __LINK_STATE_DORMANT, __LINK_STATE_QDISC_RUNNING, + /* Set by the netpoll NAPI code */ + __LINK_STATE_POLL_LIST_FROZEN, }; @@ -1014,6 +1016,14 @@ static inline void netif_rx_complete(struct net_device *dev) { unsigned long flags; +#ifdef CONFIG_NETPOLL + /* Prevent race with netpoll - yes, this is a kludge. + * But at least it doesn't penalize the non-netpoll + * code path. */ + if (test_bit(__LINK_STATE_POLL_LIST_FROZEN, &dev->state)) + return; +#endif + local_irq_save(flags); __netif_rx_complete(dev); local_irq_restore(flags); -- cgit v1.2.2 From 8c979c26a0f093c13290320edda799d8335e50ae Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 11 Jul 2007 19:45:24 -0700 Subject: [VLAN]: Fix MAC address handling The VLAN MAC address handling is broken in multiple ways. When the address differs when setting it, the real device is put in promiscous mode twice, but never taken out again. Additionally it doesn't resync when the real device's address is changed and needlessly puts it in promiscous mode when the vlan device is still down. Fix by moving address handling to vlan_dev_open/vlan_dev_stop and properly deal with address changes in the device notifier. Also switch to dev_unicast_add (which needs the exact same handling). Since the set_mac_address handler is identical to the generic ethernet one with these changes, kill it and use ether_setup(). Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/if_vlan.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h index c7912876a2..61a57dc2ac 100644 --- a/include/linux/if_vlan.h +++ b/include/linux/if_vlan.h @@ -135,6 +135,7 @@ struct vlan_dev_info { int old_allmulti; /* similar to above. */ int old_promiscuity; /* similar to above. */ struct net_device *real_dev; /* the underlying device/interface */ + unsigned char real_dev_addr[ETH_ALEN]; struct proc_dir_entry *dent; /* Holds the proc data */ unsigned long cnt_inc_headroom_on_tx; /* How many times did we have to grow the skb on TX. */ unsigned long cnt_encap_on_xmit; /* How many times did we have to encapsulate the skb on TX. */ -- cgit v1.2.2 From db3d99c090e0cdb34b1274767e062bfddbb384bc Mon Sep 17 00:00:00 2001 From: Patrick McHardy Date: Wed, 11 Jul 2007 19:46:26 -0700 Subject: [NET_SCHED]: ematch: module autoloading Signed-off-by: Patrick McHardy Signed-off-by: David S. Miller --- include/linux/pkt_cls.h | 17 +++++++---------- include/net/pkt_cls.h | 2 ++ 2 files changed, 9 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/linux/pkt_cls.h b/include/linux/pkt_cls.h index c3f01b3085..30b8571e6b 100644 --- a/include/linux/pkt_cls.h +++ b/include/linux/pkt_cls.h @@ -403,16 +403,13 @@ enum * 1..32767 Reserved for ematches inside kernel tree * 32768..65535 Free to use, not reliable */ -enum -{ - TCF_EM_CONTAINER, - TCF_EM_CMP, - TCF_EM_NBYTE, - TCF_EM_U32, - TCF_EM_META, - TCF_EM_TEXT, - __TCF_EM_MAX -}; +#define TCF_EM_CONTAINER 0 +#define TCF_EM_CMP 1 +#define TCF_EM_NBYTE 2 +#define TCF_EM_U32 3 +#define TCF_EM_META 4 +#define TCF_EM_TEXT 5 +#define TCF_EM_MAX 5 enum { diff --git a/include/net/pkt_cls.h b/include/net/pkt_cls.h index 4129df7080..6c29920cbe 100644 --- a/include/net/pkt_cls.h +++ b/include/net/pkt_cls.h @@ -306,6 +306,8 @@ static inline int tcf_em_tree_match(struct sk_buff *skb, return 1; } +#define MODULE_ALIAS_TCF_EMATCH(kind) MODULE_ALIAS("ematch-kind-" __stringify(kind)) + #else /* CONFIG_NET_EMATCH */ struct tcf_ematch_tree -- cgit v1.2.2 From ed0321895182ffb6ecf210e066d87911b270d587 Mon Sep 17 00:00:00 2001 From: Eric Paris Date: Thu, 28 Jun 2007 15:55:21 -0400 Subject: security: Protection for exploiting null dereference using mmap Add a new security check on mmap operations to see if the user is attempting to mmap to low area of the address space. The amount of space protected is indicated by the new proc tunable /proc/sys/vm/mmap_min_addr and defaults to 0, preserving existing behavior. This patch uses a new SELinux security class "memprotect." Policy already contains a number of allow rules like a_t self:process * (unconfined_t being one of them) which mean that putting this check in the process class (its best current fit) would make it useless as all user processes, which we also want to protect against, would be allowed. By taking the memprotect name of the new class it will also make it possible for us to move some of the other memory protect permissions out of 'process' and into the new class next time we bump the policy version number (which I also think is a good future idea) Acked-by: Stephen Smalley Acked-by: Chris Wright Signed-off-by: Eric Paris Signed-off-by: James Morris --- include/linux/security.h | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/security.h b/include/linux/security.h index 9eb9e0fe03..c11dc8aa03 100644 --- a/include/linux/security.h +++ b/include/linux/security.h @@ -71,6 +71,7 @@ struct xfrm_user_sec_ctx; extern int cap_netlink_send(struct sock *sk, struct sk_buff *skb); extern int cap_netlink_recv(struct sk_buff *skb, int cap); +extern unsigned long mmap_min_addr; /* * Values used in the task_security_ops calls */ @@ -1241,8 +1242,9 @@ struct security_operations { int (*file_ioctl) (struct file * file, unsigned int cmd, unsigned long arg); int (*file_mmap) (struct file * file, - unsigned long reqprot, - unsigned long prot, unsigned long flags); + unsigned long reqprot, unsigned long prot, + unsigned long flags, unsigned long addr, + unsigned long addr_only); int (*file_mprotect) (struct vm_area_struct * vma, unsigned long reqprot, unsigned long prot); @@ -1814,9 +1816,12 @@ static inline int security_file_ioctl (struct file *file, unsigned int cmd, static inline int security_file_mmap (struct file *file, unsigned long reqprot, unsigned long prot, - unsigned long flags) + unsigned long flags, + unsigned long addr, + unsigned long addr_only) { - return security_ops->file_mmap (file, reqprot, prot, flags); + return security_ops->file_mmap (file, reqprot, prot, flags, addr, + addr_only); } static inline int security_file_mprotect (struct vm_area_struct *vma, @@ -2489,7 +2494,9 @@ static inline int security_file_ioctl (struct file *file, unsigned int cmd, static inline int security_file_mmap (struct file *file, unsigned long reqprot, unsigned long prot, - unsigned long flags) + unsigned long flags, + unsigned long addr, + unsigned long addr_only) { return 0; } -- cgit v1.2.2 From c9e27ece79f6170fd1cd1a40c5de5d93456606e7 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Thu, 12 Jul 2007 11:48:14 +0800 Subject: Blackfin arch: Fix Warning add some defines in BF54x header file Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf548/defBF54x_base.h | 85 ++++++++++++++----------- 1 file changed, 47 insertions(+), 38 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf548/defBF54x_base.h b/include/asm-blackfin/mach-bf548/defBF54x_base.h index 2381ac50a2..895ddd40a8 100644 --- a/include/asm-blackfin/mach-bf548/defBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/defBF54x_base.h @@ -3050,6 +3050,15 @@ #define FIFO_RWM 0x18000000 /* FIFO Regular Watermarks */ #define FIFO_UWM 0x60000000 /* FIFO Urgent Watermarks */ +#define DLEN_8 (0 << 15) /* 000 - 8 bits */ +#define DLEN_10 (1 << 15) /* 001 - 10 bits */ +#define DLEN_12 (2 << 15) /* 010 - 12 bits */ +#define DLEN_14 (3 << 15) /* 011 - 14 bits */ +#define DLEN_16 (4 << 15) /* 100 - 16 bits */ +#define DLEN_18 (5 << 15) /* 101 - 18 bits */ +#define DLEN_24 (6 << 15) /* 110 - 24 bits */ + + /* Bit masks for EPPIx_FS2W_LVB */ #define F1VB_BD 0xff /* Vertical Blanking before Field 1 Active Data */ @@ -3365,32 +3374,32 @@ /* BCODE bit field options (SYSCFG register) */ #define BCODE_WAKEUP 0x0000 /* boot according to wake-up condition */ -#define BCODE_FULLBOOT 0x0010 /* always perform full boot */ +#define BCODE_FULLBOOT 0x0010 /* always perform full boot */ #define BCODE_QUICKBOOT 0x0020 /* always perform quick boot */ #define BCODE_NOBOOT 0x0030 /* always perform full boot */ /* CNT_COMMAND bit field options */ - + #define W1LCNT_ZERO 0x0001 /* write 1 to load CNT_COUNTER with zero */ #define W1LCNT_MIN 0x0004 /* write 1 to load CNT_COUNTER from CNT_MIN */ #define W1LCNT_MAX 0x0008 /* write 1 to load CNT_COUNTER from CNT_MAX */ - + #define W1LMIN_ZERO 0x0010 /* write 1 to load CNT_MIN with zero */ #define W1LMIN_CNT 0x0020 /* write 1 to load CNT_MIN from CNT_COUNTER */ #define W1LMIN_MAX 0x0080 /* write 1 to load CNT_MIN from CNT_MAX */ - + #define W1LMAX_ZERO 0x0100 /* write 1 to load CNT_MAX with zero */ #define W1LMAX_CNT 0x0200 /* write 1 to load CNT_MAX from CNT_COUNTER */ #define W1LMAX_MIN 0x0400 /* write 1 to load CNT_MAX from CNT_MIN */ - + /* CNT_CONFIG bit field options */ - + #define CNTMODE_QUADENC 0x0000 /* quadrature encoder mode */ #define CNTMODE_BINENC 0x0100 /* binary encoder mode */ #define CNTMODE_UDCNT 0x0200 /* up/down counter mode */ #define CNTMODE_DIRCNT 0x0400 /* direction counter mode */ #define CNTMODE_DIRTMR 0x0500 /* direction timer mode */ - + #define BNDMODE_COMP 0x0000 /* boundary compare mode */ #define BNDMODE_ZERO 0x1000 /* boundary compare and zero mode */ #define BNDMODE_CAPT 0x2000 /* boundary capture mode */ @@ -3403,7 +3412,7 @@ #define EXT_CLK 0x0003 /* UARTx_LCR bit field options */ - + #define WLS_5 0x0000 /* 5 data bits */ #define WLS_6 0x0001 /* 6 data bits */ #define WLS_7 0x0002 /* 7 data bits */ @@ -3451,7 +3460,7 @@ #define PIQ30 0x40000000 #define PIQ31 0x80000000 -/* PORT A Bit Definitions for the registers +/* PORT A Bit Definitions for the registers PORTA, PORTA_SET, PORTA_CLEAR, PORTA_DIR_SET, PORTA_DIR_CLEAR, PORTA_INEN, PORTA_FER registers @@ -3474,7 +3483,7 @@ PORTA_FER registers #define PA14 0x4000 #define PA15 0x8000 -/* PORT B Bit Definitions for the registers +/* PORT B Bit Definitions for the registers PORTB, PORTB_SET, PORTB_CLEAR, PORTB_DIR_SET, PORTB_DIR_CLEAR, PORTB_INEN, PORTB_FER registers @@ -3497,7 +3506,7 @@ PORTB_FER registers #define PB14 0x4000 -/* PORT C Bit Definitions for the registers +/* PORT C Bit Definitions for the registers PORTC, PORTC_SET, PORTC_CLEAR, PORTC_DIR_SET, PORTC_DIR_CLEAR, PORTC_INEN, PORTC_FER registers @@ -3520,7 +3529,7 @@ PORTC_FER registers #define PC13 0x2000 -/* PORT D Bit Definitions for the registers +/* PORT D Bit Definitions for the registers PORTD, PORTD_SET, PORTD_CLEAR, PORTD_DIR_SET, PORTD_DIR_CLEAR, PORTD_INEN, PORTD_FER registers @@ -3543,7 +3552,7 @@ PORTD_FER registers #define PD14 0x4000 #define PD15 0x8000 -/* PORT E Bit Definitions for the registers +/* PORT E Bit Definitions for the registers PORTE, PORTE_SET, PORTE_CLEAR, PORTE_DIR_SET, PORTE_DIR_CLEAR, PORTE_INEN, PORTE_FER registers @@ -3567,7 +3576,7 @@ PORTE_FER registers #define PE14 0x4000 #define PE15 0x8000 -/* PORT F Bit Definitions for the registers +/* PORT F Bit Definitions for the registers PORTF, PORTF_SET, PORTF_CLEAR, PORTF_DIR_SET, PORTF_DIR_CLEAR, PORTF_INEN, PORTF_FER registers @@ -3591,7 +3600,7 @@ PORTF_FER registers #define PF14 0x4000 #define PF15 0x8000 -/* PORT G Bit Definitions for the registers +/* PORT G Bit Definitions for the registers PORTG, PORTG_SET, PORTG_CLEAR, PORTG_DIR_SET, PORTG_DIR_CLEAR, PORTG_INEN, PORTG_FER registers @@ -3615,7 +3624,7 @@ PORTG_FER registers #define PG14 0x4000 #define PG15 0x8000 -/* PORT H Bit Definitions for the registers +/* PORT H Bit Definitions for the registers PORTH, PORTH_SET, PORTH_CLEAR, PORTH_DIR_SET, PORTH_DIR_CLEAR, PORTH_INEN, PORTH_FER registers @@ -3638,7 +3647,7 @@ PORTH_FER registers #define PH13 0x2000 -/* PORT I Bit Definitions for the registers +/* PORT I Bit Definitions for the registers PORTI, PORTI_SET, PORTI_CLEAR, PORTI_DIR_SET, PORTI_DIR_CLEAR, PORTI_INEN, PORTI_FER registers @@ -3662,7 +3671,7 @@ PORTI_FER registers #define PI14 0x4000 #define PI15 0x8000 -/* PORT J Bit Definitions for the registers +/* PORT J Bit Definitions for the registers PORTJ, PORTJ_SET, PORTJ_CLEAR, PORTJ_DIR_SET, PORTJ_DIR_CLEAR, PORTJ_INEN, PORTJ_FER registers @@ -3683,7 +3692,7 @@ PORTJ_FER registers #define PJ11 0x0800 #define PJ12 0x1000 #define PJ13 0x2000 - + /* Port Muxing Bit Fields for PORTx_MUX Registers */ @@ -3827,7 +3836,7 @@ PORTJ_FER registers #define B0MAP_PIL 0x00000006 /* Map Port I Low to Byte 0 */ #define B0MAP_PJL 0x00000007 /* Map Port J Low to Byte 0 */ -#define B1MAP_PCH 0x00000000 /* Map Port C High to Byte 1 */ +#define B1MAP_PCH 0x00000000 /* Map Port C High to Byte 1 */ #define B1MAP_PDH 0x00000100 /* Map Port D High to Byte 1 */ #define B1MAP_PEH 0x00000200 /* Map Port E High to Byte 1 */ #define B1MAP_PFH 0x00000300 /* Map Port F High to Byte 1 */ @@ -3836,27 +3845,27 @@ PORTJ_FER registers #define B1MAP_PIH 0x00000600 /* Map Port I High to Byte 1 */ #define B1MAP_PJH 0x00000700 /* Map Port J High to Byte 1 */ -#define B2MAP_PCL 0x00000000 /* Map Port C Low to Byte 2 */ -#define B2MAP_PDL 0x00010000 /* Map Port D Low to Byte 2 */ -#define B2MAP_PEL 0x00020000 /* Map Port E Low to Byte 2 */ -#define B2MAP_PFL 0x00030000 /* Map Port F Low to Byte 2 */ -#define B2MAP_PGL 0x00040000 /* Map Port G Low to Byte 2 */ -#define B2MAP_PHL 0x00050000 /* Map Port H Low to Byte 2 */ -#define B2MAP_PIL 0x00060000 /* Map Port I Low to Byte 2 */ -#define B2MAP_PJL 0x00070000 /* Map Port J Low to Byte 2 */ - -#define B3MAP_PCH 0x00000000 /* Map Port C High to Byte 3 */ -#define B3MAP_PDH 0x01000000 /* Map Port D High to Byte 3 */ -#define B3MAP_PEH 0x02000000 /* Map Port E High to Byte 3 */ -#define B3MAP_PFH 0x03000000 /* Map Port F High to Byte 3 */ -#define B3MAP_PGH 0x04000000 /* Map Port G High to Byte 3 */ -#define B3MAP_PHH 0x05000000 /* Map Port H High to Byte 3 */ -#define B3MAP_PIH 0x06000000 /* Map Port I High to Byte 3 */ -#define B3MAP_PJH 0x07000000 /* Map Port J High to Byte 3 */ +#define B2MAP_PCL 0x00000000 /* Map Port C Low to Byte 2 */ +#define B2MAP_PDL 0x00010000 /* Map Port D Low to Byte 2 */ +#define B2MAP_PEL 0x00020000 /* Map Port E Low to Byte 2 */ +#define B2MAP_PFL 0x00030000 /* Map Port F Low to Byte 2 */ +#define B2MAP_PGL 0x00040000 /* Map Port G Low to Byte 2 */ +#define B2MAP_PHL 0x00050000 /* Map Port H Low to Byte 2 */ +#define B2MAP_PIL 0x00060000 /* Map Port I Low to Byte 2 */ +#define B2MAP_PJL 0x00070000 /* Map Port J Low to Byte 2 */ + +#define B3MAP_PCH 0x00000000 /* Map Port C High to Byte 3 */ +#define B3MAP_PDH 0x01000000 /* Map Port D High to Byte 3 */ +#define B3MAP_PEH 0x02000000 /* Map Port E High to Byte 3 */ +#define B3MAP_PFH 0x03000000 /* Map Port F High to Byte 3 */ +#define B3MAP_PGH 0x04000000 /* Map Port G High to Byte 3 */ +#define B3MAP_PHH 0x05000000 /* Map Port H High to Byte 3 */ +#define B3MAP_PIH 0x06000000 /* Map Port I High to Byte 3 */ +#define B3MAP_PJH 0x07000000 /* Map Port J High to Byte 3 */ /* for legacy compatibility */ - + #define WLS(x) (((x)-5) & 0x03) /* Word Length Select */ #define W1LMAX_MAX W1LMAX_MIN #define EBIU_AMCBCTL0 EBIU_AMBCTL0 -- cgit v1.2.2 From 9be343c5bcd1cf285c2150f363bc9dd7aab8b7fb Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Thu, 12 Jul 2007 11:58:44 +0800 Subject: Blackfin arch: There is no CDPRIO Bit in the EBIU_AMGCTL Register of BF54x arch However there are similar things in the EBIU_DDRQUE Register Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf548/bf548.h | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf548/bf548.h b/include/asm-blackfin/mach-bf548/bf548.h index 163c79e3d2..9498313a2c 100644 --- a/include/asm-blackfin/mach-bf548/bf548.h +++ b/include/asm-blackfin/mach-bf548/bf548.h @@ -32,16 +32,6 @@ #define SUPPORTED_REVID 0 -/* Masks for generic ERROR IRQ demultiplexing used in int-priority-sc.c */ - -#define SPI_ERR_MASK (TXCOL | RBSY | MODF | TXE) /* SPI_STAT */ -#define SPORT_ERR_MASK (ROVF | RUVF | TOVF | TUVF) /* SPORTx_STAT */ -#define PPI_ERR_MASK (0xFFFF & ~FLD) /* PPI_STATUS */ -#define UART_ERR_MASK_STAT1 (0x4) /* UARTx_IIR */ -#define UART_ERR_MASK_STAT0 (0x2) /* UARTx_IIR */ -#define CAN_ERR_MASK (EWTIF | EWRIF | EPIF | BOIF | WUIF | UIAIF | AAIF | \ - RMLIF | UCEIF | EXTIF | ADIF) /* CAN_GIF */ - #define OFFSET_(x) ((x) & 0x0000FFFF) /*some misc defines*/ @@ -113,13 +103,8 @@ #else #define V_AMCKEN 0x0 #endif -#ifdef CONFIG_C_CDPRIO -#define V_CDPRIO 0x100 -#else -#define V_CDPRIO 0x0 -#endif -#define AMGCTLVAL (V_AMBEN | V_AMCKEN | V_CDPRIO) +#define AMGCTLVAL (V_AMBEN | V_AMCKEN) #define MAX_VC 650000000 #define MIN_VC 50000000 -- cgit v1.2.2 From 520473b0775ce046d179afa686fb3222884c389d Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Thu, 12 Jul 2007 12:20:20 +0800 Subject: Blackfin arch: use PAGE_SIZE when doing aligns rather than hardcoded values Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- include/asm-blackfin/page.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/page.h b/include/asm-blackfin/page.h index ffad947f1b..8bc8671702 100644 --- a/include/asm-blackfin/page.h +++ b/include/asm-blackfin/page.h @@ -4,7 +4,11 @@ /* PAGE_SHIFT determines the page size */ #define PAGE_SHIFT 12 +#ifdef __ASSEMBLY__ +#define PAGE_SIZE (1 << PAGE_SHIFT) +#else #define PAGE_SIZE (1UL << PAGE_SHIFT) +#endif #define PAGE_MASK (~(PAGE_SIZE-1)) #ifdef __KERNEL__ -- cgit v1.2.2 From 5610db61cf2945a5e74667e952f2792c96ba53a1 Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Thu, 12 Jul 2007 12:32:52 +0800 Subject: Blackfin arch: Add Support for Peripheral PortMux and resouce allocation Signed-off-by: Michael Hennerich Signed-off-by: Bryan Wu --- include/asm-blackfin/gpio.h | 50 ++ include/asm-blackfin/mach-bf533/portmux.h | 65 ++ include/asm-blackfin/mach-bf537/portmux.h | 109 +++ include/asm-blackfin/mach-bf548/portmux.h | 270 +++++++ include/asm-blackfin/mach-bf561/portmux.h | 87 +++ include/asm-blackfin/portmux.h | 1133 +++++++++++++++++++++++++++++ 6 files changed, 1714 insertions(+) create mode 100644 include/asm-blackfin/mach-bf533/portmux.h create mode 100644 include/asm-blackfin/mach-bf537/portmux.h create mode 100644 include/asm-blackfin/mach-bf548/portmux.h create mode 100644 include/asm-blackfin/mach-bf561/portmux.h create mode 100644 include/asm-blackfin/portmux.h (limited to 'include') diff --git a/include/asm-blackfin/gpio.h b/include/asm-blackfin/gpio.h index e679703f7a..7480cfa7e2 100644 --- a/include/asm-blackfin/gpio.h +++ b/include/asm-blackfin/gpio.h @@ -210,6 +210,56 @@ #ifdef BF561_FAMILY #define MAX_BLACKFIN_GPIOS 48 + +#define GPIO_PF0 0 +#define GPIO_PF1 1 +#define GPIO_PF2 2 +#define GPIO_PF3 3 +#define GPIO_PF4 4 +#define GPIO_PF5 5 +#define GPIO_PF6 6 +#define GPIO_PF7 7 +#define GPIO_PF8 8 +#define GPIO_PF9 9 +#define GPIO_PF10 10 +#define GPIO_PF11 11 +#define GPIO_PF12 12 +#define GPIO_PF13 13 +#define GPIO_PF14 14 +#define GPIO_PF15 15 +#define GPIO_PF16 16 +#define GPIO_PF17 17 +#define GPIO_PF18 18 +#define GPIO_PF19 19 +#define GPIO_PF20 20 +#define GPIO_PF21 21 +#define GPIO_PF22 22 +#define GPIO_PF23 23 +#define GPIO_PF24 24 +#define GPIO_PF25 25 +#define GPIO_PF26 26 +#define GPIO_PF27 27 +#define GPIO_PF28 28 +#define GPIO_PF29 29 +#define GPIO_PF30 30 +#define GPIO_PF31 31 +#define GPIO_PF32 32 +#define GPIO_PF33 33 +#define GPIO_PF34 34 +#define GPIO_PF35 35 +#define GPIO_PF36 36 +#define GPIO_PF37 37 +#define GPIO_PF38 38 +#define GPIO_PF39 39 +#define GPIO_PF40 40 +#define GPIO_PF41 41 +#define GPIO_PF42 42 +#define GPIO_PF43 43 +#define GPIO_PF44 44 +#define GPIO_PF45 45 +#define GPIO_PF46 46 +#define GPIO_PF47 47 + #define PORT_FIO0 GPIO_0 #define PORT_FIO1 GPIO_16 #define PORT_FIO2 GPIO_32 diff --git a/include/asm-blackfin/mach-bf533/portmux.h b/include/asm-blackfin/mach-bf533/portmux.h new file mode 100644 index 0000000000..b88d7a03ee --- /dev/null +++ b/include/asm-blackfin/mach-bf533/portmux.h @@ -0,0 +1,65 @@ +#ifndef _MACH_PORTMUX_H_ +#define _MACH_PORTMUX_H_ + +#define P_PPI0_CLK (P_DONTCARE) +#define P_PPI0_FS1 (P_DONTCARE) +#define P_PPI0_FS2 (P_DONTCARE) +#define P_PPI0_FS3 (P_DEFINED | P_IDENT(GPIO_PF3)) +#define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF4)) +#define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF5)) +#define P_PPI0_D13 (P_DEFINED | P_IDENT(GPIO_PF6)) +#define P_PPI0_D12 (P_DEFINED | P_IDENT(GPIO_PF7)) +#define P_PPI0_D11 (P_DEFINED | P_IDENT(GPIO_PF8)) +#define P_PPI0_D10 (P_DEFINED | P_IDENT(GPIO_PF9)) +#define P_PPI0_D9 (P_DEFINED | P_IDENT(GPIO_PF10)) +#define P_PPI0_D8 (P_DEFINED | P_IDENT(GPIO_PF11)) +#define P_PPI0_D0 (P_DONTCARE) +#define P_PPI0_D1 (P_DONTCARE) +#define P_PPI0_D2 (P_DONTCARE) +#define P_PPI0_D3 (P_DONTCARE) +#define P_PPI0_D4 (P_DEFINED | P_IDENT(GPIO_PF15)) +#define P_PPI0_D5 (P_DEFINED | P_IDENT(GPIO_PF14)) +#define P_PPI0_D6 (P_DEFINED | P_IDENT(GPIO_PF13)) +#define P_PPI0_D7 (P_DEFINED | P_IDENT(GPIO_PF12)) + +#define P_SPORT1_TSCLK (P_DONTCARE) +#define P_SPORT1_RSCLK (P_DONTCARE) +#define P_SPORT0_TSCLK (P_DONTCARE) +#define P_SPORT0_RSCLK (P_DONTCARE) +#define P_UART0_RX (P_DONTCARE) +#define P_UART0_TX (P_DONTCARE) +#define P_SPORT1_DRSEC (P_DONTCARE) +#define P_SPORT1_RFS (P_DONTCARE) +#define P_SPORT1_DTPRI (P_DONTCARE) +#define P_SPORT1_DTSEC (P_DONTCARE) +#define P_SPORT1_TFS (P_DONTCARE) +#define P_SPORT1_DRPRI (P_DONTCARE) +#define P_SPORT0_DRSEC (P_DONTCARE) +#define P_SPORT0_RFS (P_DONTCARE) +#define P_SPORT0_DTPRI (P_DONTCARE) +#define P_SPORT0_DTSEC (P_DONTCARE) +#define P_SPORT0_TFS (P_DONTCARE) +#define P_SPORT0_DRPRI (P_DONTCARE) + +#define P_SPI0_MOSI (P_DONTCARE) +#define P_SPI0_MIS0 (P_DONTCARE) +#define P_SPI0_SCK (P_DONTCARE) +#define P_SPI0_SSEL7 (P_DEFINED | P_IDENT(GPIO_PF7)) +#define P_SPI0_SSEL6 (P_DEFINED | P_IDENT(GPIO_PF6)) +#define P_SPI0_SSEL5 (P_DEFINED | P_IDENT(GPIO_PF5)) +#define P_SPI0_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF4)) +#define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(GPIO_PF3)) +#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) +#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) +#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) + +#define P_TMR2 (P_DONTCARE) +#define P_TMR1 (P_DONTCARE) +#define P_TMR0 (P_DONTCARE) +#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF1)) + + + + + +#endif /* _MACH_PORTMUX_H_ */ diff --git a/include/asm-blackfin/mach-bf537/portmux.h b/include/asm-blackfin/mach-bf537/portmux.h new file mode 100644 index 0000000000..23e13c5abc --- /dev/null +++ b/include/asm-blackfin/mach-bf537/portmux.h @@ -0,0 +1,109 @@ +#ifndef _MACH_PORTMUX_H_ +#define _MACH_PORTMUX_H_ + +#define P_UART0_TX (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0)) +#define P_UART0_RX (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0)) +#define P_UART1_TX (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0)) +#define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(0)) +#define P_TMR5 (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(0)) +#define P_TMR4 (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(0)) +#define P_TMR3 (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(0)) +#define P_TMR2 (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(0)) +#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(0)) +#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(0)) +#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(0)) +#define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(0)) +#define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(0)) +#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0)) +#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0)) +#define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0)) +#define P_DMAR0 (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1)) +#define P_DMAR1 (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1)) +#define P_TMR7 (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1)) +#define P_TMR6 (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1)) +#define P_SPI0_SSEL6 (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1)) +#define P_SPI0_SSEL5 (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1)) +#define P_SPI0_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1)) +#define P_PPI0_FS3 (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1)) +#define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1)) +#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) +#define P_TACLK0 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) +#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) + +#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) +#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) +#define P_PPI0_D2 (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(0)) +#define P_PPI0_D3 (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) +#define P_PPI0_D4 (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0)) +#define P_PPI0_D5 (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(0)) +#define P_PPI0_D6 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(0)) +#define P_PPI0_D7 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(0)) +#define P_PPI0_D8 (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(0)) +#define P_PPI0_D9 (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(0)) +#define P_PPI0_D10 (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(0)) +#define P_PPI0_D11 (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(0)) +#define P_PPI0_D12 (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(0)) +#define P_PPI0_D13 (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0)) +#define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0)) +#define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0)) +#define P_SPORT1_DRSEC (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(1)) +#define P_SPORT1_DTSEC (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(1)) +#define P_SPORT1_RSCLK (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(1)) +#define P_SPORT1_RFS (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1)) +#define P_SPORT1_DRPRI (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(1)) +#define P_SPORT1_TSCLK (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(1)) +#define P_SPORT1_TFS (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(1)) +#define P_SPORT1_DTPRI (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(1)) + +#define P_MII0_ETxD0 (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(0)) +#define P_MII0_ETxD1 (P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(0)) +#define P_MII0_ETxD2 (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(0)) +#define P_MII0_ETxD3 (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(0)) +#define P_MII0_ETxEN (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(0)) +#define P_MII0_TxCLK (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(0)) +#define P_MII0_PHYINT (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(0)) +#define P_MII0_COL (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(0)) +#define P_MII0_ERxD0 (P_DEFINED | P_IDENT(GPIO_PH8) | P_FUNCT(0)) +#define P_MII0_ERxD1 (P_DEFINED | P_IDENT(GPIO_PH9) | P_FUNCT(0)) +#define P_MII0_ERxD2 (P_DEFINED | P_IDENT(GPIO_PH10) | P_FUNCT(0)) +#define P_MII0_ERxD3 (P_DEFINED | P_IDENT(GPIO_PH11) | P_FUNCT(0)) +#define P_MII0_ERxDV (P_DEFINED | P_IDENT(GPIO_PH12) | P_FUNCT(0)) +#define P_MII0_ERxCLK (P_DEFINED | P_IDENT(GPIO_PH13) | P_FUNCT(0)) +#define P_MII0_ERxER (P_DEFINED | P_IDENT(GPIO_PH14) | P_FUNCT(0)) +#define P_MII0_CRS (P_DEFINED | P_IDENT(GPIO_PH15) | P_FUNCT(0)) +#define P_RMII0_REF_CLK (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(1)) +#define P_RMII0_MDINT (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(1)) +#define P_RMII0_CRS_DV (P_DEFINED | P_IDENT(GPIO_PH15) | P_FUNCT(1)) + +#define PORT_PJ0 (GPIO_PH15 + 1) +#define PORT_PJ1 (GPIO_PH15 + 2) +#define PORT_PJ2 (GPIO_PH15 + 3) +#define PORT_PJ3 (GPIO_PH15 + 4) +#define PORT_PJ4 (GPIO_PH15 + 5) +#define PORT_PJ5 (GPIO_PH15 + 6) +#define PORT_PJ6 (GPIO_PH15 + 7) +#define PORT_PJ7 (GPIO_PH15 + 8) +#define PORT_PJ8 (GPIO_PH15 + 9) +#define PORT_PJ9 (GPIO_PH15 + 10) +#define PORT_PJ10 (GPIO_PH15 + 11) +#define PORT_PJ11 (GPIO_PH15 + 12) + +#define P_MDC (P_DEFINED | P_IDENT(PORT_PJ0) | P_FUNCT(0)) +#define P_MDIO (P_DEFINED | P_IDENT(PORT_PJ1) | P_FUNCT(0)) +#define P_TWI0_SCL (P_DEFINED | P_IDENT(PORT_PJ2) | P_FUNCT(0)) +#define P_TWI0_SDA (P_DEFINED | P_IDENT(PORT_PJ3) | P_FUNCT(0)) +#define P_SPORT0_DRSEC (P_DEFINED | P_IDENT(PORT_PJ4) | P_FUNCT(0)) +#define P_SPORT0_DTSEC (P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(0)) +#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(PORT_PJ6) | P_FUNCT(0)) +#define P_SPORT0_RFS (P_DEFINED | P_IDENT(PORT_PJ7) | P_FUNCT(0)) +#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(PORT_PJ8) | P_FUNCT(0)) +#define P_SPORT0_TSCLK (P_DEFINED | P_IDENT(PORT_PJ9) | P_FUNCT(0)) +#define P_SPORT0_TFS (P_DEFINED | P_IDENT(PORT_PJ10) | P_FUNCT(0)) +#define P_SPORT0_DTPRI (P_DEFINED | P_IDENT(PORT_PJ11) | P_FUNCT(1)) +#define P_CAN0_RX (P_DEFINED | P_IDENT(PORT_PJ4) | P_FUNCT(1)) +#define P_CAN0_TX (P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(1)) +#define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(PORT_PJ10) | P_FUNCT(1)) +#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(PORT_PJ11) | P_FUNCT(1)) +#define P_SPI0_SSEL7 (P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(2)) + +#endif /* _MACH_PORTMUX_H_ */ diff --git a/include/asm-blackfin/mach-bf548/portmux.h b/include/asm-blackfin/mach-bf548/portmux.h new file mode 100644 index 0000000000..b382deb501 --- /dev/null +++ b/include/asm-blackfin/mach-bf548/portmux.h @@ -0,0 +1,270 @@ +#ifndef _MACH_PORTMUX_H_ +#define _MACH_PORTMUX_H_ + +#define P_SPORT2_TFS (P_DEFINED | P_IDENT(GPIO_PA0) | P_FUNCT(0)) +#define P_SPORT2_DTSEC (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(0)) +#define P_SPORT2_DTPRI (P_DEFINED | P_IDENT(GPIO_PA2) | P_FUNCT(0)) +#define P_SPORT2_TSCLK (P_DEFINED | P_IDENT(GPIO_PA3) | P_FUNCT(0)) +#define P_SPORT2_RFS (P_DEFINED | P_IDENT(GPIO_PA4) | P_FUNCT(0)) +#define P_SPORT2_DRSEC (P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(0)) +#define P_SPORT2_DRPRI (P_DEFINED | P_IDENT(GPIO_PA6) | P_FUNCT(0)) +#define P_SPORT2_RSCLK (P_DEFINED | P_IDENT(GPIO_PA7) | P_FUNCT(0)) +#define P_SPORT3_TFS (P_DEFINED | P_IDENT(GPIO_PA8) | P_FUNCT(0)) +#define P_SPORT3_DTSEC (P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(0)) +#define P_SPORT3_DTPRI (P_DEFINED | P_IDENT(GPIO_PA10) | P_FUNCT(0)) +#define P_SPORT3_TSCLK (P_DEFINED | P_IDENT(GPIO_PA11) | P_FUNCT(0)) +#define P_SPORT3_RFS (P_DEFINED | P_IDENT(GPIO_PA12) | P_FUNCT(0)) +#define P_SPORT3_DRSEC (P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(0)) +#define P_SPORT3_DRPRI (P_DEFINED | P_IDENT(GPIO_PA14) | P_FUNCT(0)) +#define P_SPORT3_RSCLK (P_DEFINED | P_IDENT(GPIO_PA15) | P_FUNCT(0)) +#define P_TMR4 (P_DEFINED | P_IDENT(GPIO_PA1) | P_FUNCT(1)) +#define P_TMR5 (P_DEFINED | P_IDENT(GPIO_PA5) | P_FUNCT(1)) +#define P_TMR6 (P_DEFINED | P_IDENT(GPIO_PA9) | P_FUNCT(1)) +#define P_TMR7 (P_DEFINED | P_IDENT(GPIO_PA13) | P_FUNCT(1)) + +#define P_TWI1_SCL (P_DEFINED | P_IDENT(GPIO_PB0) | P_FUNCT(0)) +#define P_TWI1_SDA (P_DEFINED | P_IDENT(GPIO_PB1) | P_FUNCT(0)) +#define P_UART3_RTS (P_DEFINED | P_IDENT(GPIO_PB2) | P_FUNCT(0)) +#define P_UART3_CTS (P_DEFINED | P_IDENT(GPIO_PB3) | P_FUNCT(0)) +#define P_UART2_TX (P_DEFINED | P_IDENT(GPIO_PB4) | P_FUNCT(0)) +#define P_UART2_RX (P_DEFINED | P_IDENT(GPIO_PB5) | P_FUNCT(0)) +#define P_UART3_TX (P_DEFINED | P_IDENT(GPIO_PB6) | P_FUNCT(0)) +#define P_UART3_RX (P_DEFINED | P_IDENT(GPIO_PB7) | P_FUNCT(0)) +#define P_SPI2_SS (P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(0)) +#define P_SPI2_SSEL1 (P_DEFINED | P_IDENT(GPIO_PB9) | P_FUNCT(0)) +#define P_SPI2_SSEL2 (P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(0)) +#define P_SPI2_SSEL3 (P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(0)) +#define P_SPI2_SCK (P_DEFINED | P_IDENT(GPIO_PB12) | P_FUNCT(0)) +#define P_SPI2_MOSI (P_DEFINED | P_IDENT(GPIO_PB13) | P_FUNCT(0)) +#define P_SPI2_MISO (P_DEFINED | P_IDENT(GPIO_PB14) | P_FUNCT(0)) +#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PB8) | P_FUNCT(1)) +#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PB9) | P_FUNCT(1)) +#define P_TMR2 (P_DEFINED | P_IDENT(GPIO_PB10) | P_FUNCT(1)) +#define P_TMR3 (P_DEFINED | P_IDENT(GPIO_PB11) | P_FUNCT(1)) + +#define P_SPORT0_TFS (P_DEFINED | P_IDENT(GPIO_PC0) | P_FUNCT(0)) +#define P_SPORT0_DTSEC (P_DEFINED | P_IDENT(GPIO_PC1) | P_FUNCT(0)) +#define P_SPORT0_DTPRI (P_DEFINED | P_IDENT(GPIO_PC2) | P_FUNCT(0)) +#define P_SPORT0_TSCLK (P_DEFINED | P_IDENT(GPIO_PC3) | P_FUNCT(0)) +#define P_SPORT0_RFS (P_DEFINED | P_IDENT(GPIO_PC4) | P_FUNCT(0)) +#define P_SPORT0_DRSEC (P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(0)) +#define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0)) +#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PC7) | P_FUNCT(0)) +#define P_SD_D0 (P_DEFINED | P_IDENT(GPIO_PC8) | P_FUNCT(0)) +#define P_SD_D1 (P_DEFINED | P_IDENT(GPIO_PC9) | P_FUNCT(0)) +#define P_SD_D2 (P_DEFINED | P_IDENT(GPIO_PC10) | P_FUNCT(0)) +#define P_SD_D3 (P_DEFINED | P_IDENT(GPIO_PC11) | P_FUNCT(0)) +#define P_SD_CLK (P_DEFINED | P_IDENT(GPIO_PC12) | P_FUNCT(0)) +#define P_SD_CMD (P_DEFINED | P_IDENT(GPIO_PC13) | P_FUNCT(0)) +#define P_MMCLK (P_DEFINED | P_IDENT(GPIO_PC1) | P_FUNCT(1)) +#define P_MBCLK (P_DEFINED | P_IDENT(GPIO_PC5) | P_FUNCT(1)) + +#define P_PPI1_D0 (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(0)) +#define P_PPI1_D1 (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(0)) +#define P_PPI1_D2 (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(0)) +#define P_PPI1_D3 (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(0)) +#define P_PPI1_D4 (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(0)) +#define P_PPI1_D5 (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(0)) +#define P_PPI1_D6 (P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(0)) +#define P_PPI1_D7 (P_DEFINED | P_IDENT(GPIO_PD7) | P_FUNCT(0)) +#define P_PPI1_D8 (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(0)) +#define P_PPI1_D9 (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(0)) +#define P_PPI1_D10 (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(0)) +#define P_PPI1_D11 (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(0)) +#define P_PPI1_D12 (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(0)) +#define P_PPI1_D13 (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(0)) +#define P_PPI1_D14 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(0)) +#define P_PPI1_D15 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(0)) + +#define P_HOST_D8 (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(1)) +#define P_HOST_D9 (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(1)) +#define P_HOST_D10 (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(1)) +#define P_HOST_D11 (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(1)) +#define P_HOST_D12 (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(1)) +#define P_HOST_D13 (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(1)) +#define P_HOST_D14 (P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(1)) +#define P_HOST_D15 (P_DEFINED | P_IDENT(GPIO_PD7) | P_FUNCT(1)) +#define P_HOST_D0 (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(1)) +#define P_HOST_D1 (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(1)) +#define P_HOST_D2 (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(1)) +#define P_HOST_D3 (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(1)) +#define P_HOST_D4 (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(1)) +#define P_HOST_D5 (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(1)) +#define P_HOST_D6 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(1)) +#define P_HOST_D7 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(1)) +#define P_SPORT1_TFS (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(2)) +#define P_SPORT1_DTSEC (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(2)) +#define P_SPORT1_DTPRI (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(2)) +#define P_SPORT1_TSCLK (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(2)) +#define P_SPORT1_RFS (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(2)) +#define P_SPORT1_DRSEC (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(2)) +#define P_SPORT1_DRPRI (P_DEFINED | P_IDENT(GPIO_PD6) | P_FUNCT(2)) +#define P_SPORT1_RSCLK (P_DEFINED | P_IDENT(GPIO_PD7) | P_FUNCT(2)) +#define P_PPI2_D0 (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(2)) +#define P_PPI2_D1 (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(2)) +#define P_PPI2_D2 (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(2)) +#define P_PPI2_D3 (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(2)) +#define P_PPI2_D4 (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(2)) +#define P_PPI2_D5 (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(2)) +#define P_PPI2_D6 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(2)) +#define P_PPI2_D7 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(2)) +#define P_PPI0_D18 (P_DEFINED | P_IDENT(GPIO_PD0) | P_FUNCT(3)) +#define P_PPI0_D19 (P_DEFINED | P_IDENT(GPIO_PD1) | P_FUNCT(3)) +#define P_PPI0_D20 (P_DEFINED | P_IDENT(GPIO_PD2) | P_FUNCT(3)) +#define P_PPI0_D21 (P_DEFINED | P_IDENT(GPIO_PD3) | P_FUNCT(3)) +#define P_PPI0_D22 (P_DEFINED | P_IDENT(GPIO_PD4) | P_FUNCT(3)) +#define P_PPI0_D23 (P_DEFINED | P_IDENT(GPIO_PD5) | P_FUNCT(3)) +#define P_KEY_ROW0 (P_DEFINED | P_IDENT(GPIO_PD8) | P_FUNCT(3)) +#define P_KEY_ROW1 (P_DEFINED | P_IDENT(GPIO_PD9) | P_FUNCT(3)) +#define P_KEY_ROW2 (P_DEFINED | P_IDENT(GPIO_PD10) | P_FUNCT(3)) +#define P_KEY_ROW3 (P_DEFINED | P_IDENT(GPIO_PD11) | P_FUNCT(3)) +#define P_KEY_COL0 (P_DEFINED | P_IDENT(GPIO_PD12) | P_FUNCT(3)) +#define P_KEY_COL1 (P_DEFINED | P_IDENT(GPIO_PD13) | P_FUNCT(3)) +#define P_KEY_COL2 (P_DEFINED | P_IDENT(GPIO_PD14) | P_FUNCT(3)) +#define P_KEY_COL3 (P_DEFINED | P_IDENT(GPIO_PD15) | P_FUNCT(3)) + +#define P_SPI0_SCK (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(0)) +#define P_SPI0_MISO (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(0)) +#define P_SPI0_MOSI (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(0)) +#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PE3) | P_FUNCT(0)) +#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PE4) | P_FUNCT(0)) +#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PE5) | P_FUNCT(0)) +#define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(0)) +#define P_UART0_TX (P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(0)) +#define P_UART0_RX (P_DEFINED | P_IDENT(GPIO_PE8) | P_FUNCT(0)) +#define P_UART1_RTS (P_DEFINED | P_IDENT(GPIO_PE9) | P_FUNCT(0)) +#define P_UART1_CTS (P_DEFINED | P_IDENT(GPIO_PE10) | P_FUNCT(0)) +#define P_PPI1_CLK (P_DEFINED | P_IDENT(GPIO_PE11) | P_FUNCT(0)) +#define P_PPI1_FS1 (P_DEFINED | P_IDENT(GPIO_PE12) | P_FUNCT(0)) +#define P_PPI1_FS2 (P_DEFINED | P_IDENT(GPIO_PE13) | P_FUNCT(0)) +#define P_TWI0_SCL (P_DEFINED | P_IDENT(GPIO_PE14) | P_FUNCT(0)) +#define P_TWI0_SDA (P_DEFINED | P_IDENT(GPIO_PE15) | P_FUNCT(0)) +#define P_KEY_COL7 (P_DEFINED | P_IDENT(GPIO_PE0) | P_FUNCT(1)) +#define P_KEY_ROW6 (P_DEFINED | P_IDENT(GPIO_PE1) | P_FUNCT(1)) +#define P_KEY_COL6 (P_DEFINED | P_IDENT(GPIO_PE2) | P_FUNCT(1)) +#define P_KEY_ROW5 (P_DEFINED | P_IDENT(GPIO_PE3) | P_FUNCT(1)) +#define P_KEY_COL5 (P_DEFINED | P_IDENT(GPIO_PE4) | P_FUNCT(1)) +#define P_KEY_ROW4 (P_DEFINED | P_IDENT(GPIO_PE5) | P_FUNCT(1)) +#define P_KEY_COL4 (P_DEFINED | P_IDENT(GPIO_PE6) | P_FUNCT(1)) +#define P_KEY_ROW7 (P_DEFINED | P_IDENT(GPIO_PE7) | P_FUNCT(1)) + +#define P_PPI0_D0 (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(0)) +#define P_PPI0_D1 (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(0)) +#define P_PPI0_D2 (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(0)) +#define P_PPI0_D3 (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(0)) +#define P_PPI0_D4 (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(0)) +#define P_PPI0_D5 (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(0)) +#define P_PPI0_D6 (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(0)) +#define P_PPI0_D7 (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(0)) +#define P_PPI0_D8 (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(0)) +#define P_PPI0_D9 (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(0)) +#define P_PPI0_D10 (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(0)) +#define P_PPI0_D11 (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(0)) +#define P_PPI0_D12 (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(0)) +#define P_PPI0_D13 (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(0)) +#define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(0)) +#define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(0)) +#define P_ATAPI_D0A (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1)) +#define P_ATAPI_D1A (P_DEFINED | P_IDENT(GPIO_PF1) | P_FUNCT(1)) +#define P_ATAPI_D2A (P_DEFINED | P_IDENT(GPIO_PF2) | P_FUNCT(1)) +#define P_ATAPI_D3A (P_DEFINED | P_IDENT(GPIO_PF3) | P_FUNCT(1)) +#define P_ATAPI_D4A (P_DEFINED | P_IDENT(GPIO_PF4) | P_FUNCT(1)) +#define P_ATAPI_D5A (P_DEFINED | P_IDENT(GPIO_PF5) | P_FUNCT(1)) +#define P_ATAPI_D6A (P_DEFINED | P_IDENT(GPIO_PF6) | P_FUNCT(1)) +#define P_ATAPI_D7A (P_DEFINED | P_IDENT(GPIO_PF7) | P_FUNCT(1)) +#define P_ATAPI_D8A (P_DEFINED | P_IDENT(GPIO_PF8) | P_FUNCT(1)) +#define P_ATAPI_D9A (P_DEFINED | P_IDENT(GPIO_PF9) | P_FUNCT(1)) +#define P_ATAPI_D10A (P_DEFINED | P_IDENT(GPIO_PF10) | P_FUNCT(1)) +#define P_ATAPI_D11A (P_DEFINED | P_IDENT(GPIO_PF11) | P_FUNCT(1)) +#define P_ATAPI_D12A (P_DEFINED | P_IDENT(GPIO_PF12) | P_FUNCT(1)) +#define P_ATAPI_D13A (P_DEFINED | P_IDENT(GPIO_PF13) | P_FUNCT(1)) +#define P_ATAPI_D14A (P_DEFINED | P_IDENT(GPIO_PF14) | P_FUNCT(1)) +#define P_ATAPI_D15A (P_DEFINED | P_IDENT(GPIO_PF15) | P_FUNCT(1)) + +#define P_PPI0_CLK (P_DEFINED | P_IDENT(GPIO_PG0) | P_FUNCT(0)) +#define P_PPI0_FS1 (P_DEFINED | P_IDENT(GPIO_PG1) | P_FUNCT(0)) +#define P_PPI0_FS2 (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(0)) +#define P_PPI0_D16 (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) +#define P_PPI0_D17 (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(0)) +#define P_SPI1_SSEL1 (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(0)) +#define P_SPI1_SSEL2 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(0)) +#define P_SPI1_SSEL3 (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(0)) +#define P_SPI1_SCK (P_DEFINED | P_IDENT(GPIO_PG8) | P_FUNCT(0)) +#define P_SPI1_MISO (P_DEFINED | P_IDENT(GPIO_PG9) | P_FUNCT(0)) +#define P_SPI1_MOSI (P_DEFINED | P_IDENT(GPIO_PG10) | P_FUNCT(0)) +#define P_SPI1_SS (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(0)) +#define P_CAN0_TX (P_DEFINED | P_IDENT(GPIO_PG12) | P_FUNCT(0)) +#define P_CAN0_RX (P_DEFINED | P_IDENT(GPIO_PG13) | P_FUNCT(0)) +#define P_CAN1_TX (P_DEFINED | P_IDENT(GPIO_PG14) | P_FUNCT(0)) +#define P_CAN1_RX (P_DEFINED | P_IDENT(GPIO_PG15) | P_FUNCT(0)) +#define P_ATAPI_A0A (P_DEFINED | P_IDENT(GPIO_PG2) | P_FUNCT(1)) +#define P_ATAPI_A1A (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(1)) +#define P_ATAPI_A2A (P_DEFINED | P_IDENT(GPIO_PG4) | P_FUNCT(1)) +#define P_HOST_CE (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(1)) +#define P_HOST_RD (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(1)) +#define P_HOST_WR (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1)) +#define P_MTXONB (P_DEFINED | P_IDENT(GPIO_PG11) | P_FUNCT(1)) +#define P_PPI2_FS2 (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(2)) +#define P_PPI2_FS1 (P_DEFINED | P_IDENT(GPIO_PG6) | P_FUNCT(2)) +#define P_PPI2_CLK (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(2)) +#define P_CNT_CZM (P_DEFINED | P_IDENT(GPIO_PG5) | P_FUNCT(3)) + +#define P_UART1_TX (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(0)) +#define P_UART1_RX (P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(0)) +#define P_ATAPI_RESET (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(0)) +#define P_HOST_ADDR (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(0)) +#define P_HOST_ACK (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(0)) +#define P_MTX (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(0)) +#define P_MRX (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(0)) +#define P_MRXONB (P_DEFINED | P_IDENT(GPIO_PH7) | P_FUNCT(0)) +#define P_A4 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH8) | P_FUNCT(0)) +#define P_A5 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH9) | P_FUNCT(0)) +#define P_A6 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH10) | P_FUNCT(0)) +#define P_A7 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH11) | P_FUNCT(0)) +#define P_A8 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH12) | P_FUNCT(0)) +#define P_A9 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PH13) | P_FUNCT(0)) +#define P_PPI1_FS3 (P_DEFINED | P_IDENT(GPIO_PH0) | P_FUNCT(1)) +#define P_PPI2_FS3 (P_DEFINED | P_IDENT(GPIO_PH1) | P_FUNCT(1)) +#define P_TMR8 (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(1)) +#define P_TMR9 (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(1)) +#define P_TMR10 (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(1)) +#define P_DMAR0 (P_DEFINED | P_IDENT(GPIO_PH5) | P_FUNCT(1)) +#define P_DMAR1 (P_DEFINED | P_IDENT(GPIO_PH6) | P_FUNCT(1)) +#define P_PPI0_FS3 (P_DEFINED | P_IDENT(GPIO_PH2) | P_FUNCT(2)) +#define P_CNT_CDG (P_DEFINED | P_IDENT(GPIO_PH3) | P_FUNCT(2)) +#define P_CNT_CUD (P_DEFINED | P_IDENT(GPIO_PH4) | P_FUNCT(2)) + +#define P_A10 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI0) | P_FUNCT(0)) +#define P_A11 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI1) | P_FUNCT(0)) +#define P_A12 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI2) | P_FUNCT(0)) +#define P_A13 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI3) | P_FUNCT(0)) +#define P_A14 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI4) | P_FUNCT(0)) +#define P_A15 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI5) | P_FUNCT(0)) +#define P_A16 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI6) | P_FUNCT(0)) +#define P_A17 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI7) | P_FUNCT(0)) +#define P_A18 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI8) | P_FUNCT(0)) +#define P_A19 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI9) | P_FUNCT(0)) +#define P_A20 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI10) | P_FUNCT(0)) +#define P_A21 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI11) | P_FUNCT(0)) +#define P_A22 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI12) | P_FUNCT(0)) +#define P_A23 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI13) | P_FUNCT(0)) +#define P_A24 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI14) | P_FUNCT(0)) +#define P_A25 (P_MAYSHARE | P_DEFINED | P_IDENT(GPIO_PI15) | P_FUNCT(0)) +#define P_NOR_CLK (P_DEFINED | P_IDENT(GPIO_PI15) | P_FUNCT(1)) + +#define P_AMC_ARDY_NOR_WAIT (P_DEFINED | P_IDENT(GPIO_PJ0) | P_FUNCT(0)) +#define P_NAND_CE (P_DEFINED | P_IDENT(GPIO_PJ1) | P_FUNCT(0)) +#define P_NAND_RB (P_DEFINED | P_IDENT(GPIO_PJ2) | P_FUNCT(0)) +#define P_ATAPI_DIOR (P_DEFINED | P_IDENT(GPIO_PJ3) | P_FUNCT(0)) +#define P_ATAPI_DIOW (P_DEFINED | P_IDENT(GPIO_PJ4) | P_FUNCT(0)) +#define P_ATAPI_CS0 (P_DEFINED | P_IDENT(GPIO_PJ5) | P_FUNCT(0)) +#define P_ATAPI_CS1 (P_DEFINED | P_IDENT(GPIO_PJ6) | P_FUNCT(0)) +#define P_ATAPI_DMACK (P_DEFINED | P_IDENT(GPIO_PJ7) | P_FUNCT(0)) +#define P_ATAPI_DMARQ (P_DEFINED | P_IDENT(GPIO_PJ8) | P_FUNCT(0)) +#define P_ATAPI_INTRQ (P_DEFINED | P_IDENT(GPIO_PJ9) | P_FUNCT(0)) +#define P_ATAPI_IORDY (P_DEFINED | P_IDENT(GPIO_PJ10) | P_FUNCT(0)) +#define P_AMC_BR (P_DEFINED | P_IDENT(GPIO_PJ11) | P_FUNCT(0)) +#define P_AMC_BG (P_DEFINED | P_IDENT(GPIO_PJ12) | P_FUNCT(0)) +#define P_AMC_BGH (P_DEFINED | P_IDENT(GPIO_PJ13) | P_FUNCT(0)) + +#endif /* _MACH_PORTMUX_H_ */ diff --git a/include/asm-blackfin/mach-bf561/portmux.h b/include/asm-blackfin/mach-bf561/portmux.h new file mode 100644 index 0000000000..10d11d5ffe --- /dev/null +++ b/include/asm-blackfin/mach-bf561/portmux.h @@ -0,0 +1,87 @@ +#ifndef _MACH_PORTMUX_H_ +#define _MACH_PORTMUX_H_ + +#define P_PPI0_CLK (P_DONTCARE) +#define P_PPI0_FS1 (P_DONTCARE) +#define P_PPI0_FS2 (P_DONTCARE) +#define P_PPI0_FS3 (P_DONTCARE) +#define P_PPI0_D15 (P_DEFINED | P_IDENT(GPIO_PF47)) +#define P_PPI0_D14 (P_DEFINED | P_IDENT(GPIO_PF46)) +#define P_PPI0_D13 (P_DEFINED | P_IDENT(GPIO_PF45)) +#define P_PPI0_D12 (P_DEFINED | P_IDENT(GPIO_PF44)) +#define P_PPI0_D11 (P_DEFINED | P_IDENT(GPIO_PF43)) +#define P_PPI0_D10 (P_DEFINED | P_IDENT(GPIO_PF42)) +#define P_PPI0_D9 (P_DEFINED | P_IDENT(GPIO_PF41)) +#define P_PPI0_D8 (P_DEFINED | P_IDENT(GPIO_PF40)) +#define P_PPI0_D0 (P_DONTCARE) +#define P_PPI0_D1 (P_DONTCARE) +#define P_PPI0_D2 (P_DONTCARE) +#define P_PPI0_D3 (P_DONTCARE) +#define P_PPI0_D4 (P_DONTCARE) +#define P_PPI0_D5 (P_DONTCARE) +#define P_PPI0_D6 (P_DONTCARE) +#define P_PPI0_D7 (P_DONTCARE) +#define P_PPI1_CLK (P_DONTCARE) +#define P_PPI1_FS1 (P_DONTCARE) +#define P_PPI1_FS2 (P_DONTCARE) +#define P_PPI1_FS3 (P_DONTCARE) +#define P_PPI1_D15 (P_DEFINED | P_IDENT(GPIO_PF39)) +#define P_PPI1_D14 (P_DEFINED | P_IDENT(GPIO_PF38)) +#define P_PPI1_D13 (P_DEFINED | P_IDENT(GPIO_PF37)) +#define P_PPI1_D12 (P_DEFINED | P_IDENT(GPIO_PF36)) +#define P_PPI1_D11 (P_DEFINED | P_IDENT(GPIO_PF35)) +#define P_PPI1_D10 (P_DEFINED | P_IDENT(GPIO_PF34)) +#define P_PPI1_D9 (P_DEFINED | P_IDENT(GPIO_PF33)) +#define P_PPI1_D8 (P_DEFINED | P_IDENT(GPIO_PF32)) +#define P_PPI1_D0 (P_DONTCARE) +#define P_PPI1_D1 (P_DONTCARE) +#define P_PPI1_D2 (P_DONTCARE) +#define P_PPI1_D3 (P_DONTCARE) +#define P_PPI1_D4 (P_DONTCARE) +#define P_PPI1_D5 (P_DONTCARE) +#define P_PPI1_D6 (P_DONTCARE) +#define P_PPI1_D7 (P_DONTCARE) +#define P_SPORT1_TSCLK (P_DEFINED | P_IDENT(GPIO_PF31)) +#define P_SPORT1_RSCLK (P_DEFINED | P_IDENT(GPIO_PF30)) +#define P_SPORT0_TSCLK (P_DEFINED | P_IDENT(GPIO_PF29)) +#define P_SPORT0_RSCLK (P_DEFINED | P_IDENT(GPIO_PF28)) +#define P_UART0_RX (P_DEFINED | P_IDENT(GPIO_PF27)) +#define P_UART0_TX (P_DEFINED | P_IDENT(GPIO_PF26)) +#define P_SPORT1_DRSEC (P_DEFINED | P_IDENT(GPIO_PF25)) +#define P_SPORT1_RFS (P_DEFINED | P_IDENT(GPIO_PF24)) +#define P_SPORT1_DTPRI (P_DEFINED | P_IDENT(GPIO_PF23)) +#define P_SPORT1_DTSEC (P_DEFINED | P_IDENT(GPIO_PF22)) +#define P_SPORT1_TFS (P_DEFINED | P_IDENT(GPIO_PF21)) +#define P_SPORT1_DRPRI (P_DONTCARE) +#define P_SPORT0_DRSEC (P_DEFINED | P_IDENT(GPIO_PF20)) +#define P_SPORT0_RFS (P_DEFINED | P_IDENT(GPIO_PF19)) +#define P_SPORT0_DTPRI (P_DEFINED | P_IDENT(GPIO_PF18)) +#define P_SPORT0_DTSEC (P_DEFINED | P_IDENT(GPIO_PF17)) +#define P_SPORT0_TFS (P_DEFINED | P_IDENT(GPIO_PF16)) +#define P_SPORT0_DRPRI (P_DONTCARE) +#define P_TMRCLK (P_DEFINED | P_IDENT(GPIO_PF15)) +#define P_SPI0_SSEL7 (P_DEFINED | P_IDENT(GPIO_PF7)) +#define P_SPI0_SSEL6 (P_DEFINED | P_IDENT(GPIO_PF6)) +#define P_SPI0_SSEL5 (P_DEFINED | P_IDENT(GPIO_PF5)) +#define P_SPI0_SSEL4 (P_DEFINED | P_IDENT(GPIO_PF4)) +#define P_SPI0_SSEL3 (P_DEFINED | P_IDENT(GPIO_PF3)) +#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(GPIO_PF2)) +#define P_SPI0_SSEL1 (P_DEFINED | P_IDENT(GPIO_PF1)) +#define P_SPI0_SS (P_DEFINED | P_IDENT(GPIO_PF0)) +#define P_TMR11 (P_DONTCARE) +#define P_TMR10 (P_DONTCARE) +#define P_TMR9 (P_DONTCARE) +#define P_TMR8 (P_DONTCARE) +#define P_TMR7 (P_DEFINED | P_IDENT(GPIO_PF7)) +#define P_TMR6 (P_DEFINED | P_IDENT(GPIO_PF6)) +#define P_TMR5 (P_DEFINED | P_IDENT(GPIO_PF5)) +#define P_TMR4 (P_DEFINED | P_IDENT(GPIO_PF4)) +#define P_TMR3 (P_DEFINED | P_IDENT(GPIO_PF3)) +#define P_TMR2 (P_DEFINED | P_IDENT(GPIO_PF2)) +#define P_TMR1 (P_DEFINED | P_IDENT(GPIO_PF1)) +#define P_TMR0 (P_DEFINED | P_IDENT(GPIO_PF0)) +#define P_SPI0_MOSI (P_DONTCARE) +#define P_SPI0_MIS0 (P_DONTCARE) +#define P_SPI0_SCK (P_DONTCARE) + +#endif /* _MACH_PORTMUX_H_ */ diff --git a/include/asm-blackfin/portmux.h b/include/asm-blackfin/portmux.h new file mode 100644 index 0000000000..9d3681e421 --- /dev/null +++ b/include/asm-blackfin/portmux.h @@ -0,0 +1,1133 @@ +/* + * Common header file for blackfin family of processors. + * + */ + +#ifndef _PORTMUX_H_ +#define _PORTMUX_H_ + +#define P_IDENT(x) ((x) & 0x1FF) +#define P_FUNCT(x) (((x) & 0x3) << 9) +#define P_FUNCT2MUX(x) (((x) >> 9) & 0x3) +#define P_DEFINED 0x8000 +#define P_UNDEF 0x4000 +#define P_MAYSHARE 0x2000 +#define P_DONTCARE 0x1000 + +#include +#include + +#ifndef P_SPORT2_TFS +#define P_SPORT2_TFS P_UNDEF +#endif + +#ifndef P_SPORT2_DTSEC +#define P_SPORT2_DTSEC P_UNDEF +#endif + +#ifndef P_SPORT2_DTPRI +#define P_SPORT2_DTPRI P_UNDEF +#endif + +#ifndef P_SPORT2_TSCLK +#define P_SPORT2_TSCLK P_UNDEF +#endif + +#ifndef P_SPORT2_RFS +#define P_SPORT2_RFS P_UNDEF +#endif + +#ifndef P_SPORT2_DRSEC +#define P_SPORT2_DRSEC P_UNDEF +#endif + +#ifndef P_SPORT2_DRPRI +#define P_SPORT2_DRPRI P_UNDEF +#endif + +#ifndef P_SPORT2_RSCLK +#define P_SPORT2_RSCLK P_UNDEF +#endif + +#ifndef P_SPORT3_TFS +#define P_SPORT3_TFS P_UNDEF +#endif + +#ifndef P_SPORT3_DTSEC +#define P_SPORT3_DTSEC P_UNDEF +#endif + +#ifndef P_SPORT3_DTPRI +#define P_SPORT3_DTPRI P_UNDEF +#endif + +#ifndef P_SPORT3_TSCLK +#define P_SPORT3_TSCLK P_UNDEF +#endif + +#ifndef P_SPORT3_RFS +#define P_SPORT3_RFS P_UNDEF +#endif + +#ifndef P_SPORT3_DRSEC +#define P_SPORT3_DRSEC P_UNDEF +#endif + +#ifndef P_SPORT3_DRPRI +#define P_SPORT3_DRPRI P_UNDEF +#endif + +#ifndef P_SPORT3_RSCLK +#define P_SPORT3_RSCLK P_UNDEF +#endif + +#ifndef P_TMR4 +#define P_TMR4 P_UNDEF +#endif + +#ifndef P_TMR5 +#define P_TMR5 P_UNDEF +#endif + +#ifndef P_TMR6 +#define P_TMR6 P_UNDEF +#endif + +#ifndef P_TMR7 +#define P_TMR7 P_UNDEF +#endif + +#ifndef P_TWI1_SCL +#define P_TWI1_SCL P_UNDEF +#endif + +#ifndef P_TWI1_SDA +#define P_TWI1_SDA P_UNDEF +#endif + +#ifndef P_UART3_RTS +#define P_UART3_RTS P_UNDEF +#endif + +#ifndef P_UART3_CTS +#define P_UART3_CTS P_UNDEF +#endif + +#ifndef P_UART2_TX +#define P_UART2_TX P_UNDEF +#endif + +#ifndef P_UART2_RX +#define P_UART2_RX P_UNDEF +#endif + +#ifndef P_UART3_TX +#define P_UART3_TX P_UNDEF +#endif + +#ifndef P_UART3_RX +#define P_UART3_RX P_UNDEF +#endif + +#ifndef P_SPI2_SS +#define P_SPI2_SS P_UNDEF +#endif + +#ifndef P_SPI2_SSEL1 +#define P_SPI2_SSEL1 P_UNDEF +#endif + +#ifndef P_SPI2_SSEL2 +#define P_SPI2_SSEL2 P_UNDEF +#endif + +#ifndef P_SPI2_SSEL3 +#define P_SPI2_SSEL3 P_UNDEF +#endif + +#ifndef P_SPI2_SCK +#define P_SPI2_SCK P_UNDEF +#endif + +#ifndef P_SPI2_MOSI +#define P_SPI2_MOSI P_UNDEF +#endif + +#ifndef P_SPI2_MISO +#define P_SPI2_MISO P_UNDEF +#endif + +#ifndef P_TMR0 +#define P_TMR0 P_UNDEF +#endif + +#ifndef P_TMR1 +#define P_TMR1 P_UNDEF +#endif + +#ifndef P_TMR2 +#define P_TMR2 P_UNDEF +#endif + +#ifndef P_TMR3 +#define P_TMR3 P_UNDEF +#endif + +#ifndef P_SPORT0_TFS +#define P_SPORT0_TFS P_UNDEF +#endif + +#ifndef P_SPORT0_DTSEC +#define P_SPORT0_DTSEC P_UNDEF +#endif + +#ifndef P_SPORT0_DTPRI +#define P_SPORT0_DTPRI P_UNDEF +#endif + +#ifndef P_SPORT0_TSCLK +#define P_SPORT0_TSCLK P_UNDEF +#endif + +#ifndef P_SPORT0_RFS +#define P_SPORT0_RFS P_UNDEF +#endif + +#ifndef P_SPORT0_DRSEC +#define P_SPORT0_DRSEC P_UNDEF +#endif + +#ifndef P_SPORT0_DRPRI +#define P_SPORT0_DRPRI P_UNDEF +#endif + +#ifndef P_SPORT0_RSCLK +#define P_SPORT0_RSCLK P_UNDEF +#endif + +#ifndef P_SD_D0 +#define P_SD_D0 P_UNDEF +#endif + +#ifndef P_SD_D1 +#define P_SD_D1 P_UNDEF +#endif + +#ifndef P_SD_D2 +#define P_SD_D2 P_UNDEF +#endif + +#ifndef P_SD_D3 +#define P_SD_D3 P_UNDEF +#endif + +#ifndef P_SD_CLK +#define P_SD_CLK P_UNDEF +#endif + +#ifndef P_SD_CMD +#define P_SD_CMD P_UNDEF +#endif + +#ifndef P_MMCLK +#define P_MMCLK P_UNDEF +#endif + +#ifndef P_MBCLK +#define P_MBCLK P_UNDEF +#endif + +#ifndef P_PPI1_D0 +#define P_PPI1_D0 P_UNDEF +#endif + +#ifndef P_PPI1_D1 +#define P_PPI1_D1 P_UNDEF +#endif + +#ifndef P_PPI1_D2 +#define P_PPI1_D2 P_UNDEF +#endif + +#ifndef P_PPI1_D3 +#define P_PPI1_D3 P_UNDEF +#endif + +#ifndef P_PPI1_D4 +#define P_PPI1_D4 P_UNDEF +#endif + +#ifndef P_PPI1_D5 +#define P_PPI1_D5 P_UNDEF +#endif + +#ifndef P_PPI1_D6 +#define P_PPI1_D6 P_UNDEF +#endif + +#ifndef P_PPI1_D7 +#define P_PPI1_D7 P_UNDEF +#endif + +#ifndef P_PPI1_D8 +#define P_PPI1_D8 P_UNDEF +#endif + +#ifndef P_PPI1_D9 +#define P_PPI1_D9 P_UNDEF +#endif + +#ifndef P_PPI1_D10 +#define P_PPI1_D10 P_UNDEF +#endif + +#ifndef P_PPI1_D11 +#define P_PPI1_D11 P_UNDEF +#endif + +#ifndef P_PPI1_D12 +#define P_PPI1_D12 P_UNDEF +#endif + +#ifndef P_PPI1_D13 +#define P_PPI1_D13 P_UNDEF +#endif + +#ifndef P_PPI1_D14 +#define P_PPI1_D14 P_UNDEF +#endif + +#ifndef P_PPI1_D15 +#define P_PPI1_D15 P_UNDEF +#endif + +#ifndef P_HOST_D8 +#define P_HOST_D8 P_UNDEF +#endif + +#ifndef P_HOST_D9 +#define P_HOST_D9 P_UNDEF +#endif + +#ifndef P_HOST_D10 +#define P_HOST_D10 P_UNDEF +#endif + +#ifndef P_HOST_D11 +#define P_HOST_D11 P_UNDEF +#endif + +#ifndef P_HOST_D12 +#define P_HOST_D12 P_UNDEF +#endif + +#ifndef P_HOST_D13 +#define P_HOST_D13 P_UNDEF +#endif + +#ifndef P_HOST_D14 +#define P_HOST_D14 P_UNDEF +#endif + +#ifndef P_HOST_D15 +#define P_HOST_D15 P_UNDEF +#endif + +#ifndef P_HOST_D0 +#define P_HOST_D0 P_UNDEF +#endif + +#ifndef P_HOST_D1 +#define P_HOST_D1 P_UNDEF +#endif + +#ifndef P_HOST_D2 +#define P_HOST_D2 P_UNDEF +#endif + +#ifndef P_HOST_D3 +#define P_HOST_D3 P_UNDEF +#endif + +#ifndef P_HOST_D4 +#define P_HOST_D4 P_UNDEF +#endif + +#ifndef P_HOST_D5 +#define P_HOST_D5 P_UNDEF +#endif + +#ifndef P_HOST_D6 +#define P_HOST_D6 P_UNDEF +#endif + +#ifndef P_HOST_D7 +#define P_HOST_D7 P_UNDEF +#endif + +#ifndef P_SPORT1_TFS +#define P_SPORT1_TFS P_UNDEF +#endif + +#ifndef P_SPORT1_DTSEC +#define P_SPORT1_DTSEC P_UNDEF +#endif + +#ifndef P_SPORT1_DTPRI +#define P_SPORT1_DTPRI P_UNDEF +#endif + +#ifndef P_SPORT1_TSCLK +#define P_SPORT1_TSCLK P_UNDEF +#endif + +#ifndef P_SPORT1_RFS +#define P_SPORT1_RFS P_UNDEF +#endif + +#ifndef P_SPORT1_DRSEC +#define P_SPORT1_DRSEC P_UNDEF +#endif + +#ifndef P_SPORT1_DRPRI +#define P_SPORT1_DRPRI P_UNDEF +#endif + +#ifndef P_SPORT1_RSCLK +#define P_SPORT1_RSCLK P_UNDEF +#endif + +#ifndef P_PPI2_D0 +#define P_PPI2_D0 P_UNDEF +#endif + +#ifndef P_PPI2_D1 +#define P_PPI2_D1 P_UNDEF +#endif + +#ifndef P_PPI2_D2 +#define P_PPI2_D2 P_UNDEF +#endif + +#ifndef P_PPI2_D3 +#define P_PPI2_D3 P_UNDEF +#endif + +#ifndef P_PPI2_D4 +#define P_PPI2_D4 P_UNDEF +#endif + +#ifndef P_PPI2_D5 +#define P_PPI2_D5 P_UNDEF +#endif + +#ifndef P_PPI2_D6 +#define P_PPI2_D6 P_UNDEF +#endif + +#ifndef P_PPI2_D7 +#define P_PPI2_D7 P_UNDEF +#endif + +#ifndef P_PPI0_D18 +#define P_PPI0_D18 P_UNDEF +#endif + +#ifndef P_PPI0_D19 +#define P_PPI0_D19 P_UNDEF +#endif + +#ifndef P_PPI0_D20 +#define P_PPI0_D20 P_UNDEF +#endif + +#ifndef P_PPI0_D21 +#define P_PPI0_D21 P_UNDEF +#endif + +#ifndef P_PPI0_D22 +#define P_PPI0_D22 P_UNDEF +#endif + +#ifndef P_PPI0_D23 +#define P_PPI0_D23 P_UNDEF +#endif + +#ifndef P_KEY_ROW0 +#define P_KEY_ROW0 P_UNDEF +#endif + +#ifndef P_KEY_ROW1 +#define P_KEY_ROW1 P_UNDEF +#endif + +#ifndef P_KEY_ROW2 +#define P_KEY_ROW2 P_UNDEF +#endif + +#ifndef P_KEY_ROW3 +#define P_KEY_ROW3 P_UNDEF +#endif + +#ifndef P_KEY_COL0 +#define P_KEY_COL0 P_UNDEF +#endif + +#ifndef P_KEY_COL1 +#define P_KEY_COL1 P_UNDEF +#endif + +#ifndef P_KEY_COL2 +#define P_KEY_COL2 P_UNDEF +#endif + +#ifndef P_KEY_COL3 +#define P_KEY_COL3 P_UNDEF +#endif + +#ifndef P_SPI0_SCK +#define P_SPI0_SCK P_UNDEF +#endif + +#ifndef P_SPI0_MISO +#define P_SPI0_MISO P_UNDEF +#endif + +#ifndef P_SPI0_MOSI +#define P_SPI0_MOSI P_UNDEF +#endif + +#ifndef P_SPI0_SS +#define P_SPI0_SS P_UNDEF +#endif + +#ifndef P_SPI0_SSEL1 +#define P_SPI0_SSEL1 P_UNDEF +#endif + +#ifndef P_SPI0_SSEL2 +#define P_SPI0_SSEL2 P_UNDEF +#endif + +#ifndef P_SPI0_SSEL3 +#define P_SPI0_SSEL3 P_UNDEF +#endif + +#ifndef P_UART0_TX +#define P_UART0_TX P_UNDEF +#endif + +#ifndef P_UART0_RX +#define P_UART0_RX P_UNDEF +#endif + +#ifndef P_UART1_RTS +#define P_UART1_RTS P_UNDEF +#endif + +#ifndef P_UART1_CTS +#define P_UART1_CTS P_UNDEF +#endif + +#ifndef P_PPI1_CLK +#define P_PPI1_CLK P_UNDEF +#endif + +#ifndef P_PPI1_FS1 +#define P_PPI1_FS1 P_UNDEF +#endif + +#ifndef P_PPI1_FS2 +#define P_PPI1_FS2 P_UNDEF +#endif + +#ifndef P_TWI0_SCL +#define P_TWI0_SCL P_UNDEF +#endif + +#ifndef P_TWI0_SDA +#define P_TWI0_SDA P_UNDEF +#endif + +#ifndef P_KEY_COL7 +#define P_KEY_COL7 P_UNDEF +#endif + +#ifndef P_KEY_ROW6 +#define P_KEY_ROW6 P_UNDEF +#endif + +#ifndef P_KEY_COL6 +#define P_KEY_COL6 P_UNDEF +#endif + +#ifndef P_KEY_ROW5 +#define P_KEY_ROW5 P_UNDEF +#endif + +#ifndef P_KEY_COL5 +#define P_KEY_COL5 P_UNDEF +#endif + +#ifndef P_KEY_ROW4 +#define P_KEY_ROW4 P_UNDEF +#endif + +#ifndef P_KEY_COL4 +#define P_KEY_COL4 P_UNDEF +#endif + +#ifndef P_KEY_ROW7 +#define P_KEY_ROW7 P_UNDEF +#endif + +#ifndef P_PPI0_D0 +#define P_PPI0_D0 P_UNDEF +#endif + +#ifndef P_PPI0_D1 +#define P_PPI0_D1 P_UNDEF +#endif + +#ifndef P_PPI0_D2 +#define P_PPI0_D2 P_UNDEF +#endif + +#ifndef P_PPI0_D3 +#define P_PPI0_D3 P_UNDEF +#endif + +#ifndef P_PPI0_D4 +#define P_PPI0_D4 P_UNDEF +#endif + +#ifndef P_PPI0_D5 +#define P_PPI0_D5 P_UNDEF +#endif + +#ifndef P_PPI0_D6 +#define P_PPI0_D6 P_UNDEF +#endif + +#ifndef P_PPI0_D7 +#define P_PPI0_D7 P_UNDEF +#endif + +#ifndef P_PPI0_D8 +#define P_PPI0_D8 P_UNDEF +#endif + +#ifndef P_PPI0_D9 +#define P_PPI0_D9 P_UNDEF +#endif + +#ifndef P_PPI0_D10 +#define P_PPI0_D10 P_UNDEF +#endif + +#ifndef P_PPI0_D11 +#define P_PPI0_D11 P_UNDEF +#endif + +#ifndef P_PPI0_D12 +#define P_PPI0_D12 P_UNDEF +#endif + +#ifndef P_PPI0_D13 +#define P_PPI0_D13 P_UNDEF +#endif + +#ifndef P_PPI0_D14 +#define P_PPI0_D14 P_UNDEF +#endif + +#ifndef P_PPI0_D15 +#define P_PPI0_D15 P_UNDEF +#endif + +#ifndef P_ATAPI_D0A +#define P_ATAPI_D0A P_UNDEF +#endif + +#ifndef P_ATAPI_D1A +#define P_ATAPI_D1A P_UNDEF +#endif + +#ifndef P_ATAPI_D2A +#define P_ATAPI_D2A P_UNDEF +#endif + +#ifndef P_ATAPI_D3A +#define P_ATAPI_D3A P_UNDEF +#endif + +#ifndef P_ATAPI_D4A +#define P_ATAPI_D4A P_UNDEF +#endif + +#ifndef P_ATAPI_D5A +#define P_ATAPI_D5A P_UNDEF +#endif + +#ifndef P_ATAPI_D6A +#define P_ATAPI_D6A P_UNDEF +#endif + +#ifndef P_ATAPI_D7A +#define P_ATAPI_D7A P_UNDEF +#endif + +#ifndef P_ATAPI_D8A +#define P_ATAPI_D8A P_UNDEF +#endif + +#ifndef P_ATAPI_D9A +#define P_ATAPI_D9A P_UNDEF +#endif + +#ifndef P_ATAPI_D10A +#define P_ATAPI_D10A P_UNDEF +#endif + +#ifndef P_ATAPI_D11A +#define P_ATAPI_D11A P_UNDEF +#endif + +#ifndef P_ATAPI_D12A +#define P_ATAPI_D12A P_UNDEF +#endif + +#ifndef P_ATAPI_D13A +#define P_ATAPI_D13A P_UNDEF +#endif + +#ifndef P_ATAPI_D14A +#define P_ATAPI_D14A P_UNDEF +#endif + +#ifndef P_ATAPI_D15A +#define P_ATAPI_D15A P_UNDEF +#endif + +#ifndef P_PPI0_CLK +#define P_PPI0_CLK P_UNDEF +#endif + +#ifndef P_PPI0_FS1 +#define P_PPI0_FS1 P_UNDEF +#endif + +#ifndef P_PPI0_FS2 +#define P_PPI0_FS2 P_UNDEF +#endif + +#ifndef P_PPI0_D16 +#define P_PPI0_D16 P_UNDEF +#endif + +#ifndef P_PPI0_D17 +#define P_PPI0_D17 P_UNDEF +#endif + +#ifndef P_SPI1_SSEL1 +#define P_SPI1_SSEL1 P_UNDEF +#endif + +#ifndef P_SPI1_SSEL2 +#define P_SPI1_SSEL2 P_UNDEF +#endif + +#ifndef P_SPI1_SSEL3 +#define P_SPI1_SSEL3 P_UNDEF +#endif + +#ifndef P_SPI1_SCK +#define P_SPI1_SCK P_UNDEF +#endif + +#ifndef P_SPI1_MISO +#define P_SPI1_MISO P_UNDEF +#endif + +#ifndef P_SPI1_MOSI +#define P_SPI1_MOSI P_UNDEF +#endif + +#ifndef P_SPI1_SS +#define P_SPI1_SS P_UNDEF +#endif + +#ifndef P_CAN0_TX +#define P_CAN0_TX P_UNDEF +#endif + +#ifndef P_CAN0_RX +#define P_CAN0_RX P_UNDEF +#endif + +#ifndef P_CAN1_TX +#define P_CAN1_TX P_UNDEF +#endif + +#ifndef P_CAN1_RX +#define P_CAN1_RX P_UNDEF +#endif + +#ifndef P_ATAPI_A0A +#define P_ATAPI_A0A P_UNDEF +#endif + +#ifndef P_ATAPI_A1A +#define P_ATAPI_A1A P_UNDEF +#endif + +#ifndef P_ATAPI_A2A +#define P_ATAPI_A2A P_UNDEF +#endif + +#ifndef P_HOST_CE +#define P_HOST_CE P_UNDEF +#endif + +#ifndef P_HOST_RD +#define P_HOST_RD P_UNDEF +#endif + +#ifndef P_HOST_WR +#define P_HOST_WR P_UNDEF +#endif + +#ifndef P_MTXONB +#define P_MTXONB P_UNDEF +#endif + +#ifndef P_PPI2_FS2 +#define P_PPI2_FS2 P_UNDEF +#endif + +#ifndef P_PPI2_FS1 +#define P_PPI2_FS1 P_UNDEF +#endif + +#ifndef P_PPI2_CLK +#define P_PPI2_CLK P_UNDEF +#endif + +#ifndef P_CNT_CZM +#define P_CNT_CZM P_UNDEF +#endif + +#ifndef P_UART1_TX +#define P_UART1_TX P_UNDEF +#endif + +#ifndef P_UART1_RX +#define P_UART1_RX P_UNDEF +#endif + +#ifndef P_ATAPI_RESET +#define P_ATAPI_RESET P_UNDEF +#endif + +#ifndef P_HOST_ADDR +#define P_HOST_ADDR P_UNDEF +#endif + +#ifndef P_HOST_ACK +#define P_HOST_ACK P_UNDEF +#endif + +#ifndef P_MTX +#define P_MTX P_UNDEF +#endif + +#ifndef P_MRX +#define P_MRX P_UNDEF +#endif + +#ifndef P_MRXONB +#define P_MRXONB P_UNDEF +#endif + +#ifndef P_A4 +#define P_A4 P_UNDEF +#endif + +#ifndef P_A5 +#define P_A5 P_UNDEF +#endif + +#ifndef P_A6 +#define P_A6 P_UNDEF +#endif + +#ifndef P_A7 +#define P_A7 P_UNDEF +#endif + +#ifndef P_A8 +#define P_A8 P_UNDEF +#endif + +#ifndef P_A9 +#define P_A9 P_UNDEF +#endif + +#ifndef P_PPI1_FS3 +#define P_PPI1_FS3 P_UNDEF +#endif + +#ifndef P_PPI2_FS3 +#define P_PPI2_FS3 P_UNDEF +#endif + +#ifndef P_TMR8 +#define P_TMR8 P_UNDEF +#endif + +#ifndef P_TMR9 +#define P_TMR9 P_UNDEF +#endif + +#ifndef P_TMR10 +#define P_TMR10 P_UNDEF +#endif +#ifndef P_TMR11 +#define P_TMR11 P_UNDEF +#endif + +#ifndef P_DMAR0 +#define P_DMAR0 P_UNDEF +#endif + +#ifndef P_DMAR1 +#define P_DMAR1 P_UNDEF +#endif + +#ifndef P_PPI0_FS3 +#define P_PPI0_FS3 P_UNDEF +#endif + +#ifndef P_CNT_CDG +#define P_CNT_CDG P_UNDEF +#endif + +#ifndef P_CNT_CUD +#define P_CNT_CUD P_UNDEF +#endif + +#ifndef P_A10 +#define P_A10 P_UNDEF +#endif + +#ifndef P_A11 +#define P_A11 P_UNDEF +#endif + +#ifndef P_A12 +#define P_A12 P_UNDEF +#endif + +#ifndef P_A13 +#define P_A13 P_UNDEF +#endif + +#ifndef P_A14 +#define P_A14 P_UNDEF +#endif + +#ifndef P_A15 +#define P_A15 P_UNDEF +#endif + +#ifndef P_A16 +#define P_A16 P_UNDEF +#endif + +#ifndef P_A17 +#define P_A17 P_UNDEF +#endif + +#ifndef P_A18 +#define P_A18 P_UNDEF +#endif + +#ifndef P_A19 +#define P_A19 P_UNDEF +#endif + +#ifndef P_A20 +#define P_A20 P_UNDEF +#endif + +#ifndef P_A21 +#define P_A21 P_UNDEF +#endif + +#ifndef P_A22 +#define P_A22 P_UNDEF +#endif + +#ifndef P_A23 +#define P_A23 P_UNDEF +#endif + +#ifndef P_A24 +#define P_A24 P_UNDEF +#endif + +#ifndef P_A25 +#define P_A25 P_UNDEF +#endif + +#ifndef P_NOR_CLK +#define P_NOR_CLK P_UNDEF +#endif + +#ifndef P_TMRCLK +#define P_TMRCLK P_UNDEF +#endif + +#ifndef P_AMC_ARDY_NOR_WAIT +#define P_AMC_ARDY_NOR_WAIT P_UNDEF +#endif + +#ifndef P_NAND_CE +#define P_NAND_CE P_UNDEF +#endif + +#ifndef P_NAND_RB +#define P_NAND_RB P_UNDEF +#endif + +#ifndef P_ATAPI_DIOR +#define P_ATAPI_DIOR P_UNDEF +#endif + +#ifndef P_ATAPI_DIOW +#define P_ATAPI_DIOW P_UNDEF +#endif + +#ifndef P_ATAPI_CS0 +#define P_ATAPI_CS0 P_UNDEF +#endif + +#ifndef P_ATAPI_CS1 +#define P_ATAPI_CS1 P_UNDEF +#endif + +#ifndef P_ATAPI_DMACK +#define P_ATAPI_DMACK P_UNDEF +#endif + +#ifndef P_ATAPI_DMARQ +#define P_ATAPI_DMARQ P_UNDEF +#endif + +#ifndef P_ATAPI_INTRQ +#define P_ATAPI_INTRQ P_UNDEF +#endif + +#ifndef P_ATAPI_IORDY +#define P_ATAPI_IORDY P_UNDEF +#endif + +#ifndef P_AMC_BR +#define P_AMC_BR P_UNDEF +#endif + +#ifndef P_AMC_BG +#define P_AMC_BG P_UNDEF +#endif + +#ifndef P_AMC_BGH +#define P_AMC_BGH P_UNDEF +#endif + +/* EMAC */ + +#ifndef P_MII0_ETxD0 +#define P_MII0_ETxD0 P_UNDEF +#endif + +#ifndef P_MII0_ETxD1 +#define P_MII0_ETxD1 P_UNDEF +#endif + +#ifndef P_MII0_ETxD2 +#define P_MII0_ETxD2 P_UNDEF +#endif + +#ifndef P_MII0_ETxD3 +#define P_MII0_ETxD3 P_UNDEF +#endif + +#ifndef P_MII0_ETxEN +#define P_MII0_ETxEN P_UNDEF +#endif + +#ifndef P_MII0_TxCLK +#define P_MII0_TxCLK P_UNDEF +#endif + +#ifndef P_MII0_PHYINT +#define P_MII0_PHYINT P_UNDEF +#endif + +#ifndef P_MII0_COL +#define P_MII0_COL P_UNDEF +#endif + +#ifndef P_MII0_ERxD0 +#define P_MII0_ERxD0 P_UNDEF +#endif + +#ifndef P_MII0_ERxD1 +#define P_MII0_ERxD1 P_UNDEF +#endif + +#ifndef P_MII0_ERxD2 +#define P_MII0_ERxD2 P_UNDEF +#endif + +#ifndef P_MII0_ERxD3 +#define P_MII0_ERxD3 P_UNDEF +#endif + +#ifndef P_MII0_ERxDV +#define P_MII0_ERxDV P_UNDEF +#endif + +#ifndef P_MII0_ERxCLK +#define P_MII0_ERxCLK P_UNDEF +#endif + +#ifndef P_MII0_ERxER +#define P_MII0_ERxER P_UNDEF +#endif + +#ifndef P_MII0_CRS +#define P_MII0_CRS P_UNDEF +#endif + +#ifndef P_RMII0_REF_CLK +#define P_RMII0_REF_CLK P_UNDEF +#endif + +#ifndef P_RMII0_MDINT +#define P_RMII0_MDINT P_UNDEF +#endif + +#ifndef P_RMII0_CRS_DV +#define P_RMII0_CRS_DV P_UNDEF +#endif + +#ifndef P_MDC +#define P_MDC P_UNDEF +#endif + +#ifndef P_MDIO +#define P_MDIO P_UNDEF +#endif + +#endif /* _PORTMUX_H_ */ -- cgit v1.2.2 From c04d66bbbdbbc7b5d55c42795f29e494190f8fb3 Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Thu, 12 Jul 2007 17:26:31 +0800 Subject: Blackfin arch: clean up some coding style issues Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf548/cdefBF54x_base.h | 1 - include/asm-blackfin/mach-bf561/cdefBF561.h | 1 - include/asm-blackfin/mman.h | 2 -- 3 files changed, 4 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h index 87f2385ed9..98d35a9291 100644 --- a/include/asm-blackfin/mach-bf548/cdefBF54x_base.h +++ b/include/asm-blackfin/mach-bf548/cdefBF54x_base.h @@ -68,7 +68,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) bfin_write32(SIC_IWR0, iwr0); bfin_write32(SIC_IWR1, iwr1); bfin_write32(SIC_IWR2, iwr2); - } #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val) diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h index 6e8b8168a9..1a8ec9e469 100644 --- a/include/asm-blackfin/mach-bf561/cdefBF561.h +++ b/include/asm-blackfin/mach-bf561/cdefBF561.h @@ -74,7 +74,6 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val) local_irq_restore(flags); bfin_write32(SICA_IWR0, iwr0); bfin_write32(SICA_IWR1, iwr1); - } #define bfin_read_PLL_STAT() bfin_read16(PLL_STAT) #define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT,val) diff --git a/include/asm-blackfin/mman.h b/include/asm-blackfin/mman.h index 4d504f908c..b58f5ad3f0 100644 --- a/include/asm-blackfin/mman.h +++ b/include/asm-blackfin/mman.h @@ -22,8 +22,6 @@ #define MAP_NORESERVE 0x4000 /* don't check for reservations */ #define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ #define MAP_NONBLOCK 0x10000 /* do not block on IO */ -#define MAP_UNINITIALIZE 0x4000000 /* For anonymous mmap, memory could - be uninitialized. */ #define MS_ASYNC 1 /* sync memory asynchronously */ #define MS_INVALIDATE 2 /* invalidate the caches */ -- cgit v1.2.2 From e745106ce34553171a5d8d2450be07c0cffe39d5 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Thu, 12 Jul 2007 15:20:25 +0800 Subject: Blackfin arch: set up gpio interrupt IRQ_PJ9 for BF54x ATAPI PATA driver Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf548/irq.h | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf548/irq.h b/include/asm-blackfin/mach-bf548/irq.h index 58c87f04e0..0b3325bb1f 100644 --- a/include/asm-blackfin/mach-bf548/irq.h +++ b/include/asm-blackfin/mach-bf548/irq.h @@ -318,7 +318,6 @@ Events (highest priority) EMU 0 #define IRQ_PI14 BFIN_PI_IRQ(14) #define IRQ_PI15 BFIN_PI_IRQ(15) -#if 0 #define BFIN_PJ_IRQ(x) ((x) + IRQ_PI15 + 1) #define IRQ_PJ0 BFIN_PJ_IRQ(0) #define IRQ_PJ1 BFIN_PJ_IRQ(1) @@ -336,10 +335,9 @@ Events (highest priority) EMU 0 #define IRQ_PJ13 BFIN_PJ_IRQ(13) #define IRQ_PJ14 BFIN_PJ_IRQ(14) /* N/A */ #define IRQ_PJ15 BFIN_PJ_IRQ(15) /* N/A */ -#endif #ifdef CONFIG_IRQCHIP_DEMUX_GPIO -#define NR_IRQS (IRQ_PI15+1) +#define NR_IRQS (IRQ_PJ15+1) #else #define NR_IRQS (SYS_IRQS+1) #endif -- cgit v1.2.2 From 61b59563266aa6bedaf5d45b9b25bc48bb4d3ed3 Mon Sep 17 00:00:00 2001 From: Sonic Zhang Date: Thu, 12 Jul 2007 17:06:45 +0800 Subject: Blackfin arch: Add peripheral io API to gpio header file Signed-off-by: Sonic Zhang Signed-off-by: Bryan Wu --- include/asm-blackfin/mach-bf548/gpio.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-blackfin/mach-bf548/gpio.h b/include/asm-blackfin/mach-bf548/gpio.h index 8c5847a668..dbf66bcabe 100644 --- a/include/asm-blackfin/mach-bf548/gpio.h +++ b/include/asm-blackfin/mach-bf548/gpio.h @@ -210,3 +210,7 @@ struct gpio_port_t { unsigned int port_mux; }; +int gpio_request(unsigned short gpio, const char *label); +void peripheral_free(unsigned short per); +int peripheral_request_list(unsigned short per[], const char *label); +void peripheral_free_list(unsigned short per[]); -- cgit v1.2.2 From 3e062b07ada88edb9ffdd147e39c7df4b4418f64 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Tue, 5 Jun 2007 16:36:55 +0100 Subject: [ARM] 4430/1: davinci: clock control support Support clock control driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov Signed-off-by: Kevin Hilman Signed-off-by: Russell King --- include/asm-arm/arch-davinci/clock.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 include/asm-arm/arch-davinci/clock.h (limited to 'include') diff --git a/include/asm-arm/arch-davinci/clock.h b/include/asm-arm/arch-davinci/clock.h new file mode 100644 index 0000000000..cc168b7a14 --- /dev/null +++ b/include/asm-arm/arch-davinci/clock.h @@ -0,0 +1,22 @@ +/* + * include/asm-arm/arch-davinci/clock.h + * + * Clock control driver for DaVinci - header file + * + * Authors: Vladimir Barinov + * + * 2007 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ASM_ARCH_DAVINCI_CLOCK_H +#define __ASM_ARCH_DAVINCI_CLOCK_H + +struct clk; + +extern int clk_register(struct clk *clk); +extern void clk_unregister(struct clk *clk); +extern int davinci_clk_init(void); + +#endif -- cgit v1.2.2 From 3d9edf09d4525dad95f98b31f31aa86b8071fab9 Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Tue, 10 Jul 2007 13:03:43 +0100 Subject: [ARM] 4457/2: davinci: GPIO support Support GPIO driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov Acked-by: David Brownell Acked-by: Kevin Hilman Signed-off-by: Russell King --- include/asm-arm/arch-davinci/gpio.h | 156 ++++++++++++++++++++++++++++++++ include/asm-arm/arch-davinci/hardware.h | 38 ++++++++ 2 files changed, 194 insertions(+) create mode 100644 include/asm-arm/arch-davinci/gpio.h (limited to 'include') diff --git a/include/asm-arm/arch-davinci/gpio.h b/include/asm-arm/arch-davinci/gpio.h new file mode 100644 index 0000000000..ea24a0e0bf --- /dev/null +++ b/include/asm-arm/arch-davinci/gpio.h @@ -0,0 +1,156 @@ +/* + * TI DaVinci GPIO Support + * + * Copyright (c) 2006 David Brownell + * Copyright (c) 2007, MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __DAVINCI_GPIO_H +#define __DAVINCI_GPIO_H + +/* + * basic gpio routines + * + * board-specific init should be done by arch/.../.../board-XXX.c (maybe + * initializing banks together) rather than boot loaders; kexec() won't + * go through boot loaders. + * + * the gpio clock will be turned on when gpios are used, and you may also + * need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are + * used as gpios, not with other peripherals. + * + * GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation, and maybe + * for later updates, code should write GPIO(N) or: + * - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53) + * - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70) + * + * For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc + * for now, that's != GPIO(N) + */ +#define GPIO(X) (X) /* 0 <= X <= 70 */ +#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */ +#define GPIOV33(X) ((X)+54) /* 3.3V i/o; 0 <= X <= 17 */ + +struct gpio_controller { + u32 dir; + u32 out_data; + u32 set_data; + u32 clr_data; + u32 in_data; + u32 set_rising; + u32 clr_rising; + u32 set_falling; + u32 clr_falling; + u32 intstat; +}; + +/* The __gpio_to_controller() and __gpio_mask() functions inline to constants + * with constant parameters; or in outlined code they execute at runtime. + * + * You'd access the controller directly when reading or writing more than + * one gpio value at a time, and to support wired logic where the value + * being driven by the cpu need not match the value read back. + * + * These are NOT part of the cross-platform GPIO interface + */ +static inline struct gpio_controller *__iomem +__gpio_to_controller(unsigned gpio) +{ + void *__iomem ptr; + + if (gpio < 32) + ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10); + else if (gpio < 64) + ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38); + else if (gpio < DAVINCI_N_GPIO) + ptr = (void *__iomem)IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60); + else + ptr = NULL; + return ptr; +} + +static inline u32 __gpio_mask(unsigned gpio) +{ + return 1 << (gpio % 32); +} + +/* The get/set/clear functions will inline when called with constant + * parameters, for low-overhead bitbanging. Illegal constant parameters + * cause link-time errors. + * + * Otherwise, calls with variable parameters use outlined functions. + */ +extern int __error_inval_gpio(void); + +extern void __gpio_set(unsigned gpio, int value); +extern int __gpio_get(unsigned gpio); + +static inline void gpio_set_value(unsigned gpio, int value) +{ + if (__builtin_constant_p(value)) { + struct gpio_controller *__iomem g; + u32 mask; + + if (gpio >= DAVINCI_N_GPIO) + __error_inval_gpio(); + + g = __gpio_to_controller(gpio); + mask = __gpio_mask(gpio); + if (value) + __raw_writel(mask, &g->set_data); + else + __raw_writel(mask, &g->clr_data); + return; + } + + __gpio_set(gpio, value); +} + +/* Returns zero or nonzero; works for gpios configured as inputs OR + * as outputs. + * + * NOTE: changes in reported values are synchronized to the GPIO clock. + * This is most easily seen after calling gpio_set_value() and then immediatly + * gpio_get_value(), where the gpio_get_value() would return the old value + * until the GPIO clock ticks and the new value gets latched. + */ + +static inline int gpio_get_value(unsigned gpio) +{ + struct gpio_controller *__iomem g; + + if (!__builtin_constant_p(gpio)) + return __gpio_get(gpio); + + if (gpio >= DAVINCI_N_GPIO) + return __error_inval_gpio(); + + g = __gpio_to_controller(gpio); + return !!(__gpio_mask(gpio) & __raw_readl(&g->in_data)); +} + +/* powerup default direction is IN */ +extern int gpio_direction_input(unsigned gpio); +extern int gpio_direction_output(unsigned gpio, int value); + +#include /* cansleep wrappers */ + +extern int gpio_request(unsigned gpio, const char *tag); +extern void gpio_free(unsigned gpio); + +static inline int gpio_to_irq(unsigned gpio) +{ + return DAVINCI_N_AINTC_IRQ + gpio; +} + +static inline int irq_to_gpio(unsigned irq) +{ + return irq - DAVINCI_N_AINTC_IRQ; +} + +#endif /* __DAVINCI_GPIO_H */ diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h index 60362d8022..a2e8969afa 100644 --- a/include/asm-arm/arch-davinci/hardware.h +++ b/include/asm-arm/arch-davinci/hardware.h @@ -11,4 +11,42 @@ #ifndef __ASM_ARCH_HARDWARE_H #define __ASM_ARCH_HARDWARE_H +/* + * Base register addresses + */ +#define DAVINCI_DMA_3PCC_BASE (0x01C00000) +#define DAVINCI_DMA_3PTC0_BASE (0x01C10000) +#define DAVINCI_DMA_3PTC1_BASE (0x01C10400) +#define DAVINCI_I2C_BASE (0x01C21000) +#define DAVINCI_PWM0_BASE (0x01C22000) +#define DAVINCI_PWM1_BASE (0x01C22400) +#define DAVINCI_PWM2_BASE (0x01C22800) +#define DAVINCI_SYSTEM_MODULE_BASE (0x01C40000) +#define DAVINCI_PLL_CNTRL0_BASE (0x01C40800) +#define DAVINCI_PLL_CNTRL1_BASE (0x01C40C00) +#define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01C41000) +#define DAVINCI_SYSTEM_DFT_BASE (0x01C42000) +#define DAVINCI_IEEE1394_BASE (0x01C60000) +#define DAVINCI_USB_OTG_BASE (0x01C64000) +#define DAVINCI_CFC_ATA_BASE (0x01C66000) +#define DAVINCI_SPI_BASE (0x01C66800) +#define DAVINCI_GPIO_BASE (0x01C67000) +#define DAVINCI_UHPI_BASE (0x01C67800) +#define DAVINCI_VPSS_REGS_BASE (0x01C70000) +#define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01C80000) +#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01C81000) +#define DAVINCI_EMAC_WRAPPER_RAM_BASE (0x01C82000) +#define DAVINCI_MDIO_CNTRL_REGS_BASE (0x01C84000) +#define DAVINCI_IMCOP_BASE (0x01CC0000) +#define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01E00000) +#define DAVINCI_VLYNQ_BASE (0x01E01000) +#define DAVINCI_MCBSP_BASE (0x01E02000) +#define DAVINCI_MMC_SD_BASE (0x01E10000) +#define DAVINCI_MS_BASE (0x01E20000) +#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000) +#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000) +#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000) +#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000) +#define DAVINCI_VLYNQ_REMOTE_BASE (0x0C000000) + #endif /* __ASM_ARCH_HARDWARE_H */ -- cgit v1.2.2 From 83f53220f8313f097cdf181928be13bafbb697ea Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Tue, 10 Jul 2007 13:10:04 +0100 Subject: [ARM] 4432/5: davinci: pin mux support Support pin multiplexing configurations driver for TI DaVinci SoC Signed-off-by: Vladimir Barinov Acked-by: Kevin Hilman Signed-off-by: Russell King --- include/asm-arm/arch-davinci/mux.h | 55 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 include/asm-arm/arch-davinci/mux.h (limited to 'include') diff --git a/include/asm-arm/arch-davinci/mux.h b/include/asm-arm/arch-davinci/mux.h new file mode 100644 index 0000000000..c24b678280 --- /dev/null +++ b/include/asm-arm/arch-davinci/mux.h @@ -0,0 +1,55 @@ +/* + * DaVinci pin multiplexing defines + * + * Author: Vladimir Barinov, MontaVista Software, Inc. + * + * 2007 (c) MontaVista Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + */ +#ifndef __ASM_ARCH_MUX_H +#define __ASM_ARCH_MUX_H + +#define DAVINCI_MUX_AEAW0 0 +#define DAVINCI_MUX_AEAW1 1 +#define DAVINCI_MUX_AEAW2 2 +#define DAVINCI_MUX_AEAW3 3 +#define DAVINCI_MUX_AEAW4 4 +#define DAVINCI_MUX_AECS4 10 +#define DAVINCI_MUX_AECS5 11 +#define DAVINCI_MUX_VLYNQWD0 12 +#define DAVINCI_MUX_VLYNQWD1 13 +#define DAVINCI_MUX_VLSCREN 14 +#define DAVINCI_MUX_VLYNQEN 15 +#define DAVINCI_MUX_HDIREN 16 +#define DAVINCI_MUX_ATAEN 17 +#define DAVINCI_MUX_RGB666 22 +#define DAVINCI_MUX_RGB888 23 +#define DAVINCI_MUX_LOEEN 24 +#define DAVINCI_MUX_LFLDEN 25 +#define DAVINCI_MUX_CWEN 26 +#define DAVINCI_MUX_CFLDEN 27 +#define DAVINCI_MUX_HPIEN 29 +#define DAVINCI_MUX_1394EN 30 +#define DAVINCI_MUX_EMACEN 31 + +#define DAVINCI_MUX_LEVEL2 32 +#define DAVINCI_MUX_UART0 (DAVINCI_MUX_LEVEL2 + 0) +#define DAVINCI_MUX_UART1 (DAVINCI_MUX_LEVEL2 + 1) +#define DAVINCI_MUX_UART2 (DAVINCI_MUX_LEVEL2 + 2) +#define DAVINCI_MUX_U2FLO (DAVINCI_MUX_LEVEL2 + 3) +#define DAVINCI_MUX_PWM0 (DAVINCI_MUX_LEVEL2 + 4) +#define DAVINCI_MUX_PWM1 (DAVINCI_MUX_LEVEL2 + 5) +#define DAVINCI_MUX_PWM2 (DAVINCI_MUX_LEVEL2 + 6) +#define DAVINCI_MUX_I2C (DAVINCI_MUX_LEVEL2 + 7) +#define DAVINCI_MUX_SPI (DAVINCI_MUX_LEVEL2 + 8) +#define DAVINCI_MUX_MSTK (DAVINCI_MUX_LEVEL2 + 9) +#define DAVINCI_MUX_ASP (DAVINCI_MUX_LEVEL2 + 10) +#define DAVINCI_MUX_CLK0 (DAVINCI_MUX_LEVEL2 + 16) +#define DAVINCI_MUX_CLK1 (DAVINCI_MUX_LEVEL2 + 17) +#define DAVINCI_MUX_TIMIN (DAVINCI_MUX_LEVEL2 + 18) + +extern void davinci_mux_peripheral(unsigned int mux, unsigned int enable); + +#endif /* __ASM_ARCH_MUX_H */ -- cgit v1.2.2 From b54942f8203689014f80ec89c55ccb1f48ab1166 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 18 May 2007 06:28:01 +0100 Subject: [ARM] 4391/1: make at91 debug unit support optional The AT91x40 family doesn't have the debug unit like its bigger brothers. But it does have the ID and extension registers (with the bit meanings the same). Reorganize at91_dbgu.h to cater for this. This also affects the load uncompressor, since it outputs to the debug port. Signed-off-by: Greg Ungerer Acked-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91/at91_dbgu.h | 13 ++++++++++--- include/asm-arm/arch-at91/uncompress.h | 4 ++++ 2 files changed, 14 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-at91/at91_dbgu.h b/include/asm-arm/arch-at91/at91_dbgu.h index b0369e176f..8019ffd0ad 100644 --- a/include/asm-arm/arch-at91/at91_dbgu.h +++ b/include/asm-arm/arch-at91/at91_dbgu.h @@ -16,6 +16,7 @@ #ifndef AT91_DBGU_H #define AT91_DBGU_H +#ifdef AT91_DBGU #define AT91_DBGU_CR (AT91_DBGU + 0x00) /* Control Register */ #define AT91_DBGU_MR (AT91_DBGU + 0x04) /* Mode Register */ #define AT91_DBGU_IER (AT91_DBGU + 0x08) /* Interrupt Enable Register */ @@ -30,6 +31,15 @@ #define AT91_DBGU_CIDR (AT91_DBGU + 0x40) /* Chip ID Register */ #define AT91_DBGU_EXID (AT91_DBGU + 0x44) /* Chip ID Extension Register */ +#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */ +#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */ + +#endif /* AT91_DBGU */ + +/* + * Some AT91 parts that don't have full DEBUG units still support the ID + * and extensions register. + */ #define AT91_CIDR_VERSION (0x1f << 0) /* Version of the Device */ #define AT91_CIDR_EPROC (7 << 5) /* Embedded Processor */ #define AT91_CIDR_NVPSIZ (0xf << 8) /* Nonvolatile Program Memory Size */ @@ -53,7 +63,4 @@ #define AT91_CIDR_NVPTYP (7 << 28) /* Nonvolatile Program Memory Type */ #define AT91_CIDR_EXT (1 << 31) /* Extension Flag */ -#define AT91_DBGU_FNR (AT91_DBGU + 0x48) /* Force NTRST Register [SAM9 only] */ -#define AT91_DBGU_FNTRST (1 << 0) /* Force NTRST */ - #endif diff --git a/include/asm-arm/arch-at91/uncompress.h b/include/asm-arm/arch-at91/uncompress.h index 30ac587b3b..272a7e0dc6 100644 --- a/include/asm-arm/arch-at91/uncompress.h +++ b/include/asm-arm/arch-at91/uncompress.h @@ -33,20 +33,24 @@ */ static void putc(int c) { +#ifdef AT91_DBGU void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) barrier(); __raw_writel(c, sys + AT91_DBGU_THR); +#endif } static inline void flush(void) { +#ifdef AT91_DBGU void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ /* wait for transmission to complete */ while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) barrier(); +#endif } #define arch_decomp_setup() -- cgit v1.2.2 From 70672224009bc3d4d6713337b3456bc7ab71d52b Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 4 Jun 2007 06:45:38 +0100 Subject: [ARM] 4427/1: base Atmel at91x40 architecture defines Base at91x40 architecture support defines. These parts are somewhat simpler than the ARM9 Atmel based parts. Signed-off-by: Greg Ungerer Acked-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91/at91x40.h | 55 +++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-at91/cpu.h | 5 ++++ include/asm-arm/arch-at91/timex.h | 5 ++++ 3 files changed, 65 insertions(+) create mode 100644 include/asm-arm/arch-at91/at91x40.h (limited to 'include') diff --git a/include/asm-arm/arch-at91/at91x40.h b/include/asm-arm/arch-at91/at91x40.h new file mode 100644 index 0000000000..612203e017 --- /dev/null +++ b/include/asm-arm/arch-at91/at91x40.h @@ -0,0 +1,55 @@ +/* + * include/asm-arm/arch-at91/at91x40.h + * + * (C) Copyright 2007, Greg Ungerer + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91X40_H +#define AT91X40_H + +/* + * IRQ list. + */ +#define AT91_ID_FIQ 0 /* FIQ */ +#define AT91_ID_SYS 1 /* System Peripheral */ +#define AT91X40_ID_USART0 2 /* USART port 0 */ +#define AT91X40_ID_USART1 3 /* USART port 1 */ +#define AT91X40_ID_TC0 4 /* Timer/Counter 0 */ +#define AT91X40_ID_TC1 5 /* Timer/Counter 1*/ +#define AT91X40_ID_TC2 6 /* Timer/Counter 2*/ +#define AT91X40_ID_WD 7 /* Watchdog? */ +#define AT91X40_ID_PIOA 8 /* Parallel IO Controller A */ + +#define AT91X40_ID_IRQ0 16 /* External IRQ 0 */ +#define AT91X40_ID_IRQ1 17 /* External IRQ 1 */ +#define AT91X40_ID_IRQ2 18 /* External IRQ 2 */ + +/* + * System Peripherals (offset from AT91_BASE_SYS) + */ +#define AT91_BASE_SYS 0xffc00000 + +#define AT91_EBI (0xffe00000 - AT91_BASE_SYS) /* External Bus Interface */ +#define AT91_SF (0xfff00000 - AT91_BASE_SYS) /* Special Function */ +#define AT91_USART1 (0xfffcc000 - AT91_BASE_SYS) /* USART 1 */ +#define AT91_USART0 (0xfffd0000 - AT91_BASE_SYS) /* USART 0 */ +#define AT91_TC (0xfffe0000 - AT91_BASE_SYS) /* Timer Counter */ +#define AT91_PIOA (0xffff0000 - AT91_BASE_SYS) /* PIO Controller A */ +#define AT91_PS (0xffff4000 - AT91_BASE_SYS) /* Power Save */ +#define AT91_WD (0xffff8000 - AT91_BASE_SYS) /* Watchdog Timer */ +#define AT91_AIC (0xfffff000 - AT91_BASE_SYS) /* Advanced Interrupt Controller */ + +/* + * The AT91x40 series doesn't have a debug unit like the other AT91 parts. + * But it does have a chip identify register and extension ID, so define at + * least these here. + */ +#define AT91_DBGU_CIDR (AT91_SF + 0) /* CIDR in PS segment */ +#define AT91_DBGU_EXID (AT91_SF + 4) /* EXID in PS segment */ + +#endif /* AT91X40_H */ diff --git a/include/asm-arm/arch-at91/cpu.h b/include/asm-arm/arch-at91/cpu.h index ef93c30a9c..080cbb401a 100644 --- a/include/asm-arm/arch-at91/cpu.h +++ b/include/asm-arm/arch-at91/cpu.h @@ -28,6 +28,11 @@ #define ARCH_ID_AT91SAM9RL64 0x019b03a0 +#define ARCH_ID_AT91M40800 0x14080044 +#define ARCH_ID_AT91R40807 0x44080746 +#define ARCH_ID_AT91M40807 0x14080745 +#define ARCH_ID_AT91R40008 0x44000840 + static inline unsigned long at91_cpu_identify(void) { return (at91_sys_read(AT91_DBGU_CIDR) & ~AT91_CIDR_VERSION); diff --git a/include/asm-arm/arch-at91/timex.h b/include/asm-arm/arch-at91/timex.h index 2df1ee12df..a310698fb4 100644 --- a/include/asm-arm/arch-at91/timex.h +++ b/include/asm-arm/arch-at91/timex.h @@ -42,6 +42,11 @@ #define AT91SAM9_MASTER_CLOCK 100000000 #define CLOCK_TICK_RATE (AT91SAM9_MASTER_CLOCK/16) +#elif defined(CONFIG_ARCH_AT91X40) + +#define AT91X40_MASTER_CLOCK 40000000 +#define CLOCK_TICK_RATE (AT91X40_MASTER_CLOCK) + #endif #endif -- cgit v1.2.2 From feb47225525a4194e7f6db5e745265793626ceb0 Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Mon, 4 Jun 2007 06:46:26 +0100 Subject: [ARM] 4428/1: modify at91 includes to handle non-MMU at91x40 family Modify the common at91 hardware support to deal with the non-MMU at91x40 family. The base RAM (which is most likely not DRAM) is set to the configured value. Virtual IO device mapping is set to be 1 to 1 with the physical addresses. Signed-off-by: Greg Ungerer Acked-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-at91/hardware.h | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h index 46835e945a..8f1cdd38a9 100644 --- a/include/asm-arm/arch-at91/hardware.h +++ b/include/asm-arm/arch-at91/hardware.h @@ -26,18 +26,29 @@ #include #elif defined(CONFIG_ARCH_AT91SAM9RL) #include +#elif defined(CONFIG_ARCH_AT91X40) +#include #else #error "Unsupported AT91 processor" #endif +#ifdef CONFIG_MMU /* * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF * to 0xFEF78000 .. 0xFF000000. (544Kb) */ #define AT91_IO_PHYS_BASE 0xFFF78000 -#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) #define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE) +#else +/* + * Identity mapping for the non MMU case. + */ +#define AT91_IO_PHYS_BASE AT91_BASE_SYS +#define AT91_IO_VIRT_BASE AT91_IO_PHYS_BASE +#endif + +#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) /* Convert a physical IO address to virtual IO address */ #define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE) @@ -66,7 +77,11 @@ #define AT91_CHIPSELECT_7 0x80000000 /* SDRAM */ +#ifdef CONFIG_DRAM_BASE +#define AT91_SDRAM_BASE CONFIG_DRAM_BASE +#else #define AT91_SDRAM_BASE AT91_CHIPSELECT_1 +#endif /* Clocks */ #define AT91_SLOW_CLOCK 32768 /* slow clock */ -- cgit v1.2.2 From b3e6a508ed920698d367e5993ed056d70364d91f Mon Sep 17 00:00:00 2001 From: Pavel Pisa Date: Sat, 12 May 2007 14:31:17 +0100 Subject: [ARM] 4373/1: i.MX/MX1 GPIO support implementation Support for generic input output for MX1 family. The implementation prevents allocation of one pin by two users, but does not store pointer to the user description permanently, because this solution would have bigger memory overhead. The simple way to integrate code with per BSP pins setup and allocation is required else all GPIO registration checking is useless. The function imx_gpio_setup_multiple_pins() can be used for this purpose in future. Signed-off-by: Pavel Pisa Signed-off-by: Russell King --- include/asm-arm/arch-imx/gpio.h | 102 ++++++++++++++++++++++++++++++++++++ include/asm-arm/arch-imx/imx-regs.h | 2 + 2 files changed, 104 insertions(+) create mode 100644 include/asm-arm/arch-imx/gpio.h (limited to 'include') diff --git a/include/asm-arm/arch-imx/gpio.h b/include/asm-arm/arch-imx/gpio.h new file mode 100644 index 0000000000..486023263f --- /dev/null +++ b/include/asm-arm/arch-imx/gpio.h @@ -0,0 +1,102 @@ +#ifndef _IMX_GPIO_H + +#include + +#define IMX_GPIO_ALLOC_MODE_NORMAL 0 +#define IMX_GPIO_ALLOC_MODE_NO_ALLOC 1 +#define IMX_GPIO_ALLOC_MODE_TRY_ALLOC 2 +#define IMX_GPIO_ALLOC_MODE_ALLOC_ONLY 4 +#define IMX_GPIO_ALLOC_MODE_RELEASE 8 + +extern int imx_gpio_request(unsigned gpio, const char *label); + +extern void imx_gpio_free(unsigned gpio); + +extern int imx_gpio_setup_multiple_pins(const int *pin_list, unsigned count, + int alloc_mode, const char *label); + +extern int imx_gpio_direction_input(unsigned gpio); + +extern int imx_gpio_direction_output(unsigned gpio, int value); + +extern void __imx_gpio_set_value(unsigned gpio, int value); + +static inline int imx_gpio_get_value(unsigned gpio) +{ + return SSR(gpio >> GPIO_PORT_SHIFT) & (1 << (gpio & GPIO_PIN_MASK)); +} + +static inline void imx_gpio_set_value_inline(unsigned gpio, int value) +{ + unsigned long flags; + + raw_local_irq_save(flags); + if(value) + DR(gpio >> GPIO_PORT_SHIFT) |= (1 << (gpio & GPIO_PIN_MASK)); + else + DR(gpio >> GPIO_PORT_SHIFT) &= ~(1 << (gpio & GPIO_PIN_MASK)); + raw_local_irq_restore(flags); +} + +static inline void imx_gpio_set_value(unsigned gpio, int value) +{ + if(__builtin_constant_p(gpio)) + imx_gpio_set_value_inline(gpio, value); + else + __imx_gpio_set_value(gpio, value); +} + +extern int imx_gpio_to_irq(unsigned gpio); + +extern int imx_irq_to_gpio(unsigned irq); + +/*-------------------------------------------------------------------------*/ + +/* Wrappers for "new style" GPIO calls. These calls i.MX specific versions + * to allow future extension of GPIO logic. + */ + +static inline int gpio_request(unsigned gpio, const char *label) +{ + return imx_gpio_request(gpio, label); +} + +static inline void gpio_free(unsigned gpio) +{ + imx_gpio_free(gpio); +} + +static inline int gpio_direction_input(unsigned gpio) +{ + return imx_gpio_direction_input(gpio); +} + +static inline int gpio_direction_output(unsigned gpio, int value) +{ + return imx_gpio_direction_output(gpio, value); +} + +static inline int gpio_get_value(unsigned gpio) +{ + return imx_gpio_get_value(gpio); +} + +static inline void gpio_set_value(unsigned gpio, int value) +{ + imx_gpio_set_value(gpio, value); +} + +#include /* cansleep wrappers */ + +static inline int gpio_to_irq(unsigned gpio) +{ + return imx_gpio_to_irq(gpio); +} + +static inline int irq_to_gpio(unsigned irq) +{ + return imx_irq_to_gpio(irq); +} + + +#endif diff --git a/include/asm-arm/arch-imx/imx-regs.h b/include/asm-arm/arch-imx/imx-regs.h index 30de404c61..fb9de27338 100644 --- a/include/asm-arm/arch-imx/imx-regs.h +++ b/include/asm-arm/arch-imx/imx-regs.h @@ -77,6 +77,8 @@ #define SWR(x) __REG2(IMX_GPIO_BASE + 0x3c, ((x) & 3) << 8) #define PUEN(x) __REG2(IMX_GPIO_BASE + 0x40, ((x) & 3) << 8) +#define GPIO_PORT_MAX 3 + #define GPIO_PIN_MASK 0x1f #define GPIO_PORT_MASK (0x3 << 5) -- cgit v1.2.2 From 4ad48b4bfa121a67ec04162d584afcfa75ed151a Mon Sep 17 00:00:00 2001 From: Vladimir Barinov Date: Wed, 16 May 2007 20:39:02 +0100 Subject: [ARM] 4385/2: ixdp425: NAND support IXDP425 NAND support (arch specific part). The generic platform driver that is used by ixdp425 platfrom is already in upstream kernel in 2.6.22-rc1. Signed-off-by: Vladimir Barinov Signed-off-by: Ruslan Sushko Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- include/asm-arm/arch-ixp4xx/ixdp425.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-ixp4xx/ixdp425.h b/include/asm-arm/arch-ixp4xx/ixdp425.h index 3d3820d7ba..e0791af3bf 100644 --- a/include/asm-arm/arch-ixp4xx/ixdp425.h +++ b/include/asm-arm/arch-ixp4xx/ixdp425.h @@ -32,4 +32,8 @@ #define IXDP425_PCI_INTC_PIN 9 #define IXDP425_PCI_INTD_PIN 8 +/* NAND Flash pins */ +#define IXDP425_NAND_NCE_PIN 12 +#define IXDP425_NAND_CMD_BYTE 0x01 +#define IXDP425_NAND_ADDR_BYTE 0x02 -- cgit v1.2.2 From 46918bd13b887e8f0ae2987e690bc2af9c6c08a4 Mon Sep 17 00:00:00 2001 From: Imre Kaloz Date: Sat, 2 Jun 2007 15:44:08 +0100 Subject: [ARM] 4425/2: Gateway 7001 series support This patch provides support for the Gateway 7001 AccessPoint series. Updated to stay below the 80 char limit in uncompress.h Signed-off-by: Imre Kaloz Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- include/asm-arm/arch-ixp4xx/uncompress.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-ixp4xx/uncompress.h b/include/asm-arm/arch-ixp4xx/uncompress.h index 09ae6c91be..bf7a7882bf 100644 --- a/include/asm-arm/arch-ixp4xx/uncompress.h +++ b/include/asm-arm/arch-ixp4xx/uncompress.h @@ -38,9 +38,10 @@ static void flush(void) static __inline__ void __arch_decomp_setup(unsigned long arch_id) { /* - * Coyote and gtwx5715 only have UART2 connected + * Some boards are using UART2 as console */ - if (machine_is_adi_coyote() || machine_is_gtwx5715()) + if (machine_is_adi_coyote() || machine_is_gtwx5715() || + machine_is_gateway7001()) uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; else uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; -- cgit v1.2.2 From dcdeeb21c010e9b5cb2e91f865cd5bebb65bc31f Mon Sep 17 00:00:00 2001 From: Imre Kaloz Date: Sat, 2 Jun 2007 15:47:51 +0100 Subject: [ARM] 4426/2: Netgear WG302 v2 and WAG302 v2 support This patch provides support for the Netgear WG302 v2 and WAG302 v2 AccessPoint series. This patch relies on the patch "Gateway 7001 series support" minimally, as they only have UART2 connected. Updated to stay below the 80 char limit in uncompress.h Signed-off-by: Imre Kaloz Signed-off-by: Deepak Saxena Signed-off-by: Russell King --- include/asm-arm/arch-ixp4xx/uncompress.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-ixp4xx/uncompress.h b/include/asm-arm/arch-ixp4xx/uncompress.h index bf7a7882bf..f7a35b7882 100644 --- a/include/asm-arm/arch-ixp4xx/uncompress.h +++ b/include/asm-arm/arch-ixp4xx/uncompress.h @@ -41,7 +41,7 @@ static __inline__ void __arch_decomp_setup(unsigned long arch_id) * Some boards are using UART2 as console */ if (machine_is_adi_coyote() || machine_is_gtwx5715() || - machine_is_gateway7001()) + machine_is_gateway7001() || machine_is_wg302v2()) uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; else uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; -- cgit v1.2.2 From 8a87a996eae3d25b0670a243f4829ea4aa9eb63d Mon Sep 17 00:00:00 2001 From: Andrew Victor Date: Mon, 14 May 2007 14:30:15 +0100 Subject: [ARM] 4377/1: KS8695: GPIO driver Driver to control the GPIO pins on the KS8695 processor. The driver natively supports the Generic GPIO interface. Signed-off-by: Andrew Victor Signed-off-by: Russell King --- include/asm-arm/arch-ks8695/gpio.h | 79 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 include/asm-arm/arch-ks8695/gpio.h (limited to 'include') diff --git a/include/asm-arm/arch-ks8695/gpio.h b/include/asm-arm/arch-ks8695/gpio.h new file mode 100644 index 0000000000..65ceea2860 --- /dev/null +++ b/include/asm-arm/arch-ks8695/gpio.h @@ -0,0 +1,79 @@ +/* + * include/asm-arm/arch-ks8695/gpio.h + * + * Copyright (C) 2006 Andrew Victor + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_GPIO_H_ +#define __ASM_ARCH_GPIO_H_ + +#define KS8695_GPIO_0 0 +#define KS8695_GPIO_1 1 +#define KS8695_GPIO_2 2 +#define KS8695_GPIO_3 3 +#define KS8695_GPIO_4 4 +#define KS8695_GPIO_5 5 +#define KS8695_GPIO_6 6 +#define KS8695_GPIO_7 7 +#define KS8695_GPIO_8 8 +#define KS8695_GPIO_9 9 +#define KS8695_GPIO_10 10 +#define KS8695_GPIO_11 11 +#define KS8695_GPIO_12 12 +#define KS8695_GPIO_13 13 +#define KS8695_GPIO_14 14 +#define KS8695_GPIO_15 15 + + +/* + * Configure GPIO pin as external interrupt source. + */ +int __init_or_module ks8695_gpio_interrupt(unsigned int pin, unsigned int type); + +/* + * Configure the GPIO line as an input. + */ +int __init_or_module gpio_direction_input(unsigned int pin); + +/* + * Configure the GPIO line as an output, with default state. + */ +int __init_or_module gpio_direction_output(unsigned int pin, unsigned int state); + +/* + * Set the state of an output GPIO line. + */ +void gpio_set_value(unsigned int pin, unsigned int state); + +/* + * Read the state of a GPIO line. + */ +int gpio_get_value(unsigned int pin); + +/* + * Map GPIO line to IRQ number. + */ +int gpio_to_irq(unsigned int pin); + +/* + * Map IRQ number to GPIO line. + */ +int irq_to_gpio(unsigned int irq); + + +#include + +static inline int gpio_request(unsigned int pin, const char *label) +{ + return 0; +} + +static inline void gpio_free(unsigned int pin) +{ +} + +#endif -- cgit v1.2.2 From 909d6c6c80311f800aee338e5fa528818b115951 Mon Sep 17 00:00:00 2001 From: "George G. Davis" Date: Tue, 26 Jun 2007 01:38:27 +0100 Subject: [ARM] 4453/1: Fully Decode ARM instruction set state in show_regs() tombstone The ARM show_regs() tombstone only partially decodes which ARM ISA was executing at the time a fault occurred displaying either "(T)" for the Thumb case or nothing at all for other cases. This patch therefore explicitly identifies which state the processor is in at the time of a fault: ARM, Thumb, Jazelle or JazelleEE. Signed-off-by: George G. Davis Acked-by: Catalin Marinas Signed-off-by: Russell King --- include/asm-arm/ptrace.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include') diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index ee3d93c281..ff038b65f3 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -103,6 +103,10 @@ struct pt_regs { #define thumb_mode(regs) (0) #endif +#define isa_mode(regs) \ + ((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \ + (((regs)->ARM_cpsr & PSR_T_BIT) >> 5)) + #define processor_mode(regs) \ ((regs)->ARM_cpsr & MODE_MASK) -- cgit v1.2.2 From d64f73be1b59b9556de0a8fbd4f1a003c6a45a5c Mon Sep 17 00:00:00 2001 From: David Brownell Date: Thu, 12 Jul 2007 14:12:28 +0200 Subject: i2c: Add kernel documentation Generate I2C kerneldoc; fix various glitches and add "context" sections to that documentation. Most I2C and SMBus functions still have no kerneldoc. Let me suggest providing kerneldoc for all the i2c_smbus_*() functions as a small and mostly self-contained project for anyone so inclined. :) Signed-off-by: David Brownell Signed-off-by: Jean Delvare --- include/linux/i2c.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/linux/i2c.h b/include/linux/i2c.h index cae7d61803..a24e267fd1 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -150,15 +150,20 @@ struct i2c_driver { /** * struct i2c_client - represent an I2C slave device + * @flags: I2C_CLIENT_TEN indicates the device uses a ten bit chip address; + * I2C_CLIENT_PEC indicates it uses SMBus Packet Error Checking * @addr: Address used on the I2C bus connected to the parent adapter. * @name: Indicates the type of the device, usually a chip name that's * generic enough to hide second-sourcing and compatible revisions. + * @adapter: manages the bus segment hosting this I2C device * @dev: Driver model device node for the slave. + * @irq: indicates the IRQ generated by this device (if any) * @driver_name: Identifies new-style driver used with this device; also * used as the module name for hotplug/coldplug modprobe support. * * An i2c_client identifies a single device (i.e. chip) connected to an - * i2c bus. The behaviour is defined by the routines of the driver. + * i2c bus. The behaviour exposed to Linux is defined by the driver + * managing the device. */ struct i2c_client { unsigned short flags; /* div., see below */ @@ -201,7 +206,7 @@ static inline void i2c_set_clientdata (struct i2c_client *dev, void *data) * @addr: stored in i2c_client.addr * @platform_data: stored in i2c_client.dev.platform_data * @irq: stored in i2c_client.irq - + * * I2C doesn't actually support hardware probing, although controllers and * devices may be able to use I2C_SMBUS_QUICK to tell whether or not there's * a device at a given address. Drivers commonly need more information than @@ -210,7 +215,7 @@ static inline void i2c_set_clientdata (struct i2c_client *dev, void *data) * i2c_board_info is used to build tables of information listing I2C devices * that are present. This information is used to grow the driver model tree * for "new style" I2C drivers. For mainboards this is done statically using - * i2c_register_board_info(), where @bus_num represents an adapter that isn't + * i2c_register_board_info(); bus numbers identify adapters that aren't * yet available. For add-on boards, i2c_new_device() does this dynamically * with the adapter already known. */ -- cgit v1.2.2 From d75d53cd571c02990d56e72f615ab11e943772f9 Mon Sep 17 00:00:00 2001 From: "Mark M. Hoffman" Date: Thu, 12 Jul 2007 14:12:28 +0200 Subject: i2c: Fix sparse warning in i2c.h Kill a sparse warning by un-nesting two container_of() calls. Signed-off-by: Mark M. Hoffman Signed-off-by: Jean Delvare --- include/linux/i2c.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/linux/i2c.h b/include/linux/i2c.h index a24e267fd1..44f2ecf47d 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -185,7 +185,8 @@ struct i2c_client { static inline struct i2c_client *kobj_to_i2c_client(struct kobject *kobj) { - return to_i2c_client(container_of(kobj, struct device, kobj)); + struct device * const dev = container_of(kobj, struct device, kobj); + return to_i2c_client(dev); } static inline void *i2c_get_clientdata (struct i2c_client *dev) -- cgit v1.2.2 From 4b2643d7d9bdcd776749e17f73c168ddf02e93cb Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Thu, 12 Jul 2007 14:12:29 +0200 Subject: i2c: Fix the i2c_smbus_read_i2c_block_data() prototype Let the drivers specify how many bytes they want to read with i2c_smbus_read_i2c_block_data(). So far, the block count was hard-coded to I2C_SMBUS_BLOCK_MAX (32), which did not make much sense. Many driver authors complained about this before, and I believe it's about time to fix it. Right now, authors have to do technically stupid things, such as individual byte reads or full-fledged I2C messaging, to work around the problem. We do not want to encourage that. I even found that some bus drivers (e.g. i2c-amd8111) already implemented I2C block read the "right" way, that is, they didn't follow the old, broken standard. The fact that it was never noticed before just shows how little i2c_smbus_read_i2c_block_data() was used, which isn't that surprising given how broken its prototype was so far. There are some obvious compatiblity considerations: * This changes the i2c_smbus_read_i2c_block_data() prototype. Users outside the kernel tree will notice at compilation time, and will have to update their code. * User-space has access to i2c_smbus_xfer() directly using i2c-dev, so the changed expectations would affect tools such as i2cdump. In order to preserve binary compatibility, we give I2C_SMBUS_I2C_BLOCK_DATA a new numeric value, and define I2C_SMBUS_I2C_BLOCK_BROKEN with the old numeric value. When i2c-dev receives a transaction with the old value, it can convert it to the new format on the fly. Signed-off-by: Jean Delvare --- include/linux/i2c.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/linux/i2c.h b/include/linux/i2c.h index 44f2ecf47d..2eaba21b9b 100644 --- a/include/linux/i2c.h +++ b/include/linux/i2c.h @@ -90,7 +90,7 @@ extern s32 i2c_smbus_write_block_data(struct i2c_client * client, const u8 *values); /* Returns the number of read bytes */ extern s32 i2c_smbus_read_i2c_block_data(struct i2c_client * client, - u8 command, u8 *values); + u8 command, u8 length, u8 *values); extern s32 i2c_smbus_write_i2c_block_data(struct i2c_client * client, u8 command, u8 length, const u8 *values); @@ -524,8 +524,9 @@ union i2c_smbus_data { #define I2C_SMBUS_WORD_DATA 3 #define I2C_SMBUS_PROC_CALL 4 #define I2C_SMBUS_BLOCK_DATA 5 -#define I2C_SMBUS_I2C_BLOCK_DATA 6 +#define I2C_SMBUS_I2C_BLOCK_BROKEN 6 #define I2C_SMBUS_BLOCK_PROC_CALL 7 /* SMBus 2.0 */ +#define I2C_SMBUS_I2C_BLOCK_DATA 8 /* ----- commands for the ioctl like i2c_command call: -- cgit v1.2.2 From c29c22218b99dad95f7cd0281415a854aeee805c Mon Sep 17 00:00:00 2001 From: Henry Su Date: Thu, 12 Jul 2007 14:12:29 +0200 Subject: i2c-piix4: Add support for the ATI SB700 Add the SMBus device ID for ATI SB700. Signed-off-by: Henry Su Signed-off-by: Jean Delvare --- include/linux/pci_ids.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index 75c4d4d068..8300001e90 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -371,6 +371,7 @@ #define PCI_DEVICE_ID_ATI_IXP600_SMBUS 0x4385 #define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c #define PCI_DEVICE_ID_ATI_IXP700_SATA 0x4390 +#define PCI_DEVICE_ID_ATI_IXP700_SMBUS 0x4395 #define PCI_DEVICE_ID_ATI_IXP700_IDE 0x439c #define PCI_VENDOR_ID_VLSI 0x1004 -- cgit v1.2.2 From b9cdad74883a797952de52464d118d685cafc05a Mon Sep 17 00:00:00 2001 From: Jean Delvare Date: Thu, 12 Jul 2007 14:12:31 +0200 Subject: i2c: New bus driver for the TAOS evaluation modules This is a new I2C bus driver for the TAOS evaluation modules. Developped and tested on the TAOS TSL2550 EVM. Signed-off-by: Jean Delvare --- include/linux/serio.h | 1 + 1 file changed, 1 insertion(+) (limited to 'include') diff --git a/include/linux/serio.h b/include/linux/serio.h index 1ebf0455e2..d9377ce9ff 100644 --- a/include/linux/serio.h +++ b/include/linux/serio.h @@ -209,5 +209,6 @@ static inline void serio_unpin_driver(struct serio *serio) #define SERIO_PENMOUNT 0x31 #define SERIO_TOUCHRIGHT 0x32 #define SERIO_TOUCHWIN 0x33 +#define SERIO_TAOSEVM 0x34 #endif -- cgit v1.2.2 From f62c3f2c35874713ebbb6b6a4b9d9c6caaed4f14 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 15 May 2007 11:03:24 +0100 Subject: [ARM] pxa: remove useless pxa_pm_finish() function pxa_pm_finish() does nothing but return zero. The core code does nothing with this return value, and will not try to call the finish method in the pm_ops structure if it is NULL. Therefore, we can remove this useless function. Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pm.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pm.h b/include/asm-arm/arch-pxa/pm.h index 7a8a1cdf43..52243a62c4 100644 --- a/include/asm-arm/arch-pxa/pm.h +++ b/include/asm-arm/arch-pxa/pm.h @@ -9,4 +9,3 @@ extern int pxa_pm_prepare(suspend_state_t state); extern int pxa_pm_enter(suspend_state_t state); -extern int pxa_pm_finish(suspend_state_t state); -- cgit v1.2.2 From 7a2b94bc39915041304578188441f0f21aa5532a Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 16 May 2007 15:44:37 +0100 Subject: [ARM] pxa: remove MMC register defines from pxa-regs.h pxamci.h redefines the MMC registers differently so they can be used with ioremap. Remove the incompatible definitions from pxa-regs.h. Signed-off-by: Russell King --- include/asm-arm/arch-pxa/pxa-regs.h | 22 +--------------------- 1 file changed, 1 insertion(+), 21 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index dbcc9298b0..e68b593d69 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -1765,29 +1765,9 @@ #define SSACD_P(x) (*(((x) == 1) ? &SSACD_P1 : ((x) == 2) ? &SSACD_P2 : ((x) == 3) ? &SSACD_P3 : NULL)) /* - * MultiMediaCard (MMC) controller + * MultiMediaCard (MMC) controller - see drivers/mmc/host/pxamci.h */ -#define MMC_STRPCL __REG(0x41100000) /* Control to start and stop MMC clock */ -#define MMC_STAT __REG(0x41100004) /* MMC Status Register (read only) */ -#define MMC_CLKRT __REG(0x41100008) /* MMC clock rate */ -#define MMC_SPI __REG(0x4110000c) /* SPI mode control bits */ -#define MMC_CMDAT __REG(0x41100010) /* Command/response/data sequence control */ -#define MMC_RESTO __REG(0x41100014) /* Expected response time out */ -#define MMC_RDTO __REG(0x41100018) /* Expected data read time out */ -#define MMC_BLKLEN __REG(0x4110001c) /* Block length of data transaction */ -#define MMC_NOB __REG(0x41100020) /* Number of blocks, for block mode */ -#define MMC_PRTBUF __REG(0x41100024) /* Partial MMC_TXFIFO FIFO written */ -#define MMC_I_MASK __REG(0x41100028) /* Interrupt Mask */ -#define MMC_I_REG __REG(0x4110002c) /* Interrupt Register (read only) */ -#define MMC_CMD __REG(0x41100030) /* Index of current command */ -#define MMC_ARGH __REG(0x41100034) /* MSW part of the current command argument */ -#define MMC_ARGL __REG(0x41100038) /* LSW part of the current command argument */ -#define MMC_RES __REG(0x4110003c) /* Response FIFO (read only) */ -#define MMC_RXFIFO __REG(0x41100040) /* Receive FIFO (read only) */ -#define MMC_TXFIFO __REG(0x41100044) /* Transmit FIFO (write only) */ - - /* * Core Clock */ -- cgit v1.2.2 From b23170c01f6e4ea043df7cd9486c2488e01f3d60 Mon Sep 17 00:00:00 2001 From: Russell King Date: Tue, 15 May 2007 10:26:49 +0100 Subject: [ARM] pxa: introduce cpu_is_pxaXXX macros Signed-off-by: Russell King --- include/asm-arm/arch-pxa/hardware.h | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index e2bdc2fbed..3861217464 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h @@ -62,6 +62,42 @@ #ifndef __ASSEMBLY__ +#define __cpu_is_pxa21x(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xf3f; \ + _id == 0x212; \ + }) + +#define __cpu_is_pxa25x(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xfff; \ + _id == 0x2d0 || _id == 0x290; \ + }) + +#define __cpu_is_pxa27x(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xfff; \ + _id == 0x411; \ + }) + +#define cpu_is_pxa21x() \ + ({ \ + unsigned int id = read_cpuid(CPUID_ID); \ + __cpu_is_pxa21x(id); \ + }) + +#define cpu_is_pxa25x() \ + ({ \ + unsigned int id = read_cpuid(CPUID_ID); \ + __cpu_is_pxa25x(id); \ + }) + +#define cpu_is_pxa27x() \ + ({ \ + unsigned int id = read_cpuid(CPUID_ID); \ + __cpu_is_pxa27x(id); \ + }) + /* * Handy routine to set GPIO alternate functions */ -- cgit v1.2.2 From 486c955118dbbb0f13dc4d40cc5dac2b23f82676 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 6 Jun 2007 06:22:20 +0100 Subject: [ARM] 4434/1: PXA: remove PXA_IRQ_SKIP 1. PXA_IRQ_SKIP is defined to be 7 on PXA25x so that the first IRQ starts from zero. This makes IRQ numbering inconsistent between PXA25x and PXA27x. Remove this macro so that the same IRQ_XXXXX definition has the same value on both PXA25x and PXA27x. 2. make IRQ_SSP3..IRQ_PWRI2C valid only if PXA27x is defined, this avoids unintentional use of these macros on PXA25x Signed-off-by: eric miao Signed-off-by: Russell King --- include/asm-arm/arch-pxa/entry-macro.S | 2 +- include/asm-arm/arch-pxa/irqs.h | 11 ++++------- 2 files changed, 5 insertions(+), 8 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S index 1d5fbb9b37..b7bf0dd4fa 100644 --- a/include/asm-arm/arch-pxa/entry-macro.S +++ b/include/asm-arm/arch-pxa/entry-macro.S @@ -34,6 +34,6 @@ rsb \irqstat, \irqnr, #0 and \irqstat, \irqstat, \irqnr clz \irqnr, \irqstat - rsb \irqnr, \irqnr, #(31 - PXA_IRQ_SKIP) + rsb \irqnr, \irqnr, #31 1001: .endm diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index 67ed43674c..dc4e7548b7 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h @@ -11,14 +11,9 @@ */ -#ifdef CONFIG_PXA27x -#define PXA_IRQ_SKIP 0 -#else -#define PXA_IRQ_SKIP 7 -#endif - -#define PXA_IRQ(x) ((x) - PXA_IRQ_SKIP) +#define PXA_IRQ(x) (x) +#ifdef CONFIG_PXA27x #define IRQ_SSP3 PXA_IRQ(0) /* SSP3 service request */ #define IRQ_MSL PXA_IRQ(1) /* MSL Interface interrupt */ #define IRQ_USBH2 PXA_IRQ(2) /* USB Host interrupt 1 (OHCI) */ @@ -26,6 +21,8 @@ #define IRQ_KEYPAD PXA_IRQ(4) /* Key pad controller */ #define IRQ_MEMSTK PXA_IRQ(5) /* Memory Stick interrupt */ #define IRQ_PWRI2C PXA_IRQ(6) /* Power I2C interrupt */ +#endif + #define IRQ_HWUART PXA_IRQ(7) /* HWUART Transmit/Receive/Error (PXA26x) */ #define IRQ_OST_4_11 PXA_IRQ(7) /* OS timer 4-11 matches (PXA27x) */ #define IRQ_GPIO0 PXA_IRQ(8) /* GPIO0 Edge Detect */ -- cgit v1.2.2 From c08b7b3ef6bf489ddabadc03e050f3db2ea44b5d Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 6 Jun 2007 06:32:38 +0100 Subject: [ARM] 4435/1: PXA: remove PXA_INTERNAL_IRQS 1. define PXA_GPIO_IRQ_BASE to be right after the internal IRQs, and define PXA_GPIO_IRQ_NUM to be 128 for all PXA2xx variants 2. make the code specific to the high IRQ numbers (32..64) to be PXA27x specific 3. add a function pxa_init_irq_high() to initialize the internal high IRQ chip, the invoke of this function could be moved to PXA27x specific initialization code Signed-off-by: eric miao Signed-off-by: Russell King --- include/asm-arm/arch-pxa/irqs.h | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/irqs.h b/include/asm-arm/arch-pxa/irqs.h index dc4e7548b7..a07fe0f928 100644 --- a/include/asm-arm/arch-pxa/irqs.h +++ b/include/asm-arm/arch-pxa/irqs.h @@ -55,18 +55,15 @@ #ifdef CONFIG_PXA27x #define IRQ_TPM PXA_IRQ(32) /* TPM interrupt */ #define IRQ_CAMERA PXA_IRQ(33) /* Camera Interface */ - -#define PXA_INTERNAL_IRQS 34 -#else -#define PXA_INTERNAL_IRQS 32 #endif -#define GPIO_2_x_TO_IRQ(x) \ - PXA_IRQ((x) - 2 + PXA_INTERNAL_IRQS) +#define PXA_GPIO_IRQ_BASE (64) +#define PXA_GPIO_IRQ_NUM (128) + +#define GPIO_2_x_TO_IRQ(x) (PXA_GPIO_IRQ_BASE + (x)) #define IRQ_GPIO(x) (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x)) -#define IRQ_TO_GPIO_2_x(i) \ - ((i) - IRQ_GPIO(2) + 2) +#define IRQ_TO_GPIO_2_x(i) ((i) - PXA_GPIO_IRQ_BASE) #define IRQ_TO_GPIO(i) (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i)) #if defined(CONFIG_PXA25x) @@ -81,7 +78,7 @@ * these. If you need more, increase IRQ_BOARD_END, but keep it * within sensible limits. */ -#define IRQ_BOARD_START (IRQ_GPIO(PXA_LAST_GPIO) + 1) +#define IRQ_BOARD_START (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM) #define IRQ_BOARD_END (IRQ_BOARD_START + 16) #define IRQ_SA1111_START (IRQ_BOARD_END) -- cgit v1.2.2 From 8118d124949ed8ff1a450e0c0d13cfab8c2ff7aa Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Wed, 6 Jun 2007 06:49:59 +0100 Subject: [ARM] 4440/1: PXA: enable the checking of ICIP2 for IRQs ICIP2 is not examined during IRQ entrance, this patch add the checking if the processor is PXA27x or later, with CoreG bits in CPUID (Core Generation) > 1 Signed-off-by: eric miao Signed-off-by: Russell King --- include/asm-arm/arch-pxa/entry-macro.S | 28 +++++++++++++++++++++++----- 1 file changed, 23 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/entry-macro.S b/include/asm-arm/arch-pxa/entry-macro.S index b7bf0dd4fa..b7e7308514 100644 --- a/include/asm-arm/arch-pxa/entry-macro.S +++ b/include/asm-arm/arch-pxa/entry-macro.S @@ -20,15 +20,33 @@ .endm .macro get_irqnr_and_base, irqnr, irqstat, base, tmp -#ifdef CONFIG_PXA27x - mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP - mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR -#else + mrc p15, 0, \tmp, c0, c0, 0 @ CPUID + mov \tmp, \tmp, lsr #13 + and \tmp, \tmp, #0x7 @ Core G + cmp \tmp, #1 + bhi 1004f + mov \base, #io_p2v(0x40000000) @ IIR Ctl = 0x40d00000 add \base, \base, #0x00d00000 ldr \irqstat, [\base, #0] @ ICIP ldr \irqnr, [\base, #4] @ ICMR -#endif + b 1002f + +1004: + mrc p6, 0, \irqstat, c6, c0, 0 @ ICIP2 + mrc p6, 0, \irqnr, c7, c0, 0 @ ICMR2 + ands \irqstat, \irqstat, \irqnr + beq 1003f + rsb \irqstat, \irqnr, #0 + and \irqstat, \irqstat, \irqnr + clz \irqnr, \irqstat + rsb \irqnr, \irqnr, #31 + add \irqnr, \irqnr, #32 + b 1001f +1003: + mrc p6, 0, \irqstat, c0, c0, 0 @ ICIP + mrc p6, 0, \irqnr, c1, c0, 0 @ ICMR +1002: ands \irqnr, \irqstat, \irqnr beq 1001f rsb \irqstat, \irqnr, #0 -- cgit v1.2.2 From f53f066c25036210036730d64c876ea586114425 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Fri, 22 Jun 2007 05:40:17 +0100 Subject: [ARM] 4451/1: pxa: make dma.c generic and remove cpu specific dma code Since the number of dma channels varies between pxa25x and pxa27x, it introduces some specific code in dma.c. This patch moves the specific code to pxa25x.c and pxa27x.c and makes dma.c more generic. 1. add pxa_init_dma() for dma initialization, the number of channels are passed in by the argument 2. add a "prio" field to the "struct pxa_dma_channel" for the channel priority, and is initialized in pxa_init_dma() 3. use a general priority comparison with the channels "prio" field so to remove the processor specific pxa_for_each_dma_prio macro, this is not lightning fast as the original one, but it is acceptable as it happens when requesting dma, which is usually not so performance critical Signed-off-by: eric miao Acked-by: Nicolas Pitre Signed-off-by: Russell King --- include/asm-arm/arch-pxa/dma.h | 22 ++-------------------- 1 file changed, 2 insertions(+), 20 deletions(-) (limited to 'include') diff --git a/include/asm-arm/arch-pxa/dma.h b/include/asm-arm/arch-pxa/dma.h index bed042d71d..3280ee2ddf 100644 --- a/include/asm-arm/arch-pxa/dma.h +++ b/include/asm-arm/arch-pxa/dma.h @@ -30,30 +30,12 @@ typedef enum { DMA_PRIO_LOW = 2 } pxa_dma_prio; -#if defined(CONFIG_PXA27x) - -#define PXA_DMA_CHANNELS 32 - -#define pxa_for_each_dma_prio(ch, prio) \ -for ( \ - ch = prio * 4; \ - ch != (4 << prio) + 16; \ - ch = (ch + 1 == (4 << prio)) ? (prio * 4 + 16) : (ch + 1) \ -) - -#elif defined(CONFIG_PXA25x) - -#define PXA_DMA_CHANNELS 16 - -#define pxa_for_each_dma_prio(ch, prio) \ - for (ch = prio * 4; ch != (4 << prio); ch++) - -#endif - /* * DMA registration */ +int __init pxa_init_dma(int num_ch); + int pxa_request_dma (char *name, pxa_dma_prio prio, void (*irq_handler)(int, void *), -- cgit v1.2.2 From f884b1cf578e079f01682514ae1ae64c74586602 Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Thu, 12 Jul 2007 16:10:22 +0100 Subject: [ARM] 4473/2: Take the HWCAP definitions out of the elf.h file The patch moves the HWCAP definitions and the extern elf_hwcap declaration to the hwcap.h header file. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- include/asm-arm/Kbuild | 2 ++ include/asm-arm/elf.h | 23 +---------------------- include/asm-arm/hwcap.h | 28 ++++++++++++++++++++++++++++ 3 files changed, 31 insertions(+), 22 deletions(-) create mode 100644 include/asm-arm/hwcap.h (limited to 'include') diff --git a/include/asm-arm/Kbuild b/include/asm-arm/Kbuild index c68e1680da..73237bd130 100644 --- a/include/asm-arm/Kbuild +++ b/include/asm-arm/Kbuild @@ -1 +1,3 @@ include include/asm-generic/Kbuild.asm + +unifdef-y += hwcap.h diff --git a/include/asm-arm/elf.h b/include/asm-arm/elf.h index 3679a8a892..d7a777f050 100644 --- a/include/asm-arm/elf.h +++ b/include/asm-arm/elf.h @@ -7,6 +7,7 @@ */ #include #include +#include typedef unsigned long elf_greg_t; typedef unsigned long elf_freg_t[3]; @@ -39,30 +40,8 @@ typedef struct user_fp elf_fpregset_t; #endif #define ELF_ARCH EM_ARM -/* - * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP - */ -#define HWCAP_SWP 1 -#define HWCAP_HALF 2 -#define HWCAP_THUMB 4 -#define HWCAP_26BIT 8 /* Play it safe */ -#define HWCAP_FAST_MULT 16 -#define HWCAP_FPA 32 -#define HWCAP_VFP 64 -#define HWCAP_EDSP 128 -#define HWCAP_JAVA 256 -#define HWCAP_IWMMXT 512 -#define HWCAP_CRUNCH 1024 - #ifdef __KERNEL__ #ifndef __ASSEMBLY__ -/* - * This yields a mask that user programs can use to figure out what - * instruction set this cpu supports. - */ -#define ELF_HWCAP (elf_hwcap) -extern unsigned int elf_hwcap; - /* * This yields a string that ld.so will use to load implementation * specific libraries for optimization. This is more specific in diff --git a/include/asm-arm/hwcap.h b/include/asm-arm/hwcap.h new file mode 100644 index 0000000000..01a1391d30 --- /dev/null +++ b/include/asm-arm/hwcap.h @@ -0,0 +1,28 @@ +#ifndef __ASMARM_HWCAP_H +#define __ASMARM_HWCAP_H + +/* + * HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP + */ +#define HWCAP_SWP 1 +#define HWCAP_HALF 2 +#define HWCAP_THUMB 4 +#define HWCAP_26BIT 8 /* Play it safe */ +#define HWCAP_FAST_MULT 16 +#define HWCAP_FPA 32 +#define HWCAP_VFP 64 +#define HWCAP_EDSP 128 +#define HWCAP_JAVA 256 +#define HWCAP_IWMMXT 512 +#define HWCAP_CRUNCH 1024 + +#if defined(__KERNEL__) && !defined(__ASSEMBLY__) +/* + * This yields a mask that user programs can use to figure out what + * instruction set this cpu supports. + */ +#define ELF_HWCAP (elf_hwcap) +extern unsigned int elf_hwcap; +#endif + +#endif -- cgit v1.2.2 From d1cbbd6b413510c6512f4f80ffd48db1a8dd554a Mon Sep 17 00:00:00 2001 From: Catalin Marinas Date: Wed, 11 Jul 2007 11:29:39 +0100 Subject: [ARM] 4474/1: Do not check the PSR_F_BIT in valid_user_regs When running Linux in non-secure mode (on ARM1176 for example), depending on the CP15 secure configuration register, the CPSR.F bit (6) might only be modified from the secure mode. However, the valid_user_regs() function checks for this bit being cleared. With commit a6c61e9d, a SIGSEGV is forced in handle_signal() if the user registers are not considered valid. The patch also ensures that the CPSR.A bit is cleared and the USR mode is set if the CPU does not support the 26bit user mode. Signed-off-by: Catalin Marinas Signed-off-by: Russell King --- include/asm-arm/ptrace.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index ff038b65f3..7aaa206cb5 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -10,6 +10,8 @@ #ifndef __ASM_ARM_PTRACE_H #define __ASM_ARM_PTRACE_H +#include + #define PTRACE_GETREGS 12 #define PTRACE_SETREGS 13 #define PTRACE_GETFPREGS 14 @@ -45,6 +47,7 @@ #define PSR_T_BIT 0x00000020 #define PSR_F_BIT 0x00000040 #define PSR_I_BIT 0x00000080 +#define PSR_A_BIT 0x00000100 #define PSR_J_BIT 0x01000000 #define PSR_Q_BIT 0x08000000 #define PSR_V_BIT 0x10000000 @@ -121,14 +124,17 @@ struct pt_regs { */ static inline int valid_user_regs(struct pt_regs *regs) { - if (user_mode(regs) && - (regs->ARM_cpsr & (PSR_F_BIT|PSR_I_BIT)) == 0) + if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) { + regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT); return 1; + } /* * Force CPSR to something logical... */ - regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT; + regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT; + if (!(elf_hwcap & HWCAP_26BIT)) + regs->ARM_cpsr |= USR_MODE; return 0; } -- cgit v1.2.2 From c0cf500145b4154adcbc55afc1a63db24cee84a2 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Wed, 11 Jul 2007 23:12:00 +0900 Subject: [MIPS] Workaround for a sparse warning in include/asm-mips/io.h CKSEG1ADDR() returns unsigned int value on 32bit kernel. Cast it to unsigned long to get rid of this warning: include2/asm/io.h:215:12: warning: cast adds address space to expression () Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/io.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 12bcc1f9fb..7ba92890ea 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -212,7 +212,8 @@ static inline void __iomem * __ioremap_mode(phys_t offset, unsigned long size, */ if (__IS_LOW512(phys_addr) && __IS_LOW512(last_addr) && flags == _CACHE_UNCACHED) - return (void __iomem *)CKSEG1ADDR(phys_addr); + return (void __iomem *) + (unsigned long)CKSEG1ADDR(phys_addr); } return __ioremap(offset, size, flags); -- cgit v1.2.2 From 87d43dd48d6e68095be85c4e5f991fd7c89c052e Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Wed, 11 Jul 2007 23:30:40 +0900 Subject: [MIPS] Change names of local variables to silence sparse (part 2) This patch is an workaround for these sparse warnings: include2/asm/mmu_context.h:172:2: warning: symbol 'flags' shadows an earlier one include2/asm/mmu_context.h:133:16: originally declared here include2/asm/mmu_context.h:232:2: warning: symbol 'flags' shadows an earlier one include2/asm/mmu_context.h:203:16: originally declared here include2/asm/mmu_context.h:277:3: warning: symbol 'flags' shadows an earlier one include2/asm/mmu_context.h:250:16: originally declared here Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/mipsregs.h | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) (limited to 'include') diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 706b3691f5..18f47f1e8c 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -707,10 +707,10 @@ do { \ */ #define __read_64bit_c0_split(source, sel) \ ({ \ - unsigned long long val; \ - unsigned long flags; \ + unsigned long long __val; \ + unsigned long __flags; \ \ - local_irq_save(flags); \ + local_irq_save(__flags); \ if (sel == 0) \ __asm__ __volatile__( \ ".set\tmips64\n\t" \ @@ -719,7 +719,7 @@ do { \ "dsrl\t%M0, %M0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \ ".set\tmips0" \ - : "=r" (val)); \ + : "=r" (__val)); \ else \ __asm__ __volatile__( \ ".set\tmips64\n\t" \ @@ -728,17 +728,17 @@ do { \ "dsrl\t%M0, %M0, 32\n\t" \ "dsrl\t%L0, %L0, 32\n\t" \ ".set\tmips0" \ - : "=r" (val)); \ - local_irq_restore(flags); \ + : "=r" (__val)); \ + local_irq_restore(__flags); \ \ - val; \ + __val; \ }) #define __write_64bit_c0_split(source, sel, val) \ do { \ - unsigned long flags; \ + unsigned long __flags; \ \ - local_irq_save(flags); \ + local_irq_save(__flags); \ if (sel == 0) \ __asm__ __volatile__( \ ".set\tmips64\n\t" \ @@ -759,7 +759,7 @@ do { \ "dmtc0\t%L0, " #source ", " #sel "\n\t" \ ".set\tmips0" \ : : "r" (val)); \ - local_irq_restore(flags); \ + local_irq_restore(__flags); \ } while (0) #define read_c0_index() __read_32bit_c0_register($0, 0) -- cgit v1.2.2 From 40df3831f9b2fa386f55b580f294ea4f686704be Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 12 Jul 2007 00:51:00 +0900 Subject: [MIPS] Cleanup tlbdebug.h Also include tlbdebug.h in dump_tlb.c and r3k_dump_tlb.c. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- include/asm-mips/tlbdebug.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'include') diff --git a/include/asm-mips/tlbdebug.h b/include/asm-mips/tlbdebug.h index fff7a73e22..bb8f5c29c3 100644 --- a/include/asm-mips/tlbdebug.h +++ b/include/asm-mips/tlbdebug.h @@ -11,10 +11,6 @@ /* * TLB debugging functions: */ -extern void dump_tlb(int first, int last); extern void dump_tlb_all(void); -extern void dump_tlb_wired(void); -extern void dump_tlb_addr(unsigned long addr); -extern void dump_tlb_nonwired(void); #endif /* __ASM_TLBDEBUG_H */ -- cgit v1.2.2 From 891649409edbed528728b4a104d29e43e9d7473a Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Wed, 9 May 2007 00:03:02 +0900 Subject: [MIPS] separate platform_device registration for VR41xx serial interface Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- include/asm-mips/vr41xx/siu.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include') diff --git a/include/asm-mips/vr41xx/siu.h b/include/asm-mips/vr41xx/siu.h index 1fcf6e8082..98cdb40964 100644 --- a/include/asm-mips/vr41xx/siu.h +++ b/include/asm-mips/vr41xx/siu.h @@ -20,6 +20,8 @@ #ifndef __NEC_VR41XX_SIU_H #define __NEC_VR41XX_SIU_H +#define SIU_PORTS_MAX 2 + typedef enum { SIU_INTERFACE_RS232C, SIU_INTERFACE_IRDA, -- cgit v1.2.2 From 44173fb2e83183b585e137e6fee8ba32460f5645 Mon Sep 17 00:00:00 2001 From: Yoichi Yuasa Date: Thu, 10 May 2007 22:21:35 +0900 Subject: [MIPS] Separate platform_device registration for VR41xx GPIO Signed-off-by: Yoichi Yuasa Signed-off-by: Ralf Baechle --- include/asm-mips/vr41xx/giu.h | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'include') diff --git a/include/asm-mips/vr41xx/giu.h b/include/asm-mips/vr41xx/giu.h index 8109cda557..0bcdd3a5c2 100644 --- a/include/asm-mips/vr41xx/giu.h +++ b/include/asm-mips/vr41xx/giu.h @@ -20,6 +20,15 @@ #ifndef __NEC_VR41XX_GIU_H #define __NEC_VR41XX_GIU_H +/* + * NEC VR4100 series GIU platform device IDs. + */ +enum { + GPIO_50PINS_PULLUPDOWN, + GPIO_36PINS, + GPIO_48PINS_EDGE_SELECT, +}; + typedef enum { IRQ_TRIGGER_LEVEL, IRQ_TRIGGER_EDGE, -- cgit v1.2.2 From 0db34215c7e0ef618e7b29fbf271194ca5434f8e Mon Sep 17 00:00:00 2001 From: "Kevin D. Kissell" Date: Thu, 12 Jul 2007 16:21:08 +0100 Subject: [MIPS] SMTC: Interrupt mask backstop hack To support multiple TC microthreads acting as "CPUs" within a VPE, VPE-wide interrupt mask bits must be specially manipulated during interrupt handling. To support legacy drivers and interrupt controller management code, SMTC has a "backstop" to track and if necessary restore the interrupt mask. This has some performance impact on interrupt service overhead. Disable it only if you know what you are doing. Signed-off-by: Ralf Baechle --- include/asm-mips/irq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h index 3ca6a07612..97102ebc54 100644 --- a/include/asm-mips/irq.h +++ b/include/asm-mips/irq.h @@ -24,7 +24,7 @@ static inline int irq_canonicalize(int irq) #define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */ #endif -#ifdef CONFIG_MIPS_MT_SMTC +#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP /* * Clear interrupt mask handling "backstop" if irq_hwmask * entry so indicates. This implies that the ack() or end() -- cgit v1.2.2 From fdc1f93847ea618e51f001805e022794d8bffff3 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 12 Jul 2007 17:41:21 +0100 Subject: [MIPS] Don't use genrtc. The only pseudo-legitimate MIPS user of genrtc was a systems that doesn't have an RTC in hardware at all. At this point faking one is a little pointless ... --- include/asm-mips/rtc.h | 73 -------------------------------------------------- 1 file changed, 73 deletions(-) delete mode 100644 include/asm-mips/rtc.h (limited to 'include') diff --git a/include/asm-mips/rtc.h b/include/asm-mips/rtc.h deleted file mode 100644 index 82ad401c7d..0000000000 --- a/include/asm-mips/rtc.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * include/asm-mips/rtc.h - * - * (Really an interface for drivers/char/genrtc.c) - * - * Copyright (C) 2004 MontaVista Software Inc. - * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net - * - * Please read the COPYING file for all license details. - */ - -#ifndef _MIPS_RTC_H -#define _MIPS_RTC_H - -#ifdef __KERNEL__ - -#include -#include - -#define RTC_PIE 0x40 /* periodic interrupt enable */ -#define RTC_AIE 0x20 /* alarm interrupt enable */ -#define RTC_UIE 0x10 /* update-finished interrupt enable */ - -/* some dummy definitions */ -#define RTC_BATT_BAD 0x100 /* battery bad */ -#define RTC_SQWE 0x08 /* enable square-wave output */ -#define RTC_DM_BINARY 0x04 /* all time/date values are BCD if clear */ -#define RTC_24H 0x02 /* 24 hour mode - else hours bit 7 means pm */ -#define RTC_DST_EN 0x01 /* auto switch DST - works f. USA only */ - -static inline unsigned int get_rtc_time(struct rtc_time *time) -{ - unsigned long nowtime; - - nowtime = rtc_mips_get_time(); - to_tm(nowtime, time); - time->tm_year -= 1900; - - return RTC_24H; -} - -static inline int set_rtc_time(struct rtc_time *time) -{ - unsigned long nowtime; - int ret; - - nowtime = mktime(time->tm_year+1900, time->tm_mon+1, - time->tm_mday, time->tm_hour, time->tm_min, - time->tm_sec); - ret = rtc_mips_set_time(nowtime); - - return ret; -} - -static inline unsigned int get_rtc_ss(void) -{ - struct rtc_time h; - - get_rtc_time(&h); - return h.tm_sec; -} - -static inline int get_rtc_pll(struct rtc_pll_info *pll) -{ - return -EINVAL; -} - -static inline int set_rtc_pll(struct rtc_pll_info *pll) -{ - return -EINVAL; -} -#endif -#endif -- cgit v1.2.2 From f8c09377d754f35a135454181b869ab527cc0757 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 11 Jul 2007 12:18:28 -0700 Subject: include/asm-i386/boot.h: This is , not include/asm-i386/boot.h incorrectly has the multiple include guards as _LINUX_BOOT_H instead of _ASM_BOOT_H. Fix. Signed-off-by: H. Peter Anvin Signed-off-by: Linus Torvalds --- include/asm-i386/boot.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include') diff --git a/include/asm-i386/boot.h b/include/asm-i386/boot.h index bd024ab4fe..ed8affbf96 100644 --- a/include/asm-i386/boot.h +++ b/include/asm-i386/boot.h @@ -1,5 +1,5 @@ -#ifndef _LINUX_BOOT_H -#define _LINUX_BOOT_H +#ifndef _ASM_BOOT_H +#define _ASM_BOOT_H /* Don't touch these, unless you really know what you're doing. */ #define DEF_INITSEG 0x9000 @@ -17,4 +17,4 @@ + (CONFIG_PHYSICAL_ALIGN - 1)) \ & ~(CONFIG_PHYSICAL_ALIGN - 1)) -#endif /* _LINUX_BOOT_H */ +#endif /* _ASM_BOOT_H */ -- cgit v1.2.2 From ec481536b15eb0520d8f0204b0294480050fe1f8 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 11 Jul 2007 12:18:29 -0700 Subject: Unify the CPU features vectors between i386 and x86-64 Unify the handling of the CPU features vectors between i386 and x86-64. This also adopts the collapsing of features which are required at compile-time into constant tests from x86-64 to i386. Signed-off-by: H. Peter Anvin Signed-off-by: Linus Torvalds --- include/asm-i386/cpufeature.h | 17 +++-- include/asm-i386/required-features.h | 38 ++++++++--- include/asm-x86_64/alternative.h | 68 +++++++++---------- include/asm-x86_64/cpufeature.h | 115 ++++----------------------------- include/asm-x86_64/processor.h | 2 - include/asm-x86_64/required-features.h | 45 +++++++++++++ 6 files changed, 133 insertions(+), 152 deletions(-) create mode 100644 include/asm-x86_64/required-features.h (limited to 'include') diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index f514e90664..7ea5f4a670 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h @@ -81,6 +81,7 @@ #define X86_FEATURE_BTS (3*32+13) /* Branch Trace Store */ #define X86_FEATURE_LAPIC_TIMER_BROKEN (3*32+ 14) /* lapic timer broken in C1 */ #define X86_FEATURE_SYNC_RDTSC (3*32+15) /* RDTSC synchronizes the CPU */ +#define X86_FEATURE_REP_GOOD (3*32+16) /* rep microcode works well on this CPU */ /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ #define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ @@ -108,11 +109,17 @@ #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ -#define cpu_has(c, bit) \ - ((__builtin_constant_p(bit) && (bit) < 32 && \ - (1UL << (bit)) & REQUIRED_MASK1) ? \ - 1 : \ - test_bit(bit, (c)->x86_capability)) +#define cpu_has(c, bit) \ + (__builtin_constant_p(bit) && \ + ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \ + (((bit)>>5)==1 && (1UL<<((bit)&31) & REQUIRED_MASK1)) || \ + (((bit)>>5)==2 && (1UL<<((bit)&31) & REQUIRED_MASK2)) || \ + (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \ + (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \ + (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \ + (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) ) \ + ? 1 : \ + test_bit(bit, (c)->x86_capability)) #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) #define cpu_has_fpu boot_cpu_has(X86_FEATURE_FPU) diff --git a/include/asm-i386/required-features.h b/include/asm-i386/required-features.h index 9db866c1e6..a9c3b1147b 100644 --- a/include/asm-i386/required-features.h +++ b/include/asm-i386/required-features.h @@ -3,32 +3,52 @@ /* Define minimum CPUID feature set for kernel These bits are checked really early to actually display a visible error message before the - kernel dies. Only add word 0 bits here + kernel dies. Make sure to assign features to the proper mask! Some requirements that are not in CPUID yet are also in the - CONFIG_X86_MINIMUM_CPU mode which is checked too. + CONFIG_X86_MINIMUM_CPU_FAMILY which is checked too. The real information is in arch/i386/Kconfig.cpu, this just converts the CONFIGs into a bitmask */ +#ifndef CONFIG_MATH_EMULATION +# define NEED_FPU (1<<(X86_FEATURE_FPU & 31)) +#else +# define NEED_FPU 0 +#endif + #ifdef CONFIG_X86_PAE -#define NEED_PAE (1< #include + +/* + * Alternative inline assembly for SMP. + * + * The LOCK_PREFIX macro defined here replaces the LOCK and + * LOCK_PREFIX macros used everywhere in the source tree. + * + * SMP alternatives use the same data structures as the other + * alternatives and the X86_FEATURE_UP flag to indicate the case of a + * UP system running a SMP kernel. The existing apply_alternatives() + * works fine for patching a SMP kernel for UP. + * + * The SMP alternative tables can be kept after boot and contain both + * UP and SMP versions of the instructions to allow switching back to + * SMP at runtime, when hotplugging in a new CPU, which is especially + * useful in virtualized environments. + * + * The very common lock prefix is handled as special case in a + * separate table which is a pure address list without replacement ptr + * and size information. That keeps the table sizes small. + */ + +#ifdef CONFIG_SMP +#define LOCK_PREFIX \ + ".section .smp_locks,\"a\"\n" \ + " .align 8\n" \ + " .quad 661f\n" /* address */ \ + ".previous\n" \ + "661:\n\tlock; " + +#else /* ! CONFIG_SMP */ +#define LOCK_PREFIX "" +#endif + +/* This must be included *after* the definition of LOCK_PREFIX */ #include struct alt_instr { @@ -108,39 +143,6 @@ static inline void alternatives_smp_switch(int smp) {} */ #define ASM_OUTPUT2(a, b) a, b -/* - * Alternative inline assembly for SMP. - * - * The LOCK_PREFIX macro defined here replaces the LOCK and - * LOCK_PREFIX macros used everywhere in the source tree. - * - * SMP alternatives use the same data structures as the other - * alternatives and the X86_FEATURE_UP flag to indicate the case of a - * UP system running a SMP kernel. The existing apply_alternatives() - * works fine for patching a SMP kernel for UP. - * - * The SMP alternative tables can be kept after boot and contain both - * UP and SMP versions of the instructions to allow switching back to - * SMP at runtime, when hotplugging in a new CPU, which is especially - * useful in virtualized environments. - * - * The very common lock prefix is handled as special case in a - * separate table which is a pure address list without replacement ptr - * and size information. That keeps the table sizes small. - */ - -#ifdef CONFIG_SMP -#define LOCK_PREFIX \ - ".section .smp_locks,\"a\"\n" \ - " .align 8\n" \ - " .quad 661f\n" /* address */ \ - ".previous\n" \ - "661:\n\tlock; " - -#else /* ! CONFIG_SMP */ -#define LOCK_PREFIX "" -#endif - struct paravirt_patch; #ifdef CONFIG_PARAVIRT void apply_paravirt(struct paravirt_patch *start, struct paravirt_patch *end); diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h index 0b3c686139..8baefc3beb 100644 --- a/include/asm-x86_64/cpufeature.h +++ b/include/asm-x86_64/cpufeature.h @@ -7,115 +7,24 @@ #ifndef __ASM_X8664_CPUFEATURE_H #define __ASM_X8664_CPUFEATURE_H -#define NCAPINTS 7 /* N 32-bit words worth of info */ +#include -/* Intel-defined CPU features, CPUID level 0x00000001, word 0 */ -#define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */ -#define X86_FEATURE_VME (0*32+ 1) /* Virtual Mode Extensions */ -#define X86_FEATURE_DE (0*32+ 2) /* Debugging Extensions */ -#define X86_FEATURE_PSE (0*32+ 3) /* Page Size Extensions */ -#define X86_FEATURE_TSC (0*32+ 4) /* Time Stamp Counter */ -#define X86_FEATURE_MSR (0*32+ 5) /* Model-Specific Registers, RDMSR, WRMSR */ -#define X86_FEATURE_PAE (0*32+ 6) /* Physical Address Extensions */ -#define X86_FEATURE_MCE (0*32+ 7) /* Machine Check Architecture */ -#define X86_FEATURE_CX8 (0*32+ 8) /* CMPXCHG8 instruction */ -#define X86_FEATURE_APIC (0*32+ 9) /* Onboard APIC */ -#define X86_FEATURE_SEP (0*32+11) /* SYSENTER/SYSEXIT */ -#define X86_FEATURE_MTRR (0*32+12) /* Memory Type Range Registers */ -#define X86_FEATURE_PGE (0*32+13) /* Page Global Enable */ -#define X86_FEATURE_MCA (0*32+14) /* Machine Check Architecture */ -#define X86_FEATURE_CMOV (0*32+15) /* CMOV instruction (FCMOVCC and FCOMI too if FPU present) */ -#define X86_FEATURE_PAT (0*32+16) /* Page Attribute Table */ -#define X86_FEATURE_PSE36 (0*32+17) /* 36-bit PSEs */ -#define X86_FEATURE_PN (0*32+18) /* Processor serial number */ -#define X86_FEATURE_CLFLSH (0*32+19) /* Supports the CLFLUSH instruction */ -#define X86_FEATURE_DS (0*32+21) /* Debug Store */ -#define X86_FEATURE_ACPI (0*32+22) /* ACPI via MSR */ -#define X86_FEATURE_MMX (0*32+23) /* Multimedia Extensions */ -#define X86_FEATURE_FXSR (0*32+24) /* FXSAVE and FXRSTOR instructions (fast save and restore */ - /* of FPU context), and CR4.OSFXSR available */ -#define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */ -#define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */ -#define X86_FEATURE_SELFSNOOP (0*32+27) /* CPU self snoop */ -#define X86_FEATURE_HT (0*32+28) /* Hyper-Threading */ -#define X86_FEATURE_ACC (0*32+29) /* Automatic clock control */ -#define X86_FEATURE_IA64 (0*32+30) /* IA-64 processor */ - -/* AMD-defined CPU features, CPUID level 0x80000001, word 1 */ -/* Don't duplicate feature flags which are redundant with Intel! */ -#define X86_FEATURE_SYSCALL (1*32+11) /* SYSCALL/SYSRET */ -#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */ -#define X86_FEATURE_FXSR_OPT (1*32+25) /* FXSR optimizations */ -#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */ -#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */ -#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */ -#define X86_FEATURE_3DNOW (1*32+31) /* 3DNow! */ - -/* Transmeta-defined CPU features, CPUID level 0x80860001, word 2 */ -#define X86_FEATURE_RECOVERY (2*32+ 0) /* CPU in recovery mode */ -#define X86_FEATURE_LONGRUN (2*32+ 1) /* Longrun power control */ -#define X86_FEATURE_LRTI (2*32+ 3) /* LongRun table interface */ - -/* Other features, Linux-defined mapping, word 3 */ -/* This range is used for feature bits which conflict or are synthesized */ -#define X86_FEATURE_CXMMX (3*32+ 0) /* Cyrix MMX extensions */ -#define X86_FEATURE_K6_MTRR (3*32+ 1) /* AMD K6 nonstandard MTRRs */ -#define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */ -#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */ -#define X86_FEATURE_REP_GOOD (3*32+ 4) /* rep microcode works well on this CPU */ -#define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */ -#define X86_FEATURE_SYNC_RDTSC (3*32+6) /* RDTSC syncs CPU core */ -#define X86_FEATURE_FXSAVE_LEAK (3*32+7) /* FIP/FOP/FDP leaks through FXSAVE */ -#define X86_FEATURE_UP (3*32+8) /* SMP kernel running on UP */ -#define X86_FEATURE_ARCH_PERFMON (3*32+9) /* Intel Architectural PerfMon */ -#define X86_FEATURE_PEBS (3*32+10) /* Precise-Event Based Sampling */ -#define X86_FEATURE_BTS (3*32+11) /* Branch Trace Store */ - -/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */ -#define X86_FEATURE_XMM3 (4*32+ 0) /* Streaming SIMD Extensions-3 */ -#define X86_FEATURE_MWAIT (4*32+ 3) /* Monitor/Mwait support */ -#define X86_FEATURE_DSCPL (4*32+ 4) /* CPL Qualified Debug Store */ -#define X86_FEATURE_EST (4*32+ 7) /* Enhanced SpeedStep */ -#define X86_FEATURE_TM2 (4*32+ 8) /* Thermal Monitor 2 */ -#define X86_FEATURE_CID (4*32+10) /* Context ID */ -#define X86_FEATURE_CX16 (4*32+13) /* CMPXCHG16B */ -#define X86_FEATURE_XTPR (4*32+14) /* Send Task Priority Messages */ - -/* VIA/Cyrix/Centaur-defined CPU features, CPUID level 0xC0000001, word 5 */ -#define X86_FEATURE_XSTORE (5*32+ 2) /* on-CPU RNG present (xstore insn) */ -#define X86_FEATURE_XSTORE_EN (5*32+ 3) /* on-CPU RNG enabled */ -#define X86_FEATURE_XCRYPT (5*32+ 6) /* on-CPU crypto (xcrypt insn) */ -#define X86_FEATURE_XCRYPT_EN (5*32+ 7) /* on-CPU crypto enabled */ - -/* More extended AMD flags: CPUID level 0x80000001, ecx, word 6 */ -#define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ -#define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ - -#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability) -#define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability) - -#define cpu_has_fpu 1 +#undef cpu_has_vme #define cpu_has_vme 0 -#define cpu_has_de 1 -#define cpu_has_pse 1 -#define cpu_has_tsc 1 + +#undef cpu_has_pae #define cpu_has_pae ___BUG___ -#define cpu_has_pge 1 -#define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC) -#define cpu_has_mtrr 1 -#define cpu_has_mmx 1 -#define cpu_has_fxsr 1 -#define cpu_has_xmm 1 -#define cpu_has_xmm2 1 -#define cpu_has_xmm3 boot_cpu_has(X86_FEATURE_XMM3) -#define cpu_has_ht boot_cpu_has(X86_FEATURE_HT) + +#undef cpu_has_mp #define cpu_has_mp 1 /* XXX */ + +#undef cpu_has_k6_mtrr #define cpu_has_k6_mtrr 0 + +#undef cpu_has_cyrix_arr #define cpu_has_cyrix_arr 0 + +#undef cpu_has_centaur_mcr #define cpu_has_centaur_mcr 0 -#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH) -#define cpu_has_ds boot_cpu_has(X86_FEATURE_DS) -#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS) -#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS) #endif /* __ASM_X8664_CPUFEATURE_H */ diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index 461ffe4c1f..df6457248d 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h @@ -368,8 +368,6 @@ static inline void sync_core(void) asm volatile("cpuid" : "=a" (tmp) : "0" (1) : "ebx","ecx","edx","memory"); } -#define cpu_has_fpu 1 - #define ARCH_HAS_PREFETCH static inline void prefetch(void *x) { diff --git a/include/asm-x86_64/required-features.h b/include/asm-x86_64/required-features.h new file mode 100644 index 0000000000..262f3159d0 --- /dev/null +++ b/include/asm-x86_64/required-features.h @@ -0,0 +1,45 @@ +#ifndef _ASM_REQUIRED_FEATURES_H +#define _ASM_REQUIRED_FEATURES_H 1 + +/* Define minimum CPUID feature set for kernel These bits are checked + really early to actually display a visible error message before the + kernel dies. Make sure to assign features to the proper mask! + + The real information is in arch/x86_64/Kconfig.cpu, this just converts + the CONFIGs into a bitmask */ + +/* x86-64 baseline features */ +#define NEED_FPU (1<<(X86_FEATURE_FPU & 31)) +#define NEED_PSE (1<<(X86_FEATURE_PSE & 31)) +#define NEED_MSR (1<<(X86_FEATURE_MSR & 31)) +#define NEED_PAE (1<<(X86_FEATURE_PAE & 31)) +#define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31)) +#define NEED_PGE (1<<(X86_FEATURE_PGE & 31)) +#define NEED_FXSR (1<<(X86_FEATURE_FXSR & 31)) +#define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31)) +#define NEED_XMM (1<<(X86_FEATURE_XMM & 31)) +#define NEED_XMM2 (1<<(X86_FEATURE_XMM2 & 31)) + +#define REQUIRED_MASK0 (NEED_FPU|NEED_PSE|NEED_MSR|NEED_PAE|\ + NEED_CX8|NEED_PGE|NEED_FXSR|NEED_CMOV|\ + NEED_XMM|NEED_XMM2) +#define SSE_MASK (NEED_XMM|NEED_XMM2) + +/* x86-64 baseline features */ +#define NEED_LM (1<<(X86_FEATURE_LM & 31)) + +#ifdef CONFIG_X86_USE_3DNOW +# define NEED_3DNOW (1<<(X86_FEATURE_3DNOW & 31)) +#else +# define NEED_3DNOW 0 +#endif + +#define REQUIRED_MASK1 (NEED_LM|NEED_3DNOW) + +#define REQUIRED_MASK2 0 +#define REQUIRED_MASK3 0 +#define REQUIRED_MASK4 0 +#define REQUIRED_MASK5 0 +#define REQUIRED_MASK6 0 + +#endif -- cgit v1.2.2 From e087db510cd96a75a614f6f6fcd5499ab21cb087 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 11 Jul 2007 12:18:31 -0700 Subject: Clean up struct screen_info () struct screen_info has unaligned members, it needs to be packed. In the process, fix the naming of some of the members, which don't belong in this structure but are part of it anyway. Signed-off-by: H. Peter Anvin Signed-off-by: Linus Torvalds --- include/linux/screen_info.h | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) (limited to 'include') diff --git a/include/linux/screen_info.h b/include/linux/screen_info.h index b02308ee76..3ee412bc00 100644 --- a/include/linux/screen_info.h +++ b/include/linux/screen_info.h @@ -10,7 +10,7 @@ struct screen_info { u8 orig_x; /* 0x00 */ u8 orig_y; /* 0x01 */ - u16 dontuse1; /* 0x02 -- EXT_MEM_K sits here */ + u16 ext_mem_k; /* 0x02 */ u16 orig_video_page; /* 0x04 */ u8 orig_video_mode; /* 0x06 */ u8 orig_video_cols; /* 0x07 */ @@ -27,7 +27,7 @@ struct screen_info { u16 lfb_depth; /* 0x16 */ u32 lfb_base; /* 0x18 */ u32 lfb_size; /* 0x1c */ - u16 dontuse2, dontuse3; /* 0x20 -- CL_MAGIC and CL_OFFSET here */ + u16 cl_magic, cl_offset; /* 0x20 */ u16 lfb_linelength; /* 0x24 */ u8 red_size; /* 0x26 */ u8 red_pos; /* 0x27 */ @@ -42,9 +42,8 @@ struct screen_info { u16 pages; /* 0x32 */ u16 vesa_attributes; /* 0x34 */ u32 capabilities; /* 0x36 */ - /* 0x3a -- 0x3b reserved for future expansion */ - /* 0x3c -- 0x3f micro stack for relocatable kernels */ -}; + u8 _reserved[6]; /* 0x3a */ +} __attribute__((packed)); extern struct screen_info screen_info; -- cgit v1.2.2 From 1d67953f2bda8876045c24ae58841f27d9bb7572 Mon Sep 17 00:00:00 2001 From: Venki Pallipadi Date: Wed, 11 Jul 2007 12:18:32 -0700 Subject: Use a new CPU feature word to cover features that are spread around Some Intel features are spread around in different CPUID leafs like 0x5, 0x6 and 0xA. Make this feature detection code common across i386 and x86_64. Display Intel Dynamic Acceleration feature in /proc/cpuinfo. This feature will be enabled automatically by current acpi-cpufreq driver. Refer to Intel Software Developer's Manual for more details about the feature. Thanks to hpa (H Peter Anvin) for the making the actual code detecting the scattered features data-driven. Signed-off-by: Venkatesh Pallipadi Signed-off-by: H. Peter Anvin Signed-off-by: Linus Torvalds --- include/asm-i386/cpufeature.h | 11 +++++++++-- include/asm-i386/processor.h | 1 + include/asm-i386/required-features.h | 1 + include/asm-x86_64/processor.h | 1 + include/asm-x86_64/required-features.h | 1 + 5 files changed, 13 insertions(+), 2 deletions(-) (limited to 'include') diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h index 7ea5f4a670..c961c03cf1 100644 --- a/include/asm-i386/cpufeature.h +++ b/include/asm-i386/cpufeature.h @@ -12,7 +12,7 @@ #endif #include -#define NCAPINTS 7 /* N 32-bit words worth of info */ +#define NCAPINTS 8 /* N 32-bit words worth of info */ /* Intel-defined CPU features, CPUID level 0x00000001 (edx), word 0 */ #define X86_FEATURE_FPU (0*32+ 0) /* Onboard FPU */ @@ -109,6 +109,12 @@ #define X86_FEATURE_LAHF_LM (6*32+ 0) /* LAHF/SAHF in long mode */ #define X86_FEATURE_CMP_LEGACY (6*32+ 1) /* If yes HyperThreading not valid */ +/* + * Auxiliary flags: Linux defined - For features scattered in various + * CPUID levels like 0x6, 0xA etc + */ +#define X86_FEATURE_IDA (7*32+ 0) /* Intel Dynamic Acceleration */ + #define cpu_has(c, bit) \ (__builtin_constant_p(bit) && \ ( (((bit)>>5)==0 && (1UL<<((bit)&31) & REQUIRED_MASK0)) || \ @@ -117,7 +123,8 @@ (((bit)>>5)==3 && (1UL<<((bit)&31) & REQUIRED_MASK3)) || \ (((bit)>>5)==4 && (1UL<<((bit)&31) & REQUIRED_MASK4)) || \ (((bit)>>5)==5 && (1UL<<((bit)&31) & REQUIRED_MASK5)) || \ - (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) ) \ + (((bit)>>5)==6 && (1UL<<((bit)&31) & REQUIRED_MASK6)) || \ + (((bit)>>5)==7 && (1UL<<((bit)&31) & REQUIRED_MASK7)) ) \ ? 1 : \ test_bit(bit, (c)->x86_capability)) #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h index 338668bfb0..94e0c147c1 100644 --- a/include/asm-i386/processor.h +++ b/include/asm-i386/processor.h @@ -119,6 +119,7 @@ void __init cpu_detect(struct cpuinfo_x86 *c); extern void identify_boot_cpu(void); extern void identify_secondary_cpu(struct cpuinfo_x86 *); extern void print_cpu_info(struct cpuinfo_x86 *); +extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); extern unsigned short num_cache_leaves; diff --git a/include/asm-i386/required-features.h b/include/asm-i386/required-features.h index a9c3b1147b..65848a0070 100644 --- a/include/asm-i386/required-features.h +++ b/include/asm-i386/required-features.h @@ -50,5 +50,6 @@ #define REQUIRED_MASK4 0 #define REQUIRED_MASK5 0 #define REQUIRED_MASK6 0 +#define REQUIRED_MASK7 0 #endif diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h index df6457248d..efc87a5aff 100644 --- a/include/asm-x86_64/processor.h +++ b/include/asm-x86_64/processor.h @@ -100,6 +100,7 @@ extern char ignore_irq13; extern void identify_cpu(struct cpuinfo_x86 *); extern void print_cpu_info(struct cpuinfo_x86 *); +extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c); extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c); extern unsigned short num_cache_leaves; diff --git a/include/asm-x86_64/required-features.h b/include/asm-x86_64/required-features.h index 262f3159d0..e80d5761b0 100644 --- a/include/asm-x86_64/required-features.h +++ b/include/asm-x86_64/required-features.h @@ -41,5 +41,6 @@ #define REQUIRED_MASK4 0 #define REQUIRED_MASK5 0 #define REQUIRED_MASK6 0 +#define REQUIRED_MASK7 0 #endif -- cgit v1.2.2 From 9c25d134b3735a4b197e108b4c7d6bbec1a275e8 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 11 Jul 2007 12:18:34 -0700 Subject: Make definitions for struct e820entry and struct e820map consistent Make definitions for struct e820entry and struct e820map consistent between i386 and x86-64. Signed-off-by: H. Peter Anvin Signed-off-by: Linus Torvalds --- include/asm-i386/e820.h | 14 ++++++++------ include/asm-x86_64/e820.h | 4 +--- 2 files changed, 9 insertions(+), 9 deletions(-) (limited to 'include') diff --git a/include/asm-i386/e820.h b/include/asm-i386/e820.h index 096a2a8eb1..c03290ccec 100644 --- a/include/asm-i386/e820.h +++ b/include/asm-i386/e820.h @@ -25,13 +25,15 @@ #ifndef __ASSEMBLY__ +struct e820entry { + u64 addr; /* start of memory segment */ + u64 size; /* size of memory segment */ + u32 type; /* type of memory segment */ +} __attribute__((packed)); + struct e820map { - int nr_map; - struct e820entry { - unsigned long long addr; /* start of memory segment */ - unsigned long long size; /* size of memory segment */ - unsigned long type; /* type of memory segment */ - } map[E820MAX]; + u32 nr_map; + struct e820entry map[E820MAX]; }; extern struct e820map e820; diff --git a/include/asm-x86_64/e820.h b/include/asm-x86_64/e820.h index 6216fa3f28..3486e701bd 100644 --- a/include/asm-x86_64/e820.h +++ b/include/asm-x86_64/e820.h @@ -11,8 +11,6 @@ #ifndef __E820_HEADER #define __E820_HEADER -#include - #define E820MAP 0x2d0 /* our map */ #define E820MAX 128 /* number of entries in E820MAP */ #define E820NR 0x1e8 /* # entries in E820MAP */ @@ -30,7 +28,7 @@ struct e820entry { } __attribute__((packed)); struct e820map { - int nr_map; + u32 nr_map; struct e820entry map[E820MAX]; }; -- cgit v1.2.2 From 48c7ae674f03e56c78ff42c6796a36e90db67874 Mon Sep 17 00:00:00 2001 From: "H. Peter Anvin" Date: Wed, 11 Jul 2007 12:18:35 -0700 Subject: Make struct boot_params a real structure, and remove obsolete fields Make struct boot_params a real structure, and remove the handling of some obsolete fields, in particular hd*_info, which was only used by the ST-506 driver, and likely to be wrong for that driver on any modern BIOS. Signed-off-by: H. Peter Anvin Signed-off-by: Linus Torvalds --- include/asm-i386/bootparam.h | 85 ++++++++++++++++++++++++++++++++++++++++++ include/asm-i386/setup.h | 10 +++-- include/asm-x86_64/boot.h | 16 +------- include/asm-x86_64/bootparam.h | 1 + 4 files changed, 93 insertions(+), 19 deletions(-) create mode 100644 include/asm-i386/bootparam.h create mode 100644 include/asm-x86_64/bootparam.h (limited to 'include') diff --git a/include/asm-i386/bootparam.h b/include/asm-i386/bootparam.h new file mode 100644 index 0000000000..427d8652bf --- /dev/null +++ b/include/asm-i386/bootparam.h @@ -0,0 +1,85 @@ +#ifndef _ASM_BOOTPARAM_H +#define _ASM_BOOTPARAM_H + +#include +#include +#include +#include +#include +#include