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-rw-r--r--include/asm-alpha/bitops.h50
-rw-r--r--include/asm-alpha/thread_info.h2
-rw-r--r--include/asm-alpha/unistd.h48
-rw-r--r--include/asm-arm/arch-ixp4xx/nas100d.h28
-rw-r--r--include/asm-arm/arch-ixp4xx/nslu2.h46
-rw-r--r--include/asm-arm/arch-ixp4xx/platform.h1
-rw-r--r--include/asm-arm/arch-s3c2410/map.h4
-rw-r--r--include/asm-arm/arch-s3c2410/regs-gpioj.h4
-rw-r--r--include/asm-arm/arch-s3c2410/regs-s3c2412.h21
-rw-r--r--include/asm-arm/ioctls.h4
-rw-r--r--include/asm-arm/mach/arch.h2
-rw-r--r--include/asm-arm/setup.h4
-rw-r--r--include/asm-arm/termbits.h16
-rw-r--r--include/asm-arm/termios.h6
-rw-r--r--include/asm-arm/tlbflush.h13
-rw-r--r--include/asm-arm26/setup.h2
-rw-r--r--include/asm-m68k/mmzone.h9
-rw-r--r--include/asm-m68k/module.h34
-rw-r--r--include/asm-m68k/motorola_pgtable.h10
-rw-r--r--include/asm-m68k/page.h77
-rw-r--r--include/asm-m68k/pgalloc.h3
-rw-r--r--include/asm-m68k/pgtable.h17
-rw-r--r--include/asm-m68k/sun3_pgtable.h4
-rw-r--r--include/asm-m68k/virtconvert.h49
-rw-r--r--include/asm-sparc/atomic.h38
-rw-r--r--include/asm-sparc64/bugs.h8
-rw-r--r--include/asm-sparc64/cpudata.h24
-rw-r--r--include/asm-sparc64/hypervisor.h643
-rw-r--r--include/asm-sparc64/kdebug.h1
-rw-r--r--include/asm-sparc64/mdesc.h39
-rw-r--r--include/asm-sparc64/oplib.h7
-rw-r--r--include/asm-sparc64/percpu.h4
-rw-r--r--include/asm-sparc64/prom.h1
-rw-r--r--include/asm-sparc64/smp.h4
-rw-r--r--include/asm-sparc64/sstate.h13
-rw-r--r--include/asm-sparc64/thread_info.h8
-rw-r--r--include/asm-sparc64/topology.h3
-rw-r--r--include/asm-sparc64/tsb.h2
-rw-r--r--include/linux/timer.h6
39 files changed, 1028 insertions, 227 deletions
diff --git a/include/asm-alpha/bitops.h b/include/asm-alpha/bitops.h
index 4b6ef7f21b..3a0cbeb03f 100644
--- a/include/asm-alpha/bitops.h
+++ b/include/asm-alpha/bitops.h
@@ -313,32 +313,29 @@ static inline int ffs(int word)
313 * fls: find last bit set. 313 * fls: find last bit set.
314 */ 314 */
315#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) 315#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67)
316static inline int fls(int word) 316static inline int fls64(unsigned long word)
317{ 317{
318 return 64 - __kernel_ctlz(word & 0xffffffff); 318 return 64 - __kernel_ctlz(word);
319} 319}
320#else 320#else
321#include <asm-generic/bitops/fls.h> 321extern const unsigned char __flsm1_tab[256];
322#endif
323#include <asm-generic/bitops/fls64.h>
324 322
325/* Compute powers of two for the given integer. */ 323static inline int fls64(unsigned long x)
326static inline long floor_log2(unsigned long word)
327{ 324{
328#if defined(CONFIG_ALPHA_EV6) && defined(CONFIG_ALPHA_EV67) 325 unsigned long t, a, r;
329 return 63 - __kernel_ctlz(word); 326
330#else 327 t = __kernel_cmpbge (x, 0x0101010101010101);
331 long bit; 328 a = __flsm1_tab[t];
332 for (bit = -1; word ; bit++) 329 t = __kernel_extbl (x, a);
333 word >>= 1; 330 r = a*8 + __flsm1_tab[t] + (x != 0);
334 return bit; 331
335#endif 332 return r;
336} 333}
334#endif
337 335
338static inline long ceil_log2(unsigned long word) 336static inline int fls(int x)
339{ 337{
340 long bit = floor_log2(word); 338 return fls64((unsigned int) x);
341 return bit + (word > (1UL << bit));
342} 339}
343 340
344/* 341/*
@@ -353,9 +350,20 @@ static inline unsigned long hweight64(unsigned long w)
353 return __kernel_ctpop(w); 350 return __kernel_ctpop(w);
354} 351}
355 352
356#define hweight32(x) (unsigned int) hweight64((x) & 0xfffffffful) 353static inline unsigned int hweight32(unsigned int w)
357#define hweight16(x) (unsigned int) hweight64((x) & 0xfffful) 354{
358#define hweight8(x) (unsigned int) hweight64((x) & 0xfful) 355 return hweight64(w);
356}
357
358static inline unsigned int hweight16(unsigned int w)
359{
360 return hweight64(w & 0xffff);
361}
362
363static inline unsigned int hweight8(unsigned int w)
364{
365 return hweight64(w & 0xff);
366}
359#else 367#else
360#include <asm-generic/bitops/hweight.h> 368#include <asm-generic/bitops/hweight.h>
361#endif 369#endif
diff --git a/include/asm-alpha/thread_info.h b/include/asm-alpha/thread_info.h
index f4defc2bd3..48a22e3e6f 100644
--- a/include/asm-alpha/thread_info.h
+++ b/include/asm-alpha/thread_info.h
@@ -76,12 +76,14 @@ register struct thread_info *__current_thread_info __asm__("$8");
76#define TIF_UAC_NOFIX 7 76#define TIF_UAC_NOFIX 7
77#define TIF_UAC_SIGBUS 8 77#define TIF_UAC_SIGBUS 8
78#define TIF_MEMDIE 9 78#define TIF_MEMDIE 9
79#define TIF_RESTORE_SIGMASK 10 /* restore signal mask in do_signal */
79 80
80#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE) 81#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
81#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME) 82#define _TIF_NOTIFY_RESUME (1<<TIF_NOTIFY_RESUME)
82#define _TIF_SIGPENDING (1<<TIF_SIGPENDING) 83#define _TIF_SIGPENDING (1<<TIF_SIGPENDING)
83#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 84#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
84#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 85#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
86#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
85 87
86/* Work to do on interrupt/exception return. */ 88/* Work to do on interrupt/exception return. */
87#define _TIF_WORK_MASK (_TIF_NOTIFY_RESUME \ 89#define _TIF_WORK_MASK (_TIF_NOTIFY_RESUME \
diff --git a/include/asm-alpha/unistd.h b/include/asm-alpha/unistd.h
index e58a427012..29bf2fdc91 100644
--- a/include/asm-alpha/unistd.h
+++ b/include/asm-alpha/unistd.h
@@ -233,6 +233,20 @@
233#define __NR_osf_memcntl 260 /* not implemented */ 233#define __NR_osf_memcntl 260 /* not implemented */
234#define __NR_osf_fdatasync 261 /* not implemented */ 234#define __NR_osf_fdatasync 261 /* not implemented */
235 235
236/*
237 * Ignore legacy syscalls that we don't use.
238 */
239#define __IGNORE_alarm
240#define __IGNORE_creat
241#define __IGNORE_getegid
242#define __IGNORE_geteuid
243#define __IGNORE_getgid
244#define __IGNORE_getpid
245#define __IGNORE_getppid
246#define __IGNORE_getuid
247#define __IGNORE_pause
248#define __IGNORE_time
249#define __IGNORE_utime
236 250
237/* 251/*
238 * Linux-specific system calls begin at 300 252 * Linux-specific system calls begin at 300
@@ -387,10 +401,42 @@
387#define __NR_inotify_init 444 401#define __NR_inotify_init 444
388#define __NR_inotify_add_watch 445 402#define __NR_inotify_add_watch 445
389#define __NR_inotify_rm_watch 446 403#define __NR_inotify_rm_watch 446
404#define __NR_fdatasync 447
405#define __NR_kexec_load 448
406#define __NR_migrate_pages 449
407#define __NR_openat 450
408#define __NR_mkdirat 451
409#define __NR_mknodat 452
410#define __NR_fchownat 453
411#define __NR_futimesat 454
412#define __NR_fstatat64 455
413#define __NR_unlinkat 456
414#define __NR_renameat 457
415#define __NR_linkat 458
416#define __NR_symlinkat 459
417#define __NR_readlinkat 460
418#define __NR_fchmodat 461
419#define __NR_faccessat 462
420#define __NR_pselect6 463
421#define __NR_ppoll 464
422#define __NR_unshare 465
423#define __NR_set_robust_list 466
424#define __NR_get_robust_list 467
425#define __NR_splice 468
426#define __NR_sync_file_range 469
427#define __NR_tee 470
428#define __NR_vmsplice 471
429#define __NR_move_pages 472
430#define __NR_getcpu 473
431#define __NR_epoll_pwait 474
432#define __NR_utimensat 475
433#define __NR_signalfd 476
434#define __NR_timerfd 477
435#define __NR_eventfd 478
390 436
391#ifdef __KERNEL__ 437#ifdef __KERNEL__
392 438
393#define NR_SYSCALLS 447 439#define NR_SYSCALLS 479
394 440
395#define __ARCH_WANT_IPC_PARSE_VERSION 441#define __ARCH_WANT_IPC_PARSE_VERSION
396#define __ARCH_WANT_OLD_READDIR 442#define __ARCH_WANT_OLD_READDIR
diff --git a/include/asm-arm/arch-ixp4xx/nas100d.h b/include/asm-arm/arch-ixp4xx/nas100d.h
index 84467a5190..131e0a1d0d 100644
--- a/include/asm-arm/arch-ixp4xx/nas100d.h
+++ b/include/asm-arm/arch-ixp4xx/nas100d.h
@@ -10,7 +10,7 @@
10 * based on ixdp425.h: 10 * based on ixdp425.h:
11 * Copyright 2004 (c) MontaVista, Software, Inc. 11 * Copyright 2004 (c) MontaVista, Software, Inc.
12 * 12 *
13 * This file is licensed under the terms of the GNU General Public 13 * This file is licensed under the terms of the GNU General Public
14 * License version 2. This program is licensed "as is" without any 14 * License version 2. This program is licensed "as is" without any
15 * warranty of any kind, whether express or implied. 15 * warranty of any kind, whether express or implied.
16 */ 16 */
@@ -36,31 +36,11 @@
36#define NAS100D_PCI_INTD_PIN 8 36#define NAS100D_PCI_INTD_PIN 8
37#define NAS100D_PCI_INTE_PIN 7 37#define NAS100D_PCI_INTE_PIN 7
38 38
39/* GPIO */
40
41#define NAS100D_GPIO0 0
42#define NAS100D_GPIO1 1
43#define NAS100D_GPIO2 2
44#define NAS100D_GPIO3 3
45#define NAS100D_GPIO4 4
46#define NAS100D_GPIO5 5
47#define NAS100D_GPIO6 6
48#define NAS100D_GPIO7 7
49#define NAS100D_GPIO8 8
50#define NAS100D_GPIO9 9
51#define NAS100D_GPIO10 10
52#define NAS100D_GPIO11 11
53#define NAS100D_GPIO12 12
54#define NAS100D_GPIO13 13
55#define NAS100D_GPIO14 14
56#define NAS100D_GPIO15 15
57
58
59/* Buttons */ 39/* Buttons */
60 40
61#define NAS100D_PB_GPIO NAS100D_GPIO14 41#define NAS100D_PB_GPIO 14
62#define NAS100D_RB_GPIO NAS100D_GPIO4 42#define NAS100D_RB_GPIO 4
63#define NAS100D_PO_GPIO NAS100D_GPIO12 /* power off */ 43#define NAS100D_PO_GPIO 12 /* power off */
64 44
65#define NAS100D_PB_IRQ IRQ_IXP4XX_GPIO14 45#define NAS100D_PB_IRQ IRQ_IXP4XX_GPIO14
66#define NAS100D_RB_IRQ IRQ_IXP4XX_GPIO4 46#define NAS100D_RB_IRQ IRQ_IXP4XX_GPIO4
diff --git a/include/asm-arm/arch-ixp4xx/nslu2.h b/include/asm-arm/arch-ixp4xx/nslu2.h
index 6b437f7c99..850fdc5b45 100644
--- a/include/asm-arm/arch-ixp4xx/nslu2.h
+++ b/include/asm-arm/arch-ixp4xx/nslu2.h
@@ -9,7 +9,7 @@
9 * based on ixdp425.h: 9 * based on ixdp425.h:
10 * Copyright 2004 (c) MontaVista, Software, Inc. 10 * Copyright 2004 (c) MontaVista, Software, Inc.
11 * 11 *
12 * This file is licensed under the terms of the GNU General Public 12 * This file is licensed under the terms of the GNU General Public
13 * License version 2. This program is licensed "as is" without any 13 * License version 2. This program is licensed "as is" without any
14 * warranty of any kind, whether express or implied. 14 * warranty of any kind, whether express or implied.
15 */ 15 */
@@ -34,36 +34,14 @@
34#define NSLU2_PCI_INTC_PIN 9 34#define NSLU2_PCI_INTC_PIN 9
35#define NSLU2_PCI_INTD_PIN 8 35#define NSLU2_PCI_INTD_PIN 8
36 36
37
38/* NSLU2 Timer */ 37/* NSLU2 Timer */
39#define NSLU2_FREQ 66000000 38#define NSLU2_FREQ 66000000
40#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
41#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
42
43/* GPIO */
44
45#define NSLU2_GPIO0 0
46#define NSLU2_GPIO1 1
47#define NSLU2_GPIO2 2
48#define NSLU2_GPIO3 3
49#define NSLU2_GPIO4 4
50#define NSLU2_GPIO5 5
51#define NSLU2_GPIO6 6
52#define NSLU2_GPIO7 7
53#define NSLU2_GPIO8 8
54#define NSLU2_GPIO9 9
55#define NSLU2_GPIO10 10
56#define NSLU2_GPIO11 11
57#define NSLU2_GPIO12 12
58#define NSLU2_GPIO13 13
59#define NSLU2_GPIO14 14
60#define NSLU2_GPIO15 15
61 39
62/* Buttons */ 40/* Buttons */
63 41
64#define NSLU2_PB_GPIO NSLU2_GPIO5 42#define NSLU2_PB_GPIO 5
65#define NSLU2_PO_GPIO NSLU2_GPIO8 /* power off */ 43#define NSLU2_PO_GPIO 8 /* power off */
66#define NSLU2_RB_GPIO NSLU2_GPIO12 44#define NSLU2_RB_GPIO 12
67 45
68#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5 46#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
69#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12 47#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
@@ -79,16 +57,16 @@
79 57
80/* LEDs */ 58/* LEDs */
81 59
82#define NSLU2_LED_RED NSLU2_GPIO0 60#define NSLU2_LED_RED_GPIO 0
83#define NSLU2_LED_GRN NSLU2_GPIO1 61#define NSLU2_LED_GRN_GPIO 1
84 62
85#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED) 63#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED_GPIO)
86#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN) 64#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN_GPIO)
87 65
88#define NSLU2_LED_DISK1 NSLU2_GPIO3 66#define NSLU2_LED_DISK1_GPIO 3
89#define NSLU2_LED_DISK2 NSLU2_GPIO2 67#define NSLU2_LED_DISK2_GPIO 2
90 68
91#define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2) 69#define NSLU2_LED_DISK1_BM (1L << NSLU2_LED_DISK1_GPIO)
92#define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3) 70#define NSLU2_LED_DISK2_BM (1L << NSLU2_LED_DISK2_GPIO)
93 71
94 72
diff --git a/include/asm-arm/arch-ixp4xx/platform.h b/include/asm-arm/arch-ixp4xx/platform.h
index ab194e5f66..2a44d3d679 100644
--- a/include/asm-arm/arch-ixp4xx/platform.h
+++ b/include/asm-arm/arch-ixp4xx/platform.h
@@ -113,6 +113,7 @@ extern unsigned long ixp4xx_timer_freq;
113extern void ixp4xx_map_io(void); 113extern void ixp4xx_map_io(void);
114extern void ixp4xx_init_irq(void); 114extern void ixp4xx_init_irq(void);
115extern void ixp4xx_sys_init(void); 115extern void ixp4xx_sys_init(void);
116extern void ixp4xx_timer_init(void);
116extern struct sys_timer ixp4xx_timer; 117extern struct sys_timer ixp4xx_timer;
117extern void ixp4xx_pci_preinit(void); 118extern void ixp4xx_pci_preinit(void);
118struct pci_sys_data; 119struct pci_sys_data;
diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h
index 4505aefbad..19e77f0380 100644
--- a/include/asm-arm/arch-s3c2410/map.h
+++ b/include/asm-arm/arch-s3c2410/map.h
@@ -153,6 +153,10 @@
153#define S3C2440_PA_AC97 (0x5B000000) 153#define S3C2440_PA_AC97 (0x5B000000)
154#define S3C2440_SZ_AC97 SZ_1M 154#define S3C2440_SZ_AC97 SZ_1M
155 155
156/* S3C2443 High-speed SD/MMC */
157#define S3C2443_PA_HSMMC (0x4A800000)
158#define S3C2443_SZ_HSMMC (256)
159
156/* ISA style IO, for each machine to sort out mappings for, if it 160/* ISA style IO, for each machine to sort out mappings for, if it
157 * implements it. We reserve two 16M regions for ISA. 161 * implements it. We reserve two 16M regions for ISA.
158 */ 162 */
diff --git a/include/asm-arm/arch-s3c2410/regs-gpioj.h b/include/asm-arm/arch-s3c2410/regs-gpioj.h
index 02131a5a1d..0362332faa 100644
--- a/include/asm-arm/arch-s3c2410/regs-gpioj.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpioj.h
@@ -98,5 +98,9 @@
98#define S3C2440_GPJ12_OUTP (0x01 << 24) 98#define S3C2440_GPJ12_OUTP (0x01 << 24)
99#define S3C2440_GPJ12_CAMRESET (0x02 << 24) 99#define S3C2440_GPJ12_CAMRESET (0x02 << 24)
100 100
101#define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13)
102#define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14)
103#define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15)
104
101#endif /* __ASM_ARCH_REGS_GPIOJ_H */ 105#endif /* __ASM_ARCH_REGS_GPIOJ_H */
102 106
diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h
new file mode 100644
index 0000000000..8ca6a3bc85
--- /dev/null
+++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h
@@ -0,0 +1,21 @@
1/* linux/include/asm-arm/arch-s3c2410/regs-s3c2412.h
2 *
3 * Copyright 2007 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * S3C2412 specific register definitions
12*/
13
14#ifndef __ASM_ARCH_REGS_S3C2412_H
15#define __ASM_ARCH_REGS_S3C2412_H "s3c2412"
16
17#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30)
18#define S3C2412_SWRST_RESET (0x533C2412)
19
20#endif /* __ASM_ARCH_REGS_S3C2412_H */
21
diff --git a/include/asm-arm/ioctls.h b/include/asm-arm/ioctls.h
index bb9a7aa10c..a91d8a1523 100644
--- a/include/asm-arm/ioctls.h
+++ b/include/asm-arm/ioctls.h
@@ -46,6 +46,10 @@
46#define TIOCSBRK 0x5427 /* BSD compatibility */ 46#define TIOCSBRK 0x5427 /* BSD compatibility */
47#define TIOCCBRK 0x5428 /* BSD compatibility */ 47#define TIOCCBRK 0x5428 /* BSD compatibility */
48#define TIOCGSID 0x5429 /* Return the session ID of FD */ 48#define TIOCGSID 0x5429 /* Return the session ID of FD */
49#define TCGETS2 _IOR('T',0x2A, struct termios2)
50#define TCSETS2 _IOW('T',0x2B, struct termios2)
51#define TCSETSW2 _IOW('T',0x2C, struct termios2)
52#define TCSETSF2 _IOW('T',0x2D, struct termios2)
49#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */ 53#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
50#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */ 54#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
51 55
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index fd2f9bf4dc..c59fad18e7 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -49,7 +49,7 @@ struct machine_desc {
49 */ 49 */
50#define MACHINE_START(_type,_name) \ 50#define MACHINE_START(_type,_name) \
51static const struct machine_desc __mach_desc_##_type \ 51static const struct machine_desc __mach_desc_##_type \
52 __attribute_used__ \ 52 __used \
53 __attribute__((__section__(".arch.info.init"))) = { \ 53 __attribute__((__section__(".arch.info.init"))) = { \
54 .nr = MACH_TYPE_##_type, \ 54 .nr = MACH_TYPE_##_type, \
55 .name = _name, 55 .name = _name,
diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h
index e5407392af..7bbf105463 100644
--- a/include/asm-arm/setup.h
+++ b/include/asm-arm/setup.h
@@ -185,7 +185,7 @@ struct tagtable {
185 185
186#ifdef __KERNEL__ 186#ifdef __KERNEL__
187 187
188#define __tag __attribute_used__ __attribute__((__section__(".taglist.init"))) 188#define __tag __used __attribute__((__section__(".taglist.init")))
189#define __tagtable(tag, fn) \ 189#define __tagtable(tag, fn) \
190static struct tagtable __tagtable_##fn __tag = { tag, fn } 190static struct tagtable __tagtable_##fn __tag = { tag, fn }
191 191
@@ -218,7 +218,7 @@ struct early_params {
218}; 218};
219 219
220#define __early_param(name,fn) \ 220#define __early_param(name,fn) \
221static struct early_params __early_##fn __attribute_used__ \ 221static struct early_params __early_##fn __used \
222__attribute__((__section__(".early_param.init"))) = { name, fn } 222__attribute__((__section__(".early_param.init"))) = { name, fn }
223 223
224#endif /* __KERNEL__ */ 224#endif /* __KERNEL__ */
diff --git a/include/asm-arm/termbits.h b/include/asm-arm/termbits.h
index a3f4fe1742..f784d11f40 100644
--- a/include/asm-arm/termbits.h
+++ b/include/asm-arm/termbits.h
@@ -15,6 +15,17 @@ struct termios {
15 cc_t c_cc[NCCS]; /* control characters */ 15 cc_t c_cc[NCCS]; /* control characters */
16}; 16};
17 17
18struct termios2 {
19 tcflag_t c_iflag; /* input mode flags */
20 tcflag_t c_oflag; /* output mode flags */
21 tcflag_t c_cflag; /* control mode flags */
22 tcflag_t c_lflag; /* local mode flags */
23 cc_t c_line; /* line discipline */
24 cc_t c_cc[NCCS]; /* control characters */
25 speed_t c_ispeed; /* input speed */
26 speed_t c_ospeed; /* output speed */
27};
28
18struct ktermios { 29struct ktermios {
19 tcflag_t c_iflag; /* input mode flags */ 30 tcflag_t c_iflag; /* input mode flags */
20 tcflag_t c_oflag; /* output mode flags */ 31 tcflag_t c_oflag; /* output mode flags */
@@ -128,6 +139,7 @@ struct ktermios {
128#define HUPCL 0002000 139#define HUPCL 0002000
129#define CLOCAL 0004000 140#define CLOCAL 0004000
130#define CBAUDEX 0010000 141#define CBAUDEX 0010000
142#define BOTHER 0010000
131#define B57600 0010001 143#define B57600 0010001
132#define B115200 0010002 144#define B115200 0010002
133#define B230400 0010003 145#define B230400 0010003
@@ -143,10 +155,12 @@ struct ktermios {
143#define B3000000 0010015 155#define B3000000 0010015
144#define B3500000 0010016 156#define B3500000 0010016
145#define B4000000 0010017 157#define B4000000 0010017
146#define CIBAUD 002003600000 /* input baud rate (not used) */ 158#define CIBAUD 002003600000 /* input baud rate */
147#define CMSPAR 010000000000 /* mark or space (stick) parity */ 159#define CMSPAR 010000000000 /* mark or space (stick) parity */
148#define CRTSCTS 020000000000 /* flow control */ 160#define CRTSCTS 020000000000 /* flow control */
149 161
162#define IBSHIFT 16
163
150/* c_lflag bits */ 164/* c_lflag bits */
151#define ISIG 0000001 165#define ISIG 0000001
152#define ICANON 0000002 166#define ICANON 0000002
diff --git a/include/asm-arm/termios.h b/include/asm-arm/termios.h
index 329c324c40..293e3f1bc3 100644
--- a/include/asm-arm/termios.h
+++ b/include/asm-arm/termios.h
@@ -82,8 +82,10 @@ struct termio {
82 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \ 82 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
83}) 83})
84 84
85#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios)) 85#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
86#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios)) 86#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
87#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
88#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
87 89
88#endif /* __KERNEL__ */ 90#endif /* __KERNEL__ */
89 91
diff --git a/include/asm-arm/tlbflush.h b/include/asm-arm/tlbflush.h
index ccd0de010e..71be4fded7 100644
--- a/include/asm-arm/tlbflush.h
+++ b/include/asm-arm/tlbflush.h
@@ -138,6 +138,19 @@
138# define v6wbi_always_flags (-1UL) 138# define v6wbi_always_flags (-1UL)
139#endif 139#endif
140 140
141#ifdef CONFIG_CPU_TLB_V7
142# define v7wbi_possible_flags v6wbi_tlb_flags
143# define v7wbi_always_flags v6wbi_tlb_flags
144# ifdef _TLB
145# define MULTI_TLB 1
146# else
147# define _TLB v7wbi
148# endif
149#else
150# define v7wbi_possible_flags 0
151# define v7wbi_always_flags (-1UL)
152#endif
153
141#ifndef _TLB 154#ifndef _TLB
142#error Unknown TLB model 155#error Unknown TLB model
143#endif 156#endif
diff --git a/include/asm-arm26/setup.h b/include/asm-arm26/setup.h
index 10fd07c766..e825623064 100644
--- a/include/asm-arm26/setup.h
+++ b/include/asm-arm26/setup.h
@@ -173,7 +173,7 @@ struct tagtable {
173 int (*parse)(const struct tag *); 173 int (*parse)(const struct tag *);
174}; 174};
175 175
176#define __tag __attribute_used__ __attribute__((__section__(".taglist"))) 176#define __tag __used __attribute__((__section__(".taglist")))
177#define __tagtable(tag, fn) \ 177#define __tagtable(tag, fn) \
178static struct tagtable __tagtable_##fn __tag = { tag, fn } 178static struct tagtable __tagtable_##fn __tag = { tag, fn }
179 179
diff --git a/include/asm-m68k/mmzone.h b/include/asm-m68k/mmzone.h
new file mode 100644
index 0000000000..e1f1ec7b70
--- /dev/null
+++ b/include/asm-m68k/mmzone.h
@@ -0,0 +1,9 @@
1#ifndef _ASM_M68K_MMZONE_H_
2#define _ASM_M68K_MMZONE_H_
3
4extern pg_data_t pg_data_map[];
5
6#define NODE_DATA(nid) (&pg_data_map[nid])
7#define NODE_MEM_MAP(nid) (NODE_DATA(nid)->node_mem_map)
8
9#endif /* _ASM_M68K_MMZONE_H_ */
diff --git a/include/asm-m68k/module.h b/include/asm-m68k/module.h
index c6d75af2d8..382d20a6fc 100644
--- a/include/asm-m68k/module.h
+++ b/include/asm-m68k/module.h
@@ -1,7 +1,39 @@
1#ifndef _ASM_M68K_MODULE_H 1#ifndef _ASM_M68K_MODULE_H
2#define _ASM_M68K_MODULE_H 2#define _ASM_M68K_MODULE_H
3struct mod_arch_specific { }; 3
4struct mod_arch_specific {
5 struct m68k_fixup_info *fixup_start, *fixup_end;
6};
7
8#define MODULE_ARCH_INIT { \
9 .fixup_start = __start_fixup, \
10 .fixup_end = __stop_fixup, \
11}
12
4#define Elf_Shdr Elf32_Shdr 13#define Elf_Shdr Elf32_Shdr
5#define Elf_Sym Elf32_Sym 14#define Elf_Sym Elf32_Sym
6#define Elf_Ehdr Elf32_Ehdr 15#define Elf_Ehdr Elf32_Ehdr
16
17
18enum m68k_fixup_type {
19 m68k_fixup_memoffset,
20 m68k_fixup_vnode_shift,
21};
22
23struct m68k_fixup_info {
24 enum m68k_fixup_type type;
25 void *addr;
26};
27
28#define m68k_fixup(type, addr) \
29 " .section \".m68k_fixup\",\"aw\"\n" \
30 " .long " #type "," #addr "\n" \
31 " .previous\n"
32
33extern struct m68k_fixup_info __start_fixup[], __stop_fixup[];
34
35struct module;
36extern void module_fixup(struct module *mod, struct m68k_fixup_info *start,
37 struct m68k_fixup_info *end);
38
7#endif /* _ASM_M68K_MODULE_H */ 39#endif /* _ASM_M68K_MODULE_H */
diff --git a/include/asm-m68k/motorola_pgtable.h b/include/asm-m68k/motorola_pgtable.h
index 61e4406ed9..b5b78c01eb 100644
--- a/include/asm-m68k/motorola_pgtable.h
+++ b/include/asm-m68k/motorola_pgtable.h
@@ -130,7 +130,7 @@ static inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp)
130#define pte_present(pte) (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE)) 130#define pte_present(pte) (pte_val(pte) & (_PAGE_PRESENT | _PAGE_PROTNONE))
131#define pte_clear(mm,addr,ptep) ({ pte_val(*(ptep)) = 0; }) 131#define pte_clear(mm,addr,ptep) ({ pte_val(*(ptep)) = 0; })
132 132
133#define pte_page(pte) (mem_map + ((unsigned long)(__va(pte_val(pte)) - PAGE_OFFSET) >> PAGE_SHIFT)) 133#define pte_page(pte) virt_to_page(__va(pte_val(pte)))
134#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT) 134#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
135#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 135#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
136 136
@@ -143,7 +143,7 @@ static inline void pgd_set(pgd_t *pgdp, pmd_t *pmdp)
143 while (--__i >= 0) \ 143 while (--__i >= 0) \
144 *__ptr++ = 0; \ 144 *__ptr++ = 0; \
145}) 145})
146#define pmd_page(pmd) (mem_map + ((unsigned long)(__va(pmd_val(pmd)) - PAGE_OFFSET) >> PAGE_SHIFT)) 146#define pmd_page(pmd) virt_to_page(__va(pmd_val(pmd)))
147 147
148 148
149#define pgd_none(pgd) (!pgd_val(pgd)) 149#define pgd_none(pgd) (!pgd_val(pgd))
@@ -223,10 +223,10 @@ static inline pte_t *pte_offset_kernel(pmd_t *pmdp, unsigned long address)
223 return (pte_t *)__pmd_page(*pmdp) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); 223 return (pte_t *)__pmd_page(*pmdp) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1));
224} 224}
225 225
226#define pte_offset_map(pmdp,address) ((pte_t *)kmap(pmd_page(*pmdp)) + ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))) 226#define pte_offset_map(pmdp,address) ((pte_t *)__pmd_page(*pmdp) + (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
227#define pte_offset_map_nested(pmdp, address) pte_offset_map(pmdp, address) 227#define pte_offset_map_nested(pmdp, address) pte_offset_map(pmdp, address)
228#define pte_unmap(pte) kunmap(pte) 228#define pte_unmap(pte) ((void)0)
229#define pte_unmap_nested(pte) kunmap(pte) 229#define pte_unmap_nested(pte) ((void)0)
230 230
231/* 231/*
232 * Allocate and free page tables. The xxx_kernel() versions are 232 * Allocate and free page tables. The xxx_kernel() versions are
diff --git a/include/asm-m68k/page.h b/include/asm-m68k/page.h
index fcc165ddd0..9e6d0d6deb 100644
--- a/include/asm-m68k/page.h
+++ b/include/asm-m68k/page.h
@@ -27,6 +27,8 @@
27 27
28#ifndef __ASSEMBLY__ 28#ifndef __ASSEMBLY__
29 29
30#include <asm/module.h>
31
30#define get_user_page(vaddr) __get_free_page(GFP_KERNEL) 32#define get_user_page(vaddr) __get_free_page(GFP_KERNEL)
31#define free_user_page(page, addr) free_page(addr) 33#define free_user_page(page, addr) free_page(addr)
32 34
@@ -114,18 +116,33 @@ typedef struct { unsigned long pgprot; } pgprot_t;
114 116
115#ifndef __ASSEMBLY__ 117#ifndef __ASSEMBLY__
116 118
119extern unsigned long m68k_memoffset;
120
117#ifndef CONFIG_SUN3 121#ifndef CONFIG_SUN3
118 122
119#define WANT_PAGE_VIRTUAL 123#define WANT_PAGE_VIRTUAL
120#ifdef CONFIG_SINGLE_MEMORY_CHUNK
121extern unsigned long m68k_memoffset;
122 124
123#define __pa(vaddr) ((unsigned long)(vaddr)+m68k_memoffset) 125static inline unsigned long ___pa(void *vaddr)
124#define __va(paddr) ((void *)((unsigned long)(paddr)-m68k_memoffset)) 126{
125#else 127 unsigned long paddr;
126#define __pa(vaddr) virt_to_phys((void *)(vaddr)) 128 asm (
127#define __va(paddr) phys_to_virt((unsigned long)(paddr)) 129 "1: addl #0,%0\n"
128#endif 130 m68k_fixup(%c2, 1b+2)
131 : "=r" (paddr)
132 : "0" (vaddr), "i" (m68k_fixup_memoffset));
133 return paddr;
134}
135#define __pa(vaddr) ___pa((void *)(vaddr))
136static inline void *__va(unsigned long paddr)
137{
138 void *vaddr;
139 asm (
140 "1: subl #0,%0\n"
141 m68k_fixup(%c2, 1b+2)
142 : "=r" (vaddr)
143 : "0" (paddr), "i" (m68k_fixup_memoffset));
144 return vaddr;
145}
129 146
130#else /* !CONFIG_SUN3 */ 147#else /* !CONFIG_SUN3 */
131/* This #define is a horrible hack to suppress lots of warnings. --m */ 148/* This #define is a horrible hack to suppress lots of warnings. --m */
@@ -161,11 +178,47 @@ static inline void *__va(unsigned long x)
161#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT) 178#define virt_to_pfn(kaddr) (__pa(kaddr) >> PAGE_SHIFT)
162#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT) 179#define pfn_to_virt(pfn) __va((pfn) << PAGE_SHIFT)
163 180
164#define virt_to_page(kaddr) (mem_map + (((unsigned long)(kaddr)-PAGE_OFFSET) >> PAGE_SHIFT)) 181extern int m68k_virt_to_node_shift;
165#define page_to_virt(page) ((((page) - mem_map) << PAGE_SHIFT) + PAGE_OFFSET) 182
183#ifdef CONFIG_SINGLE_MEMORY_CHUNK
184#define __virt_to_node(addr) (&pg_data_map[0])
185#else
186extern struct pglist_data *pg_data_table[];
187
188static inline __attribute_const__ int __virt_to_node_shift(void)
189{
190 int shift;
191
192 asm (
193 "1: moveq #0,%0\n"
194 m68k_fixup(%c1, 1b)
195 : "=d" (shift)
196 : "i" (m68k_fixup_vnode_shift));
197 return shift;
198}
199
200#define __virt_to_node(addr) (pg_data_table[(unsigned long)(addr) >> __virt_to_node_shift()])
201#endif
166 202
167#define pfn_to_page(pfn) virt_to_page(pfn_to_virt(pfn)) 203#define virt_to_page(addr) ({ \
168#define page_to_pfn(page) virt_to_pfn(page_to_virt(page)) 204 pfn_to_page(virt_to_pfn(addr)); \
205})
206#define page_to_virt(page) ({ \
207 pfn_to_virt(page_to_pfn(page)); \
208})
209
210#define pfn_to_page(pfn) ({ \
211 unsigned long __pfn = (pfn); \
212 struct pglist_data *pgdat; \
213 pgdat = __virt_to_node((unsigned long)pfn_to_virt(__pfn)); \
214 pgdat->node_mem_map + (__pfn - pgdat->node_start_pfn); \
215})
216#define page_to_pfn(_page) ({ \
217 struct page *__p = (_page); \
218 struct pglist_data *pgdat; \
219 pgdat = &pg_data_map[page_to_nid(__p)]; \
220 ((__p) - pgdat->node_mem_map) + pgdat->node_start_pfn; \
221})
169 222
170#define virt_addr_valid(kaddr) ((void *)(kaddr) >= (void *)PAGE_OFFSET && (void *)(kaddr) < high_memory) 223#define virt_addr_valid(kaddr) ((void *)(kaddr) >= (void *)PAGE_OFFSET && (void *)(kaddr) < high_memory)
171#define pfn_valid(pfn) virt_addr_valid(pfn_to_virt(pfn)) 224#define pfn_valid(pfn) virt_addr_valid(pfn_to_virt(pfn))
diff --git a/include/asm-m68k/pgalloc.h b/include/asm-m68k/pgalloc.h
index a9cfb4b99d..4cb1a57ab7 100644
--- a/include/asm-m68k/pgalloc.h
+++ b/include/asm-m68k/pgalloc.h
@@ -8,11 +8,12 @@
8#include <asm/virtconvert.h> 8#include <asm/virtconvert.h>
9 9
10 10
11
12#ifdef CONFIG_SUN3 11#ifdef CONFIG_SUN3
13#include <asm/sun3_pgalloc.h> 12#include <asm/sun3_pgalloc.h>
14#else 13#else
15#include <asm/motorola_pgalloc.h> 14#include <asm/motorola_pgalloc.h>
16#endif 15#endif
17 16
17extern void m68k_setup_node(int node);
18
18#endif /* M68K_PGALLOC_H */ 19#endif /* M68K_PGALLOC_H */
diff --git a/include/asm-m68k/pgtable.h b/include/asm-m68k/pgtable.h
index 555b87a1f7..778a4c538e 100644
--- a/include/asm-m68k/pgtable.h
+++ b/include/asm-m68k/pgtable.h
@@ -107,22 +107,7 @@ extern void *empty_zero_page;
107/* 64-bit machines, beware! SRB. */ 107/* 64-bit machines, beware! SRB. */
108#define SIZEOF_PTR_LOG2 2 108#define SIZEOF_PTR_LOG2 2
109 109
110/* 110#define mm_end_of_chunk(addr, len) 0
111 * Check if the addr/len goes up to the end of a physical
112 * memory chunk. Used for DMA functions.
113 */
114#ifdef CONFIG_SINGLE_MEMORY_CHUNK
115/*
116 * It makes no sense to consider whether we cross a memory boundary if
117 * we support just one physical chunk of memory.
118 */
119static inline int mm_end_of_chunk(unsigned long addr, int len)
120{
121 return 0;
122}
123#else
124int mm_end_of_chunk (unsigned long addr, int len);
125#endif
126 111
127extern void kernel_set_cachemode(void *addr, unsigned long size, int cmode); 112extern void kernel_set_cachemode(void *addr, unsigned long size, int cmode);
128 113
diff --git a/include/asm-m68k/sun3_pgtable.h b/include/asm-m68k/sun3_pgtable.h
index 5156a28a18..b9e62c1e7a 100644
--- a/include/asm-m68k/sun3_pgtable.h
+++ b/include/asm-m68k/sun3_pgtable.h
@@ -132,8 +132,8 @@ static inline void pte_clear (struct mm_struct *mm, unsigned long addr, pte_t *p
132#define pfn_pte(pfn, pgprot) \ 132#define pfn_pte(pfn, pgprot) \
133({ pte_t __pte; pte_val(__pte) = pfn | pgprot_val(pgprot); __pte; }) 133({ pte_t __pte; pte_val(__pte) = pfn | pgprot_val(pgprot); __pte; })
134 134
135#define pte_page(pte) (mem_map+((__pte_page(pte) - PAGE_OFFSET) >> PAGE_SHIFT)) 135#define pte_page(pte) virt_to_page(__pte_page(pte))
136#define pmd_page(pmd) (mem_map+((__pmd_page(pmd) - PAGE_OFFSET) >> PAGE_SHIFT)) 136#define pmd_page(pmd) virt_to_page(__pmd_page(pmd))
137 137
138 138
139static inline int pmd_none2 (pmd_t *pmd) { return !pmd_val (*pmd); } 139static inline int pmd_none2 (pmd_t *pmd) { return !pmd_val (*pmd); }
diff --git a/include/asm-m68k/virtconvert.h b/include/asm-m68k/virtconvert.h
index 83a87c9b1a..dea32fbc7e 100644
--- a/include/asm-m68k/virtconvert.h
+++ b/include/asm-m68k/virtconvert.h
@@ -8,56 +8,35 @@
8#ifdef __KERNEL__ 8#ifdef __KERNEL__
9 9
10#include <linux/compiler.h> 10#include <linux/compiler.h>
11#include <linux/mmzone.h>
11#include <asm/setup.h> 12#include <asm/setup.h>
12#include <asm/page.h> 13#include <asm/page.h>
13 14
14#ifdef CONFIG_AMIGA
15#include <asm/amigahw.h>
16#endif
17
18/* 15/*
19 * Change virtual addresses to physical addresses and vv. 16 * Change virtual addresses to physical addresses and vv.
20 */ 17 */
21#ifndef CONFIG_SUN3
22extern unsigned long mm_vtop(unsigned long addr) __attribute_const__;
23extern unsigned long mm_ptov(unsigned long addr) __attribute_const__;
24#else
25static inline unsigned long mm_vtop(unsigned long vaddr)
26{
27 return __pa(vaddr);
28}
29
30static inline unsigned long mm_ptov(unsigned long paddr)
31{
32 return (unsigned long)__va(paddr);
33}
34#endif
35
36#ifdef CONFIG_SINGLE_MEMORY_CHUNK
37static inline unsigned long virt_to_phys(void *vaddr)
38{
39 return (unsigned long)vaddr - PAGE_OFFSET + m68k_memory[0].addr;
40}
41
42static inline void * phys_to_virt(unsigned long paddr)
43{
44 return (void *)(paddr - m68k_memory[0].addr + PAGE_OFFSET);
45}
46#else
47static inline unsigned long virt_to_phys(void *address) 18static inline unsigned long virt_to_phys(void *address)
48{ 19{
49 return mm_vtop((unsigned long)address); 20 return __pa(address);
50} 21}
51 22
52static inline void *phys_to_virt(unsigned long address) 23static inline void *phys_to_virt(unsigned long address)
53{ 24{
54 return (void *) mm_ptov(address); 25 return __va(address);
55} 26}
56#endif
57 27
58/* Permanent address of a page. */ 28/* Permanent address of a page. */
59#define __page_address(page) (PAGE_OFFSET + (((page) - mem_map) << PAGE_SHIFT)) 29#ifdef CONFIG_SINGLE_MEMORY_CHUNK
60#define page_to_phys(page) virt_to_phys((void *)__page_address(page)) 30#define page_to_phys(page) \
31 __pa(PAGE_OFFSET + (((page) - pg_data_map[0].node_mem_map) << PAGE_SHIFT))
32#else
33#define page_to_phys(_page) ({ \
34 struct page *__page = _page; \
35 struct pglist_data *pgdat; \
36 pgdat = pg_data_table[page_to_nid(__page)]; \
37 page_to_pfn(__page) << PAGE_SHIFT; \
38})
39#endif
61 40
62/* 41/*
63 * IO bus memory addresses are 1:1 with the physical address, 42 * IO bus memory addresses are 1:1 with the physical address,
diff --git a/include/asm-sparc/atomic.h b/include/asm-sparc/atomic.h
index 731fa56e0c..bdca5416d8 100644
--- a/include/asm-sparc/atomic.h
+++ b/include/asm-sparc/atomic.h
@@ -2,6 +2,7 @@
2 * 2 *
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au) 4 * Copyright (C) 2000 Anton Blanchard (anton@linuxcare.com.au)
5 * Copyright (C) 2007 Kyle McMartin (kyle@parisc-linux.org)
5 * 6 *
6 * Additions by Keith M Wesolowski (wesolows@foobazco.org) based 7 * Additions by Keith M Wesolowski (wesolows@foobazco.org) based
7 * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>. 8 * on asm-parisc/atomic.h Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>.
@@ -10,11 +11,48 @@
10#ifndef __ARCH_SPARC_ATOMIC__ 11#ifndef __ARCH_SPARC_ATOMIC__
11#define __ARCH_SPARC_ATOMIC__ 12#define __ARCH_SPARC_ATOMIC__
12 13
14#include <linux/types.h>
13 15
14typedef struct { volatile int counter; } atomic_t; 16typedef struct { volatile int counter; } atomic_t;
15 17
16#ifdef __KERNEL__ 18#ifdef __KERNEL__
17 19
20/* Emulate cmpxchg() the same way we emulate atomics,
21 * by hashing the object address and indexing into an array
22 * of spinlocks to get a bit of performance...
23 *
24 * See arch/sparc/lib/atomic32.c for implementation.
25 *
26 * Cribbed from <asm-parisc/atomic.h>
27 */
28#define __HAVE_ARCH_CMPXCHG 1
29
30/* bug catcher for when unsupported size is used - won't link */
31extern void __cmpxchg_called_with_bad_pointer(void);
32/* we only need to support cmpxchg of a u32 on sparc */
33extern unsigned long __cmpxchg_u32(volatile u32 *m, u32 old, u32 new_);
34
35/* don't worry...optimizer will get rid of most of this */
36static __inline__ unsigned long
37__cmpxchg(volatile void *ptr, unsigned long old, unsigned long new_, int size)
38{
39 switch(size) {
40 case 4:
41 return __cmpxchg_u32((u32 *)ptr, (u32)old, (u32)new_);
42 default:
43 __cmpxchg_called_with_bad_pointer();
44 break;
45 }
46 return old;
47}
48
49#define cmpxchg(ptr,o,n) ({ \
50 __typeof__(*(ptr)) _o_ = (o); \
51 __typeof__(*(ptr)) _n_ = (n); \
52 (__typeof__(*(ptr))) __cmpxchg((ptr), (unsigned long)_o_, \
53 (unsigned long)_n_, sizeof(*(ptr))); \
54})
55
18#define ATOMIC_INIT(i) { (i) } 56#define ATOMIC_INIT(i) { (i) }
19 57
20extern int __atomic_add_return(int, atomic_t *); 58extern int __atomic_add_return(int, atomic_t *);
diff --git a/include/asm-sparc64/bugs.h b/include/asm-sparc64/bugs.h
index 120422fdb0..bf39d86c0c 100644
--- a/include/asm-sparc64/bugs.h
+++ b/include/asm-sparc64/bugs.h
@@ -1,9 +1,8 @@
1/* $Id: bugs.h,v 1.1 1996/12/26 13:25:20 davem Exp $ 1/* bugs.h: Sparc64 probes for various bugs.
2 * include/asm-sparc64/bugs.h: Sparc probes for various bugs.
3 * 2 *
4 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu) 3 * Copyright (C) 1996, 2007 David S. Miller (davem@davemloft.net)
5 */ 4 */
6 5#include <asm/sstate.h>
7 6
8extern unsigned long loops_per_jiffy; 7extern unsigned long loops_per_jiffy;
9 8
@@ -12,4 +11,5 @@ static void __init check_bugs(void)
12#ifndef CONFIG_SMP 11#ifndef CONFIG_SMP
13 cpu_data(0).udelay_val = loops_per_jiffy; 12 cpu_data(0).udelay_val = loops_per_jiffy;
14#endif 13#endif
14 sstate_running();
15} 15}
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index e89922d671..03c385de76 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -17,11 +17,11 @@
17typedef struct { 17typedef struct {
18 /* Dcache line 1 */ 18 /* Dcache line 1 */
19 unsigned int __softirq_pending; /* must be 1st, see rtrap.S */ 19 unsigned int __softirq_pending; /* must be 1st, see rtrap.S */
20 unsigned int __pad0_1; 20 unsigned int __pad0;
21 unsigned int __pad0_2;
22 unsigned int __pad1;
23 unsigned long clock_tick; /* %tick's per second */ 21 unsigned long clock_tick; /* %tick's per second */
24 unsigned long udelay_val; 22 unsigned long udelay_val;
23 unsigned int __pad1;
24 unsigned int __pad2;
25 25
26 /* Dcache line 2, rarely used */ 26 /* Dcache line 2, rarely used */
27 unsigned int dcache_size; 27 unsigned int dcache_size;
@@ -30,8 +30,8 @@ typedef struct {
30 unsigned int icache_line_size; 30 unsigned int icache_line_size;
31 unsigned int ecache_size; 31 unsigned int ecache_size;
32 unsigned int ecache_line_size; 32 unsigned int ecache_line_size;
33 int core_id;
33 unsigned int __pad3; 34 unsigned int __pad3;
34 unsigned int __pad4;
35} cpuinfo_sparc; 35} cpuinfo_sparc;
36 36
37DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data); 37DECLARE_PER_CPU(cpuinfo_sparc, __cpu_data);
@@ -76,12 +76,18 @@ struct trap_per_cpu {
76 76
77/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */ 77/* Dcache line 8: IRQ work list, and keep trap_block a power-of-2 in size. */
78 unsigned int irq_worklist; 78 unsigned int irq_worklist;
79 unsigned int __pad1; 79 unsigned int cpu_mondo_qmask;
80 unsigned long __pad2[3]; 80 unsigned int dev_mondo_qmask;
81 unsigned int resum_qmask;
82 unsigned int nonresum_qmask;
83 unsigned int __pad2[3];
81} __attribute__((aligned(64))); 84} __attribute__((aligned(64)));
82extern struct trap_per_cpu trap_block[NR_CPUS]; 85extern struct trap_per_cpu trap_block[NR_CPUS];
83extern void init_cur_cpu_trap(struct thread_info *); 86extern void init_cur_cpu_trap(struct thread_info *);
84extern void setup_tba(void); 87extern void setup_tba(void);
88extern int ncpus_probed;
89
90extern unsigned long real_hard_smp_processor_id(void);
85 91
86struct cpuid_patch_entry { 92struct cpuid_patch_entry {
87 unsigned int addr; 93 unsigned int addr;
@@ -122,6 +128,10 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
122#define TRAP_PER_CPU_TSB_HUGE 0xd0 128#define TRAP_PER_CPU_TSB_HUGE 0xd0
123#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8 129#define TRAP_PER_CPU_TSB_HUGE_TEMP 0xd8
124#define TRAP_PER_CPU_IRQ_WORKLIST 0xe0 130#define TRAP_PER_CPU_IRQ_WORKLIST 0xe0
131#define TRAP_PER_CPU_CPU_MONDO_QMASK 0xe4
132#define TRAP_PER_CPU_DEV_MONDO_QMASK 0xe8
133#define TRAP_PER_CPU_RESUM_QMASK 0xec
134#define TRAP_PER_CPU_NONRESUM_QMASK 0xf0
125 135
126#define TRAP_BLOCK_SZ_SHIFT 8 136#define TRAP_BLOCK_SZ_SHIFT 8
127 137
@@ -192,7 +202,7 @@ extern struct sun4v_2insn_patch_entry __sun4v_2insn_patch,
192 * the calculations done by the macro mid-stream. 202 * the calculations done by the macro mid-stream.
193 */ 203 */
194#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \ 204#define LOAD_PER_CPU_BASE(DEST, THR, REG1, REG2, REG3) \
195 ldub [THR + TI_CPU], REG1; \ 205 lduh [THR + TI_CPU], REG1; \
196 sethi %hi(__per_cpu_shift), REG3; \ 206 sethi %hi(__per_cpu_shift), REG3; \
197 sethi %hi(__per_cpu_base), REG2; \ 207 sethi %hi(__per_cpu_base), REG2; \
198 ldx [REG3 + %lo(__per_cpu_shift)], REG3; \ 208 ldx [REG3 + %lo(__per_cpu_shift)], REG3; \
diff --git a/include/asm-sparc64/hypervisor.h b/include/asm-sparc64/hypervisor.h
index a5558c8755..5cdb1ff048 100644
--- a/include/asm-sparc64/hypervisor.h
+++ b/include/asm-sparc64/hypervisor.h
@@ -73,6 +73,8 @@
73#define HV_ENOTSUPPORTED 13 /* Function not supported */ 73#define HV_ENOTSUPPORTED 13 /* Function not supported */
74#define HV_ENOMAP 14 /* No mapping found */ 74#define HV_ENOMAP 14 /* No mapping found */
75#define HV_ETOOMANY 15 /* Too many items specified */ 75#define HV_ETOOMANY 15 /* Too many items specified */
76#define HV_ECHANNEL 16 /* Invalid LDC channel */
77#define HV_EBUSY 17 /* Resource busy */
76 78
77/* mach_exit() 79/* mach_exit()
78 * TRAP: HV_FAST_TRAP 80 * TRAP: HV_FAST_TRAP
@@ -95,6 +97,10 @@
95 */ 97 */
96#define HV_FAST_MACH_EXIT 0x00 98#define HV_FAST_MACH_EXIT 0x00
97 99
100#ifndef __ASSEMBLY__
101extern void sun4v_mach_exit(unsigned long exit_core);
102#endif
103
98/* Domain services. */ 104/* Domain services. */
99 105
100/* mach_desc() 106/* mach_desc()
@@ -120,7 +126,13 @@
120 */ 126 */
121#define HV_FAST_MACH_DESC 0x01 127#define HV_FAST_MACH_DESC 0x01
122 128
123/* mach_exit() 129#ifndef __ASSEMBLY__
130extern unsigned long sun4v_mach_desc(unsigned long buffer_pa,
131 unsigned long buf_len,
132 unsigned long *real_buf_len);
133#endif
134
135/* mach_sir()
124 * TRAP: HV_FAST_TRAP 136 * TRAP: HV_FAST_TRAP
125 * FUNCTION: HV_FAST_MACH_SIR 137 * FUNCTION: HV_FAST_MACH_SIR
126 * ERRORS: This service does not return. 138 * ERRORS: This service does not return.
@@ -135,53 +147,66 @@
135 */ 147 */
136#define HV_FAST_MACH_SIR 0x02 148#define HV_FAST_MACH_SIR 0x02
137 149
138/* mach_set_soft_state() 150#ifndef __ASSEMBLY__
151extern void sun4v_mach_sir(void);
152#endif
153
154/* mach_set_watchdog()
139 * TRAP: HV_FAST_TRAP 155 * TRAP: HV_FAST_TRAP
140 * FUNCTION: HV_FAST_MACH_SET_SOFT_STATE 156 * FUNCTION: HV_FAST_MACH_SET_WATCHDOG
141 * ARG0: software state 157 * ARG0: timeout in milliseconds
142 * ARG1: software state description pointer
143 * RET0: status 158 * RET0: status
144 * ERRORS: EINVAL software state not valid or software state 159 * RET1: time remaining in milliseconds
145 * description is not NULL terminated
146 * ENORADDR software state description pointer is not a
147 * valid real address
148 * EBADALIGNED software state description is not correctly
149 * aligned
150 * 160 *
151 * This allows the guest to report it's soft state to the hypervisor. There 161 * A guest uses this API to set a watchdog timer. Once the gues has set
152 * are two primary components to this state. The first part states whether 162 * the timer, it must call the timer service again either to disable or
153 * the guest software is running or not. The second containts optional 163 * postpone the expiration. If the timer expires before being reset or
154 * details specific to the software. 164 * disabled, then the hypervisor take a platform specific action leading
165 * to guest termination within a bounded time period. The platform action
166 * may include recovery actions such as reporting the expiration to a
167 * Service Processor, and/or automatically restarting the gues.
155 * 168 *
156 * The software state argument is defined below in HV_SOFT_STATE_*, and 169 * The 'timeout' parameter is specified in milliseconds, however the
157 * indicates whether the guest is operating normally or in a transitional 170 * implementated granularity is given by the 'watchdog-resolution'
158 * state. 171 * property in the 'platform' node of the guest's machine description.
172 * The largest allowed timeout value is specified by the
173 * 'watchdog-max-timeout' property of the 'platform' node.
159 * 174 *
160 * The software state description argument is a real address of a data buffer 175 * If the 'timeout' argument is not zero, the watchdog timer is set to
161 * of size 32-bytes aligned on a 32-byte boundary. It is treated as a NULL 176 * expire after a minimum of 'timeout' milliseconds.
162 * terminated 7-bit ASCII string of up to 31 characters not including the
163 * NULL termination.
164 */
165#define HV_FAST_MACH_SET_SOFT_STATE 0x03
166#define HV_SOFT_STATE_NORMAL 0x01
167#define HV_SOFT_STATE_TRANSITION 0x02
168
169/* mach_get_soft_state()
170 * TRAP: HV_FAST_TRAP
171 * FUNCTION: HV_FAST_MACH_GET_SOFT_STATE
172 * ARG0: software state description pointer
173 * RET0: status
174 * RET1: software state
175 * ERRORS: ENORADDR software state description pointer is not a
176 * valid real address
177 * EBADALIGNED software state description is not correctly
178 * aligned
179 * 177 *
180 * Retrieve the current value of the guest's software state. The rules 178 * If the 'timeout' argument is zero, the watchdog timer is disabled.
181 * for the software state pointer are the same as for mach_set_soft_state() 179 *
182 * above. 180 * If the 'timeout' value exceeds the value of the 'max-watchdog-timeout'
181 * property, the hypervisor leaves the watchdog timer state unchanged,
182 * and returns a status of EINVAL.
183 *
184 * The 'time remaining' return value is valid regardless of whether the
185 * return status is EOK or EINVAL. A non-zero return value indicates the
186 * number of milliseconds that were remaining until the timer was to expire.
187 * If less than one millisecond remains, the return value is '1'. If the
188 * watchdog timer was disabled at the time of the call, the return value is
189 * zero.
190 *
191 * If the hypervisor cannot support the exact timeout value requested, but
192 * can support a larger timeout value, the hypervisor may round the actual
193 * timeout to a value larger than the requested timeout, consequently the
194 * 'time remaining' return value may be larger than the previously requested
195 * timeout value.
196 *
197 * Any guest OS debugger should be aware that the watchdog service may be in
198 * use. Consequently, it is recommended that the watchdog service is
199 * disabled upon debugger entry (e.g. reaching a breakpoint), and then
200 * re-enabled upon returning to normal execution. The API has been designed
201 * with this in mind, and the 'time remaining' result of the disable call may
202 * be used directly as the timeout argument of the re-enable call.
183 */ 203 */
184#define HV_FAST_MACH_GET_SOFT_STATE 0x04 204#define HV_FAST_MACH_SET_WATCHDOG 0x05
205
206#ifndef __ASSEMBLY__
207extern unsigned long sun4v_mach_set_watchdog(unsigned long timeout,
208 unsigned long *orig_timeout);
209#endif
185 210
186/* CPU services. 211/* CPU services.
187 * 212 *
@@ -206,8 +231,8 @@
206 * FUNCTION: HV_FAST_CPU_START 231 * FUNCTION: HV_FAST_CPU_START
207 * ARG0: CPU ID 232 * ARG0: CPU ID
208 * ARG1: PC 233 * ARG1: PC
209 * ARG1: RTBA 234 * ARG2: RTBA
210 * ARG1: target ARG0 235 * ARG3: target ARG0
211 * RET0: status 236 * RET0: status
212 * ERRORS: ENOCPU Invalid CPU ID 237 * ERRORS: ENOCPU Invalid CPU ID
213 * EINVAL Target CPU ID is not in the stopped state 238 * EINVAL Target CPU ID is not in the stopped state
@@ -224,6 +249,13 @@
224 */ 249 */
225#define HV_FAST_CPU_START 0x10 250#define HV_FAST_CPU_START 0x10
226 251
252#ifndef __ASSEMBLY__
253extern unsigned long sun4v_cpu_start(unsigned long cpuid,
254 unsigned long pc,
255 unsigned long rtba,
256 unsigned long arg0);
257#endif
258
227/* cpu_stop() 259/* cpu_stop()
228 * TRAP: HV_FAST_TRAP 260 * TRAP: HV_FAST_TRAP
229 * FUNCTION: HV_FAST_CPU_STOP 261 * FUNCTION: HV_FAST_CPU_STOP
@@ -245,6 +277,10 @@
245 */ 277 */
246#define HV_FAST_CPU_STOP 0x11 278#define HV_FAST_CPU_STOP 0x11
247 279
280#ifndef __ASSEMBLY__
281extern unsigned long sun4v_cpu_stop(unsigned long cpuid);
282#endif
283
248/* cpu_yield() 284/* cpu_yield()
249 * TRAP: HV_FAST_TRAP 285 * TRAP: HV_FAST_TRAP
250 * FUNCTION: HV_FAST_CPU_YIELD 286 * FUNCTION: HV_FAST_CPU_YIELD
@@ -588,6 +624,11 @@ struct hv_fault_status {
588 */ 624 */
589#define HV_FAST_MMU_TSB_CTX0 0x20 625#define HV_FAST_MMU_TSB_CTX0 0x20
590 626
627#ifndef __ASSEMBLY__
628extern unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions,
629 unsigned long tsb_desc_ra);
630#endif
631
591/* mmu_tsb_ctxnon0() 632/* mmu_tsb_ctxnon0()
592 * TRAP: HV_FAST_TRAP 633 * TRAP: HV_FAST_TRAP
593 * FUNCTION: HV_FAST_MMU_TSB_CTXNON0 634 * FUNCTION: HV_FAST_MMU_TSB_CTXNON0
@@ -694,6 +735,13 @@ struct hv_fault_status {
694 */ 735 */
695#define HV_FAST_MMU_MAP_PERM_ADDR 0x25 736#define HV_FAST_MMU_MAP_PERM_ADDR 0x25
696 737
738#ifndef __ASSEMBLY__
739extern unsigned long sun4v_mmu_map_perm_addr(unsigned long vaddr,
740 unsigned long set_to_zero,
741 unsigned long tte,
742 unsigned long flags);
743#endif
744
697/* mmu_fault_area_conf() 745/* mmu_fault_area_conf()
698 * TRAP: HV_FAST_TRAP 746 * TRAP: HV_FAST_TRAP
699 * FUNCTION: HV_FAST_MMU_FAULT_AREA_CONF 747 * FUNCTION: HV_FAST_MMU_FAULT_AREA_CONF
@@ -892,6 +940,10 @@ struct hv_fault_status {
892 */ 940 */
893#define HV_FAST_TOD_GET 0x50 941#define HV_FAST_TOD_GET 0x50
894 942
943#ifndef __ASSEMBLY__
944extern unsigned long sun4v_tod_get(unsigned long *time);
945#endif
946
895/* tod_set() 947/* tod_set()
896 * TRAP: HV_FAST_TRAP 948 * TRAP: HV_FAST_TRAP
897 * FUNCTION: HV_FAST_TOD_SET 949 * FUNCTION: HV_FAST_TOD_SET
@@ -905,6 +957,10 @@ struct hv_fault_status {
905 */ 957 */
906#define HV_FAST_TOD_SET 0x51 958#define HV_FAST_TOD_SET 0x51
907 959
960#ifndef __ASSEMBLY__
961extern unsigned long sun4v_tod_set(unsigned long time);
962#endif
963
908/* Console services */ 964/* Console services */
909 965
910/* con_getchar() 966/* con_getchar()
@@ -988,6 +1044,59 @@ extern unsigned long sun4v_con_write(unsigned long buffer,
988 unsigned long *bytes_written); 1044 unsigned long *bytes_written);
989#endif 1045#endif
990 1046
1047/* mach_set_soft_state()
1048 * TRAP: HV_FAST_TRAP
1049 * FUNCTION: HV_FAST_MACH_SET_SOFT_STATE
1050 * ARG0: software state
1051 * ARG1: software state description pointer
1052 * RET0: status
1053 * ERRORS: EINVAL software state not valid or software state
1054 * description is not NULL terminated
1055 * ENORADDR software state description pointer is not a
1056 * valid real address
1057 * EBADALIGNED software state description is not correctly
1058 * aligned
1059 *
1060 * This allows the guest to report it's soft state to the hypervisor. There
1061 * are two primary components to this state. The first part states whether
1062 * the guest software is running or not. The second containts optional
1063 * details specific to the software.
1064 *
1065 * The software state argument is defined below in HV_SOFT_STATE_*, and
1066 * indicates whether the guest is operating normally or in a transitional
1067 * state.
1068 *
1069 * The software state description argument is a real address of a data buffer
1070 * of size 32-bytes aligned on a 32-byte boundary. It is treated as a NULL
1071 * terminated 7-bit ASCII string of up to 31 characters not including the
1072 * NULL termination.
1073 */
1074#define HV_FAST_MACH_SET_SOFT_STATE 0x70
1075#define HV_SOFT_STATE_NORMAL 0x01
1076#define HV_SOFT_STATE_TRANSITION 0x02
1077
1078#ifndef __ASSEMBLY__
1079extern unsigned long sun4v_mach_set_soft_state(unsigned long soft_state,
1080 unsigned long msg_string_ra);
1081#endif
1082
1083/* mach_get_soft_state()
1084 * TRAP: HV_FAST_TRAP
1085 * FUNCTION: HV_FAST_MACH_GET_SOFT_STATE
1086 * ARG0: software state description pointer
1087 * RET0: status
1088 * RET1: software state
1089 * ERRORS: ENORADDR software state description pointer is not a
1090 * valid real address
1091 * EBADALIGNED software state description is not correctly
1092 * aligned
1093 *
1094 * Retrieve the current value of the guest's software state. The rules
1095 * for the software state pointer are the same as for mach_set_soft_state()
1096 * above.
1097 */
1098#define HV_FAST_MACH_GET_SOFT_STATE 0x71
1099
991/* Trap trace services. 1100/* Trap trace services.
992 * 1101 *
993 * The hypervisor provides a trap tracing capability for privileged 1102 * The hypervisor provides a trap tracing capability for privileged
@@ -1379,6 +1488,113 @@ extern unsigned long sun4v_intr_gettarget(unsigned long sysino);
1379extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid); 1488extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid);
1380#endif 1489#endif
1381 1490
1491/* vintr_get_cookie()
1492 * TRAP: HV_FAST_TRAP
1493 * FUNCTION: HV_FAST_VINTR_GET_COOKIE
1494 * ARG0: device handle
1495 * ARG1: device ino
1496 * RET0: status
1497 * RET1: cookie
1498 */
1499#define HV_FAST_VINTR_GET_COOKIE 0xa7
1500
1501/* vintr_set_cookie()
1502 * TRAP: HV_FAST_TRAP
1503 * FUNCTION: HV_FAST_VINTR_SET_COOKIE
1504 * ARG0: device handle
1505 * ARG1: device ino
1506 * ARG2: cookie
1507 * RET0: status
1508 */
1509#define HV_FAST_VINTR_SET_COOKIE 0xa8
1510
1511/* vintr_get_valid()
1512 * TRAP: HV_FAST_TRAP
1513 * FUNCTION: HV_FAST_VINTR_GET_VALID
1514 * ARG0: device handle
1515 * ARG1: device ino
1516 * RET0: status
1517 * RET1: valid state
1518 */
1519#define HV_FAST_VINTR_GET_VALID 0xa9
1520
1521/* vintr_set_valid()
1522 * TRAP: HV_FAST_TRAP
1523 * FUNCTION: HV_FAST_VINTR_SET_VALID
1524 * ARG0: device handle
1525 * ARG1: device ino
1526 * ARG2: valid state
1527 * RET0: status
1528 */
1529#define HV_FAST_VINTR_SET_VALID 0xaa
1530
1531/* vintr_get_state()
1532 * TRAP: HV_FAST_TRAP
1533 * FUNCTION: HV_FAST_VINTR_GET_STATE
1534 * ARG0: device handle
1535 * ARG1: device ino
1536 * RET0: status
1537 * RET1: state
1538 */
1539#define HV_FAST_VINTR_GET_STATE 0xab
1540
1541/* vintr_set_state()
1542 * TRAP: HV_FAST_TRAP
1543 * FUNCTION: HV_FAST_VINTR_SET_STATE
1544 * ARG0: device handle
1545 * ARG1: device ino
1546 * ARG2: state
1547 * RET0: status
1548 */
1549#define HV_FAST_VINTR_SET_STATE 0xac
1550
1551/* vintr_get_target()
1552 * TRAP: HV_FAST_TRAP
1553 * FUNCTION: HV_FAST_VINTR_GET_TARGET
1554 * ARG0: device handle
1555 * ARG1: device ino
1556 * RET0: status
1557 * RET1: cpuid
1558 */
1559#define HV_FAST_VINTR_GET_TARGET 0xad
1560
1561/* vintr_set_target()
1562 * TRAP: HV_FAST_TRAP
1563 * FUNCTION: HV_FAST_VINTR_SET_TARGET
1564 * ARG0: device handle
1565 * ARG1: device ino
1566 * ARG2: cpuid
1567 * RET0: status
1568 */
1569#define HV_FAST_VINTR_SET_TARGET 0xae
1570
1571#ifndef __ASSEMBLY__
1572extern unsigned long sun4v_vintr_get_cookie(unsigned long dev_handle,
1573 unsigned long dev_ino,
1574 unsigned long *cookie);
1575extern unsigned long sun4v_vintr_set_cookie(unsigned long dev_handle,
1576 unsigned long dev_ino,
1577 unsigned long cookie);
1578extern unsigned long sun4v_vintr_get_valid(unsigned long dev_handle,
1579 unsigned long dev_ino,
1580 unsigned long *valid);
1581extern unsigned long sun4v_vintr_set_valid(unsigned long dev_handle,
1582 unsigned long dev_ino,
1583 unsigned long valid);
1584extern unsigned long sun4v_vintr_get_state(unsigned long dev_handle,
1585 unsigned long dev_ino,
1586 unsigned long *state);
1587extern unsigned long sun4v_vintr_set_state(unsigned long dev_handle,
1588 unsigned long dev_ino,
1589 unsigned long state);
1590extern unsigned long sun4v_vintr_get_target(unsigned long dev_handle,
1591 unsigned long dev_ino,
1592 unsigned long *cpuid);
1593extern unsigned long sun4v_vintr_set_target(unsigned long dev_handle,
1594 unsigned long dev_ino,
1595 unsigned long cpuid);
1596#endif
1597
1382/* PCI IO services. 1598/* PCI IO services.
1383 * 1599 *
1384 * See the terminology descriptions in the device interrupt services 1600 * See the terminology descriptions in the device interrupt services
@@ -2037,6 +2253,346 @@ extern unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cp
2037 */ 2253 */
2038#define HV_FAST_PCI_MSG_SETVALID 0xd3 2254#define HV_FAST_PCI_MSG_SETVALID 0xd3
2039 2255
2256/* Logical Domain Channel services. */
2257
2258#define LDC_CHANNEL_DOWN 0
2259#define LDC_CHANNEL_UP 1
2260#define LDC_CHANNEL_RESETTING 2
2261
2262/* ldc_tx_qconf()
2263 * TRAP: HV_FAST_TRAP
2264 * FUNCTION: HV_FAST_LDC_TX_QCONF
2265 * ARG0: channel ID
2266 * ARG1: real address base of queue
2267 * ARG2: num entries in queue
2268 * RET0: status
2269 *
2270 * Configure transmit queue for the LDC endpoint specified by the
2271 * given channel ID, to be placed at the given real address, and
2272 * be of the given num entries. Num entries must be a power of two.
2273 * The real address base of the queue must be aligned on the queue
2274 * size. Each queue entry is 64-bytes, so for example, a 32 entry
2275 * queue must be aligned on a 2048 byte real address boundary.
2276 *
2277 * Upon configuration of a valid transmit queue the head and tail
2278 * pointers are set to a hypervisor specific identical value indicating
2279 * that the queue initially is empty.
2280 *
2281 * The endpoint's transmit queue is un-configured if num entries is zero.
2282 *
2283 * The maximum number of entries for each queue for a specific cpu may be
2284 * determined from the machine description. A transmit queue may be
2285 * specified even in the event that the LDC is down (peer endpoint has no
2286 * receive queue specified). Transmission will begin as soon as the peer
2287 * endpoint defines a receive queue.
2288 *
2289 * It is recommended that a guest wait for a transmit queue to empty prior
2290 * to reconfiguring it, or un-configuring it. Re or un-configuring of a
2291 * non-empty transmit queue behaves exactly as defined above, however it
2292 * is undefined as to how many of the pending entries in the original queue
2293 * will be delivered prior to the re-configuration taking effect.
2294 * Furthermore, as the queue configuration causes a reset of the head and
2295 * tail pointers there is no way for a guest to determine how many entries
2296 * have been sent after the configuration operation.
2297 */
2298#define HV_FAST_LDC_TX_QCONF 0xe0
2299
2300/* ldc_tx_qinfo()
2301 * TRAP: HV_FAST_TRAP
2302 * FUNCTION: HV_FAST_LDC_TX_QINFO
2303 * ARG0: channel ID
2304 * RET0: status
2305 * RET1: real address base of queue
2306 * RET2: num entries in queue
2307 *
2308 * Return the configuration info for the transmit queue of LDC endpoint
2309 * defined by the given channel ID. The real address is the currently
2310 * defined real address base of the defined queue, and num entries is the
2311 * size of the queue in terms of number of entries.
2312 *
2313 * If the specified channel ID is a valid endpoint number, but no transmit
2314 * queue has been defined this service will return success, but with num
2315 * entries set to zero and the real address will have an undefined value.
2316 */
2317#define HV_FAST_LDC_TX_QINFO 0xe1
2318
2319/* ldc_tx_get_state()
2320 * TRAP: HV_FAST_TRAP
2321 * FUNCTION: HV_FAST_LDC_TX_GET_STATE
2322 * ARG0: channel ID
2323 * RET0: status
2324 * RET1: head offset
2325 * RET2: tail offset
2326 * RET3: channel state
2327 *
2328 * Return the transmit state, and the head and tail queue pointers, for
2329 * the transmit queue of the LDC endpoint defined by the given channel ID.
2330 * The head and tail values are the byte offset of the head and tail
2331 * positions of the transmit queue for the specified endpoint.
2332 */
2333#define HV_FAST_LDC_TX_GET_STATE 0xe2
2334
2335/* ldc_tx_set_qtail()
2336 * TRAP: HV_FAST_TRAP
2337 * FUNCTION: HV_FAST_LDC_TX_SET_QTAIL
2338 * ARG0: channel ID
2339 * ARG1: tail offset
2340 * RET0: status
2341 *
2342 * Update the tail pointer for the transmit queue associated with the LDC
2343 * endpoint defined by the given channel ID. The tail offset specified
2344 * must be aligned on a 64 byte boundary, and calculated so as to increase
2345 * the number of pending entries on the transmit queue. Any attempt to
2346 * decrease the number of pending transmit queue entires is considered
2347 * an invalid tail offset and will result in an EINVAL error.
2348 *
2349 * Since the tail of the transmit queue may not be moved backwards, the
2350 * transmit queue may be flushed by configuring a new transmit queue,
2351 * whereupon the hypervisor will configure the initial transmit head and
2352 * tail pointers to be equal.
2353 */
2354#define HV_FAST_LDC_TX_SET_QTAIL 0xe3
2355
2356/* ldc_rx_qconf()
2357 * TRAP: HV_FAST_TRAP
2358 * FUNCTION: HV_FAST_LDC_RX_QCONF
2359 * ARG0: channel ID
2360 * ARG1: real address base of queue
2361 * ARG2: num entries in queue
2362 * RET0: status
2363 *
2364 * Configure receive queue for the LDC endpoint specified by the
2365 * given channel ID, to be placed at the given real address, and
2366 * be of the given num entries. Num entries must be a power of two.
2367 * The real address base of the queue must be aligned on the queue
2368 * size. Each queue entry is 64-bytes, so for example, a 32 entry
2369 * queue must be aligned on a 2048 byte real address boundary.
2370 *
2371 * The endpoint's transmit queue is un-configured if num entries is zero.
2372 *
2373 * If a valid receive queue is specified for a local endpoint the LDC is
2374 * in the up state for the purpose of transmission to this endpoint.
2375 *
2376 * The maximum number of entries for each queue for a specific cpu may be
2377 * determined from the machine description.
2378 *
2379 * As receive queue configuration causes a reset of the queue's head and
2380 * tail pointers there is no way for a gues to determine how many entries
2381 * have been received between a preceeding ldc_get_rx_state() API call
2382 * and the completion of the configuration operation. It should be noted
2383 * that datagram delivery is not guarenteed via domain channels anyway,
2384 * and therefore any higher protocol should be resilient to datagram
2385 * loss if necessary. However, to overcome this specific race potential
2386 * it is recommended, for example, that a higher level protocol be employed
2387 * to ensure either retransmission, or ensure that no datagrams are pending
2388 * on the peer endpoint's transmit queue prior to the configuration process.
2389 */
2390#define HV_FAST_LDC_RX_QCONF 0xe4
2391
2392/* ldc_rx_qinfo()
2393 * TRAP: HV_FAST_TRAP
2394 * FUNCTION: HV_FAST_LDC_RX_QINFO
2395 * ARG0: channel ID
2396 * RET0: status
2397 * RET1: real address base of queue
2398 * RET2: num entries in queue
2399 *
2400 * Return the configuration info for the receive queue of LDC endpoint
2401 * defined by the given channel ID. The real address is the currently
2402 * defined real address base of the defined queue, and num entries is the
2403 * size of the queue in terms of number of entries.
2404 *
2405 * If the specified channel ID is a valid endpoint number, but no receive
2406 * queue has been defined this service will return success, but with num
2407 * entries set to zero and the real address will have an undefined value.
2408 */
2409#define HV_FAST_LDC_RX_QINFO 0xe5
2410
2411/* ldc_rx_get_state()
2412 * TRAP: HV_FAST_TRAP
2413 * FUNCTION: HV_FAST_LDC_RX_GET_STATE
2414 * ARG0: channel ID
2415 * RET0: status
2416 * RET1: head offset
2417 * RET2: tail offset
2418 * RET3: channel state
2419 *
2420 * Return the receive state, and the head and tail queue pointers, for
2421 * the receive queue of the LDC endpoint defined by the given channel ID.
2422 * The head and tail values are the byte offset of the head and tail
2423 * positions of the receive queue for the specified endpoint.
2424 */
2425#define HV_FAST_LDC_RX_GET_STATE 0xe6
2426
2427/* ldc_rx_set_qhead()
2428 * TRAP: HV_FAST_TRAP
2429 * FUNCTION: HV_FAST_LDC_RX_SET_QHEAD
2430 * ARG0: channel ID
2431 * ARG1: head offset
2432 * RET0: status
2433 *
2434 * Update the head pointer for the receive queue associated with the LDC
2435 * endpoint defined by the given channel ID. The head offset specified
2436 * must be aligned on a 64 byte boundary, and calculated so as to decrease
2437 * the number of pending entries on the receive queue. Any attempt to
2438 * increase the number of pending receive queue entires is considered
2439 * an invalid head offset and will result in an EINVAL error.
2440 *
2441 * The receive queue may be flushed by setting the head offset equal
2442 * to the current tail offset.
2443 */
2444#define HV_FAST_LDC_RX_SET_QHEAD 0xe7
2445
2446/* LDC Map Table Entry. Each slot is defined by a translation table
2447 * entry, as specified by the LDC_MTE_* bits below, and a 64-bit
2448 * hypervisor invalidation cookie.
2449 */
2450#define LDC_MTE_PADDR 0x0fffffffffffe000 /* pa[55:13] */
2451#define LDC_MTE_COPY_W 0x0000000000000400 /* copy write access */
2452#define LDC_MTE_COPY_R 0x0000000000000200 /* copy read access */
2453#define LDC_MTE_IOMMU_W 0x0000000000000100 /* IOMMU write access */
2454#define LDC_MTE_IOMMU_R 0x0000000000000080 /* IOMMU read access */
2455#define LDC_MTE_EXEC 0x0000000000000040 /* execute */
2456#define LDC_MTE_WRITE 0x0000000000000020 /* read */
2457#define LDC_MTE_READ 0x0000000000000010 /* write */
2458#define LDC_MTE_SZALL 0x000000000000000f /* page size bits */
2459#define LDC_MTE_SZ16GB 0x0000000000000007 /* 16GB page */
2460#define LDC_MTE_SZ2GB 0x0000000000000006 /* 2GB page */
2461#define LDC_MTE_SZ256MB 0x0000000000000005 /* 256MB page */
2462#define LDC_MTE_SZ32MB 0x0000000000000004 /* 32MB page */
2463#define LDC_MTE_SZ4MB 0x0000000000000003 /* 4MB page */
2464#define LDC_MTE_SZ512K 0x0000000000000002 /* 512K page */
2465#define LDC_MTE_SZ64K 0x0000000000000001 /* 64K page */
2466#define LDC_MTE_SZ8K 0x0000000000000000 /* 8K page */
2467
2468#ifndef __ASSEMBLY__
2469struct ldc_mtable_entry {
2470 unsigned long mte;
2471 unsigned long cookie;
2472};
2473#endif
2474
2475/* ldc_set_map_table()
2476 * TRAP: HV_FAST_TRAP
2477 * FUNCTION: HV_FAST_LDC_SET_MAP_TABLE
2478 * ARG0: channel ID
2479 * ARG1: table real address
2480 * ARG2: num entries
2481 * RET0: status
2482 *
2483 * Register the MTE table at the given table real address, with the
2484 * specified num entries, for the LDC indicated by the given channel
2485 * ID.
2486 */
2487#define HV_FAST_LDC_SET_MAP_TABLE 0xea
2488
2489/* ldc_get_map_table()
2490 * TRAP: HV_FAST_TRAP
2491 * FUNCTION: HV_FAST_LDC_GET_MAP_TABLE
2492 * ARG0: channel ID
2493 * RET0: status
2494 * RET1: table real address
2495 * RET2: num entries
2496 *
2497 * Return the configuration of the current mapping table registered
2498 * for the given channel ID.
2499 */
2500#define HV_FAST_LDC_GET_MAP_TABLE 0xeb
2501
2502#define LDC_COPY_IN 0
2503#define LDC_COPY_OUT 1
2504
2505/* ldc_copy()
2506 * TRAP: HV_FAST_TRAP
2507 * FUNCTION: HV_FAST_LDC_COPY
2508 * ARG0: channel ID
2509 * ARG1: LDC_COPY_* direction code
2510 * ARG2: target real address
2511 * ARG3: local real address
2512 * ARG4: length in bytes
2513 * RET0: status
2514 * RET1: actual length in bytes
2515 */
2516#define HV_FAST_LDC_COPY 0xec
2517
2518#define LDC_MEM_READ 1
2519#define LDC_MEM_WRITE 2
2520#define LDC_MEM_EXEC 4
2521
2522/* ldc_mapin()
2523 * TRAP: HV_FAST_TRAP
2524 * FUNCTION: HV_FAST_LDC_MAPIN
2525 * ARG0: channel ID
2526 * ARG1: cookie
2527 * RET0: status
2528 * RET1: real address
2529 * RET2: LDC_MEM_* permissions
2530 */
2531#define HV_FAST_LDC_MAPIN 0xed
2532
2533/* ldc_unmap()
2534 * TRAP: HV_FAST_TRAP
2535 * FUNCTION: HV_FAST_LDC_UNMAP
2536 * ARG0: real address
2537 * RET0: status
2538 */
2539#define HV_FAST_LDC_UNMAP 0xee
2540
2541/* ldc_revoke()
2542 * TRAP: HV_FAST_TRAP
2543 * FUNCTION: HV_FAST_LDC_REVOKE
2544 * ARG0: cookie
2545 * ARG1: ldc_mtable_entry cookie
2546 * RET0: status
2547 */
2548#define HV_FAST_LDC_REVOKE 0xef
2549
2550#ifndef __ASSEMBLY__
2551extern unsigned long sun4v_ldc_tx_qconf(unsigned long channel,
2552 unsigned long ra,
2553 unsigned long num_entries);
2554extern unsigned long sun4v_ldc_tx_qinfo(unsigned long channel,
2555 unsigned long *ra,
2556 unsigned long *num_entries);
2557extern unsigned long sun4v_ldc_tx_get_state(unsigned long channel,
2558 unsigned long *head_off,
2559 unsigned long *tail_off,
2560 unsigned long *chan_state);
2561extern unsigned long sun4v_ldc_tx_set_qtail(unsigned long channel,
2562 unsigned long tail_off);
2563extern unsigned long sun4v_ldc_rx_qconf(unsigned long channel,
2564 unsigned long ra,
2565 unsigned long num_entries);
2566extern unsigned long sun4v_ldc_rx_qinfo(unsigned long channel,
2567 unsigned long *ra,
2568 unsigned long *num_entries);
2569extern unsigned long sun4v_ldc_rx_get_state(unsigned long channel,
2570 unsigned long *head_off,
2571 unsigned long *tail_off,
2572 unsigned long *chan_state);
2573extern unsigned long sun4v_ldc_rx_set_qhead(unsigned long channel,
2574 unsigned long head_off);
2575extern unsigned long sun4v_ldc_set_map_table(unsigned long channel,
2576 unsigned long ra,
2577 unsigned long num_entries);
2578extern unsigned long sun4v_ldc_get_map_table(unsigned long channel,
2579 unsigned long *ra,
2580 unsigned long *num_entries);
2581extern unsigned long sun4v_ldc_copy(unsigned long channel,
2582 unsigned long dir_code,
2583 unsigned long tgt_raddr,
2584 unsigned long lcl_raddr,
2585 unsigned long len,
2586 unsigned long *actual_len);
2587extern unsigned long sun4v_ldc_mapin(unsigned long channel,
2588 unsigned long cookie,
2589 unsigned long *ra,
2590 unsigned long *perm);
2591extern unsigned long sun4v_ldc_unmap(unsigned long ra);
2592extern unsigned long sun4v_ldc_revoke(unsigned long cookie,
2593 unsigned long mte_cookie);
2594#endif
2595
2040/* Performance counter services. */ 2596/* Performance counter services. */
2041 2597
2042#define HV_PERF_JBUS_PERF_CTRL_REG 0x00 2598#define HV_PERF_JBUS_PERF_CTRL_REG 0x00
@@ -2204,6 +2760,7 @@ extern void sun4v_hvapi_unregister(unsigned long group);
2204extern int sun4v_hvapi_get(unsigned long group, 2760extern int sun4v_hvapi_get(unsigned long group,
2205 unsigned long *major, 2761 unsigned long *major,
2206 unsigned long *minor); 2762 unsigned long *minor);
2763extern void sun4v_hvapi_init(void);
2207#endif 2764#endif
2208 2765
2209#endif /* !(_SPARC64_HYPERVISOR_H) */ 2766#endif /* !(_SPARC64_HYPERVISOR_H) */
diff --git a/include/asm-sparc64/kdebug.h b/include/asm-sparc64/kdebug.h
index 627e3396a5..9974c7b0ae 100644
--- a/include/asm-sparc64/kdebug.h
+++ b/include/asm-sparc64/kdebug.h
@@ -32,7 +32,6 @@ enum die_val {
32 DIE_TRAP, 32 DIE_TRAP,
33 DIE_TRAP_TL1, 33 DIE_TRAP_TL1,
34 DIE_CALL, 34 DIE_CALL,
35 DIE_PAGE_FAULT,
36}; 35};
37 36
38#endif 37#endif
diff --git a/include/asm-sparc64/mdesc.h b/include/asm-sparc64/mdesc.h
new file mode 100644
index 0000000000..124eb8ca23
--- /dev/null
+++ b/include/asm-sparc64/mdesc.h
@@ -0,0 +1,39 @@
1#ifndef _SPARC64_MDESC_H
2#define _SPARC64_MDESC_H
3
4#include <linux/types.h>
5#include <asm/prom.h>
6
7struct mdesc_node;
8struct mdesc_arc {
9 const char *name;
10 struct mdesc_node *arc;
11};
12
13struct mdesc_node {
14 const char *name;
15 u64 node;
16 unsigned int unique_id;
17 unsigned int num_arcs;
18 struct property *properties;
19 struct mdesc_node *hash_next;
20 struct mdesc_node *allnodes_next;
21 struct mdesc_arc arcs[0];
22};
23
24extern struct mdesc_node *md_find_node_by_name(struct mdesc_node *from,
25 const char *name);
26#define md_for_each_node_by_name(__mn, __name) \
27 for (__mn = md_find_node_by_name(NULL, __name); __mn; \
28 __mn = md_find_node_by_name(__mn, __name))
29
30extern struct property *md_find_property(const struct mdesc_node *mp,
31 const char *name,
32 int *lenp);
33extern const void *md_get_property(const struct mdesc_node *mp,
34 const char *name,
35 int *lenp);
36
37extern void sun4v_mdesc_init(void);
38
39#endif
diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h
index 6a0da3b169..992f9f7a47 100644
--- a/include/asm-sparc64/oplib.h
+++ b/include/asm-sparc64/oplib.h
@@ -316,11 +316,8 @@ extern int prom_setprop(int node, const char *prop_name, char *prop_value,
316 316
317extern int prom_pathtoinode(const char *path); 317extern int prom_pathtoinode(const char *path);
318extern int prom_inst2pkg(int); 318extern int prom_inst2pkg(int);
319 319extern int prom_service_exists(const char *service_name);
320/* CPU probing helpers. */ 320extern void prom_sun4v_guest_soft_state(void);
321struct device_node;
322int cpu_find_by_instance(int instance, struct device_node **dev_node, int *mid);
323int cpu_find_by_mid(int mid, struct device_node **prom_node);
324 321
325/* Client interface level routines. */ 322/* Client interface level routines. */
326extern void prom_set_trap_table(unsigned long tba); 323extern void prom_set_trap_table(unsigned long tba);
diff --git a/include/asm-sparc64/percpu.h b/include/asm-sparc64/percpu.h
index ced8cbde04..88db872ce2 100644
--- a/include/asm-sparc64/percpu.h
+++ b/include/asm-sparc64/percpu.h
@@ -5,7 +5,8 @@
5 5
6#ifdef CONFIG_SMP 6#ifdef CONFIG_SMP
7 7
8extern void setup_per_cpu_areas(void); 8#define setup_per_cpu_areas() do { } while (0)
9extern void real_setup_per_cpu_areas(void);
9 10
10extern unsigned long __per_cpu_base; 11extern unsigned long __per_cpu_base;
11extern unsigned long __per_cpu_shift; 12extern unsigned long __per_cpu_shift;
@@ -34,6 +35,7 @@ do { \
34} while (0) 35} while (0)
35#else /* ! SMP */ 36#else /* ! SMP */
36 37
38#define real_setup_per_cpu_areas() do { } while (0)
37#define DEFINE_PER_CPU(type, name) \ 39#define DEFINE_PER_CPU(type, name) \
38 __typeof__(type) per_cpu__##name 40 __typeof__(type) per_cpu__##name
39 41
diff --git a/include/asm-sparc64/prom.h b/include/asm-sparc64/prom.h
index ddad5f99ac..b4df3042ad 100644
--- a/include/asm-sparc64/prom.h
+++ b/include/asm-sparc64/prom.h
@@ -90,6 +90,7 @@ extern struct device_node *of_find_compatible_node(struct device_node *from,
90 const char *type, const char *compat); 90 const char *type, const char *compat);
91extern struct device_node *of_find_node_by_path(const char *path); 91extern struct device_node *of_find_node_by_path(const char *path);
92extern struct device_node *of_find_node_by_phandle(phandle handle); 92extern struct device_node *of_find_node_by_phandle(phandle handle);
93extern struct device_node *of_find_node_by_cpuid(int cpuid);
93extern struct device_node *of_get_parent(const struct device_node *node); 94extern struct device_node *of_get_parent(const struct device_node *node);
94extern struct device_node *of_get_next_child(const struct device_node *node, 95extern struct device_node *of_get_next_child(const struct device_node *node,
95 struct device_node *prev); 96 struct device_node *prev);
diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h
index 869d16fb90..f76e1492ad 100644
--- a/include/asm-sparc64/smp.h
+++ b/include/asm-sparc64/smp.h
@@ -41,7 +41,7 @@ extern cpumask_t cpu_sibling_map[NR_CPUS];
41extern int hard_smp_processor_id(void); 41extern int hard_smp_processor_id(void);
42#define raw_smp_processor_id() (current_thread_info()->cpu) 42#define raw_smp_processor_id() (current_thread_info()->cpu)
43 43
44extern void smp_setup_cpu_possible_map(void); 44extern void smp_fill_in_sib_core_maps(void);
45extern unsigned char boot_cpu_id; 45extern unsigned char boot_cpu_id;
46 46
47#endif /* !(__ASSEMBLY__) */ 47#endif /* !(__ASSEMBLY__) */
@@ -49,7 +49,7 @@ extern unsigned char boot_cpu_id;
49#else 49#else
50 50
51#define hard_smp_processor_id() 0 51#define hard_smp_processor_id() 0
52#define smp_setup_cpu_possible_map() do { } while (0) 52#define smp_fill_in_sib_core_maps() do { } while (0)
53#define boot_cpu_id (0) 53#define boot_cpu_id (0)
54 54
55#endif /* !(CONFIG_SMP) */ 55#endif /* !(CONFIG_SMP) */
diff --git a/include/asm-sparc64/sstate.h b/include/asm-sparc64/sstate.h
new file mode 100644
index 0000000000..a7c35dbcb2
--- /dev/null
+++ b/include/asm-sparc64/sstate.h
@@ -0,0 +1,13 @@
1#ifndef _SPARC64_SSTATE_H
2#define _SPARC64_SSTATE_H
3
4extern void sstate_booting(void);
5extern void sstate_running(void);
6extern void sstate_halt(void);
7extern void sstate_poweroff(void);
8extern void sstate_panic(void);
9extern void sstate_reboot(void);
10
11extern void sun4v_sstate_init(void);
12
13#endif /* _SPARC64_SSTATE_H */
diff --git a/include/asm-sparc64/thread_info.h b/include/asm-sparc64/thread_info.h
index 2ebf7f27bf..98252cd44d 100644
--- a/include/asm-sparc64/thread_info.h
+++ b/include/asm-sparc64/thread_info.h
@@ -38,8 +38,8 @@ struct thread_info {
38 /* D$ line 1 */ 38 /* D$ line 1 */
39 struct task_struct *task; 39 struct task_struct *task;
40 unsigned long flags; 40 unsigned long flags;
41 __u8 cpu;
42 __u8 fpsaved[7]; 41 __u8 fpsaved[7];
42 __u8 pad;
43 unsigned long ksp; 43 unsigned long ksp;
44 44
45 /* D$ line 2 */ 45 /* D$ line 2 */
@@ -49,7 +49,7 @@ struct thread_info {
49 int preempt_count; /* 0 => preemptable, <0 => BUG */ 49 int preempt_count; /* 0 => preemptable, <0 => BUG */
50 __u8 new_child; 50 __u8 new_child;
51 __u8 syscall_noerror; 51 __u8 syscall_noerror;
52 __u16 __pad; 52 __u16 cpu;
53 53
54 unsigned long *utraps; 54 unsigned long *utraps;
55 55
@@ -83,8 +83,7 @@ struct thread_info {
83#define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS) 83#define TI_CURRENT_DS (TI_FLAGS + TI_FLAG_BYTE_CURRENT_DS)
84#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH) 84#define TI_FPDEPTH (TI_FLAGS + TI_FLAG_BYTE_FPDEPTH)
85#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED) 85#define TI_WSAVED (TI_FLAGS + TI_FLAG_BYTE_WSAVED)
86#define TI_CPU 0x00000010 86#define TI_FPSAVED 0x00000010
87#define TI_FPSAVED 0x00000011
88#define TI_KSP 0x00000018 87#define TI_KSP 0x00000018
89#define TI_FAULT_ADDR 0x00000020 88#define TI_FAULT_ADDR 0x00000020
90#define TI_KREGS 0x00000028 89#define TI_KREGS 0x00000028
@@ -92,6 +91,7 @@ struct thread_info {
92#define TI_PRE_COUNT 0x00000038 91#define TI_PRE_COUNT 0x00000038
93#define TI_NEW_CHILD 0x0000003c 92#define TI_NEW_CHILD 0x0000003c
94#define TI_SYS_NOERROR 0x0000003d 93#define TI_SYS_NOERROR 0x0000003d
94#define TI_CPU 0x0000003e
95#define TI_UTRAPS 0x00000040 95#define TI_UTRAPS 0x00000040
96#define TI_REG_WINDOW 0x00000048 96#define TI_REG_WINDOW 0x00000048
97#define TI_RWIN_SPTRS 0x000003c8 97#define TI_RWIN_SPTRS 0x000003c8
diff --git a/include/asm-sparc64/topology.h b/include/asm-sparc64/topology.h
index 98a6c61358..e0d450d600 100644
--- a/include/asm-sparc64/topology.h
+++ b/include/asm-sparc64/topology.h
@@ -6,4 +6,7 @@
6 6
7#include <asm-generic/topology.h> 7#include <asm-generic/topology.h>
8 8
9#define topology_core_id(cpu) (cpu_data(cpu).core_id)
10#define topology_thread_siblings(cpu) (cpu_sibling_map[cpu])
11
9#endif /* _ASM_SPARC64_TOPOLOGY_H */ 12#endif /* _ASM_SPARC64_TOPOLOGY_H */
diff --git a/include/asm-sparc64/tsb.h b/include/asm-sparc64/tsb.h
index ab55ffcb7b..76e4299dd9 100644
--- a/include/asm-sparc64/tsb.h
+++ b/include/asm-sparc64/tsb.h
@@ -271,7 +271,7 @@ extern struct tsb_phys_patch_entry __tsb_phys_patch, __tsb_phys_patch_end;
271#define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \ 271#define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \
272 sethi %hi(swapper_4m_tsb), REG1; \ 272 sethi %hi(swapper_4m_tsb), REG1; \
273 or REG1, %lo(swapper_4m_tsb), REG1; \ 273 or REG1, %lo(swapper_4m_tsb), REG1; \
274 and TAG, (KERNEL_TSB_NENTRIES - 1), REG2; \ 274 and TAG, (KERNEL_TSB4M_NENTRIES - 1), REG2; \
275 sllx REG2, 4, REG2; \ 275 sllx REG2, 4, REG2; \
276 add REG1, REG2, REG2; \ 276 add REG1, REG2, REG2; \
277 KTSB_LOAD_QUAD(REG2, REG3); \ 277 KTSB_LOAD_QUAD(REG2, REG3); \
diff --git a/include/linux/timer.h b/include/linux/timer.h
index e0c5c16c99..c661710d36 100644
--- a/include/linux/timer.h
+++ b/include/linux/timer.h
@@ -69,6 +69,12 @@ extern int __mod_timer(struct timer_list *timer, unsigned long expires);
69extern int mod_timer(struct timer_list *timer, unsigned long expires); 69extern int mod_timer(struct timer_list *timer, unsigned long expires);
70 70
71/* 71/*
72 * The jiffies value which is added to now, when there is no timer
73 * in the timer wheel:
74 */
75#define NEXT_TIMER_MAX_DELTA ((1UL << 30) - 1)
76
77/*
72 * Return when the next timer-wheel timeout occurs (in absolute jiffies), 78 * Return when the next timer-wheel timeout occurs (in absolute jiffies),
73 * locks the timer base: 79 * locks the timer base:
74 */ 80 */
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-05 17:16:23 -0400