236 files changed, 5706 insertions, 1469 deletions
diff --git a/include/asm-alpha/core_t2.h b/include/asm-alpha/core_t2.h
index dba70c62a1..457c34b6eb 100644
--- a/include/asm-alpha/core_t2.h
+++ b/include/asm-alpha/core_t2.h
@@ -435,7 +435,7 @@ static inline void t2_outl(u32 b, unsigned long addr)
        set_hae(msb); \
 }
-static spinlock_t t2_hae_lock = SPIN_LOCK_UNLOCKED;
+static DEFINE_SPINLOCK(t2_hae_lock);
 __EXTERN_INLINE u8 t2_readb(const volatile void __iomem *xaddr)
 {
diff --git a/include/asm-alpha/hw_irq.h b/include/asm-alpha/hw_irq.h
index ca9d43b635..a37db0f950 100644
--- a/include/asm-alpha/hw_irq.h
+++ b/include/asm-alpha/hw_irq.h
@@ -2,8 +2,6 @@
 #define _ALPHA_HW_IRQ_H
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
 extern volatile unsigned long irq_err_count;
 #ifdef CONFIG_ALPHA_GENERIC
diff --git a/include/asm-arm/arch-at91rm9200/memory.h b/include/asm-arm/arch-at91rm9200/memory.h
index 3c327c4043..f985069e6d 100644
--- a/include/asm-arm/arch-at91rm9200/memory.h
+++ b/include/asm-arm/arch-at91rm9200/memory.h
@@ -33,9 +33,7 @@
 * bus_to_virt: Used to convert an address for DMA operations
 *              to an address that the kernel can use.
 */
-#define __virt_to_bus__is_a_macro
 #define __virt_to_bus(x) __virt_to_phys(x)
-#define __bus_to_virt__is_a_macro
 #define __bus_to_virt(x) __phys_to_virt(x)
 #endif
diff --git a/include/asm-arm/arch-h720x/memory.h b/include/asm-arm/arch-h720x/memory.h
index 4a1bfd78a0..53e923dba7 100644
--- a/include/asm-arm/arch-h720x/memory.h
+++ b/include/asm-arm/arch-h720x/memory.h
@@ -23,9 +23,7 @@
 * There is something to do here later !, Mar 2000, Jungjun Kim
 */
-#define __virt_to_bus__is_a_macro
 #define __virt_to_bus(x)        __virt_to_phys(x)
-#define __bus_to_virt__is_a_macro
 #define __bus_to_virt(x)        __phys_to_virt(x)
 #endif
diff --git a/include/asm-arm/arch-imx/memory.h b/include/asm-arm/arch-imx/memory.h
index d09ae32cd2..5ad9012791 100644
--- a/include/asm-arm/arch-imx/memory.h
+++ b/include/asm-arm/arch-imx/memory.h
@@ -30,9 +30,7 @@
 * bus_to_virt: Used to convert an address for DMA operations
 *              to an address that the kernel can use.
 */
-#define __virt_to_bus__is_a_macro
+#define __virt_to_bus(x)        (x - PAGE_OFFSET + PHYS_OFFSET)
-#define __virt_to_bus(x)        (x - PAGE_OFFSET +  PHYS_OFFSET)
+#define __bus_to_virt(x)        (x - PHYS_OFFSET + PAGE_OFFSET)
-#define __bus_to_virt__is_a_macro
-#define __bus_to_virt(x)        (x -  PHYS_OFFSET + PAGE_OFFSET)
 #endif
diff --git a/include/asm-arm/arch-ixp23xx/ixp23xx.h b/include/asm-arm/arch-ixp23xx/ixp23xx.h
index d0a72201ee..3927b1d61b 100644
--- a/include/asm-arm/arch-ixp23xx/ixp23xx.h
+++ b/include/asm-arm/arch-ixp23xx/ixp23xx.h
@@ -295,15 +295,4 @@
 #define IXP23XX_PCI_CPP_ADDR_BITS       IXP23XX_PCI_CSR(0x0160)
-#ifndef __ASSEMBLY__
-/*
- * Is system memory on the XSI or CPP bus?
- */
-static inline unsigned ixp23xx_cpp_boot(void)
-{
-        return (*IXP23XX_EXP_CFG0 & IXP23XX_EXP_CFG0_XSI_NOT_PRES);
-}
-#endif
 #endif
diff --git a/include/asm-arm/arch-ixp23xx/platform.h b/include/asm-arm/arch-ixp23xx/platform.h
index 19a73b39c8..56e16d6664 100644
--- a/include/asm-arm/arch-ixp23xx/platform.h
+++ b/include/asm-arm/arch-ixp23xx/platform.h
@@ -43,5 +43,15 @@ extern struct sys_timer ixp23xx_timer;
 #define IXP23XX_UART_XTAL               14745600
+#ifndef __ASSEMBLY__
+/*
+ * Is system memory on the XSI or CPP bus?
+ */
+static inline unsigned ixp23xx_cpp_boot(void)
+{
+        return (*IXP23XX_EXP_CFG0 & IXP23XX_EXP_CFG0_XSI_NOT_PRES);
+}
+#endif
 #endif
diff --git a/include/asm-arm/arch-ixp23xx/uncompress.h b/include/asm-arm/arch-ixp23xx/uncompress.h
index 013575e6a9..16c1110f23 100644
--- a/include/asm-arm/arch-ixp23xx/uncompress.h
+++ b/include/asm-arm/arch-ixp23xx/uncompress.h
@@ -11,7 +11,7 @@
 #ifndef __ASM_ARCH_UNCOMPRESS_H
 #define __ASM_ARCH_UNCOMPRESS_H
-#include <asm/hardware.h>
+#include <asm/arch/ixp23xx.h>
 #include <linux/serial_reg.h>
 #define UART_BASE       ((volatile u32 *)IXP23XX_UART1_PHYS)
diff --git a/include/asm-arm/arch-s3c2410/regs-dsc.h b/include/asm-arm/arch-s3c2410/regs-dsc.h
index 84aca61cba..a0a1248751 100644
--- a/include/asm-arm/arch-s3c2410/regs-dsc.h
+++ b/include/asm-arm/arch-s3c2410/regs-dsc.h
@@ -7,25 +7,23 @@
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
- * S3C2440 Signal Drive Strength Control
+ * S3C2440/S3C2412 Signal Drive Strength Control
- *
- *  Changelog:
- *    11-Aug-2004     BJD     Created file
- *    25-Aug-2004     BJD     Added the _SELECT_* defs for using with functions
 */
 #ifndef __ASM_ARCH_REGS_DSC_H
 #define __ASM_ARCH_REGS_DSC_H "2440-dsc"
-#ifdef CONFIG_CPU_S3C2440
+#if defined(CONFIG_CPU_S3C2412)
+#define S3C2412_DSC0       S3C2410_GPIOREG(0xdc)
+#define S3C2412_DSC1       S3C2410_GPIOREG(0xe0)
+#endif
+#if defined(CONFIG_CPU_S3C2440)
 #define S3C2440_DSC0       S3C2410_GPIOREG(0xc4)
 #define S3C2440_DSC1       S3C2410_GPIOREG(0xc8)
-#define S3C2412_DSC0       S3C2410_GPIOREG(0xdc)
-#define S3C2412_DSC1       S3C2410_GPIOREG(0xe0)
 #define S3C2440_SELECT_DSC0 (0)
 #define S3C2440_SELECT_DSC1 (1<<31)
diff --git a/include/asm-arm/arch-s3c2410/regs-nand.h b/include/asm-arm/arch-s3c2410/regs-nand.h
index 7cff235e66..c1470c695c 100644
--- a/include/asm-arm/arch-s3c2410/regs-nand.h
+++ b/include/asm-arm/arch-s3c2410/regs-nand.h
@@ -39,10 +39,19 @@
 #define S3C2440_NFESTAT1 S3C2410_NFREG(0x28)
 #define S3C2440_NFMECC0  S3C2410_NFREG(0x2C)
 #define S3C2440_NFMECC1  S3C2410_NFREG(0x30)
-#define S3C2440_NFSECC   S3C2410_NFREG(0x34)
+#define S3C2440_NFSECC   S3C24E10_NFREG(0x34)
 #define S3C2440_NFSBLK   S3C2410_NFREG(0x38)
 #define S3C2440_NFEBLK   S3C2410_NFREG(0x3C)
+#define S3C2412_NFSBLK          S3C2410_NFREG(0x20)
+#define S3C2412_NFEBLK          S3C2410_NFREG(0x24)
+#define S3C2412_NFSTAT          S3C2410_NFREG(0x28)
+#define S3C2412_NFMECC_ERR0     S3C2410_NFREG(0x2C)
+#define S3C2412_NFMECC_ERR1     S3C2410_NFREG(0x30)
+#define S3C2412_NFMECC0         S3C2410_NFREG(0x34)
+#define S3C2412_NFMECC1         S3C2410_NFREG(0x38)
+#define S3C2412_NFSECC          S3C2410_NFREG(0x3C)
 #define S3C2410_NFCONF_EN          (1<<15)
 #define S3C2410_NFCONF_512BYTE     (1<<14)
 #define S3C2410_NFCONF_4STEP       (1<<13)
@@ -77,5 +86,42 @@
 #define S3C2440_NFSTAT_RnB_CHANGE       (1<<2)
 #define S3C2440_NFSTAT_ILLEGAL_ACCESS   (1<<3)
+#define S3C2412_NFCONF_NANDBOOT         (1<<31)
+#define S3C2412_NFCONF_ECCCLKCON        (1<<30)
+#define S3C2412_NFCONF_ECC_MLC          (1<<24)
+#define S3C2412_NFCONF_TACLS_MASK       (7<<12) /* 1 extra bit of Tacls */
+#define S3C2412_NFCONT_ECC4_DIRWR       (1<<18)
+#define S3C2412_NFCONT_LOCKTIGHT        (1<<17)
+#define S3C2412_NFCONT_SOFTLOCK         (1<<16)
+#define S3C2412_NFCONT_ECC4_ENCINT      (1<<13)
+#define S3C2412_NFCONT_ECC4_DECINT      (1<<12)
+#define S3C2412_NFCONT_MAIN_ECC_LOCK    (1<<7)
+#define S3C2412_NFCONT_INIT_MAIN_ECC    (1<<5)
+#define S3C2412_NFCONT_nFCE1            (1<<2)
+#define S3C2412_NFCONT_nFCE0            (1<<1)
+#define S3C2412_NFSTAT_ECC_ENCDONE      (1<<7)
+#define S3C2412_NFSTAT_ECC_DECDONE      (1<<6)
+#define S3C2412_NFSTAT_ILLEGAL_ACCESS   (1<<5)
+#define S3C2412_NFSTAT_RnB_CHANGE       (1<<4)
+#define S3C2412_NFSTAT_nFCE1            (1<<3)
+#define S3C2412_NFSTAT_nFCE0            (1<<2)
+#define S3C2412_NFSTAT_Res1             (1<<1)
+#define S3C2412_NFSTAT_READY            (1<<0)
+#define S3C2412_NFECCERR_SERRDATA(x)    (((x) >> 21) & 0xf)
+#define S3C2412_NFECCERR_SERRBIT(x)     (((x) >> 18) & 0x7)
+#define S3C2412_NFECCERR_MERRDATA(x)    (((x) >> 7) & 0x3ff)
+#define S3C2412_NFECCERR_MERRBIT(x)     (((x) >> 4) & 0x7)
+#define S3C2412_NFECCERR_SPARE_ERR(x)   (((x) >> 2) & 0x3)
+#define S3C2412_NFECCERR_MAIN_ERR(x)    (((x) >> 2) & 0x3)
+#define S3C2412_NFECCERR_NONE           (0)
+#define S3C2412_NFECCERR_1BIT           (1)
+#define S3C2412_NFECCERR_MULTIBIT       (2)
+#define S3C2412_NFECCERR_ECCAREA        (3)
 #endif /* __ASM_ARM_REGS_NAND */
diff --git a/include/asm-arm/assembler.h b/include/asm-arm/assembler.h
index d53bafa9bf..fce8328208 100644
--- a/include/asm-arm/assembler.h
+++ b/include/asm-arm/assembler.h
@@ -55,30 +55,6 @@
 #define PLD(code...)
 #endif
-#define MODE_USR        USR_MODE
-#define MODE_FIQ        FIQ_MODE
-#define MODE_IRQ        IRQ_MODE
-#define MODE_SVC        SVC_MODE
-#define DEFAULT_FIQ     MODE_FIQ
-/*
- * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
- */
-#ifdef __STDC__
-#define LOADREGS(cond, base, reglist...)\
-        ldm##cond       base,reglist
-#else
-#define LOADREGS(cond, base, reglist...)\
-        ldm/**/cond     base,reglist
-#endif
-/*
- * Build a return instruction for this processor type.
- */
-#define RETINSTR(instr, regs...)\
-        instr   regs
 /*
 * Enable and disable interrupts
 */
@@ -117,18 +93,6 @@
        msr     cpsr_c, \oldcpsr
        .endm
-/*
- * These two are used to save LR/restore PC over a user-based access.
- * The old 26-bit architecture requires that we do.  On 32-bit
- * architecture, we can safely ignore this requirement.
- */
-        .macro  save_lr
-        .endm
-        .macro  restore_pc
-        mov     pc, lr
-        .endm
 #define USER(x...)                              \
 9999:   x;                                      \
        .section __ex_table,"a";                \
diff --git a/include/asm-arm/bugs.h b/include/asm-arm/bugs.h
index 4c80ec519d..ca54eb0f12 100644
--- a/include/asm-arm/bugs.h
+++ b/include/asm-arm/bugs.h
@@ -10,8 +10,12 @@
 #ifndef __ASM_BUGS_H
 #define __ASM_BUGS_H
+#ifdef CONFIG_MMU
 extern void check_writebuffer_bugs(void);
 #define check_bugs() check_writebuffer_bugs()
+#else
+#define check_bugs() do { } while (0)
+#endif
 #endif
diff --git a/include/asm-arm/domain.h b/include/asm-arm/domain.h
index f8ea2de484..4c2885abbe 100644
--- a/include/asm-arm/domain.h
+++ b/include/asm-arm/domain.h
@@ -50,6 +50,8 @@
 #define domain_val(dom,type)    ((type) << (2*(dom)))
 #ifndef __ASSEMBLY__
+#ifdef CONFIG_MMU
 #define set_domain(x)                                   \
        do {                                            \
        __asm__ __volatile__(                           \
@@ -66,5 +68,10 @@
        set_domain(thread->cpu_domain);                         \
        } while (0)
+#else
+#define set_domain(x)           do { } while (0)
+#define modify_domain(dom,type) do { } while (0)
+#endif
 #endif
 #endif /* !__ASSEMBLY__ */
diff --git a/include/asm-arm/fpstate.h b/include/asm-arm/fpstate.h
index 132c3c5628..6af4e6bd12 100644
--- a/include/asm-arm/fpstate.h
+++ b/include/asm-arm/fpstate.h
@@ -72,6 +72,14 @@ union fp_state {
 #define FP_SIZE (sizeof(union fp_state) / sizeof(int))
+struct crunch_state {
+        unsigned int    mvdx[16][2];
+        unsigned int    mvax[4][3];
+        unsigned int    dspsc[2];
+};
+#define CRUNCH_SIZE     sizeof(struct crunch_state)
 #endif
 #endif
diff --git a/include/asm-arm/hardware/locomo.h b/include/asm-arm/hardware/locomo.h
index 5f10048ec5..22dfb17377 100644
--- a/include/asm-arm/hardware/locomo.h
+++ b/include/asm-arm/hardware/locomo.h
@@ -111,6 +111,8 @@
 #define LOCOMO_ALS              0x00    /* Adjust light cycle */
 #define LOCOMO_ALD              0x04    /* Adjust light duty */
+#define LOCOMO_ALC_EN           0x8000
 /* Backlight controller: TFT signal */
 #define LOCOMO_BACKLIGHT        0x38
 #define LOCOMO_TC               0x00            /* TFT control signal */
@@ -203,4 +205,7 @@ void locomo_gpio_write(struct locomo_dev *ldev, unsigned int bits, unsigned int
 /* M62332 control function */
 void locomo_m62332_senddata(struct locomo_dev *ldev, unsigned int dac_data, int channel);
+/* Frontlight control */
+void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf);
 #endif
diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h
index e8ea67c97c..cef5364ed5 100644
--- a/include/asm-arm/mach/map.h
+++ b/include/asm-arm/mach/map.h
@@ -16,8 +16,6 @@ struct map_desc {
        unsigned int type;
 };
-struct meminfo;
 #define MT_DEVICE               0
 #define MT_CACHECLEAN           1
 #define MT_MINICLEAN            2
@@ -28,7 +26,8 @@ struct meminfo;
 #define MT_IXP2000_DEVICE       7
 #define MT_NONSHARED_DEVICE     8
-extern void create_memmap_holes(struct meminfo *);
+#ifdef CONFIG_MMU
-extern void memtable_init(struct meminfo *);
 extern void iotable_init(struct map_desc *, int);
-extern void setup_io_desc(void);
+#else
+#define iotable_init(map,num)   do { } while (0)
+#endif
diff --git a/include/asm-arm/mach/pci.h b/include/asm-arm/mach/pci.h
index 25d540ed00..923e0ca662 100644
--- a/include/asm-arm/mach/pci.h
+++ b/include/asm-arm/mach/pci.h
@@ -28,7 +28,7 @@ struct hw_pci {
 struct pci_sys_data {
        struct list_head node;
        int             busnr;          /* primary bus number                   */
-        unsigned long   mem_offset;     /* bus->cpu memory mapping offset       */
+        u64             mem_offset;     /* bus->cpu memory mapping offset       */
        unsigned long   io_offset;      /* bus->cpu IO mapping offset           */
        struct pci_bus  *bus;           /* PCI bus                              */
        struct resource *resource[3];   /* Primary PCI bus resources            */
diff --git a/include/asm-arm/memory.h b/include/asm-arm/memory.h
index 731e321a57..94f973b704 100644
--- a/include/asm-arm/memory.h
+++ b/include/asm-arm/memory.h
@@ -2,6 +2,7 @@
 *  linux/include/asm-arm/memory.h
 *
 *  Copyright (C) 2000-2002 Russell King
+ *  modification for nommu, Hyok S. Choi, 2004
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
@@ -26,6 +27,8 @@
 #include <asm/arch/memory.h>
 #include <asm/sizes.h>
+#ifdef CONFIG_MMU
 #ifndef TASK_SIZE
 /*
 * TASK_SIZE - the maximum size of a user space task.
@@ -48,6 +51,60 @@
 #endif
 /*
+ * The module space lives between the addresses given by TASK_SIZE
+ * and PAGE_OFFSET - it must be within 32MB of the kernel text.
+ */
+#define MODULE_END              (PAGE_OFFSET)
+#define MODULE_START            (MODULE_END - 16*1048576)
+#if TASK_SIZE > MODULE_START
+#error Top of user space clashes with start of module space
+#endif
+/*
+ * The XIP kernel gets mapped at the bottom of the module vm area.
+ * Since we use sections to map it, this macro replaces the physical address
+ * with its virtual address while keeping offset from the base section.
+ */
+#define XIP_VIRT_ADDR(physaddr)  (MODULE_START + ((physaddr) & 0x000fffff))
+#else /* CONFIG_MMU */
+/*
+ * The limitation of user task size can grow up to the end of free ram region.
+ * It is difficult to define and perhaps will never meet the original meaning
+ * of this define that was meant to.
+ * Fortunately, there is no reference for this in noMMU mode, for now.
+ */
+#ifndef TASK_SIZE
+#define TASK_SIZE               (CONFIG_DRAM_SIZE)
+#endif
+#ifndef TASK_UNMAPPED_BASE
+#define TASK_UNMAPPED_BASE      UL(0x00000000)
+#endif
+#ifndef PHYS_OFFSET
+#define PHYS_OFFSET             (CONFIG_DRAM_BASE)
+#endif
+#ifndef END_MEM
+#define END_MEM                 (CONFIG_DRAM_BASE + CONFIG_DRAM_SIZE)
+#endif
+#ifndef PAGE_OFFSET
+#define PAGE_OFFSET             (PHYS_OFFSET)
+#endif
+/*
+ * The module can be at any place in ram in nommu mode.
+ */
+#define MODULE_END              (END_MEM)
+#define MODULE_START            (PHYS_OFFSET)
+#endif /* !CONFIG_MMU */
+/*
 * Size of DMA-consistent memory region.  Must be multiple of 2M,
 * between 2MB and 14MB inclusive.
 */
@@ -71,24 +128,6 @@
 #define __phys_to_pfn(paddr)    ((paddr) >> PAGE_SHIFT)
 #define __pfn_to_phys(pfn)      ((pfn) << PAGE_SHIFT)
-/*
- * The module space lives between the addresses given by TASK_SIZE
- * and PAGE_OFFSET - it must be within 32MB of the kernel text.
- */
-#define MODULE_END      (PAGE_OFFSET)
-#define MODULE_START    (MODULE_END - 16*1048576)
-#if TASK_SIZE > MODULE_START
-#error Top of user space clashes with start of module space
-#endif
-/*
- * The XIP kernel gets mapped at the bottom of the module vm area.
- * Since we use sections to map it, this macro replaces the physical address
- * with its virtual address while keeping offset from the base section.
- */
-#define XIP_VIRT_ADDR(physaddr)  (MODULE_START + ((physaddr) & 0x000fffff))
 #ifndef __ASSEMBLY__
 /*
diff --git a/include/asm-arm/mmu.h b/include/asm-arm/mmu.h
index a457cb7198..23dde52e09 100644
--- a/include/asm-arm/mmu.h
+++ b/include/asm-arm/mmu.h
@@ -1,6 +1,8 @@
 #ifndef __ARM_MMU_H
 #define __ARM_MMU_H
+#ifdef CONFIG_MMU
 typedef struct {
 #if __LINUX_ARM_ARCH__ >= 6
        unsigned int id;
@@ -13,4 +15,18 @@ typedef struct {
 #define ASID(mm)        (0)
 #endif
+#else
+/*
+ * From nommu.h:
+ *  Copyright (C) 2002, David McCullough <davidm@snapgear.com>
+ *  modified for 2.6 by Hyok S. Choi <hyok.choi@samsung.com>
+ */
+typedef struct {
+        struct vm_list_struct   *vmlist;
+        unsigned long           end_brk;
+} mm_context_t;
+#endif
 #endif
diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h
index 81c59facea..9fadb01e03 100644
--- a/include/asm-arm/mmu_context.h
+++ b/include/asm-arm/mmu_context.h
@@ -82,6 +82,7 @@ static inline void
 switch_mm(struct mm_struct *prev, struct mm_struct *next,
          struct task_struct *tsk)
 {
+#ifdef CONFIG_MMU
        unsigned int cpu = smp_processor_id();
        if (prev != next) {
@@ -91,6 +92,7 @@ switch_mm(struct mm_struct *prev, struct mm_struct *next,
                if (cache_is_vivt())
                        cpu_clear(cpu, prev->cpu_vm_mask);
        }
+#endif
 }
 #define deactivate_mm(tsk,mm)   do { } while (0)
diff --git a/include/asm-arm/page-nommu.h b/include/asm-arm/page-nommu.h
new file mode 100644
index 0000000000..a1bcad0604
--- /dev/null
+++ b/include/asm-arm/page-nommu.h
@@ -0,0 +1,51 @@
+/*
+ *  linux/include/asm-arm/page-nommu.h
+ *
+ *  Copyright (C) 2004 Hyok S. Choi
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASMARM_PAGE_NOMMU_H
+#define _ASMARM_PAGE_NOMMU_H
+#if !defined(CONFIG_SMALL_TASKS) && PAGE_SHIFT < 13
+#define KTHREAD_SIZE (8192)
+#else
+#define KTHREAD_SIZE PAGE_SIZE
+#endif
+ 
+#define get_user_page(vaddr)            __get_free_page(GFP_KERNEL)
+#define free_user_page(page, addr)      free_page(addr)
+#define clear_page(page)        memset((page), 0, PAGE_SIZE)
+#define copy_page(to,from)      memcpy((to), (from), PAGE_SIZE)
+#define clear_user_page(page, vaddr, pg)        clear_page(page)
+#define copy_user_page(to, from, vaddr, pg)     copy_page(to, from)
+/*
+ * These are used to make use of C type-checking..
+ */
+typedef unsigned long pte_t;
+typedef unsigned long pmd_t;
+typedef unsigned long pgd_t[2];
+typedef unsigned long pgprot_t;
+#define pte_val(x)      (x)
+#define pmd_val(x)      (x)
+#define pgd_val(x)      ((x)[0])
+#define pgprot_val(x)   (x)
+#define __pte(x)        (x)
+#define __pmd(x)        (x)
+#define __pgprot(x)     (x)
+/* to align the pointer to the (next) page boundary */
+#define PAGE_ALIGN(addr)        (((addr)+PAGE_SIZE-1)&PAGE_MASK)
+extern unsigned long memory_start;
+extern unsigned long memory_end;
+#endif
diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h
index 66cfeb5290..63d12f0244 100644
--- a/include/asm-arm/page.h
+++ b/include/asm-arm/page.h
@@ -23,6 +23,12 @@
 #ifndef __ASSEMBLY__
+#ifndef CONFIG_MMU
+#include "page-nommu.h"
+#else
 #include <asm/glue.h>
 /*
@@ -171,6 +177,8 @@ typedef unsigned long pgprot_t;
 /* the upper-most page table pointer */
 extern pmd_t *top_pmd;
+#endif /* CONFIG_MMU */
 #include <asm/memory.h>
 #endif /* !__ASSEMBLY__ */
diff --git a/include/asm-arm/pgalloc.h b/include/asm-arm/pgalloc.h
index c4ac2e6776..4d43945529 100644
--- a/include/asm-arm/pgalloc.h
+++ b/include/asm-arm/pgalloc.h
@@ -16,6 +16,10 @@
 #include <asm/cacheflush.h>
 #include <asm/tlbflush.h>
+#define check_pgt_cache()               do { } while (0)
+#ifdef CONFIG_MMU
 #define _PAGE_USER_TABLE        (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_USER))
 #define _PAGE_KERNEL_TABLE      (PMD_TYPE_TABLE | PMD_BIT4 | PMD_DOMAIN(DOMAIN_KERNEL))
@@ -32,8 +36,6 @@ extern void free_pgd_slow(pgd_t *pgd);
 #define pgd_alloc(mm)                   get_pgd_slow(mm)
 #define pgd_free(pgd)                   free_pgd_slow(pgd)
-#define check_pgt_cache()               do { } while (0)
 /*
 * Allocate one PTE table.
 *
@@ -126,4 +128,6 @@ pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *ptep)
        __pmd_populate(pmdp, page_to_pfn(ptep) << PAGE_SHIFT | _PAGE_USER_TABLE);
 }
+#endif /* CONFIG_MMU */
 #endif
diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h
new file mode 100644
index 0000000000..b13322dccf
--- /dev/null
+++ b/include/asm-arm/pgtable-nommu.h
@@ -0,0 +1,123 @@
+/*
+ *  linux/include/asm-arm/pgtable-nommu.h
+ *
+ *  Copyright (C) 1995-2002 Russell King
+ *  Copyright (C) 2004  Hyok S. Choi
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _ASMARM_PGTABLE_NOMMU_H
+#define _ASMARM_PGTABLE_NOMMU_H
+#ifndef __ASSEMBLY__
+#include <linux/config.h>
+#include <linux/slab.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/io.h>
+/*
+ * Trivial page table functions.
+ */
+#define pgd_present(pgd)        (1)
+#define pgd_none(pgd)           (0)
+#define pgd_bad(pgd)            (0)
+#define pgd_clear(pgdp)
+#define kern_addr_valid(addr)   (1)
+#define pmd_offset(a, b)        ((void *)0)
+/* FIXME */
+/*
+ * PMD_SHIFT determines the size of the area a second-level page table can map
+ * PGDIR_SHIFT determines what a third-level page table entry can map
+ */
+#define PGDIR_SHIFT             21
+#define PGDIR_SIZE              (1UL << PGDIR_SHIFT)
+#define PGDIR_MASK              (~(PGDIR_SIZE-1))
+/* FIXME */
+#define PAGE_NONE       __pgprot(0)
+#define PAGE_SHARED     __pgprot(0)
+#define PAGE_COPY       __pgprot(0)
+#define PAGE_READONLY   __pgprot(0)
+#define PAGE_KERNEL     __pgprot(0)
+//extern void paging_init(struct meminfo *, struct machine_desc *);
+#define swapper_pg_dir ((pgd_t *) 0)
+#define __swp_type(x)           (0)
+#define __swp_offset(x)         (0)
+#define __swp_entry(typ,off)    ((swp_entry_t) { ((typ) | ((off) << 7)) })
+#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
+#define __swp_entry_to_pte(x)   ((pte_t) { (x).val })
+typedef pte_t *pte_addr_t;
+static inline int pte_file(pte_t pte) { return 0; }
+/*
+ * ZERO_PAGE is a global shared page that is always zero: used
+ * for zero-mapped memory areas etc..
+ */
+#define ZERO_PAGE(vaddr)        (virt_to_page(0))
+/*
+ * Mark the prot value as uncacheable and unbufferable.
+ */
+#define pgprot_noncached(prot)  __pgprot(0)
+#define pgprot_writecombine(prot) __pgprot(0)
+/*
+ * These would be in other places but having them here reduces the diffs.
+ */
+extern unsigned int kobjsize(const void *objp);
+extern int is_in_rom(unsigned long);
+/*
+ * No page table caches to initialise.
+ */
+#define pgtable_cache_init()    do { } while (0)
+#define io_remap_page_range     remap_page_range
+#define io_remap_pfn_range      remap_pfn_range
+#define MK_IOSPACE_PFN(space, pfn)      (pfn)
+#define GET_IOSPACE(pfn)                0
+#define GET_PFN(pfn)                    (pfn)
+/*
+ * All 32bit addresses are effectively valid for vmalloc...
+ * Sort of meaningless for non-VM targets.
+ */
+#define VMALLOC_START   0
+#define VMALLOC_END     0xffffffff
+#define FIRST_USER_ADDRESS      (0)
+#else 
+/*
+ * dummy tlb and user structures.
+ */
+#define v3_tlb_fns      (0)
+#define v4_tlb_fns      (0)
+#define v4wb_tlb_fns    (0)
+#define v4wbi_tlb_fns   (0)
+#define v6_tlb_fns      (0)
+#define v3_user_fns     (0)
+#define v4_user_fns     (0)
+#define v4_mc_user_fns  (0)
+#define v4wb_user_fns   (0)
+#define v4wt_user_fns   (0)
+#define v6_user_fns     (0)
+#define xscale_mc_user_fns (0)
+#endif /*__ASSEMBLY__*/
+#endif /* _ASMARM_PGTABLE_H */
diff --git a/include/asm-arm/pgtable.h b/include/asm-arm/pgtable.h
index e85c08d78d..8d3919c645 100644
--- a/include/asm-arm/pgtable.h
+++ b/include/asm-arm/pgtable.h
@@ -11,9 +11,15 @@
 #define _ASMARM_PGTABLE_H
 #include <asm-generic/4level-fixup.h>
+#include <asm/proc-fns.h>
+#ifndef CONFIG_MMU
+#include "pgtable-nommu.h"
+#else
 #include <asm/memory.h>
-#include <asm/proc-fns.h>
 #include <asm/arch/vmalloc.h>
 /*
@@ -378,4 +384,6 @@ extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
 #endif /* !__ASSEMBLY__ */
+#endif /* CONFIG_MMU */
 #endif /* _ASMARM_PGTABLE_H */
diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h
index e9310895e7..1bde92cdae 100644
--- a/include/asm-arm/proc-fns.h
+++ b/include/asm-arm/proc-fns.h
@@ -165,6 +165,8 @@
 #include <asm/memory.h>
+#ifdef CONFIG_MMU
 #define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm)
 #define cpu_get_pgd()   \
@@ -176,6 +178,8 @@
                (pgd_t *)phys_to_virt(pg);              \
        })
+#endif
 #endif /* __ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* __ASM_PROCFNS_H */
diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h
index 2bebe3dc0a..5a8ef787db 100644
--- a/include/asm-arm/ptrace.h
+++ b/include/asm-arm/ptrace.h
@@ -25,6 +25,11 @@
 #define PTRACE_SET_SYSCALL      23
+/* PTRACE_SYSCALL is 24 */
+#define PTRACE_GETCRUNCHREGS    25
+#define PTRACE_SETCRUNCHREGS    26
 /*
 * PSR bits
 */
diff --git a/include/asm-arm/thread_info.h b/include/asm-arm/thread_info.h
index cfbccb63c6..c46b5c8427 100644
--- a/include/asm-arm/thread_info.h
+++ b/include/asm-arm/thread_info.h
@@ -59,6 +59,7 @@ struct thread_info {
        struct cpu_context_save cpu_context;    /* cpu context */
        __u8                    used_cp[16];    /* thread used copro */
        unsigned long           tp_value;
+        struct crunch_state     crunchstate;
        union fp_state          fpstate __attribute__((aligned(8)));
        union vfp_state         vfpstate;
        struct restart_block    restart_block;
@@ -101,6 +102,11 @@ extern void free_thread_info(struct thread_info *);
 #define thread_saved_fp(tsk)    \
        ((unsigned long)(task_thread_info(tsk)->cpu_context.fp))
+extern void crunch_task_disable(struct thread_info *);
+extern void crunch_task_copy(struct thread_info *, void *);
+extern void crunch_task_restore(struct thread_info *, void *);
+extern void crunch_task_release(struct thread_info *);
 extern void iwmmxt_task_disable(struct thread_info *);
 extern void iwmmxt_task_copy(struct thread_info *, void *);
 extern void iwmmxt_task_restore(struct thread_info *, void *);
diff --git a/include/asm-arm/uaccess.h b/include/asm-arm/uaccess.h
index 064f0f5e8e..87aba57a66 100644
--- a/include/asm-arm/uaccess.h
+++ b/include/asm-arm/uaccess.h
@@ -41,15 +41,24 @@ struct exception_table_entry
 extern int fixup_exception(struct pt_regs *regs);
 /*
+ * These two are intentionally not defined anywhere - if the kernel
+ * code generates any references to them, that's a bug.
+ */
+extern int __get_user_bad(void);
+extern int __put_user_bad(void);
+/*
 * Note that this is actually 0x1,0000,0000
 */
 #define KERNEL_DS       0x00000000
-#define USER_DS         TASK_SIZE
 #define get_ds()        (KERNEL_DS)
+#ifdef CONFIG_MMU
+#define USER_DS         TASK_SIZE
 #define get_fs()        (current_thread_info()->addr_limit)
-static inline void set_fs (mm_segment_t fs)
+static inline void set_fs(mm_segment_t fs)
 {
        current_thread_info()->addr_limit = fs;
        modify_domain(DOMAIN_KERNEL, fs ? DOMAIN_CLIENT : DOMAIN_MANAGER);
@@ -75,8 +84,6 @@ static inline void set_fs (mm_segment_t fs)
                : "cc"); \
        flag; })
-#define access_ok(type,addr,size)       (__range_ok(addr,size) == 0)
 /*
 * Single-value transfer routines.  They automatically use the right
 * size if we just have the right pointer type.  Note that the functions
@@ -87,20 +94,10 @@ static inline void set_fs (mm_segment_t fs)
 * fixup code, but there are a few places where it intrudes on the
 * main code path.  When we only write to user space, there is no
 * problem.
- *
- * The "__xxx" versions of the user access functions do not verify the
- * address space - it must have been done previously with a separate
- * "access_ok()" call.
- *
- * The "xxx_error" versions set the third argument to EFAULT if an
- * error occurs, and leave it unchanged on success.  Note that these
- * versions are void (ie, don't return a value as such).
 */
 extern int __get_user_1(void *);
 extern int __get_user_2(void *);
 extern int __get_user_4(void *);
-extern int __get_user_bad(void);
 #define __get_user_x(__r2,__p,__e,__s,__i...)                           \
           __asm__ __volatile__ (                                       \
@@ -131,6 +128,74 @@ extern int __get_user_bad(void);
                __e;                                                    \
        })
+extern int __put_user_1(void *, unsigned int);
+extern int __put_user_2(void *, unsigned int);
+extern int __put_user_4(void *, unsigned int);
+extern int __put_user_8(void *, unsigned long long);
+#define __put_user_x(__r2,__p,__e,__s)                                  \
+           __asm__ __volatile__ (                                       \
+                __asmeq("%0", "r0") __asmeq("%2", "r2")                 \
+                "bl     __put_user_" #__s                               \
+                : "=&r" (__e)                                           \
+                : "0" (__p), "r" (__r2)                                 \
+                : "ip", "lr", "cc")
+#define put_user(x,p)                                                   \
+        ({                                                              \
+                const register typeof(*(p)) __r2 asm("r2") = (x);       \
+                const register typeof(*(p)) __user *__p asm("r0") = (p);\
+                register int __e asm("r0");                             \
+                switch (sizeof(*(__p))) {                               \
+                case 1:                                                 \
+                        __put_user_x(__r2, __p, __e, 1);                \
+                        break;                                          \
+                case 2:                                                 \
+                        __put_user_x(__r2, __p, __e, 2);                \
+                        break;                                          \
+                case 4:                                                 \
+                        __put_user_x(__r2, __p, __e, 4);                \
+                        break;                                          \
+                case 8:                                                 \
+                        __put_user_x(__r2, __p, __e, 8);                \
+                        break;                                          \
+                default: __e = __put_user_bad(); break;                 \
+                }                                                       \
+                __e;                                                    \
+        })
+#else /* CONFIG_MMU */
+/*
+ * uClinux has only one addr space, so has simplified address limits.
+ */
+#define USER_DS                 KERNEL_DS
+#define segment_eq(a,b)         (1)
+#define __addr_ok(addr)         (1)
+#define __range_ok(addr,size)   (0)
+#define get_fs()                (KERNEL_DS)
+static inline void set_fs(mm_segment_t fs)
+{
+}
+#define get_user(x,p)   __get_user(x,p)
+#define put_user(x,p)   __put_user(x,p)
+#endif /* CONFIG_MMU */
+#define access_ok(type,addr,size)       (__range_ok(addr,size) == 0)
+/*
+ * The "__xxx" versions of the user access functions do not verify the
+ * address space - it must have been done previously with a separate
+ * "access_ok()" call.
+ *
+ * The "xxx_error" versions set the third argument to EFAULT if an
+ * error occurs, and leave it unchanged on success.  Note that these
+ * versions are void (ie, don't return a value as such).
+ */
 #define __get_user(x,ptr)                                               \
 ({                                                                      \
        long __gu_err = 0;                                              \
@@ -212,43 +277,6 @@ do {									\
        : "r" (addr), "i" (-EFAULT)                             \
        : "cc")
-extern int __put_user_1(void *, unsigned int);
-extern int __put_user_2(void *, unsigned int);
-extern int __put_user_4(void *, unsigned int);
-extern int __put_user_8(void *, unsigned long long);
-extern int __put_user_bad(void);
-#define __put_user_x(__r2,__p,__e,__s)                                  \
-           __asm__ __volatile__ (                                       \
-                __asmeq("%0", "r0") __asmeq("%2", "r2")                 \
-                "bl     __put_user_" #__s                               \
-                : "=&r" (__e)                                           \
-                : "0" (__p), "r" (__r2)                                 \
-                : "ip", "lr", "cc")
-#define put_user(x,p)                                                   \
-        ({                                                              \
-                const register typeof(*(p)) __r2 asm("r2") = (x);       \
-                const register typeof(*(p)) __user *__p asm("r0") = (p);\
-                register int __e asm("r0");                             \
-                switch (sizeof(*(__p))) {                               \
-                case 1:                                                 \
-                        __put_user_x(__r2, __p, __e, 1);                \
-                        break;                                          \
-                case 2:                                                 \
-                        __put_user_x(__r2, __p, __e, 2);                \
-                        break;                                          \
-                case 4:                                                 \
-                        __put_user_x(__r2, __p, __e, 4);                \
-                        break;                                          \
-                case 8:                                                 \
-                        __put_user_x(__r2, __p, __e, 8);                \
-                        break;                                          \
-                default: __e = __put_user_bad(); break;                 \
-                }                                                       \
-                __e;                                                    \
-        })
 #define __put_user(x,ptr)                                               \
 ({                                                                      \
        long __pu_err = 0;                                              \
@@ -353,66 +381,54 @@ do {									\
        : "r" (x), "i" (-EFAULT)                                \
        : "cc")
-extern unsigned long __arch_copy_from_user(void *to, const void __user *from, unsigned long n);
-extern unsigned long __arch_copy_to_user(void __user *to, const void *from, unsigned long n);
+#ifdef CONFIG_MMU
-extern unsigned long __arch_clear_user(void __user *addr, unsigned long n);
+extern unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n);
-extern unsigned long __arch_strncpy_from_user(char *to, const char __user *from, unsigned long count);
+extern unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n);
-extern unsigned long __arch_strnlen_user(const char __user *s, long n);
+extern unsigned long __clear_user(void __user *addr, unsigned long n);
+#else
+#define __copy_from_user(to,from,n)     (memcpy(to, (void __force *)from, n), 0)
+#define __copy_to_user(to,from,n)       (memcpy((void __force *)to, from, n), 0)
+#define __clear_user(addr,n)            (memset((void __force *)addr, 0, n), 0)
+#endif
+extern unsigned long __strncpy_from_user(char *to, const char __user *from, unsigned long count);
+extern unsigned long __strnlen_user(const char __user *s, long n);
 static inline unsigned long copy_from_user(void *to, const void __user *from, unsigned long n)
 {
        if (access_ok(VERIFY_READ, from, n))
-                n = __arch_copy_from_user(to, from, n);
+                n = __copy_from_user(to, from, n);
        else /* security hole - plug it */
                memzero(to, n);
        return n;
 }
-static inline unsigned long __copy_from_user(void *to, const void __user *from, unsigned long n)
-{
-        return __arch_copy_from_user(to, from, n);
-}
 static inline unsigned long copy_to_user(void __user *to, const void *from, unsigned long n)
 {
        if (access_ok(VERIFY_WRITE, to, n))
-                n = __arch_copy_to_user(to, from, n);
+                n = __copy_to_user(to, from, n);
        return n;
 }
-static inline unsigned long __copy_to_user(void __user *to, const void *from, unsigned long n)
-{
-        return __arch_copy_to_user(to, from, n);
-}
 #define __copy_to_user_inatomic __copy_to_user
 #define __copy_from_user_inatomic __copy_from_user
-static inline unsigned long clear_user (void __user *to, unsigned long n)
+static inline unsigned long clear_user(void __user *to, unsigned long n)
 {
        if (access_ok(VERIFY_WRITE, to, n))
-                n = __arch_clear_user(to, n);
+                n = __clear_user(to, n);
        return n;
 }
-static inline unsigned long __clear_user (void __user *to, unsigned long n)
+static inline long strncpy_from_user(char *dst, const char __user *src, long count)
-{
-        return __arch_clear_user(to, n);
-}
-static inline long strncpy_from_user (char *dst, const char __user *src, long count)
 {
        long res = -EFAULT;
        if (access_ok(VERIFY_READ, src, 1))
-                res = __arch_strncpy_from_user(dst, src, count);
+                res = __strncpy_from_user(dst, src, count);
        return res;
 }
-static inline long __strncpy_from_user (char *dst, const char __user *src, long count)
-{
-        return __arch_strncpy_from_user(dst, src, count);
-}
 #define strlen_user(s)  strnlen_user(s, ~0UL >> 1)
 static inline long strnlen_user(const char __user *s, long n)
@@ -420,7 +436,7 @@ static inline long strnlen_user(const char __user *s, long n)
        unsigned long res = 0;
        if (__addr_ok(s))
-                res = __arch_strnlen_user(s, n);
+                res = __strnlen_user(s, n);
        return res;
 }
diff --git a/include/asm-arm/ucontext.h b/include/asm-arm/ucontext.h
index 9e6f7ca9f5..bf65e9f452 100644
--- a/include/asm-arm/ucontext.h
+++ b/include/asm-arm/ucontext.h
@@ -35,6 +35,17 @@ struct ucontext {
 * bytes, to prevent unpredictable padding in the signal frame.
 */
+#ifdef CONFIG_CRUNCH
+#define CRUNCH_MAGIC            0x5065cf03
+#define CRUNCH_STORAGE_SIZE     (CRUNCH_SIZE + 8)
+struct crunch_sigframe {
+        unsigned long   magic;
+        unsigned long   size;
+        struct crunch_state     storage;
+} __attribute__((__aligned__(8)));
+#endif
 #ifdef CONFIG_IWMMXT
 /* iwmmxt_area is 0x98 bytes long, preceeded by 8 bytes of signature */
 #define IWMMXT_MAGIC            0x12ef842a
@@ -74,6 +85,9 @@ struct vfp_sigframe
 * one of these.
 */
 struct aux_sigframe {
+#ifdef CONFIG_CRUNCH
+        struct crunch_sigframe  crunch;
+#endif
 #ifdef CONFIG_IWMMXT
        struct iwmmxt_sigframe  iwmmxt;
 #endif
diff --git a/include/asm-cris/hw_irq.h b/include/asm-cris/hw_irq.h
index 341536a234..298066020a 100644
--- a/include/asm-cris/hw_irq.h
+++ b/include/asm-cris/hw_irq.h
@@ -1,7 +1,5 @@
 #ifndef _ASM_HW_IRQ_H
 #define _ASM_HW_IRQ_H
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
 #endif
diff --git a/include/asm-cris/irq.h b/include/asm-cris/irq.h
index 4b33879221..998cce9f32 100644
--- a/include/asm-cris/irq.h
+++ b/include/asm-cris/irq.h
@@ -1,11 +1,6 @@
 #ifndef _ASM_IRQ_H
 #define _ASM_IRQ_H
-/*
- * IRQ line status macro IRQ_PER_CPU is used
- */
-#define ARCH_HAS_IRQ_PER_CPU
 #include <asm/arch/irq.h>
 static inline int irq_canonicalize(int irq)
diff --git a/include/asm-generic/bug.h b/include/asm-generic/bug.h
index 845cb67ad8..8ceab7bcd8 100644
--- a/include/asm-generic/bug.h
+++ b/include/asm-generic/bug.h
@@ -51,4 +51,10 @@
        __ret;                                          \
 })
+#ifdef CONFIG_SMP
+# define WARN_ON_SMP(x)                 WARN_ON(x)
+#else
+# define WARN_ON_SMP(x)                 do { } while (0)
+#endif
 #endif
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h
index 9d11550b48..db5a3732f1 100644
--- a/include/asm-generic/vmlinux.lds.h
+++ b/include/asm-generic/vmlinux.lds.h
@@ -58,6 +58,20 @@
                VMLINUX_SYMBOL(__stop___ksymtab_gpl) = .;               \
        }                                                               \
                                                                        \
+        /* Kernel symbol table: Normal unused symbols */                \
+        __ksymtab_unused  : AT(ADDR(__ksymtab_unused) - LOAD_OFFSET) {  \
+                VMLINUX_SYMBOL(__start___ksymtab_unused) = .;           \
+                *(__ksymtab_unused)                                     \
+                VMLINUX_SYMBOL(__stop___ksymtab_unused) = .;            \
+        }                                                               \
+                                                                        \
+        /* Kernel symbol table: GPL-only unused symbols */              \
+        __ksymtab_unused_gpl : AT(ADDR(__ksymtab_unused_gpl) - LOAD_OFFSET) { \
+                VMLINUX_SYMBOL(__start___ksymtab_unused_gpl) = .;       \
+                *(__ksymtab_unused_gpl)                                 \
+                VMLINUX_SYMBOL(__stop___ksymtab_unused_gpl) = .;        \
+        }                                                               \
+                                                                        \
        /* Kernel symbol table: GPL-future-only symbols */              \
        __ksymtab_gpl_future : AT(ADDR(__ksymtab_gpl_future) - LOAD_OFFSET) { \
                VMLINUX_SYMBOL(__start___ksymtab_gpl_future) = .;       \
@@ -79,6 +93,20 @@
                VMLINUX_SYMBOL(__stop___kcrctab_gpl) = .;               \
        }                                                               \
                                                                        \
+        /* Kernel symbol table: Normal unused symbols */                \
+        __kcrctab_unused  : AT(ADDR(__kcrctab_unused) - LOAD_OFFSET) {  \
+                VMLINUX_SYMBOL(__start___kcrctab_unused) = .;           \
+                *(__kcrctab_unused)                                     \
+                VMLINUX_SYMBOL(__stop___kcrctab_unused) = .;            \
+        }                                                               \
+                                                                        \
+        /* Kernel symbol table: GPL-only unused symbols */              \
+        __kcrctab_unused_gpl : AT(ADDR(__kcrctab_unused_gpl) - LOAD_OFFSET) { \
+                VMLINUX_SYMBOL(__start___kcrctab_unused_gpl) = .;       \
+                *(__kcrctab_unused_gpl)                                 \
+                VMLINUX_SYMBOL(__stop___kcrctab_unused_gpl) = .;        \
+        }                                                               \
+                                                                        \
        /* Kernel symbol table: GPL-future-only symbols */              \
        __kcrctab_gpl_future : AT(ADDR(__kcrctab_gpl_future) - LOAD_OFFSET) { \
                VMLINUX_SYMBOL(__start___kcrctab_gpl_future) = .;       \
diff --git a/include/asm-i386/alternative.h b/include/asm-i386/alternative.h
index d79e9ee10f..c61bd1a17f 100644
--- a/include/asm-i386/alternative.h
+++ b/include/asm-i386/alternative.h
@@ -5,6 +5,8 @@
 #include <asm/types.h>
+#include <linux/types.h>
 struct alt_instr {
        u8 *instr;              /* original instruction */
        u8 *replacement;
diff --git a/include/asm-i386/apic.h b/include/asm-i386/apic.h
index 1d8362cb2c..2c1e371ceb 100644
--- a/include/asm-i386/apic.h
+++ b/include/asm-i386/apic.h
@@ -111,24 +111,12 @@ extern void init_apic_mappings (void);
 extern void smp_local_timer_interrupt (struct pt_regs * regs);
 extern void setup_boot_APIC_clock (void);
 extern void setup_secondary_APIC_clock (void);
-extern void setup_apic_nmi_watchdog (void);
-extern int reserve_lapic_nmi(void);
-extern void release_lapic_nmi(void);
-extern void disable_timer_nmi_watchdog(void);
-extern void enable_timer_nmi_watchdog(void);
-extern void nmi_watchdog_tick (struct pt_regs * regs);
 extern int APIC_init_uniprocessor (void);
 extern void disable_APIC_timer(void);
 extern void enable_APIC_timer(void);
 extern void enable_NMI_through_LVT0 (void * dummy);
-extern unsigned int nmi_watchdog;
-#define NMI_NONE        0
-#define NMI_IO_APIC     1
-#define NMI_LOCAL_APIC  2
-#define NMI_INVALID     3
 extern int disable_timer_pin_1;
 void smp_send_timer_broadcast_ipi(struct pt_regs *regs);
diff --git a/include/asm-i386/cpu.h b/include/asm-i386/cpu.h
index e7252c216c..b1bc7b1b64 100644
--- a/include/asm-i386/cpu.h
+++ b/include/asm-i386/cpu.h
@@ -7,8 +7,6 @@
 #include <linux/nodemask.h>
 #include <linux/percpu.h>
-#include <asm/node.h>
 struct i386_cpu {
        struct cpu cpu;
 };
diff --git a/include/asm-i386/cpufeature.h b/include/asm-i386/cpufeature.h
index 3ecedbafa8..d314ebb3d5 100644
--- a/include/asm-i386/cpufeature.h
+++ b/include/asm-i386/cpufeature.h
@@ -72,6 +72,7 @@
 #define X86_FEATURE_CONSTANT_TSC (3*32+ 8) /* TSC ticks at a constant rate */
 #define X86_FEATURE_UP          (3*32+ 9) /* smp kernel running on up */
 #define X86_FEATURE_FXSAVE_LEAK (3*32+10) /* FXSAVE leaks FOP/FIP/FOP */
+#define X86_FEATURE_ARCH_PERFMON (3*32+11) /* Intel Architectural PerfMon */
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3        (4*32+ 0) /* Streaming SIMD Extensions-3 */
diff --git a/include/asm-i386/delay.h b/include/asm-i386/delay.h
index 456db8501c..b1c7650dc7 100644
--- a/include/asm-i386/delay.h
+++ b/include/asm-i386/delay.h
@@ -23,4 +23,6 @@ extern void __delay(unsigned long loops);
        ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
        __ndelay(n))
+void use_tsc_delay(void);
 #endif /* defined(_I386_DELAY_H) */
diff --git a/include/asm-i386/dwarf2.h b/include/asm-i386/dwarf2.h
new file mode 100644
index 0000000000..2280f6272f
--- /dev/null
+++ b/include/asm-i386/dwarf2.h
@@ -0,0 +1,54 @@
+#ifndef _DWARF2_H
+#define _DWARF2_H
+#include <linux/config.h>
+#ifndef __ASSEMBLY__
+#warning "asm/dwarf2.h should be only included in pure assembly files"
+#endif
+/*
+   Macros for dwarf2 CFI unwind table entries.
+   See "as.info" for details on these pseudo ops. Unfortunately
+   they are only supported in very new binutils, so define them
+   away for older version.
+ */
+#ifdef CONFIG_UNWIND_INFO
+#define CFI_STARTPROC .cfi_startproc
+#define CFI_ENDPROC .cfi_endproc
+#define CFI_DEF_CFA .cfi_def_cfa
+#define CFI_DEF_CFA_REGISTER .cfi_def_cfa_register
+#define CFI_DEF_CFA_OFFSET .cfi_def_cfa_offset
+#define CFI_ADJUST_CFA_OFFSET .cfi_adjust_cfa_offset
+#define CFI_OFFSET .cfi_offset
+#define CFI_REL_OFFSET .cfi_rel_offset
+#define CFI_REGISTER .cfi_register
+#define CFI_RESTORE .cfi_restore
+#define CFI_REMEMBER_STATE .cfi_remember_state
+#define CFI_RESTORE_STATE .cfi_restore_state
+#else
+/* Due to the structure of pre-exisiting code, don't use assembler line
+   comment character # to ignore the arguments. Instead, use a dummy macro. */
+.macro ignore a=0, b=0, c=0, d=0
+.endm
+#define CFI_STARTPROC   ignore
+#define CFI_ENDPROC     ignore
+#define CFI_DEF_CFA     ignore
+#define CFI_DEF_CFA_REGISTER    ignore
+#define CFI_DEF_CFA_OFFSET      ignore
+#define CFI_ADJUST_CFA_OFFSET   ignore
+#define CFI_OFFSET      ignore
+#define CFI_REL_OFFSET  ignore
+#define CFI_REGISTER    ignore
+#define CFI_RESTORE     ignore
+#define CFI_REMEMBER_STATE ignore
+#define CFI_RESTORE_STATE ignore
+#endif
+#endif
diff --git a/include/asm-i386/elf.h b/include/asm-i386/elf.h
index 4153d80e4d..1eac92cb5b 100644
--- a/include/asm-i386/elf.h
+++ b/include/asm-i386/elf.h
@@ -10,6 +10,7 @@
 #include <asm/processor.h>
 #include <asm/system.h>         /* for savesegment */
 #include <asm/auxvec.h>
+#include <asm/desc.h>
 #include <linux/utsname.h>
@@ -129,15 +130,41 @@ extern int dump_task_extended_fpu (struct task_struct *, struct user_fxsr_struct
 #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
 #define ELF_CORE_COPY_XFPREGS(tsk, elf_xfpregs) dump_task_extended_fpu(tsk, elf_xfpregs)
-#define VSYSCALL_BASE   (__fix_to_virt(FIX_VSYSCALL))
+#define VDSO_HIGH_BASE          (__fix_to_virt(FIX_VDSO))
-#define VSYSCALL_EHDR   ((const struct elfhdr *) VSYSCALL_BASE)
+#define VDSO_BASE               ((unsigned long)current->mm->context.vdso)
-#define VSYSCALL_ENTRY  ((unsigned long) &__kernel_vsyscall)
+#ifdef CONFIG_COMPAT_VDSO
+# define VDSO_COMPAT_BASE       VDSO_HIGH_BASE
+# define VDSO_PRELINK           VDSO_HIGH_BASE
+#else
+# define VDSO_COMPAT_BASE       VDSO_BASE
+# define VDSO_PRELINK           0
+#endif
+#define VDSO_COMPAT_SYM(x) \
+                (VDSO_COMPAT_BASE + (unsigned long)(x) - VDSO_PRELINK)
+#define VDSO_SYM(x) \
+                (VDSO_BASE + (unsigned long)(x) - VDSO_PRELINK)
+#define VDSO_HIGH_EHDR          ((const struct elfhdr *) VDSO_HIGH_BASE)
+#define VDSO_EHDR               ((const struct elfhdr *) VDSO_COMPAT_BASE)
 extern void __kernel_vsyscall;
+#define VDSO_ENTRY              VDSO_SYM(&__kernel_vsyscall)
+#define ARCH_HAS_SETUP_ADDITIONAL_PAGES
+struct linux_binprm;
+extern int arch_setup_additional_pages(struct linux_binprm *bprm,
+                                       int executable_stack);
+extern unsigned int vdso_enabled;
 #define ARCH_DLINFO                                             \
-do {                                                            \
+do if (vdso_enabled) {                                          \
-                NEW_AUX_ENT(AT_SYSINFO, VSYSCALL_ENTRY);        \
+                NEW_AUX_ENT(AT_SYSINFO, VDSO_ENTRY);            \
-                NEW_AUX_ENT(AT_SYSINFO_EHDR, VSYSCALL_BASE);    \
+                NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_COMPAT_BASE); \
 } while (0)
 /*
@@ -148,15 +175,15 @@ do {								\
 * Dumping its extra ELF program headers includes all the other information
 * a debugger needs to easily find how the vsyscall DSO was being used.
 */
-#define ELF_CORE_EXTRA_PHDRS            (VSYSCALL_EHDR->e_phnum)
+#define ELF_CORE_EXTRA_PHDRS            (VDSO_HIGH_EHDR->e_phnum)
 #define ELF_CORE_WRITE_EXTRA_PHDRS                                            \
 do {                                                                          \
        const struct elf_phdr *const vsyscall_phdrs =                         \
-                (const struct elf_phdr *) (VSYSCALL_BASE                      \
+                (const struct elf_phdr *) (VDSO_HIGH_BASE                     \
-                                           + VSYSCALL_EHDR->e_phoff);         \
+                                           + VDSO_HIGH_EHDR->e_phoff);    \
        int i;                                                                \
        Elf32_Off ofs = 0;                                                    \
-        for (i = 0; i < VSYSCALL_EHDR->e_phnum; ++i) {                        \
+        for (i = 0; i < VDSO_HIGH_EHDR->e_phnum; ++i) {               \
                struct elf_phdr phdr = vsyscall_phdrs[i];                     \
                if (phdr.p_type == PT_LOAD) {                                 \
                        BUG_ON(ofs != 0);                                     \
@@ -174,10 +201,10 @@ do {									      \
 #define ELF_CORE_WRITE_EXTRA_DATA                                             \
 do {                                                                          \
        const struct elf_phdr *const vsyscall_phdrs =                         \
-                (const struct elf_phdr *) (VSYSCALL_BASE                      \
+                (const struct elf_phdr *) (VDSO_HIGH_BASE                     \
-                                           + VSYSCALL_EHDR->e_phoff);         \
+                                           + VDSO_HIGH_EHDR->e_phoff);    \
        int i;                                                                \
-        for (i = 0; i < VSYSCALL_EHDR->e_phnum; ++i) {                        \
+        for (i = 0; i < VDSO_HIGH_EHDR->e_phnum; ++i) {               \
                if (vsyscall_phdrs[i].p_type == PT_LOAD)                      \
                        DUMP_WRITE((void *) vsyscall_phdrs[i].p_vaddr,        \
                                   PAGE_ALIGN(vsyscall_phdrs[i].p_memsz));    \
diff --git a/include/asm-i386/fixmap.h b/include/asm-i386/fixmap.h
index f7e068f4d2..a48cc3f7cc 100644
--- a/include/asm-i386/fixmap.h
+++ b/include/asm-i386/fixmap.h
@@ -51,7 +51,7 @@
 */
 enum fixed_addresses {
        FIX_HOLE,
-        FIX_VSYSCALL,
+        FIX_VDSO,
 #ifdef CONFIG_X86_LOCAL_APIC
        FIX_APIC_BASE,  /* local (CPU) APIC) -- required for SMP or not */
 #endif
@@ -115,14 +115,6 @@ extern void __set_fixmap (enum fixed_addresses idx,
 #define __fix_to_virt(x)        (FIXADDR_TOP - ((x) << PAGE_SHIFT))
 #define __virt_to_fix(x)        ((FIXADDR_TOP - ((x)&PAGE_MASK)) >> PAGE_SHIFT)
-/*
- * This is the range that is readable by user mode, and things
- * acting like user mode such as get_user_pages.
- */
-#define FIXADDR_USER_START      (__fix_to_virt(FIX_VSYSCALL))
-#define FIXADDR_USER_END        (FIXADDR_USER_START + PAGE_SIZE)
 extern void __this_fixmap_does_not_exist(void);
 /*
diff --git a/include/asm-i386/hw_irq.h b/include/asm-i386/hw_irq.h
index 95d3fd0902..87e5a351d8 100644
--- a/include/asm-i386/hw_irq.h
+++ b/include/asm-i386/hw_irq.h
@@ -19,6 +19,8 @@
 struct hw_interrupt_type;
+#define NMI_VECTOR              0x02
 /*
 * Various low-level irq details needed by irq.c, process.c,
 * time.c, io_apic.c and smp.c
@@ -67,14 +69,4 @@ extern atomic_t irq_mis_count;
 #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))
-#if defined(CONFIG_X86_IO_APIC)
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
-{
-        if (IO_APIC_IRQ(i))
-                send_IPI_self(IO_APIC_VECTOR(i));
-}
-#else
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
-#endif
 #endif /* _ASM_HW_IRQ_H */
diff --git a/include/asm-i386/intel_arch_perfmon.h b/include/asm-i386/intel_arch_perfmon.h
new file mode 100644
index 0000000000..134ea9cc52
--- /dev/null
+++ b/include/asm-i386/intel_arch_perfmon.h
@@ -0,0 +1,19 @@
+#ifndef X86_INTEL_ARCH_PERFMON_H
+#define X86_INTEL_ARCH_PERFMON_H 1
+#define MSR_ARCH_PERFMON_PERFCTR0               0xc1
+#define MSR_ARCH_PERFMON_PERFCTR1               0xc2
+#define MSR_ARCH_PERFMON_EVENTSEL0              0x186
+#define MSR_ARCH_PERFMON_EVENTSEL1              0x187
+#define ARCH_PERFMON_EVENTSEL0_ENABLE      (1 << 22)
+#define ARCH_PERFMON_EVENTSEL_INT          (1 << 20)
+#define ARCH_PERFMON_EVENTSEL_OS           (1 << 17)
+#define ARCH_PERFMON_EVENTSEL_USR          (1 << 16)
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL   (0x3c)
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT (1 << 0)
+#endif  /* X86_INTEL_ARCH_PERFMON_H */
diff --git a/include/asm-i386/k8.h b/include/asm-i386/k8.h
new file mode 100644
index 0000000000..dfd88a6e60
--- /dev/null
+++ b/include/asm-i386/k8.h
@@ -0,0 +1 @@
+#include <asm-x86_64/k8.h>
diff --git a/include/asm-i386/kdebug.h b/include/asm-i386/kdebug.h
index 96d0828ce0..d18cdb9fc9 100644
--- a/include/asm-i386/kdebug.h
+++ b/include/asm-i386/kdebug.h
@@ -19,6 +19,8 @@ struct die_args {
 extern int register_die_notifier(struct notifier_block *);
 extern int unregister_die_notifier(struct notifier_block *);
+extern int register_page_fault_notifier(struct notifier_block *);
+extern int unregister_page_fault_notifier(struct notifier_block *);
 extern struct atomic_notifier_head i386die_chain;
diff --git a/include/asm-i386/kprobes.h b/include/asm-i386/kprobes.h
index 57d157c5cf..0730a20f6d 100644
--- a/include/asm-i386/kprobes.h
+++ b/include/asm-i386/kprobes.h
@@ -44,6 +44,7 @@ typedef u8 kprobe_opcode_t;
 #define JPROBE_ENTRY(pentry)    (kprobe_opcode_t *)pentry
 #define ARCH_SUPPORTS_KRETPROBES
+#define  ARCH_INACTIVE_KPROBE_COUNT 0
 void arch_remove_kprobe(struct kprobe *p);
 void kretprobe_trampoline(void);
diff --git a/include/asm-i386/local.h b/include/asm-i386/local.h
index e67fa08260..3b4998c51d 100644
--- a/include/asm-i386/local.h
+++ b/include/asm-i386/local.h
@@ -55,12 +55,26 @@ static __inline__ void local_sub(long i, local_t *v)
 * much more efficient than these naive implementations.  Note they take
 * a variable, not an address.
 */
-#define cpu_local_read(v)       local_read(&__get_cpu_var(v))
-#define cpu_local_set(v, i)     local_set(&__get_cpu_var(v), (i))
+/* Need to disable preemption for the cpu local counters otherwise we could
-#define cpu_local_inc(v)        local_inc(&__get_cpu_var(v))
+   still access a variable of a previous CPU in a non atomic way. */
-#define cpu_local_dec(v)        local_dec(&__get_cpu_var(v))
+#define cpu_local_wrap_v(v)             \
-#define cpu_local_add(i, v)     local_add((i), &__get_cpu_var(v))
+        ({ local_t res__;               \
-#define cpu_local_sub(i, v)     local_sub((i), &__get_cpu_var(v))
+           preempt_disable();           \
+           res__ = (v);                 \
+           preempt_enable();            \
+           res__; })
+#define cpu_local_wrap(v)               \
+        ({ preempt_disable();           \
+           v;                           \
+           preempt_enable(); })         \
+#define cpu_local_read(v)    cpu_local_wrap_v(local_read(&__get_cpu_var(v)))
+#define cpu_local_set(v, i)  cpu_local_wrap(local_set(&__get_cpu_var(v), (i)))
+#define cpu_local_inc(v)     cpu_local_wrap(local_inc(&__get_cpu_var(v)))
+#define cpu_local_dec(v)     cpu_local_wrap(local_dec(&__get_cpu_var(v)))
+#define cpu_local_add(i, v)  cpu_local_wrap(local_add((i), &__get_cpu_var(v)))
+#define cpu_local_sub(i, v)  cpu_local_wrap(local_sub((i), &__get_cpu_var(v)))
 #define __cpu_local_inc(v)      cpu_local_inc(v)
 #define __cpu_local_dec(v)      cpu_local_dec(v)
diff --git a/include/asm-i386/mach-default/mach_ipi.h b/include/asm-i386/mach-default/mach_ipi.h
index a1d0072e36..0dba244c86 100644
--- a/include/asm-i386/mach-default/mach_ipi.h
+++ b/include/asm-i386/mach-default/mach_ipi.h
@@ -1,6 +1,9 @@
 #ifndef __ASM_MACH_IPI_H
 #define __ASM_MACH_IPI_H
+/* Avoid include hell */
+#define NMI_VECTOR 0x02
 void send_IPI_mask_bitmask(cpumask_t mask, int vector);
 void __send_IPI_shortcut(unsigned int shortcut, int vector);
@@ -13,7 +16,7 @@ static inline void send_IPI_mask(cpumask_t mask, int vector)
 static inline void __local_send_IPI_allbutself(int vector)
 {
-        if (no_broadcast) {
+        if (no_broadcast || vector == NMI_VECTOR) {
                cpumask_t mask = cpu_online_map;
                cpu_clear(smp_processor_id(), mask);
@@ -24,7 +27,7 @@ static inline void __local_send_IPI_allbutself(int vector)
 static inline void __local_send_IPI_all(int vector)
 {
-        if (no_broadcast)
+        if (no_broadcast || vector == NMI_VECTOR)
                send_IPI_mask(cpu_online_map, vector);
        else
                __send_IPI_shortcut(APIC_DEST_ALLINC, vector);
diff --git a/include/asm-i386/mach-default/mach_timer.h b/include/asm-i386/mach-default/mach_timer.h
index 4b9703bb02..807992fd41 100644
--- a/include/asm-i386/mach-default/mach_timer.h
+++ b/include/asm-i386/mach-default/mach_timer.h
@@ -15,7 +15,9 @@
 #ifndef _MACH_TIMER_H
 #define _MACH_TIMER_H
-#define CALIBRATE_LATCH (5 * LATCH)
+#define CALIBRATE_TIME_MSEC 30 /* 30 msecs */
+#define CALIBRATE_LATCH \
+        ((CLOCK_TICK_RATE * CALIBRATE_TIME_MSEC + 1000/2)/1000)
 static inline void mach_prepare_counter(void)
 {
diff --git a/include/asm-i386/mach-summit/mach_mpparse.h b/include/asm-i386/mach-summit/mach_mpparse.h
index 1cce2b924a..9426839917 100644
--- a/include/asm-i386/mach-summit/mach_mpparse.h
+++ b/include/asm-i386/mach-summit/mach_mpparse.h
@@ -2,6 +2,7 @@
 #define __ASM_MACH_MPPARSE_H
 #include <mach_apic.h>
+#include <asm/tsc.h>
 extern int use_cyclone;
@@ -29,6 +30,7 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
                        (!strncmp(productid, "VIGIL SMP", 9) 
                         || !strncmp(productid, "EXA", 3)
                         || !strncmp(productid, "RUTHLESS SMP", 12))){
+                mark_tsc_unstable();
                use_cyclone = 1; /*enable cyclone-timer*/
                setup_summit();
                return 1;
@@ -42,6 +44,7 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
        if (!strncmp(oem_id, "IBM", 3) &&
            (!strncmp(oem_table_id, "SERVIGIL", 8)
             || !strncmp(oem_table_id, "EXA", 3))){
+                mark_tsc_unstable();
                use_cyclone = 1; /*enable cyclone-timer*/
                setup_summit();
                return 1;
diff --git a/include/asm-i386/mach-visws/setup_arch.h b/include/asm-i386/mach-visws/setup_arch.h
index b92d6d9a4d..33f700ef68 100644
--- a/include/asm-i386/mach-visws/setup_arch.h
+++ b/include/asm-i386/mach-visws/setup_arch.h
@@ -1,5 +1,8 @@
 /* Hook to call BIOS initialisation function */
+extern unsigned long sgivwfb_mem_phys;
+extern unsigned long sgivwfb_mem_size;
 /* no action for visws */
 #define ARCH_SETUP
diff --git a/include/asm-i386/mmu.h b/include/asm-i386/mmu.h
index f431a0b86d..8358dd3df7 100644
--- a/include/asm-i386/mmu.h
+++ b/include/asm-i386/mmu.h
@@ -12,6 +12,7 @@ typedef struct {
        int size;
        struct semaphore sem;
        void *ldt;
+        void *vdso;
 } mm_context_t;
 #endif
diff --git a/include/asm-i386/nmi.h b/include/asm-i386/nmi.h
index 21f16638fc..67d9947999 100644
--- a/include/asm-i386/nmi.h
+++ b/include/asm-i386/nmi.h
@@ -5,24 +5,38 @@
 #define ASM_NMI_H
 #include <linux/pm.h>
- 
 struct pt_regs;
- 
 typedef int (*nmi_callback_t)(struct pt_regs * regs, int cpu);
- 
-/** 
+/**
 * set_nmi_callback
 *
 * Set a handler for an NMI. Only one handler may be
 * set. Return 1 if the NMI was handled.
 */
 void set_nmi_callback(nmi_callback_t callback);
- 
-/** 
+/**
 * unset_nmi_callback
 *
 * Remove the handler previously set.
 */
 void unset_nmi_callback(void);
- 
+extern void setup_apic_nmi_watchdog (void);
+extern int reserve_lapic_nmi(void);
+extern void release_lapic_nmi(void);
+extern void disable_timer_nmi_watchdog(void);
+extern void enable_timer_nmi_watchdog(void);
+extern void nmi_watchdog_tick (struct pt_regs * regs);
+extern unsigned int nmi_watchdog;
+#define NMI_DEFAULT     -1
+#define NMI_NONE        0
+#define NMI_IO_APIC     1
+#define NMI_LOCAL_APIC  2
+#define NMI_INVALID     3
 #endif /* ASM_NMI_H */
diff --git a/include/asm-i386/node.h b/include/asm-i386/node.h
deleted file mode 100644
index e13c6ffa72..0000000000
--- a/include/asm-i386/node.h
+++ /dev/null
@@ -1,29 +0,0 @@
-#ifndef _ASM_I386_NODE_H_
-#define _ASM_I386_NODE_H_
-#include <linux/device.h>
-#include <linux/mmzone.h>
-#include <linux/node.h>
-#include <linux/topology.h>
-#include <linux/nodemask.h>
-struct i386_node {
-        struct node node;
-};
-extern struct i386_node node_devices[MAX_NUMNODES];
-static inline int arch_register_node(int num){
-        int p_node;
-        struct node *parent = NULL;
-        if (!node_online(num))
-                return 0;
-        p_node = parent_node(num);
-        if (p_node != num)
-                parent = &node_devices[p_node].node;
-        return register_node(&node_devices[num].node, num, parent);
-}
-#endif /* _ASM_I386_NODE_H_ */
diff --git a/include/asm-i386/page.h b/include/asm-i386/page.h
index e3a552fa55..f5bf544c72 100644
--- a/include/asm-i386/page.h
+++ b/include/asm-i386/page.h
@@ -96,6 +96,8 @@ typedef struct { unsigned long pgprot; } pgprot_t;
 #ifndef __ASSEMBLY__
+struct vm_area_struct;
 /*
 * This much address space is reserved for vmalloc() and iomap()
 * as well as fixmap mappings.
@@ -139,6 +141,7 @@ extern int page_is_ram(unsigned long pagenr);
 #include <asm-generic/memory_model.h>
 #include <asm-generic/page.h>
+#define __HAVE_ARCH_GATE_AREA 1
 #endif /* __KERNEL__ */
 #endif /* _I386_PAGE_H */
diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h
index 0c83cf12ee..b32346d62e 100644
--- a/include/asm-i386/processor.h
+++ b/include/asm-i386/processor.h
@@ -71,8 +71,12 @@ struct cpuinfo_x86 {
        cpumask_t llc_shared_map;       /* cpus sharing the last level cache */
 #endif
        unsigned char x86_max_cores;    /* cpuid returned max cores value */
-        unsigned char booted_cores;     /* number of cores as seen by OS */
        unsigned char apicid;
+#ifdef CONFIG_SMP
+        unsigned char booted_cores;     /* number of cores as seen by OS */
+        __u8 phys_proc_id;              /* Physical processor id. */
+        __u8 cpu_core_id;               /* Core id */
+#endif
 } __attribute__((__aligned__(SMP_CACHE_BYTES)));
 #define X86_VENDOR_INTEL 0
@@ -104,14 +108,13 @@ extern struct cpuinfo_x86 cpu_data[];
 #define current_cpu_data boot_cpu_data
 #endif
-extern  int phys_proc_id[NR_CPUS];
-extern  int cpu_core_id[NR_CPUS];
 extern  int cpu_llc_id[NR_CPUS];
 extern char ignore_fpu_irq;
 extern void identify_cpu(struct cpuinfo_x86 *);
 extern void print_cpu_info(struct cpuinfo_x86 *);
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
+extern unsigned short num_cache_leaves;
 #ifdef CONFIG_X86_HT
 extern void detect_ht(struct cpuinfo_x86 *c);
@@ -554,7 +557,7 @@ extern void prepare_to_copy(struct task_struct *tsk);
 extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
 extern unsigned long thread_saved_pc(struct task_struct *tsk);
-void show_trace(struct task_struct *task, unsigned long *stack);
+void show_trace(struct task_struct *task, struct pt_regs *regs, unsigned long *stack);
 unsigned long get_wchan(struct task_struct *p);
diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h
index 0249f912a2..cab0180567 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-i386/system.h
@@ -427,7 +427,7 @@ static inline unsigned long long __cmpxchg64(volatile void *ptr, unsigned long l
 * does not enforce ordering, since there is no data dependency between
 * the read of "a" and the read of "b".  Therefore, on some CPUs, such
 * as Alpha, "y" could be set to 3 and "x" to 0.  Use rmb()
- * in cases like thiswhere there are no data dependencies.
+ * in cases like this where there are no data dependencies.
 **/
 #define read_barrier_depends()  do { } while(0)
diff --git a/include/asm-i386/thread_info.h b/include/asm-i386/thread_info.h
index 8420ed1249..2833fa2c0d 100644
--- a/include/asm-i386/thread_info.h
+++ b/include/asm-i386/thread_info.h
@@ -37,6 +37,7 @@ struct thread_info {
                                                   0-0xBFFFFFFF for user-thead
                                                   0-0xFFFFFFFF for kernel-thread
                                                */
+        void                    *sysenter_return;
        struct restart_block    restart_block;
        unsigned long           previous_esp;   /* ESP of the previous stack in case
@@ -83,17 +84,15 @@ struct thread_info {
 #define init_stack              (init_thread_union.stack)
+/* how to get the current stack pointer from C */
+register unsigned long current_stack_pointer asm("esp") __attribute_used__;
 /* how to get the thread information struct from C */
 static inline struct thread_info *current_thread_info(void)
 {
-        struct thread_info *ti;
+        return (struct thread_info *)(current_stack_pointer & ~(THREAD_SIZE - 1));
-        __asm__("andl %%esp,%0; ":"=r" (ti) : "0" (~(THREAD_SIZE - 1)));
-        return ti;
 }
-/* how to get the current stack pointer from C */
-register unsigned long current_stack_pointer asm("esp") __attribute_used__;
 /* thread information allocation */
 #ifdef CONFIG_DEBUG_STACK_USAGE
 #define alloc_thread_info(tsk)                                  \
@@ -140,8 +139,7 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
 #define TIF_SYSCALL_AUDIT       7       /* syscall auditing active */
 #define TIF_SECCOMP             8       /* secure computing */
 #define TIF_RESTORE_SIGMASK     9       /* restore signal mask in do_signal() */
-#define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
+#define TIF_MEMDIE              16
-#define TIF_MEMDIE              17
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
@@ -153,7 +151,6 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
 #define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP            (1<<TIF_SECCOMP)
 #define _TIF_RESTORE_SIGMASK    (1<<TIF_RESTORE_SIGMASK)
-#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 /* work to do on interrupt/exception return */
 #define _TIF_WORK_MASK \
@@ -170,6 +167,9 @@ register unsigned long current_stack_pointer asm("esp") __attribute_used__;
 * have to worry about atomic accesses.
 */
 #define TS_USEDFPU              0x0001  /* FPU was used by this task this quantum (SMP) */
+#define TS_POLLING              0x0002  /* True if in idle loop and not sleeping */
+#define tsk_is_polling(t) ((t)->thread_info->status & TS_POLLING)
 #endif /* __KERNEL__ */
diff --git a/include/asm-i386/timer.h b/include/asm-i386/timer.h
index aed1643747..d0ebd05f85 100644
--- a/include/asm-i386/timer.h
+++ b/include/asm-i386/timer.h
@@ -3,68 +3,11 @@
 #include <linux/init.h>
 #include <linux/pm.h>
-/**
- * struct timer_ops - used to define a timer source
- *
- * @name: name of the timer.
- * @init: Probes and initializes the timer. Takes clock= override 
- *        string as an argument. Returns 0 on success, anything else
- *        on failure.
- * @mark_offset: called by the timer interrupt.
- * @get_offset:  called by gettimeofday(). Returns the number of microseconds
- *               since the last timer interupt.
- * @monotonic_clock: returns the number of nanoseconds since the init of the
- *                   timer.
- * @delay: delays this many clock cycles.
- */
-struct timer_opts {
-        char* name;
-        void (*mark_offset)(void);
-        unsigned long (*get_offset)(void);
-        unsigned long long (*monotonic_clock)(void);
-        void (*delay)(unsigned long);
-        unsigned long (*read_timer)(void);
-        int (*suspend)(pm_message_t state);
-        int (*resume)(void);
-};
-struct init_timer_opts {
-        int (*init)(char *override);
-        struct timer_opts *opts;
-};
 #define TICK_SIZE (tick_nsec / 1000)
-extern struct timer_opts* __init select_timer(void);
-extern void clock_fallback(void);
 void setup_pit_timer(void);
 /* Modifiers for buggy PIT handling */
 extern int pit_latch_buggy;
-extern struct timer_opts *cur_timer;
 extern int timer_ack;
-/* list of externed timers */
-extern struct timer_opts timer_none;
-extern struct timer_opts timer_pit;
-extern struct init_timer_opts timer_pit_init;
-extern struct init_timer_opts timer_tsc_init;
-#ifdef CONFIG_X86_CYCLONE_TIMER
-extern struct init_timer_opts timer_cyclone_init;
-#endif
-extern unsigned long calibrate_tsc(void);
-extern unsigned long read_timer_tsc(void);
-extern void init_cpu_khz(void);
 extern int recalibrate_cpu_khz(void);
-#ifdef CONFIG_HPET_TIMER
-extern struct init_timer_opts timer_hpet_init;
-extern unsigned long calibrate_tsc_hpet(unsigned long *tsc_hpet_quotient_ptr);
-#endif
-#ifdef CONFIG_X86_PM_TIMER
-extern struct init_timer_opts timer_pmtmr_init;
-#endif
 #endif
diff --git a/include/asm-i386/timex.h b/include/asm-i386/timex.h
index d434984303..3666044409 100644
--- a/include/asm-i386/timex.h
+++ b/include/asm-i386/timex.h
@@ -7,6 +7,7 @@
 #define _ASMi386_TIMEX_H
 #include <asm/processor.h>
+#include <asm/tsc.h>
 #ifdef CONFIG_X86_ELAN
 #  define CLOCK_TICK_RATE 1189200 /* AMD Elan has different frequency! */
@@ -15,39 +16,6 @@
 #endif
-/*
- * Standard way to access the cycle counter on i586+ CPUs.
- * Currently only used on SMP.
- *
- * If you really have a SMP machine with i486 chips or older,
- * compile for that, and this will just always return zero.
- * That's ok, it just means that the nicer scheduling heuristics
- * won't work for you.
- *
- * We only use the low 32 bits, and we'd simply better make sure
- * that we reschedule before that wraps. Scheduling at least every
- * four billion cycles just basically sounds like a good idea,
- * regardless of how fast the machine is. 
- */
-typedef unsigned long long cycles_t;
-static inline cycles_t get_cycles (void)
-{
-        unsigned long long ret=0;
-#ifndef CONFIG_X86_TSC
-        if (!cpu_has_tsc)
-                return 0;
-#endif
-#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
-        rdtscll(ret);
-#endif
-        return ret;
-}
-extern unsigned int cpu_khz;
 extern int read_current_timer(unsigned long *timer_value);
 #define ARCH_HAS_READ_CURRENT_TIMER     1
diff --git a/include/asm-i386/topology.h b/include/asm-i386/topology.h
index b94e5eeef9..6adbd9b1ae 100644
--- a/include/asm-i386/topology.h
+++ b/include/asm-i386/topology.h
@@ -28,10 +28,8 @@
 #define _ASM_I386_TOPOLOGY_H
 #ifdef CONFIG_X86_HT
-#define topology_physical_package_id(cpu)                               \
+#define topology_physical_package_id(cpu)       (cpu_data[cpu].phys_proc_id)
-        (phys_proc_id[cpu] == BAD_APICID ? -1 : phys_proc_id[cpu])
+#define topology_core_id(cpu)                   (cpu_data[cpu].cpu_core_id)
-#define topology_core_id(cpu)                                           \
-        (cpu_core_id[cpu] == BAD_APICID ? 0 : cpu_core_id[cpu])
 #define topology_core_siblings(cpu)             (cpu_core_map[cpu])
 #define topology_thread_siblings(cpu)           (cpu_sibling_map[cpu])
 #endif
@@ -114,4 +112,9 @@ extern unsigned long node_remap_size[];
 extern cpumask_t cpu_coregroup_map(int cpu);
+#ifdef CONFIG_SMP
+#define mc_capable()    (boot_cpu_data.x86_max_cores > 1)
+#define smt_capable()   (smp_num_siblings > 1)
+#endif
 #endif /* _ASM_I386_TOPOLOGY_H */
diff --git a/include/asm-i386/tsc.h b/include/asm-i386/tsc.h
new file mode 100644
index 0000000000..97b828ce31
--- /dev/null
+++ b/include/asm-i386/tsc.h
@@ -0,0 +1,49 @@
+/*
+ * linux/include/asm-i386/tsc.h
+ *
+ * i386 TSC related functions
+ */
+#ifndef _ASM_i386_TSC_H
+#define _ASM_i386_TSC_H
+#include <linux/config.h>
+#include <asm/processor.h>
+/*
+ * Standard way to access the cycle counter on i586+ CPUs.
+ * Currently only used on SMP.
+ *
+ * If you really have a SMP machine with i486 chips or older,
+ * compile for that, and this will just always return zero.
+ * That's ok, it just means that the nicer scheduling heuristics
+ * won't work for you.
+ *
+ * We only use the low 32 bits, and we'd simply better make sure
+ * that we reschedule before that wraps. Scheduling at least every
+ * four billion cycles just basically sounds like a good idea,
+ * regardless of how fast the machine is.
+ */
+typedef unsigned long long cycles_t;
+extern unsigned int cpu_khz;
+extern unsigned int tsc_khz;
+static inline cycles_t get_cycles(void)
+{
+        unsigned long long ret = 0;
+#ifndef CONFIG_X86_TSC
+        if (!cpu_has_tsc)
+                return 0;
+#endif
+#if defined(CONFIG_X86_GENERIC) || defined(CONFIG_X86_TSC)
+        rdtscll(ret);
+#endif
+        return ret;
+}
+extern void tsc_init(void);
+extern void mark_tsc_unstable(void);
+#endif
diff --git a/include/asm-i386/unwind.h b/include/asm-i386/unwind.h
new file mode 100644
index 0000000000..69f0f1df67
--- /dev/null
+++ b/include/asm-i386/unwind.h
@@ -0,0 +1,98 @@
+#ifndef _ASM_I386_UNWIND_H
+#define _ASM_I386_UNWIND_H
+/*
+ * Copyright (C) 2002-2006 Novell, Inc.
+ *      Jan Beulich <jbeulich@novell.com>
+ * This code is released under version 2 of the GNU GPL.
+ */
+#ifdef CONFIG_STACK_UNWIND
+#include <linux/sched.h>
+#include <asm/fixmap.h>
+#include <asm/ptrace.h>
+#include <asm/uaccess.h>
+struct unwind_frame_info
+{
+        struct pt_regs regs;
+        struct task_struct *task;
+};
+#define UNW_PC(frame)        (frame)->regs.eip
+#define UNW_SP(frame)        (frame)->regs.esp
+#ifdef CONFIG_FRAME_POINTER
+#define UNW_FP(frame)        (frame)->regs.ebp
+#define FRAME_RETADDR_OFFSET 4
+#define FRAME_LINK_OFFSET    0
+#define STACK_BOTTOM(tsk)    STACK_LIMIT((tsk)->thread.esp0)
+#define STACK_TOP(tsk)       ((tsk)->thread.esp0)
+#endif
+#define STACK_LIMIT(ptr)     (((ptr) - 1) & ~(THREAD_SIZE - 1))
+#define UNW_REGISTER_INFO \
+        PTREGS_INFO(eax), \
+        PTREGS_INFO(ecx), \
+        PTREGS_INFO(edx), \
+        PTREGS_INFO(ebx), \
+        PTREGS_INFO(esp), \
+        PTREGS_INFO(ebp), \
+        PTREGS_INFO(esi), \
+        PTREGS_INFO(edi), \
+        PTREGS_INFO(eip)
+static inline void arch_unw_init_frame_info(struct unwind_frame_info *info,
+                                            /*const*/ struct pt_regs *regs)
+{
+        if (user_mode_vm(regs))
+                info->regs = *regs;
+        else {
+                memcpy(&info->regs, regs, offsetof(struct pt_regs, esp));
+                info->regs.esp = (unsigned long)&regs->esp;
+                info->regs.xss = __KERNEL_DS;
+        }
+}
+static inline void arch_unw_init_blocked(struct unwind_frame_info *info)
+{
+        memset(&info->regs, 0, sizeof(info->regs));
+        info->regs.eip = info->task->thread.eip;
+        info->regs.xcs = __KERNEL_CS;
+        __get_user(info->regs.ebp, (long *)info->task->thread.esp);
+        info->regs.esp = info->task->thread.esp;
+        info->regs.xss = __KERNEL_DS;
+        info->regs.xds = __USER_DS;
+        info->regs.xes = __USER_DS;
+}
+extern asmlinkage int arch_unwind_init_running(struct unwind_frame_info *,
+                                               asmlinkage int (*callback)(struct unwind_frame_info *,
+                                                                          void *arg),
+                                               void *arg);
+static inline int arch_unw_user_mode(const struct unwind_frame_info *info)
+{
+#if 0 /* This can only work when selector register and EFLAGS saves/restores
+         are properly annotated (and tracked in UNW_REGISTER_INFO). */
+        return user_mode_vm(&info->regs);
+#else
+        return info->regs.eip < PAGE_OFFSET
+               || (info->regs.eip >= __fix_to_virt(FIX_VDSO)
+                    && info->regs.eip < __fix_to_virt(FIX_VDSO) + PAGE_SIZE)
+               || info->regs.esp < PAGE_OFFSET;
+#endif
+}
+#else
+#define UNW_PC(frame) ((void)(frame), 0)
+static inline int arch_unw_user_mode(const void *info)
+{
+        return 0;
+}
+#endif
+#endif /* _ASM_I386_UNWIND_H */
diff --git a/include/asm-ia64/hw_irq.h b/include/asm-ia64/hw_irq.h
index ea8b8c407a..27f9df6b91 100644
--- a/include/asm-ia64/hw_irq.h
+++ b/include/asm-ia64/hw_irq.h
@@ -97,8 +97,7 @@ extern int reserve_irq_vector (int vector);
 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
 extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
-static inline void
+static inline void ia64_resend_irq(unsigned int vector)
-hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector)
 {
        platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
 }
diff --git a/include/asm-ia64/irq.h b/include/asm-ia64/irq.h
index dbe86c0bbc..79479e2c69 100644
--- a/include/asm-ia64/irq.h
+++ b/include/asm-ia64/irq.h
@@ -14,11 +14,6 @@
 #define NR_IRQS         256
 #define NR_IRQ_VECTORS  NR_IRQS
-/*
- * IRQ line status macro IRQ_PER_CPU is used
- */
-#define ARCH_HAS_IRQ_PER_CPU
 static __inline__ int
 irq_canonicalize (int irq)
 {
diff --git a/include/asm-ia64/kdebug.h b/include/asm-ia64/kdebug.h
index c195a9ad12..aed7142f9e 100644
--- a/include/asm-ia64/kdebug.h
+++ b/include/asm-ia64/kdebug.h
@@ -40,6 +40,8 @@ struct die_args {
 extern int register_die_notifier(struct notifier_block *);
 extern int unregister_die_notifier(struct notifier_block *);
+extern int register_page_fault_notifier(struct notifier_block *);
+extern int unregister_page_fault_notifier(struct notifier_block *);
 extern struct atomic_notifier_head ia64die_chain;
 enum die_val {
diff --git a/include/asm-ia64/kprobes.h b/include/asm-ia64/kprobes.h
index 8c0fc227f0..2418a787c4 100644
--- a/include/asm-ia64/kprobes.h
+++ b/include/asm-ia64/kprobes.h
@@ -82,6 +82,7 @@ struct kprobe_ctlblk {
 #define JPROBE_ENTRY(pentry)    (kprobe_opcode_t *)pentry
 #define ARCH_SUPPORTS_KRETPROBES
+#define  ARCH_INACTIVE_KPROBE_COUNT 1
 #define SLOT0_OPCODE_SHIFT      (37)
 #define SLOT1_p1_OPCODE_SHIFT   (37 - (64-46))
diff --git a/include/asm-ia64/nodedata.h b/include/asm-ia64/nodedata.h
index a140310bf8..2fb337b0e9 100644
--- a/include/asm-ia64/nodedata.h
+++ b/include/asm-ia64/nodedata.h
@@ -46,6 +46,18 @@ struct ia64_node_data {
 */
 #define NODE_DATA(nid)          (local_node_data->pg_data_ptrs[nid])
+/*
+ * LOCAL_DATA_ADDR - This is to calculate the address of other node's
+ *                   "local_node_data" at hot-plug phase. The local_node_data
+ *                   is pointed by per_cpu_page. Kernel usually use it for
+ *                   just executing cpu. However, when new node is hot-added,
+ *                   the addresses of local data for other nodes are necessary
+ *                   to update all of them.
+ */
+#define LOCAL_DATA_ADDR(pgdat)                          \
+        ((struct ia64_node_data *)((u64)(pgdat) +       \
+                                   L1_CACHE_ALIGN(sizeof(struct pglist_data))))
 #endif /* CONFIG_NUMA */
 #endif /* _ASM_IA64_NODEDATA_H */
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index cd490b20d5..bd4452bda3 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -85,6 +85,7 @@
 #define  SN_SAL_GET_PROM_FEATURE_SET               0x02000065
 #define  SN_SAL_SET_OS_FEATURE_SET                 0x02000066
 #define  SN_SAL_INJECT_ERROR                       0x02000067
+#define  SN_SAL_SET_CPU_NUMBER                     0x02000068
 /*
 * Service-specific constants
@@ -1150,4 +1151,13 @@ sn_inject_error(u64 paddr, u64 *data, u64 *ecc)
        local_irq_restore(irq_flags);
        return ret_stuff.status;
 }
+static inline int
+ia64_sn_set_cpu_number(int cpu)
+{
+        struct ia64_sal_retval rv;
+        SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0);
+        return rv.status;
+}
 #endif /* _ASM_IA64_SN_SN_SAL_H */
diff --git a/include/asm-ia64/thread_info.h b/include/asm-ia64/thread_info.h
index e5392c4d30..8bc9869e57 100644
--- a/include/asm-ia64/thread_info.h
+++ b/include/asm-ia64/thread_info.h
@@ -27,6 +27,7 @@ struct thread_info {
        __u32 flags;                    /* thread_info flags (see TIF_*) */
        __u32 cpu;                      /* current CPU */
        __u32 last_cpu;                 /* Last CPU thread ran on */
+        __u32 status;                   /* Thread synchronous flags */
        mm_segment_t addr_limit;        /* user-level address space limit */
        int preempt_count;              /* 0=premptable, <0=BUG; will also serve as bh-counter */
        struct restart_block restart_block;
@@ -103,4 +104,8 @@ struct thread_info {
 /* like TIF_ALLWORK_BITS but sans TIF_SYSCALL_TRACE or TIF_SYSCALL_AUDIT */
 #define TIF_WORK_MASK           (TIF_ALLWORK_MASK&~(_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT))
+#define TS_POLLING              1       /* true if in idle loop and not sleeping */
+#define tsk_is_polling(t) ((t)->thread_info->status & TS_POLLING)
 #endif /* _ASM_IA64_THREAD_INFO_H */
diff --git a/include/asm-ia64/topology.h b/include/asm-ia64/topology.h
index 616b5ed2aa..937c212575 100644
--- a/include/asm-ia64/topology.h
+++ b/include/asm-ia64/topology.h
@@ -112,6 +112,7 @@ void build_cpu_to_node_map(void);
 #define topology_core_id(cpu)                   (cpu_data(cpu)->core_id)
 #define topology_core_siblings(cpu)             (cpu_core_map[cpu])
 #define topology_thread_siblings(cpu)           (cpu_sibling_map[cpu])
+#define smt_capable()                           (smp_num_siblings > 1)
 #endif
 #include <asm-generic/topology.h>
diff --git a/include/asm-m32r/hw_irq.h b/include/asm-m32r/hw_irq.h
index 8d7e9d0e09..7138537cda 100644
--- a/include/asm-m32r/hw_irq.h
+++ b/include/asm-m32r/hw_irq.h
@@ -1,9 +1,4 @@
 #ifndef _ASM_M32R_HW_IRQ_H
 #define _ASM_M32R_HW_IRQ_H
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
-{
-        /* Nothing to do */
-}
 #endif /* _ASM_M32R_HW_IRQ_H */
diff --git a/include/asm-m32r/system.h b/include/asm-m32r/system.h
index 33567e8bfe..66c4742f09 100644
--- a/include/asm-m32r/system.h
+++ b/include/asm-m32r/system.h
@@ -318,7 +318,7 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
 * does not enforce ordering, since there is no data dependency between
 * the read of "a" and the read of "b".  Therefore, on some CPUs, such
 * as Alpha, "y" could be set to 3 and "x" to 0.  Use rmb()
- * in cases like thiswhere there are no data dependencies.
+ * in cases like this where there are no data dependencies.
 **/
 #define read_barrier_depends()  do { } while (0)
diff --git a/include/asm-m68knommu/bootstd.h b/include/asm-m68knommu/bootstd.h
index 3fdc79f06d..bdc1a4ac4f 100644
--- a/include/asm-m68knommu/bootstd.h
+++ b/include/asm-m68knommu/bootstd.h
@@ -52,7 +52,7 @@ type name(void) \
   __asm__ __volatile__ ("trap #2" \
                         : "=g" (__res) \
                         : "0" (__res) \
-                         : "%d0"); \
+                         ); \
   __bsc_return(type,__res); \
 }
@@ -64,7 +64,7 @@ type name(atype a) \
   __asm__ __volatile__ ("trap #2" \
                         : "=g" (__res) \
                         : "0" (__res), "d" (__a) \
-                         : "%d0"); \
+                         ); \
   __bsc_return(type,__res); \
 }
@@ -77,7 +77,7 @@ type name(atype a, btype b) \
   __asm__ __volatile__ ("trap #2" \
                         : "=g" (__res) \
                         : "0" (__res), "d" (__a), "d" (__b) \
-                         : "%d0"); \
+                         ); \
   __bsc_return(type,__res); \
 }
@@ -92,7 +92,7 @@ type name(atype a, btype b, ctype c) \
                         : "=g" (__res) \
                         : "0" (__res), "d" (__a), "d" (__b), \
                           "d" (__c) \
-                         : "%d0"); \
+                         ); \
   __bsc_return(type,__res); \
 }
@@ -108,7 +108,7 @@ type name(atype a, btype b, ctype c, dtype d) \
                         : "=g" (__res) \
                         : "0" (__res), "d" (__a), "d" (__b), \
                           "d" (__c), "d" (__d) \
-                         : "%d0"); \
+                         ); \
   __bsc_return(type,__res); \
 }
@@ -125,7 +125,7 @@ type name(atype a, btype b, ctype c, dtype d, etype e) \
                         : "=g" (__res) \
                         : "0" (__res), "d" (__a), "d" (__b), \
                           "d" (__c), "d" (__d), "d" (__e) \
-                         : "%d0"); \
+                         ); \
   __bsc_return(type,__res); \
 }
diff --git a/include/asm-m68knommu/cacheflush.h b/include/asm-m68knommu/cacheflush.h
index 49925e91e8..c3aadf3b0d 100644
--- a/include/asm-m68knommu/cacheflush.h
+++ b/include/asm-m68knommu/cacheflush.h
@@ -57,13 +57,13 @@ static inline void __flush_cache_all(void)
                "nop\n\t"
                : : : "d0" );
 #endif /* CONFIG_M527x || CONFIG_M528x */
-#ifdef CONFIG_M5272
+#if defined(CONFIG_M5206) || defined(CONFIG_M5206e) || defined(CONFIG_M5272)
        __asm__ __volatile__ (
-                "movel  #0x01000000, %%d0\n\t"
+                "movel  #0x81000100, %%d0\n\t"
                "movec  %%d0, %%CACR\n\t"
                "nop\n\t"
                : : : "d0" );
-#endif /* CONFIG_M5272 */
+#endif /* CONFIG_M5206 || CONFIG_M5206e || CONFIG_M5272 */
 #ifdef CONFIG_M5249
        __asm__ __volatile__ (
                "movel  #0xa1000200, %%d0\n\t"
@@ -71,6 +71,13 @@ static inline void __flush_cache_all(void)
                "nop\n\t"
                : : : "d0" );
 #endif /* CONFIG_M5249 */
+#ifdef CONFIG_M532x
+        __asm__ __volatile__ (
+                "movel  #0x81000200, %%d0\n\t"
+                "movec  %%d0, %%CACR\n\t"
+                "nop\n\t"
+                : : : "d0" );
+#endif /* CONFIG_M532x */
 }
 #endif /* _M68KNOMMU_CACHEFLUSH_H */
diff --git a/include/asm-m68knommu/coldfire.h b/include/asm-m68knommu/coldfire.h
index 2fabca91df..83a9fa4e61 100644
--- a/include/asm-m68knommu/coldfire.h
+++ b/include/asm-m68knommu/coldfire.h
@@ -3,7 +3,7 @@
 /*
 *      coldfire.h -- Motorola ColdFire CPU sepecific defines
 *
- *      (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *      (C) Copyright 1999-2006, Greg Ungerer (gerg@snapgear.com)
 *      (C) Copyright 2000, Lineo (www.lineo.com)
 */
@@ -14,6 +14,19 @@
 /*
+ *      Define master clock frequency. This is essentially done at config
+ *      time now. No point enumerating dozens of possible clock options
+ *      here. Also the peripheral clock (bus clock) divide ratio is set
+ *      at config time too.
+ */
+#ifdef CONFIG_CLOCK_SET
+#define MCF_CLK         CONFIG_CLOCK_FREQ
+#define MCF_BUSCLK      (CONFIG_CLOCK_FREQ / CONFIG_CLOCK_DIV)
+#else
+#error "Don't know what your ColdFire CPU clock frequency is??"
+#endif
+/*
 *      Define the processor support peripherals base address.
 *      This is generally setup by the boards start up code.
 */
@@ -29,64 +42,9 @@
    defined(CONFIG_M520x)
 #undef MCF_MBAR
 #define MCF_MBAR        MCF_IPSBAR
-#endif
+#elif defined(CONFIG_M532x)
+#undef MCF_MBAR
-/*
+#define MCF_MBAR        0x00000000
- *      Define master clock frequency.
- */
-#if defined(CONFIG_CLOCK_11MHz)
-#define MCF_CLK         11289600
-#elif defined(CONFIG_CLOCK_16MHz)
-#define MCF_CLK         16000000
-#elif defined(CONFIG_CLOCK_20MHz)
-#define MCF_CLK         20000000
-#elif defined(CONFIG_CLOCK_24MHz)
-#define MCF_CLK         24000000
-#elif defined(CONFIG_CLOCK_25MHz)
-#define MCF_CLK         25000000
-#elif defined(CONFIG_CLOCK_33MHz)
-#define MCF_CLK         33000000
-#elif defined(CONFIG_CLOCK_40MHz)
-#define MCF_CLK         40000000
-#elif defined(CONFIG_CLOCK_45MHz)
-#define MCF_CLK         45000000
-#elif defined(CONFIG_CLOCK_48MHz)
-#define MCF_CLK         48000000
-#elif defined(CONFIG_CLOCK_50MHz)
-#define MCF_CLK         50000000
-#elif defined(CONFIG_CLOCK_54MHz)
-#define MCF_CLK         54000000
-#elif defined(CONFIG_CLOCK_60MHz)
-#define MCF_CLK         60000000
-#elif defined(CONFIG_CLOCK_62_5MHz)
-#define MCF_CLK         62500000
-#elif defined(CONFIG_CLOCK_64MHz)
-#define MCF_CLK         64000000
-#elif defined(CONFIG_CLOCK_66MHz)
-#define MCF_CLK         66000000
-#elif defined(CONFIG_CLOCK_70MHz)
-#define MCF_CLK         70000000
-#elif defined(CONFIG_CLOCK_100MHz)
-#define MCF_CLK         100000000
-#elif defined(CONFIG_CLOCK_140MHz)
-#define MCF_CLK         140000000
-#elif defined(CONFIG_CLOCK_150MHz)
-#define MCF_CLK         150000000
-#elif defined(CONFIG_CLOCK_166MHz)
-#define MCF_CLK         166000000
-#else
-#error "Don't know what your ColdFire CPU clock frequency is??"
-#endif
-/*
- *      One some ColdFire family members the bus clock (used by internal
- *      peripherals) is not the same as the CPU clock.
- */
-#if defined(CONFIG_M523x) || defined(CONFIG_M5249) || defined(CONFIG_M527x) || \
-    defined(CONFIG_M520x)
-#define MCF_BUSCLK      (MCF_CLK / 2)
-#else
-#define MCF_BUSCLK      MCF_CLK
 #endif
 /****************************************************************************/
diff --git a/include/asm-m68knommu/irq.h b/include/asm-m68knommu/irq.h
index c5247516fc..53557274ee 100644
--- a/include/asm-m68knommu/irq.h
+++ b/include/asm-m68knommu/irq.h
@@ -83,7 +83,7 @@ extern void (*mach_disable_irq)(unsigned int);
 /*
 * Some drivers want these entry points
 */
-#define enable_irq(x)   0
+#define enable_irq(x)   do { } while (0)
 #define disable_irq(x)  do { } while (0)
 #define disable_irq_nosync(x)   disable_irq(x)
diff --git a/include/asm-m68knommu/m5249sim.h b/include/asm-m68knommu/m5249sim.h
index 9344f529bd..399814f0b2 100644
--- a/include/asm-m68knommu/m5249sim.h
+++ b/include/asm-m68knommu/m5249sim.h
@@ -157,7 +157,7 @@
        movel   %d0,0x180(%a1)                  /* set PLL register */
        nop
-#ifdef CONFIG_CLOCK_140MHz
+#if CONFIG_CLOCK_FREQ == 140000000
        /*
         *      Set initial clock frequency. This assumes M5249C3 board
         *      is fitted with 11.2896MHz crystal. It will program the
diff --git a/include/asm-m68knommu/m532xsim.h b/include/asm-m68knommu/m532xsim.h
new file mode 100644
index 0000000000..1835fd20a8
--- /dev/null
+++ b/include/asm-m68knommu/m532xsim.h
@@ -0,0 +1,2238 @@
+/****************************************************************************/
+/*
+ *      m532xsim.h -- ColdFire 5329 registers
+ */
+/****************************************************************************/
+#ifndef m532xsim_h
+#define m532xsim_h
+/****************************************************************************/
+#define MCF_REG32(x) (*(volatile unsigned long  *)(x))
+#define MCF_REG16(x) (*(volatile unsigned short *)(x))
+#define MCF_REG08(x) (*(volatile unsigned char  *)(x))
+#define MCFINT_VECBASE      64
+#define MCFINT_UART0        26          /* Interrupt number for UART0 */
+#define MCFINT_UART1        27          /* Interrupt number for UART1 */
+#define MCF_WTM_WCR     MCF_REG16(0xFC098000)
+/*
+ *      Define the 532x SIM register set addresses.
+ */
+#define MCFSIM_IPRL             0xFC048004
+#define MCFSIM_IPRH             0xFC048000
+#define MCFSIM_IPR              MCFSIM_IPRL
+#define MCFSIM_IMRL             0xFC04800C
+#define MCFSIM_IMRH             0xFC048008
+#define MCFSIM_IMR              MCFSIM_IMRL
+#define MCFSIM_ICR0             0xFC048040      
+#define MCFSIM_ICR1             0xFC048041      
+#define MCFSIM_ICR2             0xFC048042      
+#define MCFSIM_ICR3             0xFC048043      
+#define MCFSIM_ICR4             0xFC048044      
+#define MCFSIM_ICR5             0xFC048045      
+#define MCFSIM_ICR6             0xFC048046      
+#define MCFSIM_ICR7             0xFC048047      
+#define MCFSIM_ICR8             0xFC048048      
+#define MCFSIM_ICR9             0xFC048049      
+#define MCFSIM_ICR10            0xFC04804A
+#define MCFSIM_ICR11            0xFC04804B
+/*
+ *      Some symbol defines for the above...
+ */
+#define MCFSIM_SWDICR           MCFSIM_ICR0     /* Watchdog timer ICR */
+#define MCFSIM_TIMER1ICR        MCFSIM_ICR1     /* Timer 1 ICR */
+#define MCFSIM_TIMER2ICR        MCFSIM_ICR2     /* Timer 2 ICR */
+#define MCFSIM_UART1ICR         MCFSIM_ICR4     /* UART 1 ICR */
+#define MCFSIM_UART2ICR         MCFSIM_ICR5     /* UART 2 ICR */
+#define MCFSIM_DMA0ICR          MCFSIM_ICR6     /* DMA 0 ICR */
+#define MCFSIM_DMA1ICR          MCFSIM_ICR7     /* DMA 1 ICR */
+#define MCFSIM_DMA2ICR          MCFSIM_ICR8     /* DMA 2 ICR */
+#define MCFSIM_DMA3ICR          MCFSIM_ICR9     /* DMA 3 ICR */
+#define MCFSIM_IMR_MASKALL      0xFFFFFFFF      /* All SIM intr sources */
+#define MCFSIM_IMR_SIMR0        0xFC04801C
+#define MCFSIM_IMR_SIMR1        0xFC04C01C
+#define MCFSIM_IMR_CIMR0        0xFC04801D
+#define MCFSIM_IMR_CIMR1        0xFC04C01D
+#define MCFSIM_ICR_TIMER1       (0xFC048040+32)
+#define MCFSIM_ICR_TIMER2       (0xFC048040+33)
+/*
+ *      Macro to set IMR register. It is 32 bits on the 5307.
+ */
+#define mcf_getimr()            \
+        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR))
+#define mcf_setimr(imr)         \
+        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
+#define mcf_getipr()            \
+        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPR))
+#define mcf_getiprl()           \
+        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRL))
+#define mcf_getiprh()           \
+        *((volatile unsigned long *) (MCF_MBAR + MCFSIM_IPRH))
+#define mcf_enable_irq0(irq)            \
+        *((volatile unsigned char*) (MCFSIM_IMR_CIMR0)) = (irq);
+#define mcf_enable_irq1(irq)            \
+        *((volatile unsigned char*) (MCFSIM_IMR_CIMR1)) = (irq);
+#define mcf_disable_irq0(irq)           \
+        *((volatile unsigned char*) (MCFSIM_IMR_SIMR0)) = (irq);
+#define mcf_disable_irq1(irq)           \
+        *((volatile unsigned char*) (MCFSIM_IMR_SIMR1)) = (irq);
+/*
+ *      Define the Cache register flags.
+ */
+#define CACR_EC                 (1<<31)
+#define CACR_ESB                (1<<29)
+#define CACR_DPI                (1<<28)
+#define CACR_HLCK               (1<<27)
+#define CACR_CINVA              (1<<24)
+#define CACR_DNFB               (1<<10)
+#define CACR_DCM_WTHRU          (0<<8)
+#define CACR_DCM_WBACK          (1<<8)
+#define CACR_DCM_OFF_PRE        (2<<8)
+#define CACR_DCM_OFF_IMP        (3<<8)
+#define CACR_DW                 (1<<5)
+#define ACR_BASE_POS            24
+#define ACR_MASK_POS            16
+#define ACR_ENABLE              (1<<15)
+#define ACR_USER                (0<<13)
+#define ACR_SUPER               (1<<13)
+#define ACR_ANY                 (2<<13)
+#define ACR_CM_WTHRU            (0<<5)
+#define ACR_CM_WBACK            (1<<5)
+#define ACR_CM_OFF_PRE          (2<<5)
+#define ACR_CM_OFF_IMP          (3<<5)
+#define ACR_WPROTECT            (1<<2)
+/*********************************************************************
+ *
+ * Inter-IC (I2C) Module
+ *
+ *********************************************************************/
+/* Read/Write access macros for general use */
+#define MCF532x_I2C_I2ADR       (volatile u8 *) (0xFC058000) // Address 
+#define MCF532x_I2C_I2FDR       (volatile u8 *) (0xFC058004) // Freq Divider
+#define MCF532x_I2C_I2CR        (volatile u8 *) (0xFC058008) // Control
+#define MCF532x_I2C_I2SR        (volatile u8 *) (0xFC05800C) // Status
+#define MCF532x_I2C_I2DR        (volatile u8 *) (0xFC058010) // Data I/O
+/* Bit level definitions and macros */
+#define MCF532x_I2C_I2ADR_ADDR(x)                       (((x)&0x7F)<<0x01)
+#define MCF532x_I2C_I2FDR_IC(x)                         (((x)&0x3F))
+#define MCF532x_I2C_I2CR_IEN    (0x80)  // I2C enable
+#define MCF532x_I2C_I2CR_IIEN   (0x40)  // interrupt enable
+#define MCF532x_I2C_I2CR_MSTA   (0x20)  // master/slave mode
+#define MCF532x_I2C_I2CR_MTX    (0x10)  // transmit/receive mode
+#define MCF532x_I2C_I2CR_TXAK   (0x08)  // transmit acknowledge enable
+#define MCF532x_I2C_I2CR_RSTA   (0x04)  // repeat start
+#define MCF532x_I2C_I2SR_ICF    (0x80)  // data transfer bit
+#define MCF532x_I2C_I2SR_IAAS   (0x40)  // I2C addressed as a slave
+#define MCF532x_I2C_I2SR_IBB    (0x20)  // I2C bus busy
+#define MCF532x_I2C_I2SR_IAL    (0x10)  // aribitration lost
+#define MCF532x_I2C_I2SR_SRW    (0x04)  // slave read/write
+#define MCF532x_I2C_I2SR_IIF    (0x02)  // I2C interrupt
+#define MCF532x_I2C_I2SR_RXAK   (0x01)  // received acknowledge
+#define MCF532x_PAR_FECI2C      (volatile u8 *) (0xFC0A4053)
+/*
+ *      The M5329EVB board needs a help getting its devices initialized 
+ *      at kernel start time if dBUG doesn't set it up (for example 
+ *      it is not used), so we need to do it manually.
+ */
+#ifdef __ASSEMBLER__
+.macro m5329EVB_setup
+        movel   #0xFC098000, %a7
+        movel   #0x0, (%a7)
+#define CORE_SRAM       0x80000000      
+#define CORE_SRAM_SIZE  0x8000
+        movel   #CORE_SRAM, %d0
+        addl    #0x221, %d0
+        movec   %d0,%RAMBAR1
+        movel   #CORE_SRAM, %sp
+        addl    #CORE_SRAM_SIZE, %sp
+        jsr     sysinit
+.endm
+#define PLATFORM_SETUP  m5329EVB_setup
+#endif /* __ASSEMBLER__ */
+/*********************************************************************
+ *
+ * Chip Configuration Module (CCM)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_CCM_CCR               MCF_REG16(0xFC0A0004)
+#define MCF_CCM_RCON              MCF_REG16(0xFC0A0008)
+#define MCF_CCM_CIR               MCF_REG16(0xFC0A000A)
+#define MCF_CCM_MISCCR            MCF_REG16(0xFC0A0010)
+#define MCF_CCM_CDR               MCF_REG16(0xFC0A0012)
+#define MCF_CCM_UHCSR             MCF_REG16(0xFC0A0014)
+#define MCF_CCM_UOCSR             MCF_REG16(0xFC0A0016)
+/* Bit definitions and macros for MCF_CCM_CCR */
+#define MCF_CCM_CCR_RESERVED      (0x0001)
+#define MCF_CCM_CCR_PLL_MODE      (0x0003)
+#define MCF_CCM_CCR_OSC_MODE      (0x0005)
+#define MCF_CCM_CCR_BOOTPS(x)     (((x)&0x0003)<<3|0x0001)
+#define MCF_CCM_CCR_LOAD          (0x0021)
+#define MCF_CCM_CCR_LIMP          (0x0041)
+#define MCF_CCM_CCR_CSC(x)        (((x)&0x0003)<<8|0x0001)
+/* Bit definitions and macros for MCF_CCM_RCON */
+#define MCF_CCM_RCON_RESERVED     (0x0001)
+#define MCF_CCM_RCON_PLL_MODE     (0x0003)
+#define MCF_CCM_RCON_OSC_MODE     (0x0005)
+#define MCF_CCM_RCON_BOOTPS(x)    (((x)&0x0003)<<3|0x0001)
+#define MCF_CCM_RCON_LOAD         (0x0021)
+#define MCF_CCM_RCON_LIMP         (0x0041)
+#define MCF_CCM_RCON_CSC(x)       (((x)&0x0003)<<8|0x0001)
+/* Bit definitions and macros for MCF_CCM_CIR */
+#define MCF_CCM_CIR_PRN(x)        (((x)&0x003F)<<0)
+#define MCF_CCM_CIR_PIN(x)        (((x)&0x03FF)<<6)
+/* Bit definitions and macros for MCF_CCM_MISCCR */
+#define MCF_CCM_MISCCR_USBSRC     (0x0001)
+#define MCF_CCM_MISCCR_USBDIV     (0x0002)
+#define MCF_CCM_MISCCR_SSI_SRC    (0x0010)
+#define MCF_CCM_MISCCR_TIM_DMA   (0x0020)
+#define MCF_CCM_MISCCR_SSI_PUS    (0x0040)
+#define MCF_CCM_MISCCR_SSI_PUE    (0x0080)
+#define MCF_CCM_MISCCR_LCD_CHEN   (0x0100)
+#define MCF_CCM_MISCCR_LIMP       (0x1000)
+#define MCF_CCM_MISCCR_PLL_LOCK   (0x2000)
+/* Bit definitions and macros for MCF_CCM_CDR */
+#define MCF_CCM_CDR_SSIDIV(x)     (((x)&0x000F)<<0)
+#define MCF_CCM_CDR_LPDIV(x)      (((x)&0x000F)<<8)
+/* Bit definitions and macros for MCF_CCM_UHCSR */
+#define MCF_CCM_UHCSR_XPDE        (0x0001)
+#define MCF_CCM_UHCSR_UHMIE       (0x0002)
+#define MCF_CCM_UHCSR_WKUP        (0x0004)
+#define MCF_CCM_UHCSR_PORTIND(x)  (((x)&0x0003)<<14)
+/* Bit definitions and macros for MCF_CCM_UOCSR */
+#define MCF_CCM_UOCSR_XPDE        (0x0001)
+#define MCF_CCM_UOCSR_UOMIE       (0x0002)
+#define MCF_CCM_UOCSR_WKUP        (0x0004)
+#define MCF_CCM_UOCSR_PWRFLT      (0x0008)
+#define MCF_CCM_UOCSR_SEND        (0x0010)
+#define MCF_CCM_UOCSR_VVLD        (0x0020)
+#define MCF_CCM_UOCSR_BVLD        (0x0040)
+#define MCF_CCM_UOCSR_AVLD        (0x0080)
+#define MCF_CCM_UOCSR_DPPU        (0x0100)
+#define MCF_CCM_UOCSR_DCR_VBUS    (0x0200)
+#define MCF_CCM_UOCSR_CRG_VBUS    (0x0400)
+#define MCF_CCM_UOCSR_DRV_VBUS    (0x0800)
+#define MCF_CCM_UOCSR_DMPD        (0x1000)
+#define MCF_CCM_UOCSR_DPPD        (0x2000)
+#define MCF_CCM_UOCSR_PORTIND(x)  (((x)&0x0003)<<14)
+/*********************************************************************
+ *
+ * DMA Timers (DTIM)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_DTIM0_DTMR           MCF_REG16(0xFC070000)
+#define MCF_DTIM0_DTXMR          MCF_REG08(0xFC070002)
+#define MCF_DTIM0_DTER           MCF_REG08(0xFC070003)
+#define MCF_DTIM0_DTRR           MCF_REG32(0xFC070004)
+#define MCF_DTIM0_DTCR           MCF_REG32(0xFC070008)
+#define MCF_DTIM0_DTCN           MCF_REG32(0xFC07000C)
+#define MCF_DTIM1_DTMR           MCF_REG16(0xFC074000)
+#define MCF_DTIM1_DTXMR          MCF_REG08(0xFC074002)
+#define MCF_DTIM1_DTER           MCF_REG08(0xFC074003)
+#define MCF_DTIM1_DTRR           MCF_REG32(0xFC074004)
+#define MCF_DTIM1_DTCR           MCF_REG32(0xFC074008)
+#define MCF_DTIM1_DTCN           MCF_REG32(0xFC07400C)
+#define MCF_DTIM2_DTMR           MCF_REG16(0xFC078000)
+#define MCF_DTIM2_DTXMR          MCF_REG08(0xFC078002)
+#define MCF_DTIM2_DTER           MCF_REG08(0xFC078003)
+#define MCF_DTIM2_DTRR           MCF_REG32(0xFC078004)
+#define MCF_DTIM2_DTCR           MCF_REG32(0xFC078008)
+#define MCF_DTIM2_DTCN           MCF_REG32(0xFC07800C)
+#define MCF_DTIM3_DTMR           MCF_REG16(0xFC07C000)
+#define MCF_DTIM3_DTXMR          MCF_REG08(0xFC07C002)
+#define MCF_DTIM3_DTER           MCF_REG08(0xFC07C003)
+#define MCF_DTIM3_DTRR           MCF_REG32(0xFC07C004)
+#define MCF_DTIM3_DTCR           MCF_REG32(0xFC07C008)
+#define MCF_DTIM3_DTCN           MCF_REG32(0xFC07C00C)
+#define MCF_DTIM_DTMR(x)         MCF_REG16(0xFC070000+((x)*0x4000))
+#define MCF_DTIM_DTXMR(x)        MCF_REG08(0xFC070002+((x)*0x4000))
+#define MCF_DTIM_DTER(x)         MCF_REG08(0xFC070003+((x)*0x4000))
+#define MCF_DTIM_DTRR(x)         MCF_REG32(0xFC070004+((x)*0x4000))
+#define MCF_DTIM_DTCR(x)         MCF_REG32(0xFC070008+((x)*0x4000))
+#define MCF_DTIM_DTCN(x)         MCF_REG32(0xFC07000C+((x)*0x4000))
+/* Bit definitions and macros for MCF_DTIM_DTMR */
+#define MCF_DTIM_DTMR_RST        (0x0001)
+#define MCF_DTIM_DTMR_CLK(x)     (((x)&0x0003)<<1)
+#define MCF_DTIM_DTMR_FRR        (0x0008)
+#define MCF_DTIM_DTMR_ORRI       (0x0010)
+#define MCF_DTIM_DTMR_OM         (0x0020)
+#define MCF_DTIM_DTMR_CE(x)      (((x)&0x0003)<<6)
+#define MCF_DTIM_DTMR_PS(x)      (((x)&0x00FF)<<8)
+#define MCF_DTIM_DTMR_CE_ANY     (0x00C0)
+#define MCF_DTIM_DTMR_CE_FALL    (0x0080)
+#define MCF_DTIM_DTMR_CE_RISE    (0x0040)
+#define MCF_DTIM_DTMR_CE_NONE    (0x0000)
+#define MCF_DTIM_DTMR_CLK_DTIN   (0x0006)
+#define MCF_DTIM_DTMR_CLK_DIV16  (0x0004)
+#define MCF_DTIM_DTMR_CLK_DIV1   (0x0002)
+#define MCF_DTIM_DTMR_CLK_STOP   (0x0000)
+/* Bit definitions and macros for MCF_DTIM_DTXMR */
+#define MCF_DTIM_DTXMR_MODE16    (0x01)
+#define MCF_DTIM_DTXMR_DMAEN     (0x80)
+/* Bit definitions and macros for MCF_DTIM_DTER */
+#define MCF_DTIM_DTER_CAP        (0x01)
+#define MCF_DTIM_DTER_REF        (0x02)
+/* Bit definitions and macros for MCF_DTIM_DTRR */
+#define MCF_DTIM_DTRR_REF(x)     (((x)&0xFFFFFFFF)<<0)
+/* Bit definitions and macros for MCF_DTIM_DTCR */
+#define MCF_DTIM_DTCR_CAP(x)     (((x)&0xFFFFFFFF)<<0)
+/* Bit definitions and macros for MCF_DTIM_DTCN */
+#define MCF_DTIM_DTCN_CNT(x)     (((x)&0xFFFFFFFF)<<0)
+/*********************************************************************
+ *
+ * FlexBus Chip Selects (FBCS)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_FBCS0_CSAR          MCF_REG32(0xFC008000)
+#define MCF_FBCS0_CSMR          MCF_REG32(0xFC008004)
+#define MCF_FBCS0_CSCR          MCF_REG32(0xFC008008)
+#define MCF_FBCS1_CSAR          MCF_REG32(0xFC00800C)
+#define MCF_FBCS1_CSMR          MCF_REG32(0xFC008010)
+#define MCF_FBCS1_CSCR          MCF_REG32(0xFC008014)
+#define MCF_FBCS2_CSAR          MCF_REG32(0xFC008018)
+#define MCF_FBCS2_CSMR          MCF_REG32(0xFC00801C)
+#define MCF_FBCS2_CSCR          MCF_REG32(0xFC008020)
+#define MCF_FBCS3_CSAR          MCF_REG32(0xFC008024)
+#define MCF_FBCS3_CSMR          MCF_REG32(0xFC008028)
+#define MCF_FBCS3_CSCR          MCF_REG32(0xFC00802C)
+#define MCF_FBCS4_CSAR          MCF_REG32(0xFC008030)
+#define MCF_FBCS4_CSMR          MCF_REG32(0xFC008034)
+#define MCF_FBCS4_CSCR          MCF_REG32(0xFC008038)
+#define MCF_FBCS5_CSAR          MCF_REG32(0xFC00803C)
+#define MCF_FBCS5_CSMR          MCF_REG32(0xFC008040)
+#define MCF_FBCS5_CSCR          MCF_REG32(0xFC008044)
+#define MCF_FBCS_CSAR(x)        MCF_REG32(0xFC008000+((x)*0x00C))
+#define MCF_FBCS_CSMR(x)        MCF_REG32(0xFC008004+((x)*0x00C))
+#define MCF_FBCS_CSCR(x)        MCF_REG32(0xFC008008+((x)*0x00C))
+/* Bit definitions and macros for MCF_FBCS_CSAR */
+#define MCF_FBCS_CSAR_BA(x)     ((x)&0xFFFF0000)
+/* Bit definitions and macros for MCF_FBCS_CSMR */
+#define MCF_FBCS_CSMR_V         (0x00000001)
+#define MCF_FBCS_CSMR_WP        (0x00000100)
+#define MCF_FBCS_CSMR_BAM(x)    (((x)&0x0000FFFF)<<16)
+#define MCF_FBCS_CSMR_BAM_4G    (0xFFFF0000)
+#define MCF_FBCS_CSMR_BAM_2G    (0x7FFF0000)
+#define MCF_FBCS_CSMR_BAM_1G    (0x3FFF0000)
+#define MCF_FBCS_CSMR_BAM_1024M (0x3FFF0000)
+#define MCF_FBCS_CSMR_BAM_512M  (0x1FFF0000)
+#define MCF_FBCS_CSMR_BAM_256M  (0x0FFF0000)
+#define MCF_FBCS_CSMR_BAM_128M  (0x07FF0000)
+#define MCF_FBCS_CSMR_BAM_64M   (0x03FF0000)
+#define MCF_FBCS_CSMR_BAM_32M   (0x01FF0000)
+#define MCF_FBCS_CSMR_BAM_16M   (0x00FF0000)
+#define MCF_FBCS_CSMR_BAM_8M    (0x007F0000)
+#define MCF_FBCS_CSMR_BAM_4M    (0x003F0000)
+#define MCF_FBCS_CSMR_BAM_2M    (0x001F0000)
+#define MCF_FBCS_CSMR_BAM_1M    (0x000F0000)
+#define MCF_FBCS_CSMR_BAM_1024K (0x000F0000)
+#define MCF_FBCS_CSMR_BAM_512K  (0x00070000)
+#define MCF_FBCS_CSMR_BAM_256K  (0x00030000)
+#define MCF_FBCS_CSMR_BAM_128K  (0x00010000)
+#define MCF_FBCS_CSMR_BAM_64K   (0x00000000)
+/* Bit definitions and macros for MCF_FBCS_CSCR */
+#define MCF_FBCS_CSCR_BSTW      (0x00000008)
+#define MCF_FBCS_CSCR_BSTR      (0x00000010)
+#define MCF_FBCS_CSCR_BEM       (0x00000020)
+#define MCF_FBCS_CSCR_PS(x)     (((x)&0x00000003)<<6)
+#define MCF_FBCS_CSCR_AA        (0x00000100)
+#define MCF_FBCS_CSCR_SBM       (0x00000200)
+#define MCF_FBCS_CSCR_WS(x)     (((x)&0x0000003F)<<10)
+#define MCF_FBCS_CSCR_WRAH(x)   (((x)&0x00000003)<<16)
+#define MCF_FBCS_CSCR_RDAH(x)   (((x)&0x00000003)<<18)
+#define MCF_FBCS_CSCR_ASET(x)   (((x)&0x00000003)<<20)
+#define MCF_FBCS_CSCR_SWSEN     (0x00800000)
+#define MCF_FBCS_CSCR_SWS(x)    (((x)&0x0000003F)<<26)
+#define MCF_FBCS_CSCR_PS_8      (0x0040)
+#define MCF_FBCS_CSCR_PS_16     (0x0080)
+#define MCF_FBCS_CSCR_PS_32     (0x0000)
+/*********************************************************************
+ *
+ * General Purpose I/O (GPIO)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_GPIO_PODR_FECH              MCF_REG08(0xFC0A4000)
+#define MCF_GPIO_PODR_FECL              MCF_REG08(0xFC0A4001)
+#define MCF_GPIO_PODR_SSI               MCF_REG08(0xFC0A4002)
+#define MCF_GPIO_PODR_BUSCTL            MCF_REG08(0xFC0A4003)
+#define MCF_GPIO_PODR_BE                MCF_REG08(0xFC0A4004)
+#define MCF_GPIO_PODR_CS                MCF_REG08(0xFC0A4005)
+#define MCF_GPIO_PODR_PWM               MCF_REG08(0xFC0A4006)
+#define MCF_GPIO_PODR_FECI2C            MCF_REG08(0xFC0A4007)
+#define MCF_GPIO_PODR_UART              MCF_REG08(0xFC0A4009)
+#define MCF_GPIO_PODR_QSPI              MCF_REG08(0xFC0A400A)
+#define MCF_GPIO_PODR_TIMER             MCF_REG08(0xFC0A400B)
+#define MCF_GPIO_PODR_LCDDATAH          MCF_REG08(0xFC0A400D)
+#define MCF_GPIO_PODR_LCDDATAM          MCF_REG08(0xFC0A400E)
+#define MCF_GPIO_PODR_LCDDATAL          MCF_REG08(0xFC0A400F)
+#define MCF_GPIO_PODR_LCDCTLH           MCF_REG08(0xFC0A4010)
+#define MCF_GPIO_PODR_LCDCTLL           MCF_REG08(0xFC0A4011)
+#define MCF_GPIO_PDDR_FECH              MCF_REG08(0xFC0A4014)
+#define MCF_GPIO_PDDR_FECL              MCF_REG08(0xFC0A4015)
+#define MCF_GPIO_PDDR_SSI               MCF_REG08(0xFC0A4016)
+#define MCF_GPIO_PDDR_BUSCTL            MCF_REG08(0xFC0A4017)
+#define MCF_GPIO_PDDR_BE                MCF_REG08(0xFC0A4018)
+#define MCF_GPIO_PDDR_CS                MCF_REG08(0xFC0A4019)
+#define MCF_GPIO_PDDR_PWM               MCF_REG08(0xFC0A401A)
+#define MCF_GPIO_PDDR_FECI2C            MCF_REG08(0xFC0A401B)
+#define MCF_GPIO_PDDR_UART              MCF_REG08(0xFC0A401C)
+#define MCF_GPIO_PDDR_QSPI              MCF_REG08(0xFC0A401E)
+#define MCF_GPIO_PDDR_TIMER             MCF_REG08(0xFC0A401F)
+#define MCF_GPIO_PDDR_LCDDATAH          MCF_REG08(0xFC0A4021)
+#define MCF_GPIO_PDDR_LCDDATAM          MCF_REG08(0xFC0A4022)
+#define MCF_GPIO_PDDR_LCDDATAL          MCF_REG08(0xFC0A4023)
+#define MCF_GPIO_PDDR_LCDCTLH           MCF_REG08(0xFC0A4024)
+#define MCF_GPIO_PDDR_LCDCTLL           MCF_REG08(0xFC0A4025)
+#define MCF_GPIO_PPDSDR_FECH            MCF_REG08(0xFC0A4028)
+#define MCF_GPIO_PPDSDR_FECL            MCF_REG08(0xFC0A4029)
+#define MCF_GPIO_PPDSDR_SSI             MCF_REG08(0xFC0A402A)
+#define MCF_GPIO_PPDSDR_BUSCTL          MCF_REG08(0xFC0A402B)
+#define MCF_GPIO_PPDSDR_BE              MCF_REG08(0xFC0A402C)
+#define MCF_GPIO_PPDSDR_CS              MCF_REG08(0xFC0A402D)
+#define MCF_GPIO_PPDSDR_PWM             MCF_REG08(0xFC0A402E)
+#define MCF_GPIO_PPDSDR_FECI2C          MCF_REG08(0xFC0A402F)
+#define MCF_GPIO_PPDSDR_UART            MCF_REG08(0xFC0A4031)
+#define MCF_GPIO_PPDSDR_QSPI            MCF_REG08(0xFC0A4032)
+#define MCF_GPIO_PPDSDR_TIMER           MCF_REG08(0xFC0A4033)
+#define MCF_GPIO_PPDSDR_LCDDATAH        MCF_REG08(0xFC0A4035)
+#define MCF_GPIO_PPDSDR_LCDDATAM        MCF_REG08(0xFC0A4036)
+#define MCF_GPIO_PPDSDR_LCDDATAL        MCF_REG08(0xFC0A4037)
+#define MCF_GPIO_PPDSDR_LCDCTLH         MCF_REG08(0xFC0A4038)
+#define MCF_GPIO_PPDSDR_LCDCTLL         MCF_REG08(0xFC0A4039)
+#define MCF_GPIO_PCLRR_FECH             MCF_REG08(0xFC0A403C)
+#define MCF_GPIO_PCLRR_FECL             MCF_REG08(0xFC0A403D)
+#define MCF_GPIO_PCLRR_SSI              MCF_REG08(0xFC0A403E)
+#define MCF_GPIO_PCLRR_BUSCTL           MCF_REG08(0xFC0A403F)
+#define MCF_GPIO_PCLRR_BE               MCF_REG08(0xFC0A4040)
+#define MCF_GPIO_PCLRR_CS               MCF_REG08(0xFC0A4041)
+#define MCF_GPIO_PCLRR_PWM              MCF_REG08(0xFC0A4042)
+#define MCF_GPIO_PCLRR_FECI2C           MCF_REG08(0xFC0A4043)
+#define MCF_GPIO_PCLRR_UART             MCF_REG08(0xFC0A4045)
+#define MCF_GPIO_PCLRR_QSPI             MCF_REG08(0xFC0A4046)
+#define MCF_GPIO_PCLRR_TIMER            MCF_REG08(0xFC0A4047)
+#define MCF_GPIO_PCLRR_LCDDATAH         MCF_REG08(0xFC0A4049)
+#define MCF_GPIO_PCLRR_LCDDATAM         MCF_REG08(0xFC0A404A)
+#define MCF_GPIO_PCLRR_LCDDATAL         MCF_REG08(0xFC0A404B)
+#define MCF_GPIO_PCLRR_LCDCTLH          MCF_REG08(0xFC0A404C)
+#define MCF_GPIO_PCLRR_LCDCTLL          MCF_REG08(0xFC0A404D)
+#define MCF_GPIO_PAR_FEC                MCF_REG08(0xFC0A4050)
+#define MCF_GPIO_PAR_PWM                MCF_REG08(0xFC0A4051)
+#define MCF_GPIO_PAR_BUSCTL             MCF_REG08(0xFC0A4052)
+#define MCF_GPIO_PAR_FECI2C             MCF_REG08(0xFC0A4053)
+#define MCF_GPIO_PAR_BE                 MCF_REG08(0xFC0A4054)
+#define MCF_GPIO_PAR_CS                 MCF_REG08(0xFC0A4055)
+#define MCF_GPIO_PAR_SSI                MCF_REG16(0xFC0A4056)
+#define MCF_GPIO_PAR_UART               MCF_REG16(0xFC0A4058)
+#define MCF_GPIO_PAR_QSPI               MCF_REG16(0xFC0A405A)
+#define MCF_GPIO_PAR_TIMER              MCF_REG08(0xFC0A405C)
+#define MCF_GPIO_PAR_LCDDATA            MCF_REG08(0xFC0A405D)
+#define MCF_GPIO_PAR_LCDCTL             MCF_REG16(0xFC0A405E)
+#define MCF_GPIO_PAR_IRQ                MCF_REG16(0xFC0A4060)
+#define MCF_GPIO_MSCR_FLEXBUS           MCF_REG08(0xFC0A4064)
+#define MCF_GPIO_MSCR_SDRAM             MCF_REG08(0xFC0A4065)
+#define MCF_GPIO_DSCR_I2C               MCF_REG08(0xFC0A4068)
+#define MCF_GPIO_DSCR_PWM               MCF_REG08(0xFC0A4069)
+#define MCF_GPIO_DSCR_FEC               MCF_REG08(0xFC0A406A)
+#define MCF_GPIO_DSCR_UART              MCF_REG08(0xFC0A406B)
+#define MCF_GPIO_DSCR_QSPI              MCF_REG08(0xFC0A406C)
+#define MCF_GPIO_DSCR_TIMER             MCF_REG08(0xFC0A406D)
+#define MCF_GPIO_DSCR_SSI               MCF_REG08(0xFC0A406E)
+#define MCF_GPIO_DSCR_LCD               MCF_REG08(0xFC0A406F)
+#define MCF_GPIO_DSCR_DEBUG             MCF_REG08(0xFC0A4070)
+#define MCF_GPIO_DSCR_CLKRST            MCF_REG08(0xFC0A4071)
+#define MCF_GPIO_DSCR_IRQ               MCF_REG08(0xFC0A4072)
+/* Bit definitions and macros for MCF_GPIO_PODR_FECH */
+#define MCF_GPIO_PODR_FECH_PODR_FECH0              (0x01)
+#define MCF_GPIO_PODR_FECH_PODR_FECH1              (0x02)
+#define MCF_GPIO_PODR_FECH_PODR_FECH2              (0x04)
+#define MCF_GPIO_PODR_FECH_PODR_FECH3              (0x08)
+#define MCF_GPIO_PODR_FECH_PODR_FECH4              (0x10)
+#define MCF_GPIO_PODR_FECH_PODR_FECH5              (0x20)
+#define MCF_GPIO_PODR_FECH_PODR_FECH6              (0x40)
+#define MCF_GPIO_PODR_FECH_PODR_FECH7              (0x80)
+/* Bit definitions and macros for MCF_GPIO_PODR_FECL */
+#define MCF_GPIO_PODR_FECL_PODR_FECL0              (0x01)
+#define MCF_GPIO_PODR_FECL_PODR_FECL1              (0x02)
+#define MCF_GPIO_PODR_FECL_PODR_FECL2              (0x04)
+#define MCF_GPIO_PODR_FECL_PODR_FECL3              (0x08)
+#define MCF_GPIO_PODR_FECL_PODR_FECL4              (0x10)
+#define MCF_GPIO_PODR_FECL_PODR_FECL5              (0x20)
+#define MCF_GPIO_PODR_FECL_PODR_FECL6              (0x40)
+#define MCF_GPIO_PODR_FECL_PODR_FECL7              (0x80)
+/* Bit definitions and macros for MCF_GPIO_PODR_SSI */
+#define MCF_GPIO_PODR_SSI_PODR_SSI0                (0x01)
+#define MCF_GPIO_PODR_SSI_PODR_SSI1                (0x02)
+#define MCF_GPIO_PODR_SSI_PODR_SSI2                (0x04)
+#define MCF_GPIO_PODR_SSI_PODR_SSI3                (0x08)
+#define MCF_GPIO_PODR_SSI_PODR_SSI4                (0x10)
+/* Bit definitions and macros for MCF_GPIO_PODR_BUSCTL */
+#define MCF_GPIO_PODR_BUSCTL_POSDR_BUSCTL0         (0x01)
+#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL1          (0x02)
+#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL2          (0x04)
+#define MCF_GPIO_PODR_BUSCTL_PODR_BUSCTL3          (0x08)
+/* Bit definitions and macros for MCF_GPIO_PODR_BE */
+#define MCF_GPIO_PODR_BE_PODR_BE0                  (0x01)
+#define MCF_GPIO_PODR_BE_PODR_BE1                  (0x02)
+#define MCF_GPIO_PODR_BE_PODR_BE2                  (0x04)
+#define MCF_GPIO_PODR_BE_PODR_BE3                  (0x08)
+/* Bit definitions and macros for MCF_GPIO_PODR_CS */
+#define MCF_GPIO_PODR_CS_PODR_CS1                  (0x02)
+#define MCF_GPIO_PODR_CS_PODR_CS2                  (0x04)
+#define MCF_GPIO_PODR_CS_PODR_CS3                  (0x08)
+#define MCF_GPIO_PODR_CS_PODR_CS4                  (0x10)
+#define MCF_GPIO_PODR_CS_PODR_CS5                  (0x20)
+/* Bit definitions and macros for MCF_GPIO_PODR_PWM */
+#define MCF_GPIO_PODR_PWM_PODR_PWM2                (0x04)
+#define MCF_GPIO_PODR_PWM_PODR_PWM3                (0x08)
+#define MCF_GPIO_PODR_PWM_PODR_PWM4                (0x10)
+#define MCF_GPIO_PODR_PWM_PODR_PWM5                (0x20)
+/* Bit definitions and macros for MCF_GPIO_PODR_FECI2C */
+#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C0          (0x01)
+#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C1          (0x02)
+#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C2          (0x04)
+#define MCF_GPIO_PODR_FECI2C_PODR_FECI2C3          (0x08)
+/* Bit definitions and macros for MCF_GPIO_PODR_UART */
+#define MCF_GPIO_PODR_UART_PODR_UART0              (0x01)
+#define MCF_GPIO_PODR_UART_PODR_UART1              (0x02)
+#define MCF_GPIO_PODR_UART_PODR_UART2              (0x04)
+#define MCF_GPIO_PODR_UART_PODR_UART3              (0x08)
+#define MCF_GPIO_PODR_UART_PODR_UART4              (0x10)
+#define MCF_GPIO_PODR_UART_PODR_UART5              (0x20)
+#define MCF_GPIO_PODR_UART_PODR_UART6              (0x40)
+#define MCF_GPIO_PODR_UART_PODR_UART7              (0x80)
+/* Bit definitions and macros for MCF_GPIO_PODR_QSPI */
+#define MCF_GPIO_PODR_QSPI_PODR_QSPI0              (0x01)
+#define MCF_GPIO_PODR_QSPI_PODR_QSPI1              (0x02)
+#define MCF_GPIO_PODR_QSPI_PODR_QSPI2              (0x04)
+#define MCF_GPIO_PODR_QSPI_PODR_QSPI3              (0x08)
+#define MCF_GPIO_PODR_QSPI_PODR_QSPI4              (0x10)
+#define MCF_GPIO_PODR_QSPI_PODR_QSPI5              (0x20)
+/* Bit definitions and macros for MCF_GPIO_PODR_TIMER */
+#define MCF_GPIO_PODR_TIMER_PODR_TIMER0            (0x01)
+#define MCF_GPIO_PODR_TIMER_PODR_TIMER1            (0x02)
+#define MCF_GPIO_PODR_TIMER_PODR_TIMER2            (0x04)
+#define MCF_GPIO_PODR_TIMER_PODR_TIMER3            (0x08)
+/* Bit definitions and macros for MCF_GPIO_PODR_LCDDATAH */
+#define MCF_GPIO_PODR_LCDDATAH_PODR_LCDDATAH0      (0x01)
+#define MCF_GPIO_PODR_LCDDATAH_PODR_LCDDATAH1      (0x02)
+/* Bit definitions and macros for MCF_GPIO_PODR_LCDDATAM */
+#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM0      (0x01)
+#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM1      (0x02)
+#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM2      (0x04)
+#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM3      (0x08)
+#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM4      (0x10)
+#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM5      (0x20)
+#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM6      (0x40)
+#define MCF_GPIO_PODR_LCDDATAM_PODR_LCDDATAM7      (0x80)
+/* Bit definitions and macros for MCF_GPIO_PODR_LCDDATAL */
+#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL0      (0x01)
+#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL1      (0x02)
+#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL2      (0x04)
+#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL3      (0x08)
+#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL4      (0x10)
+#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL5      (0x20)
+#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL6      (0x40)
+#define MCF_GPIO_PODR_LCDDATAL_PODR_LCDDATAL7      (0x80)
+/* Bit definitions and macros for MCF_GPIO_PODR_LCDCTLH */
+#define MCF_GPIO_PODR_LCDCTLH_PODR_LCDCTLH0        (0x01)
+/* Bit definitions and macros for MCF_GPIO_PODR_LCDCTLL */
+#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL0        (0x01)
+#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL1        (0x02)
+#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL2        (0x04)
+#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL3        (0x08)
+#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL4        (0x10)
+#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL5        (0x20)
+#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL6        (0x40)
+#define MCF_GPIO_PODR_LCDCTLL_PODR_LCDCTLL7        (0x80)
+/* Bit definitions and macros for MCF_GPIO_PDDR_FECH */
+#define MCF_GPIO_PDDR_FECH_PDDR_FECH0              (0x01)
+#define MCF_GPIO_PDDR_FECH_PDDR_FECH1              (0x02)
+#define MCF_GPIO_PDDR_FECH_PDDR_FECH2              (0x04)
+#define MCF_GPIO_PDDR_FECH_PDDR_FECH3              (0x08)
+#define MCF_GPIO_PDDR_FECH_PDDR_FECH4              (0x10)
+#define MCF_GPIO_PDDR_FECH_PDDR_FECH5              (0x20)
+#define MCF_GPIO_PDDR_FECH_PDDR_FECH6              (0x40)
+#define MCF_GPIO_PDDR_FECH_PDDR_FECH7              (0x80)
+/* Bit definitions and macros for MCF_GPIO_PDDR_FECL */
+#define MCF_GPIO_PDDR_FECL_PDDR_FECL0              (0x01)
+#define MCF_GPIO_PDDR_FECL_PDDR_FECL1              (0x02)
+#define MCF_GPIO_PDDR_FECL_PDDR_FECL2              (0x04)
+#define MCF_GPIO_PDDR_FECL_PDDR_FECL3              (0x08)
+#define MCF_GPIO_PDDR_FECL_PDDR_FECL4              (0x10)
+#define MCF_GPIO_PDDR_FECL_PDDR_FECL5              (0x20)
+#define MCF_GPIO_PDDR_FECL_PDDR_FECL6              (0x40)
+#define MCF_GPIO_PDDR_FECL_PDDR_FECL7              (0x80)
+/* Bit definitions and macros for MCF_GPIO_PDDR_SSI */
+#define MCF_GPIO_PDDR_SSI_PDDR_SSI0                (0x01)
+#define MCF_GPIO_PDDR_SSI_PDDR_SSI1                (0x02)
+#define MCF_GPIO_PDDR_SSI_PDDR_SSI2                (0x04)
+#define MCF_GPIO_PDDR_SSI_PDDR_SSI3                (0x08)
+#define MCF_GPIO_PDDR_SSI_PDDR_SSI4                (0x10)
+/* Bit definitions and macros for MCF_GPIO_PDDR_BUSCTL */
+#define MCF_GPIO_PDDR_BUSCTL_POSDR_BUSCTL0         (0x01)
+#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL1          (0x02)
+#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL2          (0x04)
+#define MCF_GPIO_PDDR_BUSCTL_PDDR_BUSCTL3          (0x08)
+/* Bit definitions and macros for MCF_GPIO_PDDR_BE */
+#define MCF_GPIO_PDDR_BE_PDDR_BE0                  (0x01)
+#define MCF_GPIO_PDDR_BE_PDDR_BE1                  (0x02)
+#define MCF_GPIO_PDDR_BE_PDDR_BE2                  (0x04)
+#define MCF_GPIO_PDDR_BE_PDDR_BE3                  (0x08)
+/* Bit definitions and macros for MCF_GPIO_PDDR_CS */
+#define MCF_GPIO_PDDR_CS_PDDR_CS1                  (0x02)
+#define MCF_GPIO_PDDR_CS_PDDR_CS2                  (0x04)
+#define MCF_GPIO_PDDR_CS_PDDR_CS3                  (0x08)
+#define MCF_GPIO_PDDR_CS_PDDR_CS4                  (0x10)
+#define MCF_GPIO_PDDR_CS_PDDR_CS5                  (0x20)
+/* Bit definitions and macros for MCF_GPIO_PDDR_PWM */
+#define MCF_GPIO_PDDR_PWM_PDDR_PWM2                (0x04)
+#define MCF_GPIO_PDDR_PWM_PDDR_PWM3                (0x08)
+#define MCF_GPIO_PDDR_PWM_PDDR_PWM4                (0x10)
+#define MCF_GPIO_PDDR_PWM_PDDR_PWM5                (0x20)
+/* Bit definitions and macros for MCF_GPIO_PDDR_FECI2C */
+#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C0          (0x01)
+#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C1          (0x02)
+#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C2          (0x04)
+#define MCF_GPIO_PDDR_FECI2C_PDDR_FECI2C3          (0x08)
+/* Bit definitions and macros for MCF_GPIO_PDDR_UART */
+#define MCF_GPIO_PDDR_UART_PDDR_UART0              (0x01)
+#define MCF_GPIO_PDDR_UART_PDDR_UART1              (0x02)
+#define MCF_GPIO_PDDR_UART_PDDR_UART2              (0x04)
+#define MCF_GPIO_PDDR_UART_PDDR_UART3              (0x08)
+#define MCF_GPIO_PDDR_UART_PDDR_UART4              (0x10)
+#define MCF_GPIO_PDDR_UART_PDDR_UART5              (0x20)
+#define MCF_GPIO_PDDR_UART_PDDR_UART6              (0x40)
+#define MCF_GPIO_PDDR_UART_PDDR_UART7              (0x80)
+/* Bit definitions and macros for MCF_GPIO_PDDR_QSPI */
+#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI0              (0x01)
+#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI1              (0x02)
+#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI2              (0x04)
+#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI3              (0x08)
+#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI4              (0x10)
+#define MCF_GPIO_PDDR_QSPI_PDDR_QSPI5              (0x20)
+/* Bit definitions and macros for MCF_GPIO_PDDR_TIMER */
+#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER0            (0x01)
+#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER1            (0x02)
+#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER2            (0x04)
+#define MCF_GPIO_PDDR_TIMER_PDDR_TIMER3            (0x08)
+/* Bit definitions and macros for MCF_GPIO_PDDR_LCDDATAH */
+#define MCF_GPIO_PDDR_LCDDATAH_PDDR_LCDDATAH0      (0x01)
+#define MCF_GPIO_PDDR_LCDDATAH_PDDR_LCDDATAH1      (0x02)
+/* Bit definitions and macros for MCF_GPIO_PDDR_LCDDATAM */
+#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM0      (0x01)
+#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM1      (0x02)
+#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM2      (0x04)
+#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM3      (0x08)
+#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM4      (0x10)
+#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM5      (0x20)
+#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM6      (0x40)
+#define MCF_GPIO_PDDR_LCDDATAM_PDDR_LCDDATAM7      (0x80)
+/* Bit definitions and macros for MCF_GPIO_PDDR_LCDDATAL */
+#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL0      (0x01)
+#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL1      (0x02)
+#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL2      (0x04)
+#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL3      (0x08)
+#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL4      (0x10)
+#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL5      (0x20)
+#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL6      (0x40)
+#define MCF_GPIO_PDDR_LCDDATAL_PDDR_LCDDATAL7      (0x80)
+/* Bit definitions and macros for MCF_GPIO_PDDR_LCDCTLH */
+#define MCF_GPIO_PDDR_LCDCTLH_PDDR_LCDCTLH0        (0x01)
+/* Bit definitions and macros for MCF_GPIO_PDDR_LCDCTLL */
+#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL0        (0x01)
+#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL1        (0x02)
+#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL2        (0x04)
+#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL3        (0x08)
+#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL4        (0x10)
+#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL5        (0x20)
+#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL6        (0x40)
+#define MCF_GPIO_PDDR_LCDCTLL_PDDR_LCDCTLL7        (0x80)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECH */
+#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH0          (0x01)
+#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH1          (0x02)
+#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH2          (0x04)
+#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH3          (0x08)
+#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH4          (0x10)
+#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH5          (0x20)
+#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH6          (0x40)
+#define MCF_GPIO_PPDSDR_FECH_PPDSDR_FECH7          (0x80)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECL */
+#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL0          (0x01)
+#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL1          (0x02)
+#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL2          (0x04)
+#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL3          (0x08)
+#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL4          (0x10)
+#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL5          (0x20)
+#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL6          (0x40)
+#define MCF_GPIO_PPDSDR_FECL_PPDSDR_FECL7          (0x80)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_SSI */
+#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI0            (0x01)
+#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI1            (0x02)
+#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI2            (0x04)
+#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI3            (0x08)
+#define MCF_GPIO_PPDSDR_SSI_PPDSDR_SSI4            (0x10)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_BUSCTL */
+#define MCF_GPIO_PPDSDR_BUSCTL_POSDR_BUSCTL0       (0x01)
+#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL1      (0x02)
+#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL2      (0x04)
+#define MCF_GPIO_PPDSDR_BUSCTL_PPDSDR_BUSCTL3      (0x08)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_BE */
+#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE0              (0x01)
+#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE1              (0x02)
+#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE2              (0x04)
+#define MCF_GPIO_PPDSDR_BE_PPDSDR_BE3              (0x08)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_CS */
+#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS1              (0x02)
+#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS2              (0x04)
+#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS3              (0x08)
+#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS4              (0x10)
+#define MCF_GPIO_PPDSDR_CS_PPDSDR_CS5              (0x20)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_PWM */
+#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM2            (0x04)
+#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM3            (0x08)
+#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM4            (0x10)
+#define MCF_GPIO_PPDSDR_PWM_PPDSDR_PWM5            (0x20)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_FECI2C */
+#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C0      (0x01)
+#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C1      (0x02)
+#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C2      (0x04)
+#define MCF_GPIO_PPDSDR_FECI2C_PPDSDR_FECI2C3      (0x08)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_UART */
+#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART0          (0x01)
+#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART1          (0x02)
+#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART2          (0x04)
+#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART3          (0x08)
+#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART4          (0x10)
+#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART5          (0x20)
+#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART6          (0x40)
+#define MCF_GPIO_PPDSDR_UART_PPDSDR_UART7          (0x80)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_QSPI */
+#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI0          (0x01)
+#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI1          (0x02)
+#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI2          (0x04)
+#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI3          (0x08)
+#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI4          (0x10)
+#define MCF_GPIO_PPDSDR_QSPI_PPDSDR_QSPI5          (0x20)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_TIMER */
+#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER0        (0x01)
+#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER1        (0x02)
+#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER2        (0x04)
+#define MCF_GPIO_PPDSDR_TIMER_PPDSDR_TIMER3        (0x08)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDDATAH */
+#define MCF_GPIO_PPDSDR_LCDDATAH_PPDSDR_LCDDATAH0  (0x01)
+#define MCF_GPIO_PPDSDR_LCDDATAH_PPDSDR_LCDDATAH1  (0x02)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDDATAM */
+#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM0  (0x01)
+#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM1  (0x02)
+#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM2  (0x04)
+#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM3  (0x08)
+#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM4  (0x10)
+#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM5  (0x20)
+#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM6  (0x40)
+#define MCF_GPIO_PPDSDR_LCDDATAM_PPDSDR_LCDDATAM7  (0x80)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDDATAL */
+#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL0  (0x01)
+#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL1  (0x02)
+#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL2  (0x04)
+#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL3  (0x08)
+#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL4  (0x10)
+#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL5  (0x20)
+#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL6  (0x40)
+#define MCF_GPIO_PPDSDR_LCDDATAL_PPDSDR_LCDDATAL7  (0x80)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDCTLH */
+#define MCF_GPIO_PPDSDR_LCDCTLH_PPDSDR_LCDCTLH0    (0x01)
+/* Bit definitions and macros for MCF_GPIO_PPDSDR_LCDCTLL */
+#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL0    (0x01)
+#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL1    (0x02)
+#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL2    (0x04)
+#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL3    (0x08)
+#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL4    (0x10)
+#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL5    (0x20)
+#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL6    (0x40)
+#define MCF_GPIO_PPDSDR_LCDCTLL_PPDSDR_LCDCTLL7    (0x80)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_FECH */
+#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH0            (0x01)
+#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH1            (0x02)
+#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH2            (0x04)
+#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH3            (0x08)
+#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH4            (0x10)
+#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH5            (0x20)
+#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH6            (0x40)
+#define MCF_GPIO_PCLRR_FECH_PCLRR_FECH7            (0x80)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_FECL */
+#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL0            (0x01)
+#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL1            (0x02)
+#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL2            (0x04)
+#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL3            (0x08)
+#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL4            (0x10)
+#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL5            (0x20)
+#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL6            (0x40)
+#define MCF_GPIO_PCLRR_FECL_PCLRR_FECL7            (0x80)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_SSI */
+#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI0              (0x01)
+#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI1              (0x02)
+#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI2              (0x04)
+#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI3              (0x08)
+#define MCF_GPIO_PCLRR_SSI_PCLRR_SSI4              (0x10)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_BUSCTL */
+#define MCF_GPIO_PCLRR_BUSCTL_POSDR_BUSCTL0        (0x01)
+#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL1        (0x02)
+#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL2        (0x04)
+#define MCF_GPIO_PCLRR_BUSCTL_PCLRR_BUSCTL3        (0x08)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_BE */
+#define MCF_GPIO_PCLRR_BE_PCLRR_BE0                (0x01)
+#define MCF_GPIO_PCLRR_BE_PCLRR_BE1                (0x02)
+#define MCF_GPIO_PCLRR_BE_PCLRR_BE2                (0x04)
+#define MCF_GPIO_PCLRR_BE_PCLRR_BE3                (0x08)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_CS */
+#define MCF_GPIO_PCLRR_CS_PCLRR_CS1                (0x02)
+#define MCF_GPIO_PCLRR_CS_PCLRR_CS2                (0x04)
+#define MCF_GPIO_PCLRR_CS_PCLRR_CS3                (0x08)
+#define MCF_GPIO_PCLRR_CS_PCLRR_CS4                (0x10)
+#define MCF_GPIO_PCLRR_CS_PCLRR_CS5                (0x20)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_PWM */
+#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM2              (0x04)
+#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM3              (0x08)
+#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM4              (0x10)
+#define MCF_GPIO_PCLRR_PWM_PCLRR_PWM5              (0x20)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_FECI2C */
+#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C0        (0x01)
+#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C1        (0x02)
+#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C2        (0x04)
+#define MCF_GPIO_PCLRR_FECI2C_PCLRR_FECI2C3        (0x08)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_UART */
+#define MCF_GPIO_PCLRR_UART_PCLRR_UART0            (0x01)
+#define MCF_GPIO_PCLRR_UART_PCLRR_UART1            (0x02)
+#define MCF_GPIO_PCLRR_UART_PCLRR_UART2            (0x04)
+#define MCF_GPIO_PCLRR_UART_PCLRR_UART3            (0x08)
+#define MCF_GPIO_PCLRR_UART_PCLRR_UART4            (0x10)
+#define MCF_GPIO_PCLRR_UART_PCLRR_UART5            (0x20)
+#define MCF_GPIO_PCLRR_UART_PCLRR_UART6            (0x40)
+#define MCF_GPIO_PCLRR_UART_PCLRR_UART7            (0x80)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_QSPI */
+#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI0            (0x01)
+#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI1            (0x02)
+#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI2            (0x04)
+#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI3            (0x08)
+#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI4            (0x10)
+#define MCF_GPIO_PCLRR_QSPI_PCLRR_QSPI5            (0x20)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_TIMER */
+#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER0          (0x01)
+#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER1          (0x02)
+#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER2          (0x04)
+#define MCF_GPIO_PCLRR_TIMER_PCLRR_TIMER3          (0x08)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDDATAH */
+#define MCF_GPIO_PCLRR_LCDDATAH_PCLRR_LCDDATAH0    (0x01)
+#define MCF_GPIO_PCLRR_LCDDATAH_PCLRR_LCDDATAH1    (0x02)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDDATAM */
+#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM0    (0x01)
+#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM1    (0x02)
+#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM2    (0x04)
+#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM3    (0x08)
+#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM4    (0x10)
+#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM5    (0x20)
+#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM6    (0x40)
+#define MCF_GPIO_PCLRR_LCDDATAM_PCLRR_LCDDATAM7    (0x80)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDDATAL */
+#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL0    (0x01)
+#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL1    (0x02)
+#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL2    (0x04)
+#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL3    (0x08)
+#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL4    (0x10)
+#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL5    (0x20)
+#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL6    (0x40)
+#define MCF_GPIO_PCLRR_LCDDATAL_PCLRR_LCDDATAL7    (0x80)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDCTLH */
+#define MCF_GPIO_PCLRR_LCDCTLH_PCLRR_LCDCTLH0      (0x01)
+/* Bit definitions and macros for MCF_GPIO_PCLRR_LCDCTLL */
+#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL0      (0x01)
+#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL1      (0x02)
+#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL2      (0x04)
+#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL3      (0x08)
+#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL4      (0x10)
+#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL5      (0x20)
+#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL6      (0x40)
+#define MCF_GPIO_PCLRR_LCDCTLL_PCLRR_LCDCTLL7      (0x80)
+/* Bit definitions and macros for MCF_GPIO_PAR_FEC */
+#define MCF_GPIO_PAR_FEC_PAR_FEC_MII(x)            (((x)&0x03)<<0)
+#define MCF_GPIO_PAR_FEC_PAR_FEC_7W(x)             (((x)&0x03)<<2)
+#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_GPIO           (0x00)
+#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_URTS1          (0x04)
+#define MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC            (0x0C)
+#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_GPIO          (0x00)
+#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_UART          (0x01)
+#define MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC           (0x03)
+/* Bit definitions and macros for MCF_GPIO_PAR_PWM */
+#define MCF_GPIO_PAR_PWM_PAR_PWM1(x)               (((x)&0x03)<<0)
+#define MCF_GPIO_PAR_PWM_PAR_PWM3(x)               (((x)&0x03)<<2)
+#define MCF_GPIO_PAR_PWM_PAR_PWM5                  (0x10)
+#define MCF_GPIO_PAR_PWM_PAR_PWM7                  (0x20)
+/* Bit definitions and macros for MCF_GPIO_PAR_BUSCTL */
+#define MCF_GPIO_PAR_BUSCTL_PAR_TS(x)              (((x)&0x03)<<3)
+#define MCF_GPIO_PAR_BUSCTL_PAR_RWB                (0x20)
+#define MCF_GPIO_PAR_BUSCTL_PAR_TA                 (0x40)
+#define MCF_GPIO_PAR_BUSCTL_PAR_OE                 (0x80)
+#define MCF_GPIO_PAR_BUSCTL_PAR_OE_GPIO            (0x00)
+#define MCF_GPIO_PAR_BUSCTL_PAR_OE_OE              (0x80)
+#define MCF_GPIO_PAR_BUSCTL_PAR_TA_GPIO            (0x00)
+#define MCF_GPIO_PAR_BUSCTL_PAR_TA_TA              (0x40)
+#define MCF_GPIO_PAR_BUSCTL_PAR_RWB_GPIO           (0x00)
+#define MCF_GPIO_PAR_BUSCTL_PAR_RWB_RWB            (0x20)
+#define MCF_GPIO_PAR_BUSCTL_PAR_TS_GPIO            (0x00)
+#define MCF_GPIO_PAR_BUSCTL_PAR_TS_DACK0           (0x10)
+#define MCF_GPIO_PAR_BUSCTL_PAR_TS_TS              (0x18)
+/* Bit definitions and macros for MCF_GPIO_PAR_FECI2C */
+#define MCF_GPIO_PAR_FECI2C_PAR_SDA(x)             (((x)&0x03)<<0)
+#define MCF_GPIO_PAR_FECI2C_PAR_SCL(x)             (((x)&0x03)<<2)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDIO(x)            (((x)&0x03)<<4)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDC(x)             (((x)&0x03)<<6)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDC_GPIO           (0x00)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDC_UTXD2          (0x40)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDC_SCL            (0x80)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC           (0xC0)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_GPIO          (0x00)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_URXD2         (0x10)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_SDA           (0x20)
+#define MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO         (0x30)
+#define MCF_GPIO_PAR_FECI2C_PAR_SCL_GPIO           (0x00)
+#define MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2          (0x04)
+#define MCF_GPIO_PAR_FECI2C_PAR_SCL_SCL            (0x0C)
+#define MCF_GPIO_PAR_FECI2C_PAR_SDA_GPIO           (0x00)
+#define MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2          (0x02)
+#define MCF_GPIO_PAR_FECI2C_PAR_SDA_SDA            (0x03)
+/* Bit definitions and macros for MCF_GPIO_PAR_BE */
+#define MCF_GPIO_PAR_BE_PAR_BE0                    (0x01)
+#define MCF_GPIO_PAR_BE_PAR_BE1                    (0x02)
+#define MCF_GPIO_PAR_BE_PAR_BE2                    (0x04)
+#define MCF_GPIO_PAR_BE_PAR_BE3                    (0x08)
+/* Bit definitions and macros for MCF_GPIO_PAR_CS */
+#define MCF_GPIO_PAR_CS_PAR_CS1                    (0x02)
+#define MCF_GPIO_PAR_CS_PAR_CS2                    (0x04)
+#define MCF_GPIO_PAR_CS_PAR_CS3                    (0x08)
+#define MCF_GPIO_PAR_CS_PAR_CS4                    (0x10)
+#define MCF_GPIO_PAR_CS_PAR_CS5                    (0x20)
+#define MCF_GPIO_PAR_CS_PAR_CS_CS1_GPIO            (0x00)
+#define MCF_GPIO_PAR_CS_PAR_CS_CS1_SDCS1           (0x01)
+#define MCF_GPIO_PAR_CS_PAR_CS_CS1_CS1             (0x03)
+/* Bit definitions and macros for MCF_GPIO_PAR_SSI */
+#define MCF_GPIO_PAR_SSI_PAR_MCLK                  (0x0080)
+#define MCF_GPIO_PAR_SSI_PAR_TXD(x)                (((x)&0x0003)<<8)
+#define MCF_GPIO_PAR_SSI_PAR_RXD(x)                (((x)&0x0003)<<10)
+#define MCF_GPIO_PAR_SSI_PAR_FS(x)                 (((x)&0x0003)<<12)
+#define MCF_GPIO_PAR_SSI_PAR_BCLK(x)               (((x)&0x0003)<<14)
+/* Bit definitions and macros for MCF_GPIO_PAR_UART */
+#define MCF_GPIO_PAR_UART_PAR_UTXD0                (0x0001)
+#define MCF_GPIO_PAR_UART_PAR_URXD0                (0x0002)
+#define MCF_GPIO_PAR_UART_PAR_URTS0                (0x0004)
+#define MCF_GPIO_PAR_UART_PAR_UCTS0                (0x0008)
+#define MCF_GPIO_PAR_UART_PAR_UTXD1(x)             (((x)&0x0003)<<4)
+#define MCF_GPIO_PAR_UART_PAR_URXD1(x)             (((x)&0x0003)<<6)
+#define MCF_GPIO_PAR_UART_PAR_URTS1(x)             (((x)&0x0003)<<8)
+#define MCF_GPIO_PAR_UART_PAR_UCTS1(x)             (((x)&0x0003)<<10)
+#define MCF_GPIO_PAR_UART_PAR_UCTS1_GPIO           (0x0000)
+#define MCF_GPIO_PAR_UART_PAR_UCTS1_SSI_BCLK       (0x0800)
+#define MCF_GPIO_PAR_UART_PAR_UCTS1_ULPI_D7        (0x0400)
+#define MCF_GPIO_PAR_UART_PAR_UCTS1_UCTS1          (0x0C00)
+#define MCF_GPIO_PAR_UART_PAR_URTS1_GPIO           (0x0000)
+#define MCF_GPIO_PAR_UART_PAR_URTS1_SSI_FS         (0x0200)
+#define MCF_GPIO_PAR_UART_PAR_URTS1_ULPI_D6        (0x0100)
+#define MCF_GPIO_PAR_UART_PAR_URTS1_URTS1          (0x0300)
+#define MCF_GPIO_PAR_UART_PAR_URXD1_GPIO           (0x0000)
+#define MCF_GPIO_PAR_UART_PAR_URXD1_SSI_RXD        (0x0080)
+#define MCF_GPIO_PAR_UART_PAR_URXD1_ULPI_D5        (0x0040)
+#define MCF_GPIO_PAR_UART_PAR_URXD1_URXD1          (0x00C0)
+#define MCF_GPIO_PAR_UART_PAR_UTXD1_GPIO           (0x0000)
+#define MCF_GPIO_PAR_UART_PAR_UTXD1_SSI_TXD        (0x0020)
+#define MCF_GPIO_PAR_UART_PAR_UTXD1_ULPI_D4        (0x0010)
+#define MCF_GPIO_PAR_UART_PAR_UTXD1_UTXD1          (0x0030)
+/* Bit definitions and macros for MCF_GPIO_PAR_QSPI */
+#define MCF_GPIO_PAR_QSPI_PAR_SCK(x)               (((x)&0x0003)<<4)
+#define MCF_GPIO_PAR_QSPI_PAR_DOUT(x)              (((x)&0x0003)<<6)
+#define MCF_GPIO_PAR_QSPI_PAR_DIN(x)               (((x)&0x0003)<<8)
+#define MCF_GPIO_PAR_QSPI_PAR_PCS0(x)              (((x)&0x0003)<<10)
+#define MCF_GPIO_PAR_QSPI_PAR_PCS1(x)              (((x)&0x0003)<<12)
+#define MCF_GPIO_PAR_QSPI_PAR_PCS2(x)              (((x)&0x0003)<<14)
+/* Bit definitions and macros for MCF_GPIO_PAR_TIMER */
+#define MCF_GPIO_PAR_TIMER_PAR_TIN0(x)             (((x)&0x03)<<0)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN1(x)             (((x)&0x03)<<2)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN2(x)             (((x)&0x03)<<4)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN3(x)             (((x)&0x03)<<6)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN3_GPIO           (0x00)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN3_TOUT3          (0x80)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN3_URXD2          (0x40)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN3_TIN3           (0xC0)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN2_GPIO           (0x00)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN2_TOUT2          (0x20)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN2_UTXD2          (0x10)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN2_TIN2           (0x30)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN1_GPIO           (0x00)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN1_TOUT1          (0x08)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN1_DACK1          (0x04)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN1_TIN1           (0x0C)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN0_GPIO           (0x00)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN0_TOUT0          (0x02)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN0_DREQ0          (0x01)
+#define MCF_GPIO_PAR_TIMER_PAR_TIN0_TIN0           (0x03)
+/* Bit definitions and macros for MCF_GPIO_PAR_LCDDATA */
+#define MCF_GPIO_PAR_LCDDATA_PAR_LD7_0(x)          (((x)&0x03)<<0)
+#define MCF_GPIO_PAR_LCDDATA_PAR_LD15_8(x)         (((x)&0x03)<<2)
+#define MCF_GPIO_PAR_LCDDATA_PAR_LD16(x)           (((x)&0x03)<<4)
+#define MCF_GPIO_PAR_LCDDATA_PAR_LD17(x)           (((x)&0x03)<<6)
+/* Bit definitions and macros for MCF_GPIO_PAR_LCDCTL */
+#define MCF_GPIO_PAR_LCDCTL_PAR_CLS                (0x0001)
+#define MCF_GPIO_PAR_LCDCTL_PAR_PS                 (0x0002)
+#define MCF_GPIO_PAR_LCDCTL_PAR_REV                (0x0004)
+#define MCF_GPIO_PAR_LCDCTL_PAR_SPL_SPR            (0x0008)
+#define MCF_GPIO_PAR_LCDCTL_PAR_CONTRAST           (0x0010)
+#define MCF_GPIO_PAR_LCDCTL_PAR_LSCLK              (0x0020)
+#define MCF_GPIO_PAR_LCDCTL_PAR_LP_HSYNC           (0x0040)
+#define MCF_GPIO_PAR_LCDCTL_PAR_FLM_VSYNC          (0x0080)
+#define MCF_GPIO_PAR_LCDCTL_PAR_ACD_OE             (0x0100)
+/* Bit definitions and macros for MCF_GPIO_PAR_IRQ */
+#define MCF_GPIO_PAR_IRQ_PAR_IRQ1(x)               (((x)&0x0003)<<4)
+#define MCF_GPIO_PAR_IRQ_PAR_IRQ2(x)               (((x)&0x0003)<<6)
+#define MCF_GPIO_PAR_IRQ_PAR_IRQ4(x)               (((x)&0x0003)<<8)
+#define MCF_GPIO_PAR_IRQ_PAR_IRQ5(x)               (((x)&0x0003)<<10)
+#define MCF_GPIO_PAR_IRQ_PAR_IRQ6(x)               (((x)&0x0003)<<12)
+/* Bit definitions and macros for MCF_GPIO_MSCR_FLEXBUS */
+#define MCF_GPIO_MSCR_FLEXBUS_MSCR_ADDRCTL(x)      (((x)&0x03)<<0)
+#define MCF_GPIO_MSCR_FLEXBUS_MSCR_DLOWER(x)       (((x)&0x03)<<2)
+#define MCF_GPIO_MSCR_FLEXBUS_MSCR_DUPPER(x)       (((x)&0x03)<<4)
+/* Bit definitions and macros for MCF_GPIO_MSCR_SDRAM */
+#define MCF_GPIO_MSCR_SDRAM_MSCR_SDRAM(x)          (((x)&0x03)<<0)
+#define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLK(x)          (((x)&0x03)<<2)
+#define MCF_GPIO_MSCR_SDRAM_MSCR_SDCLKB(x)         (((x)&0x03)<<4)
+/* Bit definitions and macros for MCF_GPIO_DSCR_I2C */
+#define MCF_GPIO_DSCR_I2C_I2C_DSE(x)               (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_PWM */
+#define MCF_GPIO_DSCR_PWM_PWM_DSE(x)               (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_FEC */
+#define MCF_GPIO_DSCR_FEC_FEC_DSE(x)               (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_UART */
+#define MCF_GPIO_DSCR_UART_UART0_DSE(x)            (((x)&0x03)<<0)
+#define MCF_GPIO_DSCR_UART_UART1_DSE(x)            (((x)&0x03)<<2)
+/* Bit definitions and macros for MCF_GPIO_DSCR_QSPI */
+#define MCF_GPIO_DSCR_QSPI_QSPI_DSE(x)             (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_TIMER */
+#define MCF_GPIO_DSCR_TIMER_TIMER_DSE(x)           (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_SSI */
+#define MCF_GPIO_DSCR_SSI_SSI_DSE(x)               (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_LCD */
+#define MCF_GPIO_DSCR_LCD_LCD_DSE(x)               (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_DEBUG */
+#define MCF_GPIO_DSCR_DEBUG_DEBUG_DSE(x)           (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_CLKRST */
+#define MCF_GPIO_DSCR_CLKRST_CLKRST_DSE(x)         (((x)&0x03)<<0)
+/* Bit definitions and macros for MCF_GPIO_DSCR_IRQ */
+#define MCF_GPIO_DSCR_IRQ_IRQ_DSE(x)               (((x)&0x03)<<0)
+/*********************************************************************
+ *
+ * Interrupt Controller (INTC)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_INTC0_IPRH             MCF_REG32(0xFC048000)
+#define MCF_INTC0_IPRL             MCF_REG32(0xFC048004)
+#define MCF_INTC0_IMRH             MCF_REG32(0xFC048008)
+#define MCF_INTC0_IMRL             MCF_REG32(0xFC04800C)
+#define MCF_INTC0_INTFRCH          MCF_REG32(0xFC048010)
+#define MCF_INTC0_INTFRCL          MCF_REG32(0xFC048014)
+#define MCF_INTC0_ICONFIG          MCF_REG16(0xFC04801A)
+#define MCF_INTC0_SIMR             MCF_REG08(0xFC04801C)
+#define MCF_INTC0_CIMR             MCF_REG08(0xFC04801D)
+#define MCF_INTC0_CLMASK           MCF_REG08(0xFC04801E)
+#define MCF_INTC0_SLMASK           MCF_REG08(0xFC04801F)
+#define MCF_INTC0_ICR0             MCF_REG08(0xFC048040)
+#define MCF_INTC0_ICR1             MCF_REG08(0xFC048041)
+#define MCF_INTC0_ICR2             MCF_REG08(0xFC048042)
+#define MCF_INTC0_ICR3             MCF_REG08(0xFC048043)
+#define MCF_INTC0_ICR4             MCF_REG08(0xFC048044)
+#define MCF_INTC0_ICR5             MCF_REG08(0xFC048045)
+#define MCF_INTC0_ICR6             MCF_REG08(0xFC048046)
+#define MCF_INTC0_ICR7             MCF_REG08(0xFC048047)
+#define MCF_INTC0_ICR8             MCF_REG08(0xFC048048)
+#define MCF_INTC0_ICR9             MCF_REG08(0xFC048049)
+#define MCF_INTC0_ICR10            MCF_REG08(0xFC04804A)
+#define MCF_INTC0_ICR11            MCF_REG08(0xFC04804B)
+#define MCF_INTC0_ICR12            MCF_REG08(0xFC04804C)
+#define MCF_INTC0_ICR13            MCF_REG08(0xFC04804D)
+#define MCF_INTC0_ICR14            MCF_REG08(0xFC04804E)
+#define MCF_INTC0_ICR15            MCF_REG08(0xFC04804F)
+#define MCF_INTC0_ICR16            MCF_REG08(0xFC048050)
+#define MCF_INTC0_ICR17            MCF_REG08(0xFC048051)
+#define MCF_INTC0_ICR18            MCF_REG08(0xFC048052)
+#define MCF_INTC0_ICR19            MCF_REG08(0xFC048053)
+#define MCF_INTC0_ICR20            MCF_REG08(0xFC048054)
+#define MCF_INTC0_ICR21            MCF_REG08(0xFC048055)
+#define MCF_INTC0_ICR22            MCF_REG08(0xFC048056)
+#define MCF_INTC0_ICR23            MCF_REG08(0xFC048057)
+#define MCF_INTC0_ICR24            MCF_REG08(0xFC048058)
+#define MCF_INTC0_ICR25            MCF_REG08(0xFC048059)
+#define MCF_INTC0_ICR26            MCF_REG08(0xFC04805A)
+#define MCF_INTC0_ICR27            MCF_REG08(0xFC04805B)
+#define MCF_INTC0_ICR28            MCF_REG08(0xFC04805C)
+#define MCF_INTC0_ICR29            MCF_REG08(0xFC04805D)
+#define MCF_INTC0_ICR30            MCF_REG08(0xFC04805E)
+#define MCF_INTC0_ICR31            MCF_REG08(0xFC04805F)
+#define MCF_INTC0_ICR32            MCF_REG08(0xFC048060)
+#define MCF_INTC0_ICR33            MCF_REG08(0xFC048061)
+#define MCF_INTC0_ICR34            MCF_REG08(0xFC048062)
+#define MCF_INTC0_ICR35            MCF_REG08(0xFC048063)
+#define MCF_INTC0_ICR36            MCF_REG08(0xFC048064)
+#define MCF_INTC0_ICR37            MCF_REG08(0xFC048065)
+#define MCF_INTC0_ICR38            MCF_REG08(0xFC048066)
+#define MCF_INTC0_ICR39            MCF_REG08(0xFC048067)
+#define MCF_INTC0_ICR40            MCF_REG08(0xFC048068)
+#define MCF_INTC0_ICR41            MCF_REG08(0xFC048069)
+#define MCF_INTC0_ICR42            MCF_REG08(0xFC04806A)
+#define MCF_INTC0_ICR43            MCF_REG08(0xFC04806B)
+#define MCF_INTC0_ICR44            MCF_REG08(0xFC04806C)
+#define MCF_INTC0_ICR45            MCF_REG08(0xFC04806D)
+#define MCF_INTC0_ICR46            MCF_REG08(0xFC04806E)
+#define MCF_INTC0_ICR47            MCF_REG08(0xFC04806F)
+#define MCF_INTC0_ICR48            MCF_REG08(0xFC048070)
+#define MCF_INTC0_ICR49            MCF_REG08(0xFC048071)
+#define MCF_INTC0_ICR50            MCF_REG08(0xFC048072)
+#define MCF_INTC0_ICR51            MCF_REG08(0xFC048073)
+#define MCF_INTC0_ICR52            MCF_REG08(0xFC048074)
+#define MCF_INTC0_ICR53            MCF_REG08(0xFC048075)
+#define MCF_INTC0_ICR54            MCF_REG08(0xFC048076)
+#define MCF_INTC0_ICR55            MCF_REG08(0xFC048077)
+#define MCF_INTC0_ICR56            MCF_REG08(0xFC048078)
+#define MCF_INTC0_ICR57            MCF_REG08(0xFC048079)
+#define MCF_INTC0_ICR58            MCF_REG08(0xFC04807A)
+#define MCF_INTC0_ICR59            MCF_REG08(0xFC04807B)
+#define MCF_INTC0_ICR60            MCF_REG08(0xFC04807C)
+#define MCF_INTC0_ICR61            MCF_REG08(0xFC04807D)
+#define MCF_INTC0_ICR62            MCF_REG08(0xFC04807E)
+#define MCF_INTC0_ICR63            MCF_REG08(0xFC04807F)
+#define MCF_INTC0_ICR(x)           MCF_REG08(0xFC048040+((x)*0x001))
+#define MCF_INTC0_SWIACK           MCF_REG08(0xFC0480E0)
+#define MCF_INTC0_L1IACK           MCF_REG08(0xFC0480E4)
+#define MCF_INTC0_L2IACK           MCF_REG08(0xFC0480E8)
+#define MCF_INTC0_L3IACK           MCF_REG08(0xFC0480EC)
+#define MCF_INTC0_L4IACK           MCF_REG08(0xFC0480F0)
+#define MCF_INTC0_L5IACK           MCF_REG08(0xFC0480F4)
+#define MCF_INTC0_L6IACK           MCF_REG08(0xFC0480F8)
+#define MCF_INTC0_L7IACK           MCF_REG08(0xFC0480FC)
+#define MCF_INTC0_LIACK(x)         MCF_REG08(0xFC0480E4+((x)*0x004))
+#define MCF_INTC1_IPRH             MCF_REG32(0xFC04C000)
+#define MCF_INTC1_IPRL             MCF_REG32(0xFC04C004)
+#define MCF_INTC1_IMRH             MCF_REG32(0xFC04C008)
+#define MCF_INTC1_IMRL             MCF_REG32(0xFC04C00C)
+#define MCF_INTC1_INTFRCH          MCF_REG32(0xFC04C010)
+#define MCF_INTC1_INTFRCL          MCF_REG32(0xFC04C014)
+#define MCF_INTC1_ICONFIG          MCF_REG16(0xFC04C01A)
+#define MCF_INTC1_SIMR             MCF_REG08(0xFC04C01C)
+#define MCF_INTC1_CIMR             MCF_REG08(0xFC04C01D)
+#define MCF_INTC1_CLMASK           MCF_REG08(0xFC04C01E)
+#define MCF_INTC1_SLMASK           MCF_REG08(0xFC04C01F)
+#define MCF_INTC1_ICR0             MCF_REG08(0xFC04C040)
+#define MCF_INTC1_ICR1             MCF_REG08(0xFC04C041)
+#define MCF_INTC1_ICR2             MCF_REG08(0xFC04C042)
+#define MCF_INTC1_ICR3             MCF_REG08(0xFC04C043)
+#define MCF_INTC1_ICR4             MCF_REG08(0xFC04C044)
+#define MCF_INTC1_ICR5             MCF_REG08(0xFC04C045)
+#define MCF_INTC1_ICR6             MCF_REG08(0xFC04C046)
+#define MCF_INTC1_ICR7             MCF_REG08(0xFC04C047)
+#define MCF_INTC1_ICR8             MCF_REG08(0xFC04C048)
+#define MCF_INTC1_ICR9             MCF_REG08(0xFC04C049)
+#define MCF_INTC1_ICR10            MCF_REG08(0xFC04C04A)
+#define MCF_INTC1_ICR11            MCF_REG08(0xFC04C04B)
+#define MCF_INTC1_ICR12            MCF_REG08(0xFC04C04C)
+#define MCF_INTC1_ICR13            MCF_REG08(0xFC04C04D)
+#define MCF_INTC1_ICR14            MCF_REG08(0xFC04C04E)
+#define MCF_INTC1_ICR15            MCF_REG08(0xFC04C04F)
+#define MCF_INTC1_ICR16            MCF_REG08(0xFC04C050)
+#define MCF_INTC1_ICR17            MCF_REG08(0xFC04C051)
+#define MCF_INTC1_ICR18            MCF_REG08(0xFC04C052)
+#define MCF_INTC1_ICR19            MCF_REG08(0xFC04C053)
+#define MCF_INTC1_ICR20            MCF_REG08(0xFC04C054)
+#define MCF_INTC1_ICR21            MCF_REG08(0xFC04C055)
+#define MCF_INTC1_ICR22            MCF_REG08(0xFC04C056)
+#define MCF_INTC1_ICR23            MCF_REG08(0xFC04C057)
+#define MCF_INTC1_ICR24            MCF_REG08(0xFC04C058)
+#define MCF_INTC1_ICR25            MCF_REG08(0xFC04C059)
+#define MCF_INTC1_ICR26            MCF_REG08(0xFC04C05A)
+#define MCF_INTC1_ICR27            MCF_REG08(0xFC04C05B)
+#define MCF_INTC1_ICR28            MCF_REG08(0xFC04C05C)
+#define MCF_INTC1_ICR29            MCF_REG08(0xFC04C05D)
+#define MCF_INTC1_ICR30            MCF_REG08(0xFC04C05E)
+#define MCF_INTC1_ICR31            MCF_REG08(0xFC04C05F)
+#define MCF_INTC1_ICR32            MCF_REG08(0xFC04C060)
+#define MCF_INTC1_ICR33            MCF_REG08(0xFC04C061)
+#define MCF_INTC1_ICR34            MCF_REG08(0xFC04C062)
+#define MCF_INTC1_ICR35            MCF_REG08(0xFC04C063)
+#define MCF_INTC1_ICR36            MCF_REG08(0xFC04C064)
+#define MCF_INTC1_ICR37            MCF_REG08(0xFC04C065)
+#define MCF_INTC1_ICR38            MCF_REG08(0xFC04C066)
+#define MCF_INTC1_ICR39            MCF_REG08(0xFC04C067)
+#define MCF_INTC1_ICR40            MCF_REG08(0xFC04C068)
+#define MCF_INTC1_ICR41            MCF_REG08(0xFC04C069)
+#define MCF_INTC1_ICR42            MCF_REG08(0xFC04C06A)
+#define MCF_INTC1_ICR43            MCF_REG08(0xFC04C06B)
+#define MCF_INTC1_ICR44            MCF_REG08(0xFC04C06C)
+#define MCF_INTC1_ICR45            MCF_REG08(0xFC04C06D)
+#define MCF_INTC1_ICR46            MCF_REG08(0xFC04C06E)
+#define MCF_INTC1_ICR47            MCF_REG08(0xFC04C06F)
+#define MCF_INTC1_ICR48            MCF_REG08(0xFC04C070)
+#define MCF_INTC1_ICR49            MCF_REG08(0xFC04C071)
+#define MCF_INTC1_ICR50            MCF_REG08(0xFC04C072)
+#define MCF_INTC1_ICR51            MCF_REG08(0xFC04C073)
+#define MCF_INTC1_ICR52            MCF_REG08(0xFC04C074)
+#define MCF_INTC1_ICR53            MCF_REG08(0xFC04C075)
+#define MCF_INTC1_ICR54            MCF_REG08(0xFC04C076)
+#define MCF_INTC1_ICR55            MCF_REG08(0xFC04C077)
+#define MCF_INTC1_ICR56            MCF_REG08(0xFC04C078)
+#define MCF_INTC1_ICR57            MCF_REG08(0xFC04C079)
+#define MCF_INTC1_ICR58            MCF_REG08(0xFC04C07A)
+#define MCF_INTC1_ICR59            MCF_REG08(0xFC04C07B)
+#define MCF_INTC1_ICR60            MCF_REG08(0xFC04C07C)
+#define MCF_INTC1_ICR61            MCF_REG08(0xFC04C07D)
+#define MCF_INTC1_ICR62            MCF_REG08(0xFC04C07E)
+#define MCF_INTC1_ICR63            MCF_REG08(0xFC04C07F)
+#define MCF_INTC1_ICR(x)           MCF_REG08(0xFC04C040+((x)*0x001))
+#define MCF_INTC1_SWIACK           MCF_REG08(0xFC04C0E0)
+#define MCF_INTC1_L1IACK           MCF_REG08(0xFC04C0E4)
+#define MCF_INTC1_L2IACK           MCF_REG08(0xFC04C0E8)
+#define MCF_INTC1_L3IACK           MCF_REG08(0xFC04C0EC)
+#define MCF_INTC1_L4IACK           MCF_REG08(0xFC04C0F0)
+#define MCF_INTC1_L5IACK           MCF_REG08(0xFC04C0F4)
+#define MCF_INTC1_L6IACK           MCF_REG08(0xFC04C0F8)
+#define MCF_INTC1_L7IACK           MCF_REG08(0xFC04C0FC)
+#define MCF_INTC1_LIACK(x)         MCF_REG08(0xFC04C0E4+((x)*0x004))
+#define MCF_INTC_IPRH(x)           MCF_REG32(0xFC048000+((x)*0x4000))
+#define MCF_INTC_IPRL(x)           MCF_REG32(0xFC048004+((x)*0x4000))
+#define MCF_INTC_IMRH(x)           MCF_REG32(0xFC048008+((x)*0x4000))
+#define MCF_INTC_IMRL(x)           MCF_REG32(0xFC04800C+((x)*0x4000))
+#define MCF_INTC_INTFRCH(x)        MCF_REG32(0xFC048010+((x)*0x4000))
+#define MCF_INTC_INTFRCL(x)        MCF_REG32(0xFC048014+((x)*0x4000))
+#define MCF_INTC_ICONFIG(x)        MCF_REG16(0xFC04801A+((x)*0x4000))
+#define MCF_INTC_SIMR(x)           MCF_REG08(0xFC04801C+((x)*0x4000))
+#define MCF_INTC_CIMR(x)           MCF_REG08(0xFC04801D+((x)*0x4000))
+#define MCF_INTC_CLMASK(x)         MCF_REG08(0xFC04801E+((x)*0x4000))
+#define MCF_INTC_SLMASK(x)         MCF_REG08(0xFC04801F+((x)*0x4000))
+#define MCF_INTC_ICR0(x)           MCF_REG08(0xFC048040+((x)*0x4000))
+#define MCF_INTC_ICR1(x)           MCF_REG08(0xFC048041+((x)*0x4000))
+#define MCF_INTC_ICR2(x)           MCF_REG08(0xFC048042+((x)*0x4000))
+#define MCF_INTC_ICR3(x)           MCF_REG08(0xFC048043+((x)*0x4000))
+#define MCF_INTC_ICR4(x)           MCF_REG08(0xFC048044+((x)*0x4000))
+#define MCF_INTC_ICR5(x)           MCF_REG08(0xFC048045+((x)*0x4000))
+#define MCF_INTC_ICR6(x)           MCF_REG08(0xFC048046+((x)*0x4000))
+#define MCF_INTC_ICR7(x)           MCF_REG08(0xFC048047+((x)*0x4000))
+#define MCF_INTC_ICR8(x)           MCF_REG08(0xFC048048+((x)*0x4000))
+#define MCF_INTC_ICR9(x)           MCF_REG08(0xFC048049+((x)*0x4000))
+#define MCF_INTC_ICR10(x)          MCF_REG08(0xFC04804A+((x)*0x4000))
+#define MCF_INTC_ICR11(x)          MCF_REG08(0xFC04804B+((x)*0x4000))
+#define MCF_INTC_ICR12(x)          MCF_REG08(0xFC04804C+((x)*0x4000))
+#define MCF_INTC_ICR13(x)          MCF_REG08(0xFC04804D+((x)*0x4000))
+#define MCF_INTC_ICR14(x)          MCF_REG08(0xFC04804E+((x)*0x4000))
+#define MCF_INTC_ICR15(x)          MCF_REG08(0xFC04804F+((x)*0x4000))
+#define MCF_INTC_ICR16(x)          MCF_REG08(0xFC048050+((x)*0x4000))
+#define MCF_INTC_ICR17(x)          MCF_REG08(0xFC048051+((x)*0x4000))
+#define MCF_INTC_ICR18(x)          MCF_REG08(0xFC048052+((x)*0x4000))
+#define MCF_INTC_ICR19(x)          MCF_REG08(0xFC048053+((x)*0x4000))
+#define MCF_INTC_ICR20(x)          MCF_REG08(0xFC048054+((x)*0x4000))
+#define MCF_INTC_ICR21(x)          MCF_REG08(0xFC048055+((x)*0x4000))
+#define MCF_INTC_ICR22(x)          MCF_REG08(0xFC048056+((x)*0x4000))
+#define MCF_INTC_ICR23(x)          MCF_REG08(0xFC048057+((x)*0x4000))
+#define MCF_INTC_ICR24(x)          MCF_REG08(0xFC048058+((x)*0x4000))
+#define MCF_INTC_ICR25(x)          MCF_REG08(0xFC048059+((x)*0x4000))
+#define MCF_INTC_ICR26(x)          MCF_REG08(0xFC04805A+((x)*0x4000))
+#define MCF_INTC_ICR27(x)          MCF_REG08(0xFC04805B+((x)*0x4000))
+#define MCF_INTC_ICR28(x)          MCF_REG08(0xFC04805C+((x)*0x4000))
+#define MCF_INTC_ICR29(x)          MCF_REG08(0xFC04805D+((x)*0x4000))
+#define MCF_INTC_ICR30(x)          MCF_REG08(0xFC04805E+((x)*0x4000))
+#define MCF_INTC_ICR31(x)          MCF_REG08(0xFC04805F+((x)*0x4000))
+#define MCF_INTC_ICR32(x)          MCF_REG08(0xFC048060+((x)*0x4000))
+#define MCF_INTC_ICR33(x)          MCF_REG08(0xFC048061+((x)*0x4000))
+#define MCF_INTC_ICR34(x)          MCF_REG08(0xFC048062+((x)*0x4000))
+#define MCF_INTC_ICR35(x)          MCF_REG08(0xFC048063+((x)*0x4000))
+#define MCF_INTC_ICR36(x)          MCF_REG08(0xFC048064+((x)*0x4000))
+#define MCF_INTC_ICR37(x)          MCF_REG08(0xFC048065+((x)*0x4000))
+#define MCF_INTC_ICR38(x)          MCF_REG08(0xFC048066+((x)*0x4000))
+#define MCF_INTC_ICR39(x)          MCF_REG08(0xFC048067+((x)*0x4000))
+#define MCF_INTC_ICR40(x)          MCF_REG08(0xFC048068+((x)*0x4000))
+#define MCF_INTC_ICR41(x)          MCF_REG08(0xFC048069+((x)*0x4000))
+#define MCF_INTC_ICR42(x)          MCF_REG08(0xFC04806A+((x)*0x4000))
+#define MCF_INTC_ICR43(x)          MCF_REG08(0xFC04806B+((x)*0x4000))
+#define MCF_INTC_ICR44(x)          MCF_REG08(0xFC04806C+((x)*0x4000))
+#define MCF_INTC_ICR45(x)          MCF_REG08(0xFC04806D+((x)*0x4000))
+#define MCF_INTC_ICR46(x)          MCF_REG08(0xFC04806E+((x)*0x4000))
+#define MCF_INTC_ICR47(x)          MCF_REG08(0xFC04806F+((x)*0x4000))
+#define MCF_INTC_ICR48(x)          MCF_REG08(0xFC048070+((x)*0x4000))
+#define MCF_INTC_ICR49(x)          MCF_REG08(0xFC048071+((x)*0x4000))
+#define MCF_INTC_ICR50(x)          MCF_REG08(0xFC048072+((x)*0x4000))
+#define MCF_INTC_ICR51(x)          MCF_REG08(0xFC048073+((x)*0x4000))
+#define MCF_INTC_ICR52(x)          MCF_REG08(0xFC048074+((x)*0x4000))
+#define MCF_INTC_ICR53(x)          MCF_REG08(0xFC048075+((x)*0x4000))
+#define MCF_INTC_ICR54(x)          MCF_REG08(0xFC048076+((x)*0x4000))
+#define MCF_INTC_ICR55(x)          MCF_REG08(0xFC048077+((x)*0x4000))
+#define MCF_INTC_ICR56(x)          MCF_REG08(0xFC048078+((x)*0x4000))
+#define MCF_INTC_ICR57(x)          MCF_REG08(0xFC048079+((x)*0x4000))
+#define MCF_INTC_ICR58(x)          MCF_REG08(0xFC04807A+((x)*0x4000))
+#define MCF_INTC_ICR59(x)          MCF_REG08(0xFC04807B+((x)*0x4000))
+#define MCF_INTC_ICR60(x)          MCF_REG08(0xFC04807C+((x)*0x4000))
+#define MCF_INTC_ICR61(x)          MCF_REG08(0xFC04807D+((x)*0x4000))
+#define MCF_INTC_ICR62(x)          MCF_REG08(0xFC04807E+((x)*0x4000))
+#define MCF_INTC_ICR63(x)          MCF_REG08(0xFC04807F+((x)*0x4000))
+#define MCF_INTC_SWIACK(x)         MCF_REG08(0xFC0480E0+((x)*0x4000))
+#define MCF_INTC_L1IACK(x)         MCF_REG08(0xFC0480E4+((x)*0x4000))
+#define MCF_INTC_L2IACK(x)         MCF_REG08(0xFC0480E8+((x)*0x4000))
+#define MCF_INTC_L3IACK(x)         MCF_REG08(0xFC0480EC+((x)*0x4000))
+#define MCF_INTC_L4IACK(x)         MCF_REG08(0xFC0480F0+((x)*0x4000))
+#define MCF_INTC_L5IACK(x)         MCF_REG08(0xFC0480F4+((x)*0x4000))
+#define MCF_INTC_L6IACK(x)         MCF_REG08(0xFC0480F8+((x)*0x4000))
+#define MCF_INTC_L7IACK(x)         MCF_REG08(0xFC0480FC+((x)*0x4000))
+/* Bit definitions and macros for MCF_INTC_IPRH */
+#define MCF_INTC_IPRH_INT32        (0x00000001)
+#define MCF_INTC_IPRH_INT33        (0x00000002)
+#define MCF_INTC_IPRH_INT34        (0x00000004)
+#define MCF_INTC_IPRH_INT35        (0x00000008)
+#define MCF_INTC_IPRH_INT36        (0x00000010)
+#define MCF_INTC_IPRH_INT37        (0x00000020)
+#define MCF_INTC_IPRH_INT38        (0x00000040)
+#define MCF_INTC_IPRH_INT39        (0x00000080)
+#define MCF_INTC_IPRH_INT40        (0x00000100)
+#define MCF_INTC_IPRH_INT41        (0x00000200)
+#define MCF_INTC_IPRH_INT42        (0x00000400)
+#define MCF_INTC_IPRH_INT43        (0x00000800)
+#define MCF_INTC_IPRH_INT44        (0x00001000)
+#define MCF_INTC_IPRH_INT45        (0x00002000)
+#define MCF_INTC_IPRH_INT46        (0x00004000)
+#define MCF_INTC_IPRH_INT47        (0x00008000)
+#define MCF_INTC_IPRH_INT48        (0x00010000)
+#define MCF_INTC_IPRH_INT49        (0x00020000)
+#define MCF_INTC_IPRH_INT50        (0x00040000)
+#define MCF_INTC_IPRH_INT51        (0x00080000)
+#define MCF_INTC_IPRH_INT52        (0x00100000)
+#define MCF_INTC_IPRH_INT53        (0x00200000)
+#define MCF_INTC_IPRH_INT54        (0x00400000)
+#define MCF_INTC_IPRH_INT55        (0x00800000)
+#define MCF_INTC_IPRH_INT56        (0x01000000)
+#define MCF_INTC_IPRH_INT57        (0x02000000)
+#define MCF_INTC_IPRH_INT58        (0x04000000)
+#define MCF_INTC_IPRH_INT59        (0x08000000)
+#define MCF_INTC_IPRH_INT60        (0x10000000)
+#define MCF_INTC_IPRH_INT61        (0x20000000)
+#define MCF_INTC_IPRH_INT62        (0x40000000)
+#define MCF_INTC_IPRH_INT63        (0x80000000)
+/* Bit definitions and macros for MCF_INTC_IPRL */
+#define MCF_INTC_IPRL_INT0         (0x00000001)
+#define MCF_INTC_IPRL_INT1         (0x00000002)
+#define MCF_INTC_IPRL_INT2         (0x00000004)
+#define MCF_INTC_IPRL_INT3         (0x00000008)
+#define MCF_INTC_IPRL_INT4         (0x00000010)
+#define MCF_INTC_IPRL_INT5         (0x00000020)
+#define MCF_INTC_IPRL_INT6         (0x00000040)
+#define MCF_INTC_IPRL_INT7         (0x00000080)
+#define MCF_INTC_IPRL_INT8         (0x00000100)
+#define MCF_INTC_IPRL_INT9         (0x00000200)
+#define MCF_INTC_IPRL_INT10        (0x00000400)
+#define MCF_INTC_IPRL_INT11        (0x00000800)
+#define MCF_INTC_IPRL_INT12        (0x00001000)
+#define MCF_INTC_IPRL_INT13        (0x00002000)
+#define MCF_INTC_IPRL_INT14        (0x00004000)
+#define MCF_INTC_IPRL_INT15        (0x00008000)
+#define MCF_INTC_IPRL_INT16        (0x00010000)
+#define MCF_INTC_IPRL_INT17        (0x00020000)
+#define MCF_INTC_IPRL_INT18        (0x00040000)
+#define MCF_INTC_IPRL_INT19        (0x00080000)
+#define MCF_INTC_IPRL_INT20        (0x00100000)
+#define MCF_INTC_IPRL_INT21        (0x00200000)
+#define MCF_INTC_IPRL_INT22        (0x00400000)
+#define MCF_INTC_IPRL_INT23        (0x00800000)
+#define MCF_INTC_IPRL_INT24        (0x01000000)
+#define MCF_INTC_IPRL_INT25        (0x02000000)
+#define MCF_INTC_IPRL_INT26        (0x04000000)
+#define MCF_INTC_IPRL_INT27        (0x08000000)
+#define MCF_INTC_IPRL_INT28        (0x10000000)
+#define MCF_INTC_IPRL_INT29        (0x20000000)
+#define MCF_INTC_IPRL_INT30        (0x40000000)
+#define MCF_INTC_IPRL_INT31        (0x80000000)
+/* Bit definitions and macros for MCF_INTC_IMRH */
+#define MCF_INTC_IMRH_INT_MASK32   (0x00000001)
+#define MCF_INTC_IMRH_INT_MASK33   (0x00000002)
+#define MCF_INTC_IMRH_INT_MASK34   (0x00000004)
+#define MCF_INTC_IMRH_INT_MASK35   (0x00000008)
+#define MCF_INTC_IMRH_INT_MASK36   (0x00000010)
+#define MCF_INTC_IMRH_INT_MASK37   (0x00000020)
+#define MCF_INTC_IMRH_INT_MASK38   (0x00000040)
+#define MCF_INTC_IMRH_INT_MASK39   (0x00000080)
+#define MCF_INTC_IMRH_INT_MASK40   (0x00000100)
+#define MCF_INTC_IMRH_INT_MASK41   (0x00000200)
+#define MCF_INTC_IMRH_INT_MASK42   (0x00000400)
+#define MCF_INTC_IMRH_INT_MASK43   (0x00000800)
+#define MCF_INTC_IMRH_INT_MASK44   (0x00001000)
+#define MCF_INTC_IMRH_INT_MASK45   (0x00002000)
+#define MCF_INTC_IMRH_INT_MASK46   (0x00004000)
+#define MCF_INTC_IMRH_INT_MASK47   (0x00008000)
+#define MCF_INTC_IMRH_INT_MASK48   (0x00010000)
+#define MCF_INTC_IMRH_INT_MASK49   (0x00020000)
+#define MCF_INTC_IMRH_INT_MASK50   (0x00040000)
+#define MCF_INTC_IMRH_INT_MASK51   (0x00080000)
+#define MCF_INTC_IMRH_INT_MASK52   (0x00100000)
+#define MCF_INTC_IMRH_INT_MASK53   (0x00200000)
+#define MCF_INTC_IMRH_INT_MASK54   (0x00400000)
+#define MCF_INTC_IMRH_INT_MASK55   (0x00800000)
+#define MCF_INTC_IMRH_INT_MASK56   (0x01000000)
+#define MCF_INTC_IMRH_INT_MASK57   (0x02000000)
+#define MCF_INTC_IMRH_INT_MASK58   (0x04000000)
+#define MCF_INTC_IMRH_INT_MASK59   (0x08000000)
+#define MCF_INTC_IMRH_INT_MASK60   (0x10000000)
+#define MCF_INTC_IMRH_INT_MASK61   (0x20000000)
+#define MCF_INTC_IMRH_INT_MASK62   (0x40000000)
+#define MCF_INTC_IMRH_INT_MASK63   (0x80000000)
+/* Bit definitions and macros for MCF_INTC_IMRL */
+#define MCF_INTC_IMRL_INT_MASK0    (0x00000001)
+#define MCF_INTC_IMRL_INT_MASK1    (0x00000002)
+#define MCF_INTC_IMRL_INT_MASK2    (0x00000004)
+#define MCF_INTC_IMRL_INT_MASK3    (0x00000008)
+#define MCF_INTC_IMRL_INT_MASK4    (0x00000010)
+#define MCF_INTC_IMRL_INT_MASK5    (0x00000020)
+#define MCF_INTC_IMRL_INT_MASK6    (0x00000040)
+#define MCF_INTC_IMRL_INT_MASK7    (0x00000080)
+#define MCF_INTC_IMRL_INT_MASK8    (0x00000100)
+#define MCF_INTC_IMRL_INT_MASK9    (0x00000200)
+#define MCF_INTC_IMRL_INT_MASK10   (0x00000400)
+#define MCF_INTC_IMRL_INT_MASK11   (0x00000800)
+#define MCF_INTC_IMRL_INT_MASK12   (0x00001000)
+#define MCF_INTC_IMRL_INT_MASK13   (0x00002000)
+#define MCF_INTC_IMRL_INT_MASK14   (0x00004000)
+#define MCF_INTC_IMRL_INT_MASK15   (0x00008000)
+#define MCF_INTC_IMRL_INT_MASK16   (0x00010000)
+#define MCF_INTC_IMRL_INT_MASK17   (0x00020000)
+#define MCF_INTC_IMRL_INT_MASK18   (0x00040000)
+#define MCF_INTC_IMRL_INT_MASK19   (0x00080000)
+#define MCF_INTC_IMRL_INT_MASK20   (0x00100000)
+#define MCF_INTC_IMRL_INT_MASK21   (0x00200000)
+#define MCF_INTC_IMRL_INT_MASK22   (0x00400000)
+#define MCF_INTC_IMRL_INT_MASK23   (0x00800000)
+#define MCF_INTC_IMRL_INT_MASK24   (0x01000000)
+#define MCF_INTC_IMRL_INT_MASK25   (0x02000000)
+#define MCF_INTC_IMRL_INT_MASK26   (0x04000000)
+#define MCF_INTC_IMRL_INT_MASK27   (0x08000000)
+#define MCF_INTC_IMRL_INT_MASK28   (0x10000000)
+#define MCF_INTC_IMRL_INT_MASK29   (0x20000000)
+#define MCF_INTC_IMRL_INT_MASK30   (0x40000000)
+#define MCF_INTC_IMRL_INT_MASK31   (0x80000000)
+/* Bit definitions and macros for MCF_INTC_INTFRCH */
+#define MCF_INTC_INTFRCH_INTFRC32  (0x00000001)
+#define MCF_INTC_INTFRCH_INTFRC33  (0x00000002)
+#define MCF_INTC_INTFRCH_INTFRC34  (0x00000004)
+#define MCF_INTC_INTFRCH_INTFRC35  (0x00000008)
+#define MCF_INTC_INTFRCH_INTFRC36  (0x00000010)
+#define MCF_INTC_INTFRCH_INTFRC37  (0x00000020)
+#define MCF_INTC_INTFRCH_INTFRC38  (0x00000040)
+#define MCF_INTC_INTFRCH_INTFRC39  (0x00000080)
+#define MCF_INTC_INTFRCH_INTFRC40  (0x00000100)
+#define MCF_INTC_INTFRCH_INTFRC41  (0x00000200)
+#define MCF_INTC_INTFRCH_INTFRC42  (0x00000400)
+#define MCF_INTC_INTFRCH_INTFRC43  (0x00000800)
+#define MCF_INTC_INTFRCH_INTFRC44  (0x00001000)
+#define MCF_INTC_INTFRCH_INTFRC45  (0x00002000)
+#define MCF_INTC_INTFRCH_INTFRC46  (0x00004000)
+#define MCF_INTC_INTFRCH_INTFRC47  (0x00008000)
+#define MCF_INTC_INTFRCH_INTFRC48  (0x00010000)
+#define MCF_INTC_INTFRCH_INTFRC49  (0x00020000)
+#define MCF_INTC_INTFRCH_INTFRC50  (0x00040000)
+#define MCF_INTC_INTFRCH_INTFRC51  (0x00080000)
+#define MCF_INTC_INTFRCH_INTFRC52  (0x00100000)
+#define MCF_INTC_INTFRCH_INTFRC53  (0x00200000)
+#define MCF_INTC_INTFRCH_INTFRC54  (0x00400000)
+#define MCF_INTC_INTFRCH_INTFRC55  (0x00800000)
+#define MCF_INTC_INTFRCH_INTFRC56  (0x01000000)
+#define MCF_INTC_INTFRCH_INTFRC57  (0x02000000)
+#define MCF_INTC_INTFRCH_INTFRC58  (0x04000000)
+#define MCF_INTC_INTFRCH_INTFRC59  (0x08000000)
+#define MCF_INTC_INTFRCH_INTFRC60  (0x10000000)
+#define MCF_INTC_INTFRCH_INTFRC61  (0x20000000)
+#define MCF_INTC_INTFRCH_INTFRC62  (0x40000000)
+#define MCF_INTC_INTFRCH_INTFRC63  (0x80000000)
+/* Bit definitions and macros for MCF_INTC_INTFRCL */
+#define MCF_INTC_INTFRCL_INTFRC0   (0x00000001)
+#define MCF_INTC_INTFRCL_INTFRC1   (0x00000002)
+#define MCF_INTC_INTFRCL_INTFRC2   (0x00000004)
+#define MCF_INTC_INTFRCL_INTFRC3   (0x00000008)
+#define MCF_INTC_INTFRCL_INTFRC4   (0x00000010)
+#define MCF_INTC_INTFRCL_INTFRC5   (0x00000020)
+#define MCF_INTC_INTFRCL_INTFRC6   (0x00000040)
+#define MCF_INTC_INTFRCL_INTFRC7   (0x00000080)
+#define MCF_INTC_INTFRCL_INTFRC8   (0x00000100)
+#define MCF_INTC_INTFRCL_INTFRC9   (0x00000200)
+#define MCF_INTC_INTFRCL_INTFRC10  (0x00000400)
+#define MCF_INTC_INTFRCL_INTFRC11  (0x00000800)
+#define MCF_INTC_INTFRCL_INTFRC12  (0x00001000)
+#define MCF_INTC_INTFRCL_INTFRC13  (0x00002000)
+#define MCF_INTC_INTFRCL_INTFRC14  (0x00004000)
+#define MCF_INTC_INTFRCL_INTFRC15  (0x00008000)
+#define MCF_INTC_INTFRCL_INTFRC16  (0x00010000)
+#define MCF_INTC_INTFRCL_INTFRC17  (0x00020000)
+#define MCF_INTC_INTFRCL_INTFRC18  (0x00040000)
+#define MCF_INTC_INTFRCL_INTFRC19  (0x00080000)
+#define MCF_INTC_INTFRCL_INTFRC20  (0x00100000)
+#define MCF_INTC_INTFRCL_INTFRC21  (0x00200000)
+#define MCF_INTC_INTFRCL_INTFRC22  (0x00400000)
+#define MCF_INTC_INTFRCL_INTFRC23  (0x00800000)
+#define MCF_INTC_INTFRCL_INTFRC24  (0x01000000)
+#define MCF_INTC_INTFRCL_INTFRC25  (0x02000000)
+#define MCF_INTC_INTFRCL_INTFRC26  (0x04000000)
+#define MCF_INTC_INTFRCL_INTFRC27  (0x08000000)
+#define MCF_INTC_INTFRCL_INTFRC28  (0x10000000)
+#define MCF_INTC_INTFRCL_INTFRC29  (0x20000000)
+#define MCF_INTC_INTFRCL_INTFRC30  (0x40000000)
+#define MCF_INTC_INTFRCL_INTFRC31  (0x80000000)
+/* Bit definitions and macros for MCF_INTC_ICONFIG */
+#define MCF_INTC_ICONFIG_EMASK     (0x0020)
+#define MCF_INTC_ICONFIG_ELVLPRI1  (0x0200)
+#define MCF_INTC_ICONFIG_ELVLPRI2  (0x0400)
+#define MCF_INTC_ICONFIG_ELVLPRI3  (0x0800)
+#define MCF_INTC_ICONFIG_ELVLPRI4  (0x1000)
+#define MCF_INTC_ICONFIG_ELVLPRI5  (0x2000)
+#define MCF_INTC_ICONFIG_ELVLPRI6  (0x4000)
+#define MCF_INTC_ICONFIG_ELVLPRI7  (0x8000)
+/* Bit definitions and macros for MCF_INTC_SIMR */
+#define MCF_INTC_SIMR_SIMR(x)      (((x)&0x7F)<<0)
+/* Bit definitions and macros for MCF_INTC_CIMR */
+#define MCF_INTC_CIMR_CIMR(x)      (((x)&0x7F)<<0)
+/* Bit definitions and macros for MCF_INTC_CLMASK */
+#define MCF_INTC_CLMASK_CLMASK(x)  (((x)&0x0F)<<0)
+/* Bit definitions and macros for MCF_INTC_SLMASK */
+#define MCF_INTC_SLMASK_SLMASK(x)  (((x)&0x0F)<<0)
+/* Bit definitions and macros for MCF_INTC_ICR */
+#define MCF_INTC_ICR_IL(x)         (((x)&0x07)<<0)
+/* Bit definitions and macros for MCF_INTC_SWIACK */
+#define MCF_INTC_SWIACK_VECTOR(x)  (((x)&0xFF)<<0)
+/* Bit definitions and macros for MCF_INTC_LIACK */
+#define MCF_INTC_LIACK_VECTOR(x)   (((x)&0xFF)<<0)
+/********************************************************************/
+/*********************************************************************
+*
+* LCD Controller (LCDC)
+*
+*********************************************************************/
+/* Register read/write macros */
+#define MCF_LCDC_LSSAR                  MCF_REG32(0xFC0AC000)
+#define MCF_LCDC_LSR                    MCF_REG32(0xFC0AC004)
+#define MCF_LCDC_LVPWR                  MCF_REG32(0xFC0AC008)
+#define MCF_LCDC_LCPR                   MCF_REG32(0xFC0AC00C)
+#define MCF_LCDC_LCWHBR                 MCF_REG32(0xFC0AC010)
+#define MCF_LCDC_LCCMR                  MCF_REG32(0xFC0AC014)
+#define MCF_LCDC_LPCR                   MCF_REG32(0xFC0AC018)
+#define MCF_LCDC_LHCR                   MCF_REG32(0xFC0AC01C)
+#define MCF_LCDC_LVCR                   MCF_REG32(0xFC0AC020)
+#define MCF_LCDC_LPOR                   MCF_REG32(0xFC0AC024)
+#define MCF_LCDC_LSCR                   MCF_REG32(0xFC0AC028)
+#define MCF_LCDC_LPCCR                  MCF_REG32(0xFC0AC02C)
+#define MCF_LCDC_LDCR                   MCF_REG32(0xFC0AC030)
+#define MCF_LCDC_LRMCR                  MCF_REG32(0xFC0AC034)
+#define MCF_LCDC_LICR                   MCF_REG32(0xFC0AC038)
+#define MCF_LCDC_LIER                   MCF_REG32(0xFC0AC03C)
+#define MCF_LCDC_LISR                   MCF_REG32(0xFC0AC040)
+#define MCF_LCDC_LGWSAR                 MCF_REG32(0xFC0AC050)
+#define MCF_LCDC_LGWSR                  MCF_REG32(0xFC0AC054)
+#define MCF_LCDC_LGWVPWR                MCF_REG32(0xFC0AC058)
+#define MCF_LCDC_LGWPOR                 MCF_REG32(0xFC0AC05C)
+#define MCF_LCDC_LGWPR                  MCF_REG32(0xFC0AC060)
+#define MCF_LCDC_LGWCR                  MCF_REG32(0xFC0AC064)
+#define MCF_LCDC_LGWDCR                 MCF_REG32(0xFC0AC068)
+#define MCF_LCDC_BPLUT_BASE             MCF_REG32(0xFC0AC800)
+#define MCF_LCDC_GWLUT_BASE             MCF_REG32(0xFC0ACC00)
+/* Bit definitions and macros for MCF_LCDC_LSSAR */
+#define MCF_LCDC_LSSAR_SSA(x)           (((x)&0x3FFFFFFF)<<2)
+/* Bit definitions and macros for MCF_LCDC_LSR */
+#define MCF_LCDC_LSR_YMAX(x)            (((x)&0x000003FF)<<0)
+#define MCF_LCDC_LSR_XMAX(x)            (((x)&0x0000003F)<<20)
+/* Bit definitions and macros for MCF_LCDC_LVPWR */
+#define MCF_LCDC_LVPWR_VPW(x)           (((x)&0x000003FF)<<0)
+/* Bit definitions and macros for MCF_LCDC_LCPR */
+#define MCF_LCDC_LCPR_CYP(x)            (((x)&0x000003FF)<<0)
+#define MCF_LCDC_LCPR_CXP(x)            (((x)&0x000003FF)<<16)
+#define MCF_LCDC_LCPR_OP                (0x10000000)
+#define MCF_LCDC_LCPR_CC(x)             (((x)&0x00000003)<<30)
+#define MCF_LCDC_LCPR_CC_TRANSPARENT    (0x00000000)
+#define MCF_LCDC_LCPR_CC_OR             (0x40000000)
+#define MCF_LCDC_LCPR_CC_XOR            (0x80000000)
+#define MCF_LCDC_LCPR_CC_AND            (0xC0000000)
+#define MCF_LCDC_LCPR_OP_ON             (0x10000000)
+#define MCF_LCDC_LCPR_OP_OFF            (0x00000000)
+/* Bit definitions and macros for MCF_LCDC_LCWHBR */
+#define MCF_LCDC_LCWHBR_BD(x)           (((x)&0x000000FF)<<0)
+#define MCF_LCDC_LCWHBR_CH(x)           (((x)&0x0000001F)<<16)
+#define MCF_LCDC_LCWHBR_CW(x)           (((x)&0x0000001F)<<24)
+#define MCF_LCDC_LCWHBR_BK_EN           (0x80000000)
+#define MCF_LCDC_LCWHBR_BK_EN_ON        (0x80000000)
+#define MCF_LCDC_LCWHBR_BK_EN_OFF       (0x00000000)
+/* Bit definitions and macros for MCF_LCDC_LCCMR */
+#define MCF_LCDC_LCCMR_CUR_COL_B(x)     (((x)&0x0000003F)<<0)
+#define MCF_LCDC_LCCMR_CUR_COL_G(x)     (((x)&0x0000003F)<<6)
+#define MCF_LCDC_LCCMR_CUR_COL_R(x)     (((x)&0x0000003F)<<12)
+/* Bit definitions and macros for MCF_LCDC_LPCR */
+#define MCF_LCDC_LPCR_PCD(x)            (((x)&0x0000003F)<<0)
+#define MCF_LCDC_LPCR_SHARP             (0x00000040)
+#define MCF_LCDC_LPCR_SCLKSEL           (0x00000080)
+#define MCF_LCDC_LPCR_ACD(x)            (((x)&0x0000007F)<<8)
+#define MCF_LCDC_LPCR_ACDSEL            (0x00008000)
+#define MCF_LCDC_LPCR_REV_VS            (0x00010000)
+#define MCF_LCDC_LPCR_SWAP_SEL          (0x00020000)
+#define MCF_LCDC_LPCR_ENDSEL            (0x00040000)
+#define MCF_LCDC_LPCR_SCLKIDLE          (0x00080000)
+#define MCF_LCDC_LPCR_OEPOL             (0x00100000)
+#define MCF_LCDC_LPCR_CLKPOL            (0x00200000)
+#define MCF_LCDC_LPCR_LPPOL             (0x00400000)
+#define MCF_LCDC_LPCR_FLM               (0x00800000)
+#define MCF_LCDC_LPCR_PIXPOL            (0x01000000)
+#define MCF_LCDC_LPCR_BPIX(x)           (((x)&0x00000007)<<25)
+#define MCF_LCDC_LPCR_PBSIZ(x)          (((x)&0x00000003)<<28)
+#define MCF_LCDC_LPCR_COLOR             (0x40000000)
+#define MCF_LCDC_LPCR_TFT               (0x80000000)
+#define MCF_LCDC_LPCR_MODE_MONOCGROME   (0x00000000)
+#define MCF_LCDC_LPCR_MODE_CSTN         (0x40000000)
+#define MCF_LCDC_LPCR_MODE_TFT          (0xC0000000)
+#define MCF_LCDC_LPCR_PBSIZ_1           (0x00000000)
+#define MCF_LCDC_LPCR_PBSIZ_2           (0x10000000)
+#define MCF_LCDC_LPCR_PBSIZ_4           (0x20000000)
+#define MCF_LCDC_LPCR_PBSIZ_8           (0x30000000)
+#define MCF_LCDC_LPCR_BPIX_1bpp         (0x00000000)
+#define MCF_LCDC_LPCR_BPIX_2bpp         (0x02000000)
+#define MCF_LCDC_LPCR_BPIX_4bpp         (0x04000000)
+#define MCF_LCDC_LPCR_BPIX_8bpp         (0x06000000)
+#define MCF_LCDC_LPCR_BPIX_12bpp        (0x08000000)
+#define MCF_LCDC_LPCR_BPIX_16bpp        (0x0A000000)
+#define MCF_LCDC_LPCR_BPIX_18bpp        (0x0C000000)
+#define MCF_LCDC_LPCR_PANEL_TYPE(x)     (((x)&0x00000003)<<30) 
+/* Bit definitions and macros for MCF_LCDC_LHCR */
+#define MCF_LCDC_LHCR_H_WAIT_2(x)       (((x)&0x000000FF)<<0)
+#define MCF_LCDC_LHCR_H_WAIT_1(x)       (((x)&0x000000FF)<<8)
+#define MCF_LCDC_LHCR_H_WIDTH(x)        (((x)&0x0000003F)<<26)
+/* Bit definitions and macros for MCF_LCDC_LVCR */
+#define MCF_LCDC_LVCR_V_WAIT_2(x)       (((x)&0x000000FF)<<0)
+#define MCF_LCDC_LVCR_V_WAIT_1(x)       (((x)&0x000000FF)<<8)
+#define MCF_LCDC_LVCR_V_WIDTH(x)      (((x)&0x0000003F)<<26)
+/* Bit definitions and macros for MCF_LCDC_LPOR */
+#define MCF_LCDC_LPOR_POS(x)            (((x)&0x0000001F)<<0)
+/* Bit definitions and macros for MCF_LCDC_LPCCR */
+#define MCF_LCDC_LPCCR_PW(x)            (((x)&0x000000FF)<<0)
+#define MCF_LCDC_LPCCR_CC_EN            (0x00000100)
+#define MCF_LCDC_LPCCR_SCR(x)           (((x)&0x00000003)<<9)
+#define MCF_LCDC_LPCCR_LDMSK            (0x00008000)
+#define MCF_LCDC_LPCCR_CLS_HI_WIDTH(x)  (((x)&0x000001FF)<<16)
+#define MCF_LCDC_LPCCR_SCR_LINEPULSE    (0x00000000)
+#define MCF_LCDC_LPCCR_SCR_PIXELCLK     (0x00002000)
+#define MCF_LCDC_LPCCR_SCR_LCDCLOCK     (0x00004000)
+/* Bit definitions and macros for MCF_LCDC_LDCR */
+#define MCF_LCDC_LDCR_TM(x)             (((x)&0x0000001F)<<0)
+#define MCF_LCDC_LDCR_HM(x)             (((x)&0x0000001F)<<16)
+#define MCF_LCDC_LDCR_BURST             (0x80000000)
+/* Bit definitions and macros for MCF_LCDC_LRMCR */
+#define MCF_LCDC_LRMCR_SEL_REF          (0x00000001)
+/* Bit definitions and macros for MCF_LCDC_LICR */
+#define MCF_LCDC_LICR_INTCON            (0x00000001)
+#define MCF_LCDC_LICR_INTSYN            (0x00000004)
+#define MCF_LCDC_LICR_GW_INT_CON        (0x00000010)
+/* Bit definitions and macros for MCF_LCDC_LIER */
+#define MCF_LCDC_LIER_BOF_EN            (0x00000001)
+#define MCF_LCDC_LIER_EOF_EN            (0x00000002)
+#define MCF_LCDC_LIER_ERR_RES_EN        (0x00000004)
+#define MCF_LCDC_LIER_UDR_ERR_EN        (0x00000008)
+#define MCF_LCDC_LIER_GW_BOF_EN         (0x00000010)
+#define MCF_LCDC_LIER_GW_EOF_EN         (0x00000020)
+#define MCF_LCDC_LIER_GW_ERR_RES_EN     (0x00000040)
+#define MCF_LCDC_LIER_GW_UDR_ERR_EN     (0x00000080)
+/* Bit definitions and macros for MCF_LCDC_LISR */
+#define MCF_LCDC_LISR_BOF               (0x00000001)
+#define MCF_LCDC_LISR_EOF               (0x00000002)
+#define MCF_LCDC_LISR_ERR_RES           (0x00000004)
+#define MCF_LCDC_LISR_UDR_ERR           (0x00000008)
+#define MCF_LCDC_LISR_GW_BOF            (0x00000010)
+#define MCF_LCDC_LISR_GW_EOF            (0x00000020)
+#define MCF_LCDC_LISR_GW_ERR_RES        (0x00000040)
+#define MCF_LCDC_LISR_GW_UDR_ERR        (0x00000080)
+/* Bit definitions and macros for MCF_LCDC_LGWSAR */
+#define MCF_LCDC_LGWSAR_GWSA(x)         (((x)&0x3FFFFFFF)<<2)
+/* Bit definitions and macros for MCF_LCDC_LGWSR */
+#define MCF_LCDC_LGWSR_GWH(x)           (((x)&0x000003FF)<<0)
+#define MCF_LCDC_LGWSR_GWW(x)           (((x)&0x0000003F)<<20)
+/* Bit definitions and macros for MCF_LCDC_LGWVPWR */
+#define MCF_LCDC_LGWVPWR_GWVPW(x)       (((x)&0x000003FF)<<0)
+/* Bit definitions and macros for MCF_LCDC_LGWPOR */
+#define MCF_LCDC_LGWPOR_GWPO(x)         (((x)&0x0000001F)<<0)
+/* Bit definitions and macros for MCF_LCDC_LGWPR */
+#define MCF_LCDC_LGWPR_GWYP(x)          (((x)&0x000003FF)<<0)
+#define MCF_LCDC_LGWPR_GWXP(x)          (((x)&0x000003FF)<<16)
+/* Bit definitions and macros for MCF_LCDC_LGWCR */
+#define MCF_LCDC_LGWCR_GWCKB(x)         (((x)&0x0000003F)<<0)
+#define MCF_LCDC_LGWCR_GWCKG(x)         (((x)&0x0000003F)<<6)
+#define MCF_LCDC_LGWCR_GWCKR(x)         (((x)&0x0000003F)<<12)
+#define MCF_LCDC_LGWCR_GW_RVS           (0x00200000)
+#define MCF_LCDC_LGWCR_GWE              (0x00400000)
+#define MCF_LCDC_LGWCR_GWCKE            (0x00800000)
+#define MCF_LCDC_LGWCR_GWAV(x)          (((x)&0x000000FF)<<24)
+/* Bit definitions and macros for MCF_LCDC_LGWDCR */
+#define MCF_LCDC_LGWDCR_GWTM(x)         (((x)&0x0000001F)<<0)
+#define MCF_LCDC_LGWDCR_GWHM(x)         (((x)&0x0000001F)<<16)
+#define MCF_LCDC_LGWDCR_GWBT            (0x80000000)
+/* Bit definitions and macros for MCF_LCDC_LSCR */
+#define MCF_LCDC_LSCR_PS_RISE_DELAY(x)    (((x)&0x0000003F)<<26)
+#define MCF_LCDC_LSCR_CLS_RISE_DELAY(x)   (((x)&0x000000FF)<<16)
+#define MCF_LCDC_LSCR_REV_TOGGLE_DELAY(x) (((x)&0x0000000F)<<8)
+#define MCF_LCDC_LSCR_GRAY_2(x)                   (((x)&0x0000000F)<<4)
+#define MCF_LCDC_LSCR_GRAY_1(x)                   (((x)&0x0000000F)<<0)
+/* Bit definitions and macros for MCF_LCDC_BPLUT_BASE */
+#define MCF_LCDC_BPLUT_BASE_BASE(x)     (((x)&0xFFFFFFFF)<<0)
+/* Bit definitions and macros for MCF_LCDC_GWLUT_BASE */
+#define MCF_LCDC_GWLUT_BASE_BASE(x)     (((x)&0xFFFFFFFF)<<0)
+/*********************************************************************
+ *
+ * Phase Locked Loop (PLL)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_PLL_PODR              MCF_REG08(0xFC0C0000)
+#define MCF_PLL_PLLCR             MCF_REG08(0xFC0C0004)
+#define MCF_PLL_PMDR              MCF_REG08(0xFC0C0008)
+#define MCF_PLL_PFDR              MCF_REG08(0xFC0C000C)
+/* Bit definitions and macros for MCF_PLL_PODR */
+#define MCF_PLL_PODR_BUSDIV(x)    (((x)&0x0F)<<0)
+#define MCF_PLL_PODR_CPUDIV(x)    (((x)&0x0F)<<4)
+/* Bit definitions and macros for MCF_PLL_PLLCR */
+#define MCF_PLL_PLLCR_DITHDEV(x)  (((x)&0x07)<<0)
+#define MCF_PLL_PLLCR_DITHEN      (0x80)
+/* Bit definitions and macros for MCF_PLL_PMDR */
+#define MCF_PLL_PMDR_MODDIV(x)    (((x)&0xFF)<<0)
+/* Bit definitions and macros for MCF_PLL_PFDR */
+#define MCF_PLL_PFDR_MFD(x)       (((x)&0xFF)<<0)
+/*********************************************************************
+ *
+ * System Control Module Registers (SCM)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_SCM_MPR                     MCF_REG32(0xFC000000)
+#define MCF_SCM_PACRA                   MCF_REG32(0xFC000020)
+#define MCF_SCM_PACRB                   MCF_REG32(0xFC000024)
+#define MCF_SCM_PACRC                   MCF_REG32(0xFC000028)
+#define MCF_SCM_PACRD                   MCF_REG32(0xFC00002C)
+#define MCF_SCM_PACRE                   MCF_REG32(0xFC000040)
+#define MCF_SCM_PACRF                   MCF_REG32(0xFC000044)
+#define MCF_SCM_BCR                     MCF_REG32(0xFC040024)
+/*********************************************************************
+ *
+ * SDRAM Controller (SDRAMC)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_SDRAMC_SDMR                 MCF_REG32(0xFC0B8000)
+#define MCF_SDRAMC_SDCR                 MCF_REG32(0xFC0B8004)
+#define MCF_SDRAMC_SDCFG1               MCF_REG32(0xFC0B8008)
+#define MCF_SDRAMC_SDCFG2               MCF_REG32(0xFC0B800C)
+#define MCF_SDRAMC_LIMP_FIX             MCF_REG32(0xFC0B8080)
+#define MCF_SDRAMC_SDDS                 MCF_REG32(0xFC0B8100)
+#define MCF_SDRAMC_SDCS0                MCF_REG32(0xFC0B8110)
+#define MCF_SDRAMC_SDCS1                MCF_REG32(0xFC0B8114)
+#define MCF_SDRAMC_SDCS2                MCF_REG32(0xFC0B8118)
+#define MCF_SDRAMC_SDCS3                MCF_REG32(0xFC0B811C)
+#define MCF_SDRAMC_SDCS(x)              MCF_REG32(0xFC0B8110+((x)*0x004))
+/* Bit definitions and macros for MCF_SDRAMC_SDMR */
+#define MCF_SDRAMC_SDMR_CMD             (0x00010000)
+#define MCF_SDRAMC_SDMR_AD(x)           (((x)&0x00000FFF)<<18)
+#define MCF_SDRAMC_SDMR_BNKAD(x)        (((x)&0x00000003)<<30)
+#define MCF_SDRAMC_SDMR_BNKAD_LMR       (0x00000000)
+#define MCF_SDRAMC_SDMR_BNKAD_LEMR      (0x40000000)
+/* Bit definitions and macros for MCF_SDRAMC_SDCR */
+#define MCF_SDRAMC_SDCR_IPALL           (0x00000002)
+#define MCF_SDRAMC_SDCR_IREF            (0x00000004)
+#define MCF_SDRAMC_SDCR_DQS_OE(x)       (((x)&0x0000000F)<<8)
+#define MCF_SDRAMC_SDCR_PS(x)           (((x)&0x00000003)<<12)
+#define MCF_SDRAMC_SDCR_RCNT(x)         (((x)&0x0000003F)<<16)
+#define MCF_SDRAMC_SDCR_OE_RULE         (0x00400000)
+#define MCF_SDRAMC_SDCR_MUX(x)          (((x)&0x00000003)<<24)
+#define MCF_SDRAMC_SDCR_REF             (0x10000000)
+#define MCF_SDRAMC_SDCR_DDR             (0x20000000)
+#define MCF_SDRAMC_SDCR_CKE             (0x40000000)
+#define MCF_SDRAMC_SDCR_MODE_EN         (0x80000000)
+#define MCF_SDRAMC_SDCR_PS_16           (0x00002000)
+#define MCF_SDRAMC_SDCR_PS_32           (0x00000000)
+/* Bit definitions and macros for MCF_SDRAMC_SDCFG1 */
+#define MCF_SDRAMC_SDCFG1_WTLAT(x)      (((x)&0x00000007)<<4)
+#define MCF_SDRAMC_SDCFG1_REF2ACT(x)    (((x)&0x0000000F)<<8)
+#define MCF_SDRAMC_SDCFG1_PRE2ACT(x)    (((x)&0x00000007)<<12)
+#define MCF_SDRAMC_SDCFG1_ACT2RW(x)     (((x)&0x00000007)<<16)
+#define MCF_SDRAMC_SDCFG1_RDLAT(x)      (((x)&0x0000000F)<<20)
+#define MCF_SDRAMC_SDCFG1_SWT2RD(x)     (((x)&0x00000007)<<24)
+#define MCF_SDRAMC_SDCFG1_SRD2RW(x)     (((x)&0x0000000F)<<28)
+/* Bit definitions and macros for MCF_SDRAMC_SDCFG2 */
+#define MCF_SDRAMC_SDCFG2_BL(x)         (((x)&0x0000000F)<<16)
+#define MCF_SDRAMC_SDCFG2_BRD2WT(x)     (((x)&0x0000000F)<<20)
+#define MCF_SDRAMC_SDCFG2_BWT2RW(x)     (((x)&0x0000000F)<<24)
+#define MCF_SDRAMC_SDCFG2_BRD2PRE(x)    (((x)&0x0000000F)<<28)
+/* Device Errata - LIMP mode work around */
+#define MCF_SDRAMC_REFRESH              (0x40000000)
+/* Bit definitions and macros for MCF_SDRAMC_SDDS */
+#define MCF_SDRAMC_SDDS_SB_D(x)         (((x)&0x00000003)<<0)
+#define MCF_SDRAMC_SDDS_SB_S(x)         (((x)&0x00000003)<<2)
+#define MCF_SDRAMC_SDDS_SB_A(x)         (((x)&0x00000003)<<4)
+#define MCF_SDRAMC_SDDS_SB_C(x)         (((x)&0x00000003)<<6)
+#define MCF_SDRAMC_SDDS_SB_E(x)         (((x)&0x00000003)<<8)
+/* Bit definitions and macros for MCF_SDRAMC_SDCS */
+#define MCF_SDRAMC_SDCS_CSSZ(x)         (((x)&0x0000001F)<<0)
+#define MCF_SDRAMC_SDCS_BASE(x)         (((x)&0x00000FFF)<<20)
+#define MCF_SDRAMC_SDCS_BA(x)           ((x)&0xFFF00000)
+#define MCF_SDRAMC_SDCS_CSSZ_DIABLE     (0x00000000)
+#define MCF_SDRAMC_SDCS_CSSZ_1MBYTE     (0x00000013)
+#define MCF_SDRAMC_SDCS_CSSZ_2MBYTE     (0x00000014)
+#define MCF_SDRAMC_SDCS_CSSZ_4MBYTE     (0x00000015)
+#define MCF_SDRAMC_SDCS_CSSZ_8MBYTE     (0x00000016)
+#define MCF_SDRAMC_SDCS_CSSZ_16MBYTE    (0x00000017)
+#define MCF_SDRAMC_SDCS_CSSZ_32MBYTE    (0x00000018)
+#define MCF_SDRAMC_SDCS_CSSZ_64MBYTE    (0x00000019)
+#define MCF_SDRAMC_SDCS_CSSZ_128MBYTE   (0x0000001A)
+#define MCF_SDRAMC_SDCS_CSSZ_256MBYTE   (0x0000001B)
+#define MCF_SDRAMC_SDCS_CSSZ_512MBYTE   (0x0000001C)
+#define MCF_SDRAMC_SDCS_CSSZ_1GBYTE     (0x0000001D)
+#define MCF_SDRAMC_SDCS_CSSZ_2GBYTE     (0x0000001E)
+#define MCF_SDRAMC_SDCS_CSSZ_4GBYTE     (0x0000001F)
+/*********************************************************************
+ *
+ *      FlexCAN module registers
+ *
+ *********************************************************************/
+#define MCF_FLEXCAN_BASEADDR(x)         (0xFC020000+(x)*0x0800)
+#define MCF_FLEXCAN_CANMCR(x)           MCF_REG32(0xFC020000+(x)*0x0800+0x00)
+#define MCF_FLEXCAN_CANCTRL(x)          MCF_REG32(0xFC020000+(x)*0x0800+0x04)
+#define MCF_FLEXCAN_TIMER(x)            MCF_REG32(0xFC020000+(x)*0x0800+0x08)
+#define MCF_FLEXCAN_RXGMASK(x)          MCF_REG32(0xFC020000+(x)*0x0800+0x10)
+#define MCF_FLEXCAN_RX14MASK(x)         MCF_REG32(0xFC020000+(x)*0x0800+0x14)
+#define MCF_FLEXCAN_RX15MASK(x)         MCF_REG32(0xFC020000+(x)*0x0800+0x18)
+#define MCF_FLEXCAN_ERRCNT(x)           MCF_REG32(0xFC020000+(x)*0x0800+0x1C)
+#define MCF_FLEXCAN_ERRSTAT(x)          MCF_REG32(0xFC020000+(x)*0x0800+0x20)
+#define MCF_FLEXCAN_IMASK(x)            MCF_REG32(0xFC020000+(x)*0x0800+0x28)
+#define MCF_FLEXCAN_IFLAG(x)            MCF_REG32(0xFC020000+(x)*0x0800+0x30)
+#define MCF_FLEXCAN_MB_CNT(x,y)         MCF_REG32(0xFC020080+(x)*0x0800+(y)*0x10+0x0)
+#define MCF_FLEXCAN_MB_ID(x,y)          MCF_REG32(0xFC020080+(x)*0x0800+(y)*0x10+0x4)
+#define MCF_FLEXCAN_MB_DB(x,y,z)        MCF_REG08(0xFC020080+(x)*0x0800+(y)*0x10+0x8+(z)*0x1)
+/*
+ *      FlexCAN Module Configuration Register
+ */
+#define CANMCR_MDIS             (0x80000000)
+#define CANMCR_FRZ              (0x40000000)
+#define CANMCR_HALT             (0x10000000)
+#define CANMCR_SOFTRST          (0x02000000)
+#define CANMCR_FRZACK           (0x01000000)
+#define CANMCR_SUPV             (0x00800000)
+#define CANMCR_MAXMB(x)         ((x)&0x0F)
+/*
+ *      FlexCAN Control Register
+ */
+#define CANCTRL_PRESDIV(x)      (((x)&0xFF)<<24)
+#define CANCTRL_RJW(x)          (((x)&0x03)<<22)
+#define CANCTRL_PSEG1(x)        (((x)&0x07)<<19)
+#define CANCTRL_PSEG2(x)        (((x)&0x07)<<16)
+#define CANCTRL_BOFFMSK         (0x00008000)
+#define CANCTRL_ERRMSK          (0x00004000)
+#define CANCTRL_CLKSRC          (0x00002000)
+#define CANCTRL_LPB             (0x00001000)
+#define CANCTRL_SAMP            (0x00000080)
+#define CANCTRL_BOFFREC         (0x00000040)
+#define CANCTRL_TSYNC           (0x00000020)
+#define CANCTRL_LBUF            (0x00000010)
+#define CANCTRL_LOM             (0x00000008)
+#define CANCTRL_PROPSEG(x)      ((x)&0x07)
+/*
+ *      FlexCAN Error Counter Register
+ */
+#define ERRCNT_RXECTR(x)        (((x)&0xFF)<<8)
+#define ERRCNT_TXECTR(x)        ((x)&0xFF)
+/*
+ *      FlexCAN Error and Status Register
+ */
+#define ERRSTAT_BITERR(x)       (((x)&0x03)<<14)
+#define ERRSTAT_ACKERR           (0x00002000)
+#define ERRSTAT_CRCERR           (0x00001000)
+#define ERRSTAT_FRMERR           (0x00000800)
+#define ERRSTAT_STFERR           (0x00000400)
+#define ERRSTAT_TXWRN            (0x00000200)
+#define ERRSTAT_RXWRN            (0x00000100)
+#define ERRSTAT_IDLE             (0x00000080)
+#define ERRSTAT_TXRX             (0x00000040)
+#define ERRSTAT_FLTCONF(x)       (((x)&0x03)<<4)
+#define ERRSTAT_BOFFINT          (0x00000004)
+#define ERRSTAT_ERRINT           (0x00000002)
+/*
+ *      Interrupt Mask Register
+ */
+#define IMASK_BUF15M            (0x8000)
+#define IMASK_BUF14M            (0x4000)
+#define IMASK_BUF13M            (0x2000)
+#define IMASK_BUF12M            (0x1000)
+#define IMASK_BUF11M            (0x0800)
+#define IMASK_BUF10M            (0x0400)
+#define IMASK_BUF9M             (0x0200)
+#define IMASK_BUF8M             (0x0100)
+#define IMASK_BUF7M             (0x0080)
+#define IMASK_BUF6M             (0x0040)
+#define IMASK_BUF5M             (0x0020)
+#define IMASK_BUF4M             (0x0010)
+#define IMASK_BUF3M             (0x0008)
+#define IMASK_BUF2M             (0x0004)
+#define IMASK_BUF1M             (0x0002)
+#define IMASK_BUF0M             (0x0001)
+#define IMASK_BUFnM(x)          (0x1<<(x))
+#define IMASK_BUFF_ENABLE_ALL   (0x1111)
+#define IMASK_BUFF_DISABLE_ALL  (0x0000)
+/*
+ *      Interrupt Flag Register
+ */
+#define IFLAG_BUF15M            (0x8000)
+#define IFLAG_BUF14M            (0x4000)
+#define IFLAG_BUF13M            (0x2000)
+#define IFLAG_BUF12M            (0x1000)
+#define IFLAG_BUF11M            (0x0800)
+#define IFLAG_BUF10M            (0x0400)
+#define IFLAG_BUF9M             (0x0200)
+#define IFLAG_BUF8M             (0x0100)
+#define IFLAG_BUF7M             (0x0080)
+#define IFLAG_BUF6M             (0x0040)
+#define IFLAG_BUF5M             (0x0020)
+#define IFLAG_BUF4M             (0x0010)
+#define IFLAG_BUF3M             (0x0008)
+#define IFLAG_BUF2M             (0x0004)
+#define IFLAG_BUF1M             (0x0002)
+#define IFLAG_BUF0M             (0x0001)
+#define IFLAG_BUFF_SET_ALL      (0xFFFF)
+#define IFLAG_BUFF_CLEAR_ALL    (0x0000)
+#define IFLAG_BUFnM(x)          (0x1<<(x))
+/*
+ *      Message Buffers
+ */
+#define MB_CNT_CODE(x)          (((x)&0x0F)<<24)
+#define MB_CNT_SRR              (0x00400000)
+#define MB_CNT_IDE              (0x00200000)
+#define MB_CNT_RTR              (0x00100000)
+#define MB_CNT_LENGTH(x)        (((x)&0x0F)<<16)
+#define MB_CNT_TIMESTAMP(x)     ((x)&0xFFFF)
+#define MB_ID_STD(x)            (((x)&0x07FF)<<18)
+#define MB_ID_EXT(x)            ((x)&0x3FFFF)
+/*********************************************************************
+ *
+ * Edge Port Module (EPORT)
+ *
+ *********************************************************************/
+/* Register read/write macros */
+#define MCF_EPORT_EPPAR                MCF_REG16(0xFC094000)
+#define MCF_EPORT_EPDDR                MCF_REG08(0xFC094002)
+#define MCF_EPORT_EPIER                MCF_REG08(0xFC094003)
+#define MCF_EPORT_EPDR                 MCF_REG08(0xFC094004)
+#define MCF_EPORT_EPPDR                MCF_REG08(0xFC094005)
+#define MCF_EPORT_EPFR                 MCF_REG08(0xFC094006)
+/* Bit definitions and macros for MCF_EPORT_EPPAR */
+#define MCF_EPORT_EPPAR_EPPA1(x)       (((x)&0x0003)<<2)
+#define MCF_EPORT_EPPAR_EPPA2(x)       (((x)&0x0003)<<4)
+#define MCF_EPORT_EPPAR_EPPA3(x)       (((x)&0x0003)<<6)
+#define MCF_EPORT_EPPAR_EPPA4(x)       (((x)&0x0003)<<8)
+#define MCF_EPORT_EPPAR_EPPA5(x)       (((x)&0x0003)<<10)
+#define MCF_EPORT_EPPAR_EPPA6(x)       (((x)&0x0003)<<12)
+#define MCF_EPORT_EPPAR_EPPA7(x)       (((x)&0x0003)<<14)
+#define MCF_EPORT_EPPAR_LEVEL          (0)
+#define MCF_EPORT_EPPAR_RISING         (1)
+#define MCF_EPORT_EPPAR_FALLING        (2)
+#define MCF_EPORT_EPPAR_BOTH           (3)
+#define MCF_EPORT_EPPAR_EPPA7_LEVEL    (0x0000)
+#define MCF_EPORT_EPPAR_EPPA7_RISING   (0x4000)
+#define MCF_EPORT_EPPAR_EPPA7_FALLING  (0x8000)
+#define MCF_EPORT_EPPAR_EPPA7_BOTH     (0xC000)
+#define MCF_EPORT_EPPAR_EPPA6_LEVEL    (0x0000)
+#define MCF_EPORT_EPPAR_EPPA6_RISING   (0x1000)
+#define MCF_EPORT_EPPAR_EPPA6_FALLING  (0x2000)
+#define MCF_EPORT_EPPAR_EPPA6_BOTH     (0x3000)
+#define MCF_EPORT_EPPAR_EPPA5_LEVEL    (0x0000)
+#define MCF_EPORT_EPPAR_EPPA5_RISING   (0x0400)
+#define MCF_EPORT_EPPAR_EPPA5_FALLING  (0x0800)
+#define MCF_EPORT_EPPAR_EPPA5_BOTH     (0x0C00)
+#define MCF_EPORT_EPPAR_EPPA4_LEVEL    (0x0000)
+#define MCF_EPORT_EPPAR_EPPA4_RISING   (0x0100)
+#define MCF_EPORT_EPPAR_EPPA4_FALLING  (0x0200)
+#define MCF_EPORT_EPPAR_EPPA4_BOTH     (0x0300)
+#define MCF_EPORT_EPPAR_EPPA3_LEVEL    (0x0000)
+#define MCF_EPORT_EPPAR_EPPA3_RISING   (0x0040)
+#define MCF_EPORT_EPPAR_EPPA3_FALLING  (0x0080)
+#define MCF_EPORT_EPPAR_EPPA3_BOTH     (0x00C0)
+#define MCF_EPORT_EPPAR_EPPA2_LEVEL    (0x0000)
+#define MCF_EPORT_EPPAR_EPPA2_RISING   (0x0010)
+#define MCF_EPORT_EPPAR_EPPA2_FALLING  (0x0020)
+#define MCF_EPORT_EPPAR_EPPA2_BOTH     (0x0030)
+#define MCF_EPORT_EPPAR_EPPA1_LEVEL    (0x0000)
+#define MCF_EPORT_EPPAR_EPPA1_RISING   (0x0004)
+#define MCF_EPORT_EPPAR_EPPA1_FALLING  (0x0008)
+#define MCF_EPORT_EPPAR_EPPA1_BOTH     (0x000C)
+/* Bit definitions and macros for MCF_EPORT_EPDDR */
+#define MCF_EPORT_EPDDR_EPDD1          (0x02)
+#define MCF_EPORT_EPDDR_EPDD2          (0x04)
+#define MCF_EPORT_EPDDR_EPDD3          (0x08)
+#define MCF_EPORT_EPDDR_EPDD4          (0x10)
+#define MCF_EPORT_EPDDR_EPDD5          (0x20)
+#define MCF_EPORT_EPDDR_EPDD6          (0x40)
+#define MCF_EPORT_EPDDR_EPDD7          (0x80)
+/* Bit definitions and macros for MCF_EPORT_EPIER */
+#define MCF_EPORT_EPIER_EPIE1          (0x02)
+#define MCF_EPORT_EPIER_EPIE2          (0x04)
+#define MCF_EPORT_EPIER_EPIE3          (0x08)
+#define MCF_EPORT_EPIER_EPIE4          (0x10)
+#define MCF_EPORT_EPIER_EPIE5          (0x20)
+#define MCF_EPORT_EPIER_EPIE6          (0x40)
+#define MCF_EPORT_EPIER_EPIE7          (0x80)
+/* Bit definitions and macros for MCF_EPORT_EPDR */
+#define MCF_EPORT_EPDR_EPD1            (0x02)
+#define MCF_EPORT_EPDR_EPD2            (0x04)
+#define MCF_EPORT_EPDR_EPD3            (0x08)
+#define MCF_EPORT_EPDR_EPD4            (0x10)
+#define MCF_EPORT_EPDR_EPD5            (0x20)
+#define MCF_EPORT_EPDR_EPD6            (0x40)
+#define MCF_EPORT_EPDR_EPD7            (0x80)
+/* Bit definitions and macros for MCF_EPORT_EPPDR */
+#define MCF_EPORT_EPPDR_EPPD1          (0x02)
+#define MCF_EPORT_EPPDR_EPPD2          (0x04)
+#define MCF_EPORT_EPPDR_EPPD3          (0x08)
+#define MCF_EPORT_EPPDR_EPPD4          (0x10)
+#define MCF_EPORT_EPPDR_EPPD5          (0x20)
+#define MCF_EPORT_EPPDR_EPPD6          (0x40)
+#define MCF_EPORT_EPPDR_EPPD7          (0x80)
+/* Bit definitions and macros for MCF_EPORT_EPFR */
+#define MCF_EPORT_EPFR_EPF1            (0x02)
+#define MCF_EPORT_EPFR_EPF2            (0x04)
+#define MCF_EPORT_EPFR_EPF3            (0x08)
+#define MCF_EPORT_EPFR_EPF4            (0x10)
+#define MCF_EPORT_EPFR_EPF5            (0x20)
+#define MCF_EPORT_EPFR_EPF6            (0x40)
+#define MCF_EPORT_EPFR_EPF7            (0x80)
+/********************************************************************/
+#endif  /* m532xsim_h */
diff --git a/include/asm-m68knommu/mcfcache.h b/include/asm-m68knommu/mcfcache.h
index 45d1ac57ea..7b61a8a529 100644
--- a/include/asm-m68knommu/mcfcache.h
+++ b/include/asm-m68knommu/mcfcache.h
@@ -92,6 +92,21 @@
 .endm
 #endif /* CONFIG_M5249 || CONFIG_M5307 */
+#if defined(CONFIG_M532x)
+.macro CACHE_ENABLE
+        movel   #0x01000000,%d0         /* invalidate cache cmd */
+        movec   %d0,%CACR               /* do invalidate cache */
+        nop
+        movel   #0x4001C000,%d0         /* set SDRAM cached (write-thru) */
+        movec   %d0,%ACR0
+        movel   #0x00000000,%d0         /* no other regions cached */
+        movec   %d0,%ACR1
+        movel   #0x80000200,%d0         /* setup cache mask */
+        movec   %d0,%CACR               /* enable cache */
+        nop
+.endm
+#endif /* CONFIG_M532x */
 #if defined(CONFIG_M5407)
 /*
 *      Version 4 cores have a true harvard style separate instruction
diff --git a/include/asm-m68knommu/mcfpit.h b/include/asm-m68knommu/mcfpit.h
index 0d2672dd51..f570cf64fd 100644
--- a/include/asm-m68knommu/mcfpit.h
+++ b/include/asm-m68knommu/mcfpit.h
@@ -28,11 +28,9 @@
 /*
 *      Define the PIT timer register set addresses.
 */
-struct mcfpit {
+#define MCFPIT_PCSR             0x0             /* PIT control register */
-        unsigned short  pcsr;                   /* PIT control and status */
+#define MCFPIT_PMR              0x2             /* PIT modulus register */
-        unsigned short  pmr;                    /* PIT modulus register */
+#define MCFPIT_PCNTR            0x4             /* PIT count register */
-        unsigned short  pcntr;                  /* PIT count register */
-} __attribute__((packed));
 /*
 *      Bit definitions for the PIT Control and Status register.
diff --git a/include/asm-m68knommu/mcfsim.h b/include/asm-m68knommu/mcfsim.h
index 97a0c2734a..1074ae717f 100644
--- a/include/asm-m68knommu/mcfsim.h
+++ b/include/asm-m68knommu/mcfsim.h
@@ -35,6 +35,8 @@
 #include <asm/m528xsim.h>
 #elif defined(CONFIG_M5307)
 #include <asm/m5307sim.h>
+#elif defined(CONFIG_M532x)
+#include <asm/m532xsim.h>
 #elif defined(CONFIG_M5407)
 #include <asm/m5407sim.h>
 #endif
@@ -100,6 +102,7 @@
 #define MCFSIM_IMR_MASKALL      0x3ffe          /* All intr sources */
 #endif
 /*
 *      PIT interrupt settings, if not found in mXXXXsim.h file.
 */
diff --git a/include/asm-m68knommu/mcftimer.h b/include/asm-m68knommu/mcftimer.h
index 68bf33ac10..6f4d796e03 100644
--- a/include/asm-m68knommu/mcftimer.h
+++ b/include/asm-m68knommu/mcftimer.h
@@ -3,7 +3,7 @@
 /*
 *      mcftimer.h -- ColdFire internal TIMER support defines.
 *
- *      (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com)
+ *      (C) Copyright 1999-2006, Greg Ungerer <gerg@snapgear.com>
 *      (C) Copyright 2000, Lineo Inc. (www.lineo.com) 
 */
@@ -27,6 +27,11 @@
 #elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
 #define MCFTIMER_BASE1          0x140           /* Base address of TIMER1 */
 #define MCFTIMER_BASE2          0x180           /* Base address of TIMER2 */
+#elif defined(CONFIG_M532x)
+#define MCFTIMER_BASE1          0xfc070000      /* Base address of TIMER1 */
+#define MCFTIMER_BASE2          0xfc074000      /* Base address of TIMER2 */
+#define MCFTIMER_BASE3          0xfc078000      /* Base address of TIMER3 */
+#define MCFTIMER_BASE4          0xfc07c000      /* Base address of TIMER4 */
 #endif
@@ -34,23 +39,14 @@
 *      Define the TIMER register set addresses.
 */
 #define MCFTIMER_TMR            0x00            /* Timer Mode reg (r/w) */
-#define MCFTIMER_TRR            0x02            /* Timer Reference (r/w) */
+#define MCFTIMER_TRR            0x04            /* Timer Reference (r/w) */
-#define MCFTIMER_TCR            0x04            /* Timer Capture reg (r/w) */
+#define MCFTIMER_TCR            0x08            /* Timer Capture reg (r/w) */
-#define MCFTIMER_TCN            0x06            /* Timer Counter reg (r/w) */
+#define MCFTIMER_TCN            0x0C            /* Timer Counter reg (r/w) */
+#if defined(CONFIG_M532x)
+#define MCFTIMER_TER            0x03            /* Timer Event reg (r/w) */
+#else
 #define MCFTIMER_TER            0x11            /* Timer Event reg (r/w) */
+#endif
-struct mcftimer {
-        unsigned short  tmr;                    /* Timer Mode reg (r/w) */
-        unsigned short  reserved1;
-        unsigned short  trr;                    /* Timer Reference (r/w) */
-        unsigned short  reserved2;
-        unsigned short  tcr;                    /* Timer Capture reg (r/w) */
-        unsigned short  reserved3;
-        unsigned short  tcn;                    /* Timer Counter reg (r/w) */
-        unsigned short  reserved4;
-        unsigned char   reserved5;
-        unsigned char   ter;                    /* Timer Event reg (r/w) */
-} __attribute__((packed));
 /*
 *      Bit definitions for the Timer Mode Register (TMR).
diff --git a/include/asm-m68knommu/mcfuart.h b/include/asm-m68knommu/mcfuart.h
index 8040e43786..dc0146c525 100644
--- a/include/asm-m68knommu/mcfuart.h
+++ b/include/asm-m68knommu/mcfuart.h
@@ -44,6 +44,10 @@
 #define MCFUART_BASE1           0x60000         /* Base address of UART1 */
 #define MCFUART_BASE2           0x64000         /* Base address of UART2 */
 #define MCFUART_BASE3           0x68000         /* Base address of UART2 */
+#elif defined(CONFIG_M532x)
+#define MCFUART_BASE1           0xfc060000      /* Base address of UART1 */
+#define MCFUART_BASE2           0xfc064000      /* Base address of UART2 */
+#define MCFUART_BASE3           0xfc068000      /* Base address of UART3 */
 #endif
diff --git a/include/asm-m68knommu/page_offset.h b/include/asm-m68knommu/page_offset.h
index 8ed6d7b7d9..d4e73e0ba6 100644
--- a/include/asm-m68knommu/page_offset.h
+++ b/include/asm-m68knommu/page_offset.h
@@ -1,46 +1,5 @@
 /* This handles the memory map.. */
+#define PAGE_OFFSET_RAW         CONFIG_RAMBASE
-#ifdef CONFIG_COLDFIRE
-#if defined(CONFIG_SMALL)
-#define PAGE_OFFSET_RAW         0x30020000
-#elif defined(CONFIG_CFV240)
-#define PAGE_OFFSET_RAW         0x02000000
-#else
-#define PAGE_OFFSET_RAW         0x00000000
-#endif
-#endif
-#ifdef CONFIG_M68360
-#define PAGE_OFFSET_RAW     0x00000000
-#endif
-#ifdef CONFIG_PILOT
-#ifdef CONFIG_M68328
-#define PAGE_OFFSET_RAW         0x10000000
-#endif
-#ifdef CONFIG_M68EZ328
-#define PAGE_OFFSET_RAW         0x00000000
-#endif
-#endif
-#ifdef CONFIG_UCSIMM
-#define PAGE_OFFSET_RAW         0x00000000
-#endif
-#if defined(CONFIG_UCDIMM) || defined(CONFIG_DRAGEN2)
-#ifdef CONFIG_M68VZ328 
-#define PAGE_OFFSET_RAW         0x00000000
-#endif /* CONFIG_M68VZ328 */
-#endif /* CONFIG_UCDIMM */
-#ifdef CONFIG_M68EZ328ADS
-#define PAGE_OFFSET_RAW         0x00000000
-#endif
-#ifdef CONFIG_ALMA_ANS
-#define PAGE_OFFSET_RAW         0x00000000
-#endif
-#ifdef CONFIG_M68EN302
-#define PAGE_OFFSET_RAW         0x00000000
-#endif
diff --git a/include/asm-m68knommu/processor.h b/include/asm-m68knommu/processor.h
index 278b00bc60..0ee158e09a 100644
--- a/include/asm-m68knommu/processor.h
+++ b/include/asm-m68knommu/processor.h
@@ -78,19 +78,31 @@ struct thread_struct {
 }
 /*
+ * Coldfire stacks need to be re-aligned on trap exit, conventional
+ * 68k can handle this case cleanly.
+ */
+#if defined(CONFIG_COLDFIRE)
+#define reformat(_regs)         do { (_regs)->format = 0x4; } while(0)
+#else
+#define reformat(_regs)         do { } while (0)
+#endif
+/*
 * Do necessary setup to start up a newly executed thread.
 *
 * pass the data segment into user programs if it exists,
 * it can't hurt anything as far as I can tell
 */
-#define start_thread(_regs, _pc, _usp)           \
+#define start_thread(_regs, _pc, _usp)                  \
-do {                                             \
+do {                                                    \
-        set_fs(USER_DS); /* reads from user space */ \
+        set_fs(USER_DS); /* reads from user space */    \
-        (_regs)->pc = (_pc);                         \
+        (_regs)->pc = (_pc);                            \
-        if (current->mm)                             \
+        ((struct switch_stack *)(_regs))[-1].a6 = 0;    \
-                (_regs)->d5 = current->mm->start_data;   \
+        reformat(_regs);                                \
-        (_regs)->sr &= ~0x2000;                      \
+        if (current->mm)                                \
-        wrusp(_usp);                                 \
+                (_regs)->d5 = current->mm->start_data;  \
+        (_regs)->sr &= ~0x2000;                         \
+        wrusp(_usp);                                    \
 } while(0)
 /* Forward declaration, a strange C thing */
diff --git a/include/asm-m68knommu/ptrace.h b/include/asm-m68knommu/ptrace.h
index 1e19c457de..47258e86e8 100644
--- a/include/asm-m68knommu/ptrace.h
+++ b/include/asm-m68knommu/ptrace.h
@@ -46,11 +46,9 @@ struct pt_regs {
 #else
  unsigned short sr;
  unsigned long  pc;
-#ifndef NO_FORMAT_VEC
  unsigned format :  4; /* frame format specifier */
  unsigned vector : 12; /* vector offset */
 #endif
-#endif
 };
 /*
diff --git a/include/asm-mips/hw_irq.h b/include/asm-mips/hw_irq.h
index c854d017c0..458d9fdc76 100644
--- a/include/asm-mips/hw_irq.h
+++ b/include/asm-mips/hw_irq.h
@@ -19,9 +19,9 @@ extern void init_8259A(int aeoi);
 extern atomic_t irq_err_count;
-/* This may not be apropriate for all machines, we'll see ...  */
+/*
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
+ * interrupt-retrigger: NOP for now. This may not be apropriate for all
-{
+ * machines, we'll see ...
-}
+ */
 #endif /* __ASM_HW_IRQ_H */
diff --git a/include/asm-mips/mach-mips/irq.h b/include/asm-mips/mach-mips/irq.h
index 083d9c512a..e994b0c012 100644
--- a/include/asm-mips/mach-mips/irq.h
+++ b/include/asm-mips/mach-mips/irq.h
@@ -4,10 +4,4 @@
 #define NR_IRQS 256
-#ifdef CONFIG_SMP
-#define ARCH_HAS_IRQ_PER_CPU
-#endif
 #endif /* __ASM_MACH_MIPS_IRQ_H */
diff --git a/include/asm-parisc/hw_irq.h b/include/asm-parisc/hw_irq.h
index 151426e275..6707f7df39 100644
--- a/include/asm-parisc/hw_irq.h
+++ b/include/asm-parisc/hw_irq.h
@@ -3,15 +3,6 @@
 /*
 *      linux/include/asm/hw_irq.h
- *
- *      (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
- *
- *      moved some of the old arch/i386/kernel/irq.h to here. VY
- *
- *      IRQ/IPI changes taken from work by Thomas Radke
- *      <tomsoft@informatik.tu-chemnitz.de>
 */
-extern void hw_resend_irq(struct hw_interrupt_type *, unsigned int);
 #endif
diff --git a/include/asm-parisc/irq.h b/include/asm-parisc/irq.h
index 377ba90c7d..5cae260615 100644
--- a/include/asm-parisc/irq.h
+++ b/include/asm-parisc/irq.h
@@ -26,11 +26,6 @@
 #define NR_IRQS         (CPU_IRQ_MAX + 1)
-/*
- * IRQ line status macro IRQ_PER_CPU is used
- */
-#define ARCH_HAS_IRQ_PER_CPU
 static __inline__ int irq_canonicalize(int irq)
 {
        return (irq == 2) ? 9 : irq;
diff --git a/include/asm-powerpc/hw_irq.h b/include/asm-powerpc/hw_irq.h
index ce0f7db63c..d40359204a 100644
--- a/include/asm-powerpc/hw_irq.h
+++ b/include/asm-powerpc/hw_irq.h
@@ -86,27 +86,27 @@ static inline void local_irq_save_ptr(unsigned long *flags)
 #define mask_irq(irq)                                           \
        ({                                                      \
                irq_desc_t *desc = get_irq_desc(irq);           \
-                if (desc->handler && desc->handler->disable)    \
+                if (desc->chip && desc->chip->disable)  \
-                        desc->handler->disable(irq);            \
+                        desc->chip->disable(irq);               \
        })
 #define unmask_irq(irq)                                         \
        ({                                                      \
                irq_desc_t *desc = get_irq_desc(irq);           \
-                if (desc->handler && desc->handler->enable)     \
+                if (desc->chip && desc->chip->enable)   \
-                        desc->handler->enable(irq);             \
+                        desc->chip->enable(irq);                \
        })
 #define ack_irq(irq)                                            \
        ({                                                      \
                irq_desc_t *desc = get_irq_desc(irq);           \
-                if (desc->handler && desc->handler->ack)        \
+                if (desc->chip && desc->chip->ack)      \
-                        desc->handler->ack(irq);                \
+                        desc->chip->ack(irq);           \
        })
-/* Should we handle this via lost interrupts and IPIs or should we don't care like
+/*
- * we do now ? --BenH.
+ * interrupt-retrigger: should we handle this via lost interrupts and IPIs
+ * or should we not care like we do now ? --BenH.
 */
 struct hw_interrupt_type;
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
 #endif  /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/include/asm-powerpc/irq.h b/include/asm-powerpc/irq.h
index a10feec29d..eb5f33e197 100644
--- a/include/asm-powerpc/irq.h
+++ b/include/asm-powerpc/irq.h
@@ -30,11 +30,6 @@
 #define IRQ_POLARITY_POSITIVE   0x2     /* high level or low->high edge */
 #define IRQ_POLARITY_NEGATIVE   0x0     /* low level or high->low edge */
-/*
- * IRQ line status macro IRQ_PER_CPU is used
- */
-#define ARCH_HAS_IRQ_PER_CPU
 #define get_irq_desc(irq) (&irq_desc[(irq)])
 /* Define a way to iterate across irqs. */
diff --git a/include/asm-powerpc/kdebug.h b/include/asm-powerpc/kdebug.h
index c01786ab5f..532bfee934 100644
--- a/include/asm-powerpc/kdebug.h
+++ b/include/asm-powerpc/kdebug.h
@@ -18,6 +18,8 @@ struct die_args {
 extern int register_die_notifier(struct notifier_block *);
 extern int unregister_die_notifier(struct notifier_block *);
+extern int register_page_fault_notifier(struct notifier_block *);
+extern int unregister_page_fault_notifier(struct notifier_block *);
 extern struct atomic_notifier_head powerpc_die_chain;
 /* Grossly misnamed. */
diff --git a/include/asm-powerpc/kprobes.h b/include/asm-powerpc/kprobes.h
index f466bc804f..2d0af52c82 100644
--- a/include/asm-powerpc/kprobes.h
+++ b/include/asm-powerpc/kprobes.h
@@ -50,6 +50,8 @@ typedef unsigned int kprobe_opcode_t;
                        IS_TWI(instr) || IS_TDI(instr))
 #define ARCH_SUPPORTS_KRETPROBES
+#define  ARCH_INACTIVE_KPROBE_COUNT 1
 void kretprobe_trampoline(void);
 extern void arch_remove_kprobe(struct kprobe *p);
diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h
index 5d2c9e6c4b..46afd29b90 100644
--- a/include/asm-powerpc/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -242,7 +242,7 @@ extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
                                 const struct resource *rsrc,
-                                 u64 *start, u64 *end);
+                                 resource_size_t *start, resource_size_t *end);
 #endif /* CONFIG_PPC_MULTIPLATFORM || CONFIG_PPC32 */
 #endif  /* __KERNEL__ */
diff --git a/include/asm-powerpc/topology.h b/include/asm-powerpc/topology.h
index 92f3e5507d..bbc3844b08 100644
--- a/include/asm-powerpc/topology.h
+++ b/include/asm-powerpc/topology.h
@@ -93,5 +93,10 @@ static inline void sysfs_remove_device_from_node(struct sys_device *dev,
 #endif /* CONFIG_NUMA */
+#ifdef CONFIG_SMP
+#include <asm/cputable.h>
+#define smt_capable()           (cpu_has_feature(CPU_FTR_SMT))
+#endif
 #endif /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_TOPOLOGY_H */
diff --git a/include/asm-ppc/pci.h b/include/asm-ppc/pci.h
index 61434edbad..11ffaaa5da 100644
--- a/include/asm-ppc/pci.h
+++ b/include/asm-ppc/pci.h
@@ -133,7 +133,7 @@ extern pgprot_t	pci_phys_mem_access_prot(struct file *file,
 #define HAVE_ARCH_PCI_RESOURCE_TO_USER
 extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
                                 const struct resource *rsrc,
-                                 u64 *start, u64 *end);
+                                 resource_size_t *start, resource_size_t *end);
 #endif  /* __KERNEL__ */
diff --git a/include/asm-s390/bitops.h b/include/asm-s390/bitops.h
index 4d2b126ba1..0ddcdba79e 100644
--- a/include/asm-s390/bitops.h
+++ b/include/asm-s390/bitops.h
@@ -12,6 +12,9 @@
 *    Copyright (C) 1992, Linus Torvalds
 *
 */
+#ifdef __KERNEL__
 #include <linux/compiler.h>
 /*
@@ -50,19 +53,6 @@
 * with operation of the form "set_bit(bitnr, flags)".
 */
-/* set ALIGN_CS to 1 if the SMP safe bit operations should
- * align the address to 4 byte boundary. It seems to work
- * without the alignment. 
- */
-#ifdef __KERNEL__
-#define ALIGN_CS 0
-#else
-#define ALIGN_CS 1
-#ifndef CONFIG_SMP
-#error "bitops won't work without CONFIG_SMP"
-#endif
-#endif
 /* bitmap tables from arch/S390/kernel/bitmap.S */
 extern const char _oi_bitmap[];
 extern const char _ni_bitmap[];
@@ -121,10 +111,6 @@ static inline void set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
        unsigned long addr, old, new, mask;
        addr = (unsigned long) ptr;
-#if ALIGN_CS == 1
-        nr += (addr & __BITOPS_ALIGN) << 3;    /* add alignment to bit number */
-        addr ^= addr & __BITOPS_ALIGN;         /* align address to 8 */
-#endif
        /* calculate address for CS */
        addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
        /* make OR mask */
@@ -141,10 +127,6 @@ static inline void clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
        unsigned long addr, old, new, mask;
        addr = (unsigned long) ptr;
-#if ALIGN_CS == 1
-        nr += (addr & __BITOPS_ALIGN) << 3;    /* add alignment to bit number */
-        addr ^= addr & __BITOPS_ALIGN;         /* align address to 8 */
-#endif
        /* calculate address for CS */
        addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
        /* make AND mask */
@@ -161,10 +143,6 @@ static inline void change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
        unsigned long addr, old, new, mask;
        addr = (unsigned long) ptr;
-#if ALIGN_CS == 1
-        nr += (addr & __BITOPS_ALIGN) << 3;    /* add alignment to bit number */
-        addr ^= addr & __BITOPS_ALIGN;         /* align address to 8 */
-#endif
        /* calculate address for CS */
        addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
        /* make XOR mask */
@@ -182,10 +160,6 @@ test_and_set_bit_cs(unsigned long nr, volatile unsigned long *ptr)
        unsigned long addr, old, new, mask;
        addr = (unsigned long) ptr;
-#if ALIGN_CS == 1
-        nr += (addr & __BITOPS_ALIGN) << 3;    /* add alignment to bit number */
-        addr ^= addr & __BITOPS_ALIGN;         /* align address to 8 */
-#endif
        /* calculate address for CS */
        addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
        /* make OR/test mask */
@@ -205,10 +179,6 @@ test_and_clear_bit_cs(unsigned long nr, volatile unsigned long *ptr)
        unsigned long addr, old, new, mask;
        addr = (unsigned long) ptr;
-#if ALIGN_CS == 1
-        nr += (addr & __BITOPS_ALIGN) << 3;    /* add alignment to bit number */
-        addr ^= addr & __BITOPS_ALIGN;         /* align address to 8 */
-#endif
        /* calculate address for CS */
        addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
        /* make AND/test mask */
@@ -228,10 +198,6 @@ test_and_change_bit_cs(unsigned long nr, volatile unsigned long *ptr)
        unsigned long addr, old, new, mask;
        addr = (unsigned long) ptr;
-#if ALIGN_CS == 1
-        nr += (addr & __BITOPS_ALIGN) << 3;  /* add alignment to bit number */
-        addr ^= addr & __BITOPS_ALIGN;       /* align address to 8 */
-#endif
        /* calculate address for CS */
        addr += (nr ^ (nr & (__BITOPS_WORDSIZE - 1))) >> 3;
        /* make XOR/test mask */
@@ -834,8 +800,6 @@ static inline int sched_find_first_bit(unsigned long *b)
 #include <asm-generic/bitops/hweight.h>
-#ifdef __KERNEL__
 /*
 * ATTENTION: intel byte ordering convention for ext2 and minix !!
 * bit 0 is the LSB of addr; bit 31 is the MSB of addr;
diff --git a/include/asm-s390/cio.h b/include/asm-s390/cio.h
index 089cf567c3..2b16193063 100644
--- a/include/asm-s390/cio.h
+++ b/include/asm-s390/cio.h
@@ -276,6 +276,8 @@ extern void wait_cons_dev(void);
 extern void clear_all_subchannels(void);
+extern void css_schedule_reprobe(void);
 #endif
 #endif
diff --git a/include/asm-s390/cmb.h b/include/asm-s390/cmb.h
index 2d09950a9c..241756f80d 100644
--- a/include/asm-s390/cmb.h
+++ b/include/asm-s390/cmb.h
@@ -44,10 +44,6 @@ struct cmbdata {
 #define BIODASDCMFENABLE        _IO(DASD_IOCTL_LETTER,32)
 /* enable channel measurement */
 #define BIODASDCMFDISABLE       _IO(DASD_IOCTL_LETTER,33)
-/* reset channel measurement block */
-#define BIODASDRESETCMB         _IO(DASD_IOCTL_LETTER,34)
-/* read channel measurement data */
-#define BIODASDREADCMB          _IOWR(DASD_IOCTL_LETTER,32,__u64)
 /* read channel measurement data */
 #define BIODASDREADALLCMB       _IOWR(DASD_IOCTL_LETTER,33,struct cmbdata)
diff --git a/include/asm-s390/dasd.h b/include/asm-s390/dasd.h
index 1630c26e8f..c042f95780 100644
--- a/include/asm-s390/dasd.h
+++ b/include/asm-s390/dasd.h
@@ -68,10 +68,12 @@ typedef struct dasd_information2_t {
 * 0x00: default features
 * 0x01: readonly (ro)
 * 0x02: use diag discipline (diag)
+ * 0x04: set the device initially online (internal use only)
 */
-#define DASD_FEATURE_DEFAULT  0
+#define DASD_FEATURE_DEFAULT         0x00
-#define DASD_FEATURE_READONLY 1
+#define DASD_FEATURE_READONLY        0x01
-#define DASD_FEATURE_USEDIAG  2
+#define DASD_FEATURE_USEDIAG         0x02
+#define DASD_FEATURE_INITIAL_ONLINE  0x04
 #define DASD_PARTN_BITS 2
diff --git a/include/asm-s390/thread_info.h b/include/asm-s390/thread_info.h
index 8e0c7ed73d..0a518915bf 100644
--- a/include/asm-s390/thread_info.h
+++ b/include/asm-s390/thread_info.h
@@ -63,6 +63,7 @@ struct thread_info {
        .exec_domain    = &default_exec_domain, \
        .flags          = 0,                    \
        .cpu            = 0,                    \
+        .preempt_count  = 1,                    \
        .restart_block  = {                     \
                .fn = do_no_restart_syscall,    \
        },                                      \
diff --git a/include/asm-s390/unistd.h b/include/asm-s390/unistd.h
index e21443d3ea..aa7a243862 100644
--- a/include/asm-s390/unistd.h
+++ b/include/asm-s390/unistd.h
@@ -394,11 +394,9 @@
 #ifdef __KERNEL__
-/* user-visible error numbers are in the range -1 - -122: see <asm-s390/errno.h> */
 #define __syscall_return(type, res)                          \
 do {                                                         \
-        if ((unsigned long)(res) >= (unsigned long)(-125)) { \
+        if ((unsigned long)(res) >= (unsigned long)(-4095)) {\
                errno = -(res);                              \
                res = -1;                                    \
        }                                                    \
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index 1d934fb2c5..fed2661696 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -1,9 +1,4 @@
 #ifndef __ASM_SH_HW_IRQ_H
 #define __ASM_SH_HW_IRQ_H
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
-{
-        /* Nothing to do */
-}
 #endif /* __ASM_SH_HW_IRQ_H */
diff --git a/include/asm-sh64/hw_irq.h b/include/asm-sh64/hw_irq.h
index ae718d1f2d..ebb39089b0 100644
--- a/include/asm-sh64/hw_irq.h
+++ b/include/asm-sh64/hw_irq.h
@@ -11,6 +11,5 @@
 * Copyright (C) 2000, 2001  Paolo Alberelli
 *
 */
-static __inline__ void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) { /* Nothing to do */ }
 #endif /* __ASM_SH64_HW_IRQ_H */
diff --git a/include/asm-sparc/io.h b/include/asm-sparc/io.h
index a42df208d5..cab0b851b8 100644
--- a/include/asm-sparc/io.h
+++ b/include/asm-sparc/io.h
@@ -249,6 +249,22 @@ extern void __iomem *ioremap(unsigned long offset, unsigned long size);
 #define ioremap_nocache(X,Y)    ioremap((X),(Y))
 extern void iounmap(volatile void __iomem *addr);
+#define ioread8(X)                      readb(X)
+#define ioread16(X)                     readw(X)
+#define ioread32(X)                     readl(X)
+#define iowrite8(val,X)                 writeb(val,X)
+#define iowrite16(val,X)                writew(val,X)
+#define iowrite32(val,X)                writel(val,X)
+/* Create a virtual mapping cookie for an IO port range */
+extern void __iomem *ioport_map(unsigned long port, unsigned int nr);
+extern void ioport_unmap(void __iomem *);
+/* Create a virtual mapping cookie for a PCI BAR (memory or IO) */
+struct pci_dev;
+extern void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max);
+extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
 /*
 * Bus number may be in res->flags... somewhere.
 */
diff --git a/include/asm-sparc/prom.h b/include/asm-sparc/prom.h
index c5e3d26eab..f9cf44c071 100644
--- a/include/asm-sparc/prom.h
+++ b/include/asm-sparc/prom.h
@@ -35,6 +35,8 @@ struct property {
        int     length;
        void    *value;
        struct property *next;
+        unsigned long _flags;
+        unsigned int unique_id;
 };
 struct device_node {
@@ -58,8 +60,15 @@ struct device_node {
        struct  kref kref;
        unsigned long _flags;
        void    *data;
+        unsigned int unique_id;
 };
+/* flag descriptions */
+#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */
+#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
+#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
 static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
 {
        dn->pde = de;
@@ -88,6 +97,7 @@ extern struct property *of_find_property(struct device_node *np,
 extern int of_device_is_compatible(struct device_node *device, const char *);
 extern void *of_get_property(struct device_node *node, const char *name,
                             int *lenp);
+extern int of_set_property(struct device_node *node, const char *name, void *val, int len);
 extern int of_getintprop_default(struct device_node *np,
                                 const char *name,
                                 int def);
diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h
index 3c2b5bc865..0f5b89c932 100644
--- a/include/asm-sparc64/dma-mapping.h
+++ b/include/asm-sparc64/dma-mapping.h
@@ -162,4 +162,47 @@ static inline void dma_free_coherent(struct device *dev, size_t size,
 #endif /* PCI */
+/* Now for the API extensions over the pci_ one */
+#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
+#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+#define dma_is_consistent(d)    (1)
+static inline int
+dma_get_cache_alignment(void)
+{
+        /* no easy way to get cache size on all processors, so return
+         * the maximum possible, to be safe */
+        return (1 << INTERNODE_CACHE_SHIFT);
+}
+static inline void
+dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
+                              unsigned long offset, size_t size,
+                              enum dma_data_direction direction)
+{
+        /* just sync everything, that's all the pci API can do */
+        dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
+}
+static inline void
+dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
+                                 unsigned long offset, size_t size,
+                                 enum dma_data_direction direction)
+{
+        /* just sync everything, that's all the pci API can do */
+        dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
+}
+static inline void
+dma_cache_sync(void *vaddr, size_t size,
+               enum dma_data_direction direction)
+{
+        /* could define this in terms of the dma_cache ... operations,
+         * but if you get this on a platform, you should convert the platform
+         * to using the generic device DMA API */
+        BUG();
+}
 #endif /* _ASM_SPARC64_DMA_MAPPING_H */
diff --git a/include/asm-sparc64/floppy.h b/include/asm-sparc64/floppy.h
index f8d57bb557..b591d0e8d8 100644
--- a/include/asm-sparc64/floppy.h
+++ b/include/asm-sparc64/floppy.h
@@ -208,7 +208,55 @@ static void sun_fd_enable_dma(void)
        pdma_areasize = pdma_size;
 }
-extern irqreturn_t sparc_floppy_irq(int, void *, struct pt_regs *);
+irqreturn_t sparc_floppy_irq(int irq, void *dev_cookie, struct pt_regs *regs)
+{
+        if (likely(doing_pdma)) {
+                void __iomem *stat = (void __iomem *) fdc_status;
+                unsigned char *vaddr = pdma_vaddr;
+                unsigned long size = pdma_size;
+                u8 val;
+                while (size) {
+                        val = readb(stat);
+                        if (unlikely(!(val & 0x80))) {
+                                pdma_vaddr = vaddr;
+                                pdma_size = size;
+                                return IRQ_HANDLED;
+                        }
+                        if (unlikely(!(val & 0x20))) {
+                                pdma_vaddr = vaddr;
+                                pdma_size = size;
+                                doing_pdma = 0;
+                                goto main_interrupt;
+                        }
+                        if (val & 0x40) {
+                                /* read */
+                                *vaddr++ = readb(stat + 1);
+                        } else {
+                                unsigned char data = *vaddr++;
+                                /* write */
+                                writeb(data, stat + 1);
+                        }
+                        size--;
+                }
+                pdma_vaddr = vaddr;
+                pdma_size = size;
+                /* Send Terminal Count pulse to floppy controller. */
+                val = readb(auxio_register);
+                val |= AUXIO_AUX1_FTCNT;
+                writeb(val, auxio_register);
+                val &= ~AUXIO_AUX1_FTCNT;
+                writeb(val, auxio_register);
+                doing_pdma = 0;
+        }
+main_interrupt:
+        return floppy_interrupt(irq, dev_cookie, regs);
+}
 static int sun_fd_request_irq(void)
 {
diff --git a/include/asm-sparc64/kdebug.h b/include/asm-sparc64/kdebug.h
index 4040d127ac..11251bdd00 100644
--- a/include/asm-sparc64/kdebug.h
+++ b/include/asm-sparc64/kdebug.h
@@ -17,6 +17,8 @@ struct die_args {
 extern int register_die_notifier(struct notifier_block *);
 extern int unregister_die_notifier(struct notifier_block *);
+extern int register_page_fault_notifier(struct notifier_block *);
+extern int unregister_page_fault_notifier(struct notifier_block *);
 extern struct atomic_notifier_head sparc64die_chain;
 extern void bad_trap(struct pt_regs *, long);
diff --git a/include/asm-sparc64/kprobes.h b/include/asm-sparc64/kprobes.h
index e9bb26f770..15065af566 100644
--- a/include/asm-sparc64/kprobes.h
+++ b/include/asm-sparc64/kprobes.h
@@ -12,6 +12,7 @@ typedef u32 kprobe_opcode_t;
 #define JPROBE_ENTRY(pentry)    (kprobe_opcode_t *)pentry
 #define arch_remove_kprobe(p)   do {} while (0)
+#define  ARCH_INACTIVE_KPROBE_COUNT 0
 /* Architecture specific copy of original instruction*/
 struct arch_specific_insn {
diff --git a/include/asm-sparc64/prom.h b/include/asm-sparc64/prom.h
index 6d1556c0c2..265614d497 100644
--- a/include/asm-sparc64/prom.h
+++ b/include/asm-sparc64/prom.h
@@ -35,6 +35,8 @@ struct property {
        int     length;
        void    *value;
        struct property *next;
+        unsigned long _flags;
+        unsigned int unique_id;
 };
 struct device_node {
@@ -58,8 +60,15 @@ struct device_node {
        struct  kref kref;
        unsigned long _flags;
        void    *data;
+        unsigned int unique_id;
 };
+/* flag descriptions */
+#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */
+#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
+#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
 static inline void set_node_proc_entry(struct device_node *dn, struct proc_dir_entry *de)
 {
        dn->pde = de;
@@ -88,6 +97,7 @@ extern struct property *of_find_property(struct device_node *np,
 extern int of_device_is_compatible(struct device_node *device, const char *);
 extern void *of_get_property(struct device_node *node, const char *name,
                             int *lenp);
+extern int of_set_property(struct device_node *node, const char *name, void *val, int len);
 extern int of_getintprop_default(struct device_node *np,
                                 const char *name,
                                 int def);
diff --git a/include/asm-sparc64/topology.h b/include/asm-sparc64/topology.h
index 0e234e201b..98a6c61358 100644
--- a/include/asm-sparc64/topology.h
+++ b/include/asm-sparc64/topology.h
@@ -1,6 +1,9 @@
 #ifndef _ASM_SPARC64_TOPOLOGY_H
 #define _ASM_SPARC64_TOPOLOGY_H
+#include <asm/spitfire.h>
+#define smt_capable()   (tlb_type == hypervisor)
 #include <asm-generic/topology.h>
 #endif /* _ASM_SPARC64_TOPOLOGY_H */
diff --git a/include/asm-um/hw_irq.h b/include/asm-um/hw_irq.h
index 4ee38c0b6a..1cf84cf5f2 100644
--- a/include/asm-um/hw_irq.h
+++ b/include/asm-um/hw_irq.h
@@ -4,7 +4,4 @@
 #include "asm/irq.h"
 #include "asm/archparam.h"
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
-{}
 #endif
diff --git a/include/asm-v850/hw_irq.h b/include/asm-v850/hw_irq.h
index a8aab43427..043e94bb6b 100644
--- a/include/asm-v850/hw_irq.h
+++ b/include/asm-v850/hw_irq.h
@@ -1,8 +1,4 @@
 #ifndef __V850_HW_IRQ_H__
 #define __V850_HW_IRQ_H__
-static inline void hw_resend_irq (struct hw_interrupt_type *h, unsigned int i)
-{
-}
 #endif /* __V850_HW_IRQ_H__ */
diff --git a/include/asm-x86_64/alternative.h b/include/asm-x86_64/alternative.h
new file mode 100644
index 0000000000..387c8f66af
--- /dev/null
+++ b/include/asm-x86_64/alternative.h
@@ -0,0 +1,146 @@
+#ifndef _X86_64_ALTERNATIVE_H
+#define _X86_64_ALTERNATIVE_H
+#ifdef __KERNEL__
+#include <linux/types.h>
+struct alt_instr {
+        u8 *instr;              /* original instruction */
+        u8 *replacement;
+        u8  cpuid;              /* cpuid bit set for replacement */
+        u8  instrlen;           /* length of original instruction */
+        u8  replacementlen;     /* length of new instruction, <= instrlen */
+        u8  pad[5];
+};
+extern void apply_alternatives(struct alt_instr *start, struct alt_instr *end);
+struct module;
+extern void alternatives_smp_module_add(struct module *mod, char *name,
+                                        void *locks, void *locks_end,
+                                        void *text, void *text_end);
+extern void alternatives_smp_module_del(struct module *mod);
+extern void alternatives_smp_switch(int smp);
+#endif
+/*
+ * Alternative instructions for different CPU types or capabilities.
+ *
+ * This allows to use optimized instructions even on generic binary
+ * kernels.
+ *
+ * length of oldinstr must be longer or equal the length of newinstr
+ * It can be padded with nops as needed.
+ *
+ * For non barrier like inlines please define new variants
+ * without volatile and memory clobber.
+ */
+#define alternative(oldinstr, newinstr, feature)        \
+        asm volatile ("661:\n\t" oldinstr "\n662:\n"                 \
+                      ".section .altinstructions,\"a\"\n"            \
+                      "  .align 8\n"                                   \
+                      "  .quad 661b\n"            /* label */          \
+                      "  .quad 663f\n"            /* new instruction */ \
+                      "  .byte %c0\n"             /* feature bit */    \
+                      "  .byte 662b-661b\n"       /* sourcelen */      \
+                      "  .byte 664f-663f\n"       /* replacementlen */ \
+                      ".previous\n"                                     \
+                      ".section .altinstr_replacement,\"ax\"\n"         \
+                      "663:\n\t" newinstr "\n664:\n"   /* replacement */ \
+                      ".previous" :: "i" (feature) : "memory")
+/*
+ * Alternative inline assembly with input.
+ *
+ * Pecularities:
+ * No memory clobber here.
+ * Argument numbers start with 1.
+ * Best is to use constraints that are fixed size (like (%1) ... "r")
+ * If you use variable sized constraints like "m" or "g" in the
+ * replacement make sure to pad to the worst case length.
+ */
+#define alternative_input(oldinstr, newinstr, feature, input...)        \
+        asm volatile ("661:\n\t" oldinstr "\n662:\n"                    \
+                      ".section .altinstructions,\"a\"\n"               \
+                      "  .align 8\n"                                    \
+                      "  .quad 661b\n"            /* label */           \
+                      "  .quad 663f\n"            /* new instruction */ \
+                      "  .byte %c0\n"             /* feature bit */     \
+                      "  .byte 662b-661b\n"       /* sourcelen */       \
+                      "  .byte 664f-663f\n"       /* replacementlen */  \
+                      ".previous\n"                                     \
+                      ".section .altinstr_replacement,\"ax\"\n"         \
+                      "663:\n\t" newinstr "\n664:\n"   /* replacement */ \
+                      ".previous" :: "i" (feature), ##input)
+/* Like alternative_input, but with a single output argument */
+#define alternative_io(oldinstr, newinstr, feature, output, input...) \
+        asm volatile ("661:\n\t" oldinstr "\n662:\n"                    \
+                      ".section .altinstructions,\"a\"\n"               \
+                      "  .align 8\n"                                    \
+                      "  .quad 661b\n"            /* label */           \
+                      "  .quad 663f\n"            /* new instruction */ \
+                      "  .byte %c[feat]\n"        /* feature bit */     \
+                      "  .byte 662b-661b\n"       /* sourcelen */       \
+                      "  .byte 664f-663f\n"       /* replacementlen */  \
+                      ".previous\n"                                     \
+                      ".section .altinstr_replacement,\"ax\"\n"         \
+                      "663:\n\t" newinstr "\n664:\n"   /* replacement */ \
+                      ".previous" : output : [feat] "i" (feature), ##input)
+/*
+ * Alternative inline assembly for SMP.
+ *
+ * alternative_smp() takes two versions (SMP first, UP second) and is
+ * for more complex stuff such as spinlocks.
+ *
+ * The LOCK_PREFIX macro defined here replaces the LOCK and
+ * LOCK_PREFIX macros used everywhere in the source tree.
+ *
+ * SMP alternatives use the same data structures as the other
+ * alternatives and the X86_FEATURE_UP flag to indicate the case of a
+ * UP system running a SMP kernel.  The existing apply_alternatives()
+ * works fine for patching a SMP kernel for UP.
+ *
+ * The SMP alternative tables can be kept after boot and contain both
+ * UP and SMP versions of the instructions to allow switching back to
+ * SMP at runtime, when hotplugging in a new CPU, which is especially
+ * useful in virtualized environments.
+ *
+ * The very common lock prefix is handled as special case in a
+ * separate table which is a pure address list without replacement ptr
+ * and size information.  That keeps the table sizes small.
+ */
+#ifdef CONFIG_SMP
+#define alternative_smp(smpinstr, upinstr, args...)                     \
+        asm volatile ("661:\n\t" smpinstr "\n662:\n"                    \
+                      ".section .smp_altinstructions,\"a\"\n"           \
+                      "  .align 8\n"                                    \
+                      "  .quad 661b\n"            /* label */           \
+                      "  .quad 663f\n"            /* new instruction */ \
+                      "  .byte 0x66\n"            /* X86_FEATURE_UP */  \
+                      "  .byte 662b-661b\n"       /* sourcelen */       \
+                      "  .byte 664f-663f\n"       /* replacementlen */  \
+                      ".previous\n"                                     \
+                      ".section .smp_altinstr_replacement,\"awx\"\n"    \
+                      "663:\n\t" upinstr "\n"     /* replacement */     \
+                      "664:\n\t.fill 662b-661b,1,0x42\n" /* space for original */ \
+                      ".previous" : args)
+#define LOCK_PREFIX \
+                ".section .smp_locks,\"a\"\n"   \
+                "  .align 8\n"                  \
+                "  .quad 661f\n" /* address */  \
+                ".previous\n"                   \
+                "661:\n\tlock; "
+#else /* ! CONFIG_SMP */
+#define alternative_smp(smpinstr, upinstr, args...) \
+        asm volatile (upinstr : args)
+#define LOCK_PREFIX ""
+#endif
+#endif /* _X86_64_ALTERNATIVE_H */
diff --git a/include/asm-x86_64/apic.h b/include/asm-x86_64/apic.h
index a731be2204..9c96a0a8d1 100644
--- a/include/asm-x86_64/apic.h
+++ b/include/asm-x86_64/apic.h
@@ -49,7 +49,8 @@ static __inline unsigned int apic_read(unsigned long reg)
 static __inline__ void apic_wait_icr_idle(void)
 {
-        while ( apic_read( APIC_ICR ) & APIC_ICR_BUSY );
+        while (apic_read( APIC_ICR ) & APIC_ICR_BUSY)
+                cpu_relax();
 }
 static inline void ack_APIC_irq(void)
@@ -79,30 +80,23 @@ extern void init_apic_mappings (void);
 extern void smp_local_timer_interrupt (struct pt_regs * regs);
 extern void setup_boot_APIC_clock (void);
 extern void setup_secondary_APIC_clock (void);
-extern void setup_apic_nmi_watchdog (void);
-extern int reserve_lapic_nmi(void);
-extern void release_lapic_nmi(void);
-extern void disable_timer_nmi_watchdog(void);
-extern void enable_timer_nmi_watchdog(void);
-extern void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason);
 extern int APIC_init_uniprocessor (void);
 extern void disable_APIC_timer(void);
 extern void enable_APIC_timer(void);
 extern void clustered_apic_check(void);
-extern void nmi_watchdog_default(void);
+extern void setup_APIC_extened_lvt(unsigned char lvt_off, unsigned char vector,
-extern int setup_nmi_watchdog(char *);
+                                   unsigned char msg_type, unsigned char mask);
-extern unsigned int nmi_watchdog;
+#define K8_APIC_EXT_LVT_BASE    0x500
-#define NMI_DEFAULT     -1
+#define K8_APIC_EXT_INT_MSG_FIX 0x0
-#define NMI_NONE        0
+#define K8_APIC_EXT_INT_MSG_SMI 0x2
-#define NMI_IO_APIC     1
+#define K8_APIC_EXT_INT_MSG_NMI 0x4
-#define NMI_LOCAL_APIC  2
+#define K8_APIC_EXT_INT_MSG_EXT 0x7
-#define NMI_INVALID     3
+#define K8_APIC_EXT_LVT_ENTRY_THRESHOLD    0
 extern int disable_timer_pin_1;
-extern void setup_threshold_lvt(unsigned long lvt_off);
 void smp_send_timer_broadcast_ipi(void);
 void switch_APIC_timer_to_ipi(void *cpumask);
diff --git a/include/asm-x86_64/atomic.h b/include/asm-x86_64/atomic.h
index bd3fa67ed8..007e88d6d4 100644
--- a/include/asm-x86_64/atomic.h
+++ b/include/asm-x86_64/atomic.h
@@ -1,7 +1,7 @@
 #ifndef __ARCH_X86_64_ATOMIC__
 #define __ARCH_X86_64_ATOMIC__
-#include <asm/types.h>
+#include <asm/alternative.h>
 /* atomic_t should be 32 bit signed type */
@@ -52,7 +52,7 @@ typedef struct { volatile int counter; } atomic_t;
 static __inline__ void atomic_add(int i, atomic_t *v)
 {
        __asm__ __volatile__(
-                LOCK "addl %1,%0"
+                LOCK_PREFIX "addl %1,%0"
                :"=m" (v->counter)
                :"ir" (i), "m" (v->counter));
 }
@@ -67,7 +67,7 @@ static __inline__ void atomic_add(int i, atomic_t *v)
 static __inline__ void atomic_sub(int i, atomic_t *v)
 {
        __asm__ __volatile__(
-                LOCK "subl %1,%0"
+                LOCK_PREFIX "subl %1,%0"
                :"=m" (v->counter)
                :"ir" (i), "m" (v->counter));
 }
@@ -86,7 +86,7 @@ static __inline__ int atomic_sub_and_test(int i, atomic_t *v)
        unsigned char c;
        __asm__ __volatile__(
-                LOCK "subl %2,%0; sete %1"
+                LOCK_PREFIX "subl %2,%0; sete %1"
                :"=m" (v->counter), "=qm" (c)
                :"ir" (i), "m" (v->counter) : "memory");
        return c;
@@ -101,7 +101,7 @@ static __inline__ int atomic_sub_and_test(int i, atomic_t *v)
 static __inline__ void atomic_inc(atomic_t *v)
 {
        __asm__ __volatile__(
-                LOCK "incl %0"
+                LOCK_PREFIX "incl %0"
                :"=m" (v->counter)
                :"m" (v->counter));
 }
@@ -115,7 +115,7 @@ static __inline__ void atomic_inc(atomic_t *v)
 static __inline__ void atomic_dec(atomic_t *v)
 {
        __asm__ __volatile__(
-                LOCK "decl %0"
+                LOCK_PREFIX "decl %0"
                :"=m" (v->counter)
                :"m" (v->counter));
 }
@@ -133,7 +133,7 @@ static __inline__ int atomic_dec_and_test(atomic_t *v)
        unsigned char c;
        __asm__ __volatile__(
-                LOCK "decl %0; sete %1"
+                LOCK_PREFIX "decl %0; sete %1"
                :"=m" (v->counter), "=qm" (c)
                :"m" (v->counter) : "memory");
        return c != 0;
@@ -152,7 +152,7 @@ static __inline__ int atomic_inc_and_test(atomic_t *v)
        unsigned char c;
        __asm__ __volatile__(
-                LOCK "incl %0; sete %1"
+                LOCK_PREFIX "incl %0; sete %1"
                :"=m" (v->counter), "=qm" (c)
                :"m" (v->counter) : "memory");
        return c != 0;
@@ -172,7 +172,7 @@ static __inline__ int atomic_add_negative(int i, atomic_t *v)
        unsigned char c;
        __asm__ __volatile__(
-                LOCK "addl %2,%0; sets %1"
+                LOCK_PREFIX "addl %2,%0; sets %1"
                :"=m" (v->counter), "=qm" (c)
                :"ir" (i), "m" (v->counter) : "memory");
        return c;
@@ -189,7 +189,7 @@ static __inline__ int atomic_add_return(int i, atomic_t *v)
 {
        int __i = i;
        __asm__ __volatile__(
-                LOCK "xaddl %0, %1;"
+                LOCK_PREFIX "xaddl %0, %1;"
                :"=r"(i)
                :"m"(v->counter), "0"(i));
        return i + __i;
@@ -237,7 +237,7 @@ typedef struct { volatile long counter; } atomic64_t;
 static __inline__ void atomic64_add(long i, atomic64_t *v)
 {
        __asm__ __volatile__(
-                LOCK "addq %1,%0"
+                LOCK_PREFIX "addq %1,%0"
                :"=m" (v->counter)
                :"ir" (i), "m" (v->counter));
 }
@@ -252,7 +252,7 @@ static __inline__ void atomic64_add(long i, atomic64_t *v)
 static __inline__ void atomic64_sub(long i, atomic64_t *v)
 {
        __asm__ __volatile__(
-                LOCK "subq %1,%0"
+                LOCK_PREFIX "subq %1,%0"
                :"=m" (v->counter)
                :"ir" (i), "m" (v->counter));
 }
@@ -271,7 +271,7 @@ static __inline__ int atomic64_sub_and_test(long i, atomic64_t *v)
        unsigned char c;
        __asm__ __volatile__(
-                LOCK "subq %2,%0; sete %1"
+                LOCK_PREFIX "subq %2,%0; sete %1"
                :"=m" (v->counter), "=qm" (c)
                :"ir" (i), "m" (v->counter) : "memory");
        return c;
@@ -286,7 +286,7 @@ static __inline__ int atomic64_sub_and_test(long i, atomic64_t *v)
 static __inline__ void atomic64_inc(atomic64_t *v)
 {
        __asm__ __volatile__(
-                LOCK "incq %0"
+                LOCK_PREFIX "incq %0"
                :"=m" (v->counter)
                :"m" (v->counter));
 }
@@ -300,7 +300,7 @@ static __inline__ void atomic64_inc(atomic64_t *v)
 static __inline__ void atomic64_dec(atomic64_t *v)
 {
        __asm__ __volatile__(
-                LOCK "decq %0"
+                LOCK_PREFIX "decq %0"
                :"=m" (v->counter)
                :"m" (v->counter));
 }
@@ -318,7 +318,7 @@ static __inline__ int atomic64_dec_and_test(atomic64_t *v)
        unsigned char c;
        __asm__ __volatile__(
-                LOCK "decq %0; sete %1"
+                LOCK_PREFIX "decq %0; sete %1"
                :"=m" (v->counter), "=qm" (c)
                :"m" (v->counter) : "memory");
        return c != 0;
@@ -337,7 +337,7 @@ static __inline__ int atomic64_inc_and_test(atomic64_t *v)
        unsigned char c;
        __asm__ __volatile__(
-                LOCK "incq %0; sete %1"
+                LOCK_PREFIX "incq %0; sete %1"
                :"=m" (v->counter), "=qm" (c)
                :"m" (v->counter) : "memory");
        return c != 0;
@@ -357,7 +357,7 @@ static __inline__ int atomic64_add_negative(long i, atomic64_t *v)
        unsigned char c;
        __asm__ __volatile__(
-                LOCK "addq %2,%0; sets %1"
+                LOCK_PREFIX "addq %2,%0; sets %1"
                :"=m" (v->counter), "=qm" (c)
                :"ir" (i), "m" (v->counter) : "memory");
        return c;
@@ -374,7 +374,7 @@ static __inline__ long atomic64_add_return(long i, atomic64_t *v)
 {
        long __i = i;
        __asm__ __volatile__(
-                LOCK "xaddq %0, %1;"
+                LOCK_PREFIX "xaddq %0, %1;"
                :"=r"(i)
                :"m"(v->counter), "0"(i));
        return i + __i;
@@ -418,11 +418,11 @@ static __inline__ long atomic64_sub_return(long i, atomic64_t *v)
 /* These are x86-specific, used by some header files */
 #define atomic_clear_mask(mask, addr) \
-__asm__ __volatile__(LOCK "andl %0,%1" \
+__asm__ __volatile__(LOCK_PREFIX "andl %0,%1" \
 : : "r" (~(mask)),"m" (*addr) : "memory")
 #define atomic_set_mask(mask, addr) \
-__asm__ __volatile__(LOCK "orl %0,%1" \
+__asm__ __volatile__(LOCK_PREFIX "orl %0,%1" \
 : : "r" ((unsigned)mask),"m" (*(addr)) : "memory")
 /* Atomic operations are already serializing on x86 */
diff --git a/include/asm-x86_64/bitops.h b/include/asm-x86_64/bitops.h
index e9bf933d25..f7ba57b1cc 100644
--- a/include/asm-x86_64/bitops.h
+++ b/include/asm-x86_64/bitops.h
@@ -5,12 +5,7 @@
 * Copyright 1992, Linus Torvalds.
 */
+#include <asm/alternative.h>
-#ifdef CONFIG_SMP
-#define LOCK_PREFIX "lock ; "
-#else
-#define LOCK_PREFIX ""
-#endif
 #define ADDR (*(volatile long *) addr)
diff --git a/include/asm-x86_64/calgary.h b/include/asm-x86_64/calgary.h
new file mode 100644
index 0000000000..6e1654f309
--- /dev/null
+++ b/include/asm-x86_64/calgary.h
@@ -0,0 +1,66 @@
+/*
+ * Derived from include/asm-powerpc/iommu.h
+ *
+ * Copyright (C) 2006 Jon Mason <jdmason@us.ibm.com>, IBM Corporation
+ * Copyright (C) 2006 Muli Ben-Yehuda <muli@il.ibm.com>, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ASM_X86_64_CALGARY_H
+#define _ASM_X86_64_CALGARY_H
+#include <linux/config.h>
+#include <linux/spinlock.h>
+#include <linux/device.h>
+#include <linux/dma-mapping.h>
+#include <asm/types.h>
+struct iommu_table {
+        unsigned long  it_base;      /* mapped address of tce table */
+        unsigned long  it_hint;      /* Hint for next alloc */
+        unsigned long *it_map;       /* A simple allocation bitmap for now */
+        spinlock_t     it_lock;      /* Protects it_map */
+        unsigned int   it_size;      /* Size of iommu table in entries */
+        unsigned char  it_busno;     /* Bus number this table belongs to */
+        void __iomem  *bbar;
+        u64            tar_val;
+        struct timer_list watchdog_timer;
+};
+#define TCE_TABLE_SIZE_UNSPECIFIED      ~0
+#define TCE_TABLE_SIZE_64K              0
+#define TCE_TABLE_SIZE_128K             1
+#define TCE_TABLE_SIZE_256K             2
+#define TCE_TABLE_SIZE_512K             3
+#define TCE_TABLE_SIZE_1M               4
+#define TCE_TABLE_SIZE_2M               5
+#define TCE_TABLE_SIZE_4M               6
+#define TCE_TABLE_SIZE_8M               7
+#ifdef CONFIG_CALGARY_IOMMU
+extern int calgary_iommu_init(void);
+extern void detect_calgary(void);
+#else
+static inline int calgary_iommu_init(void) { return 1; }
+static inline void detect_calgary(void) { return; }
+#endif
+static inline unsigned int bus_to_phb(unsigned char busno)
+{
+        return ((busno % 15 == 0) ? 0 : busno / 2 + 1);
+}
+#endif /* _ASM_X86_64_CALGARY_H */
diff --git a/include/asm-x86_64/cpufeature.h b/include/asm-x86_64/cpufeature.h
index 662964b74e..ee792faaca 100644
--- a/include/asm-x86_64/cpufeature.h
+++ b/include/asm-x86_64/cpufeature.h
@@ -46,6 +46,7 @@
 #define X86_FEATURE_SYSCALL     (1*32+11) /* SYSCALL/SYSRET */
 #define X86_FEATURE_MMXEXT      (1*32+22) /* AMD MMX extensions */
 #define X86_FEATURE_FXSR_OPT    (1*32+25) /* FXSR optimizations */
+#define X86_FEATURE_RDTSCP      (1*32+27) /* RDTSCP */
 #define X86_FEATURE_LM          (1*32+29) /* Long Mode (x86-64) */
 #define X86_FEATURE_3DNOWEXT    (1*32+30) /* AMD 3DNow! extensions */
 #define X86_FEATURE_3DNOW       (1*32+31) /* 3DNow! */
@@ -65,6 +66,8 @@
 #define X86_FEATURE_CONSTANT_TSC (3*32+5) /* TSC runs at constant rate */
 #define X86_FEATURE_SYNC_RDTSC  (3*32+6)  /* RDTSC syncs CPU core */
 #define X86_FEATURE_FXSAVE_LEAK (3*32+7)  /* FIP/FOP/FDP leaks through FXSAVE */
+#define X86_FEATURE_UP          (3*32+8) /* SMP kernel running on UP */
+#define X86_FEATURE_ARCH_PERFMON (3*32+9) /* Intel Architectural PerfMon */
 /* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
 #define X86_FEATURE_XMM3        (4*32+ 0) /* Streaming SIMD Extensions-3 */
diff --git a/include/asm-x86_64/dma-mapping.h b/include/asm-x86_64/dma-mapping.h
index 498f66df36..b6da83dcc7 100644
--- a/include/asm-x86_64/dma-mapping.h
+++ b/include/asm-x86_64/dma-mapping.h
@@ -55,6 +55,13 @@ extern dma_addr_t bad_dma_address;
 extern struct dma_mapping_ops* dma_ops;
 extern int iommu_merge;
+static inline int valid_dma_direction(int dma_direction)
+{
+        return ((dma_direction == DMA_BIDIRECTIONAL) ||
+                (dma_direction == DMA_TO_DEVICE) ||
+                (dma_direction == DMA_FROM_DEVICE));
+}
 static inline int dma_mapping_error(dma_addr_t dma_addr)
 {
        if (dma_ops->mapping_error)
@@ -72,6 +79,7 @@ static inline dma_addr_t
 dma_map_single(struct device *hwdev, void *ptr, size_t size,
               int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        return dma_ops->map_single(hwdev, ptr, size, direction);
 }
@@ -79,6 +87,7 @@ static inline void
 dma_unmap_single(struct device *dev, dma_addr_t addr,size_t size,
                 int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        dma_ops->unmap_single(dev, addr, size, direction);
 }
@@ -91,6 +100,7 @@ static inline void
 dma_sync_single_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
                        size_t size, int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        if (dma_ops->sync_single_for_cpu)
                dma_ops->sync_single_for_cpu(hwdev, dma_handle, size,
                                             direction);
@@ -101,6 +111,7 @@ static inline void
 dma_sync_single_for_device(struct device *hwdev, dma_addr_t dma_handle,
                           size_t size, int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        if (dma_ops->sync_single_for_device)
                dma_ops->sync_single_for_device(hwdev, dma_handle, size,
                                                direction);
@@ -111,6 +122,7 @@ static inline void
 dma_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dma_handle,
                              unsigned long offset, size_t size, int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        if (dma_ops->sync_single_range_for_cpu) {
                dma_ops->sync_single_range_for_cpu(hwdev, dma_handle, offset, size, direction);
        }
@@ -122,6 +134,7 @@ static inline void
 dma_sync_single_range_for_device(struct device *hwdev, dma_addr_t dma_handle,
                                 unsigned long offset, size_t size, int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        if (dma_ops->sync_single_range_for_device)
                dma_ops->sync_single_range_for_device(hwdev, dma_handle,
                                                      offset, size, direction);
@@ -133,6 +146,7 @@ static inline void
 dma_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
                    int nelems, int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        if (dma_ops->sync_sg_for_cpu)
                dma_ops->sync_sg_for_cpu(hwdev, sg, nelems, direction);
        flush_write_buffers();
@@ -142,6 +156,7 @@ static inline void
 dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
                       int nelems, int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        if (dma_ops->sync_sg_for_device) {
                dma_ops->sync_sg_for_device(hwdev, sg, nelems, direction);
        }
@@ -152,6 +167,7 @@ dma_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
 static inline int
 dma_map_sg(struct device *hwdev, struct scatterlist *sg, int nents, int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        return dma_ops->map_sg(hwdev, sg, nents, direction);
 }
@@ -159,6 +175,7 @@ static inline void
 dma_unmap_sg(struct device *hwdev, struct scatterlist *sg, int nents,
             int direction)
 {
+        BUG_ON(!valid_dma_direction(direction));
        dma_ops->unmap_sg(hwdev, sg, nents, direction);
 }
diff --git a/include/asm-x86_64/dma.h b/include/asm-x86_64/dma.h
index c556208d3d..a37c16f062 100644
--- a/include/asm-x86_64/dma.h
+++ b/include/asm-x86_64/dma.h
@@ -1,4 +1,4 @@
-/* $Id: dma.h,v 1.1.1.1 2001/04/19 20:00:38 ak Exp $
+/*
 * linux/include/asm/dma.h: Defines for using and allocating dma channels.
 * Written by Hennus Bergman, 1992.
 * High DMA channel support & info by Hannu Savolainen
diff --git a/include/asm-x86_64/gart-mapping.h b/include/asm-x86_64/gart-mapping.h
deleted file mode 100644
index ada497b0b5..0000000000
--- a/include/asm-x86_64/gart-mapping.h
+++ /dev/null
@@ -1,16 +0,0 @@
-#ifndef _X8664_GART_MAPPING_H
-#define _X8664_GART_MAPPING_H 1
-#include <linux/types.h>
-#include <asm/types.h>
-struct device;
-extern void*
-gart_alloc_coherent(struct device *dev, size_t size,
-        dma_addr_t *dma_handle, gfp_t gfp);
-extern int
-gart_dma_supported(struct device *hwdev, u64 mask);
-#endif /* _X8664_GART_MAPPING_H */
diff --git a/include/asm-x86_64/hpet.h b/include/asm-x86_64/hpet.h
index 18ff7ee9e7..b39098408b 100644
--- a/include/asm-x86_64/hpet.h
+++ b/include/asm-x86_64/hpet.h
@@ -55,7 +55,7 @@
 extern int is_hpet_enabled(void);
 extern int hpet_rtc_timer_init(void);
-extern int oem_force_hpet_timer(void);
+extern int apic_is_clustered_box(void);
 extern int hpet_use_timer;
diff --git a/include/asm-x86_64/hw_irq.h b/include/asm-x86_64/hw_irq.h
index 3de96fd86a..48a4a5364e 100644
--- a/include/asm-x86_64/hw_irq.h
+++ b/include/asm-x86_64/hw_irq.h
@@ -12,8 +12,6 @@
 *      <tomsoft@informatik.tu-chemnitz.de>
 *
 *      hacked by Andi Kleen for x86-64.
- * 
- *  $Id: hw_irq.h,v 1.24 2001/09/14 20:55:03 vojtech Exp $
 */
 #ifndef __ASSEMBLY__
@@ -126,18 +124,9 @@ asmlinkage void IRQ_NAME(nr); \
 __asm__( \
 "\n.p2align\n" \
 "IRQ" #nr "_interrupt:\n\t" \
-        "push $" #nr "-256 ; " \
+        "push $~(" #nr ") ; " \
        "jmp common_interrupt");
-#if defined(CONFIG_X86_IO_APIC)
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {
-        if (IO_APIC_IRQ(i))
-                send_IPI_self(IO_APIC_VECTOR(i));
-}
-#else
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
-#endif
 #define platform_legacy_irq(irq)        ((irq) < 16)
 #endif
diff --git a/include/asm-x86_64/ia32_unistd.h b/include/asm-x86_64/ia32_unistd.h
index b4f4b172b1..5b52ce5073 100644
--- a/include/asm-x86_64/ia32_unistd.h
+++ b/include/asm-x86_64/ia32_unistd.h
@@ -4,317 +4,15 @@
 /*
 * This file contains the system call numbers of the ia32 port,
 * this is for the kernel only.
+ * Only add syscalls here where some part of the kernel needs to know
+ * the number. This should be otherwise in sync with asm-i386/unistd.h. -AK
 */
 #define __NR_ia32_restart_syscall 0
 #define __NR_ia32_exit            1
-#define __NR_ia32_fork            2
 #define __NR_ia32_read            3
 #define __NR_ia32_write           4
-#define __NR_ia32_open            5
+#define __NR_ia32_sigreturn     119
-#define __NR_ia32_close           6
-#define __NR_ia32_waitpid                 7
-#define __NR_ia32_creat           8
-#define __NR_ia32_link            9
-#define __NR_ia32_unlink                 10
-#define __NR_ia32_execve                 11
-#define __NR_ia32_chdir          12
-#define __NR_ia32_time           13
-#define __NR_ia32_mknod          14
-#define __NR_ia32_chmod          15
-#define __NR_ia32_lchown                 16
-#define __NR_ia32_break          17
-#define __NR_ia32_oldstat                18
-#define __NR_ia32_lseek          19
-#define __NR_ia32_getpid                 20
-#define __NR_ia32_mount          21
-#define __NR_ia32_umount                 22
-#define __NR_ia32_setuid                 23
-#define __NR_ia32_getuid                 24
-#define __NR_ia32_stime          25
-#define __NR_ia32_ptrace                 26
-#define __NR_ia32_alarm          27
-#define __NR_ia32_oldfstat               28
-#define __NR_ia32_pause          29
-#define __NR_ia32_utime          30
-#define __NR_ia32_stty           31
-#define __NR_ia32_gtty           32
-#define __NR_ia32_access                 33
-#define __NR_ia32_nice           34
-#define __NR_ia32_ftime          35
-#define __NR_ia32_sync           36
-#define __NR_ia32_kill           37
-#define __NR_ia32_rename                 38
-#define __NR_ia32_mkdir          39
-#define __NR_ia32_rmdir          40
-#define __NR_ia32_dup            41
-#define __NR_ia32_pipe           42
-#define __NR_ia32_times          43
-#define __NR_ia32_prof           44
-#define __NR_ia32_brk            45
-#define __NR_ia32_setgid                 46
-#define __NR_ia32_getgid                 47
-#define __NR_ia32_signal                 48
-#define __NR_ia32_geteuid                49
-#define __NR_ia32_getegid                50
-#define __NR_ia32_acct           51
-#define __NR_ia32_umount2                52
-#define __NR_ia32_lock           53
-#define __NR_ia32_ioctl          54
-#define __NR_ia32_fcntl          55
-#define __NR_ia32_mpx            56
-#define __NR_ia32_setpgid                57
-#define __NR_ia32_ulimit                 58
-#define __NR_ia32_oldolduname    59
-#define __NR_ia32_umask          60
-#define __NR_ia32_chroot                 61
-#define __NR_ia32_ustat          62
-#define __NR_ia32_dup2           63
-#define __NR_ia32_getppid                64
-#define __NR_ia32_getpgrp                65
-#define __NR_ia32_setsid                 66
-#define __NR_ia32_sigaction              67
-#define __NR_ia32_sgetmask               68
-#define __NR_ia32_ssetmask               69
-#define __NR_ia32_setreuid               70
-#define __NR_ia32_setregid               71
-#define __NR_ia32_sigsuspend             72
-#define __NR_ia32_sigpending             73
-#define __NR_ia32_sethostname    74
-#define __NR_ia32_setrlimit              75
-#define __NR_ia32_getrlimit              76     /* Back compatible 2Gig limited rlimit */
-#define __NR_ia32_getrusage              77
-#define __NR_ia32_gettimeofday   78
-#define __NR_ia32_settimeofday   79
-#define __NR_ia32_getgroups              80
-#define __NR_ia32_setgroups              81
-#define __NR_ia32_select                 82
-#define __NR_ia32_symlink                83
-#define __NR_ia32_oldlstat               84
-#define __NR_ia32_readlink               85
-#define __NR_ia32_uselib                 86
-#define __NR_ia32_swapon                 87
-#define __NR_ia32_reboot                 88
-#define __NR_ia32_readdir                89
-#define __NR_ia32_mmap           90
-#define __NR_ia32_munmap                 91
-#define __NR_ia32_truncate               92
-#define __NR_ia32_ftruncate              93
-#define __NR_ia32_fchmod                 94
-#define __NR_ia32_fchown                 95
-#define __NR_ia32_getpriority    96
-#define __NR_ia32_setpriority    97
-#define __NR_ia32_profil                 98
-#define __NR_ia32_statfs                 99
-#define __NR_ia32_fstatfs               100
-#define __NR_ia32_ioperm                101
-#define __NR_ia32_socketcall            102
-#define __NR_ia32_syslog                103
-#define __NR_ia32_setitimer             104
-#define __NR_ia32_getitimer             105
-#define __NR_ia32_stat          106
-#define __NR_ia32_lstat         107
-#define __NR_ia32_fstat         108
-#define __NR_ia32_olduname              109
-#define __NR_ia32_iopl          110
-#define __NR_ia32_vhangup               111
-#define __NR_ia32_idle          112
-#define __NR_ia32_vm86old               113
-#define __NR_ia32_wait4         114
-#define __NR_ia32_swapoff               115
-#define __NR_ia32_sysinfo               116
-#define __NR_ia32_ipc           117
-#define __NR_ia32_fsync         118
-#define __NR_ia32_sigreturn             119
-#define __NR_ia32_clone         120
-#define __NR_ia32_setdomainname 121
-#define __NR_ia32_uname         122
-#define __NR_ia32_modify_ldt            123
-#define __NR_ia32_adjtimex              124
-#define __NR_ia32_mprotect              125
-#define __NR_ia32_sigprocmask   126
-#define __NR_ia32_create_module 127
-#define __NR_ia32_init_module   128
-#define __NR_ia32_delete_module 129
-#define __NR_ia32_get_kernel_syms       130
-#define __NR_ia32_quotactl              131
-#define __NR_ia32_getpgid               132
-#define __NR_ia32_fchdir                133
-#define __NR_ia32_bdflush               134
-#define __NR_ia32_sysfs         135
-#define __NR_ia32_personality   136
-#define __NR_ia32_afs_syscall   137 /* Syscall for Andrew File System */
-#define __NR_ia32_setfsuid              138
-#define __NR_ia32_setfsgid              139
-#define __NR_ia32__llseek               140
-#define __NR_ia32_getdents              141
-#define __NR_ia32__newselect            142
-#define __NR_ia32_flock         143
-#define __NR_ia32_msync         144
-#define __NR_ia32_readv         145
-#define __NR_ia32_writev                146
-#define __NR_ia32_getsid                147
-#define __NR_ia32_fdatasync             148
-#define __NR_ia32__sysctl               149
-#define __NR_ia32_mlock         150
-#define __NR_ia32_munlock               151
-#define __NR_ia32_mlockall              152
-#define __NR_ia32_munlockall            153
-#define __NR_ia32_sched_setparam                154
-#define __NR_ia32_sched_getparam                155
-#define __NR_ia32_sched_setscheduler            156
-#define __NR_ia32_sched_getscheduler            157
-#define __NR_ia32_sched_yield           158
-#define __NR_ia32_sched_get_priority_max        159
-#define __NR_ia32_sched_get_priority_min        160
-#define __NR_ia32_sched_rr_get_interval 161
-#define __NR_ia32_nanosleep             162
-#define __NR_ia32_mremap                163
-#define __NR_ia32_setresuid             164
-#define __NR_ia32_getresuid             165
-#define __NR_ia32_vm86          166
-#define __NR_ia32_query_module  167
-#define __NR_ia32_poll          168
-#define __NR_ia32_nfsservctl            169
-#define __NR_ia32_setresgid             170
-#define __NR_ia32_getresgid             171
-#define __NR_ia32_prctl              172
 #define __NR_ia32_rt_sigreturn  173
-#define __NR_ia32_rt_sigaction  174
-#define __NR_ia32_rt_sigprocmask        175
-#define __NR_ia32_rt_sigpending 176
-#define __NR_ia32_rt_sigtimedwait       177
-#define __NR_ia32_rt_sigqueueinfo       178
-#define __NR_ia32_rt_sigsuspend 179
-#define __NR_ia32_pread         180
-#define __NR_ia32_pwrite                181
-#define __NR_ia32_chown         182
-#define __NR_ia32_getcwd                183
-#define __NR_ia32_capget                184
-#define __NR_ia32_capset                185
-#define __NR_ia32_sigaltstack   186
-#define __NR_ia32_sendfile              187
-#define __NR_ia32_getpmsg               188     /* some people actually want streams */
-#define __NR_ia32_putpmsg               189     /* some people actually want streams */
-#define __NR_ia32_vfork         190
-#define __NR_ia32_ugetrlimit            191     /* SuS compliant getrlimit */
-#define __NR_ia32_mmap2         192
-#define __NR_ia32_truncate64            193
-#define __NR_ia32_ftruncate64   194
-#define __NR_ia32_stat64                195
-#define __NR_ia32_lstat64               196
-#define __NR_ia32_fstat64               197
-#define __NR_ia32_lchown32              198
-#define __NR_ia32_getuid32              199
-#define __NR_ia32_getgid32              200
-#define __NR_ia32_geteuid32             201
-#define __NR_ia32_getegid32             202
-#define __NR_ia32_setreuid32            203
-#define __NR_ia32_setregid32            204
-#define __NR_ia32_getgroups32   205
-#define __NR_ia32_setgroups32   206
-#define __NR_ia32_fchown32              207
-#define __NR_ia32_setresuid32   208
-#define __NR_ia32_getresuid32   209
-#define __NR_ia32_setresgid32   210
-#define __NR_ia32_getresgid32   211
-#define __NR_ia32_chown32               212
-#define __NR_ia32_setuid32              213
-#define __NR_ia32_setgid32              214
-#define __NR_ia32_setfsuid32            215
-#define __NR_ia32_setfsgid32            216
-#define __NR_ia32_pivot_root            217
-#define __NR_ia32_mincore               218
-#define __NR_ia32_madvise               219
-#define __NR_ia32_madvise1              219     /* delete when C lib stub is removed */
-#define __NR_ia32_getdents64            220
-#define __NR_ia32_fcntl64               221
-#define __NR_ia32_tuxcall               222
-#define __NR_ia32_security              223
-#define __NR_ia32_gettid                224
-#define __NR_ia32_readahead             225
-#define __NR_ia32_setxattr              226
-#define __NR_ia32_lsetxattr             227
-#define __NR_ia32_fsetxattr             228
-#define __NR_ia32_getxattr              229
-#define __NR_ia32_lgetxattr             230
-#define __NR_ia32_fgetxattr             231
-#define __NR_ia32_listxattr             232
-#define __NR_ia32_llistxattr            233
-#define __NR_ia32_flistxattr            234
-#define __NR_ia32_removexattr   235
-#define __NR_ia32_lremovexattr  236
-#define __NR_ia32_fremovexattr  237
-#define __NR_ia32_tkill         238
-#define __NR_ia32_sendfile64            239
-#define __NR_ia32_futex         240
-#define __NR_ia32_sched_setaffinity     241
-#define __NR_ia32_sched_getaffinity     242
-#define __NR_ia32_set_thread_area   243
-#define __NR_ia32_get_thread_area       244
-#define __NR_ia32_io_setup              245
-#define __NR_ia32_io_destroy            246
-#define __NR_ia32_io_getevents  247
-#define __NR_ia32_io_submit             248
-#define __NR_ia32_io_cancel             249
-#define __NR_ia32_exit_group            252
-#define __NR_ia32_lookup_dcookie        253
-#define __NR_ia32_sys_epoll_create      254
-#define __NR_ia32_sys_epoll_ctl 255
-#define __NR_ia32_sys_epoll_wait        256
-#define __NR_ia32_remap_file_pages      257
-#define __NR_ia32_set_tid_address       258
-#define __NR_ia32_timer_create          259
-#define __NR_ia32_timer_settime (__NR_ia32_timer_create+1)
-#define __NR_ia32_timer_gettime (__NR_ia32_timer_create+2)
-#define __NR_ia32_timer_getoverrun      (__NR_ia32_timer_create+3)
-#define __NR_ia32_timer_delete  (__NR_ia32_timer_create+4)
-#define __NR_ia32_clock_settime (__NR_ia32_timer_create+5)
-#define __NR_ia32_clock_gettime (__NR_ia32_timer_create+6)
-#define __NR_ia32_clock_getres  (__NR_ia32_timer_create+7)
-#define __NR_ia32_clock_nanosleep       (__NR_ia32_timer_create+8)
-#define __NR_ia32_statfs64              268
-#define __NR_ia32_fstatfs64             269
-#define __NR_ia32_tgkill                270
-#define __NR_ia32_utimes                271
-#define __NR_ia32_fadvise64_64          272
-#define __NR_ia32_vserver               273
-#define __NR_ia32_mbind         274
-#define __NR_ia32_get_mempolicy 275
-#define __NR_ia32_set_mempolicy 276
-#define __NR_ia32_mq_open               277
-#define __NR_ia32_mq_unlink             (__NR_ia32_mq_open+1)
-#define __NR_ia32_mq_timedsend  (__NR_ia32_mq_open+2)
-#define __NR_ia32_mq_timedreceive       (__NR_ia32_mq_open+3)
-#define __NR_ia32_mq_notify             (__NR_ia32_mq_open+4)
-#define __NR_ia32_mq_getsetattr (__NR_ia32_mq_open+5)
-#define __NR_ia32_kexec         283
-#define __NR_ia32_waitid                284
-/* #define __NR_sys_setaltroot  285 */
-#define __NR_ia32_add_key               286
-#define __NR_ia32_request_key   287
-#define __NR_ia32_keyctl                288
-#define __NR_ia32_ioprio_set            289
-#define __NR_ia32_ioprio_get            290
-#define __NR_ia32_inotify_init          291
-#define __NR_ia32_inotify_add_watch     292
-#define __NR_ia32_inotify_rm_watch      293
-#define __NR_ia32_migrate_pages         294
-#define __NR_ia32_openat                295
-#define __NR_ia32_mkdirat               296
-#define __NR_ia32_mknodat               297
-#define __NR_ia32_fchownat              298
-#define __NR_ia32_futimesat             299
-#define __NR_ia32_fstatat64             300
-#define __NR_ia32_unlinkat              301
-#define __NR_ia32_renameat              302
-#define __NR_ia32_linkat                303
-#define __NR_ia32_symlinkat             304
-#define __NR_ia32_readlinkat            305
-#define __NR_ia32_fchmodat              306
-#define __NR_ia32_faccessat             307
-#define __NR_ia32_pselect6              308
-#define __NR_ia32_ppoll                 309
-#define __NR_ia32_unshare               310
 #endif /* _ASM_X86_64_IA32_UNISTD_H_ */
diff --git a/include/asm-x86_64/intel_arch_perfmon.h b/include/asm-x86_64/intel_arch_perfmon.h
new file mode 100644
index 0000000000..59c3964315
--- /dev/null
+++ b/include/asm-x86_64/intel_arch_perfmon.h
@@ -0,0 +1,19 @@
+#ifndef X86_64_INTEL_ARCH_PERFMON_H
+#define X86_64_INTEL_ARCH_PERFMON_H 1
+#define MSR_ARCH_PERFMON_PERFCTR0               0xc1
+#define MSR_ARCH_PERFMON_PERFCTR1               0xc2
+#define MSR_ARCH_PERFMON_EVENTSEL0              0x186
+#define MSR_ARCH_PERFMON_EVENTSEL1              0x187
+#define ARCH_PERFMON_EVENTSEL0_ENABLE      (1 << 22)
+#define ARCH_PERFMON_EVENTSEL_INT          (1 << 20)
+#define ARCH_PERFMON_EVENTSEL_OS           (1 << 17)
+#define ARCH_PERFMON_EVENTSEL_USR          (1 << 16)
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL   (0x3c)
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_UMASK (0x00 << 8)
+#define ARCH_PERFMON_UNHALTED_CORE_CYCLES_PRESENT (1 << 0)
+#endif  /* X86_64_INTEL_ARCH_PERFMON_H */
diff --git a/include/asm-x86_64/k8.h b/include/asm-x86_64/k8.h
new file mode 100644
index 0000000000..699dd6961e
--- /dev/null
+++ b/include/asm-x86_64/k8.h
@@ -0,0 +1,14 @@
+#ifndef _ASM_K8_H
+#define _ASM_K8_H 1
+#include <linux/pci.h>
+extern struct pci_device_id k8_nb_ids[];
+extern int early_is_k8_nb(u32 value);
+extern struct pci_dev **k8_northbridges;
+extern int num_k8_northbridges;
+extern int cache_k8_northbridges(void);
+extern void k8_flush_garts(void);
+#endif
diff --git a/include/asm-x86_64/kdebug.h b/include/asm-x86_64/kdebug.h
index cf795631d9..cd52c7f33b 100644
--- a/include/asm-x86_64/kdebug.h
+++ b/include/asm-x86_64/kdebug.h
@@ -15,6 +15,8 @@ struct die_args {
 extern int register_die_notifier(struct notifier_block *);
 extern int unregister_die_notifier(struct notifier_block *);
+extern int register_page_fault_notifier(struct notifier_block *);
+extern int unregister_page_fault_notifier(struct notifier_block *);
 extern struct atomic_notifier_head die_chain;
 /* Grossly misnamed. */
diff --git a/include/asm-x86_64/kprobes.h b/include/asm-x86_64/kprobes.h
index 98a1e95ddb..d36febd9bb 100644
--- a/include/asm-x86_64/kprobes.h
+++ b/include/asm-x86_64/kprobes.h
@@ -43,6 +43,7 @@ typedef u8 kprobe_opcode_t;
 #define JPROBE_ENTRY(pentry)    (kprobe_opcode_t *)pentry
 #define ARCH_SUPPORTS_KRETPROBES
+#define  ARCH_INACTIVE_KPROBE_COUNT 1
 void kretprobe_trampoline(void);
 extern void arch_remove_kprobe(struct kprobe *p);
diff --git a/include/asm-x86_64/local.h b/include/asm-x86_64/local.h
index cd17945bf2..e769e62002 100644
--- a/include/asm-x86_64/local.h
+++ b/include/asm-x86_64/local.h
@@ -59,12 +59,26 @@ static inline void local_sub(long i, local_t *v)
 * This could be done better if we moved the per cpu data directly
 * after GS.
 */
-#define cpu_local_read(v)       local_read(&__get_cpu_var(v))
-#define cpu_local_set(v, i)     local_set(&__get_cpu_var(v), (i))
+/* Need to disable preemption for the cpu local counters otherwise we could
-#define cpu_local_inc(v)        local_inc(&__get_cpu_var(v))
+   still access a variable of a previous CPU in a non atomic way. */
-#define cpu_local_dec(v)        local_dec(&__get_cpu_var(v))
+#define cpu_local_wrap_v(v)             \
-#define cpu_local_add(i, v)     local_add((i), &__get_cpu_var(v))
+        ({ local_t res__;               \
-#define cpu_local_sub(i, v)     local_sub((i), &__get_cpu_var(v))
+           preempt_disable();           \
+           res__ = (v);                 \
+           preempt_enable();            \
+           res__; })
+#define cpu_local_wrap(v)               \
+        ({ preempt_disable();           \
+           v;                           \
+           preempt_enable(); })         \
+#define cpu_local_read(v)    cpu_local_wrap_v(local_read(&__get_cpu_var(v)))
+#define cpu_local_set(v, i)  cpu_local_wrap(local_set(&__get_cpu_var(v), (i)))
+#define cpu_local_inc(v)     cpu_local_wrap(local_inc(&__get_cpu_var(v)))
+#define cpu_local_dec(v)     cpu_local_wrap(local_dec(&__get_cpu_var(v)))
+#define cpu_local_add(i, v)  cpu_local_wrap(local_add((i), &__get_cpu_var(v)))
+#define cpu_local_sub(i, v)  cpu_local_wrap(local_sub((i), &__get_cpu_var(v)))
 #define __cpu_local_inc(v)      cpu_local_inc(v)
 #define __cpu_local_dec(v)      cpu_local_dec(v)
diff --git a/include/asm-x86_64/mce.h b/include/asm-x86_64/mce.h
index 7229785094..d13687dfd6 100644
--- a/include/asm-x86_64/mce.h
+++ b/include/asm-x86_64/mce.h
@@ -67,13 +67,22 @@ struct mce_log {
 /* Software defined banks */
 #define MCE_EXTENDED_BANK       128
 #define MCE_THERMAL_BANK        MCE_EXTENDED_BANK + 0
-#define MCE_THRESHOLD_BASE      MCE_EXTENDED_BANK + 1 /* MCE_AMD */
-#define MCE_THRESHOLD_DRAM_ECC  MCE_THRESHOLD_BASE + 4
+#define K8_MCE_THRESHOLD_BASE      (MCE_EXTENDED_BANK + 1)      /* MCE_AMD */
+#define K8_MCE_THRESHOLD_BANK_0    (MCE_THRESHOLD_BASE + 0 * 9)
+#define K8_MCE_THRESHOLD_BANK_1    (MCE_THRESHOLD_BASE + 1 * 9)
+#define K8_MCE_THRESHOLD_BANK_2    (MCE_THRESHOLD_BASE + 2 * 9)
+#define K8_MCE_THRESHOLD_BANK_3    (MCE_THRESHOLD_BASE + 3 * 9)
+#define K8_MCE_THRESHOLD_BANK_4    (MCE_THRESHOLD_BASE + 4 * 9)
+#define K8_MCE_THRESHOLD_BANK_5    (MCE_THRESHOLD_BASE + 5 * 9)
+#define K8_MCE_THRESHOLD_DRAM_ECC  (MCE_THRESHOLD_BANK_4 + 0)
 #ifdef __KERNEL__
 #include <asm/atomic.h>
 void mce_log(struct mce *m);
+DECLARE_PER_CPU(struct sys_device, device_mce);
 #ifdef CONFIG_X86_MCE_INTEL
 void mce_intel_feature_init(struct cpuinfo_x86 *c);
 #else
diff --git a/include/asm-x86_64/mutex.h b/include/asm-x86_64/mutex.h
index 11fbee2bd6..06fab6de2a 100644
--- a/include/asm-x86_64/mutex.h
+++ b/include/asm-x86_64/mutex.h
@@ -24,7 +24,7 @@ do {									\
        typecheck_fn(fastcall void (*)(atomic_t *), fail_fn);           \
                                                                        \
        __asm__ __volatile__(                                           \
-                LOCK    "   decl (%%rdi)        \n"                     \
+                LOCK_PREFIX "   decl (%%rdi)    \n"                     \
                        "   js 2f               \n"                     \
                        "1:                     \n"                     \
                                                                        \
@@ -74,7 +74,7 @@ do {									\
        typecheck_fn(fastcall void (*)(atomic_t *), fail_fn);           \
                                                                        \
        __asm__ __volatile__(                                           \
-                LOCK    "   incl (%%rdi)        \n"                     \
+                LOCK_PREFIX "   incl (%%rdi)    \n"                     \
                        "   jle 2f              \n"                     \
                        "1:                     \n"                     \
                                                                        \
diff --git a/include/asm-x86_64/nmi.h b/include/asm-x86_64/nmi.h
index d3abfc6a8f..efb45c894d 100644
--- a/include/asm-x86_64/nmi.h
+++ b/include/asm-x86_64/nmi.h
@@ -5,26 +5,27 @@
 #define ASM_NMI_H
 #include <linux/pm.h>
+#include <asm/io.h>
 
 struct pt_regs;
- 
 typedef int (*nmi_callback_t)(struct pt_regs * regs, int cpu);
- 
-/** 
+/**
 * set_nmi_callback
 *
 * Set a handler for an NMI. Only one handler may be
 * set. Return 1 if the NMI was handled.
 */
 void set_nmi_callback(nmi_callback_t callback);
- 
-/** 
+/**
 * unset_nmi_callback
 *
 * Remove the handler previously set.
 */
 void unset_nmi_callback(void);
- 
 #ifdef CONFIG_PM
 
 /** Replace the PM callback routine for NMI. */
@@ -56,4 +57,21 @@ extern int unknown_nmi_panic;
 extern int check_nmi_watchdog(void);
 
+extern void setup_apic_nmi_watchdog (void);
+extern int reserve_lapic_nmi(void);
+extern void release_lapic_nmi(void);
+extern void disable_timer_nmi_watchdog(void);
+extern void enable_timer_nmi_watchdog(void);
+extern void nmi_watchdog_tick (struct pt_regs * regs, unsigned reason);
+extern void nmi_watchdog_default(void);
+extern int setup_nmi_watchdog(char *);
+extern unsigned int nmi_watchdog;
+#define NMI_DEFAULT     -1
+#define NMI_NONE        0
+#define NMI_IO_APIC     1
+#define NMI_LOCAL_APIC  2
+#define NMI_INVALID     3
 #endif /* ASM_NMI_H */
diff --git a/include/asm-x86_64/pci.h b/include/asm-x86_64/pci.h
index 2db0620d54..49c5e92805 100644
--- a/include/asm-x86_64/pci.h
+++ b/include/asm-x86_64/pci.h
@@ -39,8 +39,8 @@ int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
 #include <asm/scatterlist.h>
 #include <linux/string.h>
 #include <asm/page.h>
-#include <linux/dma-mapping.h> /* for have_iommu */
+extern void pci_iommu_alloc(void);
 extern int iommu_setup(char *opt);
 /* The PCI address space does equal the physical memory
@@ -52,7 +52,7 @@ extern int iommu_setup(char *opt);
 */
 #define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
-#ifdef CONFIG_GART_IOMMU
+#if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
 /*
 * x86-64 always supports DAC, but sometimes it is useful to force
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index 31e83c3bd0..a31ab4e68a 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -337,14 +337,8 @@ static inline int pmd_large(pmd_t pte) {
 /* to find an entry in a page-table-directory. */
 #define pud_index(address) (((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
 #define pud_offset(pgd, address) ((pud_t *) pgd_page(*(pgd)) + pud_index(address))
-#define pud_offset_k(pgd, addr) pud_offset(pgd, addr)
 #define pud_present(pud) (pud_val(pud) & _PAGE_PRESENT)
-static inline pud_t *__pud_offset_k(pud_t *pud, unsigned long address)
-{ 
-        return pud + pud_index(address);
-} 
 /* PMD  - Level 2 access */
 #define pmd_page_kernel(pmd) ((unsigned long) __va(pmd_val(pmd) & PTE_MASK))
 #define pmd_page(pmd)           (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 3061a38a3b..3b3c1217fe 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -69,7 +69,11 @@ struct cpuinfo_x86 {
        cpumask_t llc_shared_map;       /* cpus sharing the last level cache */
 #endif
        __u8    apicid;
+#ifdef CONFIG_SMP
        __u8    booted_cores;   /* number of cores as seen by OS */
+        __u8    phys_proc_id;   /* Physical Processor id. */
+        __u8    cpu_core_id;    /* Core id. */
+#endif
 } ____cacheline_aligned;
 #define X86_VENDOR_INTEL 0
@@ -96,6 +100,7 @@ extern char ignore_irq13;
 extern void identify_cpu(struct cpuinfo_x86 *);
 extern void print_cpu_info(struct cpuinfo_x86 *);
 extern unsigned int init_intel_cacheinfo(struct cpuinfo_x86 *c);
+extern unsigned short num_cache_leaves;
 /*
 * EFLAGS bits
diff --git a/include/asm-x86_64/proto.h b/include/asm-x86_64/proto.h
index 8abf2a43c9..038fe1f47e 100644
--- a/include/asm-x86_64/proto.h
+++ b/include/asm-x86_64/proto.h
@@ -37,7 +37,6 @@ extern void ia32_sysenter_target(void);
 extern void config_acpi_tables(void);
 extern void ia32_syscall(void);
-extern void iommu_hole_init(void);
 extern int pmtimer_mark_offset(void);
 extern void pmtimer_resume(void);
@@ -75,7 +74,7 @@ extern void main_timer_handler(struct pt_regs *regs);
 extern unsigned long end_pfn_map; 
-extern void show_trace(unsigned long * rsp);
+extern void show_trace(struct task_struct *, struct pt_regs *, unsigned long * rsp);
 extern void show_registers(struct pt_regs *regs);
 extern void exception_table_check(void);
@@ -101,13 +100,9 @@ extern int unsynchronized_tsc(void);
 extern void select_idle_routine(const struct cpuinfo_x86 *c);
-extern void gart_parse_options(char *);
-extern void __init no_iommu_init(void);
 extern unsigned long table_start, table_end;
 extern int exception_trace;
-extern int force_iommu, no_iommu;
 extern int using_apic_timer;
 extern int disable_apic;
 extern unsigned cpu_khz;
@@ -116,7 +111,13 @@ extern int skip_ioapic_setup;
 extern int acpi_ht;
 extern int acpi_disabled;
-#ifdef CONFIG_GART_IOMMU
+extern void no_iommu_init(void);
+extern int force_iommu, no_iommu;
+extern int iommu_detected;
+#ifdef CONFIG_IOMMU
+extern void gart_iommu_init(void);
+extern void gart_parse_options(char *);
+extern void iommu_hole_init(void);
 extern int fallback_aper_order;
 extern int fallback_aper_force;
 extern int iommu_aperture;
diff --git a/include/asm-x86_64/rwlock.h b/include/asm-x86_64/rwlock.h
index 9942cc3930..dea0e94592 100644
--- a/include/asm-x86_64/rwlock.h
+++ b/include/asm-x86_64/rwlock.h
@@ -24,7 +24,7 @@
 #define RW_LOCK_BIAS_STR        "0x01000000"
 #define __build_read_lock_ptr(rw, helper)   \
-        asm volatile(LOCK "subl $1,(%0)\n\t" \
+        asm volatile(LOCK_PREFIX "subl $1,(%0)\n\t" \
                     "js 2f\n" \
                     "1:\n" \
                    LOCK_SECTION_START("") \
@@ -34,7 +34,7 @@
                     ::"a" (rw) : "memory")
 #define __build_read_lock_const(rw, helper)   \
-        asm volatile(LOCK "subl $1,%0\n\t" \
+        asm volatile(LOCK_PREFIX "subl $1,%0\n\t" \
                     "js 2f\n" \
                     "1:\n" \
                    LOCK_SECTION_START("") \
@@ -54,7 +54,7 @@
                                        } while (0)
 #define __build_write_lock_ptr(rw, helper) \
-        asm volatile(LOCK "subl $" RW_LOCK_BIAS_STR ",(%0)\n\t" \
+        asm volatile(LOCK_PREFIX "subl $" RW_LOCK_BIAS_STR ",(%0)\n\t" \
                     "jnz 2f\n" \
                     "1:\n" \
                     LOCK_SECTION_START("") \
@@ -64,7 +64,7 @@
                     ::"a" (rw) : "memory")
 #define __build_write_lock_const(rw, helper) \
-        asm volatile(LOCK "subl $" RW_LOCK_BIAS_STR ",%0\n\t" \
+        asm volatile(LOCK_PREFIX "subl $" RW_LOCK_BIAS_STR ",%0\n\t" \
                     "jnz 2f\n" \
                     "1:\n" \
                    LOCK_SECTION_START("") \
diff --git a/include/asm-x86_64/semaphore.h b/include/asm-x86_64/semaphore.h
index a389aa6fe8..064df08b9a 100644
--- a/include/asm-x86_64/semaphore.h
+++ b/include/asm-x86_64/semaphore.h
@@ -106,7 +106,7 @@ static inline void down(struct semaphore * sem)
        __asm__ __volatile__(
                "# atomic down operation\n\t"
-                LOCK "decl %0\n\t"     /* --sem->count */
+                LOCK_PREFIX "decl %0\n\t"     /* --sem->count */
                "js 2f\n"
                "1:\n"
                LOCK_SECTION_START("")
@@ -130,7 +130,7 @@ static inline int down_interruptible(struct semaphore * sem)
        __asm__ __volatile__(
                "# atomic interruptible down operation\n\t"
-                LOCK "decl %1\n\t"     /* --sem->count */
+                LOCK_PREFIX "decl %1\n\t"     /* --sem->count */
                "js 2f\n\t"
                "xorl %0,%0\n"
                "1:\n"
@@ -154,7 +154,7 @@ static inline int down_trylock(struct semaphore * sem)
        __asm__ __volatile__(
                "# atomic interruptible down operation\n\t"
-                LOCK "decl %1\n\t"     /* --sem->count */
+                LOCK_PREFIX "decl %1\n\t"     /* --sem->count */
                "js 2f\n\t"
                "xorl %0,%0\n"
                "1:\n"
@@ -178,7 +178,7 @@ static inline void up(struct semaphore * sem)
 {
        __asm__ __volatile__(
                "# atomic up operation\n\t"
-                LOCK "incl %0\n\t"     /* ++sem->count */
+                LOCK_PREFIX "incl %0\n\t"     /* ++sem->count */
                "jle 2f\n"
                "1:\n"
                LOCK_SECTION_START("")
diff --git a/include/asm-x86_64/smp.h b/include/asm-x86_64/smp.h
index 7686b9b25a..6805e1feb3 100644
--- a/include/asm-x86_64/smp.h
+++ b/include/asm-x86_64/smp.h
@@ -53,8 +53,6 @@ extern int smp_call_function_single(int cpuid, void (*func) (void *info),
 extern cpumask_t cpu_sibling_map[NR_CPUS];
 extern cpumask_t cpu_core_map[NR_CPUS];
-extern u8 phys_proc_id[NR_CPUS];
-extern u8 cpu_core_id[NR_CPUS];
 extern u8 cpu_llc_id[NR_CPUS];
 #define SMP_TRAMPOLINE_BASE 0x6000
diff --git a/include/asm-x86_64/spinlock.h b/include/asm-x86_64/spinlock.h
index 5d8a5e3589..8d3421996f 100644
--- a/include/asm-x86_64/spinlock.h
+++ b/include/asm-x86_64/spinlock.h
@@ -31,15 +31,19 @@
        "jmp 1b\n" \
        LOCK_SECTION_END
+#define __raw_spin_lock_string_up \
+        "\n\tdecl %0"
 #define __raw_spin_unlock_string \
        "movl $1,%0" \
                :"=m" (lock->slock) : : "memory"
 static inline void __raw_spin_lock(raw_spinlock_t *lock)
 {
-        __asm__ __volatile__(
+        alternative_smp(
-                __raw_spin_lock_string
+                __raw_spin_lock_string,
-                :"=m" (lock->slock) : : "memory");
+                __raw_spin_lock_string_up,
+                "=m" (lock->slock) : : "memory");
 }
 #define __raw_spin_lock_flags(lock, flags) __raw_spin_lock(lock)
diff --git a/include/asm-x86_64/string.h b/include/asm-x86_64/string.h
index ee6bf27534..9505d9f4be 100644
--- a/include/asm-x86_64/string.h
+++ b/include/asm-x86_64/string.h
@@ -6,7 +6,8 @@
 /* Written 2002 by Andi Kleen */ 
 /* Only used for special circumstances. Stolen from i386/string.h */ 
-static inline void * __inline_memcpy(void * to, const void * from, size_t n)
+static __always_inline void *
+__inline_memcpy(void * to, const void * from, size_t n)
 {
 unsigned long d0, d1, d2;
 __asm__ __volatile__(
diff --git a/include/asm-x86_64/system.h b/include/asm-x86_64/system.h
index f48e0dad8b..68e559f363 100644
--- a/include/asm-x86_64/system.h
+++ b/include/asm-x86_64/system.h
@@ -3,15 +3,10 @@
 #include <linux/kernel.h>
 #include <asm/segment.h>
+#include <asm/alternative.h>
 #ifdef __KERNEL__
-#ifdef CONFIG_SMP
-#define LOCK_PREFIX "lock ; "
-#else
-#define LOCK_PREFIX ""
-#endif
 #define __STR(x) #x
 #define STR(x) __STR(x)
@@ -34,7 +29,7 @@
                     "thread_return:\n\t"                                           \
                     "movq %%gs:%P[pda_pcurrent],%%rsi\n\t"                       \
                     "movq %P[thread_info](%%rsi),%%r8\n\t"                       \
-                     LOCK "btr  %[tif_fork],%P[ti_flags](%%r8)\n\t"               \
+                     LOCK_PREFIX "btr  %[tif_fork],%P[ti_flags](%%r8)\n\t"        \
                     "movq %%rax,%%rdi\n\t"                                       \
                     "jc   ret_from_fork\n\t"                                     \
                     RESTORE_CONTEXT                                                \
@@ -69,82 +64,6 @@ extern void load_gs_index(unsigned);
                ".previous"                     \
                : :"r" (value), "r" (0))
-#ifdef __KERNEL__
-struct alt_instr { 
-        __u8 *instr;            /* original instruction */
-        __u8 *replacement;
-        __u8  cpuid;            /* cpuid bit set for replacement */
-        __u8  instrlen;         /* length of original instruction */
-        __u8  replacementlen;   /* length of new instruction, <= instrlen */ 
-        __u8  pad[5];
-}; 
-#endif
-/*
- * Alternative instructions for different CPU types or capabilities.
- * 
- * This allows to use optimized instructions even on generic binary
- * kernels.
- * 
- * length of oldinstr must be longer or equal the length of newinstr
- * It can be padded with nops as needed.
- * 
- * For non barrier like inlines please define new variants
- * without volatile and memory clobber.
- */
-#define alternative(oldinstr, newinstr, feature)        \
-        asm volatile ("661:\n\t" oldinstr "\n662:\n"                 \
-                      ".section .altinstructions,\"a\"\n"            \
-                      "  .align 8\n"                                   \
-                      "  .quad 661b\n"            /* label */          \
-                      "  .quad 663f\n"            /* new instruction */ \
-                      "  .byte %c0\n"             /* feature bit */    \
-                      "  .byte 662b-661b\n"       /* sourcelen */      \
-                      "  .byte 664f-663f\n"       /* replacementlen */ \
-                      ".previous\n"                                     \
-                      ".section .altinstr_replacement,\"ax\"\n"         \
-                      "663:\n\t" newinstr "\n664:\n"   /* replacement */ \
-                      ".previous" :: "i" (feature) : "memory")  
-/*
- * Alternative inline assembly with input.
- * 
- * Peculiarities:
- * No memory clobber here. 
- * Argument numbers start with 1.
- * Best is to use constraints that are fixed size (like (%1) ... "r")
- * If you use variable sized constraints like "m" or "g" in the 
- * replacement make sure to pad to the worst case length.
- */
-#define alternative_input(oldinstr, newinstr, feature, input...)        \
-        asm volatile ("661:\n\t" oldinstr "\n662:\n"                    \
-                      ".section .altinstructions,\"a\"\n"               \
-                      "  .align 8\n"                                    \
-                      "  .quad 661b\n"            /* label */           \
-                      "  .quad 663f\n"            /* new instruction */ \
-                      "  .byte %c0\n"             /* feature bit */     \
-                      "  .byte 662b-661b\n"       /* sourcelen */       \
-                      "  .byte 664f-663f\n"       /* replacementlen */  \
-                      ".previous\n"                                     \
-                      ".section .altinstr_replacement,\"ax\"\n"         \
-                      "663:\n\t" newinstr "\n664:\n"   /* replacement */ \
-                      ".previous" :: "i" (feature), ##input)
-/* Like alternative_input, but with a single output argument */
-#define alternative_io(oldinstr, newinstr, feature, output, input...) \
-        asm volatile ("661:\n\t" oldinstr "\n662:\n"                    \
-                      ".section .altinstructions,\"a\"\n"               \
-                      "  .align 8\n"                                    \
-                      "  .quad 661b\n"            /* label */           \
-                      "  .quad 663f\n"            /* new instruction */ \
-                      "  .byte %c[feat]\n"        /* feature bit */     \
-                      "  .byte 662b-661b\n"       /* sourcelen */       \
-                      "  .byte 664f-663f\n"       /* replacementlen */  \
-                      ".previous\n"                                     \
-                      ".section .altinstr_replacement,\"ax\"\n"         \
-                      "663:\n\t" newinstr "\n664:\n"   /* replacement */ \
-                      ".previous" : output : [feat] "i" (feature), ##input)
 /*
 * Clear and set 'TS' bit respectively
 */
@@ -366,5 +285,6 @@ static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
 void cpu_idle_wait(void);
 extern unsigned long arch_align_stack(unsigned long sp);
+extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
 #endif
diff --git a/include/asm-x86_64/tce.h b/include/asm-x86_64/tce.h
new file mode 100644
index 0000000000..ee51d31528
--- /dev/null
+++ b/include/asm-x86_64/tce.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2006 Muli Ben-Yehuda <muli@il.ibm.com>, IBM Corporation
+ * Copyright (C) 2006 Jon Mason <jdmason@us.ibm.com>, IBM Corporation
+ *
+ * This file is derived from asm-powerpc/tce.h.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
+ */
+#ifndef _ASM_X86_64_TCE_H
+#define _ASM_X86_64_TCE_H
+extern void* tce_table_kva[];
+extern unsigned int specified_table_size;
+struct iommu_table;
+#define TCE_ENTRY_SIZE   8   /* in bytes */
+#define TCE_READ_SHIFT   0
+#define TCE_WRITE_SHIFT  1
+#define TCE_HUBID_SHIFT  2   /* unused */
+#define TCE_RSVD_SHIFT   8   /* unused */
+#define TCE_RPN_SHIFT    12
+#define TCE_UNUSED_SHIFT 48  /* unused */
+#define TCE_RPN_MASK     0x0000fffffffff000ULL
+extern void tce_build(struct iommu_table *tbl, unsigned long index,
+        unsigned int npages, unsigned long uaddr, int direction);
+extern void tce_free(struct iommu_table *tbl, long index, unsigned int npages);
+extern void* alloc_tce_table(void);
+extern void free_tce_table(void *tbl);
+extern int build_tce_table(struct pci_dev *dev, void __iomem *bbar);
+#endif /* _ASM_X86_64_TCE_H */
diff --git a/include/asm-x86_64/thread_info.h b/include/asm-x86_64/thread_info.h
index 4ac0e0a369..2029b00351 100644
--- a/include/asm-x86_64/thread_info.h
+++ b/include/asm-x86_64/thread_info.h
@@ -73,8 +73,21 @@ static inline struct thread_info *stack_thread_info(void)
 }
 /* thread information allocation */
+#ifdef CONFIG_DEBUG_STACK_USAGE
+#define alloc_thread_info(tsk)                                  \
+    ({                                                          \
+        struct thread_info *ret;                                \
+                                                                \
+        ret = ((struct thread_info *) __get_free_pages(GFP_KERNEL,THREAD_ORDER)); \
+        if (ret)                                                \
+                memset(ret, 0, THREAD_SIZE);                    \
+        ret;                                                    \
+    })
+#else
 #define alloc_thread_info(tsk) \
        ((struct thread_info *) __get_free_pages(GFP_KERNEL,THREAD_ORDER))
+#endif
 #define free_thread_info(ti) free_pages((unsigned long) (ti), THREAD_ORDER)
 #else /* !__ASSEMBLY__ */
@@ -101,7 +114,7 @@ static inline struct thread_info *stack_thread_info(void)
 #define TIF_IRET                5       /* force IRET */
 #define TIF_SYSCALL_AUDIT       7       /* syscall auditing active */
 #define TIF_SECCOMP             8       /* secure computing */
-#define TIF_POLLING_NRFLAG      16      /* true if poll_idle() is polling TIF_NEED_RESCHED */
+/* 16 free */
 #define TIF_IA32                17      /* 32bit process */ 
 #define TIF_FORK                18      /* ret_from_fork */
 #define TIF_ABI_PENDING         19
@@ -115,7 +128,6 @@ static inline struct thread_info *stack_thread_info(void)
 #define _TIF_IRET               (1<<TIF_IRET)
 #define _TIF_SYSCALL_AUDIT      (1<<TIF_SYSCALL_AUDIT)
 #define _TIF_SECCOMP            (1<<TIF_SECCOMP)
-#define _TIF_POLLING_NRFLAG     (1<<TIF_POLLING_NRFLAG)
 #define _TIF_IA32               (1<<TIF_IA32)
 #define _TIF_FORK               (1<<TIF_FORK)
 #define _TIF_ABI_PENDING        (1<<TIF_ABI_PENDING)
@@ -137,6 +149,9 @@ static inline struct thread_info *stack_thread_info(void)
 */
 #define TS_USEDFPU              0x0001  /* FPU was used by this task this quantum (SMP) */
 #define TS_COMPAT               0x0002  /* 32bit syscall active */
+#define TS_POLLING              0x0004  /* true if in idle loop and not sleeping */
+#define tsk_is_polling(t) ((t)->thread_info->status & TS_POLLING)
 #endif /* __KERNEL__ */
diff --git a/include/asm-x86_64/topology.h b/include/asm-x86_64/topology.h
index 80c4e44d01..6e7a2e976b 100644
--- a/include/asm-x86_64/topology.h
+++ b/include/asm-x86_64/topology.h
@@ -7,8 +7,6 @@
 #include <asm/mpspec.h>
 #include <asm/bitops.h>
-/* Map the K8 CPU local memory controllers to a simple 1:1 CPU:NODE topology */
 extern cpumask_t cpu_online_map;
 extern unsigned char cpu_to_node[];
@@ -57,12 +55,12 @@ extern int __node_distance(int, int);
 #endif
 #ifdef CONFIG_SMP
-#define topology_physical_package_id(cpu)                               \
+#define topology_physical_package_id(cpu)       (cpu_data[cpu].phys_proc_id)
-        (phys_proc_id[cpu] == BAD_APICID ? -1 : phys_proc_id[cpu])
+#define topology_core_id(cpu)                   (cpu_data[cpu].cpu_core_id)
-#define topology_core_id(cpu)                                           \
-        (cpu_core_id[cpu] == BAD_APICID ? 0 : cpu_core_id[cpu])
 #define topology_core_siblings(cpu)             (cpu_core_map[cpu])
 #define topology_thread_siblings(cpu)           (cpu_sibling_map[cpu])
+#define mc_capable()                    (boot_cpu_data.x86_max_cores > 1)
+#define smt_capable()                   (smp_num_siblings > 1)
 #endif
 #include <asm-generic/topology.h>
diff --git a/include/asm-x86_64/unwind.h b/include/asm-x86_64/unwind.h
new file mode 100644
index 0000000000..f3e7124eff
--- /dev/null
+++ b/include/asm-x86_64/unwind.h
@@ -0,0 +1,106 @@
+#ifndef _ASM_X86_64_UNWIND_H
+#define _ASM_X86_64_UNWIND_H
+/*
+ * Copyright (C) 2002-2006 Novell, Inc.
+ *      Jan Beulich <jbeulich@novell.com>
+ * This code is released under version 2 of the GNU GPL.
+ */
+#ifdef CONFIG_STACK_UNWIND
+#include <linux/sched.h>
+#include <asm/ptrace.h>
+#include <asm/uaccess.h>
+#include <asm/vsyscall.h>
+struct unwind_frame_info
+{
+        struct pt_regs regs;
+        struct task_struct *task;
+};
+#define UNW_PC(frame)        (frame)->regs.rip
+#define UNW_SP(frame)        (frame)->regs.rsp
+#ifdef CONFIG_FRAME_POINTER
+#define UNW_FP(frame)        (frame)->regs.rbp
+#define FRAME_RETADDR_OFFSET 8
+#define FRAME_LINK_OFFSET    0
+#define STACK_BOTTOM(tsk)    (((tsk)->thread.rsp0 - 1) & ~(THREAD_SIZE - 1))
+#define STACK_TOP(tsk)       ((tsk)->thread.rsp0)
+#endif
+/* Might need to account for the special exception and interrupt handling
+   stacks here, since normally
+        EXCEPTION_STACK_ORDER < THREAD_ORDER < IRQSTACK_ORDER,
+   but the construct is needed only for getting across the stack switch to
+   the interrupt stack - thus considering the IRQ stack itself is unnecessary,
+   and the overhead of comparing against all exception handling stacks seems
+   not desirable. */
+#define STACK_LIMIT(ptr)     (((ptr) - 1) & ~(THREAD_SIZE - 1))
+#define UNW_REGISTER_INFO \
+        PTREGS_INFO(rax), \
+        PTREGS_INFO(rdx), \
+        PTREGS_INFO(rcx), \
+        PTREGS_INFO(rbx), \
+        PTREGS_INFO(rsi), \
+        PTREGS_INFO(rdi), \
+        PTREGS_INFO(rbp), \
+        PTREGS_INFO(rsp), \
+        PTREGS_INFO(r8), \
+        PTREGS_INFO(r9), \
+        PTREGS_INFO(r10), \
+        PTREGS_INFO(r11), \
+        PTREGS_INFO(r12), \
+        PTREGS_INFO(r13), \
+        PTREGS_INFO(r14), \
+        PTREGS_INFO(r15), \
+        PTREGS_INFO(rip)
+static inline void arch_unw_init_frame_info(struct unwind_frame_info *info,
+                                            /*const*/ struct pt_regs *regs)
+{
+        info->regs = *regs;
+}
+static inline void arch_unw_init_blocked(struct unwind_frame_info *info)
+{
+        extern const char thread_return[];
+        memset(&info->regs, 0, sizeof(info->regs));
+        info->regs.rip = (unsigned long)thread_return;
+        info->regs.cs = __KERNEL_CS;
+        __get_user(info->regs.rbp, (unsigned long *)info->task->thread.rsp);
+        info->regs.rsp = info->task->thread.rsp;
+        info->regs.ss = __KERNEL_DS;
+}
+extern int arch_unwind_init_running(struct unwind_frame_info *,
+                                    int (*callback)(struct unwind_frame_info *,
+                                                    void *arg),
+                                    void *arg);
+static inline int arch_unw_user_mode(const struct unwind_frame_info *info)
+{
+#if 0 /* This can only work when selector register saves/restores
+         are properly annotated (and tracked in UNW_REGISTER_INFO). */
+        return user_mode(&info->regs);
+#else
+        return (long)info->regs.rip >= 0
+               || (info->regs.rip >= VSYSCALL_START && info->regs.rip < VSYSCALL_END)
+               || (long)info->regs.rsp >= 0;
+#endif
+}
+#else
+#define UNW_PC(frame) ((void)(frame), 0)
+static inline int arch_unw_user_mode(const void *info)
+{
+        return 0;
+}
+#endif
+#endif /* _ASM_X86_64_UNWIND_H */
diff --git a/include/asm-xtensa/hw_irq.h b/include/asm-xtensa/hw_irq.h
index ccf436249e..3ddbea759b 100644
--- a/include/asm-xtensa/hw_irq.h
+++ b/include/asm-xtensa/hw_irq.h
@@ -11,8 +11,4 @@
 #ifndef _XTENSA_HW_IRQ_H
 #define _XTENSA_HW_IRQ_H
-static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
-{
-}
 #endif
diff --git a/include/keys/user-type.h b/include/keys/user-type.h
index a3dae1803f..c37c34275a 100644
--- a/include/keys/user-type.h
+++ b/include/keys/user-type.h
@@ -37,6 +37,7 @@ extern struct key_type key_type_user;
 extern int user_instantiate(struct key *key, const void *data, size_t datalen);
 extern int user_update(struct key *key, const void *data, size_t datalen);
 extern int user_match(const struct key *key, const void *criterion);
+extern void user_revoke(struct key *key);
 extern void user_destroy(struct key *key);
 extern void user_describe(const struct key *user, struct seq_file *m);
 extern long user_read(const struct key *key,
diff --git a/include/linux/ac97_codec.h b/include/linux/ac97_codec.h
index c35833824e..2ed2fd8551 100644
--- a/include/linux/ac97_codec.h
+++ b/include/linux/ac97_codec.h
@@ -259,7 +259,7 @@ struct ac97_codec {
        int type;
        u32 model;
-        int modem:1;
+        unsigned int modem:1;
        struct ac97_ops *codec_ops;
diff --git a/include/linux/acpi.h b/include/linux/acpi.h
index 90d6df1551..88b5dfd8ee 100644
--- a/include/linux/acpi.h
+++ b/include/linux/acpi.h
@@ -528,12 +528,18 @@ static inline void acpi_set_cstate_limit(unsigned int new_limit) { return; }
 #ifdef CONFIG_ACPI_NUMA
 int acpi_get_pxm(acpi_handle handle);
+int acpi_get_node(acpi_handle *handle);
 #else
 static inline int acpi_get_pxm(acpi_handle handle)
 {
        return 0;
 }
+static inline int acpi_get_node(acpi_handle *handle)
+{
+        return 0;
+}
 #endif
+extern int acpi_paddr_to_node(u64 start_addr, u64 size);
 extern int pnpacpi_disabled;
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index d9ed279698..dcc5de7cc4 100644
--- a/include/linux/bitmap.h
+++ b/include/linux/bitmap.h
@@ -24,6 +24,9 @@
 * The available bitmap operations and their rough meaning in the
 * case that the bitmap is a single unsigned long are thus:
 *
+ * Note that nbits should be always a compile time evaluable constant.
+ * Otherwise many inlines will generate horrible code.
+ *
 * bitmap_zero(dst, nbits)                      *dst = 0UL
 * bitmap_fill(dst, nbits)                      *dst = ~0UL
 * bitmap_copy(dst, src, nbits)                 *dst = *src
@@ -244,6 +247,8 @@ static inline int bitmap_full(const unsigned long *src, int nbits)
 static inline int bitmap_weight(const unsigned long *src, int nbits)
 {
+        if (nbits <= BITS_PER_LONG)
+                return hweight_long(*src & BITMAP_LAST_WORD_MASK(nbits));
        return __bitmap_weight(src, nbits);
 }
diff --git a/include/linux/buffer_head.h b/include/linux/buffer_head.h
index fb7e9b7ccb..737e407d0c 100644
--- a/include/linux/buffer_head.h
+++ b/include/linux/buffer_head.h
@@ -149,7 +149,6 @@ void create_empty_buffers(struct page *, unsigned long,
                        unsigned long b_state);
 void end_buffer_read_sync(struct buffer_head *bh, int uptodate);
 void end_buffer_write_sync(struct buffer_head *bh, int uptodate);
-void end_buffer_async_write(struct buffer_head *bh, int uptodate);
 /* Things to do with buffers at mapping->private_list */
 void mark_buffer_dirty_inode(struct buffer_head *bh, struct inode *inode);
@@ -214,6 +213,7 @@ int nobh_truncate_page(struct address_space *, loff_t);
 int nobh_writepage(struct page *page, get_block_t *get_block,
                        struct writeback_control *wbc);
+void buffer_init(void);
 /*
 * inline definitions
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
new file mode 100644
index 0000000000..d852024ed0
--- /dev/null
+++ b/include/linux/clocksource.h
@@ -0,0 +1,185 @@
+/*  linux/include/linux/clocksource.h
+ *
+ *  This file contains the structure definitions for clocksources.
+ *
+ *  If you are not a clocksource, or timekeeping code, you should
+ *  not be including this file!
+ */
+#ifndef _LINUX_CLOCKSOURCE_H
+#define _LINUX_CLOCKSOURCE_H
+#include <linux/types.h>
+#include <linux/timex.h>
+#include <linux/time.h>
+#include <linux/list.h>
+#include <asm/div64.h>
+#include <asm/io.h>
+/* clocksource cycle base type */
+typedef u64 cycle_t;
+/**
+ * struct clocksource - hardware abstraction for a free running counter
+ *      Provides mostly state-free accessors to the underlying hardware.
+ *
+ * @name:               ptr to clocksource name
+ * @list:               list head for registration
+ * @rating:             rating value for selection (higher is better)
+ *                      To avoid rating inflation the following
+ *                      list should give you a guide as to how
+ *                      to assign your clocksource a rating
+ *                      1-99: Unfit for real use
+ *                              Only available for bootup and testing purposes.
+ *                      100-199: Base level usability.
+ *                              Functional for real use, but not desired.
+ *                      200-299: Good.
+ *                              A correct and usable clocksource.
+ *                      300-399: Desired.
+ *                              A reasonably fast and accurate clocksource.
+ *                      400-499: Perfect
+ *                              The ideal clocksource. A must-use where
+ *                              available.
+ * @read:               returns a cycle value
+ * @mask:               bitmask for two's complement
+ *                      subtraction of non 64 bit counters
+ * @mult:               cycle to nanosecond multiplier
+ * @shift:              cycle to nanosecond divisor (power of two)
+ * @update_callback:    called when safe to alter clocksource values
+ * @is_continuous:      defines if clocksource is free-running.
+ * @cycle_interval:     Used internally by timekeeping core, please ignore.
+ * @xtime_interval:     Used internally by timekeeping core, please ignore.
+ */
+struct clocksource {
+        char *name;
+        struct list_head list;
+        int rating;
+        cycle_t (*read)(void);
+        cycle_t mask;
+        u32 mult;
+        u32 shift;
+        int (*update_callback)(void);
+        int is_continuous;
+        /* timekeeping specific data, ignore */
+        cycle_t cycle_last, cycle_interval;
+        u64 xtime_nsec, xtime_interval;
+        s64 error;
+};
+/* simplify initialization of mask field */
+#define CLOCKSOURCE_MASK(bits) (cycle_t)(bits<64 ? ((1ULL<<bits)-1) : -1)
+/**
+ * clocksource_khz2mult - calculates mult from khz and shift
+ * @khz:                Clocksource frequency in KHz
+ * @shift_constant:     Clocksource shift factor
+ *
+ * Helper functions that converts a khz counter frequency to a timsource
+ * multiplier, given the clocksource shift value
+ */
+static inline u32 clocksource_khz2mult(u32 khz, u32 shift_constant)
+{
+        /*  khz = cyc/(Million ns)
+         *  mult/2^shift  = ns/cyc
+         *  mult = ns/cyc * 2^shift
+         *  mult = 1Million/khz * 2^shift
+         *  mult = 1000000 * 2^shift / khz
+         *  mult = (1000000<<shift) / khz
+         */
+        u64 tmp = ((u64)1000000) << shift_constant;
+        tmp += khz/2; /* round for do_div */
+        do_div(tmp, khz);
+        return (u32)tmp;
+}
+/**
+ * clocksource_hz2mult - calculates mult from hz and shift
+ * @hz:                 Clocksource frequency in Hz
+ * @shift_constant:     Clocksource shift factor
+ *
+ * Helper functions that converts a hz counter
+ * frequency to a timsource multiplier, given the
+ * clocksource shift value
+ */
+static inline u32 clocksource_hz2mult(u32 hz, u32 shift_constant)
+{
+        /*  hz = cyc/(Billion ns)
+         *  mult/2^shift  = ns/cyc
+         *  mult = ns/cyc * 2^shift
+         *  mult = 1Billion/hz * 2^shift
+         *  mult = 1000000000 * 2^shift / hz
+         *  mult = (1000000000<<shift) / hz
+         */
+        u64 tmp = ((u64)1000000000) << shift_constant;
+        tmp += hz/2; /* round for do_div */
+        do_div(tmp, hz);
+        return (u32)tmp;
+}
+/**
+ * clocksource_read: - Access the clocksource's current cycle value
+ * @cs:         pointer to clocksource being read
+ *
+ * Uses the clocksource to return the current cycle_t value
+ */
+static inline cycle_t clocksource_read(struct clocksource *cs)
+{
+        return cs->read();
+}
+/**
+ * cyc2ns - converts clocksource cycles to nanoseconds
+ * @cs:         Pointer to clocksource
+ * @cycles:     Cycles
+ *
+ * Uses the clocksource and ntp ajdustment to convert cycle_ts to nanoseconds.
+ *
+ * XXX - This could use some mult_lxl_ll() asm optimization
+ */
+static inline s64 cyc2ns(struct clocksource *cs, cycle_t cycles)
+{
+        u64 ret = (u64)cycles;
+        ret = (ret * cs->mult) >> cs->shift;
+        return ret;
+}
+/**
+ * clocksource_calculate_interval - Calculates a clocksource interval struct
+ *
+ * @c:          Pointer to clocksource.
+ * @length_nsec: Desired interval length in nanoseconds.
+ *
+ * Calculates a fixed cycle/nsec interval for a given clocksource/adjustment
+ * pair and interval request.
+ *
+ * Unless you're the timekeeping code, you should not be using this!
+ */
+static inline void clocksource_calculate_interval(struct clocksource *c,
+                                                unsigned long length_nsec)
+{
+        u64 tmp;
+        /* XXX - All of this could use a whole lot of optimization */
+        tmp = length_nsec;
+        tmp <<= c->shift;
+        tmp += c->mult/2;
+        do_div(tmp, c->mult);
+        c->cycle_interval = (cycle_t)tmp;
+        if (c->cycle_interval == 0)
+                c->cycle_interval = 1;
+        c->xtime_interval = (u64)c->cycle_interval * c->mult;
+}
+/* used to install a new clocksource */
+int clocksource_register(struct clocksource*);
+void clocksource_reselect(void);
+struct clocksource* clocksource_get_next(void);
+#endif /* _LINUX_CLOCKSOURCE_H */
diff --git a/include/linux/coda_linux.h b/include/linux/coda_linux.h
index 7b5c5df5cb..be512cc987 100644
--- a/include/linux/coda_linux.h
+++ b/include/linux/coda_linux.h
@@ -27,8 +27,8 @@ extern struct inode_operations coda_dir_inode_operations;
 extern struct inode_operations coda_file_inode_operations;
 extern struct inode_operations coda_ioctl_inode_operations;
-extern struct address_space_operations coda_file_aops;
+extern const struct address_space_operations coda_file_aops;
-extern struct address_space_operations coda_symlink_aops;
+extern const struct address_space_operations coda_symlink_aops;
 extern const struct file_operations coda_dir_operations;
 extern const struct file_operations coda_file_operations;
diff --git a/include/linux/compat.h b/include/linux/compat.h
index dda1697ec7..9760753e66 100644
--- a/include/linux/compat.h
+++ b/include/linux/compat.h
@@ -226,5 +226,7 @@ static inline int compat_timespec_compare(struct compat_timespec *lhs,
 asmlinkage long compat_sys_adjtimex(struct compat_timex __user *utp);
+extern int compat_printk(const char *fmt, ...);
 #endif /* CONFIG_COMPAT */
 #endif /* _LINUX_COMPAT_H */
diff --git a/include/linux/compat_ioctl.h b/include/linux/compat_ioctl.h
index 89ab677cb9..917d62e414 100644
--- a/include/linux/compat_ioctl.h
+++ b/include/linux/compat_ioctl.h
@@ -673,6 +673,11 @@ COMPATIBLE_IOCTL(CAPI_SET_FLAGS)
 COMPATIBLE_IOCTL(CAPI_CLR_FLAGS)
 COMPATIBLE_IOCTL(CAPI_NCCI_OPENCOUNT)
 COMPATIBLE_IOCTL(CAPI_NCCI_GETUNIT)
+/* Siemens Gigaset */
+COMPATIBLE_IOCTL(GIGASET_REDIR)
+COMPATIBLE_IOCTL(GIGASET_CONFIG)
+COMPATIBLE_IOCTL(GIGASET_BRKCHARS)
+COMPATIBLE_IOCTL(GIGASET_VERSION)
 /* Misc. */
 COMPATIBLE_IOCTL(0x41545900)            /* ATYIO_CLKR */
 COMPATIBLE_IOCTL(0x41545901)            /* ATYIO_CLKW */
diff --git a/include/linux/console.h b/include/linux/console.h
index d0f8a80094..3bdf2155e5 100644
--- a/include/linux/console.h
+++ b/include/linux/console.h
@@ -63,9 +63,11 @@ extern const struct consw vga_con;	/* VGA text console */
 extern const struct consw newport_con;  /* SGI Newport console  */
 extern const struct consw prom_con;     /* SPARC PROM console */
+int con_is_bound(const struct consw *csw);
+int register_con_driver(const struct consw *csw, int first, int last);
+int unregister_con_driver(const struct consw *csw);
 int take_over_console(const struct consw *sw, int first, int last, int deflt);
 void give_up_console(const struct consw *sw);
 /* scroll */
 #define SM_UP       (1)
 #define SM_DOWN     (2)
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 08d50c53aa..a3caf6866b 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -31,17 +31,23 @@ struct cpu {
        struct sys_device sysdev;
 };
-extern int register_cpu(struct cpu *, int, struct node *);
+extern int register_cpu(struct cpu *cpu, int num);
 extern struct sys_device *get_cpu_sysdev(unsigned cpu);
 #ifdef CONFIG_HOTPLUG_CPU
-extern void unregister_cpu(struct cpu *, struct node *);
+extern void unregister_cpu(struct cpu *cpu);
 #endif
 struct notifier_block;
 #ifdef CONFIG_SMP
 /* Need to know about CPUs going up/down? */
 extern int register_cpu_notifier(struct notifier_block *nb);
+#ifdef CONFIG_HOTPLUG_CPU
 extern void unregister_cpu_notifier(struct notifier_block *nb);
+#else
+static inline void unregister_cpu_notifier(struct notifier_block *nb)
+{
+}
+#endif
 extern int current_in_cpu_hotplug(void);
 int cpu_up(unsigned int cpu);
@@ -73,6 +79,8 @@ extern int lock_cpu_hotplug_interruptible(void);
                { .notifier_call = fn, .priority = pri };       \
        register_cpu_notifier(&fn##_nb);                        \
 }
+#define register_hotcpu_notifier(nb)    register_cpu_notifier(nb)
+#define unregister_hotcpu_notifier(nb)  unregister_cpu_notifier(nb)
 int cpu_down(unsigned int cpu);
 #define cpu_is_offline(cpu) unlikely(!cpu_online(cpu))
 #else
@@ -80,6 +88,8 @@ int cpu_down(unsigned int cpu);
 #define unlock_cpu_hotplug()    do { } while (0)
 #define lock_cpu_hotplug_interruptible() 0
 #define hotcpu_notifier(fn, pri)
+#define register_hotcpu_notifier(nb)
+#define unregister_hotcpu_notifier(nb)
 /* CPUs don't go offline once they're online w/o CONFIG_HOTPLUG_CPU */
 static inline int cpu_is_offline(int cpu) { return 0; }
diff --git a/include/linux/crypto.h b/include/linux/crypto.h
index 5a0470e361..7f946241b8 100644
--- a/include/linux/crypto.h
+++ b/include/linux/crypto.h
@@ -66,7 +66,7 @@ struct crypto_tfm;
 struct cipher_desc {
        struct crypto_tfm *tfm;
-        void (*crfn)(void *ctx, u8 *dst, const u8 *src);
+        void (*crfn)(struct crypto_tfm *tfm, u8 *dst, const u8 *src);
        unsigned int (*prfn)(const struct cipher_desc *desc, u8 *dst,
                             const u8 *src, unsigned int nbytes);
        void *info;
@@ -79,10 +79,10 @@ struct cipher_desc {
 struct cipher_alg {
        unsigned int cia_min_keysize;
        unsigned int cia_max_keysize;
-        int (*cia_setkey)(void *ctx, const u8 *key,
+        int (*cia_setkey)(struct crypto_tfm *tfm, const u8 *key,
                          unsigned int keylen, u32 *flags);
-        void (*cia_encrypt)(void *ctx, u8 *dst, const u8 *src);
+        void (*cia_encrypt)(struct crypto_tfm *tfm, u8 *dst, const u8 *src);
-        void (*cia_decrypt)(void *ctx, u8 *dst, const u8 *src);
+        void (*cia_decrypt)(struct crypto_tfm *tfm, u8 *dst, const u8 *src);
        unsigned int (*cia_encrypt_ecb)(const struct cipher_desc *desc,
                                        u8 *dst, const u8 *src,
@@ -100,20 +100,19 @@ struct cipher_alg {
 struct digest_alg {
        unsigned int dia_digestsize;
-        void (*dia_init)(void *ctx);
+        void (*dia_init)(struct crypto_tfm *tfm);
-        void (*dia_update)(void *ctx, const u8 *data, unsigned int len);
+        void (*dia_update)(struct crypto_tfm *tfm, const u8 *data,
-        void (*dia_final)(void *ctx, u8 *out);
+                           unsigned int len);
-        int (*dia_setkey)(void *ctx, const u8 *key,
+        void (*dia_final)(struct crypto_tfm *tfm, u8 *out);
+        int (*dia_setkey)(struct crypto_tfm *tfm, const u8 *key,
                          unsigned int keylen, u32 *flags);
 };
 struct compress_alg {
-        int (*coa_init)(void *ctx);
+        int (*coa_compress)(struct crypto_tfm *tfm, const u8 *src,
-        void (*coa_exit)(void *ctx);
+                            unsigned int slen, u8 *dst, unsigned int *dlen);
-        int (*coa_compress)(void *ctx, const u8 *src, unsigned int slen,
+        int (*coa_decompress)(struct crypto_tfm *tfm, const u8 *src,
-                            u8 *dst, unsigned int *dlen);
+                              unsigned int slen, u8 *dst, unsigned int *dlen);
-        int (*coa_decompress)(void *ctx, const u8 *src, unsigned int slen,
-                              u8 *dst, unsigned int *dlen);
 };
 #define cra_cipher      cra_u.cipher
@@ -129,14 +128,17 @@ struct crypto_alg {
        int cra_priority;
-        const char cra_name[CRYPTO_MAX_ALG_NAME];
+        char cra_name[CRYPTO_MAX_ALG_NAME];
-        const char cra_driver_name[CRYPTO_MAX_ALG_NAME];
+        char cra_driver_name[CRYPTO_MAX_ALG_NAME];
        union {
                struct cipher_alg cipher;
                struct digest_alg digest;
                struct compress_alg compress;
        } cra_u;
+        int (*cra_init)(struct crypto_tfm *tfm);
+        void (*cra_exit)(struct crypto_tfm *tfm);
        
        struct module *cra_module;
 };
diff --git a/include/linux/device-mapper.h b/include/linux/device-mapper.h
index aee10b2ea4..e3d1c33d15 100644
--- a/include/linux/device-mapper.h
+++ b/include/linux/device-mapper.h
@@ -8,9 +8,12 @@
 #ifndef _LINUX_DEVICE_MAPPER_H
 #define _LINUX_DEVICE_MAPPER_H
+#ifdef __KERNEL__
 struct dm_target;
 struct dm_table;
 struct dm_dev;
+struct mapped_device;
 typedef enum { STATUSTYPE_INFO, STATUSTYPE_TABLE } status_type_t;
@@ -78,7 +81,7 @@ void dm_put_device(struct dm_target *ti, struct dm_dev *d);
 struct target_type {
        const char *name;
        struct module *module;
-        unsigned version[3];
+        unsigned version[3];
        dm_ctr_fn ctr;
        dm_dtr_fn dtr;
        dm_map_fn map;
@@ -128,4 +131,108 @@ struct dm_target {
 int dm_register_target(struct target_type *t);
 int dm_unregister_target(struct target_type *t);
-#endif                          /* _LINUX_DEVICE_MAPPER_H */
+/*-----------------------------------------------------------------
+ * Functions for creating and manipulating mapped devices.
+ * Drop the reference with dm_put when you finish with the object.
+ *---------------------------------------------------------------*/
+/*
+ * DM_ANY_MINOR chooses the next available minor number.
+ */
+#define DM_ANY_MINOR (-1)
+int dm_create(int minor, struct mapped_device **md);
+/*
+ * Reference counting for md.
+ */
+struct mapped_device *dm_get_md(dev_t dev);
+void dm_get(struct mapped_device *md);
+void dm_put(struct mapped_device *md);
+/*
+ * An arbitrary pointer may be stored alongside a mapped device.
+ */
+void dm_set_mdptr(struct mapped_device *md, void *ptr);
+void *dm_get_mdptr(struct mapped_device *md);
+/*
+ * A device can still be used while suspended, but I/O is deferred.
+ */
+int dm_suspend(struct mapped_device *md, int with_lockfs);
+int dm_resume(struct mapped_device *md);
+/*
+ * Event functions.
+ */
+uint32_t dm_get_event_nr(struct mapped_device *md);
+int dm_wait_event(struct mapped_device *md, int event_nr);
+/*
+ * Info functions.
+ */
+const char *dm_device_name(struct mapped_device *md);
+struct gendisk *dm_disk(struct mapped_device *md);
+int dm_suspended(struct mapped_device *md);
+/*
+ * Geometry functions.
+ */
+int dm_get_geometry(struct mapped_device *md, struct hd_geometry *geo);
+int dm_set_geometry(struct mapped_device *md, struct hd_geometry *geo);
+/*-----------------------------------------------------------------
+ * Functions for manipulating device-mapper tables.
+ *---------------------------------------------------------------*/
+/*
+ * First create an empty table.
+ */
+int dm_table_create(struct dm_table **result, int mode,
+                    unsigned num_targets, struct mapped_device *md);
+/*
+ * Then call this once for each target.
+ */
+int dm_table_add_target(struct dm_table *t, const char *type,
+                        sector_t start, sector_t len, char *params);
+/*
+ * Finally call this to make the table ready for use.
+ */
+int dm_table_complete(struct dm_table *t);
+/*
+ * Table reference counting.
+ */
+struct dm_table *dm_get_table(struct mapped_device *md);
+void dm_table_get(struct dm_table *t);
+void dm_table_put(struct dm_table *t);
+/*
+ * Queries
+ */
+sector_t dm_table_get_size(struct dm_table *t);
+unsigned int dm_table_get_num_targets(struct dm_table *t);
+int dm_table_get_mode(struct dm_table *t);
+struct mapped_device *dm_table_get_md(struct dm_table *t);
+/*
+ * Trigger an event.
+ */
+void dm_table_event(struct dm_table *t);
+/*
+ * The device must be suspended before calling this method.
+ */
+int dm_swap_table(struct mapped_device *md, struct dm_table *t);
+/*
+ * Prepare a table for a device that will error all I/O.
+ * To make it active, call dm_suspend(), dm_swap_table() then dm_resume().
+ */
+int dm_create_error_table(struct dm_table **result, struct mapped_device *md);
+#endif  /* __KERNEL__ */
+#endif  /* _LINUX_DEVICE_MAPPER_H */
diff --git a/include/linux/dm-ioctl.h b/include/linux/dm-ioctl.h
index c67c678661..9623bb6250 100644
--- a/include/linux/dm-ioctl.h
+++ b/include/linux/dm-ioctl.h
@@ -285,9 +285,9 @@ typedef char ioctl_struct[308];
 #define DM_DEV_SET_GEOMETRY     _IOWR(DM_IOCTL, DM_DEV_SET_GEOMETRY_CMD, struct dm_ioctl)
 #define DM_VERSION_MAJOR        4
-#define DM_VERSION_MINOR        6
+#define DM_VERSION_MINOR        7
 #define DM_VERSION_PATCHLEVEL   0
-#define DM_VERSION_EXTRA        "-ioctl (2006-02-17)"
+#define DM_VERSION_EXTRA        "-ioctl (2006-06-24)"
 /* Status bits */
 #define DM_READONLY_FLAG        (1 << 0) /* In/Out */
@@ -314,7 +314,7 @@ typedef char ioctl_struct[308];
 #define DM_BUFFER_FULL_FLAG     (1 << 8) /* Out */
 /*
- * Set this to improve performance when you aren't going to use open_count.
+ * This flag is now ignored.
 */
 #define DM_SKIP_BDGET_FLAG      (1 << 9) /* In */
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 78b236ca04..272010a607 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -20,7 +20,7 @@
 */
 #ifndef DMAENGINE_H
 #define DMAENGINE_H
-#include <linux/config.h>
 #ifdef CONFIG_DMA_ENGINE
 #include <linux/device.h>
diff --git a/include/linux/efs_fs.h b/include/linux/efs_fs.h
index fbfa6b52e2..278ef44958 100644
--- a/include/linux/efs_fs.h
+++ b/include/linux/efs_fs.h
@@ -38,7 +38,7 @@ struct statfs;
 extern struct inode_operations efs_dir_inode_operations;
 extern const struct file_operations efs_dir_operations;
-extern struct address_space_operations efs_symlink_aops;
+extern const struct address_space_operations efs_symlink_aops;
 extern void efs_read_inode(struct inode *);
 extern efs_block_t efs_map_block(struct inode *, efs_block_t);
diff --git a/include/linux/fb.h b/include/linux/fb.h
index f1281687e5..07a08e92bc 100644
--- a/include/linux/fb.h
+++ b/include/linux/fb.h
@@ -504,23 +504,19 @@ struct fb_cursor_user {
 #define FB_EVENT_MODE_DELETE            0x04
 /*      A driver registered itself */
 #define FB_EVENT_FB_REGISTERED          0x05
+/*      A driver unregistered itself */
+#define FB_EVENT_FB_UNREGISTERED        0x06
 /*      CONSOLE-SPECIFIC: get console to framebuffer mapping */
-#define FB_EVENT_GET_CONSOLE_MAP        0x06
+#define FB_EVENT_GET_CONSOLE_MAP        0x07
 /*      CONSOLE-SPECIFIC: set console to framebuffer mapping */
-#define FB_EVENT_SET_CONSOLE_MAP        0x07
+#define FB_EVENT_SET_CONSOLE_MAP        0x08
 /*      A display blank is requested       */
-#define FB_EVENT_BLANK                  0x08
+#define FB_EVENT_BLANK                  0x09
 /*      Private modelist is to be replaced */
-#define FB_EVENT_NEW_MODELIST           0x09
+#define FB_EVENT_NEW_MODELIST           0x0A
 /*      The resolution of the passed in fb_info about to change and
        all vc's should be changed         */
-#define FB_EVENT_MODE_CHANGE_ALL        0x0A
+#define FB_EVENT_MODE_CHANGE_ALL        0x0B
-/*      CONSOLE-SPECIFIC: set console rotation */
-#define FB_EVENT_SET_CON_ROTATE         0x0B
-/*      CONSOLE-SPECIFIC: get console rotation */
-#define FB_EVENT_GET_CON_ROTATE         0x0C
-/*      CONSOLE-SPECIFIC: rotate all consoles */
-#define FB_EVENT_SET_CON_ROTATE_ALL     0x0D
 struct fb_event {
        struct fb_info *info;
@@ -892,7 +888,6 @@ extern int fb_get_color_depth(struct fb_var_screeninfo *var,
                              struct fb_fix_screeninfo *fix);
 extern int fb_get_options(char *name, char **option);
 extern int fb_new_modelist(struct fb_info *info);
-extern int fb_con_duit(struct fb_info *info, int event, void *data);
 extern struct fb_info *registered_fb[FB_MAX];
 extern int num_registered_fb;
diff --git a/include/linux/fs.h b/include/linux/fs.h
index 2d8b348c11..e04a5cfe87 100644
--- a/include/linux/fs.h
+++ b/include/linux/fs.h
@@ -392,7 +392,7 @@ struct address_space {
        unsigned int            truncate_count; /* Cover race condition with truncate */
        unsigned long           nrpages;        /* number of total pages */
        pgoff_t                 writeback_index;/* writeback starts here */
-        struct address_space_operations *a_ops; /* methods */
+        const struct address_space_operations *a_ops;   /* methods */
        unsigned long           flags;          /* error bits/gfp mask */
        struct backing_dev_info *backing_dev_info; /* device readahead, etc */
        spinlock_t              private_lock;   /* for use by the address_space */
@@ -1405,7 +1405,7 @@ extern void bd_forget(struct inode *inode);
 extern void bdput(struct block_device *);
 extern struct block_device *open_by_devnum(dev_t, unsigned);
 extern const struct file_operations def_blk_fops;
-extern struct address_space_operations def_blk_aops;
+extern const struct address_space_operations def_blk_aops;
 extern const struct file_operations def_chr_fops;
 extern const struct file_operations bad_sock_fops;
 extern const struct file_operations def_fifo_fops;
diff --git a/include/linux/futex.h b/include/linux/futex.h
index 966a5b3da4..34c3a215f2 100644
--- a/include/linux/futex.h
+++ b/include/linux/futex.h
@@ -12,6 +12,9 @@
 #define FUTEX_REQUEUE           3
 #define FUTEX_CMP_REQUEUE       4
 #define FUTEX_WAKE_OP           5
+#define FUTEX_LOCK_PI           6
+#define FUTEX_UNLOCK_PI         7
+#define FUTEX_TRYLOCK_PI        8
 /*
 * Support for robust futexes: the kernel cleans up held futexes at
@@ -90,18 +93,21 @@ struct robust_list_head {
 */
 #define ROBUST_LIST_LIMIT       2048
-long do_futex(unsigned long uaddr, int op, int val,
+long do_futex(u32 __user *uaddr, int op, u32 val, unsigned long timeout,
-                unsigned long timeout, unsigned long uaddr2, int val2,
+              u32 __user *uaddr2, u32 val2, u32 val3);
-                int val3);
 extern int handle_futex_death(u32 __user *uaddr, struct task_struct *curr);
 #ifdef CONFIG_FUTEX
 extern void exit_robust_list(struct task_struct *curr);
+extern void exit_pi_state_list(struct task_struct *curr);
 #else
 static inline void exit_robust_list(struct task_struct *curr)
 {
 }
+static inline void exit_pi_state_list(struct task_struct *curr)
+{
+}
 #endif
 #define FUTEX_OP_SET            0       /* *(int *)UADDR2 = OPARG; */
diff --git a/include/linux/hw_random.h b/include/linux/hw_random.h
new file mode 100644
index 0000000000..21ea7610e1
--- /dev/null
+++ b/include/linux/hw_random.h
@@ -0,0 +1,50 @@
+/*
+        Hardware Random Number Generator
+        Please read Documentation/hw_random.txt for details on use.
+        ----------------------------------------------------------
+        This software may be used and distributed according to the terms
+        of the GNU General Public License, incorporated herein by reference.
+ */
+#ifndef LINUX_HWRANDOM_H_
+#define LINUX_HWRANDOM_H_
+#ifdef __KERNEL__
+#include <linux/types.h>
+#include <linux/list.h>
+/**
+ * struct hwrng - Hardware Random Number Generator driver
+ * @name:               Unique RNG name.
+ * @init:               Initialization callback (can be NULL).
+ * @cleanup:            Cleanup callback (can be NULL).
+ * @data_present:       Callback to determine if data is available
+ *                      on the RNG. If NULL, it is assumed that
+ *                      there is always data available.
+ * @data_read:          Read data from the RNG device.
+ *                      Returns the number of lower random bytes in "data".
+ *                      Must not be NULL.
+ * @priv:               Private data, for use by the RNG driver.
+ */
+struct hwrng {
+        const char *name;
+        int (*init)(struct hwrng *rng);
+        void (*cleanup)(struct hwrng *rng);
+        int (*data_present)(struct hwrng *rng);
+        int (*data_read)(struct hwrng *rng, u32 *data);
+        unsigned long priv;
+        /* internal. */
+        struct list_head list;
+};
+/** Register a new Hardware Random Number Generator driver. */
+extern int hwrng_register(struct hwrng *rng);
+/** Unregister a Hardware Random Number Generator driver. */
+extern void hwrng_unregister(struct hwrng *rng);
+#endif /* __KERNEL__ */
+#endif /* LINUX_HWRANDOM_H_ */
diff --git a/include/linux/ide.h b/include/linux/ide.h
index ef7bef207f..0c100168c0 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -793,6 +793,7 @@ typedef struct hwif_s {
        unsigned        auto_poll  : 1; /* supports nop auto-poll */
        unsigned        sg_mapped  : 1; /* sg_table and sg_nents are ready */
        unsigned        no_io_32bit : 1; /* 1 = can not do 32-bit IO ops */
+        unsigned        err_stops_fifo : 1; /* 1=data FIFO is cleared by an error */
        struct device   gendev;
        struct completion gendev_rel_comp; /* To deal with device release() */
diff --git a/include/linux/idr.h b/include/linux/idr.h
index d37c8d808b..f559a719db 100644
--- a/include/linux/idr.h
+++ b/include/linux/idr.h
@@ -78,6 +78,7 @@ void *idr_find(struct idr *idp, int id);
 int idr_pre_get(struct idr *idp, gfp_t gfp_mask);
 int idr_get_new(struct idr *idp, void *ptr, int *id);
 int idr_get_new_above(struct idr *idp, void *ptr, int starting_id, int *id);
+void *idr_replace(struct idr *idp, void *ptr, int id);
 void idr_remove(struct idr *idp, int id);
 void idr_destroy(struct idr *idp);
 void idr_init(struct idr *idp);
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index 41ecbb847f..3a256957fb 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -87,6 +87,7 @@ extern struct group_info init_groups;
        .lock_depth     = -1,                                           \
        .prio           = MAX_PRIO-20,                                  \
        .static_prio    = MAX_PRIO-20,                                  \
+        .normal_prio    = MAX_PRIO-20,                                  \
        .policy         = SCHED_NORMAL,                                 \
        .cpus_allowed   = CPU_MASK_ALL,                                 \
        .mm             = NULL,                                         \
@@ -119,10 +120,11 @@ extern struct group_info init_groups;
                .signal = {{0}}},                                       \
        .blocked        = {{0}},                                        \
        .alloc_lock     = SPIN_LOCK_UNLOCKED,                           \
-        .proc_lock      = SPIN_LOCK_UNLOCKED,                           \
        .journal_info   = NULL,                                         \
        .cpu_timers     = INIT_CPU_TIMERS(tsk.cpu_timers),              \
        .fs_excl        = ATOMIC_INIT(0),                               \
+        .pi_lock        = SPIN_LOCK_UNLOCKED,                           \
+        INIT_RT_MUTEXES(tsk)                                            \
 }
diff --git a/include/linux/input.h b/include/linux/input.h
index b32c2b6e53..56f1e0e1e5 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -232,7 +232,8 @@ struct input_absinfo {
 #define KEY_PAUSE               119
 #define KEY_KPCOMMA             121
-#define KEY_HANGUEL             122
+#define KEY_HANGEUL             122
+#define KEY_HANGUEL             KEY_HANGEUL
 #define KEY_HANJA               123
 #define KEY_YEN                 124
 #define KEY_LEFTMETA            125
@@ -1005,6 +1006,7 @@ static inline void init_input_dev(struct input_dev *dev)
 }
 struct input_dev *input_allocate_device(void);
+void input_free_device(struct input_dev *dev);
 static inline struct input_dev *input_get_device(struct input_dev *dev)
 {
@@ -1016,12 +1018,6 @@ static inline void input_put_device(struct input_dev *dev)
        class_device_put(&dev->cdev);
 }
-static inline void input_free_device(struct input_dev *dev)
-{
-        if (dev)
-                input_put_device(dev);
-}
 int input_register_device(struct input_dev *);
 void input_unregister_device(struct input_dev *);
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 70741e1701..db2a63a116 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -36,6 +36,20 @@ extern void free_irq(unsigned int, void *);
 extern void disable_irq_nosync(unsigned int irq);
 extern void disable_irq(unsigned int irq);
 extern void enable_irq(unsigned int irq);
+/* IRQ wakeup (PM) control: */
+extern int set_irq_wake(unsigned int irq, unsigned int on);
+static inline int enable_irq_wake(unsigned int irq)
+{
+        return set_irq_wake(irq, 1);
+}
+static inline int disable_irq_wake(unsigned int irq)
+{
+        return set_irq_wake(irq, 0);
+}
 #endif
 #ifndef __ARCH_SET_SOFTIRQ_PENDING
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index cd6bd001ba..87a9fc039b 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -9,13 +9,15 @@
 #define _LINUX_IOPORT_H
 #include <linux/compiler.h>
+#include <linux/types.h>
 /*
 * Resources are tree-like, allowing
 * nesting etc..
 */
 struct resource {
+        resource_size_t start;
+        resource_size_t end;
        const char *name;
-        unsigned long start, end;
        unsigned long flags;
        struct resource *parent, *sibling, *child;
 };
@@ -96,31 +98,37 @@ extern struct resource * ____request_resource(struct resource *root, struct reso
 extern int release_resource(struct resource *new);
 extern __deprecated_for_modules int insert_resource(struct resource *parent, struct resource *new);
 extern int allocate_resource(struct resource *root, struct resource *new,
-                             unsigned long size,
+                             resource_size_t size, resource_size_t min,
-                             unsigned long min, unsigned long max,
+                             resource_size_t max, resource_size_t align,
-                             unsigned long align,
                             void (*alignf)(void *, struct resource *,
-                                            unsigned long, unsigned long),
+                                            resource_size_t, resource_size_t),
                             void *alignf_data);
-int adjust_resource(struct resource *res, unsigned long start,
+int adjust_resource(struct resource *res, resource_size_t start,
-                    unsigned long size);
+                    resource_size_t size);
+/* get registered SYSTEM_RAM resources in specified area */
+extern int find_next_system_ram(struct resource *res);
 /* Convenience shorthand with allocation */
 #define request_region(start,n,name)    __request_region(&ioport_resource, (start), (n), (name))
 #define request_mem_region(start,n,name) __request_region(&iomem_resource, (start), (n), (name))
 #define rename_region(region, newname) do { (region)->name = (newname); } while (0)
-extern struct resource * __request_region(struct resource *, unsigned long start, unsigned long n, const char *name);
+extern struct resource * __request_region(struct resource *,
+                                        resource_size_t start,
+                                        resource_size_t n, const char *name);
 /* Compatibility cruft */
 #define release_region(start,n) __release_region(&ioport_resource, (start), (n))
 #define check_mem_region(start,n)       __check_region(&iomem_resource, (start), (n))
 #define release_mem_region(start,n)     __release_region(&iomem_resource, (start), (n))
-extern int __check_region(struct resource *, unsigned long, unsigned long);
+extern int __check_region(struct resource *, resource_size_t, resource_size_t);
-extern void __release_region(struct resource *, unsigned long, unsigned long);
+extern void __release_region(struct resource *, resource_size_t,
+                                resource_size_t);
-static inline int __deprecated check_region(unsigned long s, unsigned long n)
+static inline int __deprecated check_region(resource_size_t s,
+                                                resource_size_t n)
 {
        return __check_region(&ioport_resource, s, n);
 }
diff --git a/include/linux/ipmi.h b/include/linux/ipmi.h
index 5653b2f23b..d09fbeabf1 100644
--- a/include/linux/ipmi.h
+++ b/include/linux/ipmi.h
@@ -210,11 +210,7 @@ struct kernel_ipmi_msg
 #include <linux/list.h>
 #include <linux/module.h>
 #include <linux/device.h>
-#ifdef CONFIG_PROC_FS
 #include <linux/proc_fs.h>
-extern struct proc_dir_entry *proc_ipmi_root;
-#endif /* CONFIG_PROC_FS */
 /* Opaque type for a IPMI message user.  One of these is needed to
   send and receive messages. */
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 676e00dfb2..0832149cdb 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -1,5 +1,5 @@
-#ifndef __irq_h
+#ifndef _LINUX_IRQ_H
-#define __irq_h
+#define _LINUX_IRQ_H
 /*
 * Please do not include this file in generic code.  There is currently
@@ -11,7 +11,7 @@
 #include <linux/smp.h>
-#if !defined(CONFIG_S390)
+#ifndef CONFIG_S390
 #include <linux/linkage.h>
 #include <linux/cache.h>
@@ -33,75 +33,160 @@
 #define IRQ_WAITING     32      /* IRQ not yet seen - for autodetection */
 #define IRQ_LEVEL       64      /* IRQ level triggered */
 #define IRQ_MASKED      128     /* IRQ masked - shouldn't be seen again */
-#if defined(ARCH_HAS_IRQ_PER_CPU)
+#ifdef CONFIG_IRQ_PER_CPU
 # define IRQ_PER_CPU    256     /* IRQ is per CPU */
 # define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
 #else
 # define CHECK_IRQ_PER_CPU(var) 0
 #endif
+#define IRQ_NOPROBE     512     /* IRQ is not valid for probing */
+#define IRQ_NOREQUEST   1024    /* IRQ cannot be requested */
+#define IRQ_NOAUTOEN    2048    /* IRQ will not be enabled on request irq */
+#define IRQ_DELAYED_DISABLE \
+                        4096    /* IRQ disable (masking) happens delayed. */
 /*
- * Interrupt controller descriptor. This is all we need
+ * IRQ types, see also include/linux/interrupt.h
- * to describe about the low-level hardware. 
 */
-struct hw_interrupt_type {
+#define IRQ_TYPE_NONE           0x0000          /* Default, unspecified type */
-        const char * typename;
+#define IRQ_TYPE_EDGE_RISING    0x0001          /* Edge rising type */
-        unsigned int (*startup)(unsigned int irq);
+#define IRQ_TYPE_EDGE_FALLING   0x0002          /* Edge falling type */
-        void (*shutdown)(unsigned int irq);
+#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
-        void (*enable)(unsigned int irq);
+#define IRQ_TYPE_LEVEL_HIGH     0x0004          /* Level high type */
-        void (*disable)(unsigned int irq);
+#define IRQ_TYPE_LEVEL_LOW      0x0008          /* Level low type */
-        void (*ack)(unsigned int irq);
+#define IRQ_TYPE_SENSE_MASK     0x000f          /* Mask of the above */
-        void (*end)(unsigned int irq);
+#define IRQ_TYPE_SIMPLE         0x0010          /* Simple type */
-        void (*set_affinity)(unsigned int irq, cpumask_t dest);
+#define IRQ_TYPE_PERCPU         0x0020          /* Per CPU type */
+#define IRQ_TYPE_PROBE          0x0040          /* Probing in progress */
+struct proc_dir_entry;
+/**
+ * struct irq_chip - hardware interrupt chip descriptor
+ *
+ * @name:               name for /proc/interrupts
+ * @startup:            start up the interrupt (defaults to ->enable if NULL)
+ * @shutdown:           shut down the interrupt (defaults to ->disable if NULL)
+ * @enable:             enable the interrupt (defaults to chip->unmask if NULL)
+ * @disable:            disable the interrupt (defaults to chip->mask if NULL)
+ * @ack:                start of a new interrupt
+ * @mask:               mask an interrupt source
+ * @mask_ack:           ack and mask an interrupt source
+ * @unmask:             unmask an interrupt source
+ * @eoi:                end of interrupt - chip level
+ * @end:                end of interrupt - flow level
+ * @set_affinity:       set the CPU affinity on SMP machines
+ * @retrigger:          resend an IRQ to the CPU
+ * @set_type:           set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
+ * @set_wake:           enable/disable power-management wake-on of an IRQ
+ *
+ * @release:            release function solely used by UML
+ * @typename:           obsoleted by name, kept as migration helper
+ */
+struct irq_chip {
+        const char      *name;
+        unsigned int    (*startup)(unsigned int irq);
+        void            (*shutdown)(unsigned int irq);
+        void            (*enable)(unsigned int irq);
+        void            (*disable)(unsigned int irq);
+        void            (*ack)(unsigned int irq);
+        void            (*mask)(unsigned int irq);
+        void            (*mask_ack)(unsigned int irq);
+        void            (*unmask)(unsigned int irq);
+        void            (*eoi)(unsigned int irq);
+        void            (*end)(unsigned int irq);
+        void            (*set_affinity)(unsigned int irq, cpumask_t dest);
+        int             (*retrigger)(unsigned int irq);
+        int             (*set_type)(unsigned int irq, unsigned int flow_type);
+        int             (*set_wake)(unsigned int irq, unsigned int on);
        /* Currently used only by UML, might disappear one day.*/
 #ifdef CONFIG_IRQ_RELEASE_METHOD
-        void (*release)(unsigned int irq, void *dev_id);
+        void            (*release)(unsigned int irq, void *dev_id);
 #endif
+        /*
+         * For compatibility, ->typename is copied into ->name.
+         * Will disappear.
+         */
+        const char      *typename;
 };
-typedef struct hw_interrupt_type  hw_irq_controller;
+/**
+ * struct irq_desc - interrupt descriptor
-/*
+ *
- * This is the "IRQ descriptor", which contains various information
+ * @handle_irq:         highlevel irq-events handler [if NULL, __do_IRQ()]
- * about the irq, including what kind of hardware handling it has,
+ * @chip:               low level interrupt hardware access
- * whether it is disabled etc etc.
+ * @handler_data:       per-IRQ data for the irq_chip methods
+ * @chip_data:          platform-specific per-chip private data for the chip
+ *                      methods, to allow shared chip implementations
+ * @action:             the irq action chain
+ * @status:             status information
+ * @depth:              disable-depth, for nested irq_disable() calls
+ * @irq_count:          stats field to detect stalled irqs
+ * @irqs_unhandled:     stats field for spurious unhandled interrupts
+ * @lock:               locking for SMP
+ * @affinity:           IRQ affinity on SMP
+ * @cpu:                cpu index useful for balancing
+ * @pending_mask:       pending rebalanced interrupts
+ * @move_irq:           need to re-target IRQ destination
+ * @dir:                /proc/irq/ procfs entry
+ * @affinity_entry:     /proc/irq/smp_affinity procfs entry on SMP
 *
 * Pad this out to 32 bytes for cache and indexing reasons.
 */
-typedef struct irq_desc {
+struct irq_desc {
-        hw_irq_controller *handler;
+        void fastcall           (*handle_irq)(unsigned int irq,
-        void *handler_data;
+                                              struct irq_desc *desc,
-        struct irqaction *action;       /* IRQ action list */
+                                              struct pt_regs *regs);
-        unsigned int status;            /* IRQ status */
+        struct irq_chip         *chip;
-        unsigned int depth;             /* nested irq disables */
+        void                    *handler_data;
-        unsigned int irq_count;         /* For detecting broken interrupts */
+        void                    *chip_data;
-        unsigned int irqs_unhandled;
+        struct irqaction        *action;        /* IRQ action list */
-        spinlock_t lock;
+        unsigned int            status;         /* IRQ status */
-#if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE)
-        unsigned int move_irq;          /* Flag need to re-target intr dest*/
+        unsigned int            depth;          /* nested irq disables */
+        unsigned int            irq_count;      /* For detecting broken IRQs */
+        unsigned int            irqs_unhandled;
+        spinlock_t              lock;
+#ifdef CONFIG_SMP
+        cpumask_t               affinity;
+        unsigned int            cpu;
+#endif
+#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
+        cpumask_t               pending_mask;
+        unsigned int            move_irq;       /* need to re-target IRQ dest */
 #endif
-} ____cacheline_aligned irq_desc_t;
+#ifdef CONFIG_PROC_FS
+        struct proc_dir_entry *dir;
+#endif
+} ____cacheline_aligned;
-extern irq_desc_t irq_desc [NR_IRQS];
+extern struct irq_desc irq_desc[NR_IRQS];
-/* Return a pointer to the irq descriptor for IRQ.  */
+/*
-static inline irq_desc_t *
+ * Migration helpers for obsolete names, they will go away:
-irq_descp (int irq)
+ */
-{
+#define hw_interrupt_type       irq_chip
-        return irq_desc + irq;
+typedef struct irq_chip         hw_irq_controller;
-}
+#define no_irq_type             no_irq_chip
+typedef struct irq_desc         irq_desc_t;
-#include <asm/hw_irq.h> /* the arch dependent stuff */
+/*
+ * Pick up the arch-dependent methods:
+ */
+#include <asm/hw_irq.h>
-extern int setup_irq(unsigned int irq, struct irqaction * new);
+extern int setup_irq(unsigned int irq, struct irqaction *new);
 #ifdef CONFIG_GENERIC_HARDIRQS
-extern cpumask_t irq_affinity[NR_IRQS];
 #ifdef CONFIG_SMP
 static inline void set_native_irq_info(int irq, cpumask_t mask)
 {
-        irq_affinity[irq] = mask;
+        irq_desc[irq].affinity = mask;
 }
 #else
 static inline void set_native_irq_info(int irq, cpumask_t mask)
@@ -111,8 +196,7 @@ static inline void set_native_irq_info(int irq, cpumask_t mask)
 #ifdef CONFIG_SMP
-#if defined (CONFIG_GENERIC_PENDING_IRQ) || defined (CONFIG_IRQBALANCE)
+#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
-extern cpumask_t pending_irq_cpumask[NR_IRQS];
 void set_pending_irq(unsigned int irq, cpumask_t mask);
 void move_native_irq(int irq);
@@ -133,7 +217,7 @@ static inline void set_irq_info(int irq, cpumask_t mask)
 {
 }
-#else // CONFIG_PCI_MSI
+#else /* CONFIG_PCI_MSI */
 static inline void move_irq(int irq)
 {
@@ -144,26 +228,36 @@ static inline void set_irq_info(int irq, cpumask_t mask)
 {
        set_native_irq_info(irq, mask);
 }
-#endif // CONFIG_PCI_MSI
-#else   // CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE
+#endif /* CONFIG_PCI_MSI */
+#else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */
+static inline void move_irq(int irq)
+{
+}
+static inline void move_native_irq(int irq)
+{
+}
+static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
+{
+}
-#define move_irq(x)
-#define move_native_irq(x)
-#define set_pending_irq(x,y)
 static inline void set_irq_info(int irq, cpumask_t mask)
 {
        set_native_irq_info(irq, mask);
 }
-#endif // CONFIG_GENERIC_PENDING_IRQ
+#endif /* CONFIG_GENERIC_PENDING_IRQ */
-#else // CONFIG_SMP
+#else /* CONFIG_SMP */
 #define move_irq(x)
 #define move_native_irq(x)
-#endif // CONFIG_SMP
+#endif /* CONFIG_SMP */
 #ifdef CONFIG_IRQBALANCE
 extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
@@ -173,32 +267,138 @@ static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
 }
 #endif
+#ifdef CONFIG_AUTO_IRQ_AFFINITY
+extern int select_smp_affinity(unsigned int irq);
+#else
+static inline int select_smp_affinity(unsigned int irq)
+{
+        return 1;
+}
+#endif
 extern int no_irq_affinity;
-extern int noirqdebug_setup(char *str);
-extern fastcall irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
+/* Handle irq action chains: */
-                                        struct irqaction *action);
+extern int handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
+                            struct irqaction *action);
+/*
+ * Built-in IRQ handlers for various IRQ types,
+ * callable via desc->chip->handle_irq()
+ */
+extern void fastcall
+handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
+extern void fastcall
+handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc,
+                         struct pt_regs *regs);
+extern void fastcall
+handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
+extern void fastcall
+handle_simple_irq(unsigned int irq, struct irq_desc *desc,
+                  struct pt_regs *regs);
+extern void fastcall
+handle_percpu_irq(unsigned int irq, struct irq_desc *desc,
+                  struct pt_regs *regs);
+extern void fastcall
+handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
+/*
+ * Get a descriptive string for the highlevel handler, for
+ * /proc/interrupts output:
+ */
+extern const char *
+handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *,
+                                        struct pt_regs *));
+/*
+ * Monolithic do_IRQ implementation.
+ * (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
+ */
 extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs);
-extern void note_interrupt(unsigned int irq, irq_desc_t *desc,
-                                        int action_ret, struct pt_regs *regs);
-extern int can_request_irq(unsigned int irq, unsigned long irqflags);
+/*
+ * Architectures call this to let the generic IRQ layer
+ * handle an interrupt. If the descriptor is attached to an
+ * irqchip-style controller then we call the ->handle_irq() handler,
+ * and it calls __do_IRQ() if it's attached to an irqtype-style controller.
+ */
+static inline void generic_handle_irq(unsigned int irq, struct pt_regs *regs)
+{
+        struct irq_desc *desc = irq_desc + irq;
+        if (likely(desc->handle_irq))
+                desc->handle_irq(irq, desc, regs);
+        else
+                __do_IRQ(irq, regs);
+}
+/* Handling of unhandled and spurious interrupts: */
+extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
+                           int action_ret, struct pt_regs *regs);
+/* Resending of interrupts :*/
+void check_irq_resend(struct irq_desc *desc, unsigned int irq);
+/* Initialize /proc/irq/ */
 extern void init_irq_proc(void);
-#ifdef CONFIG_AUTO_IRQ_AFFINITY
+/* Enable/disable irq debugging output: */
-extern int select_smp_affinity(unsigned int irq);
+extern int noirqdebug_setup(char *str);
-#else
-static inline int
+/* Checks whether the interrupt can be requested by request_irq(): */
-select_smp_affinity(unsigned int irq)
+extern int can_request_irq(unsigned int irq, unsigned long irqflags);
+/* Dummy irq-chip implementation: */
+extern struct irq_chip no_irq_chip;
+extern void
+set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
+                         void fastcall (*handle)(unsigned int,
+                                                 struct irq_desc *,
+                                                 struct pt_regs *));
+extern void
+__set_irq_handler(unsigned int irq,
+                  void fastcall (*handle)(unsigned int, struct irq_desc *,
+                                          struct pt_regs *),
+                  int is_chained);
+/*
+ * Set a highlevel flow handler for a given IRQ:
+ */
+static inline void
+set_irq_handler(unsigned int irq,
+                void fastcall (*handle)(unsigned int, struct irq_desc *,
+                                        struct pt_regs *))
 {
-        return 1;
+        __set_irq_handler(irq, handle, 0);
 }
-#endif
-#endif
+/*
+ * Set a highlevel chained flow handler for a given IRQ.
+ * (a chained handler is automatically enabled and set to
+ *  IRQ_NOREQUEST and IRQ_NOPROBE)
+ */
+static inline void
+set_irq_chained_handler(unsigned int irq,
+                        void fastcall (*handle)(unsigned int, struct irq_desc *,
+                                                struct pt_regs *))
+{
+        __set_irq_handler(irq, handle, 1);
+}
-extern hw_irq_controller no_irq_type;  /* needed in every arch ? */
+/* Set/get chip/data for an IRQ: */
-#endif
+extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
+extern int set_irq_data(unsigned int irq, void *data);
+extern int set_irq_chip_data(unsigned int irq, void *data);
+extern int set_irq_type(unsigned int irq, unsigned int type);
+#define get_irq_chip(irq)       (irq_desc[irq].chip)
+#define get_irq_chip_data(irq)  (irq_desc[irq].chip_data)
+#define get_irq_data(irq)       (irq_desc[irq].handler_data)
+#endif /* CONFIG_GENERIC_HARDIRQS */
+#endif /* !CONFIG_S390 */
-#endif /* __irq_h */
+#endif /* _LINUX_IRQ_H */
diff --git a/include/linux/isdn/tpam.h b/include/linux/isdn/tpam.h
deleted file mode 100644
index d18dd0dc57..0000000000
--- a/include/linux/isdn/tpam.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/* $Id: tpam.h,v 1.1.2.1 2001/06/08 08:23:46 kai Exp $
- *
- * Turbo PAM ISDN driver for Linux. (Kernel Driver)
- *
- * Copyright 2001 Stelian Pop <stelian.pop@fr.alcove.com>, Alc�ve
- *
- * For all support questions please contact: <support@auvertech.fr>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2, or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#ifndef _TPAM_H_
-#define _TPAM_H_
-#include <linux/types.h>
-/* IOCTL commands */
-#define TPAM_CMD_DSPLOAD        0x0001
-#define TPAM_CMD_DSPSAVE        0x0002
-#define TPAM_CMD_DSPRUN         0x0003
-#define TPAM_CMD_LOOPMODEON     0x0004
-#define TPAM_CMD_LOOPMODEOFF    0x0005
-/* addresses of debug information zones on board */
-#define TPAM_TRAPAUDIT_REGISTER         0x005493e4
-#define TPAM_NCOAUDIT_REGISTER          0x00500000
-#define TPAM_MSGAUDIT_REGISTER          0x008E30F0
-/* length of debug information zones on board */
-#define TPAM_TRAPAUDIT_LENGTH           10000
-#define TPAM_NCOAUDIT_LENGTH            300000
-#define TPAM_NCOAUDIT_COUNT             30
-#define TPAM_MSGAUDIT_LENGTH            60000
-/* IOCTL load/save parameter */
-typedef struct tpam_dsp_ioctl {
-        __u32 address;  /* address to load/save data */
-        __u32 data_len; /* size of data to be loaded/saved */
-        __u8 data[0];   /* data */
-} tpam_dsp_ioctl;
-#endif /* _TPAM_H_ */
diff --git a/include/linux/jffs2.h b/include/linux/jffs2.h
index c6f70660b3..c9c760700b 100644
--- a/include/linux/jffs2.h
+++ b/include/linux/jffs2.h
@@ -186,6 +186,7 @@ struct jffs2_raw_xref
        jint32_t hdr_crc;
        jint32_t ino;           /* inode number */
        jint32_t xid;           /* XATTR identifier number */
+        jint32_t xseqno;        /* xref sequencial number */
        jint32_t node_crc;
 } __attribute__((packed));
diff --git a/include/linux/kbd_kern.h b/include/linux/kbd_kern.h
index 4eb851ece0..efe0ee4cc8 100644
--- a/include/linux/kbd_kern.h
+++ b/include/linux/kbd_kern.h
@@ -155,10 +155,8 @@ static inline void con_schedule_flip(struct tty_struct *t)
 {
        unsigned long flags;
        spin_lock_irqsave(&t->buf.lock, flags);
-        if (t->buf.tail != NULL) {
+        if (t->buf.tail != NULL)
-                t->buf.tail->active = 0;
                t->buf.tail->commit = t->buf.tail->used;
-        }
        spin_unlock_irqrestore(&t->buf.lock, flags);
        schedule_work(&t->buf.work);
 }
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index 3c5e4c2e51..5c1ec1f84e 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -32,6 +32,7 @@ extern const char linux_banner[];
 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
 #define ALIGN(x,a) (((x)+(a)-1)&~((a)-1))
+#define FIELD_SIZEOF(t, f) (sizeof(((t*)0)->f))
 #define KERN_EMERG      "<0>"   /* system is unusable                   */
 #define KERN_ALERT      "<1>"   /* action must be taken immediately     */
@@ -336,6 +337,12 @@ struct sysinfo {
 /* Force a compilation error if condition is true */
 #define BUILD_BUG_ON(condition) ((void)sizeof(char[1 - 2*!!(condition)]))
+/* Force a compilation error if condition is true, but also produce a
+   result (of value 0 and type size_t), so the expression can be used
+   e.g. in a structure initializer (or where-ever else comma expressions
+   aren't permitted). */
+#define BUILD_BUG_ON_ZERO(e) (sizeof(char[1 - 2 * !!(e)]) - 1)
 /* Trap pasters of __FUNCTION__ at compile-time */
 #define __FUNCTION__ (__func__)
diff --git a/include/linux/key.h b/include/linux/key.h
index e81ebf910d..169f05e486 100644
--- a/include/linux/key.h
+++ b/include/linux/key.h
@@ -177,7 +177,8 @@ struct key {
 /*
 * kernel managed key type definition
 */
-typedef int (*request_key_actor_t)(struct key *key, struct key *authkey, const char *op);
+typedef int (*request_key_actor_t)(struct key *key, struct key *authkey,
+                                   const char *op, void *aux);
 struct key_type {
        /* name of the type */
@@ -248,7 +249,14 @@ extern struct key *key_alloc(struct key_type *type,
                             const char *desc,
                             uid_t uid, gid_t gid,
                             struct task_struct *ctx,
-                             key_perm_t perm, int not_in_quota);
+                             key_perm_t perm,
+                             unsigned long flags);
+#define KEY_ALLOC_IN_QUOTA      0x0000  /* add to quota, reject if would overrun */
+#define KEY_ALLOC_QUOTA_OVERRUN 0x0001  /* add to quota, permit even if overrun */
+#define KEY_ALLOC_NOT_IN_QUOTA  0x0002  /* not in quota */
 extern int key_payload_reserve(struct key *key, size_t datalen);
 extern int key_instantiate_and_link(struct key *key,
                                    const void *data,
@@ -278,6 +286,11 @@ extern struct key *request_key(struct key_type *type,
                               const char *description,
                               const char *callout_info);
+extern struct key *request_key_with_auxdata(struct key_type *type,
+                                            const char *description,
+                                            const char *callout_info,
+                                            void *aux);
 extern int key_validate(struct key *key);
 extern key_ref_t key_create_or_update(key_ref_t keyring,
@@ -285,7 +298,7 @@ extern key_ref_t key_create_or_update(key_ref_t keyring,
                                      const char *description,
                                      const void *payload,
                                      size_t plen,
-                                      int not_in_quota);
+                                      unsigned long flags);
 extern int key_update(key_ref_t key,
                      const void *payload,
@@ -299,7 +312,7 @@ extern int key_unlink(struct key *keyring,
 extern struct key *keyring_alloc(const char *description, uid_t uid, gid_t gid,
                                 struct task_struct *ctx,
-                                 int not_in_quota,
+                                 unsigned long flags,
                                 struct key *dest);
 extern int keyring_clear(struct key *keyring);
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 20b1cf527c..f4284bf897 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -30,6 +30,7 @@
 #include <linux/interrupt.h>
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
+#include <asm/scatterlist.h>
 #include <asm/io.h>
 #include <linux/ata.h>
 #include <linux/workqueue.h>
@@ -887,6 +888,9 @@ static inline unsigned int ata_tag_internal(unsigned int tag)
        return tag == ATA_MAX_QUEUE - 1;
 }
+/*
+ * device helpers
+ */
 static inline unsigned int ata_class_enabled(unsigned int class)
 {
        return class == ATA_DEV_ATA || class == ATA_DEV_ATAPI;
@@ -917,6 +921,17 @@ static inline unsigned int ata_dev_absent(const struct ata_device *dev)
        return ata_class_absent(dev->class);
 }
+/*
+ * port helpers
+ */
+static inline int ata_port_max_devices(const struct ata_port *ap)
+{
+        if (ap->flags & ATA_FLAG_SLAVE_POSS)
+                return 2;
+        return 1;
+}
 static inline u8 ata_chk_status(struct ata_port *ap)
 {
        return ap->ops->check_status(ap);
diff --git a/include/linux/license.h b/include/linux/license.h
new file mode 100644
index 0000000000..decdbf43cb
--- /dev/null
+++ b/include/linux/license.h
@@ -0,0 +1,14 @@
+#ifndef __LICENSE_H
+#define __LICENSE_H
+static inline int license_is_gpl_compatible(const char *license)
+{
+        return (strcmp(license, "GPL") == 0
+                || strcmp(license, "GPL v2") == 0
+                || strcmp(license, "GPL and additional rights") == 0
+                || strcmp(license, "Dual BSD/GPL") == 0
+                || strcmp(license, "Dual MIT/GPL") == 0
+                || strcmp(license, "Dual MPL/GPL") == 0);
+}
+#endif
diff --git a/include/linux/list.h b/include/linux/list.h
index 37ca31b21b..6b74adf529 100644
--- a/include/linux/list.h
+++ b/include/linux/list.h
@@ -4,18 +4,11 @@
 #ifdef __KERNEL__
 #include <linux/stddef.h>
+#include <linux/poison.h>
 #include <linux/prefetch.h>
 #include <asm/system.h>
 /*
- * These are non-NULL pointers that will result in page faults
- * under normal circumstances, used to verify that nobody uses
- * non-initialized list entries.
- */
-#define LIST_POISON1  ((void *) 0x00100100)
-#define LIST_POISON2  ((void *) 0x00200200)
-/*
 * Simple doubly linked list implementation.
 *
 * Some of the internal functions ("__xxx") are useful when
diff --git a/include/linux/loop.h b/include/linux/loop.h
index bf3d2345ce..e76c7611d6 100644
--- a/include/linux/loop.h
+++ b/include/linux/loop.h
@@ -59,7 +59,7 @@ struct loop_device {
        struct bio              *lo_bio;
        struct bio              *lo_biotail;
        int                     lo_state;
-        struct task_struct      *lo_thread;
+        struct completion       lo_done;
        struct completion       lo_bh_done;
        struct mutex            lo_ctl_mutex;
        int                     lo_pending;
diff --git a/include/linux/memory_hotplug.h b/include/linux/memory_hotplug.h
index 9112063861..218501cfae 100644
--- a/include/linux/memory_hotplug.h
+++ b/include/linux/memory_hotplug.h
@@ -63,6 +63,76 @@ extern int online_pages(unsigned long, unsigned long);
 /* reasonably generic interface to expand the physical pages in a zone  */
 extern int __add_pages(struct zone *zone, unsigned long start_pfn,
        unsigned long nr_pages);
+#ifdef CONFIG_NUMA
+extern int memory_add_physaddr_to_nid(u64 start);
+#else
+static inline int memory_add_physaddr_to_nid(u64 start)
+{
+        return 0;
+}
+#endif
+#ifdef CONFIG_HAVE_ARCH_NODEDATA_EXTENSION
+/*
+ * For supporting node-hotadd, we have to allocate a new pgdat.
+ *
+ * If an arch has generic style NODE_DATA(),
+ * node_data[nid] = kzalloc() works well. But it depends on the architecture.
+ *
+ * In general, generic_alloc_nodedata() is used.
+ * Now, arch_free_nodedata() is just defined for error path of node_hot_add.
+ *
+ */
+extern pg_data_t *arch_alloc_nodedata(int nid);
+extern void arch_free_nodedata(pg_data_t *pgdat);
+extern void arch_refresh_nodedata(int nid, pg_data_t *pgdat);
+#else /* CONFIG_HAVE_ARCH_NODEDATA_EXTENSION */
+#define arch_alloc_nodedata(nid)        generic_alloc_nodedata(nid)
+#define arch_free_nodedata(pgdat)       generic_free_nodedata(pgdat)
+#ifdef CONFIG_NUMA
+/*
+ * If ARCH_HAS_NODEDATA_EXTENSION=n, this func is used to allocate pgdat.
+ * XXX: kmalloc_node() can't work well to get new node's memory at this time.
+ *      Because, pgdat for the new node is not allocated/initialized yet itself.
+ *      To use new node's memory, more consideration will be necessary.
+ */
+#define generic_alloc_nodedata(nid)                             \
+({                                                              \
+        kzalloc(sizeof(pg_data_t), GFP_KERNEL);                 \
+})
+/*
+ * This definition is just for error path in node hotadd.
+ * For node hotremove, we have to replace this.
+ */
+#define generic_free_nodedata(pgdat)    kfree(pgdat)
+extern pg_data_t *node_data[];
+static inline void arch_refresh_nodedata(int nid, pg_data_t *pgdat)
+{
+        node_data[nid] = pgdat;
+}
+#else /* !CONFIG_NUMA */
+/* never called */
+static inline pg_data_t *generic_alloc_nodedata(int nid)
+{
+        BUG();
+        return NULL;
+}
+static inline void generic_free_nodedata(pg_data_t *pgdat)
+{
+}
+static inline void arch_refresh_nodedata(int nid, pg_data_t *pgdat)
+{
+}
+#endif /* CONFIG_NUMA */
+#endif /* CONFIG_HAVE_ARCH_NODEDATA_EXTENSION */
 #else /* ! CONFIG_MEMORY_HOTPLUG */
 /*
 * Stub functions for when hotplug is off
@@ -99,7 +169,8 @@ static inline int __remove_pages(struct zone *zone, unsigned long start_pfn,
        return -ENOSYS;
 }
-extern int add_memory(u64 start, u64 size);
+extern int add_memory(int nid, u64 start, u64 size);
+extern int arch_add_memory(int nid, u64 start, u64 size);
 extern int remove_memory(u64 start, u64 size);
 #endif /* __LINUX_MEMORY_HOTPLUG_H */
diff --git a/include/linux/mm.h b/include/linux/mm.h
index a929ea197e..c41a1299b8 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -1030,13 +1030,20 @@ static inline void vm_stat_account(struct mm_struct *mm,
 }
 #endif /* CONFIG_PROC_FS */
+static inline void
+debug_check_no_locks_freed(const void *from, unsigned long len)
+{
+        mutex_debug_check_no_locks_freed(from, len);
+        rt_mutex_debug_check_no_locks_freed(from, len);
+}
 #ifndef CONFIG_DEBUG_PAGEALLOC
 static inline void
 kernel_map_pages(struct page *page, int numpages, int enable)
 {
        if (!PageHighMem(page) && !enable)
-                mutex_debug_check_no_locks_freed(page_address(page),
+                debug_check_no_locks_freed(page_address(page),
-                                                 numpages * PAGE_SIZE);
+                                           numpages * PAGE_SIZE);
 }
 #endif
@@ -1065,5 +1072,7 @@ void drop_slab(void);
 extern int randomize_va_space;
 #endif
+const char *arch_vma_name(struct vm_area_struct *vma);
 #endif /* __KERNEL__ */
 #endif /* _LINUX_MM_H */
diff --git a/include/linux/module.h b/include/linux/module.h
index 2d366098ea..9e9dc7c24d 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -203,6 +203,15 @@ void *__symbol_get_gpl(const char *symbol);
 #define EXPORT_SYMBOL_GPL_FUTURE(sym)                           \
        __EXPORT_SYMBOL(sym, "_gpl_future")
+#ifdef CONFIG_UNUSED_SYMBOLS
+#define EXPORT_UNUSED_SYMBOL(sym) __EXPORT_SYMBOL(sym, "_unused")
+#define EXPORT_UNUSED_SYMBOL_GPL(sym) __EXPORT_SYMBOL(sym, "_unused_gpl")
+#else
+#define EXPORT_UNUSED_SYMBOL(sym)
+#define EXPORT_UNUSED_SYMBOL_GPL(sym)
+#endif
 #endif
 struct module_ref
@@ -261,6 +270,15 @@ struct module
        unsigned int num_gpl_syms;
        const unsigned long *gpl_crcs;
+        /* unused exported symbols. */
+        const struct kernel_symbol *unused_syms;
+        unsigned int num_unused_syms;
+        const unsigned long *unused_crcs;
+        /* GPL-only, unused exported symbols. */
+        const struct kernel_symbol *unused_gpl_syms;
+        unsigned int num_unused_gpl_syms;
+        const unsigned long *unused_gpl_crcs;
        /* symbols that will be GPL-only in the near future. */
        const struct kernel_symbol *gpl_future_syms;
        unsigned int num_gpl_future_syms;
@@ -285,6 +303,9 @@ struct module
        /* The size of the executable code in each section.  */
        unsigned long init_text_size, core_text_size;
+        /* The handle returned from unwind_add_table. */
+        void *unwind_info;
        /* Arch-specific module values */
        struct mod_arch_specific arch;
@@ -453,6 +474,8 @@ void module_remove_driver(struct device_driver *);
 #define EXPORT_SYMBOL(sym)
 #define EXPORT_SYMBOL_GPL(sym)
 #define EXPORT_SYMBOL_GPL_FUTURE(sym)
+#define EXPORT_UNUSED_SYMBOL(sym)
+#define EXPORT_UNUSED_SYMBOL_GPL(sym)
 /* Given an address, look for it in the exception tables. */
 static inline const struct exception_table_entry *
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index bc747e5d71..03cd7551a7 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -699,7 +699,6 @@ extern int		dev_hard_start_xmit(struct sk_buff *skb,
 extern void             dev_init(void);
-extern int              netdev_nit;
 extern int              netdev_budget;
 /* Called by rtnetlink.c:rtnl_unlock() */
diff --git a/include/linux/netpoll.h b/include/linux/netpoll.h
index ca5a873300..1efe60c5c0 100644
--- a/include/linux/netpoll.h
+++ b/include/linux/netpoll.h
@@ -31,6 +31,7 @@ struct netpoll_info {
        int rx_flags;
        spinlock_t rx_lock;
        struct netpoll *rx_np; /* netpoll that registered an rx_hook */
+        struct sk_buff_head arp_tx; /* list of arp requests to reply to */
 };
 void netpoll_poll(struct netpoll *np);
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 0a1740b253..d90b1bb375 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -335,7 +335,7 @@ extern struct inode_operations nfs_file_inode_operations;
 extern struct inode_operations nfs3_file_inode_operations;
 #endif /* CONFIG_NFS_V3 */
 extern const struct file_operations nfs_file_operations;
-extern struct address_space_operations nfs_file_aops;
+extern const struct address_space_operations nfs_file_aops;
 static inline struct rpc_cred *nfs_file_cred(struct file *file)
 {
diff --git a/include/linux/node.h b/include/linux/node.h
index 254dc3de65..81dcec84cd 100644
--- a/include/linux/node.h
+++ b/include/linux/node.h
@@ -26,8 +26,25 @@ struct node {
        struct sys_device       sysdev;
 };
+extern struct node node_devices[];
 extern int register_node(struct node *, int, struct node *);
 extern void unregister_node(struct node *node);
+extern int register_one_node(int nid);
+extern void unregister_one_node(int nid);
+#ifdef CONFIG_NUMA
+extern int register_cpu_under_node(unsigned int cpu, unsigned int nid);
+extern int unregister_cpu_under_node(unsigned int cpu, unsigned int nid);
+#else
+static inline int register_cpu_under_node(unsigned int cpu, unsigned int nid)
+{
+        return 0;
+}
+static inline int unregister_cpu_under_node(unsigned int cpu, unsigned int nid)
+{
+        return 0;
+}
+#endif
 #define to_node(sys_device) container_of(sys_device, struct node, sysdev)
diff --git a/include/linux/nsc_gpio.h b/include/linux/nsc_gpio.h
new file mode 100644
index 0000000000..135742cfad
--- /dev/null
+++ b/include/linux/nsc_gpio.h
@@ -0,0 +1,42 @@
+/**
+   nsc_gpio.c
+   National Semiconductor GPIO common access methods.
+   struct nsc_gpio_ops abstracts the low-level access
+   operations for the GPIO units on 2 NSC chip families; the GEODE
+   integrated CPU, and the PC-8736[03456] integrated PC-peripheral
+   chips.
+   The GPIO units on these chips have the same pin architecture, but
+   the access methods differ.  Thus, scx200_gpio and pc8736x_gpio
+   implement their own versions of these routines; and use the common
+   file-operations routines implemented in nsc_gpio module.
+   Copyright (c) 2005 Jim Cromie <jim.cromie@gmail.com>
+   NB: this work was tested on the Geode SC-1100 and PC-87366 chips.
+   NSC sold the GEODE line to AMD, and the PC-8736x line to Winbond.
+*/
+struct nsc_gpio_ops {
+        struct module*  owner;
+        u32     (*gpio_config)  (unsigned iminor, u32 mask, u32 bits);
+        void    (*gpio_dump)    (struct nsc_gpio_ops *amp, unsigned iminor);
+        int     (*gpio_get)     (unsigned iminor);
+        void    (*gpio_set)     (unsigned iminor, int state);
+        void    (*gpio_set_high)(unsigned iminor);
+        void    (*gpio_set_low) (unsigned iminor);
+        void    (*gpio_change)  (unsigned iminor);
+        int     (*gpio_current) (unsigned iminor);
+        struct device*  dev;    /* for dev_dbg() support, set in init  */
+};
+extern ssize_t nsc_gpio_write(struct file *file, const char __user *data,
+                              size_t len, loff_t *ppos);
+extern ssize_t nsc_gpio_read(struct file *file, char __user *buf,
+                             size_t len, loff_t *ppos);
+extern void nsc_gpio_dump(struct nsc_gpio_ops *amp, unsigned index);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 62a8c22f5f..983fca251b 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -404,8 +404,8 @@ int pcibios_enable_device(struct pci_dev *, int mask);
 char *pcibios_setup (char *str);
 /* Used only when drivers/pci/setup.c is used */
-void pcibios_align_resource(void *, struct resource *,
+void pcibios_align_resource(void *, struct resource *, resource_size_t,
-                            unsigned long, unsigned long);
+                                resource_size_t);
 void pcibios_update_irq(struct pci_dev *, int irq);
 /* Generic PCI functions used internally */
@@ -532,10 +532,10 @@ void pci_release_region(struct pci_dev *, int);
 /* drivers/pci/bus.c */
 int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
-                           unsigned long size, unsigned long align,
+                           resource_size_t size, resource_size_t align,
-                           unsigned long min, unsigned int type_mask,
+                           resource_size_t min, unsigned int type_mask,
                           void (*alignf)(void *, struct resource *,
-                                          unsigned long, unsigned long),
+                                          resource_size_t, resource_size_t),
                           void *alignf_data);
 void pci_enable_bridges(struct pci_bus *bus);
@@ -730,7 +730,8 @@ static inline char *pci_name(struct pci_dev *pdev)
 */
 #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER
 static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
-                const struct resource *rsrc, u64 *start, u64 *end)
+                const struct resource *rsrc, resource_size_t *start,
+                resource_size_t *end)
 {
        *start = rsrc->start;
        *end = rsrc->end;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index c2fd2d1993..9ae6b1a753 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1202,6 +1202,7 @@
 #define PCI_DEVICE_ID_NVIDIA_NVENET_19              0x03EF
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2     0x03F6
 #define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3     0x03F7
+#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_IDE       0x0448
 #define PCI_DEVICE_ID_NVIDIA_NVENET_20              0x0450
 #define PCI_DEVICE_ID_NVIDIA_NVENET_21              0x0451
 #define PCI_DEVICE_ID_NVIDIA_NVENET_22              0x0452
@@ -2170,7 +2171,6 @@
 #define PCI_DEVICE_ID_INTEL_ICH8_4      0x2815
 #define PCI_DEVICE_ID_INTEL_ICH8_5      0x283e
 #define PCI_DEVICE_ID_INTEL_ICH8_6      0x2850
-#define PCI_DEVICE_ID_INTEL_GD31244     0x3200
 #define PCI_DEVICE_ID_INTEL_82855PM_HB  0x3340
 #define PCI_DEVICE_ID_INTEL_82830_HB    0x3575
 #define PCI_DEVICE_ID_INTEL_82830_CGC   0x3577
diff --git a/include/linux/plist.h b/include/linux/plist.h
new file mode 100644
index 0000000000..b95818a037
--- /dev/null
+++ b/include/linux/plist.h
@@ -0,0 +1,248 @@
+/*
+ * Descending-priority-sorted double-linked list
+ *
+ * (C) 2002-2003 Intel Corp
+ * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>.
+ *
+ * 2001-2005 (c) MontaVista Software, Inc.
+ * Daniel Walker <dwalker@mvista.com>
+ *
+ * (C) 2005 Thomas Gleixner <tglx@linutronix.de>
+ *
+ * Simplifications of the original code by
+ * Oleg Nesterov <oleg@tv-sign.ru>
+ *
+ * Licensed under the FSF's GNU Public License v2 or later.
+ *
+ * Based on simple lists (include/linux/list.h).
+ *
+ * This is a priority-sorted list of nodes; each node has a
+ * priority from INT_MIN (highest) to INT_MAX (lowest).
+ *
+ * Addition is O(K), removal is O(1), change of priority of a node is
+ * O(K) and K is the number of RT priority levels used in the system.
+ * (1 <= K <= 99)
+ *
+ * This list is really a list of lists:
+ *
+ *  - The tier 1 list is the prio_list, different priority nodes.
+ *
+ *  - The tier 2 list is the node_list, serialized nodes.
+ *
+ * Simple ASCII art explanation:
+ *
+ * |HEAD          |
+ * |              |
+ * |prio_list.prev|<------------------------------------|
+ * |prio_list.next|<->|pl|<->|pl|<--------------->|pl|<-|
+ * |10            |   |10|   |21|   |21|   |21|   |40|   (prio)
+ * |              |   |  |   |  |   |  |   |  |   |  |
+ * |              |   |  |   |  |   |  |   |  |   |  |
+ * |node_list.next|<->|nl|<->|nl|<->|nl|<->|nl|<->|nl|<-|
+ * |node_list.prev|<------------------------------------|
+ *
+ * The nodes on the prio_list list are sorted by priority to simplify
+ * the insertion of new nodes. There are no nodes with duplicate
+ * priorites on the list.
+ *
+ * The nodes on the node_list is ordered by priority and can contain
+ * entries which have the same priority. Those entries are ordered
+ * FIFO
+ *
+ * Addition means: look for the prio_list node in the prio_list
+ * for the priority of the node and insert it before the node_list
+ * entry of the next prio_list node. If it is the first node of
+ * that priority, add it to the prio_list in the right position and
+ * insert it into the serialized node_list list
+ *
+ * Removal means remove it from the node_list and remove it from
+ * the prio_list if the node_list list_head is non empty. In case
+ * of removal from the prio_list it must be checked whether other
+ * entries of the same priority are on the list or not. If there
+ * is another entry of the same priority then this entry has to
+ * replace the removed entry on the prio_list. If the entry which
+ * is removed is the only entry of this priority then a simple
+ * remove from both list is sufficient.
+ *
+ * INT_MIN is the highest priority, 0 is the medium highest, INT_MAX
+ * is lowest priority.
+ *
+ * No locking is done, up to the caller.
+ *
+ */
+#ifndef _LINUX_PLIST_H_
+#define _LINUX_PLIST_H_
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/spinlock_types.h>
+struct plist_head {
+        struct list_head prio_list;
+        struct list_head node_list;
+#ifdef CONFIG_DEBUG_PI_LIST
+        spinlock_t *lock;
+#endif
+};
+struct plist_node {
+        int                     prio;
+        struct plist_head       plist;
+};
+#ifdef CONFIG_DEBUG_PI_LIST
+# define PLIST_HEAD_LOCK_INIT(_lock)    .lock = _lock
+#else
+# define PLIST_HEAD_LOCK_INIT(_lock)
+#endif
+/**
+ * #PLIST_HEAD_INIT - static struct plist_head initializer
+ *
+ * @head:       struct plist_head variable name
+ */
+#define PLIST_HEAD_INIT(head, _lock)                    \
+{                                                       \
+        .prio_list = LIST_HEAD_INIT((head).prio_list),  \
+        .node_list = LIST_HEAD_INIT((head).node_list),  \
+        PLIST_HEAD_LOCK_INIT(&(_lock))                  \
+}
+/**
+ * #PLIST_NODE_INIT - static struct plist_node initializer
+ *
+ * @node:       struct plist_node variable name
+ * @__prio:     initial node priority
+ */
+#define PLIST_NODE_INIT(node, __prio)                   \
+{                                                       \
+        .prio  = (__prio),                              \
+        .plist = PLIST_HEAD_INIT((node).plist, NULL),   \
+}
+/**
+ * plist_head_init - dynamic struct plist_head initializer
+ *
+ * @head:       &struct plist_head pointer
+ */
+static inline void
+plist_head_init(struct plist_head *head, spinlock_t *lock)
+{
+        INIT_LIST_HEAD(&head->prio_list);
+        INIT_LIST_HEAD(&head->node_list);
+#ifdef CONFIG_DEBUG_PI_LIST
+        head->lock = lock;
+#endif
+}
+/**
+ * plist_node_init - Dynamic struct plist_node initializer
+ *
+ * @node:       &struct plist_node pointer
+ * @prio:       initial node priority
+ */
+static inline void plist_node_init(struct plist_node *node, int prio)
+{
+        node->prio = prio;
+        plist_head_init(&node->plist, NULL);
+}
+extern void plist_add(struct plist_node *node, struct plist_head *head);
+extern void plist_del(struct plist_node *node, struct plist_head *head);
+/**
+ * plist_for_each - iterate over the plist
+ *
+ * @pos1:       the type * to use as a loop counter.
+ * @head:       the head for your list.
+ */
+#define plist_for_each(pos, head)       \
+         list_for_each_entry(pos, &(head)->node_list, plist.node_list)
+/**
+ * plist_for_each_entry_safe - iterate over a plist of given type safe
+ * against removal of list entry
+ *
+ * @pos1:       the type * to use as a loop counter.
+ * @n1: another type * to use as temporary storage
+ * @head:       the head for your list.
+ */
+#define plist_for_each_safe(pos, n, head)       \
+         list_for_each_entry_safe(pos, n, &(head)->node_list, plist.node_list)
+/**
+ * plist_for_each_entry - iterate over list of given type
+ *
+ * @pos:        the type * to use as a loop counter.
+ * @head:       the head for your list.
+ * @member:     the name of the list_struct within the struct.
+ */
+#define plist_for_each_entry(pos, head, mem)    \
+         list_for_each_entry(pos, &(head)->node_list, mem.plist.node_list)
+/**
+ * plist_for_each_entry_safe - iterate over list of given type safe against
+ * removal of list entry
+ *
+ * @pos:        the type * to use as a loop counter.
+ * @n:          another type * to use as temporary storage
+ * @head:       the head for your list.
+ * @m:          the name of the list_struct within the struct.
+ */
+#define plist_for_each_entry_safe(pos, n, head, m)      \
+        list_for_each_entry_safe(pos, n, &(head)->node_list, m.plist.node_list)
+/**
+ * plist_head_empty - return !0 if a plist_head is empty
+ *
+ * @head:       &struct plist_head pointer
+ */
+static inline int plist_head_empty(const struct plist_head *head)
+{
+        return list_empty(&head->node_list);
+}
+/**
+ * plist_node_empty - return !0 if plist_node is not on a list
+ *
+ * @node:       &struct plist_node pointer
+ */
+static inline int plist_node_empty(const struct plist_node *node)
+{
+        return plist_head_empty(&node->plist);
+}
+/* All functions below assume the plist_head is not empty. */
+/**
+ * plist_first_entry - get the struct for the first entry
+ *
+ * @ptr:        the &struct plist_head pointer.
+ * @type:       the type of the struct this is embedded in.
+ * @member:     the name of the list_struct within the struct.
+ */
+#ifdef CONFIG_DEBUG_PI_LIST
+# define plist_first_entry(head, type, member)  \
+({ \
+        WARN_ON(plist_head_empty(head)); \
+        container_of(plist_first(head), type, member); \
+})
+#else
+# define plist_first_entry(head, type, member)  \
+        container_of(plist_first(head), type, member)
+#endif
+/**
+ * plist_first - return the first node (and thus, highest priority)
+ *
+ * @head:       the &struct plist_head pointer
+ *
+ * Assumes the plist is _not_ empty.
+ */
+static inline struct plist_node* plist_first(const struct plist_head *head)
+{
+        return list_entry(head->node_list.next,
+                          struct plist_node, plist.node_list);
+}
+#endif
diff --git a/include/linux/pnp.h b/include/linux/pnp.h
index 93b0959eb4..ab8a8dd8d6 100644
--- a/include/linux/pnp.h
+++ b/include/linux/pnp.h
@@ -389,7 +389,8 @@ int pnp_start_dev(struct pnp_dev *dev);
 int pnp_stop_dev(struct pnp_dev *dev);
 int pnp_activate_dev(struct pnp_dev *dev);
 int pnp_disable_dev(struct pnp_dev *dev);
-void pnp_resource_change(struct resource *resource, unsigned long start, unsigned long size);
+void pnp_resource_change(struct resource *resource, resource_size_t start,
+                                resource_size_t size);
 /* protocol helpers */
 int pnp_is_active(struct pnp_dev * dev);
@@ -434,7 +435,9 @@ static inline int pnp_start_dev(struct pnp_dev *dev) { return -ENODEV; }
 static inline int pnp_stop_dev(struct pnp_dev *dev) { return -ENODEV; }
 static inline int pnp_activate_dev(struct pnp_dev *dev) { return -ENODEV; }
 static inline int pnp_disable_dev(struct pnp_dev *dev) { return -ENODEV; }
-static inline void pnp_resource_change(struct resource *resource, unsigned long start, unsigned long size) { }
+static inline void pnp_resource_change(struct resource *resource,
+                                        resource_size_t start,
+                                        resource_size_t size) { }
 /* protocol helpers */
 static inline int pnp_is_active(struct pnp_dev * dev) { return 0; }
diff --git a/include/linux/poison.h b/include/linux/poison.h
new file mode 100644
index 0000000000..a5347c0243
--- /dev/null
+++ b/include/linux/poison.h
@@ -0,0 +1,58 @@
+#ifndef _LINUX_POISON_H
+#define _LINUX_POISON_H
+/********** include/linux/list.h **********/
+/*
+ * These are non-NULL pointers that will result in page faults
+ * under normal circumstances, used to verify that nobody uses
+ * non-initialized list entries.
+ */
+#define LIST_POISON1  ((void *) 0x00100100)
+#define LIST_POISON2  ((void *) 0x00200200)
+/********** mm/slab.c **********/
+/*
+ * Magic nums for obj red zoning.
+ * Placed in the first word before and the first word after an obj.
+ */
+#define RED_INACTIVE    0x5A2CF071UL    /* when obj is inactive */
+#define RED_ACTIVE      0x170FC2A5UL    /* when obj is active */
+/* ...and for poisoning */
+#define POISON_INUSE    0x5a    /* for use-uninitialised poisoning */
+#define POISON_FREE     0x6b    /* for use-after-free poisoning */
+#define POISON_END      0xa5    /* end-byte of poisoning */
+/********** arch/$ARCH/mm/init.c **********/
+#define POISON_FREE_INITMEM     0xcc
+/********** arch/x86_64/mm/init.c **********/
+#define POISON_FREE_INITDATA    0xba
+/********** arch/ia64/hp/common/sba_iommu.c **********/
+/*
+ * arch/ia64/hp/common/sba_iommu.c uses a 16-byte poison string with a
+ * value of "SBAIOMMU POISON\0" for spill-over poisoning.
+ */
+/********** fs/jbd/journal.c **********/
+#define JBD_POISON_FREE 0x5b
+/********** drivers/base/dmapool.c **********/
+#define POOL_POISON_FREED       0xa7    /* !inuse */
+#define POOL_POISON_ALLOCATED   0xa9    /* !initted */
+/********** drivers/atm/ **********/
+#define ATM_POISON_FREE         0x12
+/********** kernel/mutexes **********/
+#define MUTEX_DEBUG_INIT        0x11
+#define MUTEX_DEBUG_FREE        0x22
+/********** security/ **********/
+#define KEY_DESTROY             0xbd
+/********** sound/oss/ **********/
+#define OSS_POISON_FREE         0xAB
+#endif
diff --git a/include/linux/proc_fs.h b/include/linux/proc_fs.h
index 5810d28fbe..17e75783e3 100644
--- a/include/linux/proc_fs.h
+++ b/include/linux/proc_fs.h
@@ -99,9 +99,8 @@ extern void proc_misc_init(void);
 struct mm_struct;
+void proc_flush_task(struct task_struct *task);
 struct dentry *proc_pid_lookup(struct inode *dir, struct dentry * dentry, struct nameidata *);
-struct dentry *proc_pid_unhash(struct task_struct *p);
-void proc_pid_flush(struct dentry *proc_dentry);
 int proc_pid_readdir(struct file * filp, void * dirent, filldir_t filldir);
 unsigned long task_vsize(struct mm_struct *);
 int task_statm(struct mm_struct *, int *, int *, int *, int *);
@@ -211,8 +210,7 @@ static inline void proc_net_remove(const char *name)
 #define proc_net_create(name, mode, info)       ({ (void)(mode), NULL; })
 static inline void proc_net_remove(const char *name) {}
-static inline struct dentry *proc_pid_unhash(struct task_struct *p) { return NULL; }
+static inline void proc_flush_task(struct task_struct *task) { }
-static inline void proc_pid_flush(struct dentry *proc_dentry) { }
 static inline struct proc_dir_entry *create_proc_entry(const char *name,
        mode_t mode, struct proc_dir_entry *parent) { return NULL; }
@@ -248,8 +246,8 @@ extern void kclist_add(struct kcore_list *, void *, size_t);
 #endif
 struct proc_inode {
-        struct task_struct *task;
+        struct pid *pid;
-        int type;
+        int fd;
        union {
                int (*proc_get_link)(struct inode *, struct dentry **, struct vfsmount **);
                int (*proc_read)(struct task_struct *task, char *page);
@@ -268,4 +266,10 @@ static inline struct proc_dir_entry *PDE(const struct inode *inode)
        return PROC_I(inode)->pde;
 }
+struct proc_maps_private {
+        struct pid *pid;
+        struct task_struct *task;
+        struct vm_area_struct *tail_vma;
+};
 #endif /* _LINUX_PROC_FS_H */
diff --git a/include/linux/ptrace.h b/include/linux/ptrace.h
index ee918bc6e1..8b2749a259 100644
--- a/include/linux/ptrace.h
+++ b/include/linux/ptrace.h
@@ -88,7 +88,6 @@ extern int ptrace_readdata(struct task_struct *tsk, unsigned long src, char __us
 extern int ptrace_writedata(struct task_struct *tsk, char __user *src, unsigned long dst, int len);
 extern int ptrace_attach(struct task_struct *tsk);
 extern int ptrace_detach(struct task_struct *, unsigned int);
-extern void __ptrace_detach(struct task_struct *, unsigned int);
 extern void ptrace_disable(struct task_struct *);
 extern int ptrace_check_attach(struct task_struct *task, int kill);
 extern int ptrace_request(struct task_struct *child, long request, long addr, long data);
diff --git a/include/linux/raid/bitmap.h b/include/linux/raid/bitmap.h
index 899437802a..63df898fe2 100644
--- a/include/linux/raid/bitmap.h
+++ b/include/linux/raid/bitmap.h
@@ -140,6 +140,7 @@ typedef __u16 bitmap_counter_t;
 enum bitmap_state {
        BITMAP_ACTIVE = 0x001, /* the bitmap is in use */
        BITMAP_STALE  = 0x002,  /* the bitmap file is out of date or had -EIO */
+        BITMAP_WRITE_ERROR = 0x004, /* A write error has occurred */
        BITMAP_HOSTENDIAN = 0x8000,
 };
@@ -244,15 +245,9 @@ struct bitmap {
        unsigned long daemon_lastrun; /* jiffies of last run */
        unsigned long daemon_sleep; /* how many seconds between updates? */
-        /*
+        atomic_t pending_writes; /* pending writes to the bitmap file */
-         * bitmap_writeback_daemon waits for file-pages that have been written,
-         * as there is no way to get a call-back when a page write completes.
-         */
-        mdk_thread_t *writeback_daemon;
-        spinlock_t write_lock;
        wait_queue_head_t write_wait;
-        struct list_head complete_pages;
-        mempool_t *write_pool;
 };
 /* the bitmap API */
diff --git a/include/linux/raid/linear.h b/include/linux/raid/linear.h
index 7eaf290e10..ba15469daf 100644
--- a/include/linux/raid/linear.h
+++ b/include/linux/raid/linear.h
@@ -13,8 +13,10 @@ typedef struct dev_info dev_info_t;
 struct linear_private_data
 {
+        struct linear_private_data *prev;       /* earlier version */
        dev_info_t              **hash_table;
        sector_t                hash_spacing;
+        sector_t                array_size;
        int                     preshift; /* shift before dividing by hash_spacing */
        dev_info_t              disks[0];
 };
diff --git a/include/linux/raid/md.h b/include/linux/raid/md.h
index 66b44e5e0d..eb3e547c8f 100644
--- a/include/linux/raid/md.h
+++ b/include/linux/raid/md.h
@@ -85,8 +85,6 @@ extern void md_done_sync(mddev_t *mddev, int blocks, int ok);
 extern void md_error (mddev_t *mddev, mdk_rdev_t *rdev);
 extern void md_unplug_mddev(mddev_t *mddev);
-extern void md_print_devices (void);
 extern void md_super_write(mddev_t *mddev, mdk_rdev_t *rdev,
                           sector_t sector, int size, struct page *page);
 extern void md_super_wait(mddev_t *mddev);
@@ -97,7 +95,5 @@ extern void md_new_event(mddev_t *mddev);
 extern void md_update_sb(mddev_t * mddev);
-#define MD_BUG(x...) { printk("md: bug in file %s, line %d\n", __FILE__, __LINE__); md_print_devices(); }
 #endif 
diff --git a/include/linux/raid/md_k.h b/include/linux/raid/md_k.h
index e2df61f5b0..c1e0ac55ba 100644
--- a/include/linux/raid/md_k.h
+++ b/include/linux/raid/md_k.h
@@ -40,7 +40,8 @@ typedef struct mdk_rdev_s mdk_rdev_t;
 * options passed in raidrun:
 */
-#define MAX_CHUNK_SIZE (4096*1024)
+/* Currently this must fix in an 'int' */
+#define MAX_CHUNK_SIZE (1<<30)
 /*
 * MD's 'extended' device
@@ -57,6 +58,7 @@ struct mdk_rdev_s
        struct page     *sb_page;
        int             sb_loaded;
+        __u64           sb_events;
        sector_t        data_offset;    /* start of data in array */
        sector_t        sb_offset;
        int             sb_size;        /* bytes in the superblock */
@@ -87,6 +89,10 @@ struct mdk_rdev_s
                                         * array and could again if we did a partial
                                         * resync from the bitmap
                                         */
+        sector_t        recovery_offset;/* If this device has been partially
+                                         * recovered, this is where we were
+                                         * up to.
+                                         */
        atomic_t        nr_pending;     /* number of pending requests.
                                         * only maintained for arrays that
@@ -182,6 +188,8 @@ struct mddev_s
 #define MD_RECOVERY_REQUESTED   6
 #define MD_RECOVERY_CHECK       7
 #define MD_RECOVERY_RESHAPE     8
+#define MD_RECOVERY_FROZEN      9
        unsigned long                   recovery;
        int                             in_sync;        /* know to not need resync */
diff --git a/include/linux/raid/md_p.h b/include/linux/raid/md_p.h
index f1fbae7e39..b6ebc69bae 100644
--- a/include/linux/raid/md_p.h
+++ b/include/linux/raid/md_p.h
@@ -265,9 +265,12 @@ struct mdp_superblock_1 {
 /* feature_map bits */
 #define MD_FEATURE_BITMAP_OFFSET        1
+#define MD_FEATURE_RECOVERY_OFFSET      2 /* recovery_offset is present and
+                                           * must be honoured
+                                           */
 #define MD_FEATURE_RESHAPE_ACTIVE       4
-#define MD_FEATURE_ALL                  5
+#define MD_FEATURE_ALL                  (1|2|4)
 #endif 
diff --git a/include/linux/raid/raid10.h b/include/linux/raid/raid10.h
index b1103298a8..c41e56a7c0 100644
--- a/include/linux/raid/raid10.h
+++ b/include/linux/raid/raid10.h
@@ -24,11 +24,16 @@ struct r10_private_data_s {
        int                     far_copies;   /* number of copies layed out
                                               * at large strides across drives
                                               */
+        int                     far_offset;   /* far_copies are offset by 1 stripe
+                                               * instead of many
+                                               */
        int                     copies;       /* near_copies * far_copies.
                                               * must be <= raid_disks
                                               */
        sector_t                stride;       /* distance between far copies.
-                                               * This is size / far_copies
+                                               * This is size / far_copies unless
+                                               * far_offset, in which case it is
+                                               * 1 stripe.
                                               */
        int chunk_shift; /* shift from chunks to sectors */
diff --git a/include/linux/raid/raid5.h b/include/linux/raid/raid5.h
index 914af66704..20ed4c9976 100644
--- a/include/linux/raid/raid5.h
+++ b/include/linux/raid/raid5.h
@@ -212,6 +212,7 @@ struct raid5_private_data {
        mddev_t                 *mddev;
        struct disk_info        *spare;
        int                     chunk_size, level, algorithm;
+        int                     max_degraded;
        int                     raid_disks, working_disks, failed_disks;
        int                     max_nr_stripes;
diff --git a/include/linux/rcupdate.h b/include/linux/rcupdate.h
index 6312758393..48dfe00070 100644
--- a/include/linux/rcupdate.h
+++ b/include/linux/rcupdate.h
@@ -258,6 +258,7 @@ extern void rcu_init(void);
 extern void rcu_check_callbacks(int cpu, int user);
 extern void rcu_restart_cpu(int cpu);
 extern long rcu_batches_completed(void);
+extern long rcu_batches_completed_bh(void);
 /* Exported interfaces */
 extern void FASTCALL(call_rcu(struct rcu_head *head, 
diff --git a/include/linux/reiserfs_fs.h b/include/linux/reiserfs_fs.h
index 5676c4210e..daa2d83cef 100644
--- a/include/linux/reiserfs_fs.h
+++ b/include/linux/reiserfs_fs.h
@@ -1973,7 +1973,7 @@ void reiserfs_unmap_buffer(struct buffer_head *);
 /* file.c */
 extern struct inode_operations reiserfs_file_inode_operations;
 extern const struct file_operations reiserfs_file_operations;
-extern struct address_space_operations reiserfs_address_space_operations;
+extern const struct address_space_operations reiserfs_address_space_operations;
 /* fix_nodes.c */
diff --git a/include/linux/rtmutex.h b/include/linux/rtmutex.h
new file mode 100644
index 0000000000..fa4a3b82ba
--- /dev/null
+++ b/include/linux/rtmutex.h
@@ -0,0 +1,117 @@
+/*
+ * RT Mutexes: blocking mutual exclusion locks with PI support
+ *
+ * started by Ingo Molnar and Thomas Gleixner:
+ *
+ *  Copyright (C) 2004-2006 Red Hat, Inc., Ingo Molnar <mingo@redhat.com>
+ *  Copyright (C) 2006, Timesys Corp., Thomas Gleixner <tglx@timesys.com>
+ *
+ * This file contains the public data structure and API definitions.
+ */
+#ifndef __LINUX_RT_MUTEX_H
+#define __LINUX_RT_MUTEX_H
+#include <linux/linkage.h>
+#include <linux/plist.h>
+#include <linux/spinlock_types.h>
+/*
+ * The rt_mutex structure
+ *
+ * @wait_lock:  spinlock to protect the structure
+ * @wait_list:  pilist head to enqueue waiters in priority order
+ * @owner:      the mutex owner
+ */
+struct rt_mutex {
+        spinlock_t              wait_lock;
+        struct plist_head       wait_list;
+        struct task_struct      *owner;
+#ifdef CONFIG_DEBUG_RT_MUTEXES
+        int                     save_state;
+        struct list_head        held_list_entry;
+        unsigned long           acquire_ip;
+        const char              *name, *file;
+        int                     line;
+        void                    *magic;
+#endif
+};
+struct rt_mutex_waiter;
+struct hrtimer_sleeper;
+#ifdef CONFIG_DEBUG_RT_MUTEXES
+ extern int rt_mutex_debug_check_no_locks_freed(const void *from,
+                                                unsigned long len);
+ extern void rt_mutex_debug_check_no_locks_held(struct task_struct *task);
+#else
+ static inline int rt_mutex_debug_check_no_locks_freed(const void *from,
+                                                       unsigned long len)
+ {
+        return 0;
+ }
+# define rt_mutex_debug_check_no_locks_held(task)       do { } while (0)
+#endif
+#ifdef CONFIG_DEBUG_RT_MUTEXES
+# define __DEBUG_RT_MUTEX_INITIALIZER(mutexname) \
+        , .name = #mutexname, .file = __FILE__, .line = __LINE__
+# define rt_mutex_init(mutex)                   __rt_mutex_init(mutex, __FUNCTION__)
+ extern void rt_mutex_debug_task_free(struct task_struct *tsk);
+#else
+# define __DEBUG_RT_MUTEX_INITIALIZER(mutexname)
+# define rt_mutex_init(mutex)                   __rt_mutex_init(mutex, NULL)
+# define rt_mutex_debug_task_free(t)                    do { } while (0)
+#endif
+#define __RT_MUTEX_INITIALIZER(mutexname) \
+        { .wait_lock = SPIN_LOCK_UNLOCKED \
+        , .wait_list = PLIST_HEAD_INIT(mutexname.wait_list, mutexname.wait_lock) \
+        , .owner = NULL \
+        __DEBUG_RT_MUTEX_INITIALIZER(mutexname)}
+#define DEFINE_RT_MUTEX(mutexname) \
+        struct rt_mutex mutexname = __RT_MUTEX_INITIALIZER(mutexname)
+/***
+ * rt_mutex_is_locked - is the mutex locked
+ * @lock: the mutex to be queried
+ *
+ * Returns 1 if the mutex is locked, 0 if unlocked.
+ */
+static inline int rt_mutex_is_locked(struct rt_mutex *lock)
+{
+        return lock->owner != NULL;
+}
+extern void __rt_mutex_init(struct rt_mutex *lock, const char *name);
+extern void rt_mutex_destroy(struct rt_mutex *lock);
+extern void rt_mutex_lock(struct rt_mutex *lock);
+extern int rt_mutex_lock_interruptible(struct rt_mutex *lock,
+                                                int detect_deadlock);
+extern int rt_mutex_timed_lock(struct rt_mutex *lock,
+                                        struct hrtimer_sleeper *timeout,
+                                        int detect_deadlock);
+extern int rt_mutex_trylock(struct rt_mutex *lock);
+extern void rt_mutex_unlock(struct rt_mutex *lock);
+#ifdef CONFIG_DEBUG_RT_MUTEXES
+# define INIT_RT_MUTEX_DEBUG(tsk)                                       \
+        .held_list_head = LIST_HEAD_INIT(tsk.held_list_head),           \
+        .held_list_lock = SPIN_LOCK_UNLOCKED
+#else
+# define INIT_RT_MUTEX_DEBUG(tsk)
+#endif
+#ifdef CONFIG_RT_MUTEXES
+# define INIT_RT_MUTEXES(tsk)                                           \
+        .pi_waiters     = PLIST_HEAD_INIT(tsk.pi_waiters, tsk.pi_lock), \
+        INIT_RT_MUTEX_DEBUG(tsk)
+#else
+# define INIT_RT_MUTEXES(tsk)
+#endif
+#endif
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 8d11d9310d..821f0481eb 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -73,6 +73,7 @@ struct sched_param {
 #include <linux/seccomp.h>
 #include <linux/rcupdate.h>
 #include <linux/futex.h>
+#include <linux/rtmutex.h>
 #include <linux/time.h>
 #include <linux/param.h>
@@ -83,6 +84,7 @@ struct sched_param {
 #include <asm/processor.h>
 struct exec_domain;
+struct futex_pi_state;
 /*
 * List of flags we want to share for kernel threads,
@@ -123,6 +125,7 @@ extern unsigned long nr_running(void);
 extern unsigned long nr_uninterruptible(void);
 extern unsigned long nr_active(void);
 extern unsigned long nr_iowait(void);
+extern unsigned long weighted_cpuload(const int cpu);
 /*
@@ -494,8 +497,11 @@ struct signal_struct {
 #define MAX_PRIO                (MAX_RT_PRIO + 40)
-#define rt_task(p)              (unlikely((p)->prio < MAX_RT_PRIO))
+#define rt_prio(prio)           unlikely((prio) < MAX_RT_PRIO)
+#define rt_task(p)              rt_prio((p)->prio)
 #define batch_task(p)           (unlikely((p)->policy == SCHED_BATCH))
+#define has_rt_policy(p) \
+        unlikely((p)->policy != SCHED_NORMAL && (p)->policy != SCHED_BATCH)
 /*
 * Some day this will be a full-fledged user tracking system..
@@ -558,9 +564,9 @@ enum idle_type
 /*
 * sched-domains (multiprocessor balancing) declarations:
 */
-#ifdef CONFIG_SMP
 #define SCHED_LOAD_SCALE        128UL   /* increase resolution of load */
+#ifdef CONFIG_SMP
 #define SD_LOAD_BALANCE         1       /* Do load balancing on this domain. */
 #define SD_BALANCE_NEWIDLE      2       /* Balance when about to become idle */
 #define SD_BALANCE_EXEC         4       /* Balance on exec */
@@ -569,6 +575,11 @@ enum idle_type
 #define SD_WAKE_AFFINE          32      /* Wake task to waking CPU */
 #define SD_WAKE_BALANCE         64      /* Perform balancing at task wakeup */
 #define SD_SHARE_CPUPOWER       128     /* Domain members share cpu power */
+#define SD_POWERSAVINGS_BALANCE 256     /* Balance for power savings */
+#define BALANCE_FOR_POWER       ((sched_mc_power_savings || sched_smt_power_savings) \
+                                 ? SD_POWERSAVINGS_BALANCE : 0)
 struct sched_group {
        struct sched_group *next;       /* Must be a circular list */
@@ -638,7 +649,7 @@ struct sched_domain {
 #endif
 };
-extern void partition_sched_domains(cpumask_t *partition1,
+extern int partition_sched_domains(cpumask_t *partition1,
                                    cpumask_t *partition2);
 /*
@@ -713,10 +724,13 @@ struct task_struct {
        int lock_depth;         /* BKL lock depth */
-#if defined(CONFIG_SMP) && defined(__ARCH_WANT_UNLOCKED_CTXSW)
+#ifdef CONFIG_SMP
+#ifdef __ARCH_WANT_UNLOCKED_CTXSW
        int oncpu;
 #endif
-        int prio, static_prio;
+#endif
+        int load_weight;        /* for niceness load balancing purposes */
+        int prio, static_prio, normal_prio;
        struct list_head run_list;
        prio_array_t *array;
@@ -842,8 +856,20 @@ struct task_struct {
        u32 self_exec_id;
 /* Protection of (de-)allocation: mm, files, fs, tty, keyrings */
        spinlock_t alloc_lock;
-/* Protection of proc_dentry: nesting proc_lock, dcache_lock, write_lock_irq(&tasklist_lock); */
-        spinlock_t proc_lock;
+        /* Protection of the PI data structures: */
+        spinlock_t pi_lock;
+#ifdef CONFIG_RT_MUTEXES
+        /* PI waiters blocked on a rt_mutex held by this task */
+        struct plist_head pi_waiters;
+        /* Deadlock detection and priority inheritance handling */
+        struct rt_mutex_waiter *pi_blocked_on;
+# ifdef CONFIG_DEBUG_RT_MUTEXES
+        spinlock_t held_list_lock;
+        struct list_head held_list_head;
+# endif
+#endif
 #ifdef CONFIG_DEBUG_MUTEXES
        /* mutex deadlock detection */
@@ -856,7 +882,6 @@ struct task_struct {
 /* VM state */
        struct reclaim_state *reclaim_state;
-        struct dentry *proc_dentry;
        struct backing_dev_info *backing_dev_info;
        struct io_context *io_context;
@@ -891,6 +916,8 @@ struct task_struct {
 #ifdef CONFIG_COMPAT
        struct compat_robust_list_head __user *compat_robust_list;
 #endif
+        struct list_head pi_state_list;
+        struct futex_pi_state *pi_state_cache;
        atomic_t fs_excl;       /* holding fs exclusive resources */
        struct rcu_head rcu;
@@ -958,6 +985,7 @@ static inline void put_task_struct(struct task_struct *t)
 #define PF_SPREAD_PAGE  0x01000000      /* Spread page cache over cpuset */
 #define PF_SPREAD_SLAB  0x02000000      /* Spread some slab caches over cpuset */
 #define PF_MEMPOLICY    0x10000000      /* Non-default NUMA mempolicy */
+#define PF_MUTEX_TESTER 0x20000000      /* Thread belongs to the rt mutex tester */
 /*
 * Only the _current_ task can read/write to tsk->flags, but other
@@ -1012,6 +1040,19 @@ static inline void idle_task_exit(void) {}
 #endif
 extern void sched_idle_next(void);
+#ifdef CONFIG_RT_MUTEXES
+extern int rt_mutex_getprio(task_t *p);
+extern void rt_mutex_setprio(task_t *p, int prio);
+extern void rt_mutex_adjust_pi(task_t *p);
+#else
+static inline int rt_mutex_getprio(task_t *p)
+{
+        return p->normal_prio;
+}
+# define rt_mutex_adjust_pi(p)          do { } while (0)
+#endif
 extern void set_user_nice(task_t *p, long nice);
 extern int task_prio(const task_t *p);
 extern int task_nice(const task_t *p);
@@ -1411,6 +1452,11 @@ static inline void arch_pick_mmap_layout(struct mm_struct *mm)
 extern long sched_setaffinity(pid_t pid, cpumask_t new_mask);
 extern long sched_getaffinity(pid_t pid, cpumask_t *mask);
+#include <linux/sysdev.h>
+extern int sched_mc_power_savings, sched_smt_power_savings;
+extern struct sysdev_attribute attr_sched_mc_power_savings, attr_sched_smt_power_savings;
+extern int sched_create_sysfs_power_savings_entries(struct sysdev_class *cls);
 extern void normalize_rt_tasks(void);
 #ifdef CONFIG_PM
diff --git a/include/linux/scx200.h b/include/linux/scx200.h
index a22f9e173a..693c0557e7 100644
--- a/include/linux/scx200.h
+++ b/include/linux/scx200.h
@@ -49,10 +49,3 @@ extern unsigned scx200_cb_base;
 #define SCx200_REV 0x3d         /* Revision Register */
 #define SCx200_CBA 0x3e         /* Configuration Base Address Register */
 #define SCx200_CBA_SCRATCH 0x64 /* Configuration Base Address Scratchpad */
-/*
-    Local variables:
-        compile-command: "make -C ../.. bzImage modules"
-        c-basic-offset: 8
-    End:
-*/
diff --git a/include/linux/scx200_gpio.h b/include/linux/scx200_gpio.h
index 30cdd648ba..90dd069cc1 100644
--- a/include/linux/scx200_gpio.h
+++ b/include/linux/scx200_gpio.h
@@ -1,6 +1,6 @@
 #include <linux/spinlock.h>
-u32 scx200_gpio_configure(int index, u32 set, u32 clear);
+u32 scx200_gpio_configure(unsigned index, u32 set, u32 clear);
 extern unsigned scx200_gpio_base;
 extern long scx200_gpio_shadow[2];
@@ -17,7 +17,7 @@ extern long scx200_gpio_shadow[2];
 /* returns the value of the GPIO pin */
-static inline int scx200_gpio_get(int index) {
+static inline int scx200_gpio_get(unsigned index) {
        __SCx200_GPIO_BANK;
        __SCx200_GPIO_IOADDR + 0x04;
        __SCx200_GPIO_INDEX;
@@ -29,7 +29,7 @@ static inline int scx200_gpio_get(int index) {
   driven if the GPIO is configured as an output, it might not be the
   state of the GPIO right now if the GPIO is configured as an input) */
-static inline int scx200_gpio_current(int index) {
+static inline int scx200_gpio_current(unsigned index) {
        __SCx200_GPIO_BANK;
        __SCx200_GPIO_INDEX;
                
@@ -38,7 +38,7 @@ static inline int scx200_gpio_current(int index) {
 /* drive the GPIO signal high */
-static inline void scx200_gpio_set_high(int index) {
+static inline void scx200_gpio_set_high(unsigned index) {
        __SCx200_GPIO_BANK;
        __SCx200_GPIO_IOADDR;
        __SCx200_GPIO_SHADOW;
@@ -49,7 +49,7 @@ static inline void scx200_gpio_set_high(int index) {
 /* drive the GPIO signal low */
-static inline void scx200_gpio_set_low(int index) {
+static inline void scx200_gpio_set_low(unsigned index) {
        __SCx200_GPIO_BANK;
        __SCx200_GPIO_IOADDR;
        __SCx200_GPIO_SHADOW;
@@ -60,7 +60,7 @@ static inline void scx200_gpio_set_low(int index) {
 /* drive the GPIO signal to state */
-static inline void scx200_gpio_set(int index, int state) {
+static inline void scx200_gpio_set(unsigned index, int state) {
        __SCx200_GPIO_BANK;
        __SCx200_GPIO_IOADDR;
        __SCx200_GPIO_SHADOW;
@@ -73,7 +73,7 @@ static inline void scx200_gpio_set(int index, int state) {
 }
 /* toggle the GPIO signal */
-static inline void scx200_gpio_change(int index) {
+static inline void scx200_gpio_change(unsigned index) {
        __SCx200_GPIO_BANK;
        __SCx200_GPIO_IOADDR;
        __SCx200_GPIO_SHADOW;
@@ -87,10 +87,3 @@ static inline void scx200_gpio_change(int index) {
 #undef __SCx200_GPIO_SHADOW
 #undef __SCx200_GPIO_INDEX
 #undef __SCx200_GPIO_OUT
-/*
-    Local variables:
-        compile-command: "make -C ../.. bzImage modules"
-        c-basic-offset: 8
-    End:
-*/
diff --git a/include/linux/security.h b/include/linux/security.h
index d2c17bd91a..51805806f9 100644
--- a/include/linux/security.h
+++ b/include/linux/security.h
@@ -862,6 +862,7 @@ struct swap_info_struct;
 *      Permit allocation of a key and assign security data. Note that key does
 *      not have a serial number assigned at this point.
 *      @key points to the key.
+ *      @flags is the allocation flags
 *      Return 0 if permission is granted, -ve error otherwise.
 * @key_free:
 *      Notification of destruction; free security data.
@@ -1324,7 +1325,7 @@ struct security_operations {
        /* key management security hooks */
 #ifdef CONFIG_KEYS
-        int (*key_alloc)(struct key *key, struct task_struct *tsk);
+        int (*key_alloc)(struct key *key, struct task_struct *tsk, unsigned long flags);
        void (*key_free)(struct key *key);
        int (*key_permission)(key_ref_t key_ref,
                              struct task_struct *context,
@@ -3040,9 +3041,10 @@ static inline int security_xfrm_policy_lookup(struct xfrm_policy *xp, u32 sk_sid
 #ifdef CONFIG_KEYS
 #ifdef CONFIG_SECURITY
 static inline int security_key_alloc(struct key *key,
-                                     struct task_struct *tsk)
+                                     struct task_struct *tsk,
+                                     unsigned long flags)
 {
-        return security_ops->key_alloc(key, tsk);
+        return security_ops->key_alloc(key, tsk, flags);
 }
 static inline void security_key_free(struct key *key)
@@ -3060,7 +3062,8 @@ static inline int security_key_permission(key_ref_t key_ref,
 #else
 static inline int security_key_alloc(struct key *key,
-                                     struct task_struct *tsk)
+                                     struct task_struct *tsk,
+                                     unsigned long flags)
 {
        return 0;
 }
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index e928c0dcc2..c8bb68099e 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -642,10 +642,14 @@ struct spi_board_info {
        u16             bus_num;
        u16             chip_select;
+        /* mode becomes spi_device.mode, and is essential for chips
+         * where the default of SPI_CS_HIGH = 0 is wrong.
+         */
+        u8              mode;
        /* ... may need additional spi_device chip config data here.
         * avoid stuff protocol drivers can set; but include stuff
         * needed to behave without being bound to a driver:
-         *  - chipselect polarity
         *  - quirks like clock rate mattering when not selected
         */
 };
diff --git a/include/linux/sunrpc/gss_api.h b/include/linux/sunrpc/gss_api.h
index 9b8bcf125c..6e112cc5cd 100644
--- a/include/linux/sunrpc/gss_api.h
+++ b/include/linux/sunrpc/gss_api.h
@@ -126,7 +126,7 @@ struct gss_api_mech *gss_mech_get_by_pseudoflavor(u32);
 /* Just increments the mechanism's reference count and returns its input: */
 struct gss_api_mech * gss_mech_get(struct gss_api_mech *);
-/* For every succesful gss_mech_get or gss_mech_get_by_* call there must be a
+/* For every successful gss_mech_get or gss_mech_get_by_* call there must be a
 * corresponding call to gss_mech_put. */
 void gss_mech_put(struct gss_api_mech *);
diff --git a/include/linux/suspend.h b/include/linux/suspend.h
index e82cb10fb3..96e31aa64c 100644
--- a/include/linux/suspend.h
+++ b/include/linux/suspend.h
@@ -71,7 +71,6 @@ struct saved_context;
 void __save_processor_state(struct saved_context *ctxt);
 void __restore_processor_state(struct saved_context *ctxt);
 unsigned long get_safe_page(gfp_t gfp_mask);
-int swsusp_add_arch_pages(unsigned long start, unsigned long end);
 /*
 * XXX: We try to keep some more pages free so that I/O operations succeed
diff --git a/include/linux/swap.h b/include/linux/swap.h
index dc3f3aa0c8..c41e2d6d1a 100644
--- a/include/linux/swap.h
+++ b/include/linux/swap.h
@@ -199,6 +199,8 @@ static inline int zone_reclaim(struct zone *z, gfp_t mask, unsigned int order)
 }
 #endif
+extern int kswapd_run(int nid);
 #ifdef CONFIG_MMU
 /* linux/mm/shmem.c */
 extern int shmem_unuse(swp_entry_t entry, struct page *page);
diff --git a/include/linux/syscalls.h b/include/linux/syscalls.h
index 33785b79d5..008f04c567 100644
--- a/include/linux/syscalls.h
+++ b/include/linux/syscalls.h
@@ -174,9 +174,9 @@ asmlinkage long sys_waitid(int which, pid_t pid,
                           int options, struct rusage __user *ru);
 asmlinkage long sys_waitpid(pid_t pid, int __user *stat_addr, int options);
 asmlinkage long sys_set_tid_address(int __user *tidptr);
-asmlinkage long sys_futex(u32 __user *uaddr, int op, int val,
+asmlinkage long sys_futex(u32 __user *uaddr, int op, u32 val,
                        struct timespec __user *utime, u32 __user *uaddr2,
-                        int val3);
+                        u32 val3);
 asmlinkage long sys_init_module(void __user *umod, unsigned long len,
                                const char __user *uargs);
diff --git a/include/linux/sysctl.h b/include/linux/sysctl.h
index 6a60770984..46e4d8f277 100644
--- a/include/linux/sysctl.h
+++ b/include/linux/sysctl.h
@@ -148,9 +148,12 @@ enum
        KERN_SPIN_RETRY=70,     /* int: number of spinlock retries */
        KERN_ACPI_VIDEO_FLAGS=71, /* int: flags for setting up video after ACPI sleep */
        KERN_IA64_UNALIGNED=72, /* int: ia64 unaligned userland trap enable */
+        KERN_COMPAT_LOG=73,     /* int: print compat layer  messages */
+        KERN_MAX_LOCK_DEPTH=74,
 };
 /* CTL_VM names: */
 enum
 {
@@ -187,6 +190,7 @@ enum
        VM_ZONE_RECLAIM_MODE=31, /* reclaim local zone memory before going off node */
        VM_ZONE_RECLAIM_INTERVAL=32, /* time period to wait after reclaim failure */
        VM_PANIC_ON_OOM=33,     /* panic at out-of-memory */
+        VM_VDSO_ENABLED=34,     /* map VDSO into new processes? */
 };
diff --git a/include/linux/time.h b/include/linux/time.h
index 0cd696cee9..c05f8bb9a3 100644
--- a/include/linux/time.h
+++ b/include/linux/time.h
@@ -28,10 +28,13 @@ struct timezone {
 #ifdef __KERNEL__
 /* Parameters used to convert the timespec values: */
-#define MSEC_PER_SEC            1000L
+#define MSEC_PER_SEC    1000L
-#define USEC_PER_SEC            1000000L
+#define USEC_PER_MSEC   1000L
-#define NSEC_PER_SEC            1000000000L
+#define NSEC_PER_USEC   1000L
-#define NSEC_PER_USEC           1000L
+#define NSEC_PER_MSEC   1000000L
+#define USEC_PER_SEC    1000000L
+#define NSEC_PER_SEC    1000000000L
+#define FSEC_PER_SEC    1000000000000000L
 static inline int timespec_equal(struct timespec *a, struct timespec *b)
 {
@@ -77,6 +80,8 @@ extern struct timespec xtime;
 extern struct timespec wall_to_monotonic;
 extern seqlock_t xtime_lock;
+void timekeeping_init(void);
 static inline unsigned long get_seconds(void)
 {
        return xtime.tv_sec;
@@ -100,6 +105,7 @@ extern int do_getitimer(int which, struct itimerval *value);
 extern void getnstimeofday(struct timespec *tv);
 extern struct timespec timespec_trunc(struct timespec t, unsigned gran);
+extern int timekeeping_is_continuous(void);
 /**
 * timespec_to_ns - Convert timespec to nanoseconds
@@ -142,6 +148,20 @@ extern struct timespec ns_to_timespec(const s64 nsec);
 */
 extern struct timeval ns_to_timeval(const s64 nsec);
+/**
+ * timespec_add_ns - Adds nanoseconds to a timespec
+ * @a:          pointer to timespec to be incremented
+ * @ns:         unsigned nanoseconds value to be added
+ */
+static inline void timespec_add_ns(struct timespec *a, u64 ns)
+{
+        ns += a->tv_nsec;
+        while(unlikely(ns >= NSEC_PER_SEC)) {
+                ns -= NSEC_PER_SEC;
+                a->tv_sec++;
+        }
+        a->tv_nsec = ns;
+}
 #endif /* __KERNEL__ */
 #define NFDBITS                 __NFDBITS
diff --git a/include/linux/timex.h b/include/linux/timex.h
index 34d3ccff7b..19bb6538b4 100644
--- a/include/linux/timex.h
+++ b/include/linux/timex.h
@@ -303,6 +303,8 @@ time_interpolator_reset(void)
 #endif /* !CONFIG_TIME_INTERPOLATION */
+#define TICK_LENGTH_SHIFT       32
 /* Returns how long ticks are at present, in ns / 2^(SHIFT_SCALE-10). */
 extern u64 current_tick_length(void);
diff --git a/include/linux/topology.h b/include/linux/topology.h
index a305ae2e44..ec1eca8529 100644
--- a/include/linux/topology.h
+++ b/include/linux/topology.h
@@ -134,7 +134,8 @@
        .flags                  = SD_LOAD_BALANCE       \
                                | SD_BALANCE_NEWIDLE    \
                                | SD_BALANCE_EXEC       \
-                                | SD_WAKE_AFFINE,       \
+                                | SD_WAKE_AFFINE        \
+                                | BALANCE_FOR_POWER,    \
        .last_balance           = jiffies,              \
        .balance_interval       = 1,                    \
        .nr_balance_failed      = 0,                    \
diff --git a/include/linux/tty.h b/include/linux/tty.h
index cb35ca50a0..b3b807e4b0 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -57,7 +57,6 @@ struct tty_buffer {
        unsigned char *flag_buf_ptr;
        int used;
        int size;
-        int active;
        int commit;
        int read;
        /* Data points here */
@@ -259,7 +258,6 @@ struct tty_struct {
 #define TTY_DO_WRITE_WAKEUP     5       /* Call write_wakeup after queuing new */
 #define TTY_PUSH                6       /* n_tty private */
 #define TTY_CLOSING             7       /* ->close() in progress */
-#define TTY_DONT_FLIP           8       /* Defer buffer flip */
 #define TTY_LDISC               9       /* Line discipline attached */
 #define TTY_HW_COOK_OUT         14      /* Hardware can do output cooking */
 #define TTY_HW_COOK_IN          15      /* Hardware can do input cooking */
diff --git a/include/linux/tty_flip.h b/include/linux/tty_flip.h
index 31548303ee..eb677cf561 100644
--- a/include/linux/tty_flip.h
+++ b/include/linux/tty_flip.h
@@ -12,7 +12,7 @@ static inline int tty_insert_flip_char(struct tty_struct *tty,
                                        unsigned char ch, char flag)
 {
        struct tty_buffer *tb = tty->buf.tail;
-        if (tb && tb->active && tb->used < tb->size) {
+        if (tb && tb->used < tb->size) {
                tb->flag_buf_ptr[tb->used] = flag;
                tb->char_buf_ptr[tb->used++] = ch;
                return 1;
diff --git a/include/linux/types.h b/include/linux/types.h
index a5e46e783f..3f235660a3 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -177,8 +177,15 @@ typedef __u64 __bitwise __be64;
 #ifdef __KERNEL__
 typedef unsigned __bitwise__ gfp_t;
+#ifdef CONFIG_RESOURCES_64BIT
+typedef u64 resource_size_t;
+#else
+typedef u32 resource_size_t;
 #endif
+#endif  /* __KERNEL__ */
 struct ustat {
        __kernel_daddr_t        f_tfree;
        __kernel_ino_t          f_tinode;
diff --git a/include/linux/ufs_fs.h b/include/linux/ufs_fs.h
index 914f911325..e39b7cc433 100644
--- a/include/linux/ufs_fs.h
+++ b/include/linux/ufs_fs.h
@@ -966,7 +966,7 @@ extern void ufs_set_link(struct inode *dir, struct ufs_dir_entry *de,
 extern struct inode_operations ufs_file_inode_operations;
 extern const struct file_operations ufs_file_operations;
-extern struct address_space_operations ufs_aops;
+extern const struct address_space_operations ufs_aops;
 /* ialloc.c */
 extern void ufs_free_inode (struct inode *inode);
diff --git a/include/linux/unwind.h b/include/linux/unwind.h
new file mode 100644
index 0000000000..ce48e2cd37
--- /dev/null
+++ b/include/linux/unwind.h
@@ -0,0 +1,127 @@
+#ifndef _LINUX_UNWIND_H
+#define _LINUX_UNWIND_H
+/*
+ * Copyright (C) 2002-2006 Novell, Inc.
+ *      Jan Beulich <jbeulich@novell.com>
+ * This code is released under version 2 of the GNU GPL.
+ *
+ * A simple API for unwinding kernel stacks.  This is used for
+ * debugging and error reporting purposes.  The kernel doesn't need
+ * full-blown stack unwinding with all the bells and whistles, so there
+ * is not much point in implementing the full Dwarf2 unwind API.
+ */
+#include <linux/config.h>
+struct module;
+#ifdef CONFIG_STACK_UNWIND
+#include <asm/unwind.h>
+#ifndef ARCH_UNWIND_SECTION_NAME
+#define ARCH_UNWIND_SECTION_NAME ".eh_frame"
+#endif
+/*
+ * Initialize unwind support.
+ */
+extern void unwind_init(void);
+#ifdef CONFIG_MODULES
+extern void *unwind_add_table(struct module *,
+                              const void *table_start,
+                              unsigned long table_size);
+extern void unwind_remove_table(void *handle, int init_only);
+#endif
+extern int unwind_init_frame_info(struct unwind_frame_info *,
+                                  struct task_struct *,
+                                  /*const*/ struct pt_regs *);
+/*
+ * Prepare to unwind a blocked task.
+ */
+extern int unwind_init_blocked(struct unwind_frame_info *,
+                               struct task_struct *);
+/*
+ * Prepare to unwind the currently running thread.
+ */
+extern int unwind_init_running(struct unwind_frame_info *,
+                               asmlinkage int (*callback)(struct unwind_frame_info *,
+                                                          void *arg),
+                               void *arg);
+/*
+ * Unwind to previous to frame.  Returns 0 if successful, negative
+ * number in case of an error.
+ */
+extern int unwind(struct unwind_frame_info *);
+/*
+ * Unwind until the return pointer is in user-land (or until an error
+ * occurs).  Returns 0 if successful, negative number in case of
+ * error.
+ */
+extern int unwind_to_user(struct unwind_frame_info *);
+#else
+struct unwind_frame_info {};
+static inline void unwind_init(void) {}
+#ifdef CONFIG_MODULES
+static inline void *unwind_add_table(struct module *mod,
+                                     const void *table_start,
+                                     unsigned long table_size)
+{
+        return NULL;
+}
+#endif
+static inline void unwind_remove_table(void *handle, int init_only)
+{
+}
+static inline int unwind_init_frame_info(struct unwind_frame_info *info,
+                                         struct task_struct *tsk,
+                                         const struct pt_regs *regs)
+{
+        return -ENOSYS;
+}
+static inline int unwind_init_blocked(struct unwind_frame_info *info,
+                                      struct task_struct *tsk)
+{
+        return -ENOSYS;
+}
+static inline int unwind_init_running(struct unwind_frame_info *info,
+                                      asmlinkage int (*cb)(struct unwind_frame_info *,
+                                                           void *arg),
+                                      void *arg)
+{
+        return -ENOSYS;
+}
+static inline int unwind(struct unwind_frame_info *info)
+{
+        return -ENOSYS;
+}
+static inline int unwind_to_user(struct unwind_frame_info *info)
+{
+        return -ENOSYS;
+}
+#endif
+#endif /* _LINUX_UNWIND_H */
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h
index 4f428547ec..a62673dad7 100644
--- a/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@ -245,6 +245,7 @@ struct v4l2_pix_format
 #define V4L2_PIX_FMT_YUV420  v4l2_fourcc('Y','U','1','2') /* 12  YUV 4:2:0     */
 #define V4L2_PIX_FMT_YYUV    v4l2_fourcc('Y','Y','U','V') /* 16  YUV 4:2:2     */
 #define V4L2_PIX_FMT_HI240   v4l2_fourcc('H','I','2','4') /*  8  8-bit color   */
+#define V4L2_PIX_FMT_HM12    v4l2_fourcc('H','M','1','2') /*  8  YUV 4:1:1 16x16 macroblocks */
 /* see http://www.siliconimaging.com/RGB%20Bayer.htm */
 #define V4L2_PIX_FMT_SBGGR8  v4l2_fourcc('B','A','8','1') /*  8  BGBG.. GRGR.. */
@@ -821,6 +822,11 @@ enum v4l2_mpeg_stream_type {
 #define V4L2_CID_MPEG_STREAM_PID_PCR            (V4L2_CID_MPEG_BASE+4)
 #define V4L2_CID_MPEG_STREAM_PES_ID_AUDIO       (V4L2_CID_MPEG_BASE+5)
 #define V4L2_CID_MPEG_STREAM_PES_ID_VIDEO       (V4L2_CID_MPEG_BASE+6)
+#define V4L2_CID_MPEG_STREAM_VBI_FMT            (V4L2_CID_MPEG_BASE+7)
+enum v4l2_mpeg_stream_vbi_fmt {
+        V4L2_MPEG_STREAM_VBI_FMT_NONE = 0,  /* No VBI in the MPEG stream */
+        V4L2_MPEG_STREAM_VBI_FMT_IVTV = 1,  /* VBI in private packets, IVTV format */
+};
 /*  MPEG audio */
 #define V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ       (V4L2_CID_MPEG_BASE+100)
diff --git a/include/linux/watchdog.h b/include/linux/watchdog.h
index 1192ed8f4f..011bcfeb9f 100644
--- a/include/linux/watchdog.h
+++ b/include/linux/watchdog.h
@@ -28,6 +28,9 @@ struct watchdog_info {
 #define WDIOC_KEEPALIVE         _IOR(WATCHDOG_IOCTL_BASE, 5, int)
 #define WDIOC_SETTIMEOUT        _IOWR(WATCHDOG_IOCTL_BASE, 6, int)
 #define WDIOC_GETTIMEOUT        _IOR(WATCHDOG_IOCTL_BASE, 7, int)
+#define WDIOC_SETPRETIMEOUT     _IOWR(WATCHDOG_IOCTL_BASE, 8, int)
+#define WDIOC_GETPRETIMEOUT     _IOR(WATCHDOG_IOCTL_BASE, 9, int)
+#define WDIOC_GETTIMELEFT       _IOR(WATCHDOG_IOCTL_BASE, 10, int)
 #define WDIOF_UNKNOWN           -1      /* Unknown flag error */
 #define WDIOS_UNKNOWN           -1      /* Unknown status error */
@@ -38,9 +41,10 @@ struct watchdog_info {
 #define WDIOF_EXTERN2           0x0008  /* External relay 2 */
 #define WDIOF_POWERUNDER        0x0010  /* Power bad/power fault */
 #define WDIOF_CARDRESET         0x0020  /* Card previously reset the CPU */
-#define WDIOF_POWEROVER         0x0040  /* Power over voltage */
+#define WDIOF_POWEROVER         0x0040  /* Power over voltage */
-#define WDIOF_SETTIMEOUT        0x0080  /* Set timeout (in seconds) */
+#define WDIOF_SETTIMEOUT        0x0080  /* Set timeout (in seconds) */
-#define WDIOF_MAGICCLOSE        0x0100  /* Supports magic close char */
+#define WDIOF_MAGICCLOSE        0x0100  /* Supports magic close char */
+#define WDIOF_PRETIMEOUT        0x0200  /* Pretimeout (in seconds), get/set */
 #define WDIOF_KEEPALIVEPING     0x8000  /* Keep alive ping reply */
 #define WDIOS_DISABLECARD       0x0001  /* Turn off the watchdog timer */
diff --git a/include/media/cx2341x.h b/include/media/cx2341x.h
index 51fb06b4c3..d91d88f93c 100644
--- a/include/media/cx2341x.h
+++ b/include/media/cx2341x.h
@@ -25,8 +25,13 @@ enum cx2341x_port {
        CX2341X_PORT_SERIAL    = 2
 };
+enum cx2341x_cap {
+        CX2341X_CAP_HAS_SLICED_VBI = 1 << 0,
+};
 struct cx2341x_mpeg_params {
        /* misc */
+        u32 capabilities;
        enum cx2341x_port port;
        u16 width;
        u16 height;
@@ -34,6 +39,7 @@ struct cx2341x_mpeg_params {
        /* stream */
        enum v4l2_mpeg_stream_type stream_type;
+        enum v4l2_mpeg_stream_vbi_fmt stream_vbi_fmt;
        /* audio */
        enum v4l2_mpeg_audio_sampling_freq audio_sampling_freq;
@@ -83,9 +89,9 @@ int cx2341x_ctrl_query(struct cx2341x_mpeg_params *params,
                struct v4l2_queryctrl *qctrl);
 const char **cx2341x_ctrl_get_menu(u32 id);
 int cx2341x_ext_ctrls(struct cx2341x_mpeg_params *params,
-                struct v4l2_ext_controls *ctrls, int cmd);
+                struct v4l2_ext_controls *ctrls, unsigned int cmd);
 void cx2341x_fill_defaults(struct cx2341x_mpeg_params *p);
-void cx2341x_log_status(struct cx2341x_mpeg_params *p, int cardid);
+void cx2341x_log_status(struct cx2341x_mpeg_params *p, const char *prefix);
 /* Firmware names */
 #define CX2341X_FIRM_ENC_FILENAME "v4l-cx2341x-enc.fw"
diff --git a/include/net/tipc/tipc_bearer.h b/include/net/tipc/tipc_bearer.h
index 098607cd4b..e07136d74c 100644
--- a/include/net/tipc/tipc_bearer.h
+++ b/include/net/tipc/tipc_bearer.h
@@ -49,10 +49,18 @@
 #define TIPC_MEDIA_TYPE_ETH     1
+/* 
+ * Destination address structure used by TIPC bearers when sending messages
+ * 
+ * IMPORTANT: The fields of this structure MUST be stored using the specified
+ * byte order indicated below, as the structure is exchanged between nodes
+ * as part of a link setup process.
+ */
 struct tipc_media_addr {
-        __u32  type;
+        __u32  type;                    /* bearer type (network byte order) */
        union {
-                __u8   eth_addr[6];     /* Ethernet bearer */ 
+                __u8   eth_addr[6];     /* 48 bit Ethernet addr (byte array) */ 
 #if 0
                /* Prototypes for other possible bearer types */