aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/Kconfig2
-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/acpi/sleep/main.c16
-rw-r--r--drivers/acpi/sleep/poweroff.c41
-rw-r--r--drivers/base/power/Makefile2
-rw-r--r--drivers/block/Makefile1
-rw-r--r--drivers/block/lguest_blk.c275
-rw-r--r--drivers/block/sx8.c3
-rw-r--r--drivers/char/Makefile1
-rw-r--r--drivers/char/amiserial.c3
-rw-r--r--drivers/char/drm/via_dmablit.c3
-rw-r--r--drivers/char/esp.c6
-rw-r--r--drivers/char/hvc_lguest.c102
-rw-r--r--drivers/char/hvcs.c4
-rw-r--r--drivers/char/ip2/ip2main.c4
-rw-r--r--drivers/char/ipmi/ipmi_msghandler.c3
-rw-r--r--drivers/char/mbcs.c27
-rw-r--r--drivers/char/mbcs.h10
-rw-r--r--drivers/char/pcmcia/synclink_cs.c3
-rw-r--r--drivers/char/random.c9
-rw-r--r--drivers/char/rio/rio_linux.c4
-rw-r--r--drivers/char/rio/riocmd.c4
-rw-r--r--drivers/char/rio/riotable.c3
-rw-r--r--drivers/char/rocket.c3
-rw-r--r--drivers/char/stallion.c5
-rw-r--r--drivers/char/synclink.c3
-rw-r--r--drivers/char/synclink_gt.c3
-rw-r--r--drivers/char/synclinkmp.c3
-rw-r--r--drivers/char/viotape.c7
-rw-r--r--drivers/char/watchdog/mpcore_wdt.c3
-rw-r--r--drivers/char/watchdog/pcwd_usb.c3
-rw-r--r--drivers/edac/Kconfig53
-rw-r--r--drivers/edac/Makefile17
-rw-r--r--drivers/edac/amd76x_edac.c75
-rw-r--r--drivers/edac/e752x_edac.c320
-rw-r--r--drivers/edac/e7xxx_edac.c125
-rw-r--r--drivers/edac/edac_core.h (renamed from drivers/edac/edac_mc.h)506
-rw-r--r--drivers/edac/edac_device.c746
-rw-r--r--drivers/edac/edac_device_sysfs.c896
-rw-r--r--drivers/edac/edac_mc.c1676
-rw-r--r--drivers/edac/edac_mc_sysfs.c1024
-rw-r--r--drivers/edac/edac_module.c222
-rw-r--r--drivers/edac/edac_module.h77
-rw-r--r--drivers/edac/edac_pci.c433
-rw-r--r--drivers/edac/edac_pci_sysfs.c620
-rw-r--r--drivers/edac/edac_stub.c46
-rw-r--r--drivers/edac/i3000_edac.c506
-rw-r--r--drivers/edac/i5000_edac.c1505
-rw-r--r--drivers/edac/i82443bxgx_edac.c402
-rw-r--r--drivers/edac/i82860_edac.c56
-rw-r--r--drivers/edac/i82875p_edac.c92
-rw-r--r--drivers/edac/i82975x_edac.c666
-rw-r--r--drivers/edac/pasemi_edac.c299
-rw-r--r--drivers/edac/r82600_edac.c77
-rw-r--r--drivers/hwmon/Kconfig82
-rw-r--r--drivers/hwmon/Makefile3
-rw-r--r--drivers/hwmon/abituguru.c45
-rw-r--r--drivers/hwmon/abituguru3.c1140
-rw-r--r--drivers/hwmon/coretemp.c2
-rw-r--r--drivers/hwmon/dme1737.c2080
-rw-r--r--drivers/hwmon/ds1621.c161
-rw-r--r--drivers/hwmon/f71805f.c178
-rw-r--r--drivers/hwmon/it87.c497
-rw-r--r--drivers/hwmon/lm63.c4
-rw-r--r--drivers/hwmon/lm83.c12
-rw-r--r--drivers/hwmon/lm90.c78
-rw-r--r--drivers/hwmon/lm93.c2655
-rw-r--r--drivers/hwmon/pc87360.c232
-rw-r--r--drivers/hwmon/pc87427.c2
-rw-r--r--drivers/hwmon/sis5595.c510
-rw-r--r--drivers/hwmon/smsc47b397.c7
-rw-r--r--drivers/hwmon/smsc47m1.c12
-rw-r--r--drivers/hwmon/smsc47m192.c37
-rw-r--r--drivers/hwmon/via686a.c538
-rw-r--r--drivers/hwmon/vt8231.c318
-rw-r--r--drivers/hwmon/w83627ehf.c615
-rw-r--r--drivers/hwmon/w83627hf.c153
-rw-r--r--drivers/i2c/busses/Kconfig3
-rw-r--r--drivers/i2c/busses/Makefile1
-rw-r--r--drivers/i2c/busses/i2c-isa.c192
-rw-r--r--drivers/i2c/i2c-core.c2
-rw-r--r--drivers/ide/ide-io.c17
-rw-r--r--drivers/ide/mips/swarm.c3
-rw-r--r--drivers/infiniband/core/addr.c3
-rw-r--r--drivers/infiniband/hw/cxgb3/iwch_cm.c3
-rw-r--r--drivers/input/serio/ambakmi.c6
-rw-r--r--drivers/input/serio/pcips2.c6
-rw-r--r--drivers/input/serio/sa1111ps2.c6
-rw-r--r--drivers/isdn/sc/card.h2
-rw-r--r--drivers/isdn/sc/command.c2
-rw-r--r--drivers/isdn/sc/timer.c2
-rw-r--r--drivers/kvm/Kconfig1
-rw-r--r--drivers/lguest/Kconfig20
-rw-r--r--drivers/lguest/Makefile7
-rw-r--r--drivers/lguest/core.c462
-rw-r--r--drivers/lguest/hypercalls.c192
-rw-r--r--drivers/lguest/interrupts_and_traps.c268
-rw-r--r--drivers/lguest/io.c399
-rw-r--r--drivers/lguest/lg.h261
-rw-r--r--drivers/lguest/lguest.c621
-rw-r--r--drivers/lguest/lguest_asm.S56
-rw-r--r--drivers/lguest/lguest_bus.c148
-rw-r--r--drivers/lguest/lguest_user.c236
-rw-r--r--drivers/lguest/page_tables.c411
-rw-r--r--drivers/lguest/segments.c125
-rw-r--r--drivers/lguest/switcher.S159
-rw-r--r--drivers/macintosh/macio_asic.c3
-rw-r--r--drivers/macintosh/smu.c3
-rw-r--r--drivers/macintosh/therm_pm72.c3
-rw-r--r--drivers/macintosh/therm_windtunnel.c3
-rw-r--r--drivers/macintosh/windfarm_lm75_sensor.c3
-rw-r--r--drivers/md/dm-raid1.c3
-rw-r--r--drivers/media/dvb/cinergyT2/cinergyT2.c3
-rw-r--r--drivers/media/video/cpia2/cpia2_core.c4
-rw-r--r--drivers/media/video/msp3400-driver.c3
-rw-r--r--drivers/media/video/planb.c3
-rw-r--r--drivers/media/video/usbvideo/vicam.c3
-rw-r--r--drivers/mfd/mcp-core.c3
-rw-r--r--drivers/mfd/ucb1x00-core.c3
-rw-r--r--drivers/misc/asus-laptop.c3
-rw-r--r--drivers/misc/ibmasm/command.c6
-rw-r--r--drivers/misc/ibmasm/ibmasmfs.c3
-rw-r--r--drivers/misc/ibmasm/module.c3
-rw-r--r--drivers/mmc/card/block.c3
-rw-r--r--drivers/net/Makefile1
-rw-r--r--drivers/net/b44.c3
-rw-r--r--drivers/net/bsd_comp.c3
-rw-r--r--drivers/net/forcedeth.c6
-rw-r--r--drivers/net/hamradio/dmascc.c6
-rw-r--r--drivers/net/irda/irport.c3
-rw-r--r--drivers/net/irda/irtty-sir.c3
-rw-r--r--drivers/net/iseries_veth.c6
-rw-r--r--drivers/net/lance.c3
-rw-r--r--drivers/net/lguest_net.c354
-rw-r--r--drivers/net/pcmcia/com20020_cs.c3
-rw-r--r--drivers/net/pcmcia/ibmtr_cs.c3
-rw-r--r--drivers/net/ppp_async.c3
-rw-r--r--drivers/net/ppp_deflate.c6
-rw-r--r--drivers/net/ppp_generic.c3
-rw-r--r--drivers/net/ppp_mppe.c3
-rw-r--r--drivers/net/ppp_synctty.c3
-rw-r--r--drivers/net/shaper.c3
-rw-r--r--drivers/net/tg3.c114
-rw-r--r--drivers/net/tg3.h1
-rw-r--r--drivers/net/wan/c101.c3
-rw-r--r--drivers/net/wan/cosa.c4
-rw-r--r--drivers/net/wan/cycx_main.c4
-rw-r--r--drivers/net/wan/cycx_x25.c3
-rw-r--r--drivers/net/wan/dscc4.c6
-rw-r--r--drivers/net/wan/farsync.c3
-rw-r--r--drivers/net/wan/hostess_sv11.c3
-rw-r--r--drivers/net/wan/n2.c3
-rw-r--r--drivers/net/wan/pc300_drv.c3
-rw-r--r--drivers/net/wan/pc300too.c3
-rw-r--r--drivers/net/wan/pci200syn.c3
-rw-r--r--drivers/net/wan/sdla.c3
-rw-r--r--drivers/net/wan/sealevel.c3
-rw-r--r--drivers/net/wan/wanxl.c3
-rw-r--r--drivers/net/wan/x25_asy.c4
-rw-r--r--drivers/nubus/nubus.c6
-rw-r--r--drivers/parport/parport_cs.c3
-rw-r--r--drivers/parport/parport_serial.c3
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c3
-rw-r--r--drivers/pnp/core.c3
-rw-r--r--drivers/rapidio/rio-scan.c6
-rw-r--r--drivers/rtc/rtc-cmos.c33
-rw-r--r--drivers/s390/char/tape_34xx.c3
-rw-r--r--drivers/s390/net/claw.c9
-rw-r--r--drivers/sbus/char/bbc_i2c.c3
-rw-r--r--drivers/sbus/char/vfc_dev.c5
-rw-r--r--drivers/scsi/3w-9xxx.c3
-rw-r--r--drivers/scsi/NCR53C9x.c3
-rw-r--r--drivers/scsi/NCR_D700.c3
-rw-r--r--drivers/scsi/NCR_Q720.c3
-rw-r--r--drivers/scsi/imm.c3
-rw-r--r--drivers/scsi/ips.c3
-rw-r--r--drivers/scsi/lasi700.c3
-rw-r--r--drivers/scsi/lpfc/lpfc_init.c3
-rw-r--r--drivers/scsi/megaraid/megaraid_mbox.c14
-rw-r--r--drivers/scsi/megaraid/megaraid_mm.c3
-rw-r--r--drivers/scsi/megaraid/megaraid_sas.c4
-rw-r--r--drivers/scsi/pcmcia/aha152x_stub.c3
-rw-r--r--drivers/scsi/pcmcia/nsp_cs.c3
-rw-r--r--drivers/scsi/pcmcia/qlogic_stub.c3
-rw-r--r--drivers/scsi/pcmcia/sym53c500_cs.c3
-rw-r--r--drivers/scsi/ppa.c3
-rw-r--r--drivers/scsi/sim710.c3
-rw-r--r--drivers/scsi/tmscsim.c3
-rw-r--r--drivers/serial/amba-pl011.c3
-rw-r--r--drivers/sh/superhyway/superhyway.c3
-rw-r--r--drivers/sn/ioc3.c3
-rw-r--r--drivers/telephony/ixj_pcmcia.c3
-rw-r--r--drivers/usb/gadget/goku_udc.c3
-rw-r--r--drivers/usb/gadget/serial.c3
-rw-r--r--drivers/usb/host/ohci-hcd.c3
-rw-r--r--drivers/usb/host/sl811_cs.c3
-rw-r--r--drivers/video/amba-clcd.c3
-rw-r--r--drivers/video/aty/atyfb_base.c3
-rw-r--r--drivers/video/au1200fb.c3
-rw-r--r--drivers/video/clps711xfb.c3
-rw-r--r--drivers/video/cyber2000fb.c3
-rw-r--r--drivers/video/logo/logo.c7
-rw-r--r--drivers/video/pvr2fb.c3
-rw-r--r--drivers/video/savage/savagefb_driver.c3
-rw-r--r--drivers/video/valkyriefb.c3
-rw-r--r--drivers/w1/masters/matrox_w1.c3
-rw-r--r--drivers/w1/slaves/w1_ds2433.c3
-rw-r--r--drivers/w1/w1.c3
-rw-r--r--drivers/w1/w1_int.c3
209 files changed, 21001 insertions, 3819 deletions
diff --git a/drivers/Kconfig b/drivers/Kconfig
index ae01d86070..707650ab77 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -85,4 +85,6 @@ source "drivers/auxdisplay/Kconfig"
85source "drivers/kvm/Kconfig" 85source "drivers/kvm/Kconfig"
86 86
87source "drivers/uio/Kconfig" 87source "drivers/uio/Kconfig"
88
89source "drivers/lguest/Kconfig"
88endmenu 90endmenu
diff --git a/drivers/Makefile b/drivers/Makefile
index c34c8efff6..0ea8e3237c 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -73,6 +73,7 @@ obj-$(CONFIG_ISDN) += isdn/
73obj-$(CONFIG_EDAC) += edac/ 73obj-$(CONFIG_EDAC) += edac/
74obj-$(CONFIG_MCA) += mca/ 74obj-$(CONFIG_MCA) += mca/
75obj-$(CONFIG_EISA) += eisa/ 75obj-$(CONFIG_EISA) += eisa/
76obj-$(CONFIG_LGUEST_GUEST) += lguest/
76obj-$(CONFIG_CPU_FREQ) += cpufreq/ 77obj-$(CONFIG_CPU_FREQ) += cpufreq/
77obj-$(CONFIG_MMC) += mmc/ 78obj-$(CONFIG_MMC) += mmc/
78obj-$(CONFIG_NEW_LEDS) += leds/ 79obj-$(CONFIG_NEW_LEDS) += leds/
diff --git a/drivers/acpi/sleep/main.c b/drivers/acpi/sleep/main.c
index bc7e16ec83..42127c0d61 100644
--- a/drivers/acpi/sleep/main.c
+++ b/drivers/acpi/sleep/main.c
@@ -217,10 +217,26 @@ static void acpi_hibernation_finish(void)
217 } 217 }
218} 218}
219 219
220static int acpi_hibernation_pre_restore(void)
221{
222 acpi_status status;
223
224 status = acpi_hw_disable_all_gpes();
225
226 return ACPI_SUCCESS(status) ? 0 : -EFAULT;
227}
228
229static void acpi_hibernation_restore_cleanup(void)
230{
231 acpi_hw_enable_all_runtime_gpes();
232}
233
220static struct hibernation_ops acpi_hibernation_ops = { 234static struct hibernation_ops acpi_hibernation_ops = {
221 .prepare = acpi_hibernation_prepare, 235 .prepare = acpi_hibernation_prepare,
222 .enter = acpi_hibernation_enter, 236 .enter = acpi_hibernation_enter,
223 .finish = acpi_hibernation_finish, 237 .finish = acpi_hibernation_finish,
238 .pre_restore = acpi_hibernation_pre_restore,
239 .restore_cleanup = acpi_hibernation_restore_cleanup,
224}; 240};
225#endif /* CONFIG_SOFTWARE_SUSPEND */ 241#endif /* CONFIG_SOFTWARE_SUSPEND */
226 242
diff --git a/drivers/acpi/sleep/poweroff.c b/drivers/acpi/sleep/poweroff.c
index d9801eff64..39e40d56b0 100644
--- a/drivers/acpi/sleep/poweroff.c
+++ b/drivers/acpi/sleep/poweroff.c
@@ -39,7 +39,13 @@ int acpi_sleep_prepare(u32 acpi_state)
39 39
40#ifdef CONFIG_PM 40#ifdef CONFIG_PM
41 41
42void acpi_power_off(void) 42static void acpi_power_off_prepare(void)
43{
44 /* Prepare to power off the system */
45 acpi_sleep_prepare(ACPI_STATE_S5);
46}
47
48static void acpi_power_off(void)
43{ 49{
44 /* acpi_sleep_prepare(ACPI_STATE_S5) should have already been called */ 50 /* acpi_sleep_prepare(ACPI_STATE_S5) should have already been called */
45 printk("%s called\n", __FUNCTION__); 51 printk("%s called\n", __FUNCTION__);
@@ -48,30 +54,6 @@ void acpi_power_off(void)
48 acpi_enter_sleep_state(ACPI_STATE_S5); 54 acpi_enter_sleep_state(ACPI_STATE_S5);
49} 55}
50 56
51static int acpi_shutdown(struct sys_device *x)
52{
53 switch (system_state) {
54 case SYSTEM_POWER_OFF:
55 /* Prepare to power off the system */
56 return acpi_sleep_prepare(ACPI_STATE_S5);
57 case SYSTEM_SUSPEND_DISK:
58 /* Prepare to suspend the system to disk */
59 return acpi_sleep_prepare(ACPI_STATE_S4);
60 default:
61 return 0;
62 }
63}
64
65static struct sysdev_class acpi_sysclass = {
66 set_kset_name("acpi"),
67 .shutdown = acpi_shutdown
68};
69
70static struct sys_device device_acpi = {
71 .id = 0,
72 .cls = &acpi_sysclass,
73};
74
75static int acpi_poweroff_init(void) 57static int acpi_poweroff_init(void)
76{ 58{
77 if (!acpi_disabled) { 59 if (!acpi_disabled) {
@@ -81,13 +63,8 @@ static int acpi_poweroff_init(void)
81 status = 63 status =
82 acpi_get_sleep_type_data(ACPI_STATE_S5, &type_a, &type_b); 64 acpi_get_sleep_type_data(ACPI_STATE_S5, &type_a, &type_b);
83 if (ACPI_SUCCESS(status)) { 65 if (ACPI_SUCCESS(status)) {
84 int error; 66 pm_power_off_prepare = acpi_power_off_prepare;
85 error = sysdev_class_register(&acpi_sysclass); 67 pm_power_off = acpi_power_off;
86 if (!error)
87 error = sysdev_register(&device_acpi);
88 if (!error)
89 pm_power_off = acpi_power_off;
90 return error;
91 } 68 }
92 } 69 }
93 return 0; 70 return 0;
diff --git a/drivers/base/power/Makefile b/drivers/base/power/Makefile
index fff1780072..966a5e2874 100644
--- a/drivers/base/power/Makefile
+++ b/drivers/base/power/Makefile
@@ -5,6 +5,6 @@ obj-$(CONFIG_PM_TRACE) += trace.o
5ifeq ($(CONFIG_DEBUG_DRIVER),y) 5ifeq ($(CONFIG_DEBUG_DRIVER),y)
6EXTRA_CFLAGS += -DDEBUG 6EXTRA_CFLAGS += -DDEBUG
7endif 7endif
8ifeq ($(CONFIG_PM_DEBUG),y) 8ifeq ($(CONFIG_PM_VERBOSE),y)
9EXTRA_CFLAGS += -DDEBUG 9EXTRA_CFLAGS += -DDEBUG
10endif 10endif
diff --git a/drivers/block/Makefile b/drivers/block/Makefile
index 3e31532df0..819c829125 100644
--- a/drivers/block/Makefile
+++ b/drivers/block/Makefile
@@ -30,3 +30,4 @@ obj-$(CONFIG_BLK_DEV_SX8) += sx8.o
30obj-$(CONFIG_BLK_DEV_UB) += ub.o 30obj-$(CONFIG_BLK_DEV_UB) += ub.o
31 31
32obj-$(CONFIG_XEN_BLKDEV_FRONTEND) += xen-blkfront.o 32obj-$(CONFIG_XEN_BLKDEV_FRONTEND) += xen-blkfront.o
33obj-$(CONFIG_LGUEST_GUEST) += lguest_blk.o
diff --git a/drivers/block/lguest_blk.c b/drivers/block/lguest_blk.c
new file mode 100644
index 0000000000..1634c2dd25
--- /dev/null
+++ b/drivers/block/lguest_blk.c
@@ -0,0 +1,275 @@
1/* A simple block driver for lguest.
2 *
3 * Copyright 2006 Rusty Russell <rusty@rustcorp.com.au> IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19//#define DEBUG
20#include <linux/init.h>
21#include <linux/types.h>
22#include <linux/blkdev.h>
23#include <linux/interrupt.h>
24#include <linux/lguest_bus.h>
25
26static char next_block_index = 'a';
27
28struct blockdev
29{
30 spinlock_t lock;
31
32 /* The disk structure for the kernel. */
33 struct gendisk *disk;
34
35 /* The major number for this disk. */
36 int major;
37 int irq;
38
39 unsigned long phys_addr;
40 /* The mapped block page. */
41 struct lguest_block_page *lb_page;
42
43 /* We only have a single request outstanding at a time. */
44 struct lguest_dma dma;
45 struct request *req;
46};
47
48/* Jens gave me this nice helper to end all chunks of a request. */
49static void end_entire_request(struct request *req, int uptodate)
50{
51 if (end_that_request_first(req, uptodate, req->hard_nr_sectors))
52 BUG();
53 add_disk_randomness(req->rq_disk);
54 blkdev_dequeue_request(req);
55 end_that_request_last(req, uptodate);
56}
57
58static irqreturn_t lgb_irq(int irq, void *_bd)
59{
60 struct blockdev *bd = _bd;
61 unsigned long flags;
62
63 if (!bd->req) {
64 pr_debug("No work!\n");
65 return IRQ_NONE;
66 }
67
68 if (!bd->lb_page->result) {
69 pr_debug("No result!\n");
70 return IRQ_NONE;
71 }
72
73 spin_lock_irqsave(&bd->lock, flags);
74 end_entire_request(bd->req, bd->lb_page->result == 1);
75 bd->req = NULL;
76 bd->dma.used_len = 0;
77 blk_start_queue(bd->disk->queue);
78 spin_unlock_irqrestore(&bd->lock, flags);
79 return IRQ_HANDLED;
80}
81
82static unsigned int req_to_dma(struct request *req, struct lguest_dma *dma)
83{
84 unsigned int i = 0, idx, len = 0;
85 struct bio *bio;
86
87 rq_for_each_bio(bio, req) {
88 struct bio_vec *bvec;
89 bio_for_each_segment(bvec, bio, idx) {
90 BUG_ON(i == LGUEST_MAX_DMA_SECTIONS);
91 BUG_ON(!bvec->bv_len);
92 dma->addr[i] = page_to_phys(bvec->bv_page)
93 + bvec->bv_offset;
94 dma->len[i] = bvec->bv_len;
95 len += bvec->bv_len;
96 i++;
97 }
98 }
99 if (i < LGUEST_MAX_DMA_SECTIONS)
100 dma->len[i] = 0;
101 return len;
102}
103
104static void empty_dma(struct lguest_dma *dma)
105{
106 dma->len[0] = 0;
107}
108
109static void setup_req(struct blockdev *bd,
110 int type, struct request *req, struct lguest_dma *dma)
111{
112 bd->lb_page->type = type;
113 bd->lb_page->sector = req->sector;
114 bd->lb_page->result = 0;
115 bd->req = req;
116 bd->lb_page->bytes = req_to_dma(req, dma);
117}
118
119static void do_write(struct blockdev *bd, struct request *req)
120{
121 struct lguest_dma send;
122
123 pr_debug("lgb: WRITE sector %li\n", (long)req->sector);
124 setup_req(bd, 1, req, &send);
125
126 lguest_send_dma(bd->phys_addr, &send);
127}
128
129static void do_read(struct blockdev *bd, struct request *req)
130{
131 struct lguest_dma ping;
132
133 pr_debug("lgb: READ sector %li\n", (long)req->sector);
134 setup_req(bd, 0, req, &bd->dma);
135
136 empty_dma(&ping);
137 lguest_send_dma(bd->phys_addr, &ping);
138}
139
140static void do_lgb_request(request_queue_t *q)
141{
142 struct blockdev *bd;
143 struct request *req;
144
145again:
146 req = elv_next_request(q);
147 if (!req)
148 return;
149
150 bd = req->rq_disk->private_data;
151 /* Sometimes we get repeated requests after blk_stop_queue. */
152 if (bd->req)
153 return;
154
155 if (!blk_fs_request(req)) {
156 pr_debug("Got non-command 0x%08x\n", req->cmd_type);
157 req->errors++;
158 end_entire_request(req, 0);
159 goto again;
160 }
161
162 if (rq_data_dir(req) == WRITE)
163 do_write(bd, req);
164 else
165 do_read(bd, req);
166
167 /* Wait for interrupt to tell us it's done. */
168 blk_stop_queue(q);
169}
170
171static struct block_device_operations lguestblk_fops = {
172 .owner = THIS_MODULE,
173};
174
175static int lguestblk_probe(struct lguest_device *lgdev)
176{
177 struct blockdev *bd;
178 int err;
179 int irqflags = IRQF_SHARED;
180
181 bd = kmalloc(sizeof(*bd), GFP_KERNEL);
182 if (!bd)
183 return -ENOMEM;
184
185 spin_lock_init(&bd->lock);
186 bd->irq = lgdev_irq(lgdev);
187 bd->req = NULL;
188 bd->dma.used_len = 0;
189 bd->dma.len[0] = 0;
190 bd->phys_addr = (lguest_devices[lgdev->index].pfn << PAGE_SHIFT);
191
192 bd->lb_page = lguest_map(bd->phys_addr, 1);
193 if (!bd->lb_page) {
194 err = -ENOMEM;
195 goto out_free_bd;
196 }
197
198 bd->major = register_blkdev(0, "lguestblk");
199 if (bd->major < 0) {
200 err = bd->major;
201 goto out_unmap;
202 }
203
204 bd->disk = alloc_disk(1);
205 if (!bd->disk) {
206 err = -ENOMEM;
207 goto out_unregister_blkdev;
208 }
209
210 bd->disk->queue = blk_init_queue(do_lgb_request, &bd->lock);
211 if (!bd->disk->queue) {
212 err = -ENOMEM;
213 goto out_put_disk;
214 }
215
216 /* We can only handle a certain number of sg entries */
217 blk_queue_max_hw_segments(bd->disk->queue, LGUEST_MAX_DMA_SECTIONS);
218 /* Buffers must not cross page boundaries */
219 blk_queue_segment_boundary(bd->disk->queue, PAGE_SIZE-1);
220
221 sprintf(bd->disk->disk_name, "lgb%c", next_block_index++);
222 if (lguest_devices[lgdev->index].features & LGUEST_DEVICE_F_RANDOMNESS)
223 irqflags |= IRQF_SAMPLE_RANDOM;
224 err = request_irq(bd->irq, lgb_irq, irqflags, bd->disk->disk_name, bd);
225 if (err)
226 goto out_cleanup_queue;
227
228 err = lguest_bind_dma(bd->phys_addr, &bd->dma, 1, bd->irq);
229 if (err)
230 goto out_free_irq;
231
232 bd->disk->major = bd->major;
233 bd->disk->first_minor = 0;
234 bd->disk->private_data = bd;
235 bd->disk->fops = &lguestblk_fops;
236 /* This is initialized to the disk size by the other end. */
237 set_capacity(bd->disk, bd->lb_page->num_sectors);
238 add_disk(bd->disk);
239
240 printk(KERN_INFO "%s: device %i at major %d\n",
241 bd->disk->disk_name, lgdev->index, bd->major);
242
243 lgdev->private = bd;
244 return 0;
245
246out_free_irq:
247 free_irq(bd->irq, bd);
248out_cleanup_queue:
249 blk_cleanup_queue(bd->disk->queue);
250out_put_disk:
251 put_disk(bd->disk);
252out_unregister_blkdev:
253 unregister_blkdev(bd->major, "lguestblk");
254out_unmap:
255 lguest_unmap(bd->lb_page);
256out_free_bd:
257 kfree(bd);
258 return err;
259}
260
261static struct lguest_driver lguestblk_drv = {
262 .name = "lguestblk",
263 .owner = THIS_MODULE,
264 .device_type = LGUEST_DEVICE_T_BLOCK,
265 .probe = lguestblk_probe,
266};
267
268static __init int lguestblk_init(void)
269{
270 return register_lguest_driver(&lguestblk_drv);
271}
272module_init(lguestblk_init);
273
274MODULE_DESCRIPTION("Lguest block driver");
275MODULE_LICENSE("GPL");
diff --git a/drivers/block/sx8.c b/drivers/block/sx8.c
index 54509eb339..949ae93499 100644
--- a/drivers/block/sx8.c
+++ b/drivers/block/sx8.c
@@ -1608,7 +1608,7 @@ static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1608 } 1608 }
1609#endif 1609#endif
1610 1610
1611 host = kmalloc(sizeof(*host), GFP_KERNEL); 1611 host = kzalloc(sizeof(*host), GFP_KERNEL);
1612 if (!host) { 1612 if (!host) {
1613 printk(KERN_ERR DRV_NAME "(%s): memory alloc failure\n", 1613 printk(KERN_ERR DRV_NAME "(%s): memory alloc failure\n",
1614 pci_name(pdev)); 1614 pci_name(pdev));
@@ -1616,7 +1616,6 @@ static int carm_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
1616 goto err_out_regions; 1616 goto err_out_regions;
1617 } 1617 }
1618 1618
1619 memset(host, 0, sizeof(*host));
1620 host->pdev = pdev; 1619 host->pdev = pdev;
1621 host->flags = pci_dac ? FL_DAC : 0; 1620 host->flags = pci_dac ? FL_DAC : 0;
1622 spin_lock_init(&host->lock); 1621 spin_lock_init(&host->lock);
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 8852b8d643..4e6f387fd1 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -42,6 +42,7 @@ obj-$(CONFIG_SYNCLINK_GT) += synclink_gt.o
42obj-$(CONFIG_N_HDLC) += n_hdlc.o 42obj-$(CONFIG_N_HDLC) += n_hdlc.o
43obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o 43obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o
44obj-$(CONFIG_SX) += sx.o generic_serial.o 44obj-$(CONFIG_SX) += sx.o generic_serial.o
45obj-$(CONFIG_LGUEST_GUEST) += hvc_lguest.o
45obj-$(CONFIG_RIO) += rio/ generic_serial.o 46obj-$(CONFIG_RIO) += rio/ generic_serial.o
46obj-$(CONFIG_HVC_CONSOLE) += hvc_vio.o hvsi.o 47obj-$(CONFIG_HVC_CONSOLE) += hvc_vio.o hvsi.o
47obj-$(CONFIG_HVC_ISERIES) += hvc_iseries.o 48obj-$(CONFIG_HVC_ISERIES) += hvc_iseries.o
diff --git a/drivers/char/amiserial.c b/drivers/char/amiserial.c
index 7b02bf1289..3d468f502d 100644
--- a/drivers/char/amiserial.c
+++ b/drivers/char/amiserial.c
@@ -1721,12 +1721,11 @@ static int get_async_struct(int line, struct async_struct **ret_info)
1721 *ret_info = sstate->info; 1721 *ret_info = sstate->info;
1722 return 0; 1722 return 0;
1723 } 1723 }
1724 info = kmalloc(sizeof(struct async_struct), GFP_KERNEL); 1724 info = kzalloc(sizeof(struct async_struct), GFP_KERNEL);
1725 if (!info) { 1725 if (!info) {
1726 sstate->count--; 1726 sstate->count--;
1727 return -ENOMEM; 1727 return -ENOMEM;
1728 } 1728 }
1729 memset(info, 0, sizeof(struct async_struct));
1730#ifdef DECLARE_WAITQUEUE 1729#ifdef DECLARE_WAITQUEUE
1731 init_waitqueue_head(&info->open_wait); 1730 init_waitqueue_head(&info->open_wait);
1732 init_waitqueue_head(&info->close_wait); 1731 init_waitqueue_head(&info->close_wait);
diff --git a/drivers/char/drm/via_dmablit.c b/drivers/char/drm/via_dmablit.c
index fdb8609dd7..832de1d9ba 100644
--- a/drivers/char/drm/via_dmablit.c
+++ b/drivers/char/drm/via_dmablit.c
@@ -273,10 +273,9 @@ via_alloc_desc_pages(drm_via_sg_info_t *vsg)
273 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) / 273 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
274 vsg->descriptors_per_page; 274 vsg->descriptors_per_page;
275 275
276 if (NULL == (vsg->desc_pages = kmalloc(sizeof(void *) * vsg->num_desc_pages, GFP_KERNEL))) 276 if (NULL == (vsg->desc_pages = kcalloc(vsg->num_desc_pages, sizeof(void *), GFP_KERNEL)))
277 return DRM_ERR(ENOMEM); 277 return DRM_ERR(ENOMEM);
278 278
279 memset(vsg->desc_pages, 0, sizeof(void *) * vsg->num_desc_pages);
280 vsg->state = dr_via_desc_pages_alloc; 279 vsg->state = dr_via_desc_pages_alloc;
281 for (i=0; i<vsg->num_desc_pages; ++i) { 280 for (i=0; i<vsg->num_desc_pages; ++i) {
282 if (NULL == (vsg->desc_pages[i] = 281 if (NULL == (vsg->desc_pages[i] =
diff --git a/drivers/char/esp.c b/drivers/char/esp.c
index 74cd5118af..2e7ae42a55 100644
--- a/drivers/char/esp.c
+++ b/drivers/char/esp.c
@@ -2459,7 +2459,7 @@ static int __init espserial_init(void)
2459 return 1; 2459 return 1;
2460 } 2460 }
2461 2461
2462 info = kmalloc(sizeof(struct esp_struct), GFP_KERNEL); 2462 info = kzalloc(sizeof(struct esp_struct), GFP_KERNEL);
2463 2463
2464 if (!info) 2464 if (!info)
2465 { 2465 {
@@ -2469,7 +2469,6 @@ static int __init espserial_init(void)
2469 return 1; 2469 return 1;
2470 } 2470 }
2471 2471
2472 memset((void *)info, 0, sizeof(struct esp_struct));
2473 spin_lock_init(&info->lock); 2472 spin_lock_init(&info->lock);
2474 /* rx_trigger, tx_trigger are needed by autoconfig */ 2473 /* rx_trigger, tx_trigger are needed by autoconfig */
2475 info->config.rx_trigger = rx_trigger; 2474 info->config.rx_trigger = rx_trigger;
@@ -2527,7 +2526,7 @@ static int __init espserial_init(void)
2527 if (!dma) 2526 if (!dma)
2528 info->stat_flags |= ESP_STAT_NEVER_DMA; 2527 info->stat_flags |= ESP_STAT_NEVER_DMA;
2529 2528
2530 info = kmalloc(sizeof(struct esp_struct), GFP_KERNEL); 2529 info = kzalloc(sizeof(struct esp_struct), GFP_KERNEL);
2531 if (!info) 2530 if (!info)
2532 { 2531 {
2533 printk(KERN_ERR "Couldn't allocate memory for esp serial device information\n"); 2532 printk(KERN_ERR "Couldn't allocate memory for esp serial device information\n");
@@ -2536,7 +2535,6 @@ static int __init espserial_init(void)
2536 return 0; 2535 return 0;
2537 } 2536 }
2538 2537
2539 memset((void *)info, 0, sizeof(struct esp_struct));
2540 /* rx_trigger, tx_trigger are needed by autoconfig */ 2538 /* rx_trigger, tx_trigger are needed by autoconfig */
2541 info->config.rx_trigger = rx_trigger; 2539 info->config.rx_trigger = rx_trigger;
2542 info->config.tx_trigger = tx_trigger; 2540 info->config.tx_trigger = tx_trigger;
diff --git a/drivers/char/hvc_lguest.c b/drivers/char/hvc_lguest.c
new file mode 100644
index 0000000000..e7b889e404
--- /dev/null
+++ b/drivers/char/hvc_lguest.c
@@ -0,0 +1,102 @@
1/* Simple console for lguest.
2 *
3 * Copyright (C) 2006 Rusty Russell, IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19#include <linux/err.h>
20#include <linux/init.h>
21#include <linux/lguest_bus.h>
22#include "hvc_console.h"
23
24static char inbuf[256];
25static struct lguest_dma cons_input = { .used_len = 0,
26 .addr[0] = __pa(inbuf),
27 .len[0] = sizeof(inbuf),
28 .len[1] = 0 };
29
30static int put_chars(u32 vtermno, const char *buf, int count)
31{
32 struct lguest_dma dma;
33
34 /* FIXME: what if it's over a page boundary? */
35 dma.len[0] = count;
36 dma.len[1] = 0;
37 dma.addr[0] = __pa(buf);
38
39 lguest_send_dma(LGUEST_CONSOLE_DMA_KEY, &dma);
40 return count;
41}
42
43static int get_chars(u32 vtermno, char *buf, int count)
44{
45 static int cons_offset;
46
47 if (!cons_input.used_len)
48 return 0;
49
50 if (cons_input.used_len - cons_offset < count)
51 count = cons_input.used_len - cons_offset;
52
53 memcpy(buf, inbuf + cons_offset, count);
54 cons_offset += count;
55 if (cons_offset == cons_input.used_len) {
56 cons_offset = 0;
57 cons_input.used_len = 0;
58 }
59 return count;
60}
61
62static struct hv_ops lguest_cons = {
63 .get_chars = get_chars,
64 .put_chars = put_chars,
65};
66
67static int __init cons_init(void)
68{
69 if (strcmp(paravirt_ops.name, "lguest") != 0)
70 return 0;
71
72 return hvc_instantiate(0, 0, &lguest_cons);
73}
74console_initcall(cons_init);
75
76static int lguestcons_probe(struct lguest_device *lgdev)
77{
78 int err;
79
80 lgdev->private = hvc_alloc(0, lgdev_irq(lgdev), &lguest_cons, 256);
81 if (IS_ERR(lgdev->private))
82 return PTR_ERR(lgdev->private);
83
84 err = lguest_bind_dma(LGUEST_CONSOLE_DMA_KEY, &cons_input, 1,
85 lgdev_irq(lgdev));
86 if (err)
87 printk("lguest console: failed to bind buffer.\n");
88 return err;
89}
90
91static struct lguest_driver lguestcons_drv = {
92 .name = "lguestcons",
93 .owner = THIS_MODULE,
94 .device_type = LGUEST_DEVICE_T_CONSOLE,
95 .probe = lguestcons_probe,
96};
97
98static int __init hvc_lguest_init(void)
99{
100 return register_lguest_driver(&lguestcons_drv);
101}
102module_init(hvc_lguest_init);
diff --git a/drivers/char/hvcs.c b/drivers/char/hvcs.c
index 207f7343ba..17f96e0426 100644
--- a/drivers/char/hvcs.c
+++ b/drivers/char/hvcs.c
@@ -784,12 +784,10 @@ static int __devinit hvcs_probe(
784 return -EFAULT; 784 return -EFAULT;
785 } 785 }
786 786
787 hvcsd = kmalloc(sizeof(*hvcsd), GFP_KERNEL); 787 hvcsd = kzalloc(sizeof(*hvcsd), GFP_KERNEL);
788 if (!hvcsd) 788 if (!hvcsd)
789 return -ENODEV; 789 return -ENODEV;
790 790
791 /* hvcsd->tty is zeroed out with the memset */
792 memset(hvcsd, 0x00, sizeof(*hvcsd));
793 791
794 spin_lock_init(&hvcsd->lock); 792 spin_lock_init(&hvcsd->lock);
795 /* Automatically incs the refcount the first time */ 793 /* Automatically incs the refcount the first time */
diff --git a/drivers/char/ip2/ip2main.c b/drivers/char/ip2/ip2main.c
index 83c7258d35..6005b52257 100644
--- a/drivers/char/ip2/ip2main.c
+++ b/drivers/char/ip2/ip2main.c
@@ -425,9 +425,7 @@ cleanup_module(void)
425 printk(KERN_ERR "IP2: failed to unregister tty driver (%d)\n", err); 425 printk(KERN_ERR "IP2: failed to unregister tty driver (%d)\n", err);
426 } 426 }
427 put_tty_driver(ip2_tty_driver); 427 put_tty_driver(ip2_tty_driver);
428 if ( ( err = unregister_chrdev ( IP2_IPL_MAJOR, pcIpl ) ) ) { 428 unregister_chrdev(IP2_IPL_MAJOR, pcIpl);
429 printk(KERN_ERR "IP2: failed to unregister IPL driver (%d)\n", err);
430 }
431 remove_proc_entry("ip2mem", &proc_root); 429 remove_proc_entry("ip2mem", &proc_root);
432 430
433 // free memory 431 // free memory
diff --git a/drivers/char/ipmi/ipmi_msghandler.c b/drivers/char/ipmi/ipmi_msghandler.c
index b5df7e61ae..6a01dd9e43 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -2639,10 +2639,9 @@ int ipmi_register_smi(struct ipmi_smi_handlers *handlers,
2639 return -ENODEV; 2639 return -ENODEV;
2640 } 2640 }
2641 2641
2642 intf = kmalloc(sizeof(*intf), GFP_KERNEL); 2642 intf = kzalloc(sizeof(*intf), GFP_KERNEL);
2643 if (!intf) 2643 if (!intf)
2644 return -ENOMEM; 2644 return -ENOMEM;
2645 memset(intf, 0, sizeof(*intf));
2646 2645
2647 intf->ipmi_version_major = ipmi_version_major(device_id); 2646 intf->ipmi_version_major = ipmi_version_major(device_id);
2648 intf->ipmi_version_minor = ipmi_version_minor(device_id); 2647 intf->ipmi_version_minor = ipmi_version_minor(device_id);
diff --git a/drivers/char/mbcs.c b/drivers/char/mbcs.c
index 57f9115a45..7ee5d94449 100644
--- a/drivers/char/mbcs.c
+++ b/drivers/char/mbcs.c
@@ -39,14 +39,14 @@
39#else 39#else
40#define DBG(fmt...) 40#define DBG(fmt...)
41#endif 41#endif
42int mbcs_major; 42static int mbcs_major;
43 43
44LIST_HEAD(soft_list); 44static LIST_HEAD(soft_list);
45 45
46/* 46/*
47 * file operations 47 * file operations
48 */ 48 */
49const struct file_operations mbcs_ops = { 49static const struct file_operations mbcs_ops = {
50 .open = mbcs_open, 50 .open = mbcs_open,
51 .llseek = mbcs_sram_llseek, 51 .llseek = mbcs_sram_llseek,
52 .read = mbcs_sram_read, 52 .read = mbcs_sram_read,
@@ -377,7 +377,7 @@ dmaread_exit:
377 return rv; 377 return rv;
378} 378}
379 379
380int mbcs_open(struct inode *ip, struct file *fp) 380static int mbcs_open(struct inode *ip, struct file *fp)
381{ 381{
382 struct mbcs_soft *soft; 382 struct mbcs_soft *soft;
383 int minor; 383 int minor;
@@ -394,7 +394,7 @@ int mbcs_open(struct inode *ip, struct file *fp)
394 return -ENODEV; 394 return -ENODEV;
395} 395}
396 396
397ssize_t mbcs_sram_read(struct file * fp, char __user *buf, size_t len, loff_t * off) 397static ssize_t mbcs_sram_read(struct file * fp, char __user *buf, size_t len, loff_t * off)
398{ 398{
399 struct cx_dev *cx_dev = fp->private_data; 399 struct cx_dev *cx_dev = fp->private_data;
400 struct mbcs_soft *soft = cx_dev->soft; 400 struct mbcs_soft *soft = cx_dev->soft;
@@ -418,7 +418,7 @@ ssize_t mbcs_sram_read(struct file * fp, char __user *buf, size_t len, loff_t *
418 return rv; 418 return rv;
419} 419}
420 420
421ssize_t 421static ssize_t
422mbcs_sram_write(struct file * fp, const char __user *buf, size_t len, loff_t * off) 422mbcs_sram_write(struct file * fp, const char __user *buf, size_t len, loff_t * off)
423{ 423{
424 struct cx_dev *cx_dev = fp->private_data; 424 struct cx_dev *cx_dev = fp->private_data;
@@ -443,7 +443,7 @@ mbcs_sram_write(struct file * fp, const char __user *buf, size_t len, loff_t * o
443 return rv; 443 return rv;
444} 444}
445 445
446loff_t mbcs_sram_llseek(struct file * filp, loff_t off, int whence) 446static loff_t mbcs_sram_llseek(struct file * filp, loff_t off, int whence)
447{ 447{
448 loff_t newpos; 448 loff_t newpos;
449 449
@@ -491,7 +491,7 @@ static void mbcs_gscr_pioaddr_set(struct mbcs_soft *soft)
491 soft->gscr_addr = mbcs_pioaddr(soft, MBCS_GSCR_START); 491 soft->gscr_addr = mbcs_pioaddr(soft, MBCS_GSCR_START);
492} 492}
493 493
494int mbcs_gscr_mmap(struct file *fp, struct vm_area_struct *vma) 494static int mbcs_gscr_mmap(struct file *fp, struct vm_area_struct *vma)
495{ 495{
496 struct cx_dev *cx_dev = fp->private_data; 496 struct cx_dev *cx_dev = fp->private_data;
497 struct mbcs_soft *soft = cx_dev->soft; 497 struct mbcs_soft *soft = cx_dev->soft;
@@ -793,7 +793,7 @@ static int mbcs_remove(struct cx_dev *dev)
793 return 0; 793 return 0;
794} 794}
795 795
796const struct cx_device_id __devinitdata mbcs_id_table[] = { 796static const struct cx_device_id __devinitdata mbcs_id_table[] = {
797 { 797 {
798 .part_num = MBCS_PART_NUM, 798 .part_num = MBCS_PART_NUM,
799 .mfg_num = MBCS_MFG_NUM, 799 .mfg_num = MBCS_MFG_NUM,
@@ -807,7 +807,7 @@ const struct cx_device_id __devinitdata mbcs_id_table[] = {
807 807
808MODULE_DEVICE_TABLE(cx, mbcs_id_table); 808MODULE_DEVICE_TABLE(cx, mbcs_id_table);
809 809
810struct cx_drv mbcs_driver = { 810static struct cx_drv mbcs_driver = {
811 .name = DEVICE_NAME, 811 .name = DEVICE_NAME,
812 .id_table = mbcs_id_table, 812 .id_table = mbcs_id_table,
813 .probe = mbcs_probe, 813 .probe = mbcs_probe,
@@ -816,12 +816,7 @@ struct cx_drv mbcs_driver = {
816 816
817static void __exit mbcs_exit(void) 817static void __exit mbcs_exit(void)
818{ 818{
819 int rv; 819 unregister_chrdev(mbcs_major, DEVICE_NAME);
820
821 rv = unregister_chrdev(mbcs_major, DEVICE_NAME);
822 if (rv < 0)
823 DBG(KERN_ALERT "Error in unregister_chrdev: %d\n", rv);
824
825 cx_driver_unregister(&mbcs_driver); 820 cx_driver_unregister(&mbcs_driver);
826} 821}
827 822
diff --git a/drivers/char/mbcs.h b/drivers/char/mbcs.h
index e7fd47e432..c9905a3c33 100644
--- a/drivers/char/mbcs.h
+++ b/drivers/char/mbcs.h
@@ -542,12 +542,12 @@ struct mbcs_soft {
542 struct semaphore algolock; 542 struct semaphore algolock;
543}; 543};
544 544
545extern int mbcs_open(struct inode *ip, struct file *fp); 545static int mbcs_open(struct inode *ip, struct file *fp);
546extern ssize_t mbcs_sram_read(struct file *fp, char __user *buf, size_t len, 546static ssize_t mbcs_sram_read(struct file *fp, char __user *buf, size_t len,
547 loff_t * off); 547 loff_t * off);
548extern ssize_t mbcs_sram_write(struct file *fp, const char __user *buf, size_t len, 548static ssize_t mbcs_sram_write(struct file *fp, const char __user *buf, size_t len,
549 loff_t * off); 549 loff_t * off);
550extern loff_t mbcs_sram_llseek(struct file *filp, loff_t off, int whence); 550static loff_t mbcs_sram_llseek(struct file *filp, loff_t off, int whence);
551extern int mbcs_gscr_mmap(struct file *fp, struct vm_area_struct *vma); 551static int mbcs_gscr_mmap(struct file *fp, struct vm_area_struct *vma);
552 552
553#endif // __MBCS_H__ 553#endif // __MBCS_H__
diff --git a/drivers/char/pcmcia/synclink_cs.c b/drivers/char/pcmcia/synclink_cs.c
index 13808f6083..2b88931746 100644
--- a/drivers/char/pcmcia/synclink_cs.c
+++ b/drivers/char/pcmcia/synclink_cs.c
@@ -540,13 +540,12 @@ static int mgslpc_probe(struct pcmcia_device *link)
540 if (debug_level >= DEBUG_LEVEL_INFO) 540 if (debug_level >= DEBUG_LEVEL_INFO)
541 printk("mgslpc_attach\n"); 541 printk("mgslpc_attach\n");
542 542
543 info = kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL); 543 info = kzalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
544 if (!info) { 544 if (!info) {
545 printk("Error can't allocate device instance data\n"); 545 printk("Error can't allocate device instance data\n");
546 return -ENOMEM; 546 return -ENOMEM;
547 } 547 }
548 548
549 memset(info, 0, sizeof(MGSLPC_INFO));
550 info->magic = MGSLPC_MAGIC; 549 info->magic = MGSLPC_MAGIC;
551 INIT_WORK(&info->task, bh_handler); 550 INIT_WORK(&info->task, bh_handler);
552 info->max_frame_size = 4096; 551 info->max_frame_size = 4096;
diff --git a/drivers/char/random.c b/drivers/char/random.c
index 7f5271272f..397c714cf2 100644
--- a/drivers/char/random.c
+++ b/drivers/char/random.c
@@ -693,9 +693,14 @@ static void xfer_secondary_pool(struct entropy_store *r, size_t nbytes)
693 693
694 if (r->pull && r->entropy_count < nbytes * 8 && 694 if (r->pull && r->entropy_count < nbytes * 8 &&
695 r->entropy_count < r->poolinfo->POOLBITS) { 695 r->entropy_count < r->poolinfo->POOLBITS) {
696 int bytes = max_t(int, random_read_wakeup_thresh / 8, 696 /* If we're limited, always leave two wakeup worth's BITS */
697 min_t(int, nbytes, sizeof(tmp)));
698 int rsvd = r->limit ? 0 : random_read_wakeup_thresh/4; 697 int rsvd = r->limit ? 0 : random_read_wakeup_thresh/4;
698 int bytes = nbytes;
699
700 /* pull at least as many as BYTES as wakeup BITS */
701 bytes = max_t(int, bytes, random_read_wakeup_thresh / 8);
702 /* but never more than the buffer size */
703 bytes = min_t(int, bytes, sizeof(tmp));
699 704
700 DEBUG_ENT("going to reseed %s with %d bits " 705 DEBUG_ENT("going to reseed %s with %d bits "
701 "(%d of %d requested)\n", 706 "(%d of %d requested)\n",
diff --git a/drivers/char/rio/rio_linux.c b/drivers/char/rio/rio_linux.c
index 294e9cb0c4..0ce96670f9 100644
--- a/drivers/char/rio/rio_linux.c
+++ b/drivers/char/rio/rio_linux.c
@@ -803,9 +803,7 @@ static void *ckmalloc(int size)
803{ 803{
804 void *p; 804 void *p;
805 805
806 p = kmalloc(size, GFP_KERNEL); 806 p = kzalloc(size, GFP_KERNEL);
807 if (p)
808 memset(p, 0, size);
809 return p; 807 return p;
810} 808}
811 809
diff --git a/drivers/char/rio/riocmd.c b/drivers/char/rio/riocmd.c
index 8cc60b6934..7321d002c3 100644
--- a/drivers/char/rio/riocmd.c
+++ b/drivers/char/rio/riocmd.c
@@ -556,9 +556,7 @@ struct CmdBlk *RIOGetCmdBlk(void)
556{ 556{
557 struct CmdBlk *CmdBlkP; 557 struct CmdBlk *CmdBlkP;
558 558
559 CmdBlkP = kmalloc(sizeof(struct CmdBlk), GFP_ATOMIC); 559 CmdBlkP = kzalloc(sizeof(struct CmdBlk), GFP_ATOMIC);
560 if (CmdBlkP)
561 memset(CmdBlkP, 0, sizeof(struct CmdBlk));
562 return CmdBlkP; 560 return CmdBlkP;
563} 561}
564 562
diff --git a/drivers/char/rio/riotable.c b/drivers/char/rio/riotable.c
index 7e98835732..991119c9f4 100644
--- a/drivers/char/rio/riotable.c
+++ b/drivers/char/rio/riotable.c
@@ -863,8 +863,7 @@ int RIOReMapPorts(struct rio_info *p, struct Host *HostP, struct Map *HostMapP)
863 if (PortP->TxRingBuffer) 863 if (PortP->TxRingBuffer)
864 memset(PortP->TxRingBuffer, 0, p->RIOBufferSize); 864 memset(PortP->TxRingBuffer, 0, p->RIOBufferSize);
865 else if (p->RIOBufferSize) { 865 else if (p->RIOBufferSize) {
866 PortP->TxRingBuffer = kmalloc(p->RIOBufferSize, GFP_KERNEL); 866 PortP->TxRingBuffer = kzalloc(p->RIOBufferSize, GFP_KERNEL);
867 memset(PortP->TxRingBuffer, 0, p->RIOBufferSize);
868 } 867 }
869 PortP->TxBufferOut = 0; 868 PortP->TxBufferOut = 0;
870 PortP->TxBufferIn = 0; 869 PortP->TxBufferIn = 0;
diff --git a/drivers/char/rocket.c b/drivers/char/rocket.c
index 0270080ff0..56cbba7b6e 100644
--- a/drivers/char/rocket.c
+++ b/drivers/char/rocket.c
@@ -635,12 +635,11 @@ static void init_r_port(int board, int aiop, int chan, struct pci_dev *pci_dev)
635 ctlp = sCtlNumToCtlPtr(board); 635 ctlp = sCtlNumToCtlPtr(board);
636 636
637 /* Get a r_port struct for the port, fill it in and save it globally, indexed by line number */ 637 /* Get a r_port struct for the port, fill it in and save it globally, indexed by line number */
638 info = kmalloc(sizeof (struct r_port), GFP_KERNEL); 638 info = kzalloc(sizeof (struct r_port), GFP_KERNEL);
639 if (!info) { 639 if (!info) {
640 printk(KERN_INFO "Couldn't allocate info struct for line #%d\n", line); 640 printk(KERN_INFO "Couldn't allocate info struct for line #%d\n", line);
641 return; 641 return;
642 } 642 }
643 memset(info, 0, sizeof (struct r_port));
644 643
645 info->magic = RPORT_MAGIC; 644 info->magic = RPORT_MAGIC;
646 info->line = line; 645 info->line = line;
diff --git a/drivers/char/stallion.c b/drivers/char/stallion.c
index 93d0bb8b4c..4a80b2f864 100644
--- a/drivers/char/stallion.c
+++ b/drivers/char/stallion.c
@@ -4795,7 +4795,6 @@ static void __exit stallion_module_exit(void)
4795{ 4795{
4796 struct stlbrd *brdp; 4796 struct stlbrd *brdp;
4797 unsigned int i, j; 4797 unsigned int i, j;
4798 int retval;
4799 4798
4800 pr_debug("cleanup_module()\n"); 4799 pr_debug("cleanup_module()\n");
4801 4800
@@ -4818,9 +4817,7 @@ static void __exit stallion_module_exit(void)
4818 4817
4819 for (i = 0; i < 4; i++) 4818 for (i = 0; i < 4; i++)
4820 class_device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i)); 4819 class_device_destroy(stallion_class, MKDEV(STL_SIOMEMMAJOR, i));
4821 if ((retval = unregister_chrdev(STL_SIOMEMMAJOR, "staliomem"))) 4820 unregister_chrdev(STL_SIOMEMMAJOR, "staliomem");
4822 printk("STALLION: failed to un-register serial memory device, "
4823 "errno=%d\n", -retval);
4824 class_destroy(stallion_class); 4821 class_destroy(stallion_class);
4825 4822
4826 pci_unregister_driver(&stl_pcidriver); 4823 pci_unregister_driver(&stl_pcidriver);
diff --git a/drivers/char/synclink.c b/drivers/char/synclink.c
index f53e51ddb9..fdc256b380 100644
--- a/drivers/char/synclink.c
+++ b/drivers/char/synclink.c
@@ -4324,13 +4324,12 @@ static struct mgsl_struct* mgsl_allocate_device(void)
4324{ 4324{
4325 struct mgsl_struct *info; 4325 struct mgsl_struct *info;
4326 4326
4327 info = kmalloc(sizeof(struct mgsl_struct), 4327 info = kzalloc(sizeof(struct mgsl_struct),
4328 GFP_KERNEL); 4328 GFP_KERNEL);
4329 4329
4330 if (!info) { 4330 if (!info) {
4331 printk("Error can't allocate device instance data\n"); 4331 printk("Error can't allocate device instance data\n");
4332 } else { 4332 } else {
4333 memset(info, 0, sizeof(struct mgsl_struct));
4334 info->magic = MGSL_MAGIC; 4333 info->magic = MGSL_MAGIC;
4335 INIT_WORK(&info->task, mgsl_bh_handler); 4334 INIT_WORK(&info->task, mgsl_bh_handler);
4336 info->max_frame_size = 4096; 4335 info->max_frame_size = 4096;
diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c
index 428b514201..372a37e256 100644
--- a/drivers/char/synclink_gt.c
+++ b/drivers/char/synclink_gt.c
@@ -3414,13 +3414,12 @@ static struct slgt_info *alloc_dev(int adapter_num, int port_num, struct pci_dev
3414{ 3414{
3415 struct slgt_info *info; 3415 struct slgt_info *info;
3416 3416
3417 info = kmalloc(sizeof(struct slgt_info), GFP_KERNEL); 3417 info = kzalloc(sizeof(struct slgt_info), GFP_KERNEL);
3418 3418
3419 if (!info) { 3419 if (!info) {
3420 DBGERR(("%s device alloc failed adapter=%d port=%d\n", 3420 DBGERR(("%s device alloc failed adapter=%d port=%d\n",
3421 driver_name, adapter_num, port_num)); 3421 driver_name, adapter_num, port_num));
3422 } else { 3422 } else {
3423 memset(info, 0, sizeof(struct slgt_info));
3424 info->magic = MGSL_MAGIC; 3423 info->magic = MGSL_MAGIC;
3425 INIT_WORK(&info->task, bh_handler); 3424 INIT_WORK(&info->task, bh_handler);
3426 info->max_frame_size = 4096; 3425 info->max_frame_size = 4096;
diff --git a/drivers/char/synclinkmp.c b/drivers/char/synclinkmp.c
index a65407b320..c63013b2fc 100644
--- a/drivers/char/synclinkmp.c
+++ b/drivers/char/synclinkmp.c
@@ -3786,14 +3786,13 @@ static SLMP_INFO *alloc_dev(int adapter_num, int port_num, struct pci_dev *pdev)
3786{ 3786{
3787 SLMP_INFO *info; 3787 SLMP_INFO *info;
3788 3788
3789 info = kmalloc(sizeof(SLMP_INFO), 3789 info = kzalloc(sizeof(SLMP_INFO),
3790 GFP_KERNEL); 3790 GFP_KERNEL);
3791 3791
3792 if (!info) { 3792 if (!info) {
3793 printk("%s(%d) Error can't allocate device instance data for adapter %d, port %d\n", 3793 printk("%s(%d) Error can't allocate device instance data for adapter %d, port %d\n",
3794 __FILE__,__LINE__, adapter_num, port_num); 3794 __FILE__,__LINE__, adapter_num, port_num);
3795 } else { 3795 } else {
3796 memset(info, 0, sizeof(SLMP_INFO));
3797 info->magic = MGSL_MAGIC; 3796 info->magic = MGSL_MAGIC;
3798 INIT_WORK(&info->task, bh_handler); 3797 INIT_WORK(&info->task, bh_handler);
3799 info->max_frame_size = 4096; 3798 info->max_frame_size = 4096;
diff --git a/drivers/char/viotape.c b/drivers/char/viotape.c
index db57277117..e12275df6e 100644
--- a/drivers/char/viotape.c
+++ b/drivers/char/viotape.c
@@ -1098,15 +1098,10 @@ static int chg_state(int index, unsigned char new_state, struct file *file)
1098/* Cleanup */ 1098/* Cleanup */
1099static void __exit viotap_exit(void) 1099static void __exit viotap_exit(void)
1100{ 1100{
1101 int ret;
1102
1103 remove_proc_entry("iSeries/viotape", NULL); 1101 remove_proc_entry("iSeries/viotape", NULL);
1104 vio_unregister_driver(&viotape_driver); 1102 vio_unregister_driver(&viotape_driver);
1105 class_destroy(tape_class); 1103 class_destroy(tape_class);
1106 ret = unregister_chrdev(VIOTAPE_MAJOR, "viotape"); 1104 unregister_chrdev(VIOTAPE_MAJOR, "viotape");
1107 if (ret < 0)
1108 printk(VIOTAPE_KERN_WARN "Error unregistering device: %d\n",
1109 ret);
1110 if (viotape_unitinfo) 1105 if (viotape_unitinfo)
1111 dma_free_coherent(iSeries_vio_dev, 1106 dma_free_coherent(iSeries_vio_dev,
1112 sizeof(viotape_unitinfo[0]) * VIOTAPE_MAX_TAPE, 1107 sizeof(viotape_unitinfo[0]) * VIOTAPE_MAX_TAPE,
diff --git a/drivers/char/watchdog/mpcore_wdt.c b/drivers/char/watchdog/mpcore_wdt.c
index e88947f8fe..0d2b277354 100644
--- a/drivers/char/watchdog/mpcore_wdt.c
+++ b/drivers/char/watchdog/mpcore_wdt.c
@@ -328,12 +328,11 @@ static int __devinit mpcore_wdt_probe(struct platform_device *dev)
328 goto err_out; 328 goto err_out;
329 } 329 }
330 330
331 wdt = kmalloc(sizeof(struct mpcore_wdt), GFP_KERNEL); 331 wdt = kzalloc(sizeof(struct mpcore_wdt), GFP_KERNEL);
332 if (!wdt) { 332 if (!wdt) {
333 ret = -ENOMEM; 333 ret = -ENOMEM;
334 goto err_out; 334 goto err_out;
335 } 335 }
336 memset(wdt, 0, sizeof(struct mpcore_wdt));
337 336
338 wdt->dev = &dev->dev; 337 wdt->dev = &dev->dev;
339 wdt->irq = platform_get_irq(dev, 0); 338 wdt->irq = platform_get_irq(dev, 0);
diff --git a/drivers/char/watchdog/pcwd_usb.c b/drivers/char/watchdog/pcwd_usb.c
index 1e7a6719d5..0f3fd6c9c3 100644
--- a/drivers/char/watchdog/pcwd_usb.c
+++ b/drivers/char/watchdog/pcwd_usb.c
@@ -626,12 +626,11 @@ static int usb_pcwd_probe(struct usb_interface *interface, const struct usb_devi
626 maxp = usb_maxpacket(udev, pipe, usb_pipeout(pipe)); 626 maxp = usb_maxpacket(udev, pipe, usb_pipeout(pipe));
627 627
628 /* allocate memory for our device and initialize it */ 628 /* allocate memory for our device and initialize it */
629 usb_pcwd = kmalloc (sizeof(struct usb_pcwd_private), GFP_KERNEL); 629 usb_pcwd = kzalloc (sizeof(struct usb_pcwd_private), GFP_KERNEL);
630 if (usb_pcwd == NULL) { 630 if (usb_pcwd == NULL) {
631 printk(KERN_ERR PFX "Out of memory\n"); 631 printk(KERN_ERR PFX "Out of memory\n");
632 goto error; 632 goto error;
633 } 633 }
634 memset (usb_pcwd, 0x00, sizeof (*usb_pcwd));
635 634
636 usb_pcwd_device = usb_pcwd; 635 usb_pcwd_device = usb_pcwd;
637 636
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index debf1d8e8b..1724c41d24 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -3,18 +3,18 @@
3# Copyright (c) 2003 Linux Networx 3# Copyright (c) 2003 Linux Networx
4# Licensed and distributed under the GPL 4# Licensed and distributed under the GPL
5# 5#
6# $Id: Kconfig,v 1.4.2.7 2005/07/08 22:05:38 dsp_llnl Exp $
7#
8 6
9menuconfig EDAC 7menuconfig EDAC
10 tristate "EDAC - error detection and reporting (EXPERIMENTAL)" 8 bool "EDAC - error detection and reporting (EXPERIMENTAL)"
11 depends on HAS_IOMEM 9 depends on HAS_IOMEM
12 depends on X86 && EXPERIMENTAL 10 depends on EXPERIMENTAL
11 depends on X86 || MIPS || PPC
13 help 12 help
14 EDAC is designed to report errors in the core system. 13 EDAC is designed to report errors in the core system.
15 These are low-level errors that are reported in the CPU or 14 These are low-level errors that are reported in the CPU or
16 supporting chipset: memory errors, cache errors, PCI errors, 15 supporting chipset or other subsystems:
17 thermal throttling, etc.. If unsure, select 'Y'. 16 memory errors, cache errors, PCI errors, thermal throttling, etc..
17 If unsure, select 'Y'.
18 18
19 If this code is reporting problems on your system, please 19 If this code is reporting problems on your system, please
20 see the EDAC project web pages for more information at: 20 see the EDAC project web pages for more information at:
@@ -73,6 +73,14 @@ config EDAC_E752X
73 Support for error detection and correction on the Intel 73 Support for error detection and correction on the Intel
74 E7520, E7525, E7320 server chipsets. 74 E7520, E7525, E7320 server chipsets.
75 75
76config EDAC_I82443BXGX
77 tristate "Intel 82443BX/GX (440BX/GX)"
78 depends on EDAC_MM_EDAC && PCI && X86_32
79 depends on BROKEN
80 help
81 Support for error detection and correction on the Intel
82 82443BX/GX memory controllers (440BX/GX chipsets).
83
76config EDAC_I82875P 84config EDAC_I82875P
77 tristate "Intel 82875p (D82875P, E7210)" 85 tristate "Intel 82875p (D82875P, E7210)"
78 depends on EDAC_MM_EDAC && PCI && X86_32 86 depends on EDAC_MM_EDAC && PCI && X86_32
@@ -80,6 +88,20 @@ config EDAC_I82875P
80 Support for error detection and correction on the Intel 88 Support for error detection and correction on the Intel
81 DP82785P and E7210 server chipsets. 89 DP82785P and E7210 server chipsets.
82 90
91config EDAC_I82975X
92 tristate "Intel 82975x (D82975x)"
93 depends on EDAC_MM_EDAC && PCI && X86
94 help
95 Support for error detection and correction on the Intel
96 DP82975x server chipsets.
97
98config EDAC_I3000
99 tristate "Intel 3000/3010"
100 depends on EDAC_MM_EDAC && PCI && X86_32
101 help
102 Support for error detection and correction on the Intel
103 3000 and 3010 server chipsets.
104
83config EDAC_I82860 105config EDAC_I82860
84 tristate "Intel 82860" 106 tristate "Intel 82860"
85 depends on EDAC_MM_EDAC && PCI && X86_32 107 depends on EDAC_MM_EDAC && PCI && X86_32
@@ -94,15 +116,20 @@ config EDAC_R82600
94 Support for error detection and correction on the Radisys 116 Support for error detection and correction on the Radisys
95 82600 embedded chipset. 117 82600 embedded chipset.
96 118
97choice 119config EDAC_I5000
98 prompt "Error detecting method" 120 tristate "Intel Greencreek/Blackford chipset"
99 default EDAC_POLL 121 depends on EDAC_MM_EDAC && X86 && PCI
122 help
123 Support for error detection and correction the Intel
124 Greekcreek/Blackford chipsets.
100 125
101config EDAC_POLL 126config EDAC_PASEMI
102 bool "Poll for errors" 127 tristate "PA Semi PWRficient"
128 depends on EDAC_MM_EDAC && PCI
129 depends on PPC
103 help 130 help
104 Poll the chipset periodically to detect errors. 131 Support for error detection and correction on PA Semi
132 PWRficient.
105 133
106endchoice
107 134
108endif # EDAC 135endif # EDAC
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index 93137fdab4..02c09f0ff1 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile
@@ -5,14 +5,27 @@
5# This file may be distributed under the terms of the 5# This file may be distributed under the terms of the
6# GNU General Public License. 6# GNU General Public License.
7# 7#
8# $Id: Makefile,v 1.4.2.3 2005/07/08 22:05:38 dsp_llnl Exp $
9 8
10 9
11obj-$(CONFIG_EDAC_MM_EDAC) += edac_mc.o 10obj-$(CONFIG_EDAC) := edac_stub.o
11obj-$(CONFIG_EDAC_MM_EDAC) += edac_core.o
12
13edac_core-objs := edac_mc.o edac_device.o edac_mc_sysfs.o edac_pci_sysfs.o
14edac_core-objs += edac_module.o edac_device_sysfs.o
15
16ifdef CONFIG_PCI
17edac_core-objs += edac_pci.o edac_pci_sysfs.o
18endif
19
12obj-$(CONFIG_EDAC_AMD76X) += amd76x_edac.o 20obj-$(CONFIG_EDAC_AMD76X) += amd76x_edac.o
21obj-$(CONFIG_EDAC_I5000) += i5000_edac.o
13obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o 22obj-$(CONFIG_EDAC_E7XXX) += e7xxx_edac.o
14obj-$(CONFIG_EDAC_E752X) += e752x_edac.o 23obj-$(CONFIG_EDAC_E752X) += e752x_edac.o
24obj-$(CONFIG_EDAC_I82443BXGX) += i82443bxgx_edac.o
15obj-$(CONFIG_EDAC_I82875P) += i82875p_edac.o 25obj-$(CONFIG_EDAC_I82875P) += i82875p_edac.o
26obj-$(CONFIG_EDAC_I82975X) += i82975x_edac.o
27obj-$(CONFIG_EDAC_I3000) += i3000_edac.o
16obj-$(CONFIG_EDAC_I82860) += i82860_edac.o 28obj-$(CONFIG_EDAC_I82860) += i82860_edac.o
17obj-$(CONFIG_EDAC_R82600) += r82600_edac.o 29obj-$(CONFIG_EDAC_R82600) += r82600_edac.o
30obj-$(CONFIG_EDAC_PASEMI) += pasemi_edac.o
18 31
diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c
index f79f6b587b..f220754105 100644
--- a/drivers/edac/amd76x_edac.c
+++ b/drivers/edac/amd76x_edac.c
@@ -17,9 +17,9 @@
17#include <linux/pci.h> 17#include <linux/pci.h>
18#include <linux/pci_ids.h> 18#include <linux/pci_ids.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include "edac_mc.h" 20#include "edac_core.h"
21 21
22#define AMD76X_REVISION " Ver: 2.0.1 " __DATE__ 22#define AMD76X_REVISION " Ver: 2.0.2 " __DATE__
23#define EDAC_MOD_STR "amd76x_edac" 23#define EDAC_MOD_STR "amd76x_edac"
24 24
25#define amd76x_printk(level, fmt, arg...) \ 25#define amd76x_printk(level, fmt, arg...) \
@@ -86,13 +86,13 @@ struct amd76x_dev_info {
86 86
87static const struct amd76x_dev_info amd76x_devs[] = { 87static const struct amd76x_dev_info amd76x_devs[] = {
88 [AMD761] = { 88 [AMD761] = {
89 .ctl_name = "AMD761" 89 .ctl_name = "AMD761"},
90 },
91 [AMD762] = { 90 [AMD762] = {
92 .ctl_name = "AMD762" 91 .ctl_name = "AMD762"},
93 },
94}; 92};
95 93
94static struct edac_pci_ctl_info *amd76x_pci;
95
96/** 96/**
97 * amd76x_get_error_info - fetch error information 97 * amd76x_get_error_info - fetch error information
98 * @mci: Memory controller 98 * @mci: Memory controller
@@ -102,21 +102,21 @@ static const struct amd76x_dev_info amd76x_devs[] = {
102 * on the chip so that further errors will be reported 102 * on the chip so that further errors will be reported
103 */ 103 */
104static void amd76x_get_error_info(struct mem_ctl_info *mci, 104static void amd76x_get_error_info(struct mem_ctl_info *mci,
105 struct amd76x_error_info *info) 105 struct amd76x_error_info *info)
106{ 106{
107 struct pci_dev *pdev; 107 struct pci_dev *pdev;
108 108
109 pdev = to_pci_dev(mci->dev); 109 pdev = to_pci_dev(mci->dev);
110 pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, 110 pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS,
111 &info->ecc_mode_status); 111 &info->ecc_mode_status);
112 112
113 if (info->ecc_mode_status & BIT(8)) 113 if (info->ecc_mode_status & BIT(8))
114 pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS, 114 pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS,
115 (u32) BIT(8), (u32) BIT(8)); 115 (u32) BIT(8), (u32) BIT(8));
116 116
117 if (info->ecc_mode_status & BIT(9)) 117 if (info->ecc_mode_status & BIT(9))
118 pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS, 118 pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS,
119 (u32) BIT(9), (u32) BIT(9)); 119 (u32) BIT(9), (u32) BIT(9));
120} 120}
121 121
122/** 122/**
@@ -130,7 +130,8 @@ static void amd76x_get_error_info(struct mem_ctl_info *mci,
130 * then attempt to handle and clean up after the error 130 * then attempt to handle and clean up after the error
131 */ 131 */
132static int amd76x_process_error_info(struct mem_ctl_info *mci, 132static int amd76x_process_error_info(struct mem_ctl_info *mci,
133 struct amd76x_error_info *info, int handle_errors) 133 struct amd76x_error_info *info,
134 int handle_errors)
134{ 135{
135 int error_found; 136 int error_found;
136 u32 row; 137 u32 row;
@@ -138,7 +139,7 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
138 error_found = 0; 139 error_found = 0;
139 140
140 /* 141 /*
141 * Check for an uncorrectable error 142 * Check for an uncorrectable error
142 */ 143 */
143 if (info->ecc_mode_status & BIT(8)) { 144 if (info->ecc_mode_status & BIT(8)) {
144 error_found = 1; 145 error_found = 1;
@@ -146,12 +147,12 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
146 if (handle_errors) { 147 if (handle_errors) {
147 row = (info->ecc_mode_status >> 4) & 0xf; 148 row = (info->ecc_mode_status >> 4) & 0xf;
148 edac_mc_handle_ue(mci, mci->csrows[row].first_page, 0, 149 edac_mc_handle_ue(mci, mci->csrows[row].first_page, 0,
149 row, mci->ctl_name); 150 row, mci->ctl_name);
150 } 151 }
151 } 152 }
152 153
153 /* 154 /*
154 * Check for a correctable error 155 * Check for a correctable error
155 */ 156 */
156 if (info->ecc_mode_status & BIT(9)) { 157 if (info->ecc_mode_status & BIT(9)) {
157 error_found = 1; 158 error_found = 1;
@@ -159,7 +160,7 @@ static int amd76x_process_error_info(struct mem_ctl_info *mci,
159 if (handle_errors) { 160 if (handle_errors) {
160 row = info->ecc_mode_status & 0xf; 161 row = info->ecc_mode_status & 0xf;
161 edac_mc_handle_ce(mci, mci->csrows[row].first_page, 0, 162 edac_mc_handle_ce(mci, mci->csrows[row].first_page, 0,
162 0, row, 0, mci->ctl_name); 163 0, row, 0, mci->ctl_name);
163 } 164 }
164 } 165 }
165 166
@@ -182,7 +183,7 @@ static void amd76x_check(struct mem_ctl_info *mci)
182} 183}
183 184
184static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, 185static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
185 enum edac_type edac_mode) 186 enum edac_type edac_mode)
186{ 187{
187 struct csrow_info *csrow; 188 struct csrow_info *csrow;
188 u32 mba, mba_base, mba_mask, dms; 189 u32 mba, mba_base, mba_mask, dms;
@@ -193,8 +194,7 @@ static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
193 194
194 /* find the DRAM Chip Select Base address and mask */ 195 /* find the DRAM Chip Select Base address and mask */
195 pci_read_config_dword(pdev, 196 pci_read_config_dword(pdev,
196 AMD76X_MEM_BASE_ADDR + (index * 4), 197 AMD76X_MEM_BASE_ADDR + (index * 4), &mba);
197 &mba);
198 198
199 if (!(mba & BIT(0))) 199 if (!(mba & BIT(0)))
200 continue; 200 continue;
@@ -238,7 +238,7 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
238 debugf0("%s()\n", __func__); 238 debugf0("%s()\n", __func__);
239 pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems); 239 pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS, &ems);
240 ems_mode = (ems >> 10) & 0x3; 240 ems_mode = (ems >> 10) & 0x3;
241 mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS); 241 mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS, 0);
242 242
243 if (mci == NULL) { 243 if (mci == NULL) {
244 return -ENOMEM; 244 return -ENOMEM;
@@ -249,24 +249,36 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
249 mci->mtype_cap = MEM_FLAG_RDDR; 249 mci->mtype_cap = MEM_FLAG_RDDR;
250 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; 250 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
251 mci->edac_cap = ems_mode ? 251 mci->edac_cap = ems_mode ?
252 (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE; 252 (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE;
253 mci->mod_name = EDAC_MOD_STR; 253 mci->mod_name = EDAC_MOD_STR;
254 mci->mod_ver = AMD76X_REVISION; 254 mci->mod_ver = AMD76X_REVISION;
255 mci->ctl_name = amd76x_devs[dev_idx].ctl_name; 255 mci->ctl_name = amd76x_devs[dev_idx].ctl_name;
256 mci->dev_name = pci_name(pdev);
256 mci->edac_check = amd76x_check; 257 mci->edac_check = amd76x_check;
257 mci->ctl_page_to_phys = NULL; 258 mci->ctl_page_to_phys = NULL;
258 259
259 amd76x_init_csrows(mci, pdev, ems_modes[ems_mode]); 260 amd76x_init_csrows(mci, pdev, ems_modes[ems_mode]);
260 amd76x_get_error_info(mci, &discard); /* clear counters */ 261 amd76x_get_error_info(mci, &discard); /* clear counters */
261 262
262 /* Here we assume that we will never see multiple instances of this 263 /* Here we assume that we will never see multiple instances of this
263 * type of memory controller. The ID is therefore hardcoded to 0. 264 * type of memory controller. The ID is therefore hardcoded to 0.
264 */ 265 */
265 if (edac_mc_add_mc(mci,0)) { 266 if (edac_mc_add_mc(mci)) {
266 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 267 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
267 goto fail; 268 goto fail;
268 } 269 }
269 270
271 /* allocating generic PCI control info */
272 amd76x_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
273 if (!amd76x_pci) {
274 printk(KERN_WARNING
275 "%s(): Unable to create PCI control\n",
276 __func__);
277 printk(KERN_WARNING
278 "%s(): PCI error report via EDAC not setup\n",
279 __func__);
280 }
281
270 /* get this far and it's successful */ 282 /* get this far and it's successful */
271 debugf3("%s(): success\n", __func__); 283 debugf3("%s(): success\n", __func__);
272 return 0; 284 return 0;
@@ -278,7 +290,7 @@ fail:
278 290
279/* returns count (>= 0), or negative on error */ 291/* returns count (>= 0), or negative on error */
280static int __devinit amd76x_init_one(struct pci_dev *pdev, 292static int __devinit amd76x_init_one(struct pci_dev *pdev,
281 const struct pci_device_id *ent) 293 const struct pci_device_id *ent)
282{ 294{
283 debugf0("%s()\n", __func__); 295 debugf0("%s()\n", __func__);
284 296
@@ -300,6 +312,9 @@ static void __devexit amd76x_remove_one(struct pci_dev *pdev)
300 312
301 debugf0("%s()\n", __func__); 313 debugf0("%s()\n", __func__);
302 314
315 if (amd76x_pci)
316 edac_pci_release_generic_ctl(amd76x_pci);
317
303 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) 318 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
304 return; 319 return;
305 320
@@ -308,16 +323,14 @@ static void __devexit amd76x_remove_one(struct pci_dev *pdev)
308 323
309static const struct pci_device_id amd76x_pci_tbl[] __devinitdata = { 324static const struct pci_device_id amd76x_pci_tbl[] __devinitdata = {
310 { 325 {
311 PCI_VEND_DEV(AMD, FE_GATE_700C), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 326 PCI_VEND_DEV(AMD, FE_GATE_700C), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
312 AMD762 327 AMD762},
313 },
314 { 328 {
315 PCI_VEND_DEV(AMD, FE_GATE_700E), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 329 PCI_VEND_DEV(AMD, FE_GATE_700E), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
316 AMD761 330 AMD761},
317 },
318 { 331 {
319 0, 332 0,
320 } /* 0 terminated list. */ 333 } /* 0 terminated list. */
321}; 334};
322 335
323MODULE_DEVICE_TABLE(pci, amd76x_pci_tbl); 336MODULE_DEVICE_TABLE(pci, amd76x_pci_tbl);
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c
index 8bcc887692..3bba224cb5 100644
--- a/drivers/edac/e752x_edac.c
+++ b/drivers/edac/e752x_edac.c
@@ -22,13 +22,16 @@
22#include <linux/pci.h> 22#include <linux/pci.h>
23#include <linux/pci_ids.h> 23#include <linux/pci_ids.h>
24#include <linux/slab.h> 24#include <linux/slab.h>
25#include "edac_mc.h" 25#include <linux/edac.h>
26#include "edac_core.h"
26 27
27#define E752X_REVISION " Ver: 2.0.1 " __DATE__ 28#define E752X_REVISION " Ver: 2.0.2 " __DATE__
28#define EDAC_MOD_STR "e752x_edac" 29#define EDAC_MOD_STR "e752x_edac"
29 30
30static int force_function_unhide; 31static int force_function_unhide;
31 32
33static struct edac_pci_ctl_info *e752x_pci;
34
32#define e752x_printk(level, fmt, arg...) \ 35#define e752x_printk(level, fmt, arg...) \
33 edac_printk(level, "e752x", fmt, ##arg) 36 edac_printk(level, "e752x", fmt, ##arg)
34 37
@@ -203,25 +206,22 @@ static const struct e752x_dev_info e752x_devs[] = {
203 [E7520] = { 206 [E7520] = {
204 .err_dev = PCI_DEVICE_ID_INTEL_7520_1_ERR, 207 .err_dev = PCI_DEVICE_ID_INTEL_7520_1_ERR,
205 .ctl_dev = PCI_DEVICE_ID_INTEL_7520_0, 208 .ctl_dev = PCI_DEVICE_ID_INTEL_7520_0,
206 .ctl_name = "E7520" 209 .ctl_name = "E7520"},
207 },
208 [E7525] = { 210 [E7525] = {
209 .err_dev = PCI_DEVICE_ID_INTEL_7525_1_ERR, 211 .err_dev = PCI_DEVICE_ID_INTEL_7525_1_ERR,
210 .ctl_dev = PCI_DEVICE_ID_INTEL_7525_0, 212 .ctl_dev = PCI_DEVICE_ID_INTEL_7525_0,
211 .ctl_name = "E7525" 213 .ctl_name = "E7525"},
212 },
213 [E7320] = { 214 [E7320] = {
214 .err_dev = PCI_DEVICE_ID_INTEL_7320_1_ERR, 215 .err_dev = PCI_DEVICE_ID_INTEL_7320_1_ERR,
215 .ctl_dev = PCI_DEVICE_ID_INTEL_7320_0, 216 .ctl_dev = PCI_DEVICE_ID_INTEL_7320_0,
216 .ctl_name = "E7320" 217 .ctl_name = "E7320"},
217 },
218}; 218};
219 219
220static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci, 220static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
221 unsigned long page) 221 unsigned long page)
222{ 222{
223 u32 remap; 223 u32 remap;
224 struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info; 224 struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info;
225 225
226 debugf3("%s()\n", __func__); 226 debugf3("%s()\n", __func__);
227 227
@@ -241,13 +241,13 @@ static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
241} 241}
242 242
243static void do_process_ce(struct mem_ctl_info *mci, u16 error_one, 243static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,
244 u32 sec1_add, u16 sec1_syndrome) 244 u32 sec1_add, u16 sec1_syndrome)
245{ 245{
246 u32 page; 246 u32 page;
247 int row; 247 int row;
248 int channel; 248 int channel;
249 int i; 249 int i;
250 struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info; 250 struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info;
251 251
252 debugf3("%s()\n", __func__); 252 debugf3("%s()\n", __func__);
253 253
@@ -261,7 +261,8 @@ static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,
261 e752x_printk(KERN_WARNING, 261 e752x_printk(KERN_WARNING,
262 "Test row %d Table %d %d %d %d %d %d %d %d\n", row, 262 "Test row %d Table %d %d %d %d %d %d %d %d\n", row,
263 pvt->map[0], pvt->map[1], pvt->map[2], pvt->map[3], 263 pvt->map[0], pvt->map[1], pvt->map[2], pvt->map[3],
264 pvt->map[4], pvt->map[5], pvt->map[6], pvt->map[7]); 264 pvt->map[4], pvt->map[5], pvt->map[6],
265 pvt->map[7]);
265 266
266 /* test for channel remapping */ 267 /* test for channel remapping */
267 for (i = 0; i < 8; i++) { 268 for (i = 0; i < 8; i++) {
@@ -275,24 +276,22 @@ static void do_process_ce(struct mem_ctl_info *mci, u16 error_one,
275 row = i; 276 row = i;
276 else 277 else
277 e752x_mc_printk(mci, KERN_WARNING, 278 e752x_mc_printk(mci, KERN_WARNING,
278 "row %d not found in remap table\n", row); 279 "row %d not found in remap table\n",
280 row);
279 } else 281 } else
280 row = edac_mc_find_csrow_by_page(mci, page); 282 row = edac_mc_find_csrow_by_page(mci, page);
281 283
282 /* 0 = channel A, 1 = channel B */ 284 /* 0 = channel A, 1 = channel B */
283 channel = !(error_one & 1); 285 channel = !(error_one & 1);
284 286
285 if (!pvt->map_type)
286 row = 7 - row;
287
288 /* e752x mc reads 34:6 of the DRAM linear address */ 287 /* e752x mc reads 34:6 of the DRAM linear address */
289 edac_mc_handle_ce(mci, page, offset_in_page(sec1_add << 4), 288 edac_mc_handle_ce(mci, page, offset_in_page(sec1_add << 4),
290 sec1_syndrome, row, channel, "e752x CE"); 289 sec1_syndrome, row, channel, "e752x CE");
291} 290}
292 291
293static inline void process_ce(struct mem_ctl_info *mci, u16 error_one, 292static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,
294 u32 sec1_add, u16 sec1_syndrome, int *error_found, 293 u32 sec1_add, u16 sec1_syndrome, int *error_found,
295 int handle_error) 294 int handle_error)
296{ 295{
297 *error_found = 1; 296 *error_found = 1;
298 297
@@ -301,11 +300,11 @@ static inline void process_ce(struct mem_ctl_info *mci, u16 error_one,
301} 300}
302 301
303static void do_process_ue(struct mem_ctl_info *mci, u16 error_one, 302static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,
304 u32 ded_add, u32 scrb_add) 303 u32 ded_add, u32 scrb_add)
305{ 304{
306 u32 error_2b, block_page; 305 u32 error_2b, block_page;
307 int row; 306 int row;
308 struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info; 307 struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info;
309 308
310 debugf3("%s()\n", __func__); 309 debugf3("%s()\n", __func__);
311 310
@@ -316,14 +315,14 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,
316 block_page = error_2b >> (PAGE_SHIFT - 4); 315 block_page = error_2b >> (PAGE_SHIFT - 4);
317 316
318 row = pvt->mc_symmetric ? 317 row = pvt->mc_symmetric ?
319 /* chip select are bits 14 & 13 */ 318 /* chip select are bits 14 & 13 */
320 ((block_page >> 1) & 3) : 319 ((block_page >> 1) & 3) :
321 edac_mc_find_csrow_by_page(mci, block_page); 320 edac_mc_find_csrow_by_page(mci, block_page);
322 321
323 /* e752x mc reads 34:6 of the DRAM linear address */ 322 /* e752x mc reads 34:6 of the DRAM linear address */
324 edac_mc_handle_ue(mci, block_page, 323 edac_mc_handle_ue(mci, block_page,
325 offset_in_page(error_2b << 4), 324 offset_in_page(error_2b << 4),
326 row, "e752x UE from Read"); 325 row, "e752x UE from Read");
327 } 326 }
328 if (error_one & 0x0404) { 327 if (error_one & 0x0404) {
329 error_2b = scrb_add; 328 error_2b = scrb_add;
@@ -332,19 +331,20 @@ static void do_process_ue(struct mem_ctl_info *mci, u16 error_one,
332 block_page = error_2b >> (PAGE_SHIFT - 4); 331 block_page = error_2b >> (PAGE_SHIFT - 4);
333 332
334 row = pvt->mc_symmetric ? 333 row = pvt->mc_symmetric ?
335 /* chip select are bits 14 & 13 */ 334 /* chip select are bits 14 & 13 */
336 ((block_page >> 1) & 3) : 335 ((block_page >> 1) & 3) :
337 edac_mc_find_csrow_by_page(mci, block_page); 336 edac_mc_find_csrow_by_page(mci, block_page);
338 337
339 /* e752x mc reads 34:6 of the DRAM linear address */ 338 /* e752x mc reads 34:6 of the DRAM linear address */
340 edac_mc_handle_ue(mci, block_page, 339 edac_mc_handle_ue(mci, block_page,
341 offset_in_page(error_2b << 4), 340 offset_in_page(error_2b << 4),
342 row, "e752x UE from Scruber"); 341 row, "e752x UE from Scruber");
343 } 342 }
344} 343}
345 344
346static inline void process_ue(struct mem_ctl_info *mci, u16 error_one, 345static inline void process_ue(struct mem_ctl_info *mci, u16 error_one,
347 u32 ded_add, u32 scrb_add, int *error_found, int handle_error) 346 u32 ded_add, u32 scrb_add, int *error_found,
347 int handle_error)
348{ 348{
349 *error_found = 1; 349 *error_found = 1;
350 350
@@ -353,7 +353,7 @@ static inline void process_ue(struct mem_ctl_info *mci, u16 error_one,
353} 353}
354 354
355static inline void process_ue_no_info_wr(struct mem_ctl_info *mci, 355static inline void process_ue_no_info_wr(struct mem_ctl_info *mci,
356 int *error_found, int handle_error) 356 int *error_found, int handle_error)
357{ 357{
358 *error_found = 1; 358 *error_found = 1;
359 359
@@ -365,24 +365,24 @@ static inline void process_ue_no_info_wr(struct mem_ctl_info *mci,
365} 365}
366 366
367static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error, 367static void do_process_ded_retry(struct mem_ctl_info *mci, u16 error,
368 u32 retry_add) 368 u32 retry_add)
369{ 369{
370 u32 error_1b, page; 370 u32 error_1b, page;
371 int row; 371 int row;
372 struct e752x_pvt *pvt = (struct e752x_pvt *) mci->pvt_info; 372 struct e752x_pvt *pvt = (struct e752x_pvt *)mci->pvt_info;
373 373
374 error_1b = retry_add; 374 error_1b = retry_add;
375 page = error_1b >> (PAGE_SHIFT - 4); /* convert the addr to 4k page */ 375 page = error_1b >> (PAGE_SHIFT - 4); /* convert the addr to 4k page */
376 row = pvt->mc_symmetric ? 376 row = pvt->mc_symmetric ? ((page >> 1) & 3) : /* chip select are bits 14 & 13 */
377 ((page >> 1) & 3) : /* chip select are bits 14 & 13 */
378 edac_mc_find_csrow_by_page(mci, page); 377 edac_mc_find_csrow_by_page(mci, page);
379 e752x_mc_printk(mci, KERN_WARNING, 378 e752x_mc_printk(mci, KERN_WARNING,
380 "CE page 0x%lx, row %d : Memory read retry\n", 379 "CE page 0x%lx, row %d : Memory read retry\n",
381 (long unsigned int) page, row); 380 (long unsigned int)page, row);
382} 381}
383 382
384static inline void process_ded_retry(struct mem_ctl_info *mci, u16 error, 383static inline void process_ded_retry(struct mem_ctl_info *mci, u16 error,
385 u32 retry_add, int *error_found, int handle_error) 384 u32 retry_add, int *error_found,
385 int handle_error)
386{ 386{
387 *error_found = 1; 387 *error_found = 1;
388 388
@@ -391,7 +391,7 @@ static inline void process_ded_retry(struct mem_ctl_info *mci, u16 error,
391} 391}
392 392
393static inline void process_threshold_ce(struct mem_ctl_info *mci, u16 error, 393static inline void process_threshold_ce(struct mem_ctl_info *mci, u16 error,
394 int *error_found, int handle_error) 394 int *error_found, int handle_error)
395{ 395{
396 *error_found = 1; 396 *error_found = 1;
397 397
@@ -420,7 +420,7 @@ static void do_global_error(int fatal, u32 errors)
420} 420}
421 421
422static inline void global_error(int fatal, u32 errors, int *error_found, 422static inline void global_error(int fatal, u32 errors, int *error_found,
423 int handle_error) 423 int handle_error)
424{ 424{
425 *error_found = 1; 425 *error_found = 1;
426 426
@@ -447,7 +447,7 @@ static void do_hub_error(int fatal, u8 errors)
447} 447}
448 448
449static inline void hub_error(int fatal, u8 errors, int *error_found, 449static inline void hub_error(int fatal, u8 errors, int *error_found,
450 int handle_error) 450 int handle_error)
451{ 451{
452 *error_found = 1; 452 *error_found = 1;
453 453
@@ -505,7 +505,7 @@ static void do_sysbus_error(int fatal, u32 errors)
505} 505}
506 506
507static inline void sysbus_error(int fatal, u32 errors, int *error_found, 507static inline void sysbus_error(int fatal, u32 errors, int *error_found,
508 int handle_error) 508 int handle_error)
509{ 509{
510 *error_found = 1; 510 *error_found = 1;
511 511
@@ -514,7 +514,7 @@ static inline void sysbus_error(int fatal, u32 errors, int *error_found,
514} 514}
515 515
516static void e752x_check_hub_interface(struct e752x_error_info *info, 516static void e752x_check_hub_interface(struct e752x_error_info *info,
517 int *error_found, int handle_error) 517 int *error_found, int handle_error)
518{ 518{
519 u8 stat8; 519 u8 stat8;
520 520
@@ -522,33 +522,32 @@ static void e752x_check_hub_interface(struct e752x_error_info *info,
522 522
523 stat8 = info->hi_ferr; 523 stat8 = info->hi_ferr;
524 524
525 if(stat8 & 0x7f) { /* Error, so process */ 525 if (stat8 & 0x7f) { /* Error, so process */
526 stat8 &= 0x7f; 526 stat8 &= 0x7f;
527 527
528 if(stat8 & 0x2b) 528 if (stat8 & 0x2b)
529 hub_error(1, stat8 & 0x2b, error_found, handle_error); 529 hub_error(1, stat8 & 0x2b, error_found, handle_error);
530 530
531 if(stat8 & 0x54) 531 if (stat8 & 0x54)
532 hub_error(0, stat8 & 0x54, error_found, handle_error); 532 hub_error(0, stat8 & 0x54, error_found, handle_error);
533 } 533 }
534
535 //pci_read_config_byte(dev,E752X_HI_NERR,&stat8); 534 //pci_read_config_byte(dev,E752X_HI_NERR,&stat8);
536 535
537 stat8 = info->hi_nerr; 536 stat8 = info->hi_nerr;
538 537
539 if(stat8 & 0x7f) { /* Error, so process */ 538 if (stat8 & 0x7f) { /* Error, so process */
540 stat8 &= 0x7f; 539 stat8 &= 0x7f;
541 540
542 if (stat8 & 0x2b) 541 if (stat8 & 0x2b)
543 hub_error(1, stat8 & 0x2b, error_found, handle_error); 542 hub_error(1, stat8 & 0x2b, error_found, handle_error);
544 543
545 if(stat8 & 0x54) 544 if (stat8 & 0x54)
546 hub_error(0, stat8 & 0x54, error_found, handle_error); 545 hub_error(0, stat8 & 0x54, error_found, handle_error);
547 } 546 }
548} 547}
549 548
550static void e752x_check_sysbus(struct e752x_error_info *info, 549static void e752x_check_sysbus(struct e752x_error_info *info,
551 int *error_found, int handle_error) 550 int *error_found, int handle_error)
552{ 551{
553 u32 stat32, error32; 552 u32 stat32, error32;
554 553
@@ -556,47 +555,47 @@ static void e752x_check_sysbus(struct e752x_error_info *info,
556 stat32 = info->sysbus_ferr + (info->sysbus_nerr << 16); 555 stat32 = info->sysbus_ferr + (info->sysbus_nerr << 16);
557 556
558 if (stat32 == 0) 557 if (stat32 == 0)
559 return; /* no errors */ 558 return; /* no errors */
560 559
561 error32 = (stat32 >> 16) & 0x3ff; 560 error32 = (stat32 >> 16) & 0x3ff;
562 stat32 = stat32 & 0x3ff; 561 stat32 = stat32 & 0x3ff;
563 562
564 if(stat32 & 0x087) 563 if (stat32 & 0x087)
565 sysbus_error(1, stat32 & 0x087, error_found, handle_error); 564 sysbus_error(1, stat32 & 0x087, error_found, handle_error);
566 565
567 if(stat32 & 0x378) 566 if (stat32 & 0x378)
568 sysbus_error(0, stat32 & 0x378, error_found, handle_error); 567 sysbus_error(0, stat32 & 0x378, error_found, handle_error);
569 568
570 if(error32 & 0x087) 569 if (error32 & 0x087)
571 sysbus_error(1, error32 & 0x087, error_found, handle_error); 570 sysbus_error(1, error32 & 0x087, error_found, handle_error);
572 571
573 if(error32 & 0x378) 572 if (error32 & 0x378)
574 sysbus_error(0, error32 & 0x378, error_found, handle_error); 573 sysbus_error(0, error32 & 0x378, error_found, handle_error);
575} 574}
576 575
577static void e752x_check_membuf (struct e752x_error_info *info, 576static void e752x_check_membuf(struct e752x_error_info *info,
578 int *error_found, int handle_error) 577 int *error_found, int handle_error)
579{ 578{
580 u8 stat8; 579 u8 stat8;
581 580
582 stat8 = info->buf_ferr; 581 stat8 = info->buf_ferr;
583 582
584 if (stat8 & 0x0f) { /* Error, so process */ 583 if (stat8 & 0x0f) { /* Error, so process */
585 stat8 &= 0x0f; 584 stat8 &= 0x0f;
586 membuf_error(stat8, error_found, handle_error); 585 membuf_error(stat8, error_found, handle_error);
587 } 586 }
588 587
589 stat8 = info->buf_nerr; 588 stat8 = info->buf_nerr;
590 589
591 if (stat8 & 0x0f) { /* Error, so process */ 590 if (stat8 & 0x0f) { /* Error, so process */
592 stat8 &= 0x0f; 591 stat8 &= 0x0f;
593 membuf_error(stat8, error_found, handle_error); 592 membuf_error(stat8, error_found, handle_error);
594 } 593 }
595} 594}
596 595
597static void e752x_check_dram (struct mem_ctl_info *mci, 596static void e752x_check_dram(struct mem_ctl_info *mci,
598 struct e752x_error_info *info, int *error_found, 597 struct e752x_error_info *info, int *error_found,
599 int handle_error) 598 int handle_error)
600{ 599{
601 u16 error_one, error_next; 600 u16 error_one, error_next;
602 601
@@ -604,55 +603,52 @@ static void e752x_check_dram (struct mem_ctl_info *mci,
604 error_next = info->dram_nerr; 603 error_next = info->dram_nerr;
605 604
606 /* decode and report errors */ 605 /* decode and report errors */
607 if(error_one & 0x0101) /* check first error correctable */ 606 if (error_one & 0x0101) /* check first error correctable */
608 process_ce(mci, error_one, info->dram_sec1_add, 607 process_ce(mci, error_one, info->dram_sec1_add,
609 info->dram_sec1_syndrome, error_found, 608 info->dram_sec1_syndrome, error_found, handle_error);
610 handle_error);
611 609
612 if(error_next & 0x0101) /* check next error correctable */ 610 if (error_next & 0x0101) /* check next error correctable */
613 process_ce(mci, error_next, info->dram_sec2_add, 611 process_ce(mci, error_next, info->dram_sec2_add,
614 info->dram_sec2_syndrome, error_found, 612 info->dram_sec2_syndrome, error_found, handle_error);
615 handle_error);
616 613
617 if(error_one & 0x4040) 614 if (error_one & 0x4040)
618 process_ue_no_info_wr(mci, error_found, handle_error); 615 process_ue_no_info_wr(mci, error_found, handle_error);
619 616
620 if(error_next & 0x4040) 617 if (error_next & 0x4040)
621 process_ue_no_info_wr(mci, error_found, handle_error); 618 process_ue_no_info_wr(mci, error_found, handle_error);
622 619
623 if(error_one & 0x2020) 620 if (error_one & 0x2020)
624 process_ded_retry(mci, error_one, info->dram_retr_add, 621 process_ded_retry(mci, error_one, info->dram_retr_add,
625 error_found, handle_error); 622 error_found, handle_error);
626 623
627 if(error_next & 0x2020) 624 if (error_next & 0x2020)
628 process_ded_retry(mci, error_next, info->dram_retr_add, 625 process_ded_retry(mci, error_next, info->dram_retr_add,
629 error_found, handle_error); 626 error_found, handle_error);
630 627
631 if(error_one & 0x0808) 628 if (error_one & 0x0808)
632 process_threshold_ce(mci, error_one, error_found, 629 process_threshold_ce(mci, error_one, error_found, handle_error);
633 handle_error);
634 630
635 if(error_next & 0x0808) 631 if (error_next & 0x0808)
636 process_threshold_ce(mci, error_next, error_found, 632 process_threshold_ce(mci, error_next, error_found,
637 handle_error); 633 handle_error);
638 634
639 if(error_one & 0x0606) 635 if (error_one & 0x0606)
640 process_ue(mci, error_one, info->dram_ded_add, 636 process_ue(mci, error_one, info->dram_ded_add,
641 info->dram_scrb_add, error_found, handle_error); 637 info->dram_scrb_add, error_found, handle_error);
642 638
643 if(error_next & 0x0606) 639 if (error_next & 0x0606)
644 process_ue(mci, error_next, info->dram_ded_add, 640 process_ue(mci, error_next, info->dram_ded_add,
645 info->dram_scrb_add, error_found, handle_error); 641 info->dram_scrb_add, error_found, handle_error);
646} 642}
647 643
648static void e752x_get_error_info (struct mem_ctl_info *mci, 644static void e752x_get_error_info(struct mem_ctl_info *mci,
649 struct e752x_error_info *info) 645 struct e752x_error_info *info)
650{ 646{
651 struct pci_dev *dev; 647 struct pci_dev *dev;
652 struct e752x_pvt *pvt; 648 struct e752x_pvt *pvt;
653 649
654 memset(info, 0, sizeof(*info)); 650 memset(info, 0, sizeof(*info));
655 pvt = (struct e752x_pvt *) mci->pvt_info; 651 pvt = (struct e752x_pvt *)mci->pvt_info;
656 dev = pvt->dev_d0f1; 652 dev = pvt->dev_d0f1;
657 pci_read_config_dword(dev, E752X_FERR_GLOBAL, &info->ferr_global); 653 pci_read_config_dword(dev, E752X_FERR_GLOBAL, &info->ferr_global);
658 654
@@ -661,8 +657,7 @@ static void e752x_get_error_info (struct mem_ctl_info *mci,
661 pci_read_config_word(dev, E752X_SYSBUS_FERR, 657 pci_read_config_word(dev, E752X_SYSBUS_FERR,
662 &info->sysbus_ferr); 658 &info->sysbus_ferr);
663 pci_read_config_byte(dev, E752X_BUF_FERR, &info->buf_ferr); 659 pci_read_config_byte(dev, E752X_BUF_FERR, &info->buf_ferr);
664 pci_read_config_word(dev, E752X_DRAM_FERR, 660 pci_read_config_word(dev, E752X_DRAM_FERR, &info->dram_ferr);
665 &info->dram_ferr);
666 pci_read_config_dword(dev, E752X_DRAM_SEC1_ADD, 661 pci_read_config_dword(dev, E752X_DRAM_SEC1_ADD,
667 &info->dram_sec1_add); 662 &info->dram_sec1_add);
668 pci_read_config_word(dev, E752X_DRAM_SEC1_SYNDROME, 663 pci_read_config_word(dev, E752X_DRAM_SEC1_SYNDROME,
@@ -688,7 +683,7 @@ static void e752x_get_error_info (struct mem_ctl_info *mci,
688 683
689 if (info->dram_ferr) 684 if (info->dram_ferr)
690 pci_write_bits16(pvt->bridge_ck, E752X_DRAM_FERR, 685 pci_write_bits16(pvt->bridge_ck, E752X_DRAM_FERR,
691 info->dram_ferr, info->dram_ferr); 686 info->dram_ferr, info->dram_ferr);
692 687
693 pci_write_config_dword(dev, E752X_FERR_GLOBAL, 688 pci_write_config_dword(dev, E752X_FERR_GLOBAL,
694 info->ferr_global); 689 info->ferr_global);
@@ -701,8 +696,7 @@ static void e752x_get_error_info (struct mem_ctl_info *mci,
701 pci_read_config_word(dev, E752X_SYSBUS_NERR, 696 pci_read_config_word(dev, E752X_SYSBUS_NERR,
702 &info->sysbus_nerr); 697 &info->sysbus_nerr);
703 pci_read_config_byte(dev, E752X_BUF_NERR, &info->buf_nerr); 698 pci_read_config_byte(dev, E752X_BUF_NERR, &info->buf_nerr);
704 pci_read_config_word(dev, E752X_DRAM_NERR, 699 pci_read_config_word(dev, E752X_DRAM_NERR, &info->dram_nerr);
705 &info->dram_nerr);
706 pci_read_config_dword(dev, E752X_DRAM_SEC2_ADD, 700 pci_read_config_dword(dev, E752X_DRAM_SEC2_ADD,
707 &info->dram_sec2_add); 701 &info->dram_sec2_add);
708 pci_read_config_word(dev, E752X_DRAM_SEC2_SYNDROME, 702 pci_read_config_word(dev, E752X_DRAM_SEC2_SYNDROME,
@@ -722,15 +716,16 @@ static void e752x_get_error_info (struct mem_ctl_info *mci,
722 716
723 if (info->dram_nerr) 717 if (info->dram_nerr)
724 pci_write_bits16(pvt->bridge_ck, E752X_DRAM_NERR, 718 pci_write_bits16(pvt->bridge_ck, E752X_DRAM_NERR,
725 info->dram_nerr, info->dram_nerr); 719 info->dram_nerr, info->dram_nerr);
726 720
727 pci_write_config_dword(dev, E752X_NERR_GLOBAL, 721 pci_write_config_dword(dev, E752X_NERR_GLOBAL,
728 info->nerr_global); 722 info->nerr_global);
729 } 723 }
730} 724}
731 725
732static int e752x_process_error_info (struct mem_ctl_info *mci, 726static int e752x_process_error_info(struct mem_ctl_info *mci,
733 struct e752x_error_info *info, int handle_errors) 727 struct e752x_error_info *info,
728 int handle_errors)
734{ 729{
735 u32 error32, stat32; 730 u32 error32, stat32;
736 int error_found; 731 int error_found;
@@ -776,26 +771,38 @@ static inline int dual_channel_active(u16 ddrcsr)
776 return (((ddrcsr >> 12) & 3) == 3); 771 return (((ddrcsr >> 12) & 3) == 3);
777} 772}
778 773
774/* Remap csrow index numbers if map_type is "reverse"
775 */
776static inline int remap_csrow_index(struct mem_ctl_info *mci, int index)
777{
778 struct e752x_pvt *pvt = mci->pvt_info;
779
780 if (!pvt->map_type)
781 return (7 - index);
782
783 return (index);
784}
785
779static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, 786static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
780 u16 ddrcsr) 787 u16 ddrcsr)
781{ 788{
782 struct csrow_info *csrow; 789 struct csrow_info *csrow;
783 unsigned long last_cumul_size; 790 unsigned long last_cumul_size;
784 int index, mem_dev, drc_chan; 791 int index, mem_dev, drc_chan;
785 int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */ 792 int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */
786 int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ 793 int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
787 u8 value; 794 u8 value;
788 u32 dra, drc, cumul_size; 795 u32 dra, drc, cumul_size;
789 796
790 dra = 0; 797 dra = 0;
791 for (index=0; index < 4; index++) { 798 for (index = 0; index < 4; index++) {
792 u8 dra_reg; 799 u8 dra_reg;
793 pci_read_config_byte(pdev, E752X_DRA+index, &dra_reg); 800 pci_read_config_byte(pdev, E752X_DRA + index, &dra_reg);
794 dra |= dra_reg << (index * 8); 801 dra |= dra_reg << (index * 8);
795 } 802 }
796 pci_read_config_dword(pdev, E752X_DRC, &drc); 803 pci_read_config_dword(pdev, E752X_DRC, &drc);
797 drc_chan = dual_channel_active(ddrcsr); 804 drc_chan = dual_channel_active(ddrcsr);
798 drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */ 805 drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
799 drc_ddim = (drc >> 20) & 0x3; 806 drc_ddim = (drc >> 20) & 0x3;
800 807
801 /* The dram row boundary (DRB) reg values are boundary address for 808 /* The dram row boundary (DRB) reg values are boundary address for
@@ -806,7 +813,7 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
806 for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) { 813 for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
807 /* mem_dev 0=x8, 1=x4 */ 814 /* mem_dev 0=x8, 1=x4 */
808 mem_dev = (dra >> (index * 4 + 2)) & 0x3; 815 mem_dev = (dra >> (index * 4 + 2)) & 0x3;
809 csrow = &mci->csrows[index]; 816 csrow = &mci->csrows[remap_csrow_index(mci, index)];
810 817
811 mem_dev = (mem_dev == 2); 818 mem_dev = (mem_dev == 2);
812 pci_read_config_byte(pdev, E752X_DRB + index, &value); 819 pci_read_config_byte(pdev, E752X_DRB + index, &value);
@@ -843,10 +850,10 @@ static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
843} 850}
844 851
845static void e752x_init_mem_map_table(struct pci_dev *pdev, 852static void e752x_init_mem_map_table(struct pci_dev *pdev,
846 struct e752x_pvt *pvt) 853 struct e752x_pvt *pvt)
847{ 854{
848 int index; 855 int index;
849 u8 value, last, row, stat8; 856 u8 value, last, row;
850 857
851 last = 0; 858 last = 0;
852 row = 0; 859 row = 0;
@@ -858,7 +865,7 @@ static void e752x_init_mem_map_table(struct pci_dev *pdev,
858 /* no dimm in the slot, so flag it as empty */ 865 /* no dimm in the slot, so flag it as empty */
859 pvt->map[index] = 0xff; 866 pvt->map[index] = 0xff;
860 pvt->map[index + 1] = 0xff; 867 pvt->map[index + 1] = 0xff;
861 } else { /* there is a dimm in the slot */ 868 } else { /* there is a dimm in the slot */
862 pvt->map[index] = row; 869 pvt->map[index] = row;
863 row++; 870 row++;
864 last = value; 871 last = value;
@@ -866,31 +873,25 @@ static void e752x_init_mem_map_table(struct pci_dev *pdev,
866 * sided 873 * sided
867 */ 874 */
868 pci_read_config_byte(pdev, E752X_DRB + index + 1, 875 pci_read_config_byte(pdev, E752X_DRB + index + 1,
869 &value); 876 &value);
870 pvt->map[index + 1] = (value == last) ? 877
871 0xff : /* the dimm is single sided, 878 /* the dimm is single sided, so flag as empty */
872 so flag as empty */ 879 /* this is a double sided dimm to save the next row #*/
873 row; /* this is a double sided dimm 880 pvt->map[index + 1] = (value == last) ? 0xff : row;
874 to save the next row # */
875 row++; 881 row++;
876 last = value; 882 last = value;
877 } 883 }
878 } 884 }
879
880 /* set the map type. 1 = normal, 0 = reversed */
881 pci_read_config_byte(pdev, E752X_DRM, &stat8);
882 pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
883} 885}
884 886
885/* Return 0 on success or 1 on failure. */ 887/* Return 0 on success or 1 on failure. */
886static int e752x_get_devs(struct pci_dev *pdev, int dev_idx, 888static int e752x_get_devs(struct pci_dev *pdev, int dev_idx,
887 struct e752x_pvt *pvt) 889 struct e752x_pvt *pvt)
888{ 890{
889 struct pci_dev *dev; 891 struct pci_dev *dev;
890 892
891 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL, 893 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
892 pvt->dev_info->err_dev, 894 pvt->dev_info->err_dev, pvt->bridge_ck);
893 pvt->bridge_ck);
894 895
895 if (pvt->bridge_ck == NULL) 896 if (pvt->bridge_ck == NULL)
896 pvt->bridge_ck = pci_scan_single_device(pdev->bus, 897 pvt->bridge_ck = pci_scan_single_device(pdev->bus,
@@ -898,13 +899,13 @@ static int e752x_get_devs(struct pci_dev *pdev, int dev_idx,
898 899
899 if (pvt->bridge_ck == NULL) { 900 if (pvt->bridge_ck == NULL) {
900 e752x_printk(KERN_ERR, "error reporting device not found:" 901 e752x_printk(KERN_ERR, "error reporting device not found:"
901 "vendor %x device 0x%x (broken BIOS?)\n", 902 "vendor %x device 0x%x (broken BIOS?)\n",
902 PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev); 903 PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
903 return 1; 904 return 1;
904 } 905 }
905 906
906 dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev, 907 dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev,
907 NULL); 908 NULL);
908 909
909 if (dev == NULL) 910 if (dev == NULL)
910 goto fail; 911 goto fail;
@@ -942,12 +943,22 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
942 struct mem_ctl_info *mci; 943 struct mem_ctl_info *mci;
943 struct e752x_pvt *pvt; 944 struct e752x_pvt *pvt;
944 u16 ddrcsr; 945 u16 ddrcsr;
945 int drc_chan; /* Number of channels 0=1chan,1=2chan */ 946 int drc_chan; /* Number of channels 0=1chan,1=2chan */
946 struct e752x_error_info discard; 947 struct e752x_error_info discard;
947 948
948 debugf0("%s(): mci\n", __func__); 949 debugf0("%s(): mci\n", __func__);
949 debugf0("Starting Probe1\n"); 950 debugf0("Starting Probe1\n");
950 951
952 /* make sure error reporting method is sane */
953 switch (edac_op_state) {
954 case EDAC_OPSTATE_POLL:
955 case EDAC_OPSTATE_NMI:
956 break;
957 default:
958 edac_op_state = EDAC_OPSTATE_POLL;
959 break;
960 }
961
951 /* check to see if device 0 function 1 is enabled; if it isn't, we 962 /* check to see if device 0 function 1 is enabled; if it isn't, we
952 * assume the BIOS has reserved it for a reason and is expecting 963 * assume the BIOS has reserved it for a reason and is expecting
953 * exclusive access, we take care not to violate that assumption and 964 * exclusive access, we take care not to violate that assumption and
@@ -966,7 +977,7 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
966 /* Dual channel = 1, Single channel = 0 */ 977 /* Dual channel = 1, Single channel = 0 */
967 drc_chan = dual_channel_active(ddrcsr); 978 drc_chan = dual_channel_active(ddrcsr);
968 979
969 mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1); 980 mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1, 0);
970 981
971 if (mci == NULL) { 982 if (mci == NULL) {
972 return -ENOMEM; 983 return -ENOMEM;
@@ -975,14 +986,14 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
975 debugf3("%s(): init mci\n", __func__); 986 debugf3("%s(): init mci\n", __func__);
976 mci->mtype_cap = MEM_FLAG_RDDR; 987 mci->mtype_cap = MEM_FLAG_RDDR;
977 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED | 988 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
978 EDAC_FLAG_S4ECD4ED; 989 EDAC_FLAG_S4ECD4ED;
979 /* FIXME - what if different memory types are in different csrows? */ 990 /* FIXME - what if different memory types are in different csrows? */
980 mci->mod_name = EDAC_MOD_STR; 991 mci->mod_name = EDAC_MOD_STR;
981 mci->mod_ver = E752X_REVISION; 992 mci->mod_ver = E752X_REVISION;
982 mci->dev = &pdev->dev; 993 mci->dev = &pdev->dev;
983 994
984 debugf3("%s(): init pvt\n", __func__); 995 debugf3("%s(): init pvt\n", __func__);
985 pvt = (struct e752x_pvt *) mci->pvt_info; 996 pvt = (struct e752x_pvt *)mci->pvt_info;
986 pvt->dev_info = &e752x_devs[dev_idx]; 997 pvt->dev_info = &e752x_devs[dev_idx];
987 pvt->mc_symmetric = ((ddrcsr & 0x10) != 0); 998 pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
988 999
@@ -993,16 +1004,20 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
993 1004
994 debugf3("%s(): more mci init\n", __func__); 1005 debugf3("%s(): more mci init\n", __func__);
995 mci->ctl_name = pvt->dev_info->ctl_name; 1006 mci->ctl_name = pvt->dev_info->ctl_name;
1007 mci->dev_name = pci_name(pdev);
996 mci->edac_check = e752x_check; 1008 mci->edac_check = e752x_check;
997 mci->ctl_page_to_phys = ctl_page_to_phys; 1009 mci->ctl_page_to_phys = ctl_page_to_phys;
998 1010
999 e752x_init_csrows(mci, pdev, ddrcsr); 1011 /* set the map type. 1 = normal, 0 = reversed
1000 e752x_init_mem_map_table(pdev, pvt); 1012 * Must be set before e752x_init_csrows in case csrow mapping
1001 1013 * is reversed.
1002 /* set the map type. 1 = normal, 0 = reversed */ 1014 */
1003 pci_read_config_byte(pdev, E752X_DRM, &stat8); 1015 pci_read_config_byte(pdev, E752X_DRM, &stat8);
1004 pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f)); 1016 pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
1005 1017
1018 e752x_init_csrows(mci, pdev, ddrcsr);
1019 e752x_init_mem_map_table(pdev, pvt);
1020
1006 mci->edac_cap |= EDAC_FLAG_NONE; 1021 mci->edac_cap |= EDAC_FLAG_NONE;
1007 debugf3("%s(): tolm, remapbase, remaplimit\n", __func__); 1022 debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
1008 1023
@@ -1014,19 +1029,29 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
1014 pci_read_config_word(pdev, E752X_REMAPLIMIT, &pci_data); 1029 pci_read_config_word(pdev, E752X_REMAPLIMIT, &pci_data);
1015 pvt->remaplimit = ((u32) pci_data) << 14; 1030 pvt->remaplimit = ((u32) pci_data) << 14;
1016 e752x_printk(KERN_INFO, 1031 e752x_printk(KERN_INFO,
1017 "tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm, 1032 "tolm = %x, remapbase = %x, remaplimit = %x\n",
1018 pvt->remapbase, pvt->remaplimit); 1033 pvt->tolm, pvt->remapbase, pvt->remaplimit);
1019 1034
1020 /* Here we assume that we will never see multiple instances of this 1035 /* Here we assume that we will never see multiple instances of this
1021 * type of memory controller. The ID is therefore hardcoded to 0. 1036 * type of memory controller. The ID is therefore hardcoded to 0.
1022 */ 1037 */
1023 if (edac_mc_add_mc(mci,0)) { 1038 if (edac_mc_add_mc(mci)) {
1024 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 1039 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
1025 goto fail; 1040 goto fail;
1026 } 1041 }
1027 1042
1028 e752x_init_error_reporting_regs(pvt); 1043 e752x_init_error_reporting_regs(pvt);
1029 e752x_get_error_info(mci, &discard); /* clear other MCH errors */ 1044 e752x_get_error_info(mci, &discard); /* clear other MCH errors */
1045
1046 /* allocating generic PCI control info */
1047 e752x_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
1048 if (!e752x_pci) {
1049 printk(KERN_WARNING
1050 "%s(): Unable to create PCI control\n", __func__);
1051 printk(KERN_WARNING
1052 "%s(): PCI error report via EDAC not setup\n",
1053 __func__);
1054 }
1030 1055
1031 /* get this far and it's successful */ 1056 /* get this far and it's successful */
1032 debugf3("%s(): success\n", __func__); 1057 debugf3("%s(): success\n", __func__);
@@ -1043,12 +1068,12 @@ fail:
1043 1068
1044/* returns count (>= 0), or negative on error */ 1069/* returns count (>= 0), or negative on error */
1045static int __devinit e752x_init_one(struct pci_dev *pdev, 1070static int __devinit e752x_init_one(struct pci_dev *pdev,
1046 const struct pci_device_id *ent) 1071 const struct pci_device_id *ent)
1047{ 1072{
1048 debugf0("%s()\n", __func__); 1073 debugf0("%s()\n", __func__);
1049 1074
1050 /* wake up and enable device */ 1075 /* wake up and enable device */
1051 if(pci_enable_device(pdev) < 0) 1076 if (pci_enable_device(pdev) < 0)
1052 return -EIO; 1077 return -EIO;
1053 1078
1054 return e752x_probe1(pdev, ent->driver_data); 1079 return e752x_probe1(pdev, ent->driver_data);
@@ -1061,10 +1086,13 @@ static void __devexit e752x_remove_one(struct pci_dev *pdev)
1061 1086
1062 debugf0("%s()\n", __func__); 1087 debugf0("%s()\n", __func__);
1063 1088
1089 if (e752x_pci)
1090 edac_pci_release_generic_ctl(e752x_pci);
1091
1064 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) 1092 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
1065 return; 1093 return;
1066 1094
1067 pvt = (struct e752x_pvt *) mci->pvt_info; 1095 pvt = (struct e752x_pvt *)mci->pvt_info;
1068 pci_dev_put(pvt->dev_d0f0); 1096 pci_dev_put(pvt->dev_d0f0);
1069 pci_dev_put(pvt->dev_d0f1); 1097 pci_dev_put(pvt->dev_d0f1);
1070 pci_dev_put(pvt->bridge_ck); 1098 pci_dev_put(pvt->bridge_ck);
@@ -1073,20 +1101,17 @@ static void __devexit e752x_remove_one(struct pci_dev *pdev)
1073 1101
1074static const struct pci_device_id e752x_pci_tbl[] __devinitdata = { 1102static const struct pci_device_id e752x_pci_tbl[] __devinitdata = {
1075 { 1103 {
1076 PCI_VEND_DEV(INTEL, 7520_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1104 PCI_VEND_DEV(INTEL, 7520_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1077 E7520 1105 E7520},
1078 },
1079 { 1106 {
1080 PCI_VEND_DEV(INTEL, 7525_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1107 PCI_VEND_DEV(INTEL, 7525_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1081 E7525 1108 E7525},
1082 },
1083 { 1109 {
1084 PCI_VEND_DEV(INTEL, 7320_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1110 PCI_VEND_DEV(INTEL, 7320_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
1085 E7320 1111 E7320},
1086 },
1087 { 1112 {
1088 0, 1113 0,
1089 } /* 0 terminated list. */ 1114 } /* 0 terminated list. */
1090}; 1115};
1091 1116
1092MODULE_DEVICE_TABLE(pci, e752x_pci_tbl); 1117MODULE_DEVICE_TABLE(pci, e752x_pci_tbl);
@@ -1122,5 +1147,6 @@ MODULE_DESCRIPTION("MC support for Intel e752x memory controllers");
1122 1147
1123module_param(force_function_unhide, int, 0444); 1148module_param(force_function_unhide, int, 0444);
1124MODULE_PARM_DESC(force_function_unhide, "if BIOS sets Dev0:Fun1 up as hidden:" 1149MODULE_PARM_DESC(force_function_unhide, "if BIOS sets Dev0:Fun1 up as hidden:"
1125" 1=force unhide and hope BIOS doesn't fight driver for Dev0:Fun1 access"); 1150 " 1=force unhide and hope BIOS doesn't fight driver for Dev0:Fun1 access");
1126 1151module_param(edac_op_state, int, 0444);
1152MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c
index 310d91b41c..96ecc49266 100644
--- a/drivers/edac/e7xxx_edac.c
+++ b/drivers/edac/e7xxx_edac.c
@@ -27,9 +27,10 @@
27#include <linux/pci.h> 27#include <linux/pci.h>
28#include <linux/pci_ids.h> 28#include <linux/pci_ids.h>
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include "edac_mc.h" 30#include <linux/edac.h>
31#include "edac_core.h"
31 32
32#define E7XXX_REVISION " Ver: 2.0.1 " __DATE__ 33#define E7XXX_REVISION " Ver: 2.0.2 " __DATE__
33#define EDAC_MOD_STR "e7xxx_edac" 34#define EDAC_MOD_STR "e7xxx_edac"
34 35
35#define e7xxx_printk(level, fmt, arg...) \ 36#define e7xxx_printk(level, fmt, arg...) \
@@ -143,23 +144,21 @@ struct e7xxx_error_info {
143 u32 dram_uelog_add; 144 u32 dram_uelog_add;
144}; 145};
145 146
147static struct edac_pci_ctl_info *e7xxx_pci;
148
146static const struct e7xxx_dev_info e7xxx_devs[] = { 149static const struct e7xxx_dev_info e7xxx_devs[] = {
147 [E7500] = { 150 [E7500] = {
148 .err_dev = PCI_DEVICE_ID_INTEL_7500_1_ERR, 151 .err_dev = PCI_DEVICE_ID_INTEL_7500_1_ERR,
149 .ctl_name = "E7500" 152 .ctl_name = "E7500"},
150 },
151 [E7501] = { 153 [E7501] = {
152 .err_dev = PCI_DEVICE_ID_INTEL_7501_1_ERR, 154 .err_dev = PCI_DEVICE_ID_INTEL_7501_1_ERR,
153 .ctl_name = "E7501" 155 .ctl_name = "E7501"},
154 },
155 [E7505] = { 156 [E7505] = {
156 .err_dev = PCI_DEVICE_ID_INTEL_7505_1_ERR, 157 .err_dev = PCI_DEVICE_ID_INTEL_7505_1_ERR,
157 .ctl_name = "E7505" 158 .ctl_name = "E7505"},
158 },
159 [E7205] = { 159 [E7205] = {
160 .err_dev = PCI_DEVICE_ID_INTEL_7205_1_ERR, 160 .err_dev = PCI_DEVICE_ID_INTEL_7205_1_ERR,
161 .ctl_name = "E7205" 161 .ctl_name = "E7205"},
162 },
163}; 162};
164 163
165/* FIXME - is this valid for both SECDED and S4ECD4ED? */ 164/* FIXME - is this valid for both SECDED and S4ECD4ED? */
@@ -180,15 +179,15 @@ static inline int e7xxx_find_channel(u16 syndrome)
180} 179}
181 180
182static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci, 181static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
183 unsigned long page) 182 unsigned long page)
184{ 183{
185 u32 remap; 184 u32 remap;
186 struct e7xxx_pvt *pvt = (struct e7xxx_pvt *) mci->pvt_info; 185 struct e7xxx_pvt *pvt = (struct e7xxx_pvt *)mci->pvt_info;
187 186
188 debugf3("%s()\n", __func__); 187 debugf3("%s()\n", __func__);
189 188
190 if ((page < pvt->tolm) || 189 if ((page < pvt->tolm) ||
191 ((page >= 0x100000) && (page < pvt->remapbase))) 190 ((page >= 0x100000) && (page < pvt->remapbase)))
192 return page; 191 return page;
193 192
194 remap = (page - pvt->tolm) + pvt->remapbase; 193 remap = (page - pvt->tolm) + pvt->remapbase;
@@ -200,8 +199,7 @@ static unsigned long ctl_page_to_phys(struct mem_ctl_info *mci,
200 return pvt->tolm - 1; 199 return pvt->tolm - 1;
201} 200}
202 201
203static void process_ce(struct mem_ctl_info *mci, 202static void process_ce(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
204 struct e7xxx_error_info *info)
205{ 203{
206 u32 error_1b, page; 204 u32 error_1b, page;
207 u16 syndrome; 205 u16 syndrome;
@@ -212,7 +210,7 @@ static void process_ce(struct mem_ctl_info *mci,
212 /* read the error address */ 210 /* read the error address */
213 error_1b = info->dram_celog_add; 211 error_1b = info->dram_celog_add;
214 /* FIXME - should use PAGE_SHIFT */ 212 /* FIXME - should use PAGE_SHIFT */
215 page = error_1b >> 6; /* convert the address to 4k page */ 213 page = error_1b >> 6; /* convert the address to 4k page */
216 /* read the syndrome */ 214 /* read the syndrome */
217 syndrome = info->dram_celog_syndrome; 215 syndrome = info->dram_celog_syndrome;
218 /* FIXME - check for -1 */ 216 /* FIXME - check for -1 */
@@ -228,8 +226,7 @@ static void process_ce_no_info(struct mem_ctl_info *mci)
228 edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow"); 226 edac_mc_handle_ce_no_info(mci, "e7xxx CE log register overflow");
229} 227}
230 228
231static void process_ue(struct mem_ctl_info *mci, 229static void process_ue(struct mem_ctl_info *mci, struct e7xxx_error_info *info)
232 struct e7xxx_error_info *info)
233{ 230{
234 u32 error_2b, block_page; 231 u32 error_2b, block_page;
235 int row; 232 int row;
@@ -238,7 +235,7 @@ static void process_ue(struct mem_ctl_info *mci,
238 /* read the error address */ 235 /* read the error address */
239 error_2b = info->dram_uelog_add; 236 error_2b = info->dram_uelog_add;
240 /* FIXME - should use PAGE_SHIFT */ 237 /* FIXME - should use PAGE_SHIFT */
241 block_page = error_2b >> 6; /* convert to 4k address */ 238 block_page = error_2b >> 6; /* convert to 4k address */
242 row = edac_mc_find_csrow_by_page(mci, block_page); 239 row = edac_mc_find_csrow_by_page(mci, block_page);
243 edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE"); 240 edac_mc_handle_ue(mci, block_page, 0, row, "e7xxx UE");
244} 241}
@@ -249,16 +246,14 @@ static void process_ue_no_info(struct mem_ctl_info *mci)
249 edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow"); 246 edac_mc_handle_ue_no_info(mci, "e7xxx UE log register overflow");
250} 247}
251 248
252static void e7xxx_get_error_info (struct mem_ctl_info *mci, 249static void e7xxx_get_error_info(struct mem_ctl_info *mci,
253 struct e7xxx_error_info *info) 250 struct e7xxx_error_info *info)
254{ 251{
255 struct e7xxx_pvt *pvt; 252 struct e7xxx_pvt *pvt;
256 253
257 pvt = (struct e7xxx_pvt *) mci->pvt_info; 254 pvt = (struct e7xxx_pvt *)mci->pvt_info;
258 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_FERR, 255 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_FERR, &info->dram_ferr);
259 &info->dram_ferr); 256 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_NERR, &info->dram_nerr);
260 pci_read_config_byte(pvt->bridge_ck, E7XXX_DRAM_NERR,
261 &info->dram_nerr);
262 257
263 if ((info->dram_ferr & 1) || (info->dram_nerr & 1)) { 258 if ((info->dram_ferr & 1) || (info->dram_nerr & 1)) {
264 pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_CELOG_ADD, 259 pci_read_config_dword(pvt->bridge_ck, E7XXX_DRAM_CELOG_ADD,
@@ -279,8 +274,9 @@ static void e7xxx_get_error_info (struct mem_ctl_info *mci,
279 pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03); 274 pci_write_bits8(pvt->bridge_ck, E7XXX_DRAM_NERR, 0x03, 0x03);
280} 275}
281 276
282static int e7xxx_process_error_info (struct mem_ctl_info *mci, 277static int e7xxx_process_error_info(struct mem_ctl_info *mci,
283 struct e7xxx_error_info *info, int handle_errors) 278 struct e7xxx_error_info *info,
279 int handle_errors)
284{ 280{
285 int error_found; 281 int error_found;
286 282
@@ -341,7 +337,6 @@ static inline int dual_channel_active(u32 drc, int dev_idx)
341 return (dev_idx == E7501) ? ((drc >> 22) & 0x1) : 1; 337 return (dev_idx == E7501) ? ((drc >> 22) & 0x1) : 1;
342} 338}
343 339
344
345/* Return DRB granularity (0=32mb, 1=64mb). */ 340/* Return DRB granularity (0=32mb, 1=64mb). */
346static inline int drb_granularity(u32 drc, int dev_idx) 341static inline int drb_granularity(u32 drc, int dev_idx)
347{ 342{
@@ -349,9 +344,8 @@ static inline int drb_granularity(u32 drc, int dev_idx)
349 return (dev_idx == E7501) ? ((drc >> 18) & 0x3) : 1; 344 return (dev_idx == E7501) ? ((drc >> 18) & 0x3) : 1;
350} 345}
351 346
352
353static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, 347static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
354 int dev_idx, u32 drc) 348 int dev_idx, u32 drc)
355{ 349{
356 unsigned long last_cumul_size; 350 unsigned long last_cumul_size;
357 int index; 351 int index;
@@ -419,10 +413,21 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
419 struct e7xxx_error_info discard; 413 struct e7xxx_error_info discard;
420 414
421 debugf0("%s(): mci\n", __func__); 415 debugf0("%s(): mci\n", __func__);
416
417 /* make sure error reporting method is sane */
418 switch (edac_op_state) {
419 case EDAC_OPSTATE_POLL:
420 case EDAC_OPSTATE_NMI:
421 break;
422 default:
423 edac_op_state = EDAC_OPSTATE_POLL;
424 break;
425 }
426
422 pci_read_config_dword(pdev, E7XXX_DRC, &drc); 427 pci_read_config_dword(pdev, E7XXX_DRC, &drc);
423 428
424 drc_chan = dual_channel_active(drc, dev_idx); 429 drc_chan = dual_channel_active(drc, dev_idx);
425 mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1); 430 mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1, 0);
426 431
427 if (mci == NULL) 432 if (mci == NULL)
428 return -ENOMEM; 433 return -ENOMEM;
@@ -430,17 +435,16 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
430 debugf3("%s(): init mci\n", __func__); 435 debugf3("%s(): init mci\n", __func__);
431 mci->mtype_cap = MEM_FLAG_RDDR; 436 mci->mtype_cap = MEM_FLAG_RDDR;
432 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED | 437 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
433 EDAC_FLAG_S4ECD4ED; 438 EDAC_FLAG_S4ECD4ED;
434 /* FIXME - what if different memory types are in different csrows? */ 439 /* FIXME - what if different memory types are in different csrows? */
435 mci->mod_name = EDAC_MOD_STR; 440 mci->mod_name = EDAC_MOD_STR;
436 mci->mod_ver = E7XXX_REVISION; 441 mci->mod_ver = E7XXX_REVISION;
437 mci->dev = &pdev->dev; 442 mci->dev = &pdev->dev;
438 debugf3("%s(): init pvt\n", __func__); 443 debugf3("%s(): init pvt\n", __func__);
439 pvt = (struct e7xxx_pvt *) mci->pvt_info; 444 pvt = (struct e7xxx_pvt *)mci->pvt_info;
440 pvt->dev_info = &e7xxx_devs[dev_idx]; 445 pvt->dev_info = &e7xxx_devs[dev_idx];
441 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL, 446 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
442 pvt->dev_info->err_dev, 447 pvt->dev_info->err_dev, pvt->bridge_ck);
443 pvt->bridge_ck);
444 448
445 if (!pvt->bridge_ck) { 449 if (!pvt->bridge_ck) {
446 e7xxx_printk(KERN_ERR, "error reporting device not found:" 450 e7xxx_printk(KERN_ERR, "error reporting device not found:"
@@ -451,6 +455,7 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
451 455
452 debugf3("%s(): more mci init\n", __func__); 456 debugf3("%s(): more mci init\n", __func__);
453 mci->ctl_name = pvt->dev_info->ctl_name; 457 mci->ctl_name = pvt->dev_info->ctl_name;
458 mci->dev_name = pci_name(pdev);
454 mci->edac_check = e7xxx_check; 459 mci->edac_check = e7xxx_check;
455 mci->ctl_page_to_phys = ctl_page_to_phys; 460 mci->ctl_page_to_phys = ctl_page_to_phys;
456 e7xxx_init_csrows(mci, pdev, dev_idx, drc); 461 e7xxx_init_csrows(mci, pdev, dev_idx, drc);
@@ -473,11 +478,22 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
473 /* Here we assume that we will never see multiple instances of this 478 /* Here we assume that we will never see multiple instances of this
474 * type of memory controller. The ID is therefore hardcoded to 0. 479 * type of memory controller. The ID is therefore hardcoded to 0.
475 */ 480 */
476 if (edac_mc_add_mc(mci,0)) { 481 if (edac_mc_add_mc(mci)) {
477 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 482 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
478 goto fail1; 483 goto fail1;
479 } 484 }
480 485
486 /* allocating generic PCI control info */
487 e7xxx_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
488 if (!e7xxx_pci) {
489 printk(KERN_WARNING
490 "%s(): Unable to create PCI control\n",
491 __func__);
492 printk(KERN_WARNING
493 "%s(): PCI error report via EDAC not setup\n",
494 __func__);
495 }
496
481 /* get this far and it's successful */ 497 /* get this far and it's successful */
482 debugf3("%s(): success\n", __func__); 498 debugf3("%s(): success\n", __func__);
483 return 0; 499 return 0;
@@ -493,7 +509,7 @@ fail0:
493 509
494/* returns count (>= 0), or negative on error */ 510/* returns count (>= 0), or negative on error */
495static int __devinit e7xxx_init_one(struct pci_dev *pdev, 511static int __devinit e7xxx_init_one(struct pci_dev *pdev,
496 const struct pci_device_id *ent) 512 const struct pci_device_id *ent)
497{ 513{
498 debugf0("%s()\n", __func__); 514 debugf0("%s()\n", __func__);
499 515
@@ -509,34 +525,33 @@ static void __devexit e7xxx_remove_one(struct pci_dev *pdev)
509 525
510 debugf0("%s()\n", __func__); 526 debugf0("%s()\n", __func__);
511 527
528 if (e7xxx_pci)
529 edac_pci_release_generic_ctl(e7xxx_pci);
530
512 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) 531 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
513 return; 532 return;
514 533
515 pvt = (struct e7xxx_pvt *) mci->pvt_info; 534 pvt = (struct e7xxx_pvt *)mci->pvt_info;
516 pci_dev_put(pvt->bridge_ck); 535 pci_dev_put(pvt->bridge_ck);
517 edac_mc_free(mci); 536 edac_mc_free(mci);
518} 537}
519 538
520static const struct pci_device_id e7xxx_pci_tbl[] __devinitdata = { 539static const struct pci_device_id e7xxx_pci_tbl[] __devinitdata = {
521 { 540 {
522 PCI_VEND_DEV(INTEL, 7205_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 541 PCI_VEND_DEV(INTEL, 7205_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
523 E7205 542 E7205},
524 },
525 { 543 {
526 PCI_VEND_DEV(INTEL, 7500_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 544 PCI_VEND_DEV(INTEL, 7500_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
527 E7500 545 E7500},
528 },
529 { 546 {
530 PCI_VEND_DEV(INTEL, 7501_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 547 PCI_VEND_DEV(INTEL, 7501_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
531 E7501 548 E7501},
532 },
533 { 549 {
534 PCI_VEND_DEV(INTEL, 7505_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 550 PCI_VEND_DEV(INTEL, 7505_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
535 E7505 551 E7505},
536 },
537 { 552 {
538 0, 553 0,
539 } /* 0 terminated list. */ 554 } /* 0 terminated list. */
540}; 555};
541 556
542MODULE_DEVICE_TABLE(pci, e7xxx_pci_tbl); 557MODULE_DEVICE_TABLE(pci, e7xxx_pci_tbl);
@@ -563,5 +578,7 @@ module_exit(e7xxx_exit);
563 578
564MODULE_LICENSE("GPL"); 579MODULE_LICENSE("GPL");
565MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n" 580MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
566 "Based on.work by Dan Hollis et al"); 581 "Based on.work by Dan Hollis et al");
567MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers"); 582MODULE_DESCRIPTION("MC support for Intel e7xxx memory controllers");
583module_param(edac_op_state, int, 0444);
584MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
diff --git a/drivers/edac/edac_mc.h b/drivers/edac/edac_core.h
index 713444cc41..4e6bad15c4 100644
--- a/drivers/edac/edac_mc.h
+++ b/drivers/edac/edac_core.h
@@ -1,6 +1,7 @@
1/* 1/*
2 * MC kernel module 2 * Defines, structures, APIs for edac_core module
3 * (C) 2003 Linux Networx (http://lnxi.com) 3 *
4 * (C) 2007 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the 5 * This file may be distributed under the terms of the
5 * GNU General Public License. 6 * GNU General Public License.
6 * 7 *
@@ -11,12 +12,13 @@
11 * NMI handling support added by 12 * NMI handling support added by
12 * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com> 13 * Dave Peterson <dsp@llnl.gov> <dave_peterson@pobox.com>
13 * 14 *
14 * $Id: edac_mc.h,v 1.4.2.10 2005/10/05 00:43:44 dsp_llnl Exp $ 15 * Refactored for multi-source files:
16 * Doug Thompson <norsk5@xmission.com>
15 * 17 *
16 */ 18 */
17 19
18#ifndef _EDAC_MC_H_ 20#ifndef _EDAC_CORE_H_
19#define _EDAC_MC_H_ 21#define _EDAC_CORE_H_
20 22
21#include <linux/kernel.h> 23#include <linux/kernel.h>
22#include <linux/types.h> 24#include <linux/types.h>
@@ -30,9 +32,14 @@
30#include <linux/completion.h> 32#include <linux/completion.h>
31#include <linux/kobject.h> 33#include <linux/kobject.h>
32#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/sysdev.h>
36#include <linux/workqueue.h>
37#include <linux/version.h>
33 38
34#define EDAC_MC_LABEL_LEN 31 39#define EDAC_MC_LABEL_LEN 31
35#define MC_PROC_NAME_MAX_LEN 7 40#define EDAC_DEVICE_NAME_LEN 31
41#define EDAC_ATTRIB_VALUE_LEN 15
42#define MC_PROC_NAME_MAX_LEN 7
36 43
37#if PAGE_SHIFT < 20 44#if PAGE_SHIFT < 20
38#define PAGES_TO_MiB( pages ) ( ( pages ) >> ( 20 - PAGE_SHIFT ) ) 45#define PAGES_TO_MiB( pages ) ( ( pages ) >> ( 20 - PAGE_SHIFT ) )
@@ -49,6 +56,14 @@
49#define edac_mc_chipset_printk(mci, level, prefix, fmt, arg...) \ 56#define edac_mc_chipset_printk(mci, level, prefix, fmt, arg...) \
50 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg) 57 printk(level "EDAC " prefix " MC%d: " fmt, mci->mc_idx, ##arg)
51 58
59/* edac_device printk */
60#define edac_device_printk(ctl, level, fmt, arg...) \
61 printk(level "EDAC DEVICE%d: " fmt, ctl->dev_idx, ##arg)
62
63/* edac_pci printk */
64#define edac_pci_printk(ctl, level, fmt, arg...) \
65 printk(level "EDAC PCI%d: " fmt, ctl->pci_idx, ##arg)
66
52/* prefixes for edac_printk() and edac_mc_printk() */ 67/* prefixes for edac_printk() and edac_mc_printk() */
53#define EDAC_MC "MC" 68#define EDAC_MC "MC"
54#define EDAC_PCI "PCI" 69#define EDAC_PCI "PCI"
@@ -60,7 +75,7 @@ extern int edac_debug_level;
60#define edac_debug_printk(level, fmt, arg...) \ 75#define edac_debug_printk(level, fmt, arg...) \
61 do { \ 76 do { \
62 if (level <= edac_debug_level) \ 77 if (level <= edac_debug_level) \
63 edac_printk(KERN_DEBUG, EDAC_DEBUG, fmt, ##arg); \ 78 edac_printk(KERN_EMERG, EDAC_DEBUG, fmt, ##arg); \
64 } while(0) 79 } while(0)
65 80
66#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ ) 81#define debugf0( ... ) edac_debug_printk(0, __VA_ARGS__ )
@@ -69,7 +84,7 @@ extern int edac_debug_level;
69#define debugf3( ... ) edac_debug_printk(3, __VA_ARGS__ ) 84#define debugf3( ... ) edac_debug_printk(3, __VA_ARGS__ )
70#define debugf4( ... ) edac_debug_printk(4, __VA_ARGS__ ) 85#define debugf4( ... ) edac_debug_printk(4, __VA_ARGS__ )
71 86
72#else /* !CONFIG_EDAC_DEBUG */ 87#else /* !CONFIG_EDAC_DEBUG */
73 88
74#define debugf0( ... ) 89#define debugf0( ... )
75#define debugf1( ... ) 90#define debugf1( ... )
@@ -77,18 +92,14 @@ extern int edac_debug_level;
77#define debugf3( ... ) 92#define debugf3( ... )
78#define debugf4( ... ) 93#define debugf4( ... )
79 94
80#endif /* !CONFIG_EDAC_DEBUG */ 95#endif /* !CONFIG_EDAC_DEBUG */
81 96
82#define BIT(x) (1 << (x)) 97#define BIT(x) (1 << (x))
83 98
84#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \ 99#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
85 PCI_DEVICE_ID_ ## vend ## _ ## dev 100 PCI_DEVICE_ID_ ## vend ## _ ## dev
86 101
87#if defined(CONFIG_X86) && defined(CONFIG_PCI) 102#define dev_name(dev) (dev)->dev_name
88#define dev_name(dev) pci_name(to_pci_dev(dev))
89#else
90#define dev_name(dev) to_platform_device(dev)->name
91#endif
92 103
93/* memory devices */ 104/* memory devices */
94enum dev_type { 105enum dev_type {
@@ -124,8 +135,9 @@ enum mem_type {
124 MEM_DDR, /* Double data rate SDRAM */ 135 MEM_DDR, /* Double data rate SDRAM */
125 MEM_RDDR, /* Registered Double data rate SDRAM */ 136 MEM_RDDR, /* Registered Double data rate SDRAM */
126 MEM_RMBS, /* Rambus DRAM */ 137 MEM_RMBS, /* Rambus DRAM */
127 MEM_DDR2, /* DDR2 RAM */ 138 MEM_DDR2, /* DDR2 RAM */
128 MEM_FB_DDR2, /* fully buffered DDR2 */ 139 MEM_FB_DDR2, /* fully buffered DDR2 */
140 MEM_RDDR2, /* Registered DDR2 RAM */
129}; 141};
130 142
131#define MEM_FLAG_EMPTY BIT(MEM_EMPTY) 143#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
@@ -141,6 +153,7 @@ enum mem_type {
141#define MEM_FLAG_RMBS BIT(MEM_RMBS) 153#define MEM_FLAG_RMBS BIT(MEM_RMBS)
142#define MEM_FLAG_DDR2 BIT(MEM_DDR2) 154#define MEM_FLAG_DDR2 BIT(MEM_DDR2)
143#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2) 155#define MEM_FLAG_FB_DDR2 BIT(MEM_FB_DDR2)
156#define MEM_FLAG_RDDR2 BIT(MEM_RDDR2)
144 157
145/* chipset Error Detection and Correction capabilities and mode */ 158/* chipset Error Detection and Correction capabilities and mode */
146enum edac_type { 159enum edac_type {
@@ -181,16 +194,23 @@ enum scrub_type {
181}; 194};
182 195
183#define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG) 196#define SCRUB_FLAG_SW_PROG BIT(SCRUB_SW_PROG)
184#define SCRUB_FLAG_SW_SRC BIT(SCRUB_SW_SRC_CORR) 197#define SCRUB_FLAG_SW_SRC BIT(SCRUB_SW_SRC)
185#define SCRUB_FLAG_SW_PROG_SRC BIT(SCRUB_SW_PROG_SRC_CORR) 198#define SCRUB_FLAG_SW_PROG_SRC BIT(SCRUB_SW_PROG_SRC)
186#define SCRUB_FLAG_SW_TUN BIT(SCRUB_SW_SCRUB_TUNABLE) 199#define SCRUB_FLAG_SW_TUN BIT(SCRUB_SW_SCRUB_TUNABLE)
187#define SCRUB_FLAG_HW_PROG BIT(SCRUB_HW_PROG) 200#define SCRUB_FLAG_HW_PROG BIT(SCRUB_HW_PROG)
188#define SCRUB_FLAG_HW_SRC BIT(SCRUB_HW_SRC_CORR) 201#define SCRUB_FLAG_HW_SRC BIT(SCRUB_HW_SRC)
189#define SCRUB_FLAG_HW_PROG_SRC BIT(SCRUB_HW_PROG_SRC_CORR) 202#define SCRUB_FLAG_HW_PROG_SRC BIT(SCRUB_HW_PROG_SRC)
190#define SCRUB_FLAG_HW_TUN BIT(SCRUB_HW_TUNABLE) 203#define SCRUB_FLAG_HW_TUN BIT(SCRUB_HW_TUNABLE)
191 204
192/* FIXME - should have notify capabilities: NMI, LOG, PROC, etc */ 205/* FIXME - should have notify capabilities: NMI, LOG, PROC, etc */
193 206
207/* EDAC internal operation states */
208#define OP_ALLOC 0x100
209#define OP_RUNNING_POLL 0x201
210#define OP_RUNNING_INTERRUPT 0x202
211#define OP_RUNNING_POLL_INTR 0x203
212#define OP_OFFLINE 0x300
213
194/* 214/*
195 * There are several things to be aware of that aren't at all obvious: 215 * There are several things to be aware of that aren't at all obvious:
196 * 216 *
@@ -276,7 +296,7 @@ enum scrub_type {
276struct channel_info { 296struct channel_info {
277 int chan_idx; /* channel index */ 297 int chan_idx; /* channel index */
278 u32 ce_count; /* Correctable Errors for this CHANNEL */ 298 u32 ce_count; /* Correctable Errors for this CHANNEL */
279 char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */ 299 char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */
280 struct csrow_info *csrow; /* the parent */ 300 struct csrow_info *csrow; /* the parent */
281}; 301};
282 302
@@ -297,15 +317,29 @@ struct csrow_info {
297 struct mem_ctl_info *mci; /* the parent */ 317 struct mem_ctl_info *mci; /* the parent */
298 318
299 struct kobject kobj; /* sysfs kobject for this csrow */ 319 struct kobject kobj; /* sysfs kobject for this csrow */
300 struct completion kobj_complete;
301 320
302 /* FIXME the number of CHANNELs might need to become dynamic */ 321 /* channel information for this csrow */
303 u32 nr_channels; 322 u32 nr_channels;
304 struct channel_info *channels; 323 struct channel_info *channels;
305}; 324};
306 325
326/* mcidev_sysfs_attribute structure
327 * used for driver sysfs attributes and in mem_ctl_info
328 * sysfs top level entries
329 */
330struct mcidev_sysfs_attribute {
331 struct attribute attr;
332 ssize_t (*show)(struct mem_ctl_info *,char *);
333 ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
334};
335
336/* MEMORY controller information structure
337 */
307struct mem_ctl_info { 338struct mem_ctl_info {
308 struct list_head link; /* for global list of mem_ctl_info structs */ 339 struct list_head link; /* for global list of mem_ctl_info structs */
340
341 struct module *owner; /* Module owner of this control struct */
342
309 unsigned long mtype_cap; /* memory types supported by mc */ 343 unsigned long mtype_cap; /* memory types supported by mc */
310 unsigned long edac_ctl_cap; /* Mem controller EDAC capabilities */ 344 unsigned long edac_ctl_cap; /* Mem controller EDAC capabilities */
311 unsigned long edac_cap; /* configuration capabilities - this is 345 unsigned long edac_cap; /* configuration capabilities - this is
@@ -322,14 +356,15 @@ struct mem_ctl_info {
322 /* Translates sdram memory scrub rate given in bytes/sec to the 356 /* Translates sdram memory scrub rate given in bytes/sec to the
323 internal representation and configures whatever else needs 357 internal representation and configures whatever else needs
324 to be configured. 358 to be configured.
325 */ 359 */
326 int (*set_sdram_scrub_rate) (struct mem_ctl_info *mci, u32 *bw); 360 int (*set_sdram_scrub_rate) (struct mem_ctl_info * mci, u32 * bw);
327 361
328 /* Get the current sdram memory scrub rate from the internal 362 /* Get the current sdram memory scrub rate from the internal
329 representation and converts it to the closest matching 363 representation and converts it to the closest matching
330 bandwith in bytes/sec. 364 bandwith in bytes/sec.
331 */ 365 */
332 int (*get_sdram_scrub_rate) (struct mem_ctl_info *mci, u32 *bw); 366 int (*get_sdram_scrub_rate) (struct mem_ctl_info * mci, u32 * bw);
367
333 368
334 /* pointer to edac checking routine */ 369 /* pointer to edac checking routine */
335 void (*edac_check) (struct mem_ctl_info * mci); 370 void (*edac_check) (struct mem_ctl_info * mci);
@@ -340,7 +375,7 @@ struct mem_ctl_info {
340 */ 375 */
341 /* FIXME - why not send the phys page to begin with? */ 376 /* FIXME - why not send the phys page to begin with? */
342 unsigned long (*ctl_page_to_phys) (struct mem_ctl_info * mci, 377 unsigned long (*ctl_page_to_phys) (struct mem_ctl_info * mci,
343 unsigned long page); 378 unsigned long page);
344 int mc_idx; 379 int mc_idx;
345 int nr_csrows; 380 int nr_csrows;
346 struct csrow_info *csrows; 381 struct csrow_info *csrows;
@@ -353,6 +388,7 @@ struct mem_ctl_info {
353 const char *mod_name; 388 const char *mod_name;
354 const char *mod_ver; 389 const char *mod_ver;
355 const char *ctl_name; 390 const char *ctl_name;
391 const char *dev_name;
356 char proc_name[MC_PROC_NAME_MAX_LEN + 1]; 392 char proc_name[MC_PROC_NAME_MAX_LEN + 1];
357 void *pvt_info; 393 void *pvt_info;
358 u32 ue_noinfo_count; /* Uncorrectable Errors w/o info */ 394 u32 ue_noinfo_count; /* Uncorrectable Errors w/o info */
@@ -369,14 +405,327 @@ struct mem_ctl_info {
369 405
370 /* edac sysfs device control */ 406 /* edac sysfs device control */
371 struct kobject edac_mci_kobj; 407 struct kobject edac_mci_kobj;
372 struct completion kobj_complete; 408
409 /* Additional top controller level attributes, but specified
410 * by the low level driver.
411 *
412 * Set by the low level driver to provide attributes at the
413 * controller level, same level as 'ue_count' and 'ce_count' above.
414 * An array of structures, NULL terminated
415 *
416 * If attributes are desired, then set to array of attributes
417 * If no attributes are desired, leave NULL
418 */
419 struct mcidev_sysfs_attribute *mc_driver_sysfs_attributes;
420
421 /* work struct for this MC */
422 struct delayed_work work;
423
424 /* the internal state of this controller instance */
425 int op_state;
426};
427
428/*
429 * The following are the structures to provide for a generic
430 * or abstract 'edac_device'. This set of structures and the
431 * code that implements the APIs for the same, provide for
432 * registering EDAC type devices which are NOT standard memory.
433 *
434 * CPU caches (L1 and L2)
435 * DMA engines
436 * Core CPU swithces
437 * Fabric switch units
438 * PCIe interface controllers
439 * other EDAC/ECC type devices that can be monitored for
440 * errors, etc.
441 *
442 * It allows for a 2 level set of hiearchry. For example:
443 *
444 * cache could be composed of L1, L2 and L3 levels of cache.
445 * Each CPU core would have its own L1 cache, while sharing
446 * L2 and maybe L3 caches.
447 *
448 * View them arranged, via the sysfs presentation:
449 * /sys/devices/system/edac/..
450 *
451 * mc/ <existing memory device directory>
452 * cpu/cpu0/.. <L1 and L2 block directory>
453 * /L1-cache/ce_count
454 * /ue_count
455 * /L2-cache/ce_count
456 * /ue_count
457 * cpu/cpu1/.. <L1 and L2 block directory>
458 * /L1-cache/ce_count
459 * /ue_count
460 * /L2-cache/ce_count
461 * /ue_count
462 * ...
463 *
464 * the L1 and L2 directories would be "edac_device_block's"
465 */
466
467struct edac_device_counter {
468 u32 ue_count;
469 u32 ce_count;
470};
471
472/* forward reference */
473struct edac_device_ctl_info;
474struct edac_device_block;
475
476/* edac_dev_sysfs_attribute structure
477 * used for driver sysfs attributes in mem_ctl_info
478 * for extra controls and attributes:
479 * like high level error Injection controls
480 */
481struct edac_dev_sysfs_attribute {
482 struct attribute attr;
483 ssize_t (*show)(struct edac_device_ctl_info *, char *);
484 ssize_t (*store)(struct edac_device_ctl_info *, const char *, size_t);
485};
486
487/* edac_dev_sysfs_block_attribute structure
488 *
489 * used in leaf 'block' nodes for adding controls/attributes
490 *
491 * each block in each instance of the containing control structure
492 * can have an array of the following. The show and store functions
493 * will be filled in with the show/store function in the
494 * low level driver.
495 *
496 * The 'value' field will be the actual value field used for
497 * counting
498 */
499struct edac_dev_sysfs_block_attribute {
500 struct attribute attr;
501 ssize_t (*show)(struct kobject *, struct attribute *, char *);
502 ssize_t (*store)(struct kobject *, struct attribute *,
503 const char *, size_t);
504 struct edac_device_block *block;
505
506 unsigned int value;
507};
508
509/* device block control structure */
510struct edac_device_block {
511 struct edac_device_instance *instance; /* Up Pointer */
512 char name[EDAC_DEVICE_NAME_LEN + 1];
513
514 struct edac_device_counter counters; /* basic UE and CE counters */
515
516 int nr_attribs; /* how many attributes */
517
518 /* this block's attributes, could be NULL */
519 struct edac_dev_sysfs_block_attribute *block_attributes;
520
521 /* edac sysfs device control */
522 struct kobject kobj;
523};
524
525/* device instance control structure */
526struct edac_device_instance {
527 struct edac_device_ctl_info *ctl; /* Up pointer */
528 char name[EDAC_DEVICE_NAME_LEN + 4];
529
530 struct edac_device_counter counters; /* instance counters */
531
532 u32 nr_blocks; /* how many blocks */
533 struct edac_device_block *blocks; /* block array */
534
535 /* edac sysfs device control */
536 struct kobject kobj;
537};
538
539
540/*
541 * Abstract edac_device control info structure
542 *
543 */
544struct edac_device_ctl_info {
545 /* for global list of edac_device_ctl_info structs */
546 struct list_head link;
547
548 struct module *owner; /* Module owner of this control struct */
549
550 int dev_idx;
551
552 /* Per instance controls for this edac_device */
553 int log_ue; /* boolean for logging UEs */
554 int log_ce; /* boolean for logging CEs */
555 int panic_on_ue; /* boolean for panic'ing on an UE */
556 unsigned poll_msec; /* number of milliseconds to poll interval */
557 unsigned long delay; /* number of jiffies for poll_msec */
558
559 /* Additional top controller level attributes, but specified
560 * by the low level driver.
561 *
562 * Set by the low level driver to provide attributes at the
563 * controller level, same level as 'ue_count' and 'ce_count' above.
564 * An array of structures, NULL terminated
565 *
566 * If attributes are desired, then set to array of attributes
567 * If no attributes are desired, leave NULL
568 */
569 struct edac_dev_sysfs_attribute *sysfs_attributes;
570
571 /* pointer to main 'edac' class in sysfs */
572 struct sysdev_class *edac_class;
573
574 /* the internal state of this controller instance */
575 int op_state;
576 /* work struct for this instance */
577 struct delayed_work work;
578
579 /* pointer to edac polling checking routine:
580 * If NOT NULL: points to polling check routine
581 * If NULL: Then assumes INTERRUPT operation, where
582 * MC driver will receive events
583 */
584 void (*edac_check) (struct edac_device_ctl_info * edac_dev);
585
586 struct device *dev; /* pointer to device structure */
587
588 const char *mod_name; /* module name */
589 const char *ctl_name; /* edac controller name */
590 const char *dev_name; /* pci/platform/etc... name */
591
592 void *pvt_info; /* pointer to 'private driver' info */
593
594 unsigned long start_time; /* edac_device load start time (jiffies) */
595
596 /* these are for safe removal of mc devices from global list while
597 * NMI handlers may be traversing list
598 */
599 struct rcu_head rcu;
600 struct completion removal_complete;
601
602 /* sysfs top name under 'edac' directory
603 * and instance name:
604 * cpu/cpu0/...
605 * cpu/cpu1/...
606 * cpu/cpu2/...
607 * ...
608 */
609 char name[EDAC_DEVICE_NAME_LEN + 1];
610
611 /* Number of instances supported on this control structure
612 * and the array of those instances
613 */
614 u32 nr_instances;
615 struct edac_device_instance *instances;
616
617 /* Event counters for the this whole EDAC Device */
618 struct edac_device_counter counters;
619
620 /* edac sysfs device control for the 'name'
621 * device this structure controls
622 */
623 struct kobject kobj;
373}; 624};
374 625
626/* To get from the instance's wq to the beginning of the ctl structure */
627#define to_edac_mem_ctl_work(w) \
628 container_of(w, struct mem_ctl_info, work)
629
630#define to_edac_device_ctl_work(w) \
631 container_of(w,struct edac_device_ctl_info,work)
632
633/*
634 * The alloc() and free() functions for the 'edac_device' control info
635 * structure. A MC driver will allocate one of these for each edac_device
636 * it is going to control/register with the EDAC CORE.
637 */
638extern struct edac_device_ctl_info *edac_device_alloc_ctl_info(
639 unsigned sizeof_private,
640 char *edac_device_name, unsigned nr_instances,
641 char *edac_block_name, unsigned nr_blocks,
642 unsigned offset_value,
643 struct edac_dev_sysfs_block_attribute *block_attributes,
644 unsigned nr_attribs,
645 int device_index);
646
647/* The offset value can be:
648 * -1 indicating no offset value
649 * 0 for zero-based block numbers
650 * 1 for 1-based block number
651 * other for other-based block number
652 */
653#define BLOCK_OFFSET_VALUE_OFF ((unsigned) -1)
654
655extern void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info);
656
375#ifdef CONFIG_PCI 657#ifdef CONFIG_PCI
376 658
659struct edac_pci_counter {
660 atomic_t pe_count;
661 atomic_t npe_count;
662};
663
664/*
665 * Abstract edac_pci control info structure
666 *
667 */
668struct edac_pci_ctl_info {
669 /* for global list of edac_pci_ctl_info structs */
670 struct list_head link;
671
672 int pci_idx;
673
674 struct sysdev_class *edac_class; /* pointer to class */
675
676 /* the internal state of this controller instance */
677 int op_state;
678 /* work struct for this instance */
679 struct delayed_work work;
680
681 /* pointer to edac polling checking routine:
682 * If NOT NULL: points to polling check routine
683 * If NULL: Then assumes INTERRUPT operation, where
684 * MC driver will receive events
685 */
686 void (*edac_check) (struct edac_pci_ctl_info * edac_dev);
687
688 struct device *dev; /* pointer to device structure */
689
690 const char *mod_name; /* module name */
691 const char *ctl_name; /* edac controller name */
692 const char *dev_name; /* pci/platform/etc... name */
693
694 void *pvt_info; /* pointer to 'private driver' info */
695
696 unsigned long start_time; /* edac_pci load start time (jiffies) */
697
698 /* these are for safe removal of devices from global list while
699 * NMI handlers may be traversing list
700 */
701 struct rcu_head rcu;
702 struct completion complete;
703
704 /* sysfs top name under 'edac' directory
705 * and instance name:
706 * cpu/cpu0/...
707 * cpu/cpu1/...
708 * cpu/cpu2/...
709 * ...
710 */
711 char name[EDAC_DEVICE_NAME_LEN + 1];
712
713 /* Event counters for the this whole EDAC Device */
714 struct edac_pci_counter counters;
715
716 /* edac sysfs device control for the 'name'
717 * device this structure controls
718 */
719 struct kobject kobj;
720 struct completion kobj_complete;
721};
722
723#define to_edac_pci_ctl_work(w) \
724 container_of(w, struct edac_pci_ctl_info,work)
725
377/* write all or some bits in a byte-register*/ 726/* write all or some bits in a byte-register*/
378static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value, 727static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
379 u8 mask) 728 u8 mask)
380{ 729{
381 if (mask != 0xff) { 730 if (mask != 0xff) {
382 u8 buf; 731 u8 buf;
@@ -392,7 +741,7 @@ static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
392 741
393/* write all or some bits in a word-register*/ 742/* write all or some bits in a word-register*/
394static inline void pci_write_bits16(struct pci_dev *pdev, int offset, 743static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
395 u16 value, u16 mask) 744 u16 value, u16 mask)
396{ 745{
397 if (mask != 0xffff) { 746 if (mask != 0xffff) {
398 u16 buf; 747 u16 buf;
@@ -408,7 +757,7 @@ static inline void pci_write_bits16(struct pci_dev *pdev, int offset,
408 757
409/* write all or some bits in a dword-register*/ 758/* write all or some bits in a dword-register*/
410static inline void pci_write_bits32(struct pci_dev *pdev, int offset, 759static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
411 u32 value, u32 mask) 760 u32 value, u32 mask)
412{ 761{
413 if (mask != 0xffff) { 762 if (mask != 0xffff) {
414 u32 buf; 763 u32 buf;
@@ -422,20 +771,16 @@ static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
422 pci_write_config_dword(pdev, offset, value); 771 pci_write_config_dword(pdev, offset, value);
423} 772}
424 773
425#endif /* CONFIG_PCI */ 774#endif /* CONFIG_PCI */
426 775
427#ifdef CONFIG_EDAC_DEBUG 776extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
428void edac_mc_dump_channel(struct channel_info *chan); 777 unsigned nr_chans, int edac_index);
429void edac_mc_dump_mci(struct mem_ctl_info *mci); 778extern int edac_mc_add_mc(struct mem_ctl_info *mci);
430void edac_mc_dump_csrow(struct csrow_info *csrow); 779extern void edac_mc_free(struct mem_ctl_info *mci);
431#endif /* CONFIG_EDAC_DEBUG */ 780extern struct mem_ctl_info *edac_mc_find(int idx);
432 781extern struct mem_ctl_info *edac_mc_del_mc(struct device *dev);
433extern int edac_mc_add_mc(struct mem_ctl_info *mci,int mc_idx);
434extern struct mem_ctl_info * edac_mc_del_mc(struct device *dev);
435extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, 782extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
436 unsigned long page); 783 unsigned long page);
437extern void edac_mc_scrub_block(unsigned long page, unsigned long offset,
438 u32 size);
439 784
440/* 785/*
441 * The no info errors are used when error overflows are reported. 786 * The no info errors are used when error overflows are reported.
@@ -448,34 +793,59 @@ extern void edac_mc_scrub_block(unsigned long page, unsigned long offset,
448 * statement clutter and extra function arguments. 793 * statement clutter and extra function arguments.
449 */ 794 */
450extern void edac_mc_handle_ce(struct mem_ctl_info *mci, 795extern void edac_mc_handle_ce(struct mem_ctl_info *mci,
451 unsigned long page_frame_number, unsigned long offset_in_page, 796 unsigned long page_frame_number,
452 unsigned long syndrome, int row, int channel, 797 unsigned long offset_in_page,
453 const char *msg); 798 unsigned long syndrome, int row, int channel,
799 const char *msg);
454extern void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, 800extern void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci,
455 const char *msg); 801 const char *msg);
456extern void edac_mc_handle_ue(struct mem_ctl_info *mci, 802extern void edac_mc_handle_ue(struct mem_ctl_info *mci,
457 unsigned long page_frame_number, unsigned long offset_in_page, 803 unsigned long page_frame_number,
458 int row, const char *msg); 804 unsigned long offset_in_page, int row,
805 const char *msg);
459extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, 806extern void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci,
460 const char *msg); 807 const char *msg);
461extern void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, 808extern void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, unsigned int csrow,
462 unsigned int csrow, 809 unsigned int channel0, unsigned int channel1,
463 unsigned int channel0, 810 char *msg);
464 unsigned int channel1, 811extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, unsigned int csrow,
465 char *msg); 812 unsigned int channel, char *msg);
466extern void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci,
467 unsigned int csrow,
468 unsigned int channel,
469 char *msg);
470 813
471/* 814/*
472 * This kmalloc's and initializes all the structures. 815 * edac_device APIs
473 * Can't be used if all structures don't have the same lifetime.
474 */ 816 */
475extern struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, 817extern int edac_device_add_device(struct edac_device_ctl_info *edac_dev);
476 unsigned nr_chans); 818extern struct edac_device_ctl_info *edac_device_del_device(struct device *dev);
819extern void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,
820 int inst_nr, int block_nr, const char *msg);
821extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
822 int inst_nr, int block_nr, const char *msg);
477 823
478/* Free an mc previously allocated by edac_mc_alloc() */ 824/*
479extern void edac_mc_free(struct mem_ctl_info *mci); 825 * edac_pci APIs
826 */
827extern struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
828 const char *edac_pci_name);
829
830extern void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci);
831
832extern void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
833 unsigned long value);
834
835extern int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx);
836extern struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev);
837
838extern struct edac_pci_ctl_info *edac_pci_create_generic_ctl(
839 struct device *dev,
840 const char *mod_name);
841
842extern void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci);
843extern int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci);
844extern void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci);
845
846/*
847 * edac misc APIs
848 */
849extern char *edac_op_state_to_string(int op_state);
480 850
481#endif /* _EDAC_MC_H_ */ 851#endif /* _EDAC_CORE_H_ */
diff --git a/drivers/edac/edac_device.c b/drivers/edac/edac_device.c
new file mode 100644
index 0000000000..f3690a697c
--- /dev/null
+++ b/drivers/edac/edac_device.c
@@ -0,0 +1,746 @@
1
2/*
3 * edac_device.c
4 * (C) 2007 www.douglaskthompson.com
5 *
6 * This file may be distributed under the terms of the
7 * GNU General Public License.
8 *
9 * Written by Doug Thompson <norsk5@xmission.com>
10 *
11 * edac_device API implementation
12 * 19 Jan 2007
13 */
14
15#include <linux/module.h>
16#include <linux/types.h>
17#include <linux/smp.h>
18#include <linux/init.h>
19#include <linux/sysctl.h>
20#include <linux/highmem.h>
21#include <linux/timer.h>
22#include <linux/slab.h>
23#include <linux/jiffies.h>
24#include <linux/spinlock.h>
25#include <linux/list.h>
26#include <linux/sysdev.h>
27#include <linux/ctype.h>
28#include <linux/workqueue.h>
29#include <asm/uaccess.h>
30#include <asm/page.h>
31
32#include "edac_core.h"
33#include "edac_module.h"
34
35/* lock for the list: 'edac_device_list', manipulation of this list
36 * is protected by the 'device_ctls_mutex' lock
37 */
38static DEFINE_MUTEX(device_ctls_mutex);
39static struct list_head edac_device_list = LIST_HEAD_INIT(edac_device_list);
40
41#ifdef CONFIG_EDAC_DEBUG
42static void edac_device_dump_device(struct edac_device_ctl_info *edac_dev)
43{
44 debugf3("\tedac_dev = %p dev_idx=%d \n", edac_dev, edac_dev->dev_idx);
45 debugf4("\tedac_dev->edac_check = %p\n", edac_dev->edac_check);
46 debugf3("\tdev = %p\n", edac_dev->dev);
47 debugf3("\tmod_name:ctl_name = %s:%s\n",
48 edac_dev->mod_name, edac_dev->ctl_name);
49 debugf3("\tpvt_info = %p\n\n", edac_dev->pvt_info);
50}
51#endif /* CONFIG_EDAC_DEBUG */
52
53
54/*
55 * edac_device_alloc_ctl_info()
56 * Allocate a new edac device control info structure
57 *
58 * The control structure is allocated in complete chunk
59 * from the OS. It is in turn sub allocated to the
60 * various objects that compose the struture
61 *
62 * The structure has a 'nr_instance' array within itself.
63 * Each instance represents a major component
64 * Example: L1 cache and L2 cache are 2 instance components
65 *
66 * Within each instance is an array of 'nr_blocks' blockoffsets
67 */
68struct edac_device_ctl_info *edac_device_alloc_ctl_info(
69 unsigned sz_private,
70 char *edac_device_name, unsigned nr_instances,
71 char *edac_block_name, unsigned nr_blocks,
72 unsigned offset_value, /* zero, 1, or other based offset */
73 struct edac_dev_sysfs_block_attribute *attrib_spec, unsigned nr_attrib,
74 int device_index)
75{
76 struct edac_device_ctl_info *dev_ctl;
77 struct edac_device_instance *dev_inst, *inst;
78 struct edac_device_block *dev_blk, *blk_p, *blk;
79 struct edac_dev_sysfs_block_attribute *dev_attrib, *attrib_p, *attrib;
80 unsigned total_size;
81 unsigned count;
82 unsigned instance, block, attr;
83 void *pvt;
84 int err;
85
86 debugf4("%s() instances=%d blocks=%d\n",
87 __func__, nr_instances, nr_blocks);
88
89 /* Calculate the size of memory we need to allocate AND
90 * determine the offsets of the various item arrays
91 * (instance,block,attrib) from the start of an allocated structure.
92 * We want the alignment of each item (instance,block,attrib)
93 * to be at least as stringent as what the compiler would
94 * provide if we could simply hardcode everything into a single struct.
95 */
96 dev_ctl = (struct edac_device_ctl_info *)NULL;
97
98 /* Calc the 'end' offset past end of ONE ctl_info structure
99 * which will become the start of the 'instance' array
100 */
101 dev_inst = edac_align_ptr(&dev_ctl[1], sizeof(*dev_inst));
102
103 /* Calc the 'end' offset past the instance array within the ctl_info
104 * which will become the start of the block array
105 */
106 dev_blk = edac_align_ptr(&dev_inst[nr_instances], sizeof(*dev_blk));
107
108 /* Calc the 'end' offset past the dev_blk array
109 * which will become the start of the attrib array, if any.
110 */
111 count = nr_instances * nr_blocks;
112 dev_attrib = edac_align_ptr(&dev_blk[count], sizeof(*dev_attrib));
113
114 /* Check for case of when an attribute array is specified */
115 if (nr_attrib > 0) {
116 /* calc how many nr_attrib we need */
117 count *= nr_attrib;
118
119 /* Calc the 'end' offset past the attributes array */
120 pvt = edac_align_ptr(&dev_attrib[count], sz_private);
121 } else {
122 /* no attribute array specificed */
123 pvt = edac_align_ptr(dev_attrib, sz_private);
124 }
125
126 /* 'pvt' now points to where the private data area is.
127 * At this point 'pvt' (like dev_inst,dev_blk and dev_attrib)
128 * is baselined at ZERO
129 */
130 total_size = ((unsigned long)pvt) + sz_private;
131
132 /* Allocate the amount of memory for the set of control structures */
133 dev_ctl = kzalloc(total_size, GFP_KERNEL);
134 if (dev_ctl == NULL)
135 return NULL;
136
137 /* Adjust pointers so they point within the actual memory we
138 * just allocated rather than an imaginary chunk of memory
139 * located at address 0.
140 * 'dev_ctl' points to REAL memory, while the others are
141 * ZERO based and thus need to be adjusted to point within
142 * the allocated memory.
143 */
144 dev_inst = (struct edac_device_instance *)
145 (((char *)dev_ctl) + ((unsigned long)dev_inst));
146 dev_blk = (struct edac_device_block *)
147 (((char *)dev_ctl) + ((unsigned long)dev_blk));
148 dev_attrib = (struct edac_dev_sysfs_block_attribute *)
149 (((char *)dev_ctl) + ((unsigned long)dev_attrib));
150 pvt = sz_private ? (((char *)dev_ctl) + ((unsigned long)pvt)) : NULL;
151
152 /* Begin storing the information into the control info structure */
153 dev_ctl->dev_idx = device_index;
154 dev_ctl->nr_instances = nr_instances;
155 dev_ctl->instances = dev_inst;
156 dev_ctl->pvt_info = pvt;
157
158 /* Name of this edac device */
159 snprintf(dev_ctl->name,sizeof(dev_ctl->name),"%s",edac_device_name);
160
161 debugf4("%s() edac_dev=%p next after end=%p\n",
162 __func__, dev_ctl, pvt + sz_private );
163
164 /* Initialize every Instance */
165 for (instance = 0; instance < nr_instances; instance++) {
166 inst = &dev_inst[instance];
167 inst->ctl = dev_ctl;
168 inst->nr_blocks = nr_blocks;
169 blk_p = &dev_blk[instance * nr_blocks];
170 inst->blocks = blk_p;
171
172 /* name of this instance */
173 snprintf(inst->name, sizeof(inst->name),
174 "%s%u", edac_device_name, instance);
175
176 /* Initialize every block in each instance */
177 for (block = 0; block < nr_blocks; block++) {
178 blk = &blk_p[block];
179 blk->instance = inst;
180 snprintf(blk->name, sizeof(blk->name),
181 "%s%d", edac_block_name, block+offset_value);
182
183 debugf4("%s() instance=%d inst_p=%p block=#%d "
184 "block_p=%p name='%s'\n",
185 __func__, instance, inst, block,
186 blk, blk->name);
187
188 /* if there are NO attributes OR no attribute pointer
189 * then continue on to next block iteration
190 */
191 if ((nr_attrib == 0) || (attrib_spec == NULL))
192 continue;
193
194 /* setup the attribute array for this block */
195 blk->nr_attribs = nr_attrib;
196 attrib_p = &dev_attrib[block*nr_instances*nr_attrib];
197 blk->block_attributes = attrib_p;
198
199 debugf4("%s() THIS BLOCK_ATTRIB=%p\n",
200 __func__, blk->block_attributes);
201
202 /* Initialize every user specified attribute in this
203 * block with the data the caller passed in
204 * Each block gets its own copy of pointers,
205 * and its unique 'value'
206 */
207 for (attr = 0; attr < nr_attrib; attr++) {
208 attrib = &attrib_p[attr];
209
210 /* populate the unique per attrib
211 * with the code pointers and info
212 */
213 attrib->attr = attrib_spec[attr].attr;
214 attrib->show = attrib_spec[attr].show;
215 attrib->store = attrib_spec[attr].store;
216
217 attrib->block = blk; /* up link */
218
219 debugf4("%s() alloc-attrib=%p attrib_name='%s' "
220 "attrib-spec=%p spec-name=%s\n",
221 __func__, attrib, attrib->attr.name,
222 &attrib_spec[attr],
223 attrib_spec[attr].attr.name
224 );
225 }
226 }
227 }
228
229 /* Mark this instance as merely ALLOCATED */
230 dev_ctl->op_state = OP_ALLOC;
231
232 /*
233 * Initialize the 'root' kobj for the edac_device controller
234 */
235 err = edac_device_register_sysfs_main_kobj(dev_ctl);
236 if (err) {
237 kfree(dev_ctl);
238 return NULL;
239 }
240
241 /* at this point, the root kobj is valid, and in order to
242 * 'free' the object, then the function:
243 * edac_device_unregister_sysfs_main_kobj() must be called
244 * which will perform kobj unregistration and the actual free
245 * will occur during the kobject callback operation
246 */
247
248 return dev_ctl;
249}
250EXPORT_SYMBOL_GPL(edac_device_alloc_ctl_info);
251
252/*
253 * edac_device_free_ctl_info()
254 * frees the memory allocated by the edac_device_alloc_ctl_info()
255 * function
256 */
257void edac_device_free_ctl_info(struct edac_device_ctl_info *ctl_info)
258{
259 edac_device_unregister_sysfs_main_kobj(ctl_info);
260}
261EXPORT_SYMBOL_GPL(edac_device_free_ctl_info);
262
263/*
264 * find_edac_device_by_dev
265 * scans the edac_device list for a specific 'struct device *'
266 *
267 * lock to be held prior to call: device_ctls_mutex
268 *
269 * Return:
270 * pointer to control structure managing 'dev'
271 * NULL if not found on list
272 */
273static struct edac_device_ctl_info *find_edac_device_by_dev(struct device *dev)
274{
275 struct edac_device_ctl_info *edac_dev;
276 struct list_head *item;
277
278 debugf0("%s()\n", __func__);
279
280 list_for_each(item, &edac_device_list) {
281 edac_dev = list_entry(item, struct edac_device_ctl_info, link);
282
283 if (edac_dev->dev == dev)
284 return edac_dev;
285 }
286
287 return NULL;
288}
289
290/*
291 * add_edac_dev_to_global_list
292 * Before calling this function, caller must
293 * assign a unique value to edac_dev->dev_idx.
294 *
295 * lock to be held prior to call: device_ctls_mutex
296 *
297 * Return:
298 * 0 on success
299 * 1 on failure.
300 */
301static int add_edac_dev_to_global_list(struct edac_device_ctl_info *edac_dev)
302{
303 struct list_head *item, *insert_before;
304 struct edac_device_ctl_info *rover;
305
306 insert_before = &edac_device_list;
307
308 /* Determine if already on the list */
309 rover = find_edac_device_by_dev(edac_dev->dev);
310 if (unlikely(rover != NULL))
311 goto fail0;
312
313 /* Insert in ascending order by 'dev_idx', so find position */
314 list_for_each(item, &edac_device_list) {
315 rover = list_entry(item, struct edac_device_ctl_info, link);
316
317 if (rover->dev_idx >= edac_dev->dev_idx) {
318 if (unlikely(rover->dev_idx == edac_dev->dev_idx))
319 goto fail1;
320
321 insert_before = item;
322 break;
323 }
324 }
325
326 list_add_tail_rcu(&edac_dev->link, insert_before);
327 return 0;
328
329fail0:
330 edac_printk(KERN_WARNING, EDAC_MC,
331 "%s (%s) %s %s already assigned %d\n",
332 rover->dev->bus_id, dev_name(rover),
333 rover->mod_name, rover->ctl_name, rover->dev_idx);
334 return 1;
335
336fail1:
337 edac_printk(KERN_WARNING, EDAC_MC,
338 "bug in low-level driver: attempt to assign\n"
339 " duplicate dev_idx %d in %s()\n", rover->dev_idx,
340 __func__);
341 return 1;
342}
343
344/*
345 * complete_edac_device_list_del
346 *
347 * callback function when reference count is zero
348 */
349static void complete_edac_device_list_del(struct rcu_head *head)
350{
351 struct edac_device_ctl_info *edac_dev;
352
353 edac_dev = container_of(head, struct edac_device_ctl_info, rcu);
354 INIT_LIST_HEAD(&edac_dev->link);
355 complete(&edac_dev->removal_complete);
356}
357
358/*
359 * del_edac_device_from_global_list
360 *
361 * remove the RCU, setup for a callback call,
362 * then wait for the callback to occur
363 */
364static void del_edac_device_from_global_list(struct edac_device_ctl_info
365 *edac_device)
366{
367 list_del_rcu(&edac_device->link);
368
369 init_completion(&edac_device->removal_complete);
370 call_rcu(&edac_device->rcu, complete_edac_device_list_del);
371 wait_for_completion(&edac_device->removal_complete);
372}
373
374/**
375 * edac_device_find
376 * Search for a edac_device_ctl_info structure whose index is 'idx'.
377 *
378 * If found, return a pointer to the structure.
379 * Else return NULL.
380 *
381 * Caller must hold device_ctls_mutex.
382 */
383struct edac_device_ctl_info *edac_device_find(int idx)
384{
385 struct list_head *item;
386 struct edac_device_ctl_info *edac_dev;
387
388 /* Iterate over list, looking for exact match of ID */
389 list_for_each(item, &edac_device_list) {
390 edac_dev = list_entry(item, struct edac_device_ctl_info, link);
391
392 if (edac_dev->dev_idx >= idx) {
393 if (edac_dev->dev_idx == idx)
394 return edac_dev;
395
396 /* not on list, so terminate early */
397 break;
398 }
399 }
400
401 return NULL;
402}
403EXPORT_SYMBOL_GPL(edac_device_find);
404
405/*
406 * edac_device_workq_function
407 * performs the operation scheduled by a workq request
408 *
409 * this workq is embedded within an edac_device_ctl_info
410 * structure, that needs to be polled for possible error events.
411 *
412 * This operation is to acquire the list mutex lock
413 * (thus preventing insertation or deletion)
414 * and then call the device's poll function IFF this device is
415 * running polled and there is a poll function defined.
416 */
417static void edac_device_workq_function(struct work_struct *work_req)
418{
419 struct delayed_work *d_work = (struct delayed_work *)work_req;
420 struct edac_device_ctl_info *edac_dev = to_edac_device_ctl_work(d_work);
421
422 mutex_lock(&device_ctls_mutex);
423
424 /* Only poll controllers that are running polled and have a check */
425 if ((edac_dev->op_state == OP_RUNNING_POLL) &&
426 (edac_dev->edac_check != NULL)) {
427 edac_dev->edac_check(edac_dev);
428 }
429
430 mutex_unlock(&device_ctls_mutex);
431
432 /* Reschedule the workq for the next time period to start again
433 * if the number of msec is for 1 sec, then adjust to the next
434 * whole one second to save timers fireing all over the period
435 * between integral seconds
436 */
437 if (edac_dev->poll_msec == 1000)
438 queue_delayed_work(edac_workqueue, &edac_dev->work,
439 round_jiffies(edac_dev->delay));
440 else
441 queue_delayed_work(edac_workqueue, &edac_dev->work,
442 edac_dev->delay);
443}
444
445/*
446 * edac_device_workq_setup
447 * initialize a workq item for this edac_device instance
448 * passing in the new delay period in msec
449 */
450void edac_device_workq_setup(struct edac_device_ctl_info *edac_dev,
451 unsigned msec)
452{
453 debugf0("%s()\n", __func__);
454
455 /* take the arg 'msec' and set it into the control structure
456 * to used in the time period calculation
457 * then calc the number of jiffies that represents
458 */
459 edac_dev->poll_msec = msec;
460 edac_dev->delay = msecs_to_jiffies(msec);
461
462 INIT_DELAYED_WORK(&edac_dev->work, edac_device_workq_function);
463
464 /* optimize here for the 1 second case, which will be normal value, to
465 * fire ON the 1 second time event. This helps reduce all sorts of
466 * timers firing on sub-second basis, while they are happy
467 * to fire together on the 1 second exactly
468 */
469 if (edac_dev->poll_msec == 1000)
470 queue_delayed_work(edac_workqueue, &edac_dev->work,
471 round_jiffies(edac_dev->delay));
472 else
473 queue_delayed_work(edac_workqueue, &edac_dev->work,
474 edac_dev->delay);
475}
476
477/*
478 * edac_device_workq_teardown
479 * stop the workq processing on this edac_dev
480 */
481void edac_device_workq_teardown(struct edac_device_ctl_info *edac_dev)
482{
483 int status;
484
485 status = cancel_delayed_work(&edac_dev->work);
486 if (status == 0) {
487 /* workq instance might be running, wait for it */
488 flush_workqueue(edac_workqueue);
489 }
490}
491
492/*
493 * edac_device_reset_delay_period
494 *
495 * need to stop any outstanding workq queued up at this time
496 * because we will be resetting the sleep time.
497 * Then restart the workq on the new delay
498 */
499void edac_device_reset_delay_period(struct edac_device_ctl_info *edac_dev,
500 unsigned long value)
501{
502 /* cancel the current workq request, without the mutex lock */
503 edac_device_workq_teardown(edac_dev);
504
505 /* acquire the mutex before doing the workq setup */
506 mutex_lock(&device_ctls_mutex);
507
508 /* restart the workq request, with new delay value */
509 edac_device_workq_setup(edac_dev, value);
510
511 mutex_unlock(&device_ctls_mutex);
512}
513
514/**
515 * edac_device_add_device: Insert the 'edac_dev' structure into the
516 * edac_device global list and create sysfs entries associated with
517 * edac_device structure.
518 * @edac_device: pointer to the edac_device structure to be added to the list
519 * 'edac_device' structure.
520 *
521 * Return:
522 * 0 Success
523 * !0 Failure
524 */
525int edac_device_add_device(struct edac_device_ctl_info *edac_dev)
526{
527 debugf0("%s()\n", __func__);
528
529#ifdef CONFIG_EDAC_DEBUG
530 if (edac_debug_level >= 3)
531 edac_device_dump_device(edac_dev);
532#endif
533 mutex_lock(&device_ctls_mutex);
534
535 if (add_edac_dev_to_global_list(edac_dev))
536 goto fail0;
537
538 /* set load time so that error rate can be tracked */
539 edac_dev->start_time = jiffies;
540
541 /* create this instance's sysfs entries */
542 if (edac_device_create_sysfs(edac_dev)) {
543 edac_device_printk(edac_dev, KERN_WARNING,
544 "failed to create sysfs device\n");
545 goto fail1;
546 }
547
548 /* If there IS a check routine, then we are running POLLED */
549 if (edac_dev->edac_check != NULL) {
550 /* This instance is NOW RUNNING */
551 edac_dev->op_state = OP_RUNNING_POLL;
552
553 /*
554 * enable workq processing on this instance,
555 * default = 1000 msec
556 */
557 edac_device_workq_setup(edac_dev, 1000);
558 } else {
559 edac_dev->op_state = OP_RUNNING_INTERRUPT;
560 }
561
562 /* Report action taken */
563 edac_device_printk(edac_dev, KERN_INFO,
564 "Giving out device to module '%s' controller "
565 "'%s': DEV '%s' (%s)\n",
566 edac_dev->mod_name,
567 edac_dev->ctl_name,
568 dev_name(edac_dev),
569 edac_op_state_to_string(edac_dev->op_state));
570
571 mutex_unlock(&device_ctls_mutex);
572 return 0;
573
574fail1:
575 /* Some error, so remove the entry from the lsit */
576 del_edac_device_from_global_list(edac_dev);
577
578fail0:
579 mutex_unlock(&device_ctls_mutex);
580 return 1;
581}
582EXPORT_SYMBOL_GPL(edac_device_add_device);
583
584/**
585 * edac_device_del_device:
586 * Remove sysfs entries for specified edac_device structure and
587 * then remove edac_device structure from global list
588 *
589 * @pdev:
590 * Pointer to 'struct device' representing edac_device
591 * structure to remove.
592 *
593 * Return:
594 * Pointer to removed edac_device structure,
595 * OR NULL if device not found.
596 */
597struct edac_device_ctl_info *edac_device_del_device(struct device *dev)
598{
599 struct edac_device_ctl_info *edac_dev;
600
601 debugf0("%s()\n", __func__);
602
603 mutex_lock(&device_ctls_mutex);
604
605 /* Find the structure on the list, if not there, then leave */
606 edac_dev = find_edac_device_by_dev(dev);
607 if (edac_dev == NULL) {
608 mutex_unlock(&device_ctls_mutex);
609 return NULL;
610 }
611
612 /* mark this instance as OFFLINE */
613 edac_dev->op_state = OP_OFFLINE;
614
615 /* clear workq processing on this instance */
616 edac_device_workq_teardown(edac_dev);
617
618 /* deregister from global list */
619 del_edac_device_from_global_list(edac_dev);
620
621 mutex_unlock(&device_ctls_mutex);
622
623 /* Tear down the sysfs entries for this instance */
624 edac_device_remove_sysfs(edac_dev);
625
626 edac_printk(KERN_INFO, EDAC_MC,
627 "Removed device %d for %s %s: DEV %s\n",
628 edac_dev->dev_idx,
629 edac_dev->mod_name, edac_dev->ctl_name, dev_name(edac_dev));
630
631 return edac_dev;
632}
633EXPORT_SYMBOL_GPL(edac_device_del_device);
634
635static inline int edac_device_get_log_ce(struct edac_device_ctl_info *edac_dev)
636{
637 return edac_dev->log_ce;
638}
639
640static inline int edac_device_get_log_ue(struct edac_device_ctl_info *edac_dev)
641{
642 return edac_dev->log_ue;
643}
644
645static inline int edac_device_get_panic_on_ue(struct edac_device_ctl_info
646 *edac_dev)
647{
648 return edac_dev->panic_on_ue;
649}
650
651/*
652 * edac_device_handle_ce
653 * perform a common output and handling of an 'edac_dev' CE event
654 */
655void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
656 int inst_nr, int block_nr, const char *msg)
657{
658 struct edac_device_instance *instance;
659 struct edac_device_block *block = NULL;
660
661 if ((inst_nr >= edac_dev->nr_instances) || (inst_nr < 0)) {
662 edac_device_printk(edac_dev, KERN_ERR,
663 "INTERNAL ERROR: 'instance' out of range "
664 "(%d >= %d)\n", inst_nr,
665 edac_dev->nr_instances);
666 return;
667 }
668
669 instance = edac_dev->instances + inst_nr;
670
671 if ((block_nr >= instance->nr_blocks) || (block_nr < 0)) {
672 edac_device_printk(edac_dev, KERN_ERR,
673 "INTERNAL ERROR: instance %d 'block' "
674 "out of range (%d >= %d)\n",
675 inst_nr, block_nr,
676 instance->nr_blocks);
677 return;
678 }
679
680 if (instance->nr_blocks > 0) {
681 block = instance->blocks + block_nr;
682 block->counters.ce_count++;
683 }
684
685 /* Propogate the count up the 'totals' tree */
686 instance->counters.ce_count++;
687 edac_dev->counters.ce_count++;
688
689 if (edac_device_get_log_ce(edac_dev))
690 edac_device_printk(edac_dev, KERN_WARNING,
691 "CE: %s instance: %s block: %s '%s'\n",
692 edac_dev->ctl_name, instance->name,
693 block ? block->name : "N/A", msg);
694}
695EXPORT_SYMBOL_GPL(edac_device_handle_ce);
696
697/*
698 * edac_device_handle_ue
699 * perform a common output and handling of an 'edac_dev' UE event
700 */
701void edac_device_handle_ue(struct edac_device_ctl_info *edac_dev,
702 int inst_nr, int block_nr, const char *msg)
703{
704 struct edac_device_instance *instance;
705 struct edac_device_block *block = NULL;
706
707 if ((inst_nr >= edac_dev->nr_instances) || (inst_nr < 0)) {
708 edac_device_printk(edac_dev, KERN_ERR,
709 "INTERNAL ERROR: 'instance' out of range "
710 "(%d >= %d)\n", inst_nr,
711 edac_dev->nr_instances);
712 return;
713 }
714
715 instance = edac_dev->instances + inst_nr;
716
717 if ((block_nr >= instance->nr_blocks) || (block_nr < 0)) {
718 edac_device_printk(edac_dev, KERN_ERR,
719 "INTERNAL ERROR: instance %d 'block' "
720 "out of range (%d >= %d)\n",
721 inst_nr, block_nr,
722 instance->nr_blocks);
723 return;
724 }
725
726 if (instance->nr_blocks > 0) {
727 block = instance->blocks + block_nr;
728 block->counters.ue_count++;
729 }
730
731 /* Propogate the count up the 'totals' tree */
732 instance->counters.ue_count++;
733 edac_dev->counters.ue_count++;
734
735 if (edac_device_get_log_ue(edac_dev))
736 edac_device_printk(edac_dev, KERN_EMERG,
737 "UE: %s instance: %s block: %s '%s'\n",
738 edac_dev->ctl_name, instance->name,
739 block ? block->name : "N/A", msg);
740
741 if (edac_device_get_panic_on_ue(edac_dev))
742 panic("EDAC %s: UE instance: %s block %s '%s'\n",
743 edac_dev->ctl_name, instance->name,
744 block ? block->name : "N/A", msg);
745}
746EXPORT_SYMBOL_GPL(edac_device_handle_ue);
diff --git a/drivers/edac/edac_device_sysfs.c b/drivers/edac/edac_device_sysfs.c
new file mode 100644
index 0000000000..70b837f23c
--- /dev/null
+++ b/drivers/edac/edac_device_sysfs.c
@@ -0,0 +1,896 @@
1/*
2 * file for managing the edac_device class of devices for EDAC
3 *
4 * (C) 2007 SoftwareBitMaker (http://www.softwarebitmaker.com)
5 *
6 * This file may be distributed under the terms of the
7 * GNU General Public License.
8 *
9 * Written Doug Thompson <norsk5@xmission.com>
10 *
11 */
12
13#include <linux/ctype.h>
14#include <linux/module.h>
15
16#include "edac_core.h"
17#include "edac_module.h"
18
19#define EDAC_DEVICE_SYMLINK "device"
20
21#define to_edacdev(k) container_of(k, struct edac_device_ctl_info, kobj)
22#define to_edacdev_attr(a) container_of(a, struct edacdev_attribute, attr)
23
24
25/*
26 * Set of edac_device_ctl_info attribute store/show functions
27 */
28
29/* 'log_ue' */
30static ssize_t edac_device_ctl_log_ue_show(struct edac_device_ctl_info
31 *ctl_info, char *data)
32{
33 return sprintf(data, "%u\n", ctl_info->log_ue);
34}
35
36static ssize_t edac_device_ctl_log_ue_store(struct edac_device_ctl_info
37 *ctl_info, const char *data,
38 size_t count)
39{
40 /* if parameter is zero, turn off flag, if non-zero turn on flag */
41 ctl_info->log_ue = (simple_strtoul(data, NULL, 0) != 0);
42
43 return count;
44}
45
46/* 'log_ce' */
47static ssize_t edac_device_ctl_log_ce_show(struct edac_device_ctl_info
48 *ctl_info, char *data)
49{
50 return sprintf(data, "%u\n", ctl_info->log_ce);
51}
52
53static ssize_t edac_device_ctl_log_ce_store(struct edac_device_ctl_info
54 *ctl_info, const char *data,
55 size_t count)
56{
57 /* if parameter is zero, turn off flag, if non-zero turn on flag */
58 ctl_info->log_ce = (simple_strtoul(data, NULL, 0) != 0);
59
60 return count;
61}
62
63/* 'panic_on_ue' */
64static ssize_t edac_device_ctl_panic_on_ue_show(struct edac_device_ctl_info
65 *ctl_info, char *data)
66{
67 return sprintf(data, "%u\n", ctl_info->panic_on_ue);
68}
69
70static ssize_t edac_device_ctl_panic_on_ue_store(struct edac_device_ctl_info
71 *ctl_info, const char *data,
72 size_t count)
73{
74 /* if parameter is zero, turn off flag, if non-zero turn on flag */
75 ctl_info->panic_on_ue = (simple_strtoul(data, NULL, 0) != 0);
76
77 return count;
78}
79
80/* 'poll_msec' show and store functions*/
81static ssize_t edac_device_ctl_poll_msec_show(struct edac_device_ctl_info
82 *ctl_info, char *data)
83{
84 return sprintf(data, "%u\n", ctl_info->poll_msec);
85}
86
87static ssize_t edac_device_ctl_poll_msec_store(struct edac_device_ctl_info
88 *ctl_info, const char *data,
89 size_t count)
90{
91 unsigned long value;
92
93 /* get the value and enforce that it is non-zero, must be at least
94 * one millisecond for the delay period, between scans
95 * Then cancel last outstanding delay for the work request
96 * and set a new one.
97 */
98 value = simple_strtoul(data, NULL, 0);
99 edac_device_reset_delay_period(ctl_info, value);
100
101 return count;
102}
103
104/* edac_device_ctl_info specific attribute structure */
105struct ctl_info_attribute {
106 struct attribute attr;
107 ssize_t(*show) (struct edac_device_ctl_info *, char *);
108 ssize_t(*store) (struct edac_device_ctl_info *, const char *, size_t);
109};
110
111#define to_ctl_info(k) container_of(k, struct edac_device_ctl_info, kobj)
112#define to_ctl_info_attr(a) container_of(a,struct ctl_info_attribute,attr)
113
114/* Function to 'show' fields from the edac_dev 'ctl_info' structure */
115static ssize_t edac_dev_ctl_info_show(struct kobject *kobj,
116 struct attribute *attr, char *buffer)
117{
118 struct edac_device_ctl_info *edac_dev = to_ctl_info(kobj);
119 struct ctl_info_attribute *ctl_info_attr = to_ctl_info_attr(attr);
120
121 if (ctl_info_attr->show)
122 return ctl_info_attr->show(edac_dev, buffer);
123 return -EIO;
124}
125
126/* Function to 'store' fields into the edac_dev 'ctl_info' structure */
127static ssize_t edac_dev_ctl_info_store(struct kobject *kobj,
128 struct attribute *attr,
129 const char *buffer, size_t count)
130{
131 struct edac_device_ctl_info *edac_dev = to_ctl_info(kobj);
132 struct ctl_info_attribute *ctl_info_attr = to_ctl_info_attr(attr);
133
134 if (ctl_info_attr->store)
135 return ctl_info_attr->store(edac_dev, buffer, count);
136 return -EIO;
137}
138
139/* edac_dev file operations for an 'ctl_info' */
140static struct sysfs_ops device_ctl_info_ops = {
141 .show = edac_dev_ctl_info_show,
142 .store = edac_dev_ctl_info_store
143};
144
145#define CTL_INFO_ATTR(_name,_mode,_show,_store) \
146static struct ctl_info_attribute attr_ctl_info_##_name = { \
147 .attr = {.name = __stringify(_name), .mode = _mode }, \
148 .show = _show, \
149 .store = _store, \
150};
151
152/* Declare the various ctl_info attributes here and their respective ops */
153CTL_INFO_ATTR(log_ue, S_IRUGO | S_IWUSR,
154 edac_device_ctl_log_ue_show, edac_device_ctl_log_ue_store);
155CTL_INFO_ATTR(log_ce, S_IRUGO | S_IWUSR,
156 edac_device_ctl_log_ce_show, edac_device_ctl_log_ce_store);
157CTL_INFO_ATTR(panic_on_ue, S_IRUGO | S_IWUSR,
158 edac_device_ctl_panic_on_ue_show,
159 edac_device_ctl_panic_on_ue_store);
160CTL_INFO_ATTR(poll_msec, S_IRUGO | S_IWUSR,
161 edac_device_ctl_poll_msec_show, edac_device_ctl_poll_msec_store);
162
163/* Base Attributes of the EDAC_DEVICE ECC object */
164static struct ctl_info_attribute *device_ctrl_attr[] = {
165 &attr_ctl_info_panic_on_ue,
166 &attr_ctl_info_log_ue,
167 &attr_ctl_info_log_ce,
168 &attr_ctl_info_poll_msec,
169 NULL,
170};
171
172/*
173 * edac_device_ctrl_master_release
174 *
175 * called when the reference count for the 'main' kobj
176 * for a edac_device control struct reaches zero
177 *
178 * Reference count model:
179 * One 'main' kobject for each control structure allocated.
180 * That main kobj is initially set to one AND
181 * the reference count for the EDAC 'core' module is
182 * bumped by one, thus added 'keep in memory' dependency.
183 *
184 * Each new internal kobj (in instances and blocks) then
185 * bumps the 'main' kobject.
186 *
187 * When they are released their release functions decrement
188 * the 'main' kobj.
189 *
190 * When the main kobj reaches zero (0) then THIS function
191 * is called which then decrements the EDAC 'core' module.
192 * When the module reference count reaches zero then the
193 * module no longer has dependency on keeping the release
194 * function code in memory and module can be unloaded.
195 *
196 * This will support several control objects as well, each
197 * with its own 'main' kobj.
198 */
199static void edac_device_ctrl_master_release(struct kobject *kobj)
200{
201 struct edac_device_ctl_info *edac_dev = to_edacdev(kobj);
202
203 debugf4("%s() control index=%d\n", __func__, edac_dev->dev_idx);
204
205 /* decrement the EDAC CORE module ref count */
206 module_put(edac_dev->owner);
207
208 /* free the control struct containing the 'main' kobj
209 * passed in to this routine
210 */
211 kfree(edac_dev);
212}
213
214/* ktype for the main (master) kobject */
215static struct kobj_type ktype_device_ctrl = {
216 .release = edac_device_ctrl_master_release,
217 .sysfs_ops = &device_ctl_info_ops,
218 .default_attrs = (struct attribute **)device_ctrl_attr,
219};
220
221/*
222 * edac_device_register_sysfs_main_kobj
223 *
224 * perform the high level setup for the new edac_device instance
225 *
226 * Return: 0 SUCCESS
227 * !0 FAILURE
228 */
229int edac_device_register_sysfs_main_kobj(struct edac_device_ctl_info *edac_dev)
230{
231 struct sysdev_class *edac_class;
232 int err;
233
234 debugf1("%s()\n", __func__);
235
236 /* get the /sys/devices/system/edac reference */
237 edac_class = edac_get_edac_class();
238 if (edac_class == NULL) {
239 debugf1("%s() no edac_class error\n", __func__);
240 err = -ENODEV;
241 goto err_out;
242 }
243
244 /* Point to the 'edac_class' this instance 'reports' to */
245 edac_dev->edac_class = edac_class;
246
247 /* Init the devices's kobject */
248 memset(&edac_dev->kobj, 0, sizeof(struct kobject));
249 edac_dev->kobj.ktype = &ktype_device_ctrl;
250
251 /* set this new device under the edac_class kobject */
252 edac_dev->kobj.parent = &edac_class->kset.kobj;
253
254 /* generate sysfs "..../edac/<name>" */
255 debugf4("%s() set name of kobject to: %s\n", __func__, edac_dev->name);
256 err = kobject_set_name(&edac_dev->kobj, "%s", edac_dev->name);
257 if (err)
258 goto err_out;
259
260 /* Record which module 'owns' this control structure
261 * and bump the ref count of the module
262 */
263 edac_dev->owner = THIS_MODULE;
264
265 if (!try_module_get(edac_dev->owner)) {
266 err = -ENODEV;
267 goto err_out;
268 }
269
270 /* register */
271 err = kobject_register(&edac_dev->kobj);
272 if (err) {
273 debugf1("%s()Failed to register '.../edac/%s'\n",
274 __func__, edac_dev->name);
275 goto err_kobj_reg;
276 }
277
278 /* At this point, to 'free' the control struct,
279 * edac_device_unregister_sysfs_main_kobj() must be used
280 */
281
282 debugf4("%s() Registered '.../edac/%s' kobject\n",
283 __func__, edac_dev->name);
284
285 return 0;
286
287 /* Error exit stack */
288err_kobj_reg:
289 module_put(edac_dev->owner);
290
291err_out:
292 return err;
293}
294
295/*
296 * edac_device_unregister_sysfs_main_kobj:
297 * the '..../edac/<name>' kobject
298 */
299void edac_device_unregister_sysfs_main_kobj(
300 struct edac_device_ctl_info *edac_dev)
301{
302 debugf0("%s()\n", __func__);
303 debugf4("%s() name of kobject is: %s\n",
304 __func__, kobject_name(&edac_dev->kobj));
305
306 /*
307 * Unregister the edac device's kobject and
308 * allow for reference count to reach 0 at which point
309 * the callback will be called to:
310 * a) module_put() this module
311 * b) 'kfree' the memory
312 */
313 kobject_unregister(&edac_dev->kobj);
314}
315
316/* edac_dev -> instance information */
317
318/*
319 * Set of low-level instance attribute show functions
320 */
321static ssize_t instance_ue_count_show(struct edac_device_instance *instance,
322 char *data)
323{
324 return sprintf(data, "%u\n", instance->counters.ue_count);
325}
326
327static ssize_t instance_ce_count_show(struct edac_device_instance *instance,
328 char *data)
329{
330 return sprintf(data, "%u\n", instance->counters.ce_count);
331}
332
333#define to_instance(k) container_of(k, struct edac_device_instance, kobj)
334#define to_instance_attr(a) container_of(a,struct instance_attribute,attr)
335
336/* DEVICE instance kobject release() function */
337static void edac_device_ctrl_instance_release(struct kobject *kobj)
338{
339 struct edac_device_instance *instance;
340
341 debugf1("%s()\n", __func__);
342
343 /* map from this kobj to the main control struct
344 * and then dec the main kobj count
345 */
346 instance = to_instance(kobj);
347 kobject_put(&instance->ctl->kobj);
348}
349
350/* instance specific attribute structure */
351struct instance_attribute {
352 struct attribute attr;
353 ssize_t(*show) (struct edac_device_instance *, char *);
354 ssize_t(*store) (struct edac_device_instance *, const char *, size_t);
355};
356
357/* Function to 'show' fields from the edac_dev 'instance' structure */
358static ssize_t edac_dev_instance_show(struct kobject *kobj,
359 struct attribute *attr, char *buffer)
360{
361 struct edac_device_instance *instance = to_instance(kobj);
362 struct instance_attribute *instance_attr = to_instance_attr(attr);
363
364 if (instance_attr->show)
365 return instance_attr->show(instance, buffer);
366 return -EIO;
367}
368
369/* Function to 'store' fields into the edac_dev 'instance' structure */
370static ssize_t edac_dev_instance_store(struct kobject *kobj,
371 struct attribute *attr,
372 const char *buffer, size_t count)
373{
374 struct edac_device_instance *instance = to_instance(kobj);
375 struct instance_attribute *instance_attr = to_instance_attr(attr);
376
377 if (instance_attr->store)
378 return instance_attr->store(instance, buffer, count);
379 return -EIO;
380}
381
382/* edac_dev file operations for an 'instance' */
383static struct sysfs_ops device_instance_ops = {
384 .show = edac_dev_instance_show,
385 .store = edac_dev_instance_store
386};
387
388#define INSTANCE_ATTR(_name,_mode,_show,_store) \
389static struct instance_attribute attr_instance_##_name = { \
390 .attr = {.name = __stringify(_name), .mode = _mode }, \
391 .show = _show, \
392 .store = _store, \
393};
394
395/*
396 * Define attributes visible for the edac_device instance object
397 * Each contains a pointer to a show and an optional set
398 * function pointer that does the low level output/input
399 */
400INSTANCE_ATTR(ce_count, S_IRUGO, instance_ce_count_show, NULL);
401INSTANCE_ATTR(ue_count, S_IRUGO, instance_ue_count_show, NULL);
402
403/* list of edac_dev 'instance' attributes */
404static struct instance_attribute *device_instance_attr[] = {
405 &attr_instance_ce_count,
406 &attr_instance_ue_count,
407 NULL,
408};
409
410/* The 'ktype' for each edac_dev 'instance' */
411static struct kobj_type ktype_instance_ctrl = {
412 .release = edac_device_ctrl_instance_release,
413 .sysfs_ops = &device_instance_ops,
414 .default_attrs = (struct attribute **)device_instance_attr,
415};
416
417/* edac_dev -> instance -> block information */
418
419#define to_block(k) container_of(k, struct edac_device_block, kobj)
420#define to_block_attr(a) \
421 container_of(a, struct edac_dev_sysfs_block_attribute, attr)
422
423/*
424 * Set of low-level block attribute show functions
425 */
426static ssize_t block_ue_count_show(struct kobject *kobj,
427 struct attribute *attr, char *data)
428{
429 struct edac_device_block *block = to_block(kobj);
430
431 return sprintf(data, "%u\n", block->counters.ue_count);
432}
433
434static ssize_t block_ce_count_show(struct kobject *kobj,
435 struct attribute *attr, char *data)
436{
437 struct edac_device_block *block = to_block(kobj);
438
439 return sprintf(data, "%u\n", block->counters.ce_count);
440}
441
442/* DEVICE block kobject release() function */
443static void edac_device_ctrl_block_release(struct kobject *kobj)
444{
445 struct edac_device_block *block;
446
447 debugf1("%s()\n", __func__);
448
449 /* get the container of the kobj */
450 block = to_block(kobj);
451
452 /* map from 'block kobj' to 'block->instance->controller->main_kobj'
453 * now 'release' the block kobject
454 */
455 kobject_put(&block->instance->ctl->kobj);
456}
457
458
459/* Function to 'show' fields from the edac_dev 'block' structure */
460static ssize_t edac_dev_block_show(struct kobject *kobj,
461 struct attribute *attr, char *buffer)
462{
463 struct edac_dev_sysfs_block_attribute *block_attr =
464 to_block_attr(attr);
465
466 if (block_attr->show)
467 return block_attr->show(kobj, attr, buffer);
468 return -EIO;
469}
470
471/* Function to 'store' fields into the edac_dev 'block' structure */
472static ssize_t edac_dev_block_store(struct kobject *kobj,
473 struct attribute *attr,
474 const char *buffer, size_t count)
475{
476 struct edac_dev_sysfs_block_attribute *block_attr;
477
478 block_attr = to_block_attr(attr);
479
480 if (block_attr->store)
481 return block_attr->store(kobj, attr, buffer, count);
482 return -EIO;
483}
484
485/* edac_dev file operations for a 'block' */
486static struct sysfs_ops device_block_ops = {
487 .show = edac_dev_block_show,
488 .store = edac_dev_block_store
489};
490
491#define BLOCK_ATTR(_name,_mode,_show,_store) \
492static struct edac_dev_sysfs_block_attribute attr_block_##_name = { \
493 .attr = {.name = __stringify(_name), .mode = _mode }, \
494 .show = _show, \
495 .store = _store, \
496};
497
498BLOCK_ATTR(ce_count, S_IRUGO, block_ce_count_show, NULL);
499BLOCK_ATTR(ue_count, S_IRUGO, block_ue_count_show, NULL);
500
501/* list of edac_dev 'block' attributes */
502static struct edac_dev_sysfs_block_attribute *device_block_attr[] = {
503 &attr_block_ce_count,
504 &attr_block_ue_count,
505 NULL,
506};
507
508/* The 'ktype' for each edac_dev 'block' */
509static struct kobj_type ktype_block_ctrl = {
510 .release = edac_device_ctrl_block_release,
511 .sysfs_ops = &device_block_ops,
512 .default_attrs = (struct attribute **)device_block_attr,
513};
514
515/* block ctor/dtor code */
516
517/*
518 * edac_device_create_block
519 */
520static int edac_device_create_block(struct edac_device_ctl_info *edac_dev,
521 struct edac_device_instance *instance,
522 struct edac_device_block *block)
523{
524 int i;
525 int err;
526 struct edac_dev_sysfs_block_attribute *sysfs_attrib;
527 struct kobject *main_kobj;
528
529 debugf4("%s() Instance '%s' inst_p=%p block '%s' block_p=%p\n",
530 __func__, instance->name, instance, block->name, block);
531 debugf4("%s() block kobj=%p block kobj->parent=%p\n",
532 __func__, &block->kobj, &block->kobj.parent);
533
534 /* init this block's kobject */
535 memset(&block->kobj, 0, sizeof(struct kobject));
536 block->kobj.parent = &instance->kobj;
537 block->kobj.ktype = &ktype_block_ctrl;
538
539 err = kobject_set_name(&block->kobj, "%s", block->name);
540 if (err)
541 return err;
542
543 /* bump the main kobject's reference count for this controller
544 * and this instance is dependant on the main
545 */
546 main_kobj = kobject_get(&edac_dev->kobj);
547 if (!main_kobj) {
548 err = -ENODEV;
549 goto err_out;
550 }
551
552 /* Add this block's kobject */
553 err = kobject_register(&block->kobj);
554 if (err) {
555 debugf1("%s() Failed to register instance '%s'\n",
556 __func__, block->name);
557 kobject_put(main_kobj);
558 err = -ENODEV;
559 goto err_out;
560 }
561
562 /* If there are driver level block attributes, then added them
563 * to the block kobject
564 */
565 sysfs_attrib = block->block_attributes;
566 if (sysfs_attrib && block->nr_attribs) {
567 for (i = 0; i < block->nr_attribs; i++, sysfs_attrib++) {
568
569 debugf4("%s() creating block attrib='%s' "
570 "attrib->%p to kobj=%p\n",
571 __func__,
572 sysfs_attrib->attr.name,
573 sysfs_attrib, &block->kobj);
574
575 /* Create each block_attribute file */
576 err = sysfs_create_file(&block->kobj,
577 &sysfs_attrib->attr);
578 if (err)
579 goto err_on_attrib;
580 }
581 }
582
583 return 0;
584
585 /* Error unwind stack */
586err_on_attrib:
587 kobject_unregister(&block->kobj);
588
589err_out:
590 return err;
591}
592
593/*
594 * edac_device_delete_block(edac_dev,block);
595 */
596static void edac_device_delete_block(struct edac_device_ctl_info *edac_dev,
597 struct edac_device_block *block)
598{
599 struct edac_dev_sysfs_block_attribute *sysfs_attrib;
600 int i;
601
602 /* if this block has 'attributes' then we need to iterate over the list
603 * and 'remove' the attributes on this block
604 */
605 sysfs_attrib = block->block_attributes;
606 if (sysfs_attrib && block->nr_attribs) {
607 for (i = 0; i < block->nr_attribs; i++, sysfs_attrib++) {
608
609 /* remove each block_attrib file */
610 sysfs_remove_file(&block->kobj,
611 (struct attribute *) sysfs_attrib);
612 }
613 }
614
615 /* unregister this block's kobject, SEE:
616 * edac_device_ctrl_block_release() callback operation
617 */
618 kobject_unregister(&block->kobj);
619}
620
621/* instance ctor/dtor code */
622
623/*
624 * edac_device_create_instance
625 * create just one instance of an edac_device 'instance'
626 */
627static int edac_device_create_instance(struct edac_device_ctl_info *edac_dev,
628 int idx)
629{
630 int i, j;
631 int err;
632 struct edac_device_instance *instance;
633 struct kobject *main_kobj;
634
635 instance = &edac_dev->instances[idx];
636
637 /* Init the instance's kobject */
638 memset(&instance->kobj, 0, sizeof(struct kobject));
639
640 /* set this new device under the edac_device main kobject */
641 instance->kobj.parent = &edac_dev->kobj;
642 instance->kobj.ktype = &ktype_instance_ctrl;
643 instance->ctl = edac_dev;
644
645 err = kobject_set_name(&instance->kobj, "%s", instance->name);
646 if (err)
647 goto err_out;
648
649 /* bump the main kobject's reference count for this controller
650 * and this instance is dependant on the main
651 */
652 main_kobj = kobject_get(&edac_dev->kobj);
653 if (!main_kobj) {
654 err = -ENODEV;
655 goto err_out;
656 }
657
658 /* Formally register this instance's kobject */
659 err = kobject_register(&instance->kobj);
660 if (err != 0) {
661 debugf2("%s() Failed to register instance '%s'\n",
662 __func__, instance->name);
663 kobject_put(main_kobj);
664 goto err_out;
665 }
666
667 debugf4("%s() now register '%d' blocks for instance %d\n",
668 __func__, instance->nr_blocks, idx);
669
670 /* register all blocks of this instance */
671 for (i = 0; i < instance->nr_blocks; i++) {
672 err = edac_device_create_block(edac_dev, instance,
673 &instance->blocks[i]);
674 if (err) {
675 /* If any fail, remove all previous ones */
676 for (j = 0; j < i; j++)
677 edac_device_delete_block(edac_dev,
678 &instance->blocks[j]);
679 goto err_release_instance_kobj;
680 }
681 }
682
683 debugf4("%s() Registered instance %d '%s' kobject\n",
684 __func__, idx, instance->name);
685
686 return 0;
687
688 /* error unwind stack */
689err_release_instance_kobj:
690 kobject_unregister(&instance->kobj);
691
692err_out:
693 return err;
694}
695
696/*
697 * edac_device_remove_instance
698 * remove an edac_device instance
699 */
700static void edac_device_delete_instance(struct edac_device_ctl_info *edac_dev,
701 int idx)
702{
703 struct edac_device_instance *instance;
704 int i;
705
706 instance = &edac_dev->instances[idx];
707
708 /* unregister all blocks in this instance */
709 for (i = 0; i < instance->nr_blocks; i++)
710 edac_device_delete_block(edac_dev, &instance->blocks[i]);
711
712 /* unregister this instance's kobject, SEE:
713 * edac_device_ctrl_instance_release() for callback operation
714 */
715 kobject_unregister(&instance->kobj);
716}
717
718/*
719 * edac_device_create_instances
720 * create the first level of 'instances' for this device
721 * (ie 'cache' might have 'cache0', 'cache1', 'cache2', etc
722 */
723static int edac_device_create_instances(struct edac_device_ctl_info *edac_dev)
724{
725 int i, j;
726 int err;
727
728 debugf0("%s()\n", __func__);
729
730 /* iterate over creation of the instances */
731 for (i = 0; i < edac_dev->nr_instances; i++) {
732 err = edac_device_create_instance(edac_dev, i);
733 if (err) {
734 /* unwind previous instances on error */
735 for (j = 0; j < i; j++)
736 edac_device_delete_instance(edac_dev, j);
737 return err;
738 }
739 }
740
741 return 0;
742}
743
744/*
745 * edac_device_delete_instances(edac_dev);
746 * unregister all the kobjects of the instances
747 */
748static void edac_device_delete_instances(struct edac_device_ctl_info *edac_dev)
749{
750 int i;
751
752 /* iterate over creation of the instances */
753 for (i = 0; i < edac_dev->nr_instances; i++)
754 edac_device_delete_instance(edac_dev, i);
755}
756
757/* edac_dev sysfs ctor/dtor code */
758
759/*
760 * edac_device_add_main_sysfs_attributes
761 * add some attributes to this instance's main kobject
762 */
763static int edac_device_add_main_sysfs_attributes(
764 struct edac_device_ctl_info *edac_dev)
765{
766 struct edac_dev_sysfs_attribute *sysfs_attrib;
767 int err = 0;
768
769 sysfs_attrib = edac_dev->sysfs_attributes;
770 if (sysfs_attrib) {
771 /* iterate over the array and create an attribute for each
772 * entry in the list
773 */
774 while (sysfs_attrib->attr.name != NULL) {
775 err = sysfs_create_file(&edac_dev->kobj,
776 (struct attribute*) sysfs_attrib);
777 if (err)
778 goto err_out;
779
780 sysfs_attrib++;
781 }
782 }
783
784err_out:
785 return err;
786}
787
788/*
789 * edac_device_remove_main_sysfs_attributes
790 * remove any attributes to this instance's main kobject
791 */
792static void edac_device_remove_main_sysfs_attributes(
793 struct edac_device_ctl_info *edac_dev)
794{
795 struct edac_dev_sysfs_attribute *sysfs_attrib;
796
797 /* if there are main attributes, defined, remove them. First,
798 * point to the start of the array and iterate over it
799 * removing each attribute listed from this device's instance's kobject
800 */
801 sysfs_attrib = edac_dev->sysfs_attributes;
802 if (sysfs_attrib) {
803 while (sysfs_attrib->attr.name != NULL) {
804 sysfs_remove_file(&edac_dev->kobj,
805 (struct attribute *) sysfs_attrib);
806 sysfs_attrib++;
807 }
808 }
809}
810
811/*
812 * edac_device_create_sysfs() Constructor
813 *
814 * accept a created edac_device control structure
815 * and 'export' it to sysfs. The 'main' kobj should already have been
816 * created. 'instance' and 'block' kobjects should be registered
817 * along with any 'block' attributes from the low driver. In addition,
818 * the main attributes (if any) are connected to the main kobject of
819 * the control structure.
820 *
821 * Return:
822 * 0 Success
823 * !0 Failure
824 */
825int edac_device_create_sysfs(struct edac_device_ctl_info *edac_dev)
826{
827 int err;
828 struct kobject *edac_kobj = &edac_dev->kobj;
829
830 debugf0("%s() idx=%d\n", __func__, edac_dev->dev_idx);
831
832 /* go create any main attributes callers wants */
833 err = edac_device_add_main_sysfs_attributes(edac_dev);
834 if (err) {
835 debugf0("%s() failed to add sysfs attribs\n", __func__);
836 goto err_out;
837 }
838
839 /* create a symlink from the edac device
840 * to the platform 'device' being used for this
841 */
842 err = sysfs_create_link(edac_kobj,
843 &edac_dev->dev->kobj, EDAC_DEVICE_SYMLINK);
844 if (err) {
845 debugf0("%s() sysfs_create_link() returned err= %d\n",
846 __func__, err);
847 goto err_remove_main_attribs;
848 }
849
850 /* Create the first level instance directories
851 * In turn, the nested blocks beneath the instances will
852 * be registered as well
853 */
854 err = edac_device_create_instances(edac_dev);
855 if (err) {
856 debugf0("%s() edac_device_create_instances() "
857 "returned err= %d\n", __func__, err);
858 goto err_remove_link;
859 }
860
861
862 debugf4("%s() create-instances done, idx=%d\n",
863 __func__, edac_dev->dev_idx);
864
865 return 0;
866
867 /* Error unwind stack */
868err_remove_link:
869 /* remove the sym link */
870 sysfs_remove_link(&edac_dev->kobj, EDAC_DEVICE_SYMLINK);
871
872err_remove_main_attribs:
873 edac_device_remove_main_sysfs_attributes(edac_dev);
874
875err_out:
876 return err;
877}
878
879/*
880 * edac_device_remove_sysfs() destructor
881 *
882 * given an edac_device struct, tear down the kobject resources
883 */
884void edac_device_remove_sysfs(struct edac_device_ctl_info *edac_dev)
885{
886 debugf0("%s()\n", __func__);
887
888 /* remove any main attributes for this device */
889 edac_device_remove_main_sysfs_attributes(edac_dev);
890
891 /* remove the device sym link */
892 sysfs_remove_link(&edac_dev->kobj, EDAC_DEVICE_SYMLINK);
893
894 /* walk the instance/block kobject tree, deconstructing it */
895 edac_device_delete_instances(edac_dev);
896}
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index 804875de58..4471be3625 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -27,1200 +27,20 @@
27#include <linux/list.h> 27#include <linux/list.h>
28#include <linux/sysdev.h> 28#include <linux/sysdev.h>
29#include <linux/ctype.h> 29#include <linux/ctype.h>
30#include <linux/kthread.h> 30#include <linux/edac.h>
31#include <linux/freezer.h>
32#include <asm/uaccess.h> 31#include <asm/uaccess.h>
33#include <asm/page.h> 32#include <asm/page.h>
34#include <asm/edac.h> 33#include <asm/edac.h>
35#include "edac_mc.h" 34#include "edac_core.h"
36 35#include "edac_module.h"
37#define EDAC_MC_VERSION "Ver: 2.0.1 " __DATE__
38
39
40#ifdef CONFIG_EDAC_DEBUG
41/* Values of 0 to 4 will generate output */
42int edac_debug_level = 1;
43EXPORT_SYMBOL_GPL(edac_debug_level);
44#endif
45
46/* EDAC Controls, setable by module parameter, and sysfs */
47static int log_ue = 1;
48static int log_ce = 1;
49static int panic_on_ue;
50static int poll_msec = 1000;
51 36
52/* lock to memory controller's control array */ 37/* lock to memory controller's control array */
53static DECLARE_MUTEX(mem_ctls_mutex); 38static DEFINE_MUTEX(mem_ctls_mutex);
54static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices); 39static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
55 40
56static struct task_struct *edac_thread;
57
58#ifdef CONFIG_PCI
59static int check_pci_parity = 0; /* default YES check PCI parity */
60static int panic_on_pci_parity; /* default no panic on PCI Parity */
61static atomic_t pci_parity_count = ATOMIC_INIT(0);
62
63static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
64static struct completion edac_pci_kobj_complete;
65#endif /* CONFIG_PCI */
66
67/* START sysfs data and methods */
68
69
70static const char *mem_types[] = {
71 [MEM_EMPTY] = "Empty",
72 [MEM_RESERVED] = "Reserved",
73 [MEM_UNKNOWN] = "Unknown",
74 [MEM_FPM] = "FPM",
75 [MEM_EDO] = "EDO",
76 [MEM_BEDO] = "BEDO",
77 [MEM_SDR] = "Unbuffered-SDR",
78 [MEM_RDR] = "Registered-SDR",
79 [MEM_DDR] = "Unbuffered-DDR",
80 [MEM_RDDR] = "Registered-DDR",
81 [MEM_RMBS] = "RMBS"
82};
83
84static const char *dev_types[] = {
85 [DEV_UNKNOWN] = "Unknown",
86 [DEV_X1] = "x1",
87 [DEV_X2] = "x2",
88 [DEV_X4] = "x4",
89 [DEV_X8] = "x8",
90 [DEV_X16] = "x16",
91 [DEV_X32] = "x32",
92 [DEV_X64] = "x64"
93};
94
95static const char *edac_caps[] = {
96 [EDAC_UNKNOWN] = "Unknown",
97 [EDAC_NONE] = "None",
98 [EDAC_RESERVED] = "Reserved",
99 [EDAC_PARITY] = "PARITY",
100 [EDAC_EC] = "EC",
101 [EDAC_SECDED] = "SECDED",
102 [EDAC_S2ECD2ED] = "S2ECD2ED",
103 [EDAC_S4ECD4ED] = "S4ECD4ED",
104 [EDAC_S8ECD8ED] = "S8ECD8ED",
105 [EDAC_S16ECD16ED] = "S16ECD16ED"
106};
107
108/* sysfs object: /sys/devices/system/edac */
109static struct sysdev_class edac_class = {
110 set_kset_name("edac"),
111};
112
113/* sysfs object:
114 * /sys/devices/system/edac/mc
115 */
116static struct kobject edac_memctrl_kobj;
117
118/* We use these to wait for the reference counts on edac_memctrl_kobj and
119 * edac_pci_kobj to reach 0.
120 */
121static struct completion edac_memctrl_kobj_complete;
122
123/*
124 * /sys/devices/system/edac/mc;
125 * data structures and methods
126 */
127static ssize_t memctrl_int_show(void *ptr, char *buffer)
128{
129 int *value = (int*) ptr;
130 return sprintf(buffer, "%u\n", *value);
131}
132
133static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
134{
135 int *value = (int*) ptr;
136
137 if (isdigit(*buffer))
138 *value = simple_strtoul(buffer, NULL, 0);
139
140 return count;
141}
142
143struct memctrl_dev_attribute {
144 struct attribute attr;
145 void *value;
146 ssize_t (*show)(void *,char *);
147 ssize_t (*store)(void *, const char *, size_t);
148};
149
150/* Set of show/store abstract level functions for memory control object */
151static ssize_t memctrl_dev_show(struct kobject *kobj,
152 struct attribute *attr, char *buffer)
153{
154 struct memctrl_dev_attribute *memctrl_dev;
155 memctrl_dev = (struct memctrl_dev_attribute*)attr;
156
157 if (memctrl_dev->show)
158 return memctrl_dev->show(memctrl_dev->value, buffer);
159
160 return -EIO;
161}
162
163static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
164 const char *buffer, size_t count)
165{
166 struct memctrl_dev_attribute *memctrl_dev;
167 memctrl_dev = (struct memctrl_dev_attribute*)attr;
168
169 if (memctrl_dev->store)
170 return memctrl_dev->store(memctrl_dev->value, buffer, count);
171
172 return -EIO;
173}
174
175static struct sysfs_ops memctrlfs_ops = {
176 .show = memctrl_dev_show,
177 .store = memctrl_dev_store
178};
179
180#define MEMCTRL_ATTR(_name,_mode,_show,_store) \
181struct memctrl_dev_attribute attr_##_name = { \
182 .attr = {.name = __stringify(_name), .mode = _mode }, \
183 .value = &_name, \
184 .show = _show, \
185 .store = _store, \
186};
187
188#define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
189struct memctrl_dev_attribute attr_##_name = { \
190 .attr = {.name = __stringify(_name), .mode = _mode }, \
191 .value = _data, \
192 .show = _show, \
193 .store = _store, \
194};
195
196/* csrow<id> control files */
197MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
198MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
199MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
200MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
201
202/* Base Attributes of the memory ECC object */
203static struct memctrl_dev_attribute *memctrl_attr[] = {
204 &attr_panic_on_ue,
205 &attr_log_ue,
206 &attr_log_ce,
207 &attr_poll_msec,
208 NULL,
209};
210
211/* Main MC kobject release() function */
212static void edac_memctrl_master_release(struct kobject *kobj)
213{
214 debugf1("%s()\n", __func__);
215 complete(&edac_memctrl_kobj_complete);
216}
217
218static struct kobj_type ktype_memctrl = {
219 .release = edac_memctrl_master_release,
220 .sysfs_ops = &memctrlfs_ops,
221 .default_attrs = (struct attribute **) memctrl_attr,
222};
223
224/* Initialize the main sysfs entries for edac:
225 * /sys/devices/system/edac
226 *
227 * and children
228 *
229 * Return: 0 SUCCESS
230 * !0 FAILURE
231 */
232static int edac_sysfs_memctrl_setup(void)
233{
234 int err = 0;
235
236 debugf1("%s()\n", __func__);
237
238 /* create the /sys/devices/system/edac directory */
239 err = sysdev_class_register(&edac_class);
240
241 if (err) {
242 debugf1("%s() error=%d\n", __func__, err);
243 return err;
244 }
245
246 /* Init the MC's kobject */
247 memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
248 edac_memctrl_kobj.parent = &edac_class.kset.kobj;
249 edac_memctrl_kobj.ktype = &ktype_memctrl;
250
251 /* generate sysfs "..../edac/mc" */
252 err = kobject_set_name(&edac_memctrl_kobj,"mc");
253
254 if (err)
255 goto fail;
256
257 /* FIXME: maybe new sysdev_create_subdir() */
258 err = kobject_register(&edac_memctrl_kobj);
259
260 if (err) {
261 debugf1("Failed to register '.../edac/mc'\n");
262 goto fail;
263 }
264
265 debugf1("Registered '.../edac/mc' kobject\n");
266
267 return 0;
268
269fail:
270 sysdev_class_unregister(&edac_class);
271 return err;
272}
273
274/*
275 * MC teardown:
276 * the '..../edac/mc' kobject followed by '..../edac' itself
277 */
278static void edac_sysfs_memctrl_teardown(void)
279{
280 debugf0("MC: " __FILE__ ": %s()\n", __func__);
281
282 /* Unregister the MC's kobject and wait for reference count to reach
283 * 0.
284 */
285 init_completion(&edac_memctrl_kobj_complete);
286 kobject_unregister(&edac_memctrl_kobj);
287 wait_for_completion(&edac_memctrl_kobj_complete);
288
289 /* Unregister the 'edac' object */
290 sysdev_class_unregister(&edac_class);
291}
292
293#ifdef CONFIG_PCI
294static ssize_t edac_pci_int_show(void *ptr, char *buffer)
295{
296 int *value = ptr;
297 return sprintf(buffer,"%d\n",*value);
298}
299
300static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
301{
302 int *value = ptr;
303
304 if (isdigit(*buffer))
305 *value = simple_strtoul(buffer,NULL,0);
306
307 return count;
308}
309
310struct edac_pci_dev_attribute {
311 struct attribute attr;
312 void *value;
313 ssize_t (*show)(void *,char *);
314 ssize_t (*store)(void *, const char *,size_t);
315};
316
317/* Set of show/store abstract level functions for PCI Parity object */
318static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
319 char *buffer)
320{
321 struct edac_pci_dev_attribute *edac_pci_dev;
322 edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
323
324 if (edac_pci_dev->show)
325 return edac_pci_dev->show(edac_pci_dev->value, buffer);
326 return -EIO;
327}
328
329static ssize_t edac_pci_dev_store(struct kobject *kobj,
330 struct attribute *attr, const char *buffer, size_t count)
331{
332 struct edac_pci_dev_attribute *edac_pci_dev;
333 edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
334
335 if (edac_pci_dev->show)
336 return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
337 return -EIO;
338}
339
340static struct sysfs_ops edac_pci_sysfs_ops = {
341 .show = edac_pci_dev_show,
342 .store = edac_pci_dev_store
343};
344
345#define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
346struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
347 .attr = {.name = __stringify(_name), .mode = _mode }, \
348 .value = &_name, \
349 .show = _show, \
350 .store = _store, \
351};
352
353#define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
354struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
355 .attr = {.name = __stringify(_name), .mode = _mode }, \
356 .value = _data, \
357 .show = _show, \
358 .store = _store, \
359};
360
361/* PCI Parity control files */
362EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
363 edac_pci_int_store);
364EDAC_PCI_ATTR(panic_on_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
365 edac_pci_int_store);
366EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
367
368/* Base Attributes of the memory ECC object */
369static struct edac_pci_dev_attribute *edac_pci_attr[] = {
370 &edac_pci_attr_check_pci_parity,
371 &edac_pci_attr_panic_on_pci_parity,
372 &edac_pci_attr_pci_parity_count,
373 NULL,
374};
375
376/* No memory to release */
377static void edac_pci_release(struct kobject *kobj)
378{
379 debugf1("%s()\n", __func__);
380 complete(&edac_pci_kobj_complete);
381}
382
383static struct kobj_type ktype_edac_pci = {
384 .release = edac_pci_release,
385 .sysfs_ops = &edac_pci_sysfs_ops,
386 .default_attrs = (struct attribute **) edac_pci_attr,
387};
388
389/**
390 * edac_sysfs_pci_setup()
391 *
392 */
393static int edac_sysfs_pci_setup(void)
394{
395 int err;
396
397 debugf1("%s()\n", __func__);
398
399 memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
400 edac_pci_kobj.parent = &edac_class.kset.kobj;
401 edac_pci_kobj.ktype = &ktype_edac_pci;
402 err = kobject_set_name(&edac_pci_kobj, "pci");
403
404 if (!err) {
405 /* Instanstiate the csrow object */
406 /* FIXME: maybe new sysdev_create_subdir() */
407 err = kobject_register(&edac_pci_kobj);
408
409 if (err)
410 debugf1("Failed to register '.../edac/pci'\n");
411 else
412 debugf1("Registered '.../edac/pci' kobject\n");
413 }
414
415 return err;
416}
417
418static void edac_sysfs_pci_teardown(void)
419{
420 debugf0("%s()\n", __func__);
421 init_completion(&edac_pci_kobj_complete);
422 kobject_unregister(&edac_pci_kobj);
423 wait_for_completion(&edac_pci_kobj_complete);
424}
425
426
427static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
428{
429 int where;
430 u16 status;
431
432 where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
433 pci_read_config_word(dev, where, &status);
434
435 /* If we get back 0xFFFF then we must suspect that the card has been
436 * pulled but the Linux PCI layer has not yet finished cleaning up.
437 * We don't want to report on such devices
438 */
439
440 if (status == 0xFFFF) {
441 u32 sanity;
442
443 pci_read_config_dword(dev, 0, &sanity);
444
445 if (sanity == 0xFFFFFFFF)
446 return 0;
447 }
448
449 status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
450 PCI_STATUS_PARITY;
451
452 if (status)
453 /* reset only the bits we are interested in */
454 pci_write_config_word(dev, where, status);
455
456 return status;
457}
458
459typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
460
461/* Clear any PCI parity errors logged by this device. */
462static void edac_pci_dev_parity_clear(struct pci_dev *dev)
463{
464 u8 header_type;
465
466 get_pci_parity_status(dev, 0);
467
468 /* read the device TYPE, looking for bridges */
469 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
470
471 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
472 get_pci_parity_status(dev, 1);
473}
474
475/*
476 * PCI Parity polling
477 *
478 */
479static void edac_pci_dev_parity_test(struct pci_dev *dev)
480{
481 u16 status;
482 u8 header_type;
483
484 /* read the STATUS register on this device
485 */
486 status = get_pci_parity_status(dev, 0);
487
488 debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
489
490 /* check the status reg for errors */
491 if (status) {
492 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
493 edac_printk(KERN_CRIT, EDAC_PCI,
494 "Signaled System Error on %s\n",
495 pci_name(dev));
496
497 if (status & (PCI_STATUS_PARITY)) {
498 edac_printk(KERN_CRIT, EDAC_PCI,
499 "Master Data Parity Error on %s\n",
500 pci_name(dev));
501
502 atomic_inc(&pci_parity_count);
503 }
504
505 if (status & (PCI_STATUS_DETECTED_PARITY)) {
506 edac_printk(KERN_CRIT, EDAC_PCI,
507 "Detected Parity Error on %s\n",
508 pci_name(dev));
509
510 atomic_inc(&pci_parity_count);
511 }
512 }
513
514 /* read the device TYPE, looking for bridges */
515 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
516
517 debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
518
519 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
520 /* On bridges, need to examine secondary status register */
521 status = get_pci_parity_status(dev, 1);
522
523 debugf2("PCI SEC_STATUS= 0x%04x %s\n",
524 status, dev->dev.bus_id );
525
526 /* check the secondary status reg for errors */
527 if (status) {
528 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
529 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
530 "Signaled System Error on %s\n",
531 pci_name(dev));
532
533 if (status & (PCI_STATUS_PARITY)) {
534 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
535 "Master Data Parity Error on "
536 "%s\n", pci_name(dev));
537
538 atomic_inc(&pci_parity_count);
539 }
540
541 if (status & (PCI_STATUS_DETECTED_PARITY)) {
542 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
543 "Detected Parity Error on %s\n",
544 pci_name(dev));
545
546 atomic_inc(&pci_parity_count);
547 }
548 }
549 }
550}
551
552/*
553 * pci_dev parity list iterator
554 * Scan the PCI device list for one iteration, looking for SERRORs
555 * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
556 */
557static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
558{
559 struct pci_dev *dev = NULL;
560
561 /* request for kernel access to the next PCI device, if any,
562 * and while we are looking at it have its reference count
563 * bumped until we are done with it
564 */
565 while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
566 fn(dev);
567 }
568}
569
570static void do_pci_parity_check(void)
571{
572 unsigned long flags;
573 int before_count;
574
575 debugf3("%s()\n", __func__);
576
577 if (!check_pci_parity)
578 return;
579
580 before_count = atomic_read(&pci_parity_count);
581
582 /* scan all PCI devices looking for a Parity Error on devices and
583 * bridges
584 */
585 local_irq_save(flags);
586 edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
587 local_irq_restore(flags);
588
589 /* Only if operator has selected panic on PCI Error */
590 if (panic_on_pci_parity) {
591 /* If the count is different 'after' from 'before' */
592 if (before_count != atomic_read(&pci_parity_count))
593 panic("EDAC: PCI Parity Error");
594 }
595}
596
597static inline void clear_pci_parity_errors(void)
598{
599 /* Clear any PCI bus parity errors that devices initially have logged
600 * in their registers.
601 */
602 edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
603}
604
605#else /* CONFIG_PCI */
606
607/* pre-process these away */
608#define do_pci_parity_check()
609#define clear_pci_parity_errors()
610#define edac_sysfs_pci_teardown()
611#define edac_sysfs_pci_setup() (0)
612
613#endif /* CONFIG_PCI */
614
615/* EDAC sysfs CSROW data structures and methods
616 */
617
618/* Set of more default csrow<id> attribute show/store functions */
619static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data, int private)
620{
621 return sprintf(data,"%u\n", csrow->ue_count);
622}
623
624static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data, int private)
625{
626 return sprintf(data,"%u\n", csrow->ce_count);
627}
628
629static ssize_t csrow_size_show(struct csrow_info *csrow, char *data, int private)
630{
631 return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
632}
633
634static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data, int private)
635{
636 return sprintf(data,"%s\n", mem_types[csrow->mtype]);
637}
638
639static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data, int private)
640{
641 return sprintf(data,"%s\n", dev_types[csrow->dtype]);
642}
643
644static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data, int private)
645{
646 return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
647}
648
649/* show/store functions for DIMM Label attributes */
650static ssize_t channel_dimm_label_show(struct csrow_info *csrow,
651 char *data, int channel)
652{
653 return snprintf(data, EDAC_MC_LABEL_LEN,"%s",
654 csrow->channels[channel].label);
655}
656
657static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
658 const char *data,
659 size_t count,
660 int channel)
661{
662 ssize_t max_size = 0;
663
664 max_size = min((ssize_t)count,(ssize_t)EDAC_MC_LABEL_LEN-1);
665 strncpy(csrow->channels[channel].label, data, max_size);
666 csrow->channels[channel].label[max_size] = '\0';
667
668 return max_size;
669}
670
671/* show function for dynamic chX_ce_count attribute */
672static ssize_t channel_ce_count_show(struct csrow_info *csrow,
673 char *data,
674 int channel)
675{
676 return sprintf(data, "%u\n", csrow->channels[channel].ce_count);
677}
678
679/* csrow specific attribute structure */
680struct csrowdev_attribute {
681 struct attribute attr;
682 ssize_t (*show)(struct csrow_info *,char *,int);
683 ssize_t (*store)(struct csrow_info *, const char *,size_t,int);
684 int private;
685};
686
687#define to_csrow(k) container_of(k, struct csrow_info, kobj)
688#define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
689
690/* Set of show/store higher level functions for default csrow attributes */
691static ssize_t csrowdev_show(struct kobject *kobj,
692 struct attribute *attr,
693 char *buffer)
694{
695 struct csrow_info *csrow = to_csrow(kobj);
696 struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
697
698 if (csrowdev_attr->show)
699 return csrowdev_attr->show(csrow,
700 buffer,
701 csrowdev_attr->private);
702 return -EIO;
703}
704
705static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
706 const char *buffer, size_t count)
707{
708 struct csrow_info *csrow = to_csrow(kobj);
709 struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
710
711 if (csrowdev_attr->store)
712 return csrowdev_attr->store(csrow,
713 buffer,
714 count,
715 csrowdev_attr->private);
716 return -EIO;
717}
718
719static struct sysfs_ops csrowfs_ops = {
720 .show = csrowdev_show,
721 .store = csrowdev_store
722};
723
724#define CSROWDEV_ATTR(_name,_mode,_show,_store,_private) \
725struct csrowdev_attribute attr_##_name = { \
726 .attr = {.name = __stringify(_name), .mode = _mode }, \
727 .show = _show, \
728 .store = _store, \
729 .private = _private, \
730};
731
732/* default cwrow<id>/attribute files */
733CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL,0);
734CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL,0);
735CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL,0);
736CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL,0);
737CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL,0);
738CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL,0);
739
740/* default attributes of the CSROW<id> object */
741static struct csrowdev_attribute *default_csrow_attr[] = {
742 &attr_dev_type,
743 &attr_mem_type,
744 &attr_edac_mode,
745 &attr_size_mb,
746 &attr_ue_count,
747 &attr_ce_count,
748 NULL,
749};
750
751
752/* possible dynamic channel DIMM Label attribute files */
753CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
754 channel_dimm_label_show,
755 channel_dimm_label_store,
756 0 );
757CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
758 channel_dimm_label_show,
759 channel_dimm_label_store,
760 1 );
761CSROWDEV_ATTR(ch2_dimm_label,S_IRUGO|S_IWUSR,
762 channel_dimm_label_show,
763 channel_dimm_label_store,
764 2 );
765CSROWDEV_ATTR(ch3_dimm_label,S_IRUGO|S_IWUSR,
766 channel_dimm_label_show,
767 channel_dimm_label_store,
768 3 );
769CSROWDEV_ATTR(ch4_dimm_label,S_IRUGO|S_IWUSR,
770 channel_dimm_label_show,
771 channel_dimm_label_store,
772 4 );
773CSROWDEV_ATTR(ch5_dimm_label,S_IRUGO|S_IWUSR,
774 channel_dimm_label_show,
775 channel_dimm_label_store,
776 5 );
777
778/* Total possible dynamic DIMM Label attribute file table */
779static struct csrowdev_attribute *dynamic_csrow_dimm_attr[] = {
780 &attr_ch0_dimm_label,
781 &attr_ch1_dimm_label,
782 &attr_ch2_dimm_label,
783 &attr_ch3_dimm_label,
784 &attr_ch4_dimm_label,
785 &attr_ch5_dimm_label
786};
787
788/* possible dynamic channel ce_count attribute files */
789CSROWDEV_ATTR(ch0_ce_count,S_IRUGO|S_IWUSR,
790 channel_ce_count_show,
791 NULL,
792 0 );
793CSROWDEV_ATTR(ch1_ce_count,S_IRUGO|S_IWUSR,
794 channel_ce_count_show,
795 NULL,
796 1 );
797CSROWDEV_ATTR(ch2_ce_count,S_IRUGO|S_IWUSR,
798 channel_ce_count_show,
799 NULL,
800 2 );
801CSROWDEV_ATTR(ch3_ce_count,S_IRUGO|S_IWUSR,
802 channel_ce_count_show,
803 NULL,
804 3 );
805CSROWDEV_ATTR(ch4_ce_count,S_IRUGO|S_IWUSR,
806 channel_ce_count_show,
807 NULL,
808 4 );
809CSROWDEV_ATTR(ch5_ce_count,S_IRUGO|S_IWUSR,
810 channel_ce_count_show,
811 NULL,
812 5 );
813
814/* Total possible dynamic ce_count attribute file table */
815static struct csrowdev_attribute *dynamic_csrow_ce_count_attr[] = {
816 &attr_ch0_ce_count,
817 &attr_ch1_ce_count,
818 &attr_ch2_ce_count,
819 &attr_ch3_ce_count,
820 &attr_ch4_ce_count,
821 &attr_ch5_ce_count
822};
823
824
825#define EDAC_NR_CHANNELS 6
826
827/* Create dynamic CHANNEL files, indexed by 'chan', under specifed CSROW */
828static int edac_create_channel_files(struct kobject *kobj, int chan)
829{
830 int err=-ENODEV;
831
832 if (chan >= EDAC_NR_CHANNELS)
833 return err;
834
835 /* create the DIMM label attribute file */
836 err = sysfs_create_file(kobj,
837 (struct attribute *) dynamic_csrow_dimm_attr[chan]);
838
839 if (!err) {
840 /* create the CE Count attribute file */
841 err = sysfs_create_file(kobj,
842 (struct attribute *) dynamic_csrow_ce_count_attr[chan]);
843 } else {
844 debugf1("%s() dimm labels and ce_count files created", __func__);
845 }
846
847 return err;
848}
849
850/* No memory to release for this kobj */
851static void edac_csrow_instance_release(struct kobject *kobj)
852{
853 struct csrow_info *cs;
854
855 cs = container_of(kobj, struct csrow_info, kobj);
856 complete(&cs->kobj_complete);
857}
858
859/* the kobj_type instance for a CSROW */
860static struct kobj_type ktype_csrow = {
861 .release = edac_csrow_instance_release,
862 .sysfs_ops = &csrowfs_ops,
863 .default_attrs = (struct attribute **) default_csrow_attr,
864};
865
866/* Create a CSROW object under specifed edac_mc_device */
867static int edac_create_csrow_object(
868 struct kobject *edac_mci_kobj,
869 struct csrow_info *csrow,
870 int index)
871{
872 int err = 0;
873 int chan;
874
875 memset(&csrow->kobj, 0, sizeof(csrow->kobj));
876
877 /* generate ..../edac/mc/mc<id>/csrow<index> */
878
879 csrow->kobj.parent = edac_mci_kobj;
880 csrow->kobj.ktype = &ktype_csrow;
881
882 /* name this instance of csrow<id> */
883 err = kobject_set_name(&csrow->kobj,"csrow%d",index);
884 if (err)
885 goto error_exit;
886
887 /* Instanstiate the csrow object */
888 err = kobject_register(&csrow->kobj);
889 if (!err) {
890 /* Create the dyanmic attribute files on this csrow,
891 * namely, the DIMM labels and the channel ce_count
892 */
893 for (chan = 0; chan < csrow->nr_channels; chan++) {
894 err = edac_create_channel_files(&csrow->kobj,chan);
895 if (err)
896 break;
897 }
898 }
899
900error_exit:
901 return err;
902}
903
904/* default sysfs methods and data structures for the main MCI kobject */
905
906static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
907 const char *data, size_t count)
908{
909 int row, chan;
910
911 mci->ue_noinfo_count = 0;
912 mci->ce_noinfo_count = 0;
913 mci->ue_count = 0;
914 mci->ce_count = 0;
915
916 for (row = 0; row < mci->nr_csrows; row++) {
917 struct csrow_info *ri = &mci->csrows[row];
918
919 ri->ue_count = 0;
920 ri->ce_count = 0;
921
922 for (chan = 0; chan < ri->nr_channels; chan++)
923 ri->channels[chan].ce_count = 0;
924 }
925
926 mci->start_time = jiffies;
927 return count;
928}
929
930/* memory scrubbing */
931static ssize_t mci_sdram_scrub_rate_store(struct mem_ctl_info *mci,
932 const char *data, size_t count)
933{
934 u32 bandwidth = -1;
935
936 if (mci->set_sdram_scrub_rate) {
937
938 memctrl_int_store(&bandwidth, data, count);
939
940 if (!(*mci->set_sdram_scrub_rate)(mci, &bandwidth)) {
941 edac_printk(KERN_DEBUG, EDAC_MC,
942 "Scrub rate set successfully, applied: %d\n",
943 bandwidth);
944 } else {
945 /* FIXME: error codes maybe? */
946 edac_printk(KERN_DEBUG, EDAC_MC,
947 "Scrub rate set FAILED, could not apply: %d\n",
948 bandwidth);
949 }
950 } else {
951 /* FIXME: produce "not implemented" ERROR for user-side. */
952 edac_printk(KERN_WARNING, EDAC_MC,
953 "Memory scrubbing 'set'control is not implemented!\n");
954 }
955 return count;
956}
957
958static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data)
959{
960 u32 bandwidth = -1;
961
962 if (mci->get_sdram_scrub_rate) {
963 if (!(*mci->get_sdram_scrub_rate)(mci, &bandwidth)) {
964 edac_printk(KERN_DEBUG, EDAC_MC,
965 "Scrub rate successfully, fetched: %d\n",
966 bandwidth);
967 } else {
968 /* FIXME: error codes maybe? */
969 edac_printk(KERN_DEBUG, EDAC_MC,
970 "Scrub rate fetch FAILED, got: %d\n",
971 bandwidth);
972 }
973 } else {
974 /* FIXME: produce "not implemented" ERROR for user-side. */
975 edac_printk(KERN_WARNING, EDAC_MC,
976 "Memory scrubbing 'get' control is not implemented!\n");
977 }
978 return sprintf(data, "%d\n", bandwidth);
979}
980
981/* default attribute files for the MCI object */
982static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
983{
984 return sprintf(data,"%d\n", mci->ue_count);
985}
986
987static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
988{
989 return sprintf(data,"%d\n", mci->ce_count);
990}
991
992static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
993{
994 return sprintf(data,"%d\n", mci->ce_noinfo_count);
995}
996
997static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
998{
999 return sprintf(data,"%d\n", mci->ue_noinfo_count);
1000}
1001
1002static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
1003{
1004 return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
1005}
1006
1007static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
1008{
1009 return sprintf(data,"%s\n", mci->ctl_name);
1010}
1011
1012static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
1013{
1014 int total_pages, csrow_idx;
1015
1016 for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
1017 csrow_idx++) {
1018 struct csrow_info *csrow = &mci->csrows[csrow_idx];
1019
1020 if (!csrow->nr_pages)
1021 continue;
1022
1023 total_pages += csrow->nr_pages;
1024 }
1025
1026 return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
1027}
1028
1029struct mcidev_attribute {
1030 struct attribute attr;
1031 ssize_t (*show)(struct mem_ctl_info *,char *);
1032 ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
1033};
1034
1035#define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
1036#define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
1037
1038/* MCI show/store functions for top most object */
1039static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
1040 char *buffer)
1041{
1042 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
1043 struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
1044
1045 if (mcidev_attr->show)
1046 return mcidev_attr->show(mem_ctl_info, buffer);
1047
1048 return -EIO;
1049}
1050
1051static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
1052 const char *buffer, size_t count)
1053{
1054 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
1055 struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
1056
1057 if (mcidev_attr->store)
1058 return mcidev_attr->store(mem_ctl_info, buffer, count);
1059
1060 return -EIO;
1061}
1062
1063static struct sysfs_ops mci_ops = {
1064 .show = mcidev_show,
1065 .store = mcidev_store
1066};
1067
1068#define MCIDEV_ATTR(_name,_mode,_show,_store) \
1069struct mcidev_attribute mci_attr_##_name = { \
1070 .attr = {.name = __stringify(_name), .mode = _mode }, \
1071 .show = _show, \
1072 .store = _store, \
1073};
1074
1075/* default Control file */
1076MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
1077
1078/* default Attribute files */
1079MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
1080MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
1081MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
1082MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
1083MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
1084MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
1085MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
1086
1087/* memory scrubber attribute file */
1088MCIDEV_ATTR(sdram_scrub_rate,S_IRUGO|S_IWUSR,mci_sdram_scrub_rate_show,mci_sdram_scrub_rate_store);
1089
1090static struct mcidev_attribute *mci_attr[] = {
1091 &mci_attr_reset_counters,
1092 &mci_attr_mc_name,
1093 &mci_attr_size_mb,
1094 &mci_attr_seconds_since_reset,
1095 &mci_attr_ue_noinfo_count,
1096 &mci_attr_ce_noinfo_count,
1097 &mci_attr_ue_count,
1098 &mci_attr_ce_count,
1099 &mci_attr_sdram_scrub_rate,
1100 NULL
1101};
1102
1103/*
1104 * Release of a MC controlling instance
1105 */
1106static void edac_mci_instance_release(struct kobject *kobj)
1107{
1108 struct mem_ctl_info *mci;
1109
1110 mci = to_mci(kobj);
1111 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
1112 complete(&mci->kobj_complete);
1113}
1114
1115static struct kobj_type ktype_mci = {
1116 .release = edac_mci_instance_release,
1117 .sysfs_ops = &mci_ops,
1118 .default_attrs = (struct attribute **) mci_attr,
1119};
1120
1121
1122#define EDAC_DEVICE_SYMLINK "device"
1123
1124/*
1125 * Create a new Memory Controller kobject instance,
1126 * mc<id> under the 'mc' directory
1127 *
1128 * Return:
1129 * 0 Success
1130 * !0 Failure
1131 */
1132static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
1133{
1134 int i;
1135 int err;
1136 struct csrow_info *csrow;
1137 struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
1138
1139 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
1140 memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
1141
1142 /* set the name of the mc<id> object */
1143 err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
1144 if (err)
1145 return err;
1146
1147 /* link to our parent the '..../edac/mc' object */
1148 edac_mci_kobj->parent = &edac_memctrl_kobj;
1149 edac_mci_kobj->ktype = &ktype_mci;
1150
1151 /* register the mc<id> kobject */
1152 err = kobject_register(edac_mci_kobj);
1153 if (err)
1154 return err;
1155
1156 /* create a symlink for the device */
1157 err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj,
1158 EDAC_DEVICE_SYMLINK);
1159 if (err)
1160 goto fail0;
1161
1162 /* Make directories for each CSROW object
1163 * under the mc<id> kobject
1164 */
1165 for (i = 0; i < mci->nr_csrows; i++) {
1166 csrow = &mci->csrows[i];
1167
1168 /* Only expose populated CSROWs */
1169 if (csrow->nr_pages > 0) {
1170 err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
1171 if (err)
1172 goto fail1;
1173 }
1174 }
1175
1176 return 0;
1177
1178 /* CSROW error: backout what has already been registered, */
1179fail1:
1180 for ( i--; i >= 0; i--) {
1181 if (csrow->nr_pages > 0) {
1182 init_completion(&csrow->kobj_complete);
1183 kobject_unregister(&mci->csrows[i].kobj);
1184 wait_for_completion(&csrow->kobj_complete);
1185 }
1186 }
1187
1188fail0:
1189 init_completion(&mci->kobj_complete);
1190 kobject_unregister(edac_mci_kobj);
1191 wait_for_completion(&mci->kobj_complete);
1192 return err;
1193}
1194
1195/*
1196 * remove a Memory Controller instance
1197 */
1198static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1199{
1200 int i;
1201
1202 debugf0("%s()\n", __func__);
1203
1204 /* remove all csrow kobjects */
1205 for (i = 0; i < mci->nr_csrows; i++) {
1206 if (mci->csrows[i].nr_pages > 0) {
1207 init_completion(&mci->csrows[i].kobj_complete);
1208 kobject_unregister(&mci->csrows[i].kobj);
1209 wait_for_completion(&mci->csrows[i].kobj_complete);
1210 }
1211 }
1212
1213 sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
1214 init_completion(&mci->kobj_complete);
1215 kobject_unregister(&mci->edac_mci_kobj);
1216 wait_for_completion(&mci->kobj_complete);
1217}
1218
1219/* END OF sysfs data and methods */
1220
1221#ifdef CONFIG_EDAC_DEBUG 41#ifdef CONFIG_EDAC_DEBUG
1222 42
1223void edac_mc_dump_channel(struct channel_info *chan) 43static void edac_mc_dump_channel(struct channel_info *chan)
1224{ 44{
1225 debugf4("\tchannel = %p\n", chan); 45 debugf4("\tchannel = %p\n", chan);
1226 debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx); 46 debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
@@ -1228,25 +48,21 @@ void edac_mc_dump_channel(struct channel_info *chan)
1228 debugf4("\tchannel->label = '%s'\n", chan->label); 48 debugf4("\tchannel->label = '%s'\n", chan->label);
1229 debugf4("\tchannel->csrow = %p\n\n", chan->csrow); 49 debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
1230} 50}
1231EXPORT_SYMBOL_GPL(edac_mc_dump_channel);
1232 51
1233void edac_mc_dump_csrow(struct csrow_info *csrow) 52static void edac_mc_dump_csrow(struct csrow_info *csrow)
1234{ 53{
1235 debugf4("\tcsrow = %p\n", csrow); 54 debugf4("\tcsrow = %p\n", csrow);
1236 debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx); 55 debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
1237 debugf4("\tcsrow->first_page = 0x%lx\n", 56 debugf4("\tcsrow->first_page = 0x%lx\n", csrow->first_page);
1238 csrow->first_page);
1239 debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page); 57 debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
1240 debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask); 58 debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
1241 debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages); 59 debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
1242 debugf4("\tcsrow->nr_channels = %d\n", 60 debugf4("\tcsrow->nr_channels = %d\n", csrow->nr_channels);
1243 csrow->nr_channels);
1244 debugf4("\tcsrow->channels = %p\n", csrow->channels); 61 debugf4("\tcsrow->channels = %p\n", csrow->channels);
1245 debugf4("\tcsrow->mci = %p\n\n", csrow->mci); 62 debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
1246} 63}
1247EXPORT_SYMBOL_GPL(edac_mc_dump_csrow);
1248 64
1249void edac_mc_dump_mci(struct mem_ctl_info *mci) 65static void edac_mc_dump_mci(struct mem_ctl_info *mci)
1250{ 66{
1251 debugf3("\tmci = %p\n", mci); 67 debugf3("\tmci = %p\n", mci);
1252 debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap); 68 debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
@@ -1256,13 +72,11 @@ void edac_mc_dump_mci(struct mem_ctl_info *mci)
1256 debugf3("\tmci->nr_csrows = %d, csrows = %p\n", 72 debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
1257 mci->nr_csrows, mci->csrows); 73 mci->nr_csrows, mci->csrows);
1258 debugf3("\tdev = %p\n", mci->dev); 74 debugf3("\tdev = %p\n", mci->dev);
1259 debugf3("\tmod_name:ctl_name = %s:%s\n", 75 debugf3("\tmod_name:ctl_name = %s:%s\n", mci->mod_name, mci->ctl_name);
1260 mci->mod_name, mci->ctl_name);
1261 debugf3("\tpvt_info = %p\n\n", mci->pvt_info); 76 debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
1262} 77}
1263EXPORT_SYMBOL_GPL(edac_mc_dump_mci);
1264 78
1265#endif /* CONFIG_EDAC_DEBUG */ 79#endif /* CONFIG_EDAC_DEBUG */
1266 80
1267/* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'. 81/* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
1268 * Adjust 'ptr' so that its alignment is at least as stringent as what the 82 * Adjust 'ptr' so that its alignment is at least as stringent as what the
@@ -1271,7 +85,7 @@ EXPORT_SYMBOL_GPL(edac_mc_dump_mci);
1271 * If 'size' is a constant, the compiler will optimize this whole function 85 * If 'size' is a constant, the compiler will optimize this whole function
1272 * down to either a no-op or the addition of a constant to the value of 'ptr'. 86 * down to either a no-op or the addition of a constant to the value of 'ptr'.
1273 */ 87 */
1274static inline char * align_ptr(void *ptr, unsigned size) 88void *edac_align_ptr(void *ptr, unsigned size)
1275{ 89{
1276 unsigned align, r; 90 unsigned align, r;
1277 91
@@ -1288,14 +102,14 @@ static inline char * align_ptr(void *ptr, unsigned size)
1288 else if (size > sizeof(char)) 102 else if (size > sizeof(char))
1289 align = sizeof(short); 103 align = sizeof(short);
1290 else 104 else
1291 return (char *) ptr; 105 return (char *)ptr;
1292 106
1293 r = size % align; 107 r = size % align;
1294 108
1295 if (r == 0) 109 if (r == 0)
1296 return (char *) ptr; 110 return (char *)ptr;
1297 111
1298 return (char *) (((unsigned long) ptr) + align - r); 112 return (void *)(((unsigned long)ptr) + align - r);
1299} 113}
1300 114
1301/** 115/**
@@ -1315,7 +129,7 @@ static inline char * align_ptr(void *ptr, unsigned size)
1315 * struct mem_ctl_info pointer 129 * struct mem_ctl_info pointer
1316 */ 130 */
1317struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows, 131struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
1318 unsigned nr_chans) 132 unsigned nr_chans, int edac_index)
1319{ 133{
1320 struct mem_ctl_info *mci; 134 struct mem_ctl_info *mci;
1321 struct csrow_info *csi, *csrow; 135 struct csrow_info *csi, *csrow;
@@ -1323,30 +137,32 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
1323 void *pvt; 137 void *pvt;
1324 unsigned size; 138 unsigned size;
1325 int row, chn; 139 int row, chn;
140 int err;
1326 141
1327 /* Figure out the offsets of the various items from the start of an mc 142 /* Figure out the offsets of the various items from the start of an mc
1328 * structure. We want the alignment of each item to be at least as 143 * structure. We want the alignment of each item to be at least as
1329 * stringent as what the compiler would provide if we could simply 144 * stringent as what the compiler would provide if we could simply
1330 * hardcode everything into a single struct. 145 * hardcode everything into a single struct.
1331 */ 146 */
1332 mci = (struct mem_ctl_info *) 0; 147 mci = (struct mem_ctl_info *)0;
1333 csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi)); 148 csi = edac_align_ptr(&mci[1], sizeof(*csi));
1334 chi = (struct channel_info *) 149 chi = edac_align_ptr(&csi[nr_csrows], sizeof(*chi));
1335 align_ptr(&csi[nr_csrows], sizeof(*chi)); 150 pvt = edac_align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
1336 pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt); 151 size = ((unsigned long)pvt) + sz_pvt;
1337 size = ((unsigned long) pvt) + sz_pvt; 152
1338 153 mci = kzalloc(size, GFP_KERNEL);
1339 if ((mci = kmalloc(size, GFP_KERNEL)) == NULL) 154 if (mci == NULL)
1340 return NULL; 155 return NULL;
1341 156
1342 /* Adjust pointers so they point within the memory we just allocated 157 /* Adjust pointers so they point within the memory we just allocated
1343 * rather than an imaginary chunk of memory located at address 0. 158 * rather than an imaginary chunk of memory located at address 0.
1344 */ 159 */
1345 csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi)); 160 csi = (struct csrow_info *)(((char *)mci) + ((unsigned long)csi));
1346 chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi)); 161 chi = (struct channel_info *)(((char *)mci) + ((unsigned long)chi));
1347 pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL; 162 pvt = sz_pvt ? (((char *)mci) + ((unsigned long)pvt)) : NULL;
1348 163
1349 memset(mci, 0, size); /* clear all fields */ 164 /* setup index and various internal pointers */
165 mci->mc_idx = edac_index;
1350 mci->csrows = csi; 166 mci->csrows = csi;
1351 mci->pvt_info = pvt; 167 mci->pvt_info = pvt;
1352 mci->nr_csrows = nr_csrows; 168 mci->nr_csrows = nr_csrows;
@@ -1366,17 +182,35 @@ struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
1366 } 182 }
1367 } 183 }
1368 184
185 mci->op_state = OP_ALLOC;
186
187 /*
188 * Initialize the 'root' kobj for the edac_mc controller
189 */
190 err = edac_mc_register_sysfs_main_kobj(mci);
191 if (err) {
192 kfree(mci);
193 return NULL;
194 }
195
196 /* at this point, the root kobj is valid, and in order to
197 * 'free' the object, then the function:
198 * edac_mc_unregister_sysfs_main_kobj() must be called
199 * which will perform kobj unregistration and the actual free
200 * will occur during the kobject callback operation
201 */
1369 return mci; 202 return mci;
1370} 203}
1371EXPORT_SYMBOL_GPL(edac_mc_alloc); 204EXPORT_SYMBOL_GPL(edac_mc_alloc);
1372 205
1373/** 206/**
1374 * edac_mc_free: Free a previously allocated 'mci' structure 207 * edac_mc_free
208 * 'Free' a previously allocated 'mci' structure
1375 * @mci: pointer to a struct mem_ctl_info structure 209 * @mci: pointer to a struct mem_ctl_info structure
1376 */ 210 */
1377void edac_mc_free(struct mem_ctl_info *mci) 211void edac_mc_free(struct mem_ctl_info *mci)
1378{ 212{
1379 kfree(mci); 213 edac_mc_unregister_sysfs_main_kobj(mci);
1380} 214}
1381EXPORT_SYMBOL_GPL(edac_mc_free); 215EXPORT_SYMBOL_GPL(edac_mc_free);
1382 216
@@ -1397,18 +231,136 @@ static struct mem_ctl_info *find_mci_by_dev(struct device *dev)
1397 return NULL; 231 return NULL;
1398} 232}
1399 233
234/*
235 * handler for EDAC to check if NMI type handler has asserted interrupt
236 */
237static int edac_mc_assert_error_check_and_clear(void)
238{
239 int old_state;
240
241 if (edac_op_state == EDAC_OPSTATE_POLL)
242 return 1;
243
244 old_state = edac_err_assert;
245 edac_err_assert = 0;
246
247 return old_state;
248}
249
250/*
251 * edac_mc_workq_function
252 * performs the operation scheduled by a workq request
253 */
254static void edac_mc_workq_function(struct work_struct *work_req)
255{
256 struct delayed_work *d_work = (struct delayed_work *)work_req;
257 struct mem_ctl_info *mci = to_edac_mem_ctl_work(d_work);
258
259 mutex_lock(&mem_ctls_mutex);
260
261 /* if this control struct has movd to offline state, we are done */
262 if (mci->op_state == OP_OFFLINE) {
263 mutex_unlock(&mem_ctls_mutex);
264 return;
265 }
266
267 /* Only poll controllers that are running polled and have a check */
268 if (edac_mc_assert_error_check_and_clear() && (mci->edac_check != NULL))
269 mci->edac_check(mci);
270
271 /*
272 * FIXME: temp place holder for PCI checks,
273 * goes away when we break out PCI
274 */
275 edac_pci_do_parity_check();
276
277 mutex_unlock(&mem_ctls_mutex);
278
279 /* Reschedule */
280 queue_delayed_work(edac_workqueue, &mci->work,
281 msecs_to_jiffies(edac_mc_get_poll_msec()));
282}
283
284/*
285 * edac_mc_workq_setup
286 * initialize a workq item for this mci
287 * passing in the new delay period in msec
288 *
289 * locking model:
290 *
291 * called with the mem_ctls_mutex held
292 */
293static void edac_mc_workq_setup(struct mem_ctl_info *mci, unsigned msec)
294{
295 debugf0("%s()\n", __func__);
296
297 /* if this instance is not in the POLL state, then simply return */
298 if (mci->op_state != OP_RUNNING_POLL)
299 return;
300
301 INIT_DELAYED_WORK(&mci->work, edac_mc_workq_function);
302 queue_delayed_work(edac_workqueue, &mci->work, msecs_to_jiffies(msec));
303}
304
305/*
306 * edac_mc_workq_teardown
307 * stop the workq processing on this mci
308 *
309 * locking model:
310 *
311 * called WITHOUT lock held
312 */
313static void edac_mc_workq_teardown(struct mem_ctl_info *mci)
314{
315 int status;
316
317 /* if not running POLL, leave now */
318 if (mci->op_state == OP_RUNNING_POLL) {
319 status = cancel_delayed_work(&mci->work);
320 if (status == 0) {
321 debugf0("%s() not canceled, flush the queue\n",
322 __func__);
323
324 /* workq instance might be running, wait for it */
325 flush_workqueue(edac_workqueue);
326 }
327 }
328}
329
330/*
331 * edac_reset_delay_period
332 */
333static void edac_reset_delay_period(struct mem_ctl_info *mci, unsigned long value)
334{
335 /* cancel the current workq request */
336 edac_mc_workq_teardown(mci);
337
338 /* lock the list of devices for the new setup */
339 mutex_lock(&mem_ctls_mutex);
340
341 /* restart the workq request, with new delay value */
342 edac_mc_workq_setup(mci, value);
343
344 mutex_unlock(&mem_ctls_mutex);
345}
346
1400/* Return 0 on success, 1 on failure. 347/* Return 0 on success, 1 on failure.
1401 * Before calling this function, caller must 348 * Before calling this function, caller must
1402 * assign a unique value to mci->mc_idx. 349 * assign a unique value to mci->mc_idx.
350 *
351 * locking model:
352 *
353 * called with the mem_ctls_mutex lock held
1403 */ 354 */
1404static int add_mc_to_global_list (struct mem_ctl_info *mci) 355static int add_mc_to_global_list(struct mem_ctl_info *mci)
1405{ 356{
1406 struct list_head *item, *insert_before; 357 struct list_head *item, *insert_before;
1407 struct mem_ctl_info *p; 358 struct mem_ctl_info *p;
1408 359
1409 insert_before = &mc_devices; 360 insert_before = &mc_devices;
1410 361
1411 if (unlikely((p = find_mci_by_dev(mci->dev)) != NULL)) 362 p = find_mci_by_dev(mci->dev);
363 if (unlikely(p != NULL))
1412 goto fail0; 364 goto fail0;
1413 365
1414 list_for_each(item, &mc_devices) { 366 list_for_each(item, &mc_devices) {
@@ -1424,18 +376,19 @@ static int add_mc_to_global_list (struct mem_ctl_info *mci)
1424 } 376 }
1425 377
1426 list_add_tail_rcu(&mci->link, insert_before); 378 list_add_tail_rcu(&mci->link, insert_before);
379 atomic_inc(&edac_handlers);
1427 return 0; 380 return 0;
1428 381
1429fail0: 382fail0:
1430 edac_printk(KERN_WARNING, EDAC_MC, 383 edac_printk(KERN_WARNING, EDAC_MC,
1431 "%s (%s) %s %s already assigned %d\n", p->dev->bus_id, 384 "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
1432 dev_name(p->dev), p->mod_name, p->ctl_name, p->mc_idx); 385 dev_name(mci), p->mod_name, p->ctl_name, p->mc_idx);
1433 return 1; 386 return 1;
1434 387
1435fail1: 388fail1:
1436 edac_printk(KERN_WARNING, EDAC_MC, 389 edac_printk(KERN_WARNING, EDAC_MC,
1437 "bug in low-level driver: attempt to assign\n" 390 "bug in low-level driver: attempt to assign\n"
1438 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__); 391 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
1439 return 1; 392 return 1;
1440} 393}
1441 394
@@ -1450,6 +403,7 @@ static void complete_mc_list_del(struct rcu_head *head)
1450 403
1451static void del_mc_from_global_list(struct mem_ctl_info *mci) 404static void del_mc_from_global_list(struct mem_ctl_info *mci)
1452{ 405{
406 atomic_dec(&edac_handlers);
1453 list_del_rcu(&mci->link); 407 list_del_rcu(&mci->link);
1454 init_completion(&mci->complete); 408 init_completion(&mci->complete);
1455 call_rcu(&mci->rcu, complete_mc_list_del); 409 call_rcu(&mci->rcu, complete_mc_list_del);
@@ -1457,6 +411,34 @@ static void del_mc_from_global_list(struct mem_ctl_info *mci)
1457} 411}
1458 412
1459/** 413/**
414 * edac_mc_find: Search for a mem_ctl_info structure whose index is 'idx'.
415 *
416 * If found, return a pointer to the structure.
417 * Else return NULL.
418 *
419 * Caller must hold mem_ctls_mutex.
420 */
421struct mem_ctl_info *edac_mc_find(int idx)
422{
423 struct list_head *item;
424 struct mem_ctl_info *mci;
425
426 list_for_each(item, &mc_devices) {
427 mci = list_entry(item, struct mem_ctl_info, link);
428
429 if (mci->mc_idx >= idx) {
430 if (mci->mc_idx == idx)
431 return mci;
432
433 break;
434 }
435 }
436
437 return NULL;
438}
439EXPORT_SYMBOL(edac_mc_find);
440
441/**
1460 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and 442 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
1461 * create sysfs entries associated with mci structure 443 * create sysfs entries associated with mci structure
1462 * @mci: pointer to the mci structure to be added to the list 444 * @mci: pointer to the mci structure to be added to the list
@@ -1468,10 +450,10 @@ static void del_mc_from_global_list(struct mem_ctl_info *mci)
1468 */ 450 */
1469 451
1470/* FIXME - should a warning be printed if no error detection? correction? */ 452/* FIXME - should a warning be printed if no error detection? correction? */
1471int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx) 453int edac_mc_add_mc(struct mem_ctl_info *mci)
1472{ 454{
1473 debugf0("%s()\n", __func__); 455 debugf0("%s()\n", __func__);
1474 mci->mc_idx = mc_idx; 456
1475#ifdef CONFIG_EDAC_DEBUG 457#ifdef CONFIG_EDAC_DEBUG
1476 if (edac_debug_level >= 3) 458 if (edac_debug_level >= 3)
1477 edac_mc_dump_mci(mci); 459 edac_mc_dump_mci(mci);
@@ -1484,12 +466,12 @@ int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
1484 466
1485 edac_mc_dump_csrow(&mci->csrows[i]); 467 edac_mc_dump_csrow(&mci->csrows[i]);
1486 for (j = 0; j < mci->csrows[i].nr_channels; j++) 468 for (j = 0; j < mci->csrows[i].nr_channels; j++)
1487 edac_mc_dump_channel( 469 edac_mc_dump_channel(&mci->csrows[i].
1488 &mci->csrows[i].channels[j]); 470 channels[j]);
1489 } 471 }
1490 } 472 }
1491#endif 473#endif
1492 down(&mem_ctls_mutex); 474 mutex_lock(&mem_ctls_mutex);
1493 475
1494 if (add_mc_to_global_list(mci)) 476 if (add_mc_to_global_list(mci))
1495 goto fail0; 477 goto fail0;
@@ -1503,18 +485,28 @@ int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
1503 goto fail1; 485 goto fail1;
1504 } 486 }
1505 487
488 /* If there IS a check routine, then we are running POLLED */
489 if (mci->edac_check != NULL) {
490 /* This instance is NOW RUNNING */
491 mci->op_state = OP_RUNNING_POLL;
492
493 edac_mc_workq_setup(mci, edac_mc_get_poll_msec());
494 } else {
495 mci->op_state = OP_RUNNING_INTERRUPT;
496 }
497
1506 /* Report action taken */ 498 /* Report action taken */
1507 edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n", 499 edac_mc_printk(mci, KERN_INFO, "Giving out device to '%s' '%s':"
1508 mci->mod_name, mci->ctl_name, dev_name(mci->dev)); 500 " DEV %s\n", mci->mod_name, mci->ctl_name, dev_name(mci));
1509 501
1510 up(&mem_ctls_mutex); 502 mutex_unlock(&mem_ctls_mutex);
1511 return 0; 503 return 0;
1512 504
1513fail1: 505fail1:
1514 del_mc_from_global_list(mci); 506 del_mc_from_global_list(mci);
1515 507
1516fail0: 508fail0:
1517 up(&mem_ctls_mutex); 509 mutex_unlock(&mem_ctls_mutex);
1518 return 1; 510 return 1;
1519} 511}
1520EXPORT_SYMBOL_GPL(edac_mc_add_mc); 512EXPORT_SYMBOL_GPL(edac_mc_add_mc);
@@ -1526,29 +518,41 @@ EXPORT_SYMBOL_GPL(edac_mc_add_mc);
1526 * 518 *
1527 * Return pointer to removed mci structure, or NULL if device not found. 519 * Return pointer to removed mci structure, or NULL if device not found.
1528 */ 520 */
1529struct mem_ctl_info * edac_mc_del_mc(struct device *dev) 521struct mem_ctl_info *edac_mc_del_mc(struct device *dev)
1530{ 522{
1531 struct mem_ctl_info *mci; 523 struct mem_ctl_info *mci;
1532 524
1533 debugf0("MC: %s()\n", __func__); 525 debugf0("%s()\n", __func__);
1534 down(&mem_ctls_mutex); 526
527 mutex_lock(&mem_ctls_mutex);
1535 528
1536 if ((mci = find_mci_by_dev(dev)) == NULL) { 529 /* find the requested mci struct in the global list */
1537 up(&mem_ctls_mutex); 530 mci = find_mci_by_dev(dev);
531 if (mci == NULL) {
532 mutex_unlock(&mem_ctls_mutex);
1538 return NULL; 533 return NULL;
1539 } 534 }
1540 535
1541 edac_remove_sysfs_mci_device(mci); 536 /* marking MCI offline */
537 mci->op_state = OP_OFFLINE;
538
1542 del_mc_from_global_list(mci); 539 del_mc_from_global_list(mci);
1543 up(&mem_ctls_mutex); 540 mutex_unlock(&mem_ctls_mutex);
541
542 /* flush workq processes and remove sysfs */
543 edac_mc_workq_teardown(mci);
544 edac_remove_sysfs_mci_device(mci);
545
1544 edac_printk(KERN_INFO, EDAC_MC, 546 edac_printk(KERN_INFO, EDAC_MC,
1545 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx, 547 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
1546 mci->mod_name, mci->ctl_name, dev_name(mci->dev)); 548 mci->mod_name, mci->ctl_name, dev_name(mci));
549
1547 return mci; 550 return mci;
1548} 551}
1549EXPORT_SYMBOL_GPL(edac_mc_del_mc); 552EXPORT_SYMBOL_GPL(edac_mc_del_mc);
1550 553
1551void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size) 554static void edac_mc_scrub_block(unsigned long page, unsigned long offset,
555 u32 size)
1552{ 556{
1553 struct page *pg; 557 struct page *pg;
1554 void *virt_addr; 558 void *virt_addr;
@@ -1557,7 +561,7 @@ void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size)
1557 debugf3("%s()\n", __func__); 561 debugf3("%s()\n", __func__);
1558 562
1559 /* ECC error page was not in our memory. Ignore it. */ 563 /* ECC error page was not in our memory. Ignore it. */
1560 if(!pfn_valid(page)) 564 if (!pfn_valid(page))
1561 return; 565 return;
1562 566
1563 /* Find the actual page structure then map it and fix */ 567 /* Find the actual page structure then map it and fix */
@@ -1577,7 +581,6 @@ void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size)
1577 if (PageHighMem(pg)) 581 if (PageHighMem(pg))
1578 local_irq_restore(flags); 582 local_irq_restore(flags);
1579} 583}
1580EXPORT_SYMBOL_GPL(edac_mc_scrub_block);
1581 584
1582/* FIXME - should return -1 */ 585/* FIXME - should return -1 */
1583int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page) 586int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
@@ -1611,7 +614,7 @@ int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
1611 if (row == -1) 614 if (row == -1)
1612 edac_mc_printk(mci, KERN_ERR, 615 edac_mc_printk(mci, KERN_ERR,
1613 "could not look up page error address %lx\n", 616 "could not look up page error address %lx\n",
1614 (unsigned long) page); 617 (unsigned long)page);
1615 618
1616 return row; 619 return row;
1617} 620}
@@ -1620,8 +623,9 @@ EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
1620/* FIXME - setable log (warning/emerg) levels */ 623/* FIXME - setable log (warning/emerg) levels */
1621/* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */ 624/* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
1622void edac_mc_handle_ce(struct mem_ctl_info *mci, 625void edac_mc_handle_ce(struct mem_ctl_info *mci,
1623 unsigned long page_frame_number, unsigned long offset_in_page, 626 unsigned long page_frame_number,
1624 unsigned long syndrome, int row, int channel, const char *msg) 627 unsigned long offset_in_page, unsigned long syndrome,
628 int row, int channel, const char *msg)
1625{ 629{
1626 unsigned long remapped_page; 630 unsigned long remapped_page;
1627 631
@@ -1647,7 +651,7 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci,
1647 return; 651 return;
1648 } 652 }
1649 653
1650 if (log_ce) 654 if (edac_mc_get_log_ce())
1651 /* FIXME - put in DIMM location */ 655 /* FIXME - put in DIMM location */
1652 edac_mc_printk(mci, KERN_WARNING, 656 edac_mc_printk(mci, KERN_WARNING,
1653 "CE page 0x%lx, offset 0x%lx, grain %d, syndrome " 657 "CE page 0x%lx, offset 0x%lx, grain %d, syndrome "
@@ -1671,18 +675,18 @@ void edac_mc_handle_ce(struct mem_ctl_info *mci,
1671 * page - which can then be scrubbed. 675 * page - which can then be scrubbed.
1672 */ 676 */
1673 remapped_page = mci->ctl_page_to_phys ? 677 remapped_page = mci->ctl_page_to_phys ?
1674 mci->ctl_page_to_phys(mci, page_frame_number) : 678 mci->ctl_page_to_phys(mci, page_frame_number) :
1675 page_frame_number; 679 page_frame_number;
1676 680
1677 edac_mc_scrub_block(remapped_page, offset_in_page, 681 edac_mc_scrub_block(remapped_page, offset_in_page,
1678 mci->csrows[row].grain); 682 mci->csrows[row].grain);
1679 } 683 }
1680} 684}
1681EXPORT_SYMBOL_GPL(edac_mc_handle_ce); 685EXPORT_SYMBOL_GPL(edac_mc_handle_ce);
1682 686
1683void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg) 687void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)
1684{ 688{
1685 if (log_ce) 689 if (edac_mc_get_log_ce())
1686 edac_mc_printk(mci, KERN_WARNING, 690 edac_mc_printk(mci, KERN_WARNING,
1687 "CE - no information available: %s\n", msg); 691 "CE - no information available: %s\n", msg);
1688 692
@@ -1692,8 +696,8 @@ void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)
1692EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info); 696EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info);
1693 697
1694void edac_mc_handle_ue(struct mem_ctl_info *mci, 698void edac_mc_handle_ue(struct mem_ctl_info *mci,
1695 unsigned long page_frame_number, unsigned long offset_in_page, 699 unsigned long page_frame_number,
1696 int row, const char *msg) 700 unsigned long offset_in_page, int row, const char *msg)
1697{ 701{
1698 int len = EDAC_MC_LABEL_LEN * 4; 702 int len = EDAC_MC_LABEL_LEN * 4;
1699 char labels[len + 1]; 703 char labels[len + 1];
@@ -1714,26 +718,26 @@ void edac_mc_handle_ue(struct mem_ctl_info *mci,
1714 } 718 }
1715 719
1716 chars = snprintf(pos, len + 1, "%s", 720 chars = snprintf(pos, len + 1, "%s",
1717 mci->csrows[row].channels[0].label); 721 mci->csrows[row].channels[0].label);
1718 len -= chars; 722 len -= chars;
1719 pos += chars; 723 pos += chars;
1720 724
1721 for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0); 725 for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
1722 chan++) { 726 chan++) {
1723 chars = snprintf(pos, len + 1, ":%s", 727 chars = snprintf(pos, len + 1, ":%s",
1724 mci->csrows[row].channels[chan].label); 728 mci->csrows[row].channels[chan].label);
1725 len -= chars; 729 len -= chars;
1726 pos += chars; 730 pos += chars;
1727 } 731 }
1728 732
1729 if (log_ue) 733 if (edac_mc_get_log_ue())
1730 edac_mc_printk(mci, KERN_EMERG, 734 edac_mc_printk(mci, KERN_EMERG,
1731 "UE page 0x%lx, offset 0x%lx, grain %d, row %d, " 735 "UE page 0x%lx, offset 0x%lx, grain %d, row %d, "
1732 "labels \"%s\": %s\n", page_frame_number, 736 "labels \"%s\": %s\n", page_frame_number,
1733 offset_in_page, mci->csrows[row].grain, row, labels, 737 offset_in_page, mci->csrows[row].grain, row,
1734 msg); 738 labels, msg);
1735 739
1736 if (panic_on_ue) 740 if (edac_mc_get_panic_on_ue())
1737 panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, " 741 panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, "
1738 "row %d, labels \"%s\": %s\n", mci->mc_idx, 742 "row %d, labels \"%s\": %s\n", mci->mc_idx,
1739 page_frame_number, offset_in_page, 743 page_frame_number, offset_in_page,
@@ -1746,10 +750,10 @@ EXPORT_SYMBOL_GPL(edac_mc_handle_ue);
1746 750
1747void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg) 751void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
1748{ 752{
1749 if (panic_on_ue) 753 if (edac_mc_get_panic_on_ue())
1750 panic("EDAC MC%d: Uncorrected Error", mci->mc_idx); 754 panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
1751 755
1752 if (log_ue) 756 if (edac_mc_get_log_ue())
1753 edac_mc_printk(mci, KERN_WARNING, 757 edac_mc_printk(mci, KERN_WARNING,
1754 "UE - no information available: %s\n", msg); 758 "UE - no information available: %s\n", msg);
1755 mci->ue_noinfo_count++; 759 mci->ue_noinfo_count++;
@@ -1757,16 +761,14 @@ void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
1757} 761}
1758EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info); 762EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
1759 763
1760
1761/************************************************************* 764/*************************************************************
1762 * On Fully Buffered DIMM modules, this help function is 765 * On Fully Buffered DIMM modules, this help function is
1763 * called to process UE events 766 * called to process UE events
1764 */ 767 */
1765void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci, 768void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci,
1766 unsigned int csrow, 769 unsigned int csrow,
1767 unsigned int channela, 770 unsigned int channela,
1768 unsigned int channelb, 771 unsigned int channelb, char *msg)
1769 char *msg)
1770{ 772{
1771 int len = EDAC_MC_LABEL_LEN * 4; 773 int len = EDAC_MC_LABEL_LEN * 4;
1772 char labels[len + 1]; 774 char labels[len + 1];
@@ -1808,20 +810,21 @@ void edac_mc_handle_fbd_ue(struct mem_ctl_info *mci,
1808 /* Generate the DIMM labels from the specified channels */ 810 /* Generate the DIMM labels from the specified channels */
1809 chars = snprintf(pos, len + 1, "%s", 811 chars = snprintf(pos, len + 1, "%s",
1810 mci->csrows[csrow].channels[channela].label); 812 mci->csrows[csrow].channels[channela].label);
1811 len -= chars; pos += chars; 813 len -= chars;
814 pos += chars;
1812 chars = snprintf(pos, len + 1, "-%s", 815 chars = snprintf(pos, len + 1, "-%s",
1813 mci->csrows[csrow].channels[channelb].label); 816 mci->csrows[csrow].channels[channelb].label);
1814 817
1815 if (log_ue) 818 if (edac_mc_get_log_ue())
1816 edac_mc_printk(mci, KERN_EMERG, 819 edac_mc_printk(mci, KERN_EMERG,
1817 "UE row %d, channel-a= %d channel-b= %d " 820 "UE row %d, channel-a= %d channel-b= %d "
1818 "labels \"%s\": %s\n", csrow, channela, channelb, 821 "labels \"%s\": %s\n", csrow, channela, channelb,
1819 labels, msg); 822 labels, msg);
1820 823
1821 if (panic_on_ue) 824 if (edac_mc_get_panic_on_ue())
1822 panic("UE row %d, channel-a= %d channel-b= %d " 825 panic("UE row %d, channel-a= %d channel-b= %d "
1823 "labels \"%s\": %s\n", csrow, channela, 826 "labels \"%s\": %s\n", csrow, channela,
1824 channelb, labels, msg); 827 channelb, labels, msg);
1825} 828}
1826EXPORT_SYMBOL(edac_mc_handle_fbd_ue); 829EXPORT_SYMBOL(edac_mc_handle_fbd_ue);
1827 830
@@ -1830,9 +833,7 @@ EXPORT_SYMBOL(edac_mc_handle_fbd_ue);
1830 * called to process CE events 833 * called to process CE events
1831 */ 834 */
1832void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci, 835void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci,
1833 unsigned int csrow, 836 unsigned int csrow, unsigned int channel, char *msg)
1834 unsigned int channel,
1835 char *msg)
1836{ 837{
1837 838
1838 /* Ensure boundary values */ 839 /* Ensure boundary values */
@@ -1853,13 +854,12 @@ void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci,
1853 return; 854 return;
1854 } 855 }
1855 856
1856 if (log_ce) 857 if (edac_mc_get_log_ce())
1857 /* FIXME - put in DIMM location */ 858 /* FIXME - put in DIMM location */
1858 edac_mc_printk(mci, KERN_WARNING, 859 edac_mc_printk(mci, KERN_WARNING,
1859 "CE row %d, channel %d, label \"%s\": %s\n", 860 "CE row %d, channel %d, label \"%s\": %s\n",
1860 csrow, channel, 861 csrow, channel,
1861 mci->csrows[csrow].channels[channel].label, 862 mci->csrows[csrow].channels[channel].label, msg);
1862 msg);
1863 863
1864 mci->ce_count++; 864 mci->ce_count++;
1865 mci->csrows[csrow].ce_count++; 865 mci->csrows[csrow].ce_count++;
@@ -1867,17 +867,16 @@ void edac_mc_handle_fbd_ce(struct mem_ctl_info *mci,
1867} 867}
1868EXPORT_SYMBOL(edac_mc_handle_fbd_ce); 868EXPORT_SYMBOL(edac_mc_handle_fbd_ce);
1869 869
1870
1871/* 870/*
1872 * Iterate over all MC instances and check for ECC, et al, errors 871 * Iterate over all MC instances and check for ECC, et al, errors
1873 */ 872 */
1874static inline void check_mc_devices(void) 873void edac_check_mc_devices(void)
1875{ 874{
1876 struct list_head *item; 875 struct list_head *item;
1877 struct mem_ctl_info *mci; 876 struct mem_ctl_info *mci;
1878 877
1879 debugf3("%s()\n", __func__); 878 debugf3("%s()\n", __func__);
1880 down(&mem_ctls_mutex); 879 mutex_lock(&mem_ctls_mutex);
1881 880
1882 list_for_each(item, &mc_devices) { 881 list_for_each(item, &mc_devices) {
1883 mci = list_entry(item, struct mem_ctl_info, link); 882 mci = list_entry(item, struct mem_ctl_info, link);
@@ -1886,120 +885,5 @@ static inline void check_mc_devices(void)
1886 mci->edac_check(mci); 885 mci->edac_check(mci);
1887 } 886 }
1888 887
1889 up(&mem_ctls_mutex); 888 mutex_unlock(&mem_ctls_mutex);
1890}
1891
1892/*
1893 * Check MC status every poll_msec.
1894 * Check PCI status every poll_msec as well.
1895 *
1896 * This where the work gets done for edac.
1897 *
1898 * SMP safe, doesn't use NMI, and auto-rate-limits.
1899 */
1900static void do_edac_check(void)
1901{
1902 debugf3("%s()\n", __func__);
1903 check_mc_devices();
1904 do_pci_parity_check();
1905}
1906
1907static int edac_kernel_thread(void *arg)
1908{
1909 set_freezable();
1910 while (!kthread_should_stop()) {
1911 do_edac_check();
1912
1913 /* goto sleep for the interval */
1914 schedule_timeout_interruptible((HZ * poll_msec) / 1000);
1915 try_to_freeze();
1916 }
1917
1918 return 0;
1919} 889}
1920
1921/*
1922 * edac_mc_init
1923 * module initialization entry point
1924 */
1925static int __init edac_mc_init(void)
1926{
1927 edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n");
1928
1929 /*
1930 * Harvest and clear any boot/initialization PCI parity errors
1931 *
1932 * FIXME: This only clears errors logged by devices present at time of
1933 * module initialization. We should also do an initial clear
1934 * of each newly hotplugged device.
1935 */
1936 clear_pci_parity_errors();
1937
1938 /* Create the MC sysfs entries */
1939 if (edac_sysfs_memctrl_setup()) {
1940 edac_printk(KERN_ERR, EDAC_MC,
1941 "Error initializing sysfs code\n");
1942 return -ENODEV;
1943 }
1944
1945 /* Create the PCI parity sysfs entries */
1946 if (edac_sysfs_pci_setup()) {
1947 edac_sysfs_memctrl_teardown();
1948 edac_printk(KERN_ERR, EDAC_MC,
1949 "EDAC PCI: Error initializing sysfs code\n");
1950 return -ENODEV;
1951 }
1952
1953 /* create our kernel thread */
1954 edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac");
1955
1956 if (IS_ERR(edac_thread)) {
1957 /* remove the sysfs entries */
1958 edac_sysfs_memctrl_teardown();
1959 edac_sysfs_pci_teardown();
1960 return PTR_ERR(edac_thread);
1961 }
1962
1963 return 0;
1964}
1965
1966/*
1967 * edac_mc_exit()
1968 * module exit/termination functioni
1969 */
1970static void __exit edac_mc_exit(void)
1971{
1972 debugf0("%s()\n", __func__);
1973 kthread_stop(edac_thread);
1974
1975 /* tear down the sysfs device */
1976 edac_sysfs_memctrl_teardown();
1977 edac_sysfs_pci_teardown();
1978}
1979
1980module_init(edac_mc_init);
1981module_exit(edac_mc_exit);
1982
1983MODULE_LICENSE("GPL");
1984MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
1985 "Based on work by Dan Hollis et al");
1986MODULE_DESCRIPTION("Core library routines for MC reporting");
1987
1988module_param(panic_on_ue, int, 0644);
1989MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
1990#ifdef CONFIG_PCI
1991module_param(check_pci_parity, int, 0644);
1992MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
1993module_param(panic_on_pci_parity, int, 0644);
1994MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
1995#endif
1996module_param(log_ue, int, 0644);
1997MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
1998module_param(log_ce, int, 0644);
1999MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
2000module_param(poll_msec, int, 0644);
2001MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
2002#ifdef CONFIG_EDAC_DEBUG
2003module_param(edac_debug_level, int, 0644);
2004MODULE_PARM_DESC(edac_debug_level, "Debug level");
2005#endif
diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c
new file mode 100644
index 0000000000..cd090b0677
--- /dev/null
+++ b/drivers/edac/edac_mc_sysfs.c
@@ -0,0 +1,1024 @@
1/*
2 * edac_mc kernel module
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
4 *
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
9 *
10 */
11
12#include <linux/ctype.h>
13#include <linux/bug.h>
14
15#include "edac_core.h"
16#include "edac_module.h"
17
18
19/* MC EDAC Controls, setable by module parameter, and sysfs */
20static int edac_mc_log_ue = 1;
21static int edac_mc_log_ce = 1;
22static int edac_mc_panic_on_ue;
23static int edac_mc_poll_msec = 1000;
24
25/* Getter functions for above */
26int edac_mc_get_log_ue(void)
27{
28 return edac_mc_log_ue;
29}
30
31int edac_mc_get_log_ce(void)
32{
33 return edac_mc_log_ce;
34}
35
36int edac_mc_get_panic_on_ue(void)
37{
38 return edac_mc_panic_on_ue;
39}
40
41/* this is temporary */
42int edac_mc_get_poll_msec(void)
43{
44 return edac_mc_poll_msec;
45}
46
47/* Parameter declarations for above */
48module_param(edac_mc_panic_on_ue, int, 0644);
49MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
50module_param(edac_mc_log_ue, int, 0644);
51MODULE_PARM_DESC(edac_mc_log_ue,
52 "Log uncorrectable error to console: 0=off 1=on");
53module_param(edac_mc_log_ce, int, 0644);
54MODULE_PARM_DESC(edac_mc_log_ce,
55 "Log correctable error to console: 0=off 1=on");
56module_param(edac_mc_poll_msec, int, 0644);
57MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
58
59/*
60 * various constants for Memory Controllers
61 */
62static const char *mem_types[] = {
63 [MEM_EMPTY] = "Empty",
64 [MEM_RESERVED] = "Reserved",
65 [MEM_UNKNOWN] = "Unknown",
66 [MEM_FPM] = "FPM",
67 [MEM_EDO] = "EDO",
68 [MEM_BEDO] = "BEDO",
69 [MEM_SDR] = "Unbuffered-SDR",
70 [MEM_RDR] = "Registered-SDR",
71 [MEM_DDR] = "Unbuffered-DDR",
72 [MEM_RDDR] = "Registered-DDR",
73 [MEM_RMBS] = "RMBS",
74 [MEM_DDR2] = "Unbuffered-DDR2",
75 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
76 [MEM_RDDR2] = "Registered-DDR2"
77};
78
79static const char *dev_types[] = {
80 [DEV_UNKNOWN] = "Unknown",
81 [DEV_X1] = "x1",
82 [DEV_X2] = "x2",
83 [DEV_X4] = "x4",
84 [DEV_X8] = "x8",
85 [DEV_X16] = "x16",
86 [DEV_X32] = "x32",
87 [DEV_X64] = "x64"
88};
89
90static const char *edac_caps[] = {
91 [EDAC_UNKNOWN] = "Unknown",
92 [EDAC_NONE] = "None",
93 [EDAC_RESERVED] = "Reserved",
94 [EDAC_PARITY] = "PARITY",
95 [EDAC_EC] = "EC",
96 [EDAC_SECDED] = "SECDED",
97 [EDAC_S2ECD2ED] = "S2ECD2ED",
98 [EDAC_S4ECD4ED] = "S4ECD4ED",
99 [EDAC_S8ECD8ED] = "S8ECD8ED",
100 [EDAC_S16ECD16ED] = "S16ECD16ED"
101};
102
103
104
105/*
106 * /sys/devices/system/edac/mc;
107 * data structures and methods
108 */
109static ssize_t memctrl_int_show(void *ptr, char *buffer)
110{
111 int *value = (int *)ptr;
112 return sprintf(buffer, "%u\n", *value);
113}
114
115static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
116{
117 int *value = (int *)ptr;
118
119 if (isdigit(*buffer))
120 *value = simple_strtoul(buffer, NULL, 0);
121
122 return count;
123}
124
125
126/* EDAC sysfs CSROW data structures and methods
127 */
128
129/* Set of more default csrow<id> attribute show/store functions */
130static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data,
131 int private)
132{
133 return sprintf(data, "%u\n", csrow->ue_count);
134}
135
136static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data,
137 int private)
138{
139 return sprintf(data, "%u\n", csrow->ce_count);
140}
141
142static ssize_t csrow_size_show(struct csrow_info *csrow, char *data,
143 int private)
144{
145 return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages));
146}
147
148static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data,
149 int private)
150{
151 return sprintf(data, "%s\n", mem_types[csrow->mtype]);
152}
153
154static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data,
155 int private)
156{
157 return sprintf(data, "%s\n", dev_types[csrow->dtype]);
158}
159
160static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data,
161 int private)
162{
163 return sprintf(data, "%s\n", edac_caps[csrow->edac_mode]);
164}
165
166/* show/store functions for DIMM Label attributes */
167static ssize_t channel_dimm_label_show(struct csrow_info *csrow,
168 char *data, int channel)
169{
170 return snprintf(data, EDAC_MC_LABEL_LEN, "%s",
171 csrow->channels[channel].label);
172}
173
174static ssize_t channel_dimm_label_store(struct csrow_info *csrow,
175 const char *data,
176 size_t count, int channel)
177{
178 ssize_t max_size = 0;
179
180 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
181 strncpy(csrow->channels[channel].label, data, max_size);
182 csrow->channels[channel].label[max_size] = '\0';
183
184 return max_size;
185}
186
187/* show function for dynamic chX_ce_count attribute */
188static ssize_t channel_ce_count_show(struct csrow_info *csrow,
189 char *data, int channel)
190{
191 return sprintf(data, "%u\n", csrow->channels[channel].ce_count);
192}
193
194/* csrow specific attribute structure */
195struct csrowdev_attribute {
196 struct attribute attr;
197 ssize_t(*show) (struct csrow_info *, char *, int);
198 ssize_t(*store) (struct csrow_info *, const char *, size_t, int);
199 int private;
200};
201
202#define to_csrow(k) container_of(k, struct csrow_info, kobj)
203#define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
204
205/* Set of show/store higher level functions for default csrow attributes */
206static ssize_t csrowdev_show(struct kobject *kobj,
207 struct attribute *attr, char *buffer)
208{
209 struct csrow_info *csrow = to_csrow(kobj);
210 struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
211
212 if (csrowdev_attr->show)
213 return csrowdev_attr->show(csrow,
214 buffer, csrowdev_attr->private);
215 return -EIO;
216}
217
218static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
219 const char *buffer, size_t count)
220{
221 struct csrow_info *csrow = to_csrow(kobj);
222 struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
223
224 if (csrowdev_attr->store)
225 return csrowdev_attr->store(csrow,
226 buffer,
227 count, csrowdev_attr->private);
228 return -EIO;
229}
230
231static struct sysfs_ops csrowfs_ops = {
232 .show = csrowdev_show,
233 .store = csrowdev_store
234};
235
236#define CSROWDEV_ATTR(_name,_mode,_show,_store,_private) \
237static struct csrowdev_attribute attr_##_name = { \
238 .attr = {.name = __stringify(_name), .mode = _mode }, \
239 .show = _show, \
240 .store = _store, \
241 .private = _private, \
242};
243
244/* default cwrow<id>/attribute files */
245CSROWDEV_ATTR(size_mb, S_IRUGO, csrow_size_show, NULL, 0);
246CSROWDEV_ATTR(dev_type, S_IRUGO, csrow_dev_type_show, NULL, 0);
247CSROWDEV_ATTR(mem_type, S_IRUGO, csrow_mem_type_show, NULL, 0);
248CSROWDEV_ATTR(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL, 0);
249CSROWDEV_ATTR(ue_count, S_IRUGO, csrow_ue_count_show, NULL, 0);
250CSROWDEV_ATTR(ce_count, S_IRUGO, csrow_ce_count_show, NULL, 0);
251
252/* default attributes of the CSROW<id> object */
253static struct csrowdev_attribute *default_csrow_attr[] = {
254 &attr_dev_type,
255 &attr_mem_type,
256 &attr_edac_mode,
257 &attr_size_mb,
258 &attr_ue_count,
259 &attr_ce_count,
260 NULL,
261};
262
263/* possible dynamic channel DIMM Label attribute files */
264CSROWDEV_ATTR(ch0_dimm_label, S_IRUGO | S_IWUSR,
265 channel_dimm_label_show, channel_dimm_label_store, 0);
266CSROWDEV_ATTR(ch1_dimm_label, S_IRUGO | S_IWUSR,
267 channel_dimm_label_show, channel_dimm_label_store, 1);
268CSROWDEV_ATTR(ch2_dimm_label, S_IRUGO | S_IWUSR,
269 channel_dimm_label_show, channel_dimm_label_store, 2);
270CSROWDEV_ATTR(ch3_dimm_label, S_IRUGO | S_IWUSR,
271 channel_dimm_label_show, channel_dimm_label_store, 3);
272CSROWDEV_ATTR(ch4_dimm_label, S_IRUGO | S_IWUSR,
273 channel_dimm_label_show, channel_dimm_label_store, 4);
274CSROWDEV_ATTR(ch5_dimm_label, S_IRUGO | S_IWUSR,
275 channel_dimm_label_show, channel_dimm_label_store, 5);
276
277/* Total possible dynamic DIMM Label attribute file table */
278static struct csrowdev_attribute *dynamic_csrow_dimm_attr[] = {
279 &attr_ch0_dimm_label,
280 &attr_ch1_dimm_label,
281 &attr_ch2_dimm_label,
282 &attr_ch3_dimm_label,
283 &attr_ch4_dimm_label,
284 &attr_ch5_dimm_label
285};
286
287/* possible dynamic channel ce_count attribute files */
288CSROWDEV_ATTR(ch0_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 0);
289CSROWDEV_ATTR(ch1_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 1);
290CSROWDEV_ATTR(ch2_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 2);
291CSROWDEV_ATTR(ch3_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 3);
292CSROWDEV_ATTR(ch4_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 4);
293CSROWDEV_ATTR(ch5_ce_count, S_IRUGO | S_IWUSR, channel_ce_count_show, NULL, 5);
294
295/* Total possible dynamic ce_count attribute file table */
296static struct csrowdev_attribute *dynamic_csrow_ce_count_attr[] = {
297 &attr_ch0_ce_count,
298 &attr_ch1_ce_count,
299 &attr_ch2_ce_count,
300 &attr_ch3_ce_count,
301 &attr_ch4_ce_count,
302 &attr_ch5_ce_count
303};
304
305#define EDAC_NR_CHANNELS 6
306
307/* Create dynamic CHANNEL files, indexed by 'chan', under specifed CSROW */
308static int edac_create_channel_files(struct kobject *kobj, int chan)
309{
310 int err = -ENODEV;
311
312 if (chan >= EDAC_NR_CHANNELS)
313 return err;
314
315 /* create the DIMM label attribute file */
316 err = sysfs_create_file(kobj,
317 (struct attribute *)
318 dynamic_csrow_dimm_attr[chan]);
319
320 if (!err) {
321 /* create the CE Count attribute file */
322 err = sysfs_create_file(kobj,
323 (struct attribute *)
324 dynamic_csrow_ce_count_attr[chan]);
325 } else {
326 debugf1("%s() dimm labels and ce_count files created",
327 __func__);
328 }
329
330 return err;
331}
332
333/* No memory to release for this kobj */
334static void edac_csrow_instance_release(struct kobject *kobj)
335{
336 struct mem_ctl_info *mci;
337 struct csrow_info *cs;
338
339 debugf1("%s()\n", __func__);
340
341 cs = container_of(kobj, struct csrow_info, kobj);
342 mci = cs->mci;
343
344 kobject_put(&mci->edac_mci_kobj);
345}
346
347/* the kobj_type instance for a CSROW */
348static struct kobj_type ktype_csrow = {
349 .release = edac_csrow_instance_release,
350 .sysfs_ops = &csrowfs_ops,
351 .default_attrs = (struct attribute **)default_csrow_attr,
352};
353
354/* Create a CSROW object under specifed edac_mc_device */
355static int edac_create_csrow_object(struct mem_ctl_info *mci,
356 struct csrow_info *csrow, int index)
357{
358 struct kobject *kobj_mci = &mci->edac_mci_kobj;
359 struct kobject *kobj;
360 int chan;
361 int err;
362
363 /* generate ..../edac/mc/mc<id>/csrow<index> */
364 memset(&csrow->kobj, 0, sizeof(csrow->kobj));
365 csrow->mci = mci; /* include container up link */
366 csrow->kobj.parent = kobj_mci;
367 csrow->kobj.ktype = &ktype_csrow;
368
369 /* name this instance of csrow<id> */
370 err = kobject_set_name(&csrow->kobj, "csrow%d", index);
371 if (err)
372 goto err_out;
373
374 /* bump the mci instance's kobject's ref count */
375 kobj = kobject_get(&mci->edac_mci_kobj);
376 if (!kobj) {
377 err = -ENODEV;
378 goto err_out;
379 }
380
381 /* Instanstiate the csrow object */
382 err = kobject_register(&csrow->kobj);
383 if (err)
384 goto err_release_top_kobj;
385
386 /* At this point, to release a csrow kobj, one must
387 * call the kobject_unregister and allow that tear down
388 * to work the releasing
389 */
390
391 /* Create the dyanmic attribute files on this csrow,
392 * namely, the DIMM labels and the channel ce_count
393 */
394 for (chan = 0; chan < csrow->nr_channels; chan++) {
395 err = edac_create_channel_files(&csrow->kobj, chan);
396 if (err) {
397 /* special case the unregister here */
398 kobject_unregister(&csrow->kobj);
399 goto err_out;
400 }
401 }
402
403 return 0;
404
405 /* error unwind stack */
406err_release_top_kobj:
407 kobject_put(&mci->edac_mci_kobj);
408
409err_out:
410 return err;
411}
412
413/* default sysfs methods and data structures for the main MCI kobject */
414
415static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
416 const char *data, size_t count)
417{
418 int row, chan;
419
420 mci->ue_noinfo_count = 0;
421 mci->ce_noinfo_count = 0;
422 mci->ue_count = 0;
423 mci->ce_count = 0;
424
425 for (row = 0; row < mci->nr_csrows; row++) {
426 struct csrow_info *ri = &mci->csrows[row];
427
428 ri->ue_count = 0;
429 ri->ce_count = 0;
430
431 for (chan = 0; chan < ri->nr_channels; chan++)
432 ri->channels[chan].ce_count = 0;
433 }
434
435 mci->start_time = jiffies;
436 return count;
437}
438
439/* memory scrubbing */
440static ssize_t mci_sdram_scrub_rate_store(struct mem_ctl_info *mci,
441 const char *data, size_t count)
442{
443 u32 bandwidth = -1;
444
445 if (mci->set_sdram_scrub_rate) {
446
447 memctrl_int_store(&bandwidth, data, count);
448
449 if (!(*mci->set_sdram_scrub_rate) (mci, &bandwidth)) {
450 edac_printk(KERN_DEBUG, EDAC_MC,
451 "Scrub rate set successfully, applied: %d\n",
452 bandwidth);
453 } else {
454 /* FIXME: error codes maybe? */
455 edac_printk(KERN_DEBUG, EDAC_MC,
456 "Scrub rate set FAILED, could not apply: %d\n",
457 bandwidth);
458 }
459 } else {
460 /* FIXME: produce "not implemented" ERROR for user-side. */
461 edac_printk(KERN_WARNING, EDAC_MC,
462 "Memory scrubbing 'set'control is not implemented!\n");
463 }
464 return count;
465}
466
467static ssize_t mci_sdram_scrub_rate_show(struct mem_ctl_info *mci, char *data)
468{
469 u32 bandwidth = -1;
470
471 if (mci->get_sdram_scrub_rate) {
472 if (!(*mci->get_sdram_scrub_rate) (mci, &bandwidth)) {
473 edac_printk(KERN_DEBUG, EDAC_MC,
474 "Scrub rate successfully, fetched: %d\n",
475 bandwidth);
476 } else {
477 /* FIXME: error codes maybe? */
478 edac_printk(KERN_DEBUG, EDAC_MC,
479 "Scrub rate fetch FAILED, got: %d\n",
480 bandwidth);
481 }
482 } else {
483 /* FIXME: produce "not implemented" ERROR for user-side. */
484 edac_printk(KERN_WARNING, EDAC_MC,
485 "Memory scrubbing 'get' control is not implemented\n");
486 }
487 return sprintf(data, "%d\n", bandwidth);
488}
489
490/* default attribute files for the MCI object */
491static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
492{
493 return sprintf(data, "%d\n", mci->ue_count);
494}
495
496static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
497{
498 return sprintf(data, "%d\n", mci->ce_count);
499}
500
501static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
502{
503 return sprintf(data, "%d\n", mci->ce_noinfo_count);
504}
505
506static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
507{
508 return sprintf(data, "%d\n", mci->ue_noinfo_count);
509}
510
511static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
512{
513 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
514}
515
516static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
517{
518 return sprintf(data, "%s\n", mci->ctl_name);
519}
520
521static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
522{
523 int total_pages, csrow_idx;
524
525 for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
526 csrow_idx++) {
527 struct csrow_info *csrow = &mci->csrows[csrow_idx];
528
529 if (!csrow->nr_pages)
530 continue;
531
532 total_pages += csrow->nr_pages;
533 }
534
535 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
536}
537
538#define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
539#define to_mcidev_attr(a) container_of(a,struct mcidev_sysfs_attribute,attr)
540
541/* MCI show/store functions for top most object */
542static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
543 char *buffer)
544{
545 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
546 struct mcidev_sysfs_attribute *mcidev_attr = to_mcidev_attr(attr);
547
548 if (mcidev_attr->show)
549 return mcidev_attr->show(mem_ctl_info, buffer);
550
551 return -EIO;
552}
553
554static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
555 const char *buffer, size_t count)
556{
557 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
558 struct mcidev_sysfs_attribute *mcidev_attr = to_mcidev_attr(attr);
559
560 if (mcidev_attr->store)
561 return mcidev_attr->store(mem_ctl_info, buffer, count);
562
563 return -EIO;
564}
565
566/* Intermediate show/store table */
567static struct sysfs_ops mci_ops = {
568 .show = mcidev_show,
569 .store = mcidev_store
570};
571
572#define MCIDEV_ATTR(_name,_mode,_show,_store) \
573static struct mcidev_sysfs_attribute mci_attr_##_name = { \
574 .attr = {.name = __stringify(_name), .mode = _mode }, \
575 .show = _show, \
576 .store = _store, \
577};
578
579/* default Control file */
580MCIDEV_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
581
582/* default Attribute files */
583MCIDEV_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
584MCIDEV_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
585MCIDEV_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
586MCIDEV_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
587MCIDEV_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
588MCIDEV_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
589MCIDEV_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
590
591/* memory scrubber attribute file */
592MCIDEV_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
593 mci_sdram_scrub_rate_store);
594
595static struct mcidev_sysfs_attribute *mci_attr[] = {
596 &mci_attr_reset_counters,
597 &mci_attr_mc_name,
598 &mci_attr_size_mb,
599 &mci_attr_seconds_since_reset,
600 &mci_attr_ue_noinfo_count,
601 &mci_attr_ce_noinfo_count,
602 &mci_attr_ue_count,
603 &mci_attr_ce_count,
604 &mci_attr_sdram_scrub_rate,
605 NULL
606};
607
608
609/*
610 * Release of a MC controlling instance
611 *
612 * each MC control instance has the following resources upon entry:
613 * a) a ref count on the top memctl kobj
614 * b) a ref count on this module
615 *
616 * this function must decrement those ref counts and then
617 * issue a free on the instance's memory
618 */
619static void edac_mci_control_release(struct kobject *kobj)
620{
621 struct mem_ctl_info *mci;
622
623 mci = to_mci(kobj);
624
625 debugf0("%s() mci instance idx=%d releasing\n", __func__, mci->mc_idx);
626
627 /* decrement the module ref count */
628 module_put(mci->owner);
629
630 /* free the mci instance memory here */
631 kfree(mci);
632}
633
634static struct kobj_type ktype_mci = {
635 .release = edac_mci_control_release,
636 .sysfs_ops = &mci_ops,
637 .default_attrs = (struct attribute **)mci_attr,
638};
639
640/* show/store, tables, etc for the MC kset */
641
642
643struct memctrl_dev_attribute {
644 struct attribute attr;
645 void *value;
646 ssize_t(*show) (void *, char *);
647 ssize_t(*store) (void *, const char *, size_t);
648};
649
650/* Set of show/store abstract level functions for memory control object */
651static ssize_t memctrl_dev_show(struct kobject *kobj,
652 struct attribute *attr, char *buffer)
653{
654 struct memctrl_dev_attribute *memctrl_dev;
655 memctrl_dev = (struct memctrl_dev_attribute *)attr;
656
657 if (memctrl_dev->show)
658 return memctrl_dev->show(memctrl_dev->value, buffer);
659
660 return -EIO;
661}
662
663static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
664 const char *buffer, size_t count)
665{
666 struct memctrl_dev_attribute *memctrl_dev;
667 memctrl_dev = (struct memctrl_dev_attribute *)attr;
668
669 if (memctrl_dev->store)
670 return memctrl_dev->store(memctrl_dev->value, buffer, count);
671
672 return -EIO;
673}
674
675static struct sysfs_ops memctrlfs_ops = {
676 .show = memctrl_dev_show,
677 .store = memctrl_dev_store
678};
679
680#define MEMCTRL_ATTR(_name, _mode, _show, _store) \
681static struct memctrl_dev_attribute attr_##_name = { \
682 .attr = {.name = __stringify(_name), .mode = _mode }, \
683 .value = &_name, \
684 .show = _show, \
685 .store = _store, \
686};
687
688#define MEMCTRL_STRING_ATTR(_name, _data, _mode, _show, _store) \
689static struct memctrl_dev_attribute attr_##_name = { \
690 .attr = {.name = __stringify(_name), .mode = _mode }, \
691 .value = _data, \
692 .show = _show, \
693 .store = _store, \
694};
695
696/* csrow<id> control files */
697MEMCTRL_ATTR(edac_mc_panic_on_ue,
698 S_IRUGO | S_IWUSR, memctrl_int_show, memctrl_int_store);
699
700MEMCTRL_ATTR(edac_mc_log_ue,
701 S_IRUGO | S_IWUSR, memctrl_int_show, memctrl_int_store);
702
703MEMCTRL_ATTR(edac_mc_log_ce,
704 S_IRUGO | S_IWUSR, memctrl_int_show, memctrl_int_store);
705
706MEMCTRL_ATTR(edac_mc_poll_msec,
707 S_IRUGO | S_IWUSR, memctrl_int_show, memctrl_int_store);
708
709/* Base Attributes of the memory ECC object */
710static struct memctrl_dev_attribute *memctrl_attr[] = {
711 &attr_edac_mc_panic_on_ue,
712 &attr_edac_mc_log_ue,
713 &attr_edac_mc_log_ce,
714 &attr_edac_mc_poll_msec,
715 NULL,
716};
717
718
719/* the ktype for the mc_kset internal kobj */
720static struct kobj_type ktype_mc_set_attribs = {
721 .sysfs_ops = &memctrlfs_ops,
722 .default_attrs = (struct attribute **)memctrl_attr,
723};
724
725/* EDAC memory controller sysfs kset:
726 * /sys/devices/system/edac/mc
727 */
728static struct kset mc_kset = {
729 .kobj = {.name = "mc", .ktype = &ktype_mc_set_attribs },
730 .ktype = &ktype_mci,
731};
732
733
734/*
735 * edac_mc_register_sysfs_main_kobj
736 *
737 * setups and registers the main kobject for each mci
738 */
739int edac_mc_register_sysfs_main_kobj(struct mem_ctl_info *mci)
740{
741 struct kobject *kobj_mci;
742 int err;
743
744 debugf1("%s()\n", __func__);
745
746 kobj_mci = &mci->edac_mci_kobj;
747
748 /* Init the mci's kobject */
749 memset(kobj_mci, 0, sizeof(*kobj_mci));
750
751 /* this instance become part of the mc_kset */
752 kobj_mci->kset = &mc_kset;
753
754 /* set the name of the mc<id> object */
755 err = kobject_set_name(kobj_mci, "mc%d", mci->mc_idx);
756 if (err)
757 goto fail_out;
758
759 /* Record which module 'owns' this control structure
760 * and bump the ref count of the module
761 */
762 mci->owner = THIS_MODULE;
763
764 /* bump ref count on this module */
765 if (!try_module_get(mci->owner)) {
766 err = -ENODEV;
767 goto fail_out;
768 }
769
770 /* register the mc<id> kobject to the mc_kset */
771 err = kobject_register(kobj_mci);
772 if (err) {
773 debugf1("%s()Failed to register '.../edac/mc%d'\n",
774 __func__, mci->mc_idx);
775 goto kobj_reg_fail;
776 }
777
778 /* At this point, to 'free' the control struct,
779 * edac_mc_unregister_sysfs_main_kobj() must be used
780 */
781
782 debugf1("%s() Registered '.../edac/mc%d' kobject\n",
783 __func__, mci->mc_idx);
784
785 return 0;
786
787 /* Error exit stack */
788
789kobj_reg_fail:
790 module_put(mci->owner);
791
792fail_out:
793 return err;
794}
795
796/*
797 * edac_mc_register_sysfs_main_kobj
798 *
799 * tears down and the main mci kobject from the mc_kset
800 */
801void edac_mc_unregister_sysfs_main_kobj(struct mem_ctl_info *mci)
802{
803 /* delete the kobj from the mc_kset */
804 kobject_unregister(&mci->edac_mci_kobj);
805}
806
807#define EDAC_DEVICE_SYMLINK "device"
808
809/*
810 * edac_create_mci_instance_attributes
811 * create MC driver specific attributes at the topmost level
812 * directory of this mci instance.
813 */
814static int edac_create_mci_instance_attributes(struct mem_ctl_info *mci)
815{
816 int err;
817 struct mcidev_sysfs_attribute *sysfs_attrib;
818
819 /* point to the start of the array and iterate over it
820 * adding each attribute listed to this mci instance's kobject
821 */
822 sysfs_attrib = mci->mc_driver_sysfs_attributes;
823
824 while (sysfs_attrib && sysfs_attrib->attr.name) {
825 err = sysfs_create_file(&mci->edac_mci_kobj,
826 (struct attribute*) sysfs_attrib);
827 if (err) {
828 return err;
829 }
830
831 sysfs_attrib++;
832 }
833
834 return 0;
835}
836
837/*
838 * edac_remove_mci_instance_attributes
839 * remove MC driver specific attributes at the topmost level
840 * directory of this mci instance.
841 */
842static void edac_remove_mci_instance_attributes(struct mem_ctl_info *mci)
843{
844 struct mcidev_sysfs_attribute *sysfs_attrib;
845
846 /* point to the start of the array and iterate over it
847 * adding each attribute listed to this mci instance's kobject
848 */
849 sysfs_attrib = mci->mc_driver_sysfs_attributes;
850
851 /* loop if there are attributes and until we hit a NULL entry */
852 while (sysfs_attrib && sysfs_attrib->attr.name) {
853 sysfs_remove_file(&mci->edac_mci_kobj,
854 (struct attribute *) sysfs_attrib);
855 sysfs_attrib++;
856 }
857}
858
859
860/*
861 * Create a new Memory Controller kobject instance,
862 * mc<id> under the 'mc' directory
863 *
864 * Return:
865 * 0 Success
866 * !0 Failure
867 */
868int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
869{
870 int i;
871 int err;
872 struct csrow_info *csrow;
873 struct kobject *kobj_mci = &mci->edac_mci_kobj;
874
875 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
876
877 /* create a symlink for the device */
878 err = sysfs_create_link(kobj_mci, &mci->dev->kobj,
879 EDAC_DEVICE_SYMLINK);
880 if (err) {
881 debugf1("%s() failure to create symlink\n", __func__);
882 goto fail0;
883 }
884
885 /* If the low level driver desires some attributes,
886 * then create them now for the driver.
887 */
888 if (mci->mc_driver_sysfs_attributes) {
889 err = edac_create_mci_instance_attributes(mci);
890 if (err) {
891 debugf1("%s() failure to create mci attributes\n",
892 __func__);
893 goto fail0;
894 }
895 }
896
897 /* Make directories for each CSROW object under the mc<id> kobject
898 */
899 for (i = 0; i < mci->nr_csrows; i++) {
900 csrow = &mci->csrows[i];
901
902 /* Only expose populated CSROWs */
903 if (csrow->nr_pages > 0) {
904 err = edac_create_csrow_object(mci, csrow, i);
905 if (err) {
906 debugf1("%s() failure: create csrow %d obj\n",
907 __func__, i);
908 goto fail1;
909 }
910 }
911 }
912
913 return 0;
914
915 /* CSROW error: backout what has already been registered, */
916fail1:
917 for (i--; i >= 0; i--) {
918 if (csrow->nr_pages > 0) {
919 kobject_unregister(&mci->csrows[i].kobj);
920 }
921 }
922
923 /* remove the mci instance's attributes, if any */
924 edac_remove_mci_instance_attributes(mci);
925
926 /* remove the symlink */
927 sysfs_remove_link(kobj_mci, EDAC_DEVICE_SYMLINK);
928
929fail0:
930 return err;
931}
932
933/*
934 * remove a Memory Controller instance
935 */
936void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
937{
938 int i;
939
940 debugf0("%s()\n", __func__);
941
942 /* remove all csrow kobjects */
943 for (i = 0; i < mci->nr_csrows; i++) {
944 if (mci->csrows[i].nr_pages > 0) {
945 debugf0("%s() unreg csrow-%d\n", __func__, i);
946 kobject_unregister(&mci->csrows[i].kobj);
947 }
948 }
949
950 debugf0("%s() remove_link\n", __func__);
951
952 /* remove the symlink */
953 sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
954
955 debugf0("%s() remove_mci_instance\n", __func__);
956
957 /* remove this mci instance's attribtes */
958 edac_remove_mci_instance_attributes(mci);
959
960 debugf0("%s() unregister this mci kobj\n", __func__);
961
962 /* unregister this instance's kobject */
963 kobject_unregister(&mci->edac_mci_kobj);
964}
965
966
967
968
969/*
970 * edac_setup_sysfs_mc_kset(void)
971 *
972 * Initialize the mc_kset for the 'mc' entry
973 * This requires creating the top 'mc' directory with a kset
974 * and its controls/attributes.
975 *
976 * To this 'mc' kset, instance 'mci' will be grouped as children.
977 *
978 * Return: 0 SUCCESS
979 * !0 FAILURE error code
980 */
981int edac_sysfs_setup_mc_kset(void)
982{
983 int err = 0;
984 struct sysdev_class *edac_class;
985
986 debugf1("%s()\n", __func__);
987
988 /* get the /sys/devices/system/edac class reference */
989 edac_class = edac_get_edac_class();
990 if (edac_class == NULL) {
991 debugf1("%s() no edac_class error=%d\n", __func__, err);
992 goto fail_out;
993 }
994
995 /* Init the MC's kobject */
996 mc_kset.kobj.parent = &edac_class->kset.kobj;
997
998 /* register the mc_kset */
999 err = kset_register(&mc_kset);
1000 if (err) {
1001 debugf1("%s() Failed to register '.../edac/mc'\n", __func__);
1002 goto fail_out;
1003 }
1004
1005 debugf1("%s() Registered '.../edac/mc' kobject\n", __func__);
1006
1007 return 0;
1008
1009
1010 /* error unwind stack */
1011fail_out:
1012 return err;
1013}
1014
1015/*
1016 * edac_sysfs_teardown_mc_kset
1017 *
1018 * deconstruct the mc_ket for memory controllers
1019 */
1020void edac_sysfs_teardown_mc_kset(void)
1021{
1022 kset_unregister(&mc_kset);
1023}
1024
diff --git a/drivers/edac/edac_module.c b/drivers/edac/edac_module.c
new file mode 100644
index 0000000000..e0c4a40860
--- /dev/null
+++ b/drivers/edac/edac_module.c
@@ -0,0 +1,222 @@
1/*
2 * edac_module.c
3 *
4 * (C) 2007 www.softwarebitmaker.com
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 *
10 * Author: Doug Thompson <dougthompson@xmission.com>
11 *
12 */
13#include <linux/edac.h>
14
15#include "edac_core.h"
16#include "edac_module.h"
17
18#define EDAC_VERSION "Ver: 2.1.0 " __DATE__
19
20#ifdef CONFIG_EDAC_DEBUG
21/* Values of 0 to 4 will generate output */
22int edac_debug_level = 2;
23EXPORT_SYMBOL_GPL(edac_debug_level);
24#endif
25
26/* scope is to module level only */
27struct workqueue_struct *edac_workqueue;
28
29/*
30 * sysfs object: /sys/devices/system/edac
31 * need to export to other files in this modules
32 */
33static struct sysdev_class edac_class = {
34 set_kset_name("edac"),
35};
36static int edac_class_valid;
37
38/*
39 * edac_op_state_to_string()
40 */
41char *edac_op_state_to_string(int opstate)
42{
43 if (opstate == OP_RUNNING_POLL)
44 return "POLLED";
45 else if (opstate == OP_RUNNING_INTERRUPT)
46 return "INTERRUPT";
47 else if (opstate == OP_RUNNING_POLL_INTR)
48 return "POLL-INTR";
49 else if (opstate == OP_ALLOC)
50 return "ALLOC";
51 else if (opstate == OP_OFFLINE)
52 return "OFFLINE";
53
54 return "UNKNOWN";
55}
56
57/*
58 * edac_get_edac_class()
59 *
60 * return pointer to the edac class of 'edac'
61 */
62struct sysdev_class *edac_get_edac_class(void)
63{
64 struct sysdev_class *classptr = NULL;
65
66 if (edac_class_valid)
67 classptr = &edac_class;
68
69 return classptr;
70}
71
72/*
73 * edac_register_sysfs_edac_name()
74 *
75 * register the 'edac' into /sys/devices/system
76 *
77 * return:
78 * 0 success
79 * !0 error
80 */
81static int edac_register_sysfs_edac_name(void)
82{
83 int err;
84
85 /* create the /sys/devices/system/edac directory */
86 err = sysdev_class_register(&edac_class);
87
88 if (err) {
89 debugf1("%s() error=%d\n", __func__, err);
90 return err;
91 }
92
93 edac_class_valid = 1;
94 return 0;
95}
96
97/*
98 * sysdev_class_unregister()
99 *
100 * unregister the 'edac' from /sys/devices/system
101 */
102static void edac_unregister_sysfs_edac_name(void)
103{
104 /* only if currently registered, then unregister it */
105 if (edac_class_valid)
106 sysdev_class_unregister(&edac_class);
107
108 edac_class_valid = 0;
109}
110
111/*
112 * edac_workqueue_setup
113 * initialize the edac work queue for polling operations
114 */
115static int edac_workqueue_setup(void)
116{
117 edac_workqueue = create_singlethread_workqueue("edac-poller");
118 if (edac_workqueue == NULL)
119 return -ENODEV;
120 else
121 return 0;
122}
123
124/*
125 * edac_workqueue_teardown
126 * teardown the edac workqueue
127 */
128static void edac_workqueue_teardown(void)
129{
130 if (edac_workqueue) {
131 flush_workqueue(edac_workqueue);
132 destroy_workqueue(edac_workqueue);
133 edac_workqueue = NULL;
134 }
135}
136
137/*
138 * edac_init
139 * module initialization entry point
140 */
141static int __init edac_init(void)
142{
143 int err = 0;
144
145 edac_printk(KERN_INFO, EDAC_MC, EDAC_VERSION "\n");
146
147 /*
148 * Harvest and clear any boot/initialization PCI parity errors
149 *
150 * FIXME: This only clears errors logged by devices present at time of
151 * module initialization. We should also do an initial clear
152 * of each newly hotplugged device.
153 */
154 edac_pci_clear_parity_errors();
155
156 /*
157 * perform the registration of the /sys/devices/system/edac class object
158 */
159 if (edac_register_sysfs_edac_name()) {
160 edac_printk(KERN_ERR, EDAC_MC,
161 "Error initializing 'edac' kobject\n");
162 err = -ENODEV;
163 goto error;
164 }
165
166 /*
167 * now set up the mc_kset under the edac class object
168 */
169 err = edac_sysfs_setup_mc_kset();
170 if (err)
171 goto sysfs_setup_fail;
172
173 /* Setup/Initialize the workq for this core */
174 err = edac_workqueue_setup();
175 if (err) {
176 edac_printk(KERN_ERR, EDAC_MC, "init WorkQueue failure\n");
177 goto workq_fail;
178 }
179
180 return 0;
181
182 /* Error teardown stack */
183workq_fail:
184 edac_sysfs_teardown_mc_kset();
185
186sysfs_setup_fail:
187 edac_unregister_sysfs_edac_name();
188
189error:
190 return err;
191}
192
193/*
194 * edac_exit()
195 * module exit/termination function
196 */
197static void __exit edac_exit(void)
198{
199 debugf0("%s()\n", __func__);
200
201 /* tear down the various subsystems */
202 edac_workqueue_teardown();
203 edac_sysfs_teardown_mc_kset();
204 edac_unregister_sysfs_edac_name();
205}
206
207/*
208 * Inform the kernel of our entry and exit points
209 */
210module_init(edac_init);
211module_exit(edac_exit);
212
213MODULE_LICENSE("GPL");
214MODULE_AUTHOR("Doug Thompson www.softwarebitmaker.com, et al");
215MODULE_DESCRIPTION("Core library routines for EDAC reporting");
216
217/* refer to *_sysfs.c files for parameters that are exported via sysfs */
218
219#ifdef CONFIG_EDAC_DEBUG
220module_param(edac_debug_level, int, 0644);
221MODULE_PARM_DESC(edac_debug_level, "Debug level");
222#endif
diff --git a/drivers/edac/edac_module.h b/drivers/edac/edac_module.h
new file mode 100644
index 0000000000..a2134dfc3c
--- /dev/null
+++ b/drivers/edac/edac_module.h
@@ -0,0 +1,77 @@
1
2/*
3 * edac_module.h
4 *
5 * For defining functions/data for within the EDAC_CORE module only
6 *
7 * written by doug thompson <norsk5@xmission.h>
8 */
9
10#ifndef __EDAC_MODULE_H__
11#define __EDAC_MODULE_H__
12
13#include <linux/sysdev.h>
14
15#include "edac_core.h"
16
17/*
18 * INTERNAL EDAC MODULE:
19 * EDAC memory controller sysfs create/remove functions
20 * and setup/teardown functions
21 *
22 * edac_mc objects
23 */
24extern int edac_sysfs_setup_mc_kset(void);
25extern void edac_sysfs_teardown_mc_kset(void);
26extern int edac_mc_register_sysfs_main_kobj(struct mem_ctl_info *mci);
27extern void edac_mc_unregister_sysfs_main_kobj(struct mem_ctl_info *mci);
28extern int edac_create_sysfs_mci_device(struct mem_ctl_info *mci);
29extern void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci);
30extern void edac_check_mc_devices(void);
31extern int edac_get_log_ue(void);
32extern int edac_get_log_ce(void);
33extern int edac_get_panic_on_ue(void);
34extern int edac_mc_get_log_ue(void);
35extern int edac_mc_get_log_ce(void);
36extern int edac_mc_get_panic_on_ue(void);
37extern int edac_get_poll_msec(void);
38extern int edac_mc_get_poll_msec(void);
39
40extern int edac_device_register_sysfs_main_kobj(
41 struct edac_device_ctl_info *edac_dev);
42extern void edac_device_unregister_sysfs_main_kobj(
43 struct edac_device_ctl_info *edac_dev);
44extern int edac_device_create_sysfs(struct edac_device_ctl_info *edac_dev);
45extern void edac_device_remove_sysfs(struct edac_device_ctl_info *edac_dev);
46extern struct sysdev_class *edac_get_edac_class(void);
47
48/* edac core workqueue: single CPU mode */
49extern struct workqueue_struct *edac_workqueue;
50extern void edac_device_workq_setup(struct edac_device_ctl_info *edac_dev,
51 unsigned msec);
52extern void edac_device_workq_teardown(struct edac_device_ctl_info *edac_dev);
53extern void edac_device_reset_delay_period(struct edac_device_ctl_info
54 *edac_dev, unsigned long value);
55extern void *edac_align_ptr(void *ptr, unsigned size);
56
57/*
58 * EDAC PCI functions
59 */
60#ifdef CONFIG_PCI
61extern void edac_pci_do_parity_check(void);
62extern void edac_pci_clear_parity_errors(void);
63extern int edac_sysfs_pci_setup(void);
64extern void edac_sysfs_pci_teardown(void);
65extern int edac_pci_get_check_errors(void);
66extern int edac_pci_get_poll_msec(void);
67#else /* CONFIG_PCI */
68/* pre-process these away */
69#define edac_pci_do_parity_check()
70#define edac_pci_clear_parity_errors()
71#define edac_sysfs_pci_setup() (0)
72#define edac_sysfs_pci_teardown()
73#define edac_pci_get_check_errors()
74#define edac_pci_get_poll_msec()
75#endif /* CONFIG_PCI */
76
77#endif /* __EDAC_MODULE_H__ */
diff --git a/drivers/edac/edac_pci.c b/drivers/edac/edac_pci.c
new file mode 100644
index 0000000000..d9cd5e048c
--- /dev/null
+++ b/drivers/edac/edac_pci.c
@@ -0,0 +1,433 @@
1/*
2 * EDAC PCI component
3 *
4 * Author: Dave Jiang <djiang@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12#include <linux/module.h>
13#include <linux/types.h>
14#include <linux/smp.h>
15#include <linux/init.h>
16#include <linux/sysctl.h>
17#include <linux/highmem.h>
18#include <linux/timer.h>
19#include <linux/slab.h>
20#include <linux/spinlock.h>
21#include <linux/list.h>
22#include <linux/sysdev.h>
23#include <linux/ctype.h>
24#include <linux/workqueue.h>
25#include <asm/uaccess.h>
26#include <asm/page.h>
27
28#include "edac_core.h"
29#include "edac_module.h"
30
31static DEFINE_MUTEX(edac_pci_ctls_mutex);
32static struct list_head edac_pci_list = LIST_HEAD_INIT(edac_pci_list);
33
34static inline void edac_lock_pci_list(void)
35{
36 mutex_lock(&edac_pci_ctls_mutex);
37}
38
39static inline void edac_unlock_pci_list(void)
40{
41 mutex_unlock(&edac_pci_ctls_mutex);
42}
43
44/*
45 * The alloc() and free() functions for the 'edac_pci' control info
46 * structure. The chip driver will allocate one of these for each
47 * edac_pci it is going to control/register with the EDAC CORE.
48 */
49struct edac_pci_ctl_info *edac_pci_alloc_ctl_info(unsigned int sz_pvt,
50 const char *edac_pci_name)
51{
52 struct edac_pci_ctl_info *pci;
53 void *pvt;
54 unsigned int size;
55
56 pci = (struct edac_pci_ctl_info *)0;
57 pvt = edac_align_ptr(&pci[1], sz_pvt);
58 size = ((unsigned long)pvt) + sz_pvt;
59
60 if ((pci = kzalloc(size, GFP_KERNEL)) == NULL)
61 return NULL;
62
63 pvt = sz_pvt ? ((char *)pci) + ((unsigned long)pvt) : NULL;
64
65 pci->pvt_info = pvt;
66
67 pci->op_state = OP_ALLOC;
68
69 snprintf(pci->name, strlen(edac_pci_name) + 1, "%s", edac_pci_name);
70
71 return pci;
72}
73
74EXPORT_SYMBOL_GPL(edac_pci_alloc_ctl_info);
75
76/*
77 * edac_pci_free_ctl_info()
78 * frees the memory allocated by edac_pci_alloc_ctl_info() function
79 */
80void edac_pci_free_ctl_info(struct edac_pci_ctl_info *pci)
81{
82 kfree(pci);
83}
84
85EXPORT_SYMBOL_GPL(edac_pci_free_ctl_info);
86
87/*
88 * find_edac_pci_by_dev()
89 * scans the edac_pci list for a specific 'struct device *'
90 */
91static struct edac_pci_ctl_info *find_edac_pci_by_dev(struct device *dev)
92{
93 struct edac_pci_ctl_info *pci;
94 struct list_head *item;
95
96 debugf3("%s()\n", __func__);
97
98 list_for_each(item, &edac_pci_list) {
99 pci = list_entry(item, struct edac_pci_ctl_info, link);
100
101 if (pci->dev == dev)
102 return pci;
103 }
104
105 return NULL;
106}
107
108/*
109 * add_edac_pci_to_global_list
110 * Before calling this function, caller must assign a unique value to
111 * edac_dev->pci_idx.
112 * Return:
113 * 0 on success
114 * 1 on failure
115 */
116static int add_edac_pci_to_global_list(struct edac_pci_ctl_info *pci)
117{
118 struct list_head *item, *insert_before;
119 struct edac_pci_ctl_info *rover;
120
121 insert_before = &edac_pci_list;
122
123 /* Determine if already on the list */
124 if (unlikely((rover = find_edac_pci_by_dev(pci->dev)) != NULL))
125 goto fail0;
126
127 /* Insert in ascending order by 'pci_idx', so find position */
128 list_for_each(item, &edac_pci_list) {
129 rover = list_entry(item, struct edac_pci_ctl_info, link);
130
131 if (rover->pci_idx >= pci->pci_idx) {
132 if (unlikely(rover->pci_idx == pci->pci_idx))
133 goto fail1;
134
135 insert_before = item;
136 break;
137 }
138 }
139
140 list_add_tail_rcu(&pci->link, insert_before);
141 return 0;
142
143fail0:
144 edac_printk(KERN_WARNING, EDAC_PCI,
145 "%s (%s) %s %s already assigned %d\n",
146 rover->dev->bus_id, dev_name(rover),
147 rover->mod_name, rover->ctl_name, rover->pci_idx);
148 return 1;
149
150fail1:
151 edac_printk(KERN_WARNING, EDAC_PCI,
152 "but in low-level driver: attempt to assign\n"
153 "\tduplicate pci_idx %d in %s()\n", rover->pci_idx,
154 __func__);
155 return 1;
156}
157
158/*
159 * complete_edac_pci_list_del
160 */
161static void complete_edac_pci_list_del(struct rcu_head *head)
162{
163 struct edac_pci_ctl_info *pci;
164
165 pci = container_of(head, struct edac_pci_ctl_info, rcu);
166 INIT_LIST_HEAD(&pci->link);
167 complete(&pci->complete);
168}
169
170/*
171 * del_edac_pci_from_global_list
172 */
173static void del_edac_pci_from_global_list(struct edac_pci_ctl_info *pci)
174{
175 list_del_rcu(&pci->link);
176 init_completion(&pci->complete);
177 call_rcu(&pci->rcu, complete_edac_pci_list_del);
178 wait_for_completion(&pci->complete);
179}
180
181/*
182 * edac_pci_find()
183 * Search for an edac_pci_ctl_info structure whose index is 'idx'
184 *
185 * If found, return a pointer to the structure
186 * Else return NULL.
187 *
188 * Caller must hold pci_ctls_mutex.
189 */
190struct edac_pci_ctl_info *edac_pci_find(int idx)
191{
192 struct list_head *item;
193 struct edac_pci_ctl_info *pci;
194
195 /* Iterage over list, looking for exact match of ID */
196 list_for_each(item, &edac_pci_list) {
197 pci = list_entry(item, struct edac_pci_ctl_info, link);
198
199 if (pci->pci_idx >= idx) {
200 if (pci->pci_idx == idx)
201 return pci;
202
203 /* not on list, so terminate early */
204 break;
205 }
206 }
207
208 return NULL;
209}
210
211EXPORT_SYMBOL_GPL(edac_pci_find);
212
213/*
214 * edac_pci_workq_function()
215 * performs the operation scheduled by a workq request
216 */
217static void edac_pci_workq_function(struct work_struct *work_req)
218{
219 struct delayed_work *d_work = (struct delayed_work *)work_req;
220 struct edac_pci_ctl_info *pci = to_edac_pci_ctl_work(d_work);
221
222 edac_lock_pci_list();
223
224 if ((pci->op_state == OP_RUNNING_POLL) &&
225 (pci->edac_check != NULL) && (edac_pci_get_check_errors()))
226 pci->edac_check(pci);
227
228 edac_unlock_pci_list();
229
230 /* Reschedule */
231 queue_delayed_work(edac_workqueue, &pci->work,
232 msecs_to_jiffies(edac_pci_get_poll_msec()));
233}
234
235/*
236 * edac_pci_workq_setup()
237 * initialize a workq item for this edac_pci instance
238 * passing in the new delay period in msec
239 */
240static void edac_pci_workq_setup(struct edac_pci_ctl_info *pci,
241 unsigned int msec)
242{
243 debugf0("%s()\n", __func__);
244
245 INIT_DELAYED_WORK(&pci->work, edac_pci_workq_function);
246 queue_delayed_work(edac_workqueue, &pci->work,
247 msecs_to_jiffies(edac_pci_get_poll_msec()));
248}
249
250/*
251 * edac_pci_workq_teardown()
252 * stop the workq processing on this edac_pci instance
253 */
254static void edac_pci_workq_teardown(struct edac_pci_ctl_info *pci)
255{
256 int status;
257
258 status = cancel_delayed_work(&pci->work);
259 if (status == 0)
260 flush_workqueue(edac_workqueue);
261}
262
263/*
264 * edac_pci_reset_delay_period
265 */
266void edac_pci_reset_delay_period(struct edac_pci_ctl_info *pci,
267 unsigned long value)
268{
269 edac_lock_pci_list();
270
271 edac_pci_workq_teardown(pci);
272
273 edac_pci_workq_setup(pci, value);
274
275 edac_unlock_pci_list();
276}
277
278EXPORT_SYMBOL_GPL(edac_pci_reset_delay_period);
279
280/*
281 * edac_pci_add_device: Insert the 'edac_dev' structure into the
282 * edac_pci global list and create sysfs entries associated with
283 * edac_pci structure.
284 * @pci: pointer to the edac_device structure to be added to the list
285 * @edac_idx: A unique numeric identifier to be assigned to the
286 * 'edac_pci' structure.
287 *
288 * Return:
289 * 0 Success
290 * !0 Failure
291 */
292int edac_pci_add_device(struct edac_pci_ctl_info *pci, int edac_idx)
293{
294 debugf0("%s()\n", __func__);
295
296 pci->pci_idx = edac_idx;
297
298 edac_lock_pci_list();
299
300 if (add_edac_pci_to_global_list(pci))
301 goto fail0;
302
303 pci->start_time = jiffies;
304
305 if (edac_pci_create_sysfs(pci)) {
306 edac_pci_printk(pci, KERN_WARNING,
307 "failed to create sysfs pci\n");
308 goto fail1;
309 }
310
311 if (pci->edac_check != NULL) {
312 pci->op_state = OP_RUNNING_POLL;
313
314 edac_pci_workq_setup(pci, 1000);
315 } else {
316 pci->op_state = OP_RUNNING_INTERRUPT;
317 }
318
319 edac_pci_printk(pci, KERN_INFO,
320 "Giving out device to module '%s' controller '%s':"
321 " DEV '%s' (%s)\n",
322 pci->mod_name,
323 pci->ctl_name,
324 dev_name(pci), edac_op_state_to_string(pci->op_state));
325
326 edac_unlock_pci_list();
327 return 0;
328
329fail1:
330 del_edac_pci_from_global_list(pci);
331fail0:
332 edac_unlock_pci_list();
333 return 1;
334}
335
336EXPORT_SYMBOL_GPL(edac_pci_add_device);
337
338/*
339 * edac_pci_del_device()
340 * Remove sysfs entries for specified edac_pci structure and
341 * then remove edac_pci structure from global list
342 *
343 * @dev:
344 * Pointer to 'struct device' representing edac_pci structure
345 * to remove
346 *
347 * Return:
348 * Pointer to removed edac_pci structure,
349 * or NULL if device not found
350 */
351struct edac_pci_ctl_info *edac_pci_del_device(struct device *dev)
352{
353 struct edac_pci_ctl_info *pci;
354
355 debugf0("%s()\n", __func__);
356
357 edac_lock_pci_list();
358
359 if ((pci = find_edac_pci_by_dev(dev)) == NULL) {
360 edac_unlock_pci_list();
361 return NULL;
362 }
363
364 pci->op_state = OP_OFFLINE;
365
366 edac_pci_workq_teardown(pci);
367
368 edac_pci_remove_sysfs(pci);
369
370 del_edac_pci_from_global_list(pci);
371
372 edac_unlock_pci_list();
373
374 edac_printk(KERN_INFO, EDAC_PCI,
375 "Removed device %d for %s %s: DEV %s\n",
376 pci->pci_idx, pci->mod_name, pci->ctl_name, dev_name(pci));
377
378 return pci;
379}
380
381EXPORT_SYMBOL_GPL(edac_pci_del_device);
382
383void edac_pci_generic_check(struct edac_pci_ctl_info *pci)
384{
385 edac_pci_do_parity_check();
386}
387
388static int edac_pci_idx;
389#define EDAC_PCI_GENCTL_NAME "EDAC PCI controller"
390
391struct edac_pci_gen_data {
392 int edac_idx;
393};
394
395struct edac_pci_ctl_info *edac_pci_create_generic_ctl(struct device *dev,
396 const char *mod_name)
397{
398 struct edac_pci_ctl_info *pci;
399 struct edac_pci_gen_data *pdata;
400
401 pci = edac_pci_alloc_ctl_info(sizeof(*pdata), EDAC_PCI_GENCTL_NAME);
402 if (!pci)
403 return NULL;
404
405 pdata = pci->pvt_info;
406 pci->dev = dev;
407 dev_set_drvdata(pci->dev, pci);
408 pci->dev_name = pci_name(to_pci_dev(dev));
409
410 pci->mod_name = mod_name;
411 pci->ctl_name = EDAC_PCI_GENCTL_NAME;
412 pci->edac_check = edac_pci_generic_check;
413
414 pdata->edac_idx = edac_pci_idx++;
415
416 if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
417 debugf3("%s(): failed edac_pci_add_device()\n", __func__);
418 edac_pci_free_ctl_info(pci);
419 return NULL;
420 }
421
422 return pci;
423}
424
425EXPORT_SYMBOL_GPL(edac_pci_create_generic_ctl);
426
427void edac_pci_release_generic_ctl(struct edac_pci_ctl_info *pci)
428{
429 edac_pci_del_device(pci->dev);
430 edac_pci_free_ctl_info(pci);
431}
432
433EXPORT_SYMBOL_GPL(edac_pci_release_generic_ctl);
diff --git a/drivers/edac/edac_pci_sysfs.c b/drivers/edac/edac_pci_sysfs.c
new file mode 100644
index 0000000000..fac94cae2c
--- /dev/null
+++ b/drivers/edac/edac_pci_sysfs.c
@@ -0,0 +1,620 @@
1/*
2 * (C) 2005, 2006 Linux Networx (http://lnxi.com)
3 * This file may be distributed under the terms of the
4 * GNU General Public License.
5 *
6 * Written Doug Thompson <norsk5@xmission.com>
7 *
8 */
9#include <linux/module.h>
10#include <linux/sysdev.h>
11#include <linux/ctype.h>
12
13#include "edac_core.h"
14#include "edac_module.h"
15
16#ifdef CONFIG_PCI
17
18#define EDAC_PCI_SYMLINK "device"
19
20static int check_pci_errors; /* default YES check PCI parity */
21static int edac_pci_panic_on_pe; /* default no panic on PCI Parity */
22static int edac_pci_log_pe = 1; /* log PCI parity errors */
23static int edac_pci_log_npe = 1; /* log PCI non-parity error errors */
24static atomic_t pci_parity_count = ATOMIC_INIT(0);
25static atomic_t pci_nonparity_count = ATOMIC_INIT(0);
26static int edac_pci_poll_msec = 1000;
27
28static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
29static struct completion edac_pci_kobj_complete;
30static atomic_t edac_pci_sysfs_refcount = ATOMIC_INIT(0);
31
32int edac_pci_get_check_errors(void)
33{
34 return check_pci_errors;
35}
36
37int edac_pci_get_log_pe(void)
38{
39 return edac_pci_log_pe;
40}
41
42int edac_pci_get_log_npe(void)
43{
44 return edac_pci_log_npe;
45}
46
47int edac_pci_get_panic_on_pe(void)
48{
49 return edac_pci_panic_on_pe;
50}
51
52int edac_pci_get_poll_msec(void)
53{
54 return edac_pci_poll_msec;
55}
56
57/**************************** EDAC PCI sysfs instance *******************/
58static ssize_t instance_pe_count_show(struct edac_pci_ctl_info *pci, char *data)
59{
60 return sprintf(data, "%u\n", atomic_read(&pci->counters.pe_count));
61}
62
63static ssize_t instance_npe_count_show(struct edac_pci_ctl_info *pci,
64 char *data)
65{
66 return sprintf(data, "%u\n", atomic_read(&pci->counters.npe_count));
67}
68
69#define to_instance(k) container_of(k, struct edac_pci_ctl_info, kobj)
70#define to_instance_attr(a) container_of(a, struct instance_attribute, attr)
71
72/* DEVICE instance kobject release() function */
73static void edac_pci_instance_release(struct kobject *kobj)
74{
75 struct edac_pci_ctl_info *pci;
76
77 debugf1("%s()\n", __func__);
78
79 pci = to_instance(kobj);
80 complete(&pci->kobj_complete);
81}
82
83/* instance specific attribute structure */
84struct instance_attribute {
85 struct attribute attr;
86 ssize_t(*show) (struct edac_pci_ctl_info *, char *);
87 ssize_t(*store) (struct edac_pci_ctl_info *, const char *, size_t);
88};
89
90/* Function to 'show' fields from the edac_pci 'instance' structure */
91static ssize_t edac_pci_instance_show(struct kobject *kobj,
92 struct attribute *attr, char *buffer)
93{
94 struct edac_pci_ctl_info *pci = to_instance(kobj);
95 struct instance_attribute *instance_attr = to_instance_attr(attr);
96
97 if (instance_attr->show)
98 return instance_attr->show(pci, buffer);
99 return -EIO;
100}
101
102/* Function to 'store' fields into the edac_pci 'instance' structure */
103static ssize_t edac_pci_instance_store(struct kobject *kobj,
104 struct attribute *attr,
105 const char *buffer, size_t count)
106{
107 struct edac_pci_ctl_info *pci = to_instance(kobj);
108 struct instance_attribute *instance_attr = to_instance_attr(attr);
109
110 if (instance_attr->store)
111 return instance_attr->store(pci, buffer, count);
112 return -EIO;
113}
114
115static struct sysfs_ops pci_instance_ops = {
116 .show = edac_pci_instance_show,
117 .store = edac_pci_instance_store
118};
119
120#define INSTANCE_ATTR(_name, _mode, _show, _store) \
121static struct instance_attribute attr_instance_##_name = { \
122 .attr = {.name = __stringify(_name), .mode = _mode }, \
123 .show = _show, \
124 .store = _store, \
125};
126
127INSTANCE_ATTR(pe_count, S_IRUGO, instance_pe_count_show, NULL);
128INSTANCE_ATTR(npe_count, S_IRUGO, instance_npe_count_show, NULL);
129
130/* pci instance attributes */
131static struct instance_attribute *pci_instance_attr[] = {
132 &attr_instance_pe_count,
133 &attr_instance_npe_count,
134 NULL
135};
136
137/* the ktype for pci instance */
138static struct kobj_type ktype_pci_instance = {
139 .release = edac_pci_instance_release,
140 .sysfs_ops = &pci_instance_ops,
141 .default_attrs = (struct attribute **)pci_instance_attr,
142};
143
144static int edac_pci_create_instance_kobj(struct edac_pci_ctl_info *pci, int idx)
145{
146 int err;
147
148 pci->kobj.parent = &edac_pci_kobj;
149 pci->kobj.ktype = &ktype_pci_instance;
150
151 err = kobject_set_name(&pci->kobj, "pci%d", idx);
152 if (err)
153 return err;
154
155 err = kobject_register(&pci->kobj);
156 if (err != 0) {
157 debugf2("%s() failed to register instance pci%d\n",
158 __func__, idx);
159 return err;
160 }
161
162 debugf1("%s() Register instance 'pci%d' kobject\n", __func__, idx);
163
164 return 0;
165}
166
167static void
168edac_pci_delete_instance_kobj(struct edac_pci_ctl_info *pci, int idx)
169{
170 init_completion(&pci->kobj_complete);
171 kobject_unregister(&pci->kobj);
172 wait_for_completion(&pci->kobj_complete);
173}
174
175/***************************** EDAC PCI sysfs root **********************/
176#define to_edacpci(k) container_of(k, struct edac_pci_ctl_info, kobj)
177#define to_edacpci_attr(a) container_of(a, struct edac_pci_attr, attr)
178
179static ssize_t edac_pci_int_show(void *ptr, char *buffer)
180{
181 int *value = ptr;
182 return sprintf(buffer, "%d\n", *value);
183}
184
185static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
186{
187 int *value = ptr;
188
189 if (isdigit(*buffer))
190 *value = simple_strtoul(buffer, NULL, 0);
191
192 return count;
193}
194
195struct edac_pci_dev_attribute {
196 struct attribute attr;
197 void *value;
198 ssize_t(*show) (void *, char *);
199 ssize_t(*store) (void *, const char *, size_t);
200};
201
202/* Set of show/store abstract level functions for PCI Parity object */
203static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
204 char *buffer)
205{
206 struct edac_pci_dev_attribute *edac_pci_dev;
207 edac_pci_dev = (struct edac_pci_dev_attribute *)attr;
208
209 if (edac_pci_dev->show)
210 return edac_pci_dev->show(edac_pci_dev->value, buffer);
211 return -EIO;
212}
213
214static ssize_t edac_pci_dev_store(struct kobject *kobj,
215 struct attribute *attr, const char *buffer,
216 size_t count)
217{
218 struct edac_pci_dev_attribute *edac_pci_dev;
219 edac_pci_dev = (struct edac_pci_dev_attribute *)attr;
220
221 if (edac_pci_dev->show)
222 return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
223 return -EIO;
224}
225
226static struct sysfs_ops edac_pci_sysfs_ops = {
227 .show = edac_pci_dev_show,
228 .store = edac_pci_dev_store
229};
230
231#define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
232static struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
233 .attr = {.name = __stringify(_name), .mode = _mode }, \
234 .value = &_name, \
235 .show = _show, \
236 .store = _store, \
237};
238
239#define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
240static struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
241 .attr = {.name = __stringify(_name), .mode = _mode }, \
242 .value = _data, \
243 .show = _show, \
244 .store = _store, \
245};
246
247/* PCI Parity control files */
248EDAC_PCI_ATTR(check_pci_errors, S_IRUGO | S_IWUSR, edac_pci_int_show,
249 edac_pci_int_store);
250EDAC_PCI_ATTR(edac_pci_log_pe, S_IRUGO | S_IWUSR, edac_pci_int_show,
251 edac_pci_int_store);
252EDAC_PCI_ATTR(edac_pci_log_npe, S_IRUGO | S_IWUSR, edac_pci_int_show,
253 edac_pci_int_store);
254EDAC_PCI_ATTR(edac_pci_panic_on_pe, S_IRUGO | S_IWUSR, edac_pci_int_show,
255 edac_pci_int_store);
256EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
257EDAC_PCI_ATTR(pci_nonparity_count, S_IRUGO, edac_pci_int_show, NULL);
258
259/* Base Attributes of the memory ECC object */
260static struct edac_pci_dev_attribute *edac_pci_attr[] = {
261 &edac_pci_attr_check_pci_errors,
262 &edac_pci_attr_edac_pci_log_pe,
263 &edac_pci_attr_edac_pci_log_npe,
264 &edac_pci_attr_edac_pci_panic_on_pe,
265 &edac_pci_attr_pci_parity_count,
266 &edac_pci_attr_pci_nonparity_count,
267 NULL,
268};
269
270/* No memory to release */
271static void edac_pci_release(struct kobject *kobj)
272{
273 struct edac_pci_ctl_info *pci;
274
275 pci = to_edacpci(kobj);
276
277 debugf1("%s()\n", __func__);
278 complete(&pci->kobj_complete);
279}
280
281static struct kobj_type ktype_edac_pci = {
282 .release = edac_pci_release,
283 .sysfs_ops = &edac_pci_sysfs_ops,
284 .default_attrs = (struct attribute **)edac_pci_attr,
285};
286
287/**
288 * edac_sysfs_pci_setup()
289 *
290 * setup the sysfs for EDAC PCI attributes
291 * assumes edac_class has already been initialized
292 */
293int edac_pci_register_main_kobj(void)
294{
295 int err;
296 struct sysdev_class *edac_class;
297
298 debugf1("%s()\n", __func__);
299
300 edac_class = edac_get_edac_class();
301 if (edac_class == NULL) {
302 debugf1("%s() no edac_class\n", __func__);
303 return -ENODEV;
304 }
305
306 edac_pci_kobj.ktype = &ktype_edac_pci;
307
308 edac_pci_kobj.parent = &edac_class->kset.kobj;
309
310 err = kobject_set_name(&edac_pci_kobj, "pci");
311 if (err)
312 return err;
313
314 /* Instanstiate the pci object */
315 /* FIXME: maybe new sysdev_create_subdir() */
316 err = kobject_register(&edac_pci_kobj);
317
318 if (err) {
319 debugf1("Failed to register '.../edac/pci'\n");
320 return err;
321 }
322
323 debugf1("Registered '.../edac/pci' kobject\n");
324
325 return 0;
326}
327
328/*
329 * edac_pci_unregister_main_kobj()
330 *
331 * perform the sysfs teardown for the PCI attributes
332 */
333void edac_pci_unregister_main_kobj(void)
334{
335 debugf0("%s()\n", __func__);
336 init_completion(&edac_pci_kobj_complete);
337 kobject_unregister(&edac_pci_kobj);
338 wait_for_completion(&edac_pci_kobj_complete);
339}
340
341int edac_pci_create_sysfs(struct edac_pci_ctl_info *pci)
342{
343 int err;
344 struct kobject *edac_kobj = &pci->kobj;
345
346 if (atomic_inc_return(&edac_pci_sysfs_refcount) == 1) {
347 err = edac_pci_register_main_kobj();
348 if (err) {
349 atomic_dec(&edac_pci_sysfs_refcount);
350 return err;
351 }
352 }
353
354 err = edac_pci_create_instance_kobj(pci, pci->pci_idx);
355 if (err) {
356 if (atomic_dec_return(&edac_pci_sysfs_refcount) == 0)
357 edac_pci_unregister_main_kobj();
358 }
359
360 debugf0("%s() idx=%d\n", __func__, pci->pci_idx);
361
362 err = sysfs_create_link(edac_kobj, &pci->dev->kobj, EDAC_PCI_SYMLINK);
363 if (err) {
364 debugf0("%s() sysfs_create_link() returned err= %d\n",
365 __func__, err);
366 return err;
367 }
368
369 return 0;
370}
371
372void edac_pci_remove_sysfs(struct edac_pci_ctl_info *pci)
373{
374 debugf0("%s()\n", __func__);
375
376 edac_pci_delete_instance_kobj(pci, pci->pci_idx);
377
378 sysfs_remove_link(&pci->kobj, EDAC_PCI_SYMLINK);
379
380 if (atomic_dec_return(&edac_pci_sysfs_refcount) == 0)
381 edac_pci_unregister_main_kobj();
382}
383
384/************************ PCI error handling *************************/
385static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
386{
387 int where;
388 u16 status;
389
390 where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
391 pci_read_config_word(dev, where, &status);
392
393 /* If we get back 0xFFFF then we must suspect that the card has been
394 * pulled but the Linux PCI layer has not yet finished cleaning up.
395 * We don't want to report on such devices
396 */
397
398 if (status == 0xFFFF) {
399 u32 sanity;
400
401 pci_read_config_dword(dev, 0, &sanity);
402
403 if (sanity == 0xFFFFFFFF)
404 return 0;
405 }
406
407 status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
408 PCI_STATUS_PARITY;
409
410 if (status)
411 /* reset only the bits we are interested in */
412 pci_write_config_word(dev, where, status);
413
414 return status;
415}
416
417typedef void (*pci_parity_check_fn_t) (struct pci_dev * dev);
418
419/* Clear any PCI parity errors logged by this device. */
420static void edac_pci_dev_parity_clear(struct pci_dev *dev)
421{
422 u8 header_type;
423
424 get_pci_parity_status(dev, 0);
425
426 /* read the device TYPE, looking for bridges */
427 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
428
429 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
430 get_pci_parity_status(dev, 1);
431}
432
433/*
434 * PCI Parity polling
435 *
436 */
437static void edac_pci_dev_parity_test(struct pci_dev *dev)
438{
439 u16 status;
440 u8 header_type;
441
442 /* read the STATUS register on this device
443 */
444 status = get_pci_parity_status(dev, 0);
445
446 debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id);
447
448 /* check the status reg for errors */
449 if (status) {
450 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) {
451 edac_printk(KERN_CRIT, EDAC_PCI,
452 "Signaled System Error on %s\n",
453 pci_name(dev));
454 atomic_inc(&pci_nonparity_count);
455 }
456
457 if (status & (PCI_STATUS_PARITY)) {
458 edac_printk(KERN_CRIT, EDAC_PCI,
459 "Master Data Parity Error on %s\n",
460 pci_name(dev));
461
462 atomic_inc(&pci_parity_count);
463 }
464
465 if (status & (PCI_STATUS_DETECTED_PARITY)) {
466 edac_printk(KERN_CRIT, EDAC_PCI,
467 "Detected Parity Error on %s\n",
468 pci_name(dev));
469
470 atomic_inc(&pci_parity_count);
471 }
472 }
473
474 /* read the device TYPE, looking for bridges */
475 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
476
477 debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id);
478
479 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
480 /* On bridges, need to examine secondary status register */
481 status = get_pci_parity_status(dev, 1);
482
483 debugf2("PCI SEC_STATUS= 0x%04x %s\n", status, dev->dev.bus_id);
484
485 /* check the secondary status reg for errors */
486 if (status) {
487 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR)) {
488 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
489 "Signaled System Error on %s\n",
490 pci_name(dev));
491 atomic_inc(&pci_nonparity_count);
492 }
493
494 if (status & (PCI_STATUS_PARITY)) {
495 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
496 "Master Data Parity Error on "
497 "%s\n", pci_name(dev));
498
499 atomic_inc(&pci_parity_count);
500 }
501
502 if (status & (PCI_STATUS_DETECTED_PARITY)) {
503 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
504 "Detected Parity Error on %s\n",
505 pci_name(dev));
506
507 atomic_inc(&pci_parity_count);
508 }
509 }
510 }
511}
512
513/*
514 * pci_dev parity list iterator
515 * Scan the PCI device list for one iteration, looking for SERRORs
516 * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
517 */
518static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
519{
520 struct pci_dev *dev = NULL;
521
522 /* request for kernel access to the next PCI device, if any,
523 * and while we are looking at it have its reference count
524 * bumped until we are done with it
525 */
526 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
527 fn(dev);
528 }
529}
530
531/*
532 * edac_pci_do_parity_check
533 *
534 * performs the actual PCI parity check operation
535 */
536void edac_pci_do_parity_check(void)
537{
538 unsigned long flags;
539 int before_count;
540
541 debugf3("%s()\n", __func__);
542
543 if (!check_pci_errors)
544 return;
545
546 before_count = atomic_read(&pci_parity_count);
547
548 /* scan all PCI devices looking for a Parity Error on devices and
549 * bridges
550 */
551 local_irq_save(flags);
552 edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
553 local_irq_restore(flags);
554
555 /* Only if operator has selected panic on PCI Error */
556 if (edac_pci_get_panic_on_pe()) {
557 /* If the count is different 'after' from 'before' */
558 if (before_count != atomic_read(&pci_parity_count))
559 panic("EDAC: PCI Parity Error");
560 }
561}
562
563void edac_pci_clear_parity_errors(void)
564{
565 /* Clear any PCI bus parity errors that devices initially have logged
566 * in their registers.
567 */
568 edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
569}
570void edac_pci_handle_pe(struct edac_pci_ctl_info *pci, const char *msg)
571{
572
573 /* global PE counter incremented by edac_pci_do_parity_check() */
574 atomic_inc(&pci->counters.pe_count);
575
576 if (edac_pci_get_log_pe())
577 edac_pci_printk(pci, KERN_WARNING,
578 "Parity Error ctl: %s %d: %s\n",
579 pci->ctl_name, pci->pci_idx, msg);
580
581 /*
582 * poke all PCI devices and see which one is the troublemaker
583 * panic() is called if set
584 */
585 edac_pci_do_parity_check();
586}
587
588EXPORT_SYMBOL_GPL(edac_pci_handle_pe);
589
590void edac_pci_handle_npe(struct edac_pci_ctl_info *pci, const char *msg)
591{
592
593 /* global NPE counter incremented by edac_pci_do_parity_check() */
594 atomic_inc(&pci->counters.npe_count);
595
596 if (edac_pci_get_log_npe())
597 edac_pci_printk(pci, KERN_WARNING,
598 "Non-Parity Error ctl: %s %d: %s\n",
599 pci->ctl_name, pci->pci_idx, msg);
600
601 /*
602 * poke all PCI devices and see which one is the troublemaker
603 * panic() is called if set
604 */
605 edac_pci_do_parity_check();
606}
607
608EXPORT_SYMBOL_GPL(edac_pci_handle_npe);
609
610/*
611 * Define the PCI parameter to the module
612 */
613module_param(check_pci_errors, int, 0644);
614MODULE_PARM_DESC(check_pci_errors,
615 "Check for PCI bus parity errors: 0=off 1=on");
616module_param(edac_pci_panic_on_pe, int, 0644);
617MODULE_PARM_DESC(edac_pci_panic_on_pe,
618 "Panic on PCI Bus Parity error: 0=off 1=on");
619
620#endif /* CONFIG_PCI */
diff --git a/drivers/edac/edac_stub.c b/drivers/edac/edac_stub.c
new file mode 100644
index 0000000000..20b428aa15
--- /dev/null
+++ b/drivers/edac/edac_stub.c
@@ -0,0 +1,46 @@
1/*
2 * common EDAC components that must be in kernel
3 *
4 * Author: Dave Jiang <djiang@mvista.com>
5 *
6 * 2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
9 * or implied.
10 *
11 */
12#include <linux/module.h>
13#include <linux/edac.h>
14#include <asm/atomic.h>
15#include <asm/edac.h>
16
17int edac_op_state = EDAC_OPSTATE_INVAL;
18EXPORT_SYMBOL_GPL(edac_op_state);
19
20atomic_t edac_handlers = ATOMIC_INIT(0);
21EXPORT_SYMBOL_GPL(edac_handlers);
22
23int edac_err_assert = 0;
24EXPORT_SYMBOL_GPL(edac_err_assert);
25
26/*
27 * called to determine if there is an EDAC driver interested in
28 * knowing an event (such as NMI) occurred
29 */
30int edac_handler_set(void)
31{
32 if (edac_op_state == EDAC_OPSTATE_POLL)
33 return 0;
34
35 return atomic_read(&edac_handlers);
36}
37EXPORT_SYMBOL_GPL(edac_handler_set);
38
39/*
40 * handler for NMI type of interrupts to assert error
41 */
42void edac_atomic_assert_error(void)
43{
44 edac_err_assert++;
45}
46EXPORT_SYMBOL_GPL(edac_atomic_assert_error);
diff --git a/drivers/edac/i3000_edac.c b/drivers/edac/i3000_edac.c
new file mode 100644
index 0000000000..0ecfdc432f
--- /dev/null
+++ b/drivers/edac/i3000_edac.c
@@ -0,0 +1,506 @@
1/*
2 * Intel 3000/3010 Memory Controller kernel module
3 * Copyright (C) 2007 Akamai Technologies, Inc.
4 * Shamelessly copied from:
5 * Intel D82875P Memory Controller kernel module
6 * (C) 2003 Linux Networx (http://lnxi.com)
7 *
8 * This file may be distributed under the terms of the
9 * GNU General Public License.
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <linux/pci_ids.h>
16#include <linux/slab.h>
17#include "edac_core.h"
18
19#define I3000_REVISION "1.1"
20
21#define EDAC_MOD_STR "i3000_edac"
22
23#define I3000_RANKS 8
24#define I3000_RANKS_PER_CHANNEL 4
25#define I3000_CHANNELS 2
26
27/* Intel 3000 register addresses - device 0 function 0 - DRAM Controller */
28
29#define I3000_MCHBAR 0x44 /* MCH Memory Mapped Register BAR */
30#define I3000_MCHBAR_MASK 0xffffc000
31#define I3000_MMR_WINDOW_SIZE 16384
32
33#define I3000_EDEAP 0x70 /* Extended DRAM Error Address Pointer (8b)
34 *
35 * 7:1 reserved
36 * 0 bit 32 of address
37 */
38#define I3000_DEAP 0x58 /* DRAM Error Address Pointer (32b)
39 *
40 * 31:7 address
41 * 6:1 reserved
42 * 0 Error channel 0/1
43 */
44#define I3000_DEAP_GRAIN (1 << 7)
45#define I3000_DEAP_PFN(edeap, deap) ((((edeap) & 1) << (32 - PAGE_SHIFT)) | \
46 ((deap) >> PAGE_SHIFT))
47#define I3000_DEAP_OFFSET(deap) ((deap) & ~(I3000_DEAP_GRAIN-1) & ~PAGE_MASK)
48#define I3000_DEAP_CHANNEL(deap) ((deap) & 1)
49
50#define I3000_DERRSYN 0x5c /* DRAM Error Syndrome (8b)
51 *
52 * 7:0 DRAM ECC Syndrome
53 */
54
55#define I3000_ERRSTS 0xc8 /* Error Status Register (16b)
56 *
57 * 15:12 reserved
58 * 11 MCH Thermal Sensor Event for SMI/SCI/SERR
59 * 10 reserved
60 * 9 LOCK to non-DRAM Memory Flag (LCKF)
61 * 8 Received Refresh Timeout Flag (RRTOF)
62 * 7:2 reserved
63 * 1 Multiple-bit DRAM ECC Error Flag (DMERR)
64 * 0 Single-bit DRAM ECC Error Flag (DSERR)
65 */
66#define I3000_ERRSTS_BITS 0x0b03 /* bits which indicate errors */
67#define I3000_ERRSTS_UE 0x0002
68#define I3000_ERRSTS_CE 0x0001
69
70#define I3000_ERRCMD 0xca /* Error Command (16b)
71 *
72 * 15:12 reserved
73 * 11 SERR on MCH Thermal Sensor Event (TSESERR)
74 * 10 reserved
75 * 9 SERR on LOCK to non-DRAM Memory (LCKERR)
76 * 8 SERR on DRAM Refresh Timeout (DRTOERR)
77 * 7:2 reserved
78 * 1 SERR Multiple-Bit DRAM ECC Error (DMERR)
79 * 0 SERR on Single-Bit ECC Error (DSERR)
80 */
81
82/* Intel MMIO register space - device 0 function 0 - MMR space */
83
84#define I3000_DRB_SHIFT 25 /* 32MiB grain */
85
86#define I3000_C0DRB 0x100 /* Channel 0 DRAM Rank Boundary (8b x 4)
87 *
88 * 7:0 Channel 0 DRAM Rank Boundary Address
89 */
90#define I3000_C1DRB 0x180 /* Channel 1 DRAM Rank Boundary (8b x 4)
91 *
92 * 7:0 Channel 1 DRAM Rank Boundary Address
93 */
94
95#define I3000_C0DRA 0x108 /* Channel 0 DRAM Rank Attribute (8b x 2)
96 *
97 * 7 reserved
98 * 6:4 DRAM odd Rank Attribute
99 * 3 reserved
100 * 2:0 DRAM even Rank Attribute
101 *
102 * Each attribute defines the page
103 * size of the corresponding rank:
104 * 000: unpopulated
105 * 001: reserved
106 * 010: 4 KB
107 * 011: 8 KB
108 * 100: 16 KB
109 * Others: reserved
110 */
111#define I3000_C1DRA 0x188 /* Channel 1 DRAM Rank Attribute (8b x 2) */
112#define ODD_RANK_ATTRIB(dra) (((dra) & 0x70) >> 4)
113#define EVEN_RANK_ATTRIB(dra) ((dra) & 0x07)
114
115#define I3000_C0DRC0 0x120 /* DRAM Controller Mode 0 (32b)
116 *
117 * 31:30 reserved
118 * 29 Initialization Complete (IC)
119 * 28:11 reserved
120 * 10:8 Refresh Mode Select (RMS)
121 * 7 reserved
122 * 6:4 Mode Select (SMS)
123 * 3:2 reserved
124 * 1:0 DRAM Type (DT)
125 */
126
127#define I3000_C0DRC1 0x124 /* DRAM Controller Mode 1 (32b)
128 *
129 * 31 Enhanced Addressing Enable (ENHADE)
130 * 30:0 reserved
131 */
132
133enum i3000p_chips {
134 I3000 = 0,
135};
136
137struct i3000_dev_info {
138 const char *ctl_name;
139};
140
141struct i3000_error_info {
142 u16 errsts;
143 u8 derrsyn;
144 u8 edeap;
145 u32 deap;
146 u16 errsts2;
147};
148
149static const struct i3000_dev_info i3000_devs[] = {
150 [I3000] = {
151 .ctl_name = "i3000"},
152};
153
154static struct pci_dev *mci_pdev;
155static int i3000_registered = 1;
156static struct edac_pci_ctl_info *i3000_pci;
157
158static void i3000_get_error_info(struct mem_ctl_info *mci,
159 struct i3000_error_info *info)
160{
161 struct pci_dev *pdev;
162
163 pdev = to_pci_dev(mci->dev);
164
165 /*
166 * This is a mess because there is no atomic way to read all the
167 * registers at once and the registers can transition from CE being
168 * overwritten by UE.
169 */
170 pci_read_config_word(pdev, I3000_ERRSTS, &info->errsts);
171 if (!(info->errsts & I3000_ERRSTS_BITS))
172 return;
173 pci_read_config_byte(pdev, I3000_EDEAP, &info->edeap);
174 pci_read_config_dword(pdev, I3000_DEAP, &info->deap);
175 pci_read_config_byte(pdev, I3000_DERRSYN, &info->derrsyn);
176 pci_read_config_word(pdev, I3000_ERRSTS, &info->errsts2);
177
178 /*
179 * If the error is the same for both reads then the first set
180 * of reads is valid. If there is a change then there is a CE
181 * with no info and the second set of reads is valid and
182 * should be UE info.
183 */
184 if ((info->errsts ^ info->errsts2) & I3000_ERRSTS_BITS) {
185 pci_read_config_byte(pdev, I3000_EDEAP, &info->edeap);
186 pci_read_config_dword(pdev, I3000_DEAP, &info->deap);
187 pci_read_config_byte(pdev, I3000_DERRSYN, &info->derrsyn);
188 }
189
190 /* Clear any error bits.
191 * (Yes, we really clear bits by writing 1 to them.)
192 */
193 pci_write_bits16(pdev, I3000_ERRSTS, I3000_ERRSTS_BITS,
194 I3000_ERRSTS_BITS);
195}
196
197static int i3000_process_error_info(struct mem_ctl_info *mci,
198 struct i3000_error_info *info,
199 int handle_errors)
200{
201 int row, multi_chan;
202 int pfn, offset, channel;
203
204 multi_chan = mci->csrows[0].nr_channels - 1;
205
206 if (!(info->errsts & I3000_ERRSTS_BITS))
207 return 0;
208
209 if (!handle_errors)
210 return 1;
211
212 if ((info->errsts ^ info->errsts2) & I3000_ERRSTS_BITS) {
213 edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
214 info->errsts = info->errsts2;
215 }
216
217 pfn = I3000_DEAP_PFN(info->edeap, info->deap);
218 offset = I3000_DEAP_OFFSET(info->deap);
219 channel = I3000_DEAP_CHANNEL(info->deap);
220
221 row = edac_mc_find_csrow_by_page(mci, pfn);
222
223 if (info->errsts & I3000_ERRSTS_UE)
224 edac_mc_handle_ue(mci, pfn, offset, row, "i3000 UE");
225 else
226 edac_mc_handle_ce(mci, pfn, offset, info->derrsyn, row,
227 multi_chan ? channel : 0, "i3000 CE");
228
229 return 1;
230}
231
232static void i3000_check(struct mem_ctl_info *mci)
233{
234 struct i3000_error_info info;
235
236 debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
237 i3000_get_error_info(mci, &info);
238 i3000_process_error_info(mci, &info, 1);
239}
240
241static int i3000_is_interleaved(const unsigned char *c0dra,
242 const unsigned char *c1dra,
243 const unsigned char *c0drb,
244 const unsigned char *c1drb)
245{
246 int i;
247
248 /* If the channels aren't populated identically then
249 * we're not interleaved.
250 */
251 for (i = 0; i < I3000_RANKS_PER_CHANNEL / 2; i++)
252 if (ODD_RANK_ATTRIB(c0dra[i]) != ODD_RANK_ATTRIB(c1dra[i]) ||
253 EVEN_RANK_ATTRIB(c0dra[i]) !=
254 EVEN_RANK_ATTRIB(c1dra[i]))
255 return 0;
256
257 /* If the rank boundaries for the two channels are different
258 * then we're not interleaved.
259 */
260 for (i = 0; i < I3000_RANKS_PER_CHANNEL; i++)
261 if (c0drb[i] != c1drb[i])
262 return 0;
263
264 return 1;
265}
266
267static int i3000_probe1(struct pci_dev *pdev, int dev_idx)
268{
269 int rc;
270 int i;
271 struct mem_ctl_info *mci = NULL;
272 unsigned long last_cumul_size;
273 int interleaved, nr_channels;
274 unsigned char dra[I3000_RANKS / 2], drb[I3000_RANKS];
275 unsigned char *c0dra = dra, *c1dra = &dra[I3000_RANKS_PER_CHANNEL / 2];
276 unsigned char *c0drb = drb, *c1drb = &drb[I3000_RANKS_PER_CHANNEL];
277 unsigned long mchbar;
278 void *window;
279
280 debugf0("MC: %s()\n", __func__);
281
282 pci_read_config_dword(pdev, I3000_MCHBAR, (u32 *) & mchbar);
283 mchbar &= I3000_MCHBAR_MASK;
284 window = ioremap_nocache(mchbar, I3000_MMR_WINDOW_SIZE);
285 if (!window) {
286 printk(KERN_ERR "i3000: cannot map mmio space at 0x%lx\n",
287 mchbar);
288 return -ENODEV;
289 }
290
291 c0dra[0] = readb(window + I3000_C0DRA + 0); /* ranks 0,1 */
292 c0dra[1] = readb(window + I3000_C0DRA + 1); /* ranks 2,3 */
293 c1dra[0] = readb(window + I3000_C1DRA + 0); /* ranks 0,1 */
294 c1dra[1] = readb(window + I3000_C1DRA + 1); /* ranks 2,3 */
295
296 for (i = 0; i < I3000_RANKS_PER_CHANNEL; i++) {
297 c0drb[i] = readb(window + I3000_C0DRB + i);
298 c1drb[i] = readb(window + I3000_C1DRB + i);
299 }
300
301 iounmap(window);
302
303 /* Figure out how many channels we have.
304 *
305 * If we have what the datasheet calls "asymmetric channels"
306 * (essentially the same as what was called "virtual single
307 * channel mode" in the i82875) then it's a single channel as
308 * far as EDAC is concerned.
309 */
310 interleaved = i3000_is_interleaved(c0dra, c1dra, c0drb, c1drb);
311 nr_channels = interleaved ? 2 : 1;
312 mci = edac_mc_alloc(0, I3000_RANKS / nr_channels, nr_channels, 0);
313 if (!mci)
314 return -ENOMEM;
315
316 debugf3("MC: %s(): init mci\n", __func__);
317
318 mci->dev = &pdev->dev;
319 mci->mtype_cap = MEM_FLAG_DDR2;
320
321 mci->edac_ctl_cap = EDAC_FLAG_SECDED;
322 mci->edac_cap = EDAC_FLAG_SECDED;
323
324 mci->mod_name = EDAC_MOD_STR;
325 mci->mod_ver = I3000_REVISION;
326 mci->ctl_name = i3000_devs[dev_idx].ctl_name;
327 mci->dev_name = pci_name(pdev);
328 mci->edac_check = i3000_check;
329 mci->ctl_page_to_phys = NULL;
330
331 /*
332 * The dram rank boundary (DRB) reg values are boundary addresses
333 * for each DRAM rank with a granularity of 32MB. DRB regs are
334 * cumulative; the last one will contain the total memory
335 * contained in all ranks.
336 *
337 * If we're in interleaved mode then we're only walking through
338 * the ranks of controller 0, so we double all the values we see.
339 */
340 for (last_cumul_size = i = 0; i < mci->nr_csrows; i++) {
341 u8 value;
342 u32 cumul_size;
343 struct csrow_info *csrow = &mci->csrows[i];
344
345 value = drb[i];
346 cumul_size = value << (I3000_DRB_SHIFT - PAGE_SHIFT);
347 if (interleaved)
348 cumul_size <<= 1;
349 debugf3("MC: %s(): (%d) cumul_size 0x%x\n",
350 __func__, i, cumul_size);
351 if (cumul_size == last_cumul_size) {
352 csrow->mtype = MEM_EMPTY;
353 continue;
354 }
355
356 csrow->first_page = last_cumul_size;
357 csrow->last_page = cumul_size - 1;
358 csrow->nr_pages = cumul_size - last_cumul_size;
359 last_cumul_size = cumul_size;
360 csrow->grain = I3000_DEAP_GRAIN;
361 csrow->mtype = MEM_DDR2;
362 csrow->dtype = DEV_UNKNOWN;
363 csrow->edac_mode = EDAC_UNKNOWN;
364 }
365
366 /* Clear any error bits.
367 * (Yes, we really clear bits by writing 1 to them.)
368 */
369 pci_write_bits16(pdev, I3000_ERRSTS, I3000_ERRSTS_BITS,
370 I3000_ERRSTS_BITS);
371
372 rc = -ENODEV;
373 if (edac_mc_add_mc(mci)) {
374 debugf3("MC: %s(): failed edac_mc_add_mc()\n", __func__);
375 goto fail;
376 }
377
378 /* allocating generic PCI control info */
379 i3000_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
380 if (!i3000_pci) {
381 printk(KERN_WARNING
382 "%s(): Unable to create PCI control\n",
383 __func__);
384 printk(KERN_WARNING
385 "%s(): PCI error report via EDAC not setup\n",
386 __func__);
387 }
388
389 /* get this far and it's successful */
390 debugf3("MC: %s(): success\n", __func__);
391 return 0;
392
393 fail:
394 if (mci)
395 edac_mc_free(mci);
396
397 return rc;
398}
399
400/* returns count (>= 0), or negative on error */
401static int __devinit i3000_init_one(struct pci_dev *pdev,
402 const struct pci_device_id *ent)
403{
404 int rc;
405
406 debugf0("MC: %s()\n", __func__);
407
408 if (pci_enable_device(pdev) < 0)
409 return -EIO;
410
411 rc = i3000_probe1(pdev, ent->driver_data);
412 if (mci_pdev == NULL)
413 mci_pdev = pci_dev_get(pdev);
414
415 return rc;
416}
417
418static void __devexit i3000_remove_one(struct pci_dev *pdev)
419{
420 struct mem_ctl_info *mci;
421
422 debugf0("%s()\n", __func__);
423
424 if (i3000_pci)
425 edac_pci_release_generic_ctl(i3000_pci);
426
427 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
428 return;
429
430 edac_mc_free(mci);
431}
432
433static const struct pci_device_id i3000_pci_tbl[] __devinitdata = {
434 {
435 PCI_VEND_DEV(INTEL, 3000_HB), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
436 I3000},
437 {
438 0,
439 } /* 0 terminated list. */
440};
441
442MODULE_DEVICE_TABLE(pci, i3000_pci_tbl);
443
444static struct pci_driver i3000_driver = {
445 .name = EDAC_MOD_STR,
446 .probe = i3000_init_one,
447 .remove = __devexit_p(i3000_remove_one),
448 .id_table = i3000_pci_tbl,
449};
450
451static int __init i3000_init(void)
452{
453 int pci_rc;
454
455 debugf3("MC: %s()\n", __func__);
456 pci_rc = pci_register_driver(&i3000_driver);
457 if (pci_rc < 0)
458 goto fail0;
459
460 if (mci_pdev == NULL) {
461 i3000_registered = 0;
462 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
463 PCI_DEVICE_ID_INTEL_3000_HB, NULL);
464 if (!mci_pdev) {
465 debugf0("i3000 pci_get_device fail\n");
466 pci_rc = -ENODEV;
467 goto fail1;
468 }
469
470 pci_rc = i3000_init_one(mci_pdev, i3000_pci_tbl);
471 if (pci_rc < 0) {
472 debugf0("i3000 init fail\n");
473 pci_rc = -ENODEV;
474 goto fail1;
475 }
476 }
477
478 return 0;
479
480fail1:
481 pci_unregister_driver(&i3000_driver);
482
483fail0:
484 if (mci_pdev)
485 pci_dev_put(mci_pdev);
486
487 return pci_rc;
488}
489
490static void __exit i3000_exit(void)
491{
492 debugf3("MC: %s()\n", __func__);
493
494 pci_unregister_driver(&i3000_driver);
495 if (!i3000_registered) {
496 i3000_remove_one(mci_pdev);
497 pci_dev_put(mci_pdev);
498 }
499}
500
501module_init(i3000_init);
502module_exit(i3000_exit);
503
504MODULE_LICENSE("GPL");
505MODULE_AUTHOR("Akamai Technologies Arthur Ulfeldt/Jason Uhlenkott");
506MODULE_DESCRIPTION("MC support for Intel 3000 memory hub controllers");
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
new file mode 100644
index 0000000000..96f7e63e39
--- /dev/null
+++ b/drivers/edac/i5000_edac.c
@@ -0,0 +1,1505 @@
1/*
2 * Intel 5000(P/V/X) class Memory Controllers kernel module
3 *
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
6 *
7 * Written by Douglas Thompson Linux Networx (http://lnxi.com)
8 * norsk5@xmission.com
9 *
10 * This module is based on the following document:
11 *
12 * Intel 5000X Chipset Memory Controller Hub (MCH) - Datasheet
13 * http://developer.intel.com/design/chipsets/datashts/313070.htm
14 *
15 */
16
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/pci.h>
20#include <linux/pci_ids.h>
21#include <linux/slab.h>
22#include <linux/edac.h>
23#include <asm/mmzone.h>
24
25#include "edac_core.h"
26
27/*
28 * Alter this version for the I5000 module when modifications are made
29 */
30#define I5000_REVISION " Ver: 2.0.12 " __DATE__
31#define EDAC_MOD_STR "i5000_edac"
32
33#define i5000_printk(level, fmt, arg...) \
34 edac_printk(level, "i5000", fmt, ##arg)
35
36#define i5000_mc_printk(mci, level, fmt, arg...) \
37 edac_mc_chipset_printk(mci, level, "i5000", fmt, ##arg)
38
39#ifndef PCI_DEVICE_ID_INTEL_FBD_0
40#define PCI_DEVICE_ID_INTEL_FBD_0 0x25F5
41#endif
42#ifndef PCI_DEVICE_ID_INTEL_FBD_1
43#define PCI_DEVICE_ID_INTEL_FBD_1 0x25F6
44#endif
45
46/* Device 16,
47 * Function 0: System Address
48 * Function 1: Memory Branch Map, Control, Errors Register
49 * Function 2: FSB Error Registers
50 *
51 * All 3 functions of Device 16 (0,1,2) share the SAME DID
52 */
53#define PCI_DEVICE_ID_INTEL_I5000_DEV16 0x25F0
54
55/* OFFSETS for Function 0 */
56
57/* OFFSETS for Function 1 */
58#define AMBASE 0x48
59#define MAXCH 0x56
60#define MAXDIMMPERCH 0x57
61#define TOLM 0x6C
62#define REDMEMB 0x7C
63#define RED_ECC_LOCATOR(x) ((x) & 0x3FFFF)
64#define REC_ECC_LOCATOR_EVEN(x) ((x) & 0x001FF)
65#define REC_ECC_LOCATOR_ODD(x) ((x) & 0x3FE00)
66#define MIR0 0x80
67#define MIR1 0x84
68#define MIR2 0x88
69#define AMIR0 0x8C
70#define AMIR1 0x90
71#define AMIR2 0x94
72
73#define FERR_FAT_FBD 0x98
74#define NERR_FAT_FBD 0x9C
75#define EXTRACT_FBDCHAN_INDX(x) (((x)>>28) & 0x3)
76#define FERR_FAT_FBDCHAN 0x30000000
77#define FERR_FAT_M3ERR 0x00000004
78#define FERR_FAT_M2ERR 0x00000002
79#define FERR_FAT_M1ERR 0x00000001
80#define FERR_FAT_MASK (FERR_FAT_M1ERR | \
81 FERR_FAT_M2ERR | \
82 FERR_FAT_M3ERR)
83
84#define FERR_NF_FBD 0xA0
85
86/* Thermal and SPD or BFD errors */
87#define FERR_NF_M28ERR 0x01000000
88#define FERR_NF_M27ERR 0x00800000
89#define FERR_NF_M26ERR 0x00400000
90#define FERR_NF_M25ERR 0x00200000
91#define FERR_NF_M24ERR 0x00100000
92#define FERR_NF_M23ERR 0x00080000
93#define FERR_NF_M22ERR 0x00040000
94#define FERR_NF_M21ERR 0x00020000
95
96/* Correctable errors */
97#define FERR_NF_M20ERR 0x00010000
98#define FERR_NF_M19ERR 0x00008000
99#define FERR_NF_M18ERR 0x00004000
100#define FERR_NF_M17ERR 0x00002000
101
102/* Non-Retry or redundant Retry errors */
103#define FERR_NF_M16ERR 0x00001000
104#define FERR_NF_M15ERR 0x00000800
105#define FERR_NF_M14ERR 0x00000400
106#define FERR_NF_M13ERR 0x00000200
107
108/* Uncorrectable errors */
109#define FERR_NF_M12ERR 0x00000100
110#define FERR_NF_M11ERR 0x00000080
111#define FERR_NF_M10ERR 0x00000040
112#define FERR_NF_M9ERR 0x00000020
113#define FERR_NF_M8ERR 0x00000010
114#define FERR_NF_M7ERR 0x00000008
115#define FERR_NF_M6ERR 0x00000004
116#define FERR_NF_M5ERR 0x00000002
117#define FERR_NF_M4ERR 0x00000001
118
119#define FERR_NF_UNCORRECTABLE (FERR_NF_M12ERR | \
120 FERR_NF_M11ERR | \
121 FERR_NF_M10ERR | \
122 FERR_NF_M8ERR | \
123 FERR_NF_M7ERR | \
124 FERR_NF_M6ERR | \
125 FERR_NF_M5ERR | \
126 FERR_NF_M4ERR)
127#define FERR_NF_CORRECTABLE (FERR_NF_M20ERR | \
128 FERR_NF_M19ERR | \
129 FERR_NF_M18ERR | \
130 FERR_NF_M17ERR)
131#define FERR_NF_DIMM_SPARE (FERR_NF_M27ERR | \
132 FERR_NF_M28ERR)
133#define FERR_NF_THERMAL (FERR_NF_M26ERR | \
134 FERR_NF_M25ERR | \
135 FERR_NF_M24ERR | \
136 FERR_NF_M23ERR)
137#define FERR_NF_SPD_PROTOCOL (FERR_NF_M22ERR)
138#define FERR_NF_NORTH_CRC (FERR_NF_M21ERR)
139#define FERR_NF_NON_RETRY (FERR_NF_M13ERR | \
140 FERR_NF_M14ERR | \
141 FERR_NF_M15ERR)
142
143#define NERR_NF_FBD 0xA4
144#define FERR_NF_MASK (FERR_NF_UNCORRECTABLE | \
145 FERR_NF_CORRECTABLE | \
146 FERR_NF_DIMM_SPARE | \
147 FERR_NF_THERMAL | \
148 FERR_NF_SPD_PROTOCOL | \
149 FERR_NF_NORTH_CRC | \
150 FERR_NF_NON_RETRY)
151
152#define EMASK_FBD 0xA8
153#define EMASK_FBD_M28ERR 0x08000000
154#define EMASK_FBD_M27ERR 0x04000000
155#define EMASK_FBD_M26ERR 0x02000000
156#define EMASK_FBD_M25ERR 0x01000000
157#define EMASK_FBD_M24ERR 0x00800000
158#define EMASK_FBD_M23ERR 0x00400000
159#define EMASK_FBD_M22ERR 0x00200000
160#define EMASK_FBD_M21ERR 0x00100000
161#define EMASK_FBD_M20ERR 0x00080000
162#define EMASK_FBD_M19ERR 0x00040000
163#define EMASK_FBD_M18ERR 0x00020000
164#define EMASK_FBD_M17ERR 0x00010000
165
166#define EMASK_FBD_M15ERR 0x00004000
167#define EMASK_FBD_M14ERR 0x00002000
168#define EMASK_FBD_M13ERR 0x00001000
169#define EMASK_FBD_M12ERR 0x00000800
170#define EMASK_FBD_M11ERR 0x00000400
171#define EMASK_FBD_M10ERR 0x00000200
172#define EMASK_FBD_M9ERR 0x00000100
173#define EMASK_FBD_M8ERR 0x00000080
174#define EMASK_FBD_M7ERR 0x00000040
175#define EMASK_FBD_M6ERR 0x00000020
176#define EMASK_FBD_M5ERR 0x00000010
177#define EMASK_FBD_M4ERR 0x00000008
178#define EMASK_FBD_M3ERR 0x00000004
179#define EMASK_FBD_M2ERR 0x00000002
180#define EMASK_FBD_M1ERR 0x00000001
181
182#define ENABLE_EMASK_FBD_FATAL_ERRORS (EMASK_FBD_M1ERR | \
183 EMASK_FBD_M2ERR | \
184 EMASK_FBD_M3ERR)
185
186#define ENABLE_EMASK_FBD_UNCORRECTABLE (EMASK_FBD_M4ERR | \
187 EMASK_FBD_M5ERR | \
188 EMASK_FBD_M6ERR | \
189 EMASK_FBD_M7ERR | \
190 EMASK_FBD_M8ERR | \
191 EMASK_FBD_M9ERR | \
192 EMASK_FBD_M10ERR | \
193 EMASK_FBD_M11ERR | \
194 EMASK_FBD_M12ERR)
195#define ENABLE_EMASK_FBD_CORRECTABLE (EMASK_FBD_M17ERR | \
196 EMASK_FBD_M18ERR | \
197 EMASK_FBD_M19ERR | \
198 EMASK_FBD_M20ERR)
199#define ENABLE_EMASK_FBD_DIMM_SPARE (EMASK_FBD_M27ERR | \
200 EMASK_FBD_M28ERR)
201#define ENABLE_EMASK_FBD_THERMALS (EMASK_FBD_M26ERR | \
202 EMASK_FBD_M25ERR | \
203 EMASK_FBD_M24ERR | \
204 EMASK_FBD_M23ERR)
205#define ENABLE_EMASK_FBD_SPD_PROTOCOL (EMASK_FBD_M22ERR)
206#define ENABLE_EMASK_FBD_NORTH_CRC (EMASK_FBD_M21ERR)
207#define ENABLE_EMASK_FBD_NON_RETRY (EMASK_FBD_M15ERR | \
208 EMASK_FBD_M14ERR | \
209 EMASK_FBD_M13ERR)
210
211#define ENABLE_EMASK_ALL (ENABLE_EMASK_FBD_NON_RETRY | \
212 ENABLE_EMASK_FBD_NORTH_CRC | \
213 ENABLE_EMASK_FBD_SPD_PROTOCOL | \
214 ENABLE_EMASK_FBD_THERMALS | \
215 ENABLE_EMASK_FBD_DIMM_SPARE | \
216 ENABLE_EMASK_FBD_FATAL_ERRORS | \
217 ENABLE_EMASK_FBD_CORRECTABLE | \
218 ENABLE_EMASK_FBD_UNCORRECTABLE)
219
220#define ERR0_FBD 0xAC
221#define ERR1_FBD 0xB0
222#define ERR2_FBD 0xB4
223#define MCERR_FBD 0xB8
224#define NRECMEMA 0xBE
225#define NREC_BANK(x) (((x)>>12) & 0x7)
226#define NREC_RDWR(x) (((x)>>11) & 1)
227#define NREC_RANK(x) (((x)>>8) & 0x7)
228#define NRECMEMB 0xC0
229#define NREC_CAS(x) (((x)>>16) & 0xFFFFFF)
230#define NREC_RAS(x) ((x) & 0x7FFF)
231#define NRECFGLOG 0xC4
232#define NREEECFBDA 0xC8
233#define NREEECFBDB 0xCC
234#define NREEECFBDC 0xD0
235#define NREEECFBDD 0xD4
236#define NREEECFBDE 0xD8
237#define REDMEMA 0xDC
238#define RECMEMA 0xE2
239#define REC_BANK(x) (((x)>>12) & 0x7)
240#define REC_RDWR(x) (((x)>>11) & 1)
241#define REC_RANK(x) (((x)>>8) & 0x7)
242#define RECMEMB 0xE4
243#define REC_CAS(x) (((x)>>16) & 0xFFFFFF)
244#define REC_RAS(x) ((x) & 0x7FFF)
245#define RECFGLOG 0xE8
246#define RECFBDA 0xEC
247#define RECFBDB 0xF0
248#define RECFBDC 0xF4
249#define RECFBDD 0xF8
250#define RECFBDE 0xFC
251
252/* OFFSETS for Function 2 */
253
254/*
255 * Device 21,
256 * Function 0: Memory Map Branch 0
257 *
258 * Device 22,
259 * Function 0: Memory Map Branch 1
260 */
261#define PCI_DEVICE_ID_I5000_BRANCH_0 0x25F5
262#define PCI_DEVICE_ID_I5000_BRANCH_1 0x25F6
263
264#define AMB_PRESENT_0 0x64
265#define AMB_PRESENT_1 0x66
266#define MTR0 0x80
267#define MTR1 0x84
268#define MTR2 0x88
269#define MTR3 0x8C
270
271#define NUM_MTRS 4
272#define CHANNELS_PER_BRANCH (2)
273
274/* Defines to extract the vaious fields from the
275 * MTRx - Memory Technology Registers
276 */
277#define MTR_DIMMS_PRESENT(mtr) ((mtr) & (0x1 << 8))
278#define MTR_DRAM_WIDTH(mtr) ((((mtr) >> 6) & 0x1) ? 8 : 4)
279#define MTR_DRAM_BANKS(mtr) ((((mtr) >> 5) & 0x1) ? 8 : 4)
280#define MTR_DRAM_BANKS_ADDR_BITS(mtr) ((MTR_DRAM_BANKS(mtr) == 8) ? 3 : 2)
281#define MTR_DIMM_RANK(mtr) (((mtr) >> 4) & 0x1)
282#define MTR_DIMM_RANK_ADDR_BITS(mtr) (MTR_DIMM_RANK(mtr) ? 2 : 1)
283#define MTR_DIMM_ROWS(mtr) (((mtr) >> 2) & 0x3)
284#define MTR_DIMM_ROWS_ADDR_BITS(mtr) (MTR_DIMM_ROWS(mtr) + 13)
285#define MTR_DIMM_COLS(mtr) ((mtr) & 0x3)
286#define MTR_DIMM_COLS_ADDR_BITS(mtr) (MTR_DIMM_COLS(mtr) + 10)
287
288#ifdef CONFIG_EDAC_DEBUG
289static char *numrow_toString[] = {
290 "8,192 - 13 rows",
291 "16,384 - 14 rows",
292 "32,768 - 15 rows",
293 "reserved"
294};
295
296static char *numcol_toString[] = {
297 "1,024 - 10 columns",
298 "2,048 - 11 columns",
299 "4,096 - 12 columns",
300 "reserved"
301};
302#endif
303
304/* Enumeration of supported devices */
305enum i5000_chips {
306 I5000P = 0,
307 I5000V = 1, /* future */
308 I5000X = 2 /* future */
309};
310
311/* Device name and register DID (Device ID) */
312struct i5000_dev_info {
313 const char *ctl_name; /* name for this device */
314 u16 fsb_mapping_errors; /* DID for the branchmap,control */
315};
316
317/* Table of devices attributes supported by this driver */
318static const struct i5000_dev_info i5000_devs[] = {
319 [I5000P] = {
320 .ctl_name = "I5000",
321 .fsb_mapping_errors = PCI_DEVICE_ID_INTEL_I5000_DEV16,
322 },
323};
324
325struct i5000_dimm_info {
326 int megabytes; /* size, 0 means not present */
327 int dual_rank;
328};
329
330#define MAX_CHANNELS 6 /* max possible channels */
331#define MAX_CSROWS (8*2) /* max possible csrows per channel */
332
333/* driver private data structure */
334struct i5000_pvt {
335 struct pci_dev *system_address; /* 16.0 */
336 struct pci_dev *branchmap_werrors; /* 16.1 */
337 struct pci_dev *fsb_error_regs; /* 16.2 */
338 struct pci_dev *branch_0; /* 21.0 */
339 struct pci_dev *branch_1; /* 22.0 */
340
341 u16 tolm; /* top of low memory */
342 u64 ambase; /* AMB BAR */
343
344 u16 mir0, mir1, mir2;
345
346 u16 b0_mtr[NUM_MTRS]; /* Memory Technlogy Reg */
347 u16 b0_ambpresent0; /* Branch 0, Channel 0 */
348 u16 b0_ambpresent1; /* Brnach 0, Channel 1 */
349
350 u16 b1_mtr[NUM_MTRS]; /* Memory Technlogy Reg */
351 u16 b1_ambpresent0; /* Branch 1, Channel 8 */
352 u16 b1_ambpresent1; /* Branch 1, Channel 1 */
353
354 /* DIMM infomation matrix, allocating architecture maximums */
355 struct i5000_dimm_info dimm_info[MAX_CSROWS][MAX_CHANNELS];
356
357 /* Actual values for this controller */
358 int maxch; /* Max channels */
359 int maxdimmperch; /* Max DIMMs per channel */
360};
361
362/* I5000 MCH error information retrieved from Hardware */
363struct i5000_error_info {
364
365 /* These registers are always read from the MC */
366 u32 ferr_fat_fbd; /* First Errors Fatal */
367 u32 nerr_fat_fbd; /* Next Errors Fatal */
368 u32 ferr_nf_fbd; /* First Errors Non-Fatal */
369 u32 nerr_nf_fbd; /* Next Errors Non-Fatal */
370
371 /* These registers are input ONLY if there was a Recoverable Error */
372 u32 redmemb; /* Recoverable Mem Data Error log B */
373 u16 recmema; /* Recoverable Mem Error log A */
374 u32 recmemb; /* Recoverable Mem Error log B */
375
376 /* These registers are input ONLY if there was a
377 * Non-Recoverable Error */
378 u16 nrecmema; /* Non-Recoverable Mem log A */
379 u16 nrecmemb; /* Non-Recoverable Mem log B */
380
381};
382
383static struct edac_pci_ctl_info *i5000_pci;
384
385/*
386 * i5000_get_error_info Retrieve the hardware error information from
387 * the hardware and cache it in the 'info'
388 * structure
389 */
390static void i5000_get_error_info(struct mem_ctl_info *mci,
391 struct i5000_error_info *info)
392{
393 struct i5000_pvt *pvt;
394 u32 value;
395
396 pvt = mci->pvt_info;
397
398 /* read in the 1st FATAL error register */
399 pci_read_config_dword(pvt->branchmap_werrors, FERR_FAT_FBD, &value);
400
401 /* Mask only the bits that the doc says are valid
402 */
403 value &= (FERR_FAT_FBDCHAN | FERR_FAT_MASK);
404
405 /* If there is an error, then read in the */
406 /* NEXT FATAL error register and the Memory Error Log Register A */
407 if (value & FERR_FAT_MASK) {
408 info->ferr_fat_fbd = value;
409
410 /* harvest the various error data we need */
411 pci_read_config_dword(pvt->branchmap_werrors,
412 NERR_FAT_FBD, &info->nerr_fat_fbd);
413 pci_read_config_word(pvt->branchmap_werrors,
414 NRECMEMA, &info->nrecmema);
415 pci_read_config_word(pvt->branchmap_werrors,
416 NRECMEMB, &info->nrecmemb);
417
418 /* Clear the error bits, by writing them back */
419 pci_write_config_dword(pvt->branchmap_werrors,
420 FERR_FAT_FBD, value);
421 } else {
422 info->ferr_fat_fbd = 0;
423 info->nerr_fat_fbd = 0;
424 info->nrecmema = 0;
425 info->nrecmemb = 0;
426 }
427
428 /* read in the 1st NON-FATAL error register */
429 pci_read_config_dword(pvt->branchmap_werrors, FERR_NF_FBD, &value);
430
431 /* If there is an error, then read in the 1st NON-FATAL error
432 * register as well */
433 if (value & FERR_NF_MASK) {
434 info->ferr_nf_fbd = value;
435
436 /* harvest the various error data we need */
437 pci_read_config_dword(pvt->branchmap_werrors,
438 NERR_NF_FBD, &info->nerr_nf_fbd);
439 pci_read_config_word(pvt->branchmap_werrors,
440 RECMEMA, &info->recmema);
441 pci_read_config_dword(pvt->branchmap_werrors,
442 RECMEMB, &info->recmemb);
443 pci_read_config_dword(pvt->branchmap_werrors,
444 REDMEMB, &info->redmemb);
445
446 /* Clear the error bits, by writing them back */
447 pci_write_config_dword(pvt->branchmap_werrors,
448 FERR_NF_FBD, value);
449 } else {
450 info->ferr_nf_fbd = 0;
451 info->nerr_nf_fbd = 0;
452 info->recmema = 0;
453 info->recmemb = 0;
454 info->redmemb = 0;
455 }
456}
457
458/*
459 * i5000_process_fatal_error_info(struct mem_ctl_info *mci,
460 * struct i5000_error_info *info,
461 * int handle_errors);
462 *
463 * handle the Intel FATAL errors, if any
464 */
465static void i5000_process_fatal_error_info(struct mem_ctl_info *mci,
466 struct i5000_error_info *info,
467 int handle_errors)
468{
469 char msg[EDAC_MC_LABEL_LEN + 1 + 90];
470 u32 allErrors;
471 int branch;
472 int channel;
473 int bank;
474 int rank;
475 int rdwr;
476 int ras, cas;
477
478 /* mask off the Error bits that are possible */
479 allErrors = (info->ferr_fat_fbd & FERR_FAT_MASK);
480 if (!allErrors)
481 return; /* if no error, return now */
482
483 /* ONLY ONE of the possible error bits will be set, as per the docs */
484 i5000_mc_printk(mci, KERN_ERR,
485 "FATAL ERRORS Found!!! 1st FATAL Err Reg= 0x%x\n",
486 allErrors);
487
488 branch = EXTRACT_FBDCHAN_INDX(info->ferr_fat_fbd);
489 channel = branch;
490
491 /* Use the NON-Recoverable macros to extract data */
492 bank = NREC_BANK(info->nrecmema);
493 rank = NREC_RANK(info->nrecmema);
494 rdwr = NREC_RDWR(info->nrecmema);
495 ras = NREC_RAS(info->nrecmemb);
496 cas = NREC_CAS(info->nrecmemb);
497
498 debugf0("\t\tCSROW= %d Channels= %d,%d (Branch= %d "
499 "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
500 rank, channel, channel + 1, branch >> 1, bank,
501 rdwr ? "Write" : "Read", ras, cas);
502
503 /* Only 1 bit will be on */
504 if (allErrors & FERR_FAT_M1ERR) {
505 i5000_mc_printk(mci, KERN_ERR,
506 "Alert on non-redundant retry or fast "
507 "reset timeout\n");
508
509 } else if (allErrors & FERR_FAT_M2ERR) {
510 i5000_mc_printk(mci, KERN_ERR,
511 "Northbound CRC error on non-redundant "
512 "retry\n");
513
514 } else if (allErrors & FERR_FAT_M3ERR) {
515 i5000_mc_printk(mci, KERN_ERR,
516 ">Tmid Thermal event with intelligent "
517 "throttling disabled\n");
518 }
519
520 /* Form out message */
521 snprintf(msg, sizeof(msg),
522 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d CAS=%d "
523 "FATAL Err=0x%x)",
524 branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas,
525 allErrors);
526
527 /* Call the helper to output message */
528 edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);
529}
530
531/*
532 * i5000_process_fatal_error_info(struct mem_ctl_info *mci,
533 * struct i5000_error_info *info,
534 * int handle_errors);
535 *
536 * handle the Intel NON-FATAL errors, if any
537 */
538static void i5000_process_nonfatal_error_info(struct mem_ctl_info *mci,
539 struct i5000_error_info *info,
540 int handle_errors)
541{
542 char msg[EDAC_MC_LABEL_LEN + 1 + 90];
543 u32 allErrors;
544 u32 ue_errors;
545 u32 ce_errors;
546 u32 misc_errors;
547 int branch;
548 int channel;
549 int bank;
550 int rank;
551 int rdwr;
552 int ras, cas;
553
554 /* mask off the Error bits that are possible */
555 allErrors = (info->ferr_nf_fbd & FERR_NF_MASK);
556 if (!allErrors)
557 return; /* if no error, return now */
558
559 /* ONLY ONE of the possible error bits will be set, as per the docs */
560 i5000_mc_printk(mci, KERN_WARNING,
561 "NON-FATAL ERRORS Found!!! 1st NON-FATAL Err "
562 "Reg= 0x%x\n", allErrors);
563
564 ue_errors = allErrors & FERR_NF_UNCORRECTABLE;
565 if (ue_errors) {
566 debugf0("\tUncorrected bits= 0x%x\n", ue_errors);
567
568 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd);
569 channel = branch;
570 bank = NREC_BANK(info->nrecmema);
571 rank = NREC_RANK(info->nrecmema);
572 rdwr = NREC_RDWR(info->nrecmema);
573 ras = NREC_RAS(info->nrecmemb);
574 cas = NREC_CAS(info->nrecmemb);
575
576 debugf0
577 ("\t\tCSROW= %d Channels= %d,%d (Branch= %d "
578 "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
579 rank, channel, channel + 1, branch >> 1, bank,
580 rdwr ? "Write" : "Read", ras, cas);
581
582 /* Form out message */
583 snprintf(msg, sizeof(msg),
584 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d "
585 "CAS=%d, UE Err=0x%x)",
586 branch >> 1, bank, rdwr ? "Write" : "Read", ras, cas,
587 ue_errors);
588
589 /* Call the helper to output message */
590 edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);
591 }
592
593 /* Check correctable errors */
594 ce_errors = allErrors & FERR_NF_CORRECTABLE;
595 if (ce_errors) {
596 debugf0("\tCorrected bits= 0x%x\n", ce_errors);
597
598 branch = EXTRACT_FBDCHAN_INDX(info->ferr_nf_fbd);
599
600 channel = 0;
601 if (REC_ECC_LOCATOR_ODD(info->redmemb))
602 channel = 1;
603
604 /* Convert channel to be based from zero, instead of
605 * from branch base of 0 */
606 channel += branch;
607
608 bank = REC_BANK(info->recmema);
609 rank = REC_RANK(info->recmema);
610 rdwr = REC_RDWR(info->recmema);
611 ras = REC_RAS(info->recmemb);
612 cas = REC_CAS(info->recmemb);
613
614 debugf0("\t\tCSROW= %d Channel= %d (Branch %d "
615 "DRAM Bank= %d rdwr= %s ras= %d cas= %d)\n",
616 rank, channel, branch >> 1, bank,
617 rdwr ? "Write" : "Read", ras, cas);
618
619 /* Form out message */
620 snprintf(msg, sizeof(msg),
621 "(Branch=%d DRAM-Bank=%d RDWR=%s RAS=%d "
622 "CAS=%d, CE Err=0x%x)", branch >> 1, bank,
623 rdwr ? "Write" : "Read", ras, cas, ce_errors);
624
625 /* Call the helper to output message */
626 edac_mc_handle_fbd_ce(mci, rank, channel, msg);
627 }
628
629 /* See if any of the thermal errors have fired */
630 misc_errors = allErrors & FERR_NF_THERMAL;
631 if (misc_errors) {
632 i5000_printk(KERN_WARNING, "\tTHERMAL Error, bits= 0x%x\n",
633 misc_errors);
634 }
635
636 /* See if any of the thermal errors have fired */
637 misc_errors = allErrors & FERR_NF_NON_RETRY;
638 if (misc_errors) {
639 i5000_printk(KERN_WARNING, "\tNON-Retry Errors, bits= 0x%x\n",
640 misc_errors);
641 }
642
643 /* See if any of the thermal errors have fired */
644 misc_errors = allErrors & FERR_NF_NORTH_CRC;
645 if (misc_errors) {
646 i5000_printk(KERN_WARNING,
647 "\tNORTHBOUND CRC Error, bits= 0x%x\n",
648 misc_errors);
649 }
650
651 /* See if any of the thermal errors have fired */
652 misc_errors = allErrors & FERR_NF_SPD_PROTOCOL;
653 if (misc_errors) {
654 i5000_printk(KERN_WARNING,
655 "\tSPD Protocol Error, bits= 0x%x\n",
656 misc_errors);
657 }
658
659 /* See if any of the thermal errors have fired */
660 misc_errors = allErrors & FERR_NF_DIMM_SPARE;
661 if (misc_errors) {
662 i5000_printk(KERN_WARNING, "\tDIMM-Spare Error, bits= 0x%x\n",
663 misc_errors);
664 }
665}
666
667/*
668 * i5000_process_error_info Process the error info that is
669 * in the 'info' structure, previously retrieved from hardware
670 */
671static void i5000_process_error_info(struct mem_ctl_info *mci,
672 struct i5000_error_info *info,
673 int handle_errors)
674{
675 /* First handle any fatal errors that occurred */
676 i5000_process_fatal_error_info(mci, info, handle_errors);
677
678 /* now handle any non-fatal errors that occurred */
679 i5000_process_nonfatal_error_info(mci, info, handle_errors);
680}
681
682/*
683 * i5000_clear_error Retrieve any error from the hardware
684 * but do NOT process that error.
685 * Used for 'clearing' out of previous errors
686 * Called by the Core module.
687 */
688static void i5000_clear_error(struct mem_ctl_info *mci)
689{
690 struct i5000_error_info info;
691
692 i5000_get_error_info(mci, &info);
693}
694
695/*
696 * i5000_check_error Retrieve and process errors reported by the
697 * hardware. Called by the Core module.
698 */
699static void i5000_check_error(struct mem_ctl_info *mci)
700{
701 struct i5000_error_info info;
702 debugf4("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__);
703 i5000_get_error_info(mci, &info);
704 i5000_process_error_info(mci, &info, 1);
705}
706
707/*
708 * i5000_get_devices Find and perform 'get' operation on the MCH's
709 * device/functions we want to reference for this driver
710 *
711 * Need to 'get' device 16 func 1 and func 2
712 */
713static int i5000_get_devices(struct mem_ctl_info *mci, int dev_idx)
714{
715 //const struct i5000_dev_info *i5000_dev = &i5000_devs[dev_idx];
716 struct i5000_pvt *pvt;
717 struct pci_dev *pdev;
718
719 pvt = mci->pvt_info;
720
721 /* Attempt to 'get' the MCH register we want */
722 pdev = NULL;
723 while (1) {
724 pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
725 PCI_DEVICE_ID_INTEL_I5000_DEV16, pdev);
726
727 /* End of list, leave */
728 if (pdev == NULL) {
729 i5000_printk(KERN_ERR,
730 "'system address,Process Bus' "
731 "device not found:"
732 "vendor 0x%x device 0x%x FUNC 1 "
733 "(broken BIOS?)\n",
734 PCI_VENDOR_ID_INTEL,
735 PCI_DEVICE_ID_INTEL_I5000_DEV16);
736
737 return 1;
738 }
739
740 /* Scan for device 16 func 1 */
741 if (PCI_FUNC(pdev->devfn) == 1)
742 break;
743 }
744
745 pvt->branchmap_werrors = pdev;
746
747 /* Attempt to 'get' the MCH register we want */
748 pdev = NULL;
749 while (1) {
750 pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
751 PCI_DEVICE_ID_INTEL_I5000_DEV16, pdev);
752
753 if (pdev == NULL) {
754 i5000_printk(KERN_ERR,
755 "MC: 'branchmap,control,errors' "
756 "device not found:"
757 "vendor 0x%x device 0x%x Func 2 "
758 "(broken BIOS?)\n",
759 PCI_VENDOR_ID_INTEL,
760 PCI_DEVICE_ID_INTEL_I5000_DEV16);
761
762 pci_dev_put(pvt->branchmap_werrors);
763 return 1;
764 }
765
766 /* Scan for device 16 func 1 */
767 if (PCI_FUNC(pdev->devfn) == 2)
768 break;
769 }
770
771 pvt->fsb_error_regs = pdev;
772
773 debugf1("System Address, processor bus- PCI Bus ID: %s %x:%x\n",
774 pci_name(pvt->system_address),
775 pvt->system_address->vendor, pvt->system_address->device);
776 debugf1("Branchmap, control and errors - PCI Bus ID: %s %x:%x\n",
777 pci_name(pvt->branchmap_werrors),
778 pvt->branchmap_werrors->vendor, pvt->branchmap_werrors->device);
779 debugf1("FSB Error Regs - PCI Bus ID: %s %x:%x\n",
780 pci_name(pvt->fsb_error_regs),
781 pvt->fsb_error_regs->vendor, pvt->fsb_error_regs->device);
782
783 pdev = NULL;
784 pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
785 PCI_DEVICE_ID_I5000_BRANCH_0, pdev);
786
787 if (pdev == NULL) {
788 i5000_printk(KERN_ERR,
789 "MC: 'BRANCH 0' device not found:"
790 "vendor 0x%x device 0x%x Func 0 (broken BIOS?)\n",
791 PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_I5000_BRANCH_0);
792
793 pci_dev_put(pvt->branchmap_werrors);
794 pci_dev_put(pvt->fsb_error_regs);
795 return 1;
796 }
797
798 pvt->branch_0 = pdev;
799
800 /* If this device claims to have more than 2 channels then
801 * fetch Branch 1's information
802 */
803 if (pvt->maxch >= CHANNELS_PER_BRANCH) {
804 pdev = NULL;
805 pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
806 PCI_DEVICE_ID_I5000_BRANCH_1, pdev);
807
808 if (pdev == NULL) {
809 i5000_printk(KERN_ERR,
810 "MC: 'BRANCH 1' device not found:"
811 "vendor 0x%x device 0x%x Func 0 "
812 "(broken BIOS?)\n",
813 PCI_VENDOR_ID_INTEL,
814 PCI_DEVICE_ID_I5000_BRANCH_1);
815
816 pci_dev_put(pvt->branchmap_werrors);
817 pci_dev_put(pvt->fsb_error_regs);
818 pci_dev_put(pvt->branch_0);
819 return 1;
820 }
821
822 pvt->branch_1 = pdev;
823 }
824
825 return 0;
826}
827
828/*
829 * i5000_put_devices 'put' all the devices that we have
830 * reserved via 'get'
831 */
832static void i5000_put_devices(struct mem_ctl_info *mci)
833{
834 struct i5000_pvt *pvt;
835
836 pvt = mci->pvt_info;
837
838 pci_dev_put(pvt->branchmap_werrors); /* FUNC 1 */
839 pci_dev_put(pvt->fsb_error_regs); /* FUNC 2 */
840 pci_dev_put(pvt->branch_0); /* DEV 21 */
841
842 /* Only if more than 2 channels do we release the second branch */
843 if (pvt->maxch >= CHANNELS_PER_BRANCH)
844 pci_dev_put(pvt->branch_1); /* DEV 22 */
845}
846
847/*
848 * determine_amb_resent
849 *
850 * the information is contained in NUM_MTRS different registers
851 * determineing which of the NUM_MTRS requires knowing
852 * which channel is in question
853 *
854 * 2 branches, each with 2 channels
855 * b0_ambpresent0 for channel '0'
856 * b0_ambpresent1 for channel '1'
857 * b1_ambpresent0 for channel '2'
858 * b1_ambpresent1 for channel '3'
859 */
860static int determine_amb_present_reg(struct i5000_pvt *pvt, int channel)
861{
862 int amb_present;
863
864 if (channel < CHANNELS_PER_BRANCH) {
865 if (channel & 0x1)
866 amb_present = pvt->b0_ambpresent1;
867 else
868 amb_present = pvt->b0_ambpresent0;
869 } else {
870 if (channel & 0x1)
871 amb_present = pvt->b1_ambpresent1;
872 else
873 amb_present = pvt->b1_ambpresent0;
874 }
875
876 return amb_present;
877}
878
879/*
880 * determine_mtr(pvt, csrow, channel)
881 *
882 * return the proper MTR register as determine by the csrow and channel desired
883 */
884static int determine_mtr(struct i5000_pvt *pvt, int csrow, int channel)
885{
886 int mtr;
887
888 if (channel < CHANNELS_PER_BRANCH)
889 mtr = pvt->b0_mtr[csrow >> 1];
890 else
891 mtr = pvt->b1_mtr[csrow >> 1];
892
893 return mtr;
894}
895
896/*
897 */
898static void decode_mtr(int slot_row, u16 mtr)
899{
900 int ans;
901
902 ans = MTR_DIMMS_PRESENT(mtr);
903
904 debugf2("\tMTR%d=0x%x: DIMMs are %s\n", slot_row, mtr,
905 ans ? "Present" : "NOT Present");
906 if (!ans)
907 return;
908
909 debugf2("\t\tWIDTH: x%d\n", MTR_DRAM_WIDTH(mtr));
910 debugf2("\t\tNUMBANK: %d bank(s)\n", MTR_DRAM_BANKS(mtr));
911 debugf2("\t\tNUMRANK: %s\n", MTR_DIMM_RANK(mtr) ? "double" : "single");
912 debugf2("\t\tNUMROW: %s\n", numrow_toString[MTR_DIMM_ROWS(mtr)]);
913 debugf2("\t\tNUMCOL: %s\n", numcol_toString[MTR_DIMM_COLS(mtr)]);
914}
915
916static void handle_channel(struct i5000_pvt *pvt, int csrow, int channel,
917 struct i5000_dimm_info *dinfo)
918{
919 int mtr;
920 int amb_present_reg;
921 int addrBits;
922
923 mtr = determine_mtr(pvt, csrow, channel);
924 if (MTR_DIMMS_PRESENT(mtr)) {
925 amb_present_reg = determine_amb_present_reg(pvt, channel);
926
927 /* Determine if there is a DIMM present in this DIMM slot */
928 if (amb_present_reg & (1 << (csrow >> 1))) {
929 dinfo->dual_rank = MTR_DIMM_RANK(mtr);
930
931 if (!((dinfo->dual_rank == 0) &&
932 ((csrow & 0x1) == 0x1))) {
933 /* Start with the number of bits for a Bank
934 * on the DRAM */
935 addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr);
936 /* Add thenumber of ROW bits */
937 addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr);
938 /* add the number of COLUMN bits */
939 addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr);
940
941 addrBits += 6; /* add 64 bits per DIMM */
942 addrBits -= 20; /* divide by 2^^20 */
943 addrBits -= 3; /* 8 bits per bytes */
944
945 dinfo->megabytes = 1 << addrBits;
946 }
947 }
948 }
949}
950
951/*
952 * calculate_dimm_size
953 *
954 * also will output a DIMM matrix map, if debug is enabled, for viewing
955 * how the DIMMs are populated
956 */
957static void calculate_dimm_size(struct i5000_pvt *pvt)
958{
959 struct i5000_dimm_info *dinfo;
960 int csrow, max_csrows;
961 char *p, *mem_buffer;
962 int space, n;
963 int channel;
964
965 /* ================= Generate some debug output ================= */
966 space = PAGE_SIZE;
967 mem_buffer = p = kmalloc(space, GFP_KERNEL);
968 if (p == NULL) {
969 i5000_printk(KERN_ERR, "MC: %s:%s() kmalloc() failed\n",
970 __FILE__, __func__);
971 return;
972 }
973
974 n = snprintf(p, space, "\n");
975 p += n;
976 space -= n;
977
978 /* Scan all the actual CSROWS (which is # of DIMMS * 2)
979 * and calculate the information for each DIMM
980 * Start with the highest csrow first, to display it first
981 * and work toward the 0th csrow
982 */
983 max_csrows = pvt->maxdimmperch * 2;
984 for (csrow = max_csrows - 1; csrow >= 0; csrow--) {
985
986 /* on an odd csrow, first output a 'boundary' marker,
987 * then reset the message buffer */
988 if (csrow & 0x1) {
989 n = snprintf(p, space, "---------------------------"
990 "--------------------------------");
991 p += n;
992 space -= n;
993 debugf2("%s\n", mem_buffer);
994 p = mem_buffer;
995 space = PAGE_SIZE;
996 }
997 n = snprintf(p, space, "csrow %2d ", csrow);
998 p += n;
999 space -= n;
1000
1001 for (channel = 0; channel < pvt->maxch; channel++) {
1002 dinfo = &pvt->dimm_info[csrow][channel];
1003 handle_channel(pvt, csrow, channel, dinfo);
1004 n = snprintf(p, space, "%4d MB | ", dinfo->megabytes);
1005 p += n;
1006 space -= n;
1007 }
1008 n = snprintf(p, space, "\n");
1009 p += n;
1010 space -= n;
1011 }
1012
1013 /* Output the last bottom 'boundary' marker */
1014 n = snprintf(p, space, "---------------------------"
1015 "--------------------------------\n");
1016 p += n;
1017 space -= n;
1018
1019 /* now output the 'channel' labels */
1020 n = snprintf(p, space, " ");
1021 p += n;
1022 space -= n;
1023 for (channel = 0; channel < pvt->maxch; channel++) {
1024 n = snprintf(p, space, "channel %d | ", channel);
1025 p += n;
1026 space -= n;
1027 }
1028 n = snprintf(p, space, "\n");
1029 p += n;
1030 space -= n;
1031
1032 /* output the last message and free buffer */
1033 debugf2("%s\n", mem_buffer);
1034 kfree(mem_buffer);
1035}
1036
1037/*
1038 * i5000_get_mc_regs read in the necessary registers and
1039 * cache locally
1040 *
1041 * Fills in the private data members
1042 */
1043static void i5000_get_mc_regs(struct mem_ctl_info *mci)
1044{
1045 struct i5000_pvt *pvt;
1046 u32 actual_tolm;
1047 u16 limit;
1048 int slot_row;
1049 int maxch;
1050 int maxdimmperch;
1051 int way0, way1;
1052
1053 pvt = mci->pvt_info;
1054
1055 pci_read_config_dword(pvt->system_address, AMBASE,
1056 (u32 *) & pvt->ambase);
1057 pci_read_config_dword(pvt->system_address, AMBASE + sizeof(u32),
1058 ((u32 *) & pvt->ambase) + sizeof(u32));
1059
1060 maxdimmperch = pvt->maxdimmperch;
1061 maxch = pvt->maxch;
1062
1063 debugf2("AMBASE= 0x%lx MAXCH= %d MAX-DIMM-Per-CH= %d\n",
1064 (long unsigned int)pvt->ambase, pvt->maxch, pvt->maxdimmperch);
1065
1066 /* Get the Branch Map regs */
1067 pci_read_config_word(pvt->branchmap_werrors, TOLM, &pvt->tolm);
1068 pvt->tolm >>= 12;
1069 debugf2("\nTOLM (number of 256M regions) =%u (0x%x)\n", pvt->tolm,
1070 pvt->tolm);
1071
1072 actual_tolm = pvt->tolm << 28;
1073 debugf2("Actual TOLM byte addr=%u (0x%x)\n", actual_tolm, actual_tolm);
1074
1075 pci_read_config_word(pvt->branchmap_werrors, MIR0, &pvt->mir0);
1076 pci_read_config_word(pvt->branchmap_werrors, MIR1, &pvt->mir1);
1077 pci_read_config_word(pvt->branchmap_werrors, MIR2, &pvt->mir2);
1078
1079 /* Get the MIR[0-2] regs */
1080 limit = (pvt->mir0 >> 4) & 0x0FFF;
1081 way0 = pvt->mir0 & 0x1;
1082 way1 = pvt->mir0 & 0x2;
1083 debugf2("MIR0: limit= 0x%x WAY1= %u WAY0= %x\n", limit, way1, way0);
1084 limit = (pvt->mir1 >> 4) & 0x0FFF;
1085 way0 = pvt->mir1 & 0x1;
1086 way1 = pvt->mir1 & 0x2;
1087 debugf2("MIR1: limit= 0x%x WAY1= %u WAY0= %x\n", limit, way1, way0);
1088 limit = (pvt->mir2 >> 4) & 0x0FFF;
1089 way0 = pvt->mir2 & 0x1;
1090 way1 = pvt->mir2 & 0x2;
1091 debugf2("MIR2: limit= 0x%x WAY1= %u WAY0= %x\n", limit, way1, way0);
1092
1093 /* Get the MTR[0-3] regs */
1094 for (slot_row = 0; slot_row < NUM_MTRS; slot_row++) {
1095 int where = MTR0 + (slot_row * sizeof(u32));
1096
1097 pci_read_config_word(pvt->branch_0, where,
1098 &pvt->b0_mtr[slot_row]);
1099
1100 debugf2("MTR%d where=0x%x B0 value=0x%x\n", slot_row, where,
1101 pvt->b0_mtr[slot_row]);
1102
1103 if (pvt->maxch >= CHANNELS_PER_BRANCH) {
1104 pci_read_config_word(pvt->branch_1, where,
1105 &pvt->b1_mtr[slot_row]);
1106 debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row,
1107 where, pvt->b0_mtr[slot_row]);
1108 } else {
1109 pvt->b1_mtr[slot_row] = 0;
1110 }
1111 }
1112
1113 /* Read and dump branch 0's MTRs */
1114 debugf2("\nMemory Technology Registers:\n");
1115 debugf2(" Branch 0:\n");
1116 for (slot_row = 0; slot_row < NUM_MTRS; slot_row++) {
1117 decode_mtr(slot_row, pvt->b0_mtr[slot_row]);
1118 }
1119 pci_read_config_word(pvt->branch_0, AMB_PRESENT_0,
1120 &pvt->b0_ambpresent0);
1121 debugf2("\t\tAMB-Branch 0-present0 0x%x:\n", pvt->b0_ambpresent0);
1122 pci_read_config_word(pvt->branch_0, AMB_PRESENT_1,
1123 &pvt->b0_ambpresent1);
1124 debugf2("\t\tAMB-Branch 0-present1 0x%x:\n", pvt->b0_ambpresent1);
1125
1126 /* Only if we have 2 branchs (4 channels) */
1127 if (pvt->maxch < CHANNELS_PER_BRANCH) {
1128 pvt->b1_ambpresent0 = 0;
1129 pvt->b1_ambpresent1 = 0;
1130 } else {
1131 /* Read and dump branch 1's MTRs */
1132 debugf2(" Branch 1:\n");
1133 for (slot_row = 0; slot_row < NUM_MTRS; slot_row++) {
1134 decode_mtr(slot_row, pvt->b1_mtr[slot_row]);
1135 }
1136 pci_read_config_word(pvt->branch_1, AMB_PRESENT_0,
1137 &pvt->b1_ambpresent0);
1138 debugf2("\t\tAMB-Branch 1-present0 0x%x:\n",
1139 pvt->b1_ambpresent0);
1140 pci_read_config_word(pvt->branch_1, AMB_PRESENT_1,
1141 &pvt->b1_ambpresent1);
1142 debugf2("\t\tAMB-Branch 1-present1 0x%x:\n",
1143 pvt->b1_ambpresent1);
1144 }
1145
1146 /* Go and determine the size of each DIMM and place in an
1147 * orderly matrix */
1148 calculate_dimm_size(pvt);
1149}
1150
1151/*
1152 * i5000_init_csrows Initialize the 'csrows' table within
1153 * the mci control structure with the
1154 * addressing of memory.
1155 *
1156 * return:
1157 * 0 success
1158 * 1 no actual memory found on this MC
1159 */
1160static int i5000_init_csrows(struct mem_ctl_info *mci)
1161{
1162 struct i5000_pvt *pvt;
1163 struct csrow_info *p_csrow;
1164 int empty, channel_count;
1165 int max_csrows;
1166 int mtr;
1167 int csrow_megs;
1168 int channel;
1169 int csrow;
1170
1171 pvt = mci->pvt_info;
1172
1173 channel_count = pvt->maxch;
1174 max_csrows = pvt->maxdimmperch * 2;
1175
1176 empty = 1; /* Assume NO memory */
1177
1178 for (csrow = 0; csrow < max_csrows; csrow++) {
1179 p_csrow = &mci->csrows[csrow];
1180
1181 p_csrow->csrow_idx = csrow;
1182
1183 /* use branch 0 for the basis */
1184 mtr = pvt->b0_mtr[csrow >> 1];
1185
1186 /* if no DIMMS on this row, continue */
1187 if (!MTR_DIMMS_PRESENT(mtr))
1188 continue;
1189
1190 /* FAKE OUT VALUES, FIXME */
1191 p_csrow->first_page = 0 + csrow * 20;
1192 p_csrow->last_page = 9 + csrow * 20;
1193 p_csrow->page_mask = 0xFFF;
1194
1195 p_csrow->grain = 8;
1196
1197 csrow_megs = 0;
1198 for (channel = 0; channel < pvt->maxch; channel++) {
1199 csrow_megs += pvt->dimm_info[csrow][channel].megabytes;
1200 }
1201
1202 p_csrow->nr_pages = csrow_megs << 8;
1203
1204 /* Assume DDR2 for now */
1205 p_csrow->mtype = MEM_FB_DDR2;
1206
1207 /* ask what device type on this row */
1208 if (MTR_DRAM_WIDTH(mtr))
1209 p_csrow->dtype = DEV_X8;
1210 else
1211 p_csrow->dtype = DEV_X4;
1212
1213 p_csrow->edac_mode = EDAC_S8ECD8ED;
1214
1215 empty = 0;
1216 }
1217
1218 return empty;
1219}
1220
1221/*
1222 * i5000_enable_error_reporting
1223 * Turn on the memory reporting features of the hardware
1224 */
1225static void i5000_enable_error_reporting(struct mem_ctl_info *mci)
1226{
1227 struct i5000_pvt *pvt;
1228 u32 fbd_error_mask;
1229
1230 pvt = mci->pvt_info;
1231
1232 /* Read the FBD Error Mask Register */
1233 pci_read_config_dword(pvt->branchmap_werrors, EMASK_FBD,
1234 &fbd_error_mask);
1235
1236 /* Enable with a '0' */
1237 fbd_error_mask &= ~(ENABLE_EMASK_ALL);
1238
1239 pci_write_config_dword(pvt->branchmap_werrors, EMASK_FBD,
1240 fbd_error_mask);
1241}
1242
1243/*
1244 * i5000_get_dimm_and_channel_counts(pdev, &num_csrows, &num_channels)
1245 *
1246 * ask the device how many channels are present and how many CSROWS
1247 * as well
1248 */
1249static void i5000_get_dimm_and_channel_counts(struct pci_dev *pdev,
1250 int *num_dimms_per_channel,
1251 int *num_channels)
1252{
1253 u8 value;
1254
1255 /* Need to retrieve just how many channels and dimms per channel are
1256 * supported on this memory controller
1257 */
1258 pci_read_config_byte(pdev, MAXDIMMPERCH, &value);
1259 *num_dimms_per_channel = (int)value *2;
1260
1261 pci_read_config_byte(pdev, MAXCH, &value);
1262 *num_channels = (int)value;
1263}
1264
1265/*
1266 * i5000_probe1 Probe for ONE instance of device to see if it is
1267 * present.
1268 * return:
1269 * 0 for FOUND a device
1270 * < 0 for error code
1271 */
1272static int i5000_probe1(struct pci_dev *pdev, int dev_idx)
1273{
1274 struct mem_ctl_info *mci;
1275 struct i5000_pvt *pvt;
1276 int num_channels;
1277 int num_dimms_per_channel;
1278 int num_csrows;
1279
1280 debugf0("MC: " __FILE__ ": %s(), pdev bus %u dev=0x%x fn=0x%x\n",
1281 __func__,
1282 pdev->bus->number,
1283 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn));
1284
1285 /* We only are looking for func 0 of the set */
1286 if (PCI_FUNC(pdev->devfn) != 0)
1287 return -ENODEV;
1288
1289 /* make sure error reporting method is sane */
1290 switch (edac_op_state) {
1291 case EDAC_OPSTATE_POLL:
1292 case EDAC_OPSTATE_NMI:
1293 break;
1294 default:
1295 edac_op_state = EDAC_OPSTATE_POLL;
1296 break;
1297 }
1298
1299 /* Ask the devices for the number of CSROWS and CHANNELS so
1300 * that we can calculate the memory resources, etc
1301 *
1302 * The Chipset will report what it can handle which will be greater
1303 * or equal to what the motherboard manufacturer will implement.
1304 *
1305 * As we don't have a motherboard identification routine to determine
1306 * actual number of slots/dimms per channel, we thus utilize the
1307 * resource as specified by the chipset. Thus, we might have
1308 * have more DIMMs per channel than actually on the mobo, but this
1309 * allows the driver to support upto the chipset max, without
1310 * some fancy mobo determination.
1311 */
1312 i5000_get_dimm_and_channel_counts(pdev, &num_dimms_per_channel,
1313 &num_channels);
1314 num_csrows = num_dimms_per_channel * 2;
1315
1316 debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n",
1317 __func__, num_channels, num_dimms_per_channel, num_csrows);
1318
1319 /* allocate a new MC control structure */
1320 mci = edac_mc_alloc(sizeof(*pvt), num_csrows, num_channels, 0);
1321
1322 if (mci == NULL)
1323 return -ENOMEM;
1324
1325 debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci);
1326
1327 mci->dev = &pdev->dev; /* record ptr to the generic device */
1328
1329 pvt = mci->pvt_info;
1330 pvt->system_address = pdev; /* Record this device in our private */
1331 pvt->maxch = num_channels;
1332 pvt->maxdimmperch = num_dimms_per_channel;
1333
1334 /* 'get' the pci devices we want to reserve for our use */
1335 if (i5000_get_devices(mci, dev_idx))
1336 goto fail0;
1337
1338 /* Time to get serious */
1339 i5000_get_mc_regs(mci); /* retrieve the hardware registers */
1340
1341 mci->mc_idx = 0;
1342 mci->mtype_cap = MEM_FLAG_FB_DDR2;
1343 mci->edac_ctl_cap = EDAC_FLAG_NONE;
1344 mci->edac_cap = EDAC_FLAG_NONE;
1345 mci->mod_name = "i5000_edac.c";
1346 mci->mod_ver = I5000_REVISION;
1347 mci->ctl_name = i5000_devs[dev_idx].ctl_name;
1348 mci->dev_name = pci_name(pdev);
1349 mci->ctl_page_to_phys = NULL;
1350
1351 /* Set the function pointer to an actual operation function */
1352 mci->edac_check = i5000_check_error;
1353
1354 /* initialize the MC control structure 'csrows' table
1355 * with the mapping and control information */
1356 if (i5000_init_csrows(mci)) {
1357 debugf0("MC: Setting mci->edac_cap to EDAC_FLAG_NONE\n"
1358 " because i5000_init_csrows() returned nonzero "
1359 "value\n");
1360 mci->edac_cap = EDAC_FLAG_NONE; /* no csrows found */
1361 } else {
1362 debugf1("MC: Enable error reporting now\n");
1363 i5000_enable_error_reporting(mci);
1364 }
1365
1366 /* add this new MC control structure to EDAC's list of MCs */
1367 if (edac_mc_add_mc(mci)) {
1368 debugf0("MC: " __FILE__
1369 ": %s(): failed edac_mc_add_mc()\n", __func__);
1370 /* FIXME: perhaps some code should go here that disables error
1371 * reporting if we just enabled it
1372 */
1373 goto fail1;
1374 }
1375
1376 i5000_clear_error(mci);
1377
1378 /* allocating generic PCI control info */
1379 i5000_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
1380 if (!i5000_pci) {
1381 printk(KERN_WARNING
1382 "%s(): Unable to create PCI control\n",
1383 __func__);
1384 printk(KERN_WARNING
1385 "%s(): PCI error report via EDAC not setup\n",
1386 __func__);
1387 }
1388
1389 return 0;
1390
1391 /* Error exit unwinding stack */
1392fail1:
1393
1394 i5000_put_devices(mci);
1395
1396fail0:
1397 edac_mc_free(mci);
1398 return -ENODEV;
1399}
1400
1401/*
1402 * i5000_init_one constructor for one instance of device
1403 *
1404 * returns:
1405 * negative on error
1406 * count (>= 0)
1407 */
1408static int __devinit i5000_init_one(struct pci_dev *pdev,
1409 const struct pci_device_id *id)
1410{
1411 int rc;
1412
1413 debugf0("MC: " __FILE__ ": %s()\n", __func__);
1414
1415 /* wake up device */
1416 rc = pci_enable_device(pdev);
1417 if (rc == -EIO)
1418 return rc;
1419
1420 /* now probe and enable the device */
1421 return i5000_probe1(pdev, id->driver_data);
1422}
1423
1424/*
1425 * i5000_remove_one destructor for one instance of device
1426 *
1427 */
1428static void __devexit i5000_remove_one(struct pci_dev *pdev)
1429{
1430 struct mem_ctl_info *mci;
1431
1432 debugf0(__FILE__ ": %s()\n", __func__);
1433
1434 if (i5000_pci)
1435 edac_pci_release_generic_ctl(i5000_pci);
1436
1437 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
1438 return;
1439
1440 /* retrieve references to resources, and free those resources */
1441 i5000_put_devices(mci);
1442
1443 edac_mc_free(mci);
1444}
1445
1446/*
1447 * pci_device_id table for which devices we are looking for
1448 *
1449 * The "E500P" device is the first device supported.
1450 */
1451static const struct pci_device_id i5000_pci_tbl[] __devinitdata = {
1452 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_I5000_DEV16),
1453 .driver_data = I5000P},
1454
1455 {0,} /* 0 terminated list. */
1456};
1457
1458MODULE_DEVICE_TABLE(pci, i5000_pci_tbl);
1459
1460/*
1461 * i5000_driver pci_driver structure for this module
1462 *
1463 */
1464static struct pci_driver i5000_driver = {
1465 .name = __stringify(KBUILD_BASENAME),
1466 .probe = i5000_init_one,
1467 .remove = __devexit_p(i5000_remove_one),
1468 .id_table = i5000_pci_tbl,
1469};
1470
1471/*
1472 * i5000_init Module entry function
1473 * Try to initialize this module for its devices
1474 */
1475static int __init i5000_init(void)
1476{
1477 int pci_rc;
1478
1479 debugf2("MC: " __FILE__ ": %s()\n", __func__);
1480
1481 pci_rc = pci_register_driver(&i5000_driver);
1482
1483 return (pci_rc < 0) ? pci_rc : 0;
1484}
1485
1486/*
1487 * i5000_exit() Module exit function
1488 * Unregister the driver
1489 */
1490static void __exit i5000_exit(void)
1491{
1492 debugf2("MC: " __FILE__ ": %s()\n", __func__);
1493 pci_unregister_driver(&i5000_driver);
1494}
1495
1496module_init(i5000_init);
1497module_exit(i5000_exit);
1498
1499MODULE_LICENSE("GPL");
1500MODULE_AUTHOR
1501 ("Linux Networx (http://lnxi.com) Doug Thompson <norsk5@xmission.com>");
1502MODULE_DESCRIPTION("MC Driver for Intel I5000 memory controllers - "
1503 I5000_REVISION);
1504module_param(edac_op_state, int, 0444);
1505MODULE_PARM_DESC(edac_op_state, "EDAC Error Reporting state: 0=Poll,1=NMI");
diff --git a/drivers/edac/i82443bxgx_edac.c b/drivers/edac/i82443bxgx_edac.c
new file mode 100644
index 0000000000..83bfe37c4b
--- /dev/null
+++ b/drivers/edac/i82443bxgx_edac.c
@@ -0,0 +1,402 @@
1/*
2 * Intel 82443BX/GX (440BX/GX chipset) Memory Controller EDAC kernel
3 * module (C) 2006 Tim Small
4 *
5 * This file may be distributed under the terms of the GNU General
6 * Public License.
7 *
8 * Written by Tim Small <tim@buttersideup.com>, based on work by Linux
9 * Networx, Thayne Harbaugh, Dan Hollis <goemon at anime dot net> and
10 * others.
11 *
12 * 440GX fix by Jason Uhlenkott <juhlenko@akamai.com>.
13 *
14 * Written with reference to 82443BX Host Bridge Datasheet:
15 * http://www.intel.com/design/chipsets/440/documentation.htm
16 * references to this document given in [].
17 *
18 * This module doesn't support the 440LX, but it may be possible to
19 * make it do so (the 440LX's register definitions are different, but
20 * not completely so - I haven't studied them in enough detail to know
21 * how easy this would be).
22 */
23
24#include <linux/module.h>
25#include <linux/init.h>
26
27#include <linux/pci.h>
28#include <linux/pci_ids.h>
29
30#include <linux/slab.h>
31
32#include "edac_core.h"
33
34#define I82443_REVISION "0.1"
35
36#define EDAC_MOD_STR "i82443bxgx_edac"
37
38/* The 82443BX supports SDRAM, or EDO (EDO for mobile only), "Memory
39 * Size: 8 MB to 512 MB (1GB with Registered DIMMs) with eight memory
40 * rows" "The 82443BX supports multiple-bit error detection and
41 * single-bit error correction when ECC mode is enabled and
42 * single/multi-bit error detection when correction is disabled.
43 * During writes to the DRAM, the 82443BX generates ECC for the data
44 * on a QWord basis. Partial QWord writes require a read-modify-write
45 * cycle when ECC is enabled."
46*/
47
48/* "Additionally, the 82443BX ensures that the data is corrected in
49 * main memory so that accumulation of errors is prevented. Another
50 * error within the same QWord would result in a double-bit error
51 * which is unrecoverable. This is known as hardware scrubbing since
52 * it requires no software intervention to correct the data in memory."
53 */
54
55/* [Also see page 100 (section 4.3), "DRAM Interface"]
56 * [Also see page 112 (section 4.6.1.4), ECC]
57 */
58
59#define I82443BXGX_NR_CSROWS 8
60#define I82443BXGX_NR_CHANS 1
61#define I82443BXGX_NR_DIMMS 4
62
63/* 82443 PCI Device 0 */
64#define I82443BXGX_NBXCFG 0x50 /* 32bit register starting at this PCI
65 * config space offset */
66#define I82443BXGX_NBXCFG_OFFSET_NON_ECCROW 24 /* Array of bits, zero if
67 * row is non-ECC */
68#define I82443BXGX_NBXCFG_OFFSET_DRAM_FREQ 12 /* 2 bits,00=100MHz,10=66 MHz */
69
70#define I82443BXGX_NBXCFG_OFFSET_DRAM_INTEGRITY 7 /* 2 bits: */
71#define I82443BXGX_NBXCFG_INTEGRITY_NONE 0x0 /* 00 = Non-ECC */
72#define I82443BXGX_NBXCFG_INTEGRITY_EC 0x1 /* 01 = EC (only) */
73#define I82443BXGX_NBXCFG_INTEGRITY_ECC 0x2 /* 10 = ECC */
74#define I82443BXGX_NBXCFG_INTEGRITY_SCRUB 0x3 /* 11 = ECC + HW Scrub */
75
76#define I82443BXGX_NBXCFG_OFFSET_ECC_DIAG_ENABLE 6
77
78/* 82443 PCI Device 0 */
79#define I82443BXGX_EAP 0x80 /* 32bit register starting at this PCI
80 * config space offset, Error Address
81 * Pointer Register */
82#define I82443BXGX_EAP_OFFSET_EAP 12 /* High 20 bits of error address */
83#define I82443BXGX_EAP_OFFSET_MBE BIT(1) /* Err at EAP was multi-bit (W1TC) */
84#define I82443BXGX_EAP_OFFSET_SBE BIT(0) /* Err at EAP was single-bit (W1TC) */
85
86#define I82443BXGX_ERRCMD 0x90 /* 8bit register starting at this PCI
87 * config space offset. */
88#define I82443BXGX_ERRCMD_OFFSET_SERR_ON_MBE BIT(1) /* 1 = enable */
89#define I82443BXGX_ERRCMD_OFFSET_SERR_ON_SBE BIT(0) /* 1 = enable */
90
91#define I82443BXGX_ERRSTS 0x91 /* 16bit register starting at this PCI
92 * config space offset. */
93#define I82443BXGX_ERRSTS_OFFSET_MBFRE 5 /* 3 bits - first err row multibit */
94#define I82443BXGX_ERRSTS_OFFSET_MEF BIT(4) /* 1 = MBE occurred */
95#define I82443BXGX_ERRSTS_OFFSET_SBFRE 1 /* 3 bits - first err row singlebit */
96#define I82443BXGX_ERRSTS_OFFSET_SEF BIT(0) /* 1 = SBE occurred */
97
98#define I82443BXGX_DRAMC 0x57 /* 8bit register starting at this PCI
99 * config space offset. */
100#define I82443BXGX_DRAMC_OFFSET_DT 3 /* 2 bits, DRAM Type */
101#define I82443BXGX_DRAMC_DRAM_IS_EDO 0 /* 00 = EDO */
102#define I82443BXGX_DRAMC_DRAM_IS_SDRAM 1 /* 01 = SDRAM */
103#define I82443BXGX_DRAMC_DRAM_IS_RSDRAM 2 /* 10 = Registered SDRAM */
104
105#define I82443BXGX_DRB 0x60 /* 8x 8bit registers starting at this PCI
106 * config space offset. */
107
108/* FIXME - don't poll when ECC disabled? */
109
110struct i82443bxgx_edacmc_error_info {
111 u32 eap;
112};
113
114static struct edac_pci_ctl_info *i82443bxgx_pci;
115
116static void i82443bxgx_edacmc_get_error_info(struct mem_ctl_info *mci,
117 struct i82443bxgx_edacmc_error_info
118 *info)
119{
120 struct pci_dev *pdev;
121 pdev = to_pci_dev(mci->dev);
122 pci_read_config_dword(pdev, I82443BXGX_EAP, &info->eap);
123 if (info->eap & I82443BXGX_EAP_OFFSET_SBE)
124 /* Clear error to allow next error to be reported [p.61] */
125 pci_write_bits32(pdev, I82443BXGX_EAP,
126 I82443BXGX_EAP_OFFSET_SBE,
127 I82443BXGX_EAP_OFFSET_SBE);
128
129 if (info->eap & I82443BXGX_EAP_OFFSET_MBE)
130 /* Clear error to allow next error to be reported [p.61] */
131 pci_write_bits32(pdev, I82443BXGX_EAP,
132 I82443BXGX_EAP_OFFSET_MBE,
133 I82443BXGX_EAP_OFFSET_MBE);
134}
135
136static int i82443bxgx_edacmc_process_error_info(struct mem_ctl_info *mci,
137 struct
138 i82443bxgx_edacmc_error_info
139 *info, int handle_errors)
140{
141 int error_found = 0;
142 u32 eapaddr, page, pageoffset;
143
144 /* bits 30:12 hold the 4kb block in which the error occurred
145 * [p.61] */
146 eapaddr = (info->eap & 0xfffff000);
147 page = eapaddr >> PAGE_SHIFT;
148 pageoffset = eapaddr - (page << PAGE_SHIFT);
149
150 if (info->eap & I82443BXGX_EAP_OFFSET_SBE) {
151 error_found = 1;
152 if (handle_errors)
153 edac_mc_handle_ce(mci, page, pageoffset,
154 /* 440BX/GX don't make syndrome information
155 * available */
156 0, edac_mc_find_csrow_by_page(mci, page), 0,
157 mci->ctl_name);
158 }
159
160 if (info->eap & I82443BXGX_EAP_OFFSET_MBE) {
161 error_found = 1;
162 if (handle_errors)
163 edac_mc_handle_ue(mci, page, pageoffset,
164 edac_mc_find_csrow_by_page(mci, page),
165 mci->ctl_name);
166 }
167
168 return error_found;
169}
170
171static void i82443bxgx_edacmc_check(struct mem_ctl_info *mci)
172{
173 struct i82443bxgx_edacmc_error_info info;
174
175 debugf1("MC%d: " __FILE__ ": %s()\n", mci->mc_idx, __func__);
176 i82443bxgx_edacmc_get_error_info(mci, &info);
177 i82443bxgx_edacmc_process_error_info(mci, &info, 1);
178}
179
180static void i82443bxgx_init_csrows(struct mem_ctl_info *mci,
181 struct pci_dev *pdev,
182 enum edac_type edac_mode,
183 enum mem_type mtype)
184{
185 struct csrow_info *csrow;
186 int index;
187 u8 drbar, dramc;
188 u32 row_base, row_high_limit, row_high_limit_last;
189
190 pci_read_config_byte(pdev, I82443BXGX_DRAMC, &dramc);
191 row_high_limit_last = 0;
192 for (index = 0; index < mci->nr_csrows; index++) {
193 csrow = &mci->csrows[index];
194 pci_read_config_byte(pdev, I82443BXGX_DRB + index, &drbar);
195 debugf1("MC%d: " __FILE__ ": %s() Row=%d DRB = %#0x\n",
196 mci->mc_idx, __func__, index, drbar);
197 row_high_limit = ((u32) drbar << 23);
198 /* find the DRAM Chip Select Base address and mask */
199 debugf1("MC%d: " __FILE__ ": %s() Row=%d, "
200 "Boundry Address=%#0x, Last = %#0x \n",
201 mci->mc_idx, __func__, index, row_high_limit,
202 row_high_limit_last);
203
204 /* 440GX goes to 2GB, represented with a DRB of 0. */
205 if (row_high_limit_last && !row_high_limit)
206 row_high_limit = 1UL << 31;
207
208 /* This row is empty [p.49] */
209 if (row_high_limit == row_high_limit_last)
210 continue;
211 row_base = row_high_limit_last;
212 csrow->first_page = row_base >> PAGE_SHIFT;
213 csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
214 csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
215 /* EAP reports in 4kilobyte granularity [61] */
216 csrow->grain = 1 << 12;
217 csrow->mtype = mtype;
218 /* I don't think 440BX can tell you device type? FIXME? */
219 csrow->dtype = DEV_UNKNOWN;
220 /* Mode is global to all rows on 440BX */
221 csrow->edac_mode = edac_mode;
222 row_high_limit_last = row_high_limit;
223 }
224}
225
226static int i82443bxgx_edacmc_probe1(struct pci_dev *pdev, int dev_idx)
227{
228 struct mem_ctl_info *mci;
229 u8 dramc;
230 u32 nbxcfg, ecc_mode;
231 enum mem_type mtype;
232 enum edac_type edac_mode;
233
234 debugf0("MC: " __FILE__ ": %s()\n", __func__);
235
236 /* Something is really hosed if PCI config space reads from
237 * the MC aren't working.
238 */
239 if (pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg))
240 return -EIO;
241
242 mci = edac_mc_alloc(0, I82443BXGX_NR_CSROWS, I82443BXGX_NR_CHANS, 0);
243
244 if (mci == NULL)
245 return -ENOMEM;
246
247 debugf0("MC: " __FILE__ ": %s(): mci = %p\n", __func__, mci);
248 mci->dev = &pdev->dev;
249 mci->mtype_cap = MEM_FLAG_EDO | MEM_FLAG_SDR | MEM_FLAG_RDR;
250 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
251 pci_read_config_byte(pdev, I82443BXGX_DRAMC, &dramc);
252 switch ((dramc >> I82443BXGX_DRAMC_OFFSET_DT) & (BIT(0) | BIT(1))) {
253 case I82443BXGX_DRAMC_DRAM_IS_EDO:
254 mtype = MEM_EDO;
255 break;
256 case I82443BXGX_DRAMC_DRAM_IS_SDRAM:
257 mtype = MEM_SDR;
258 break;
259 case I82443BXGX_DRAMC_DRAM_IS_RSDRAM:
260 mtype = MEM_RDR;
261 break;
262 default:
263 debugf0("Unknown/reserved DRAM type value "
264 "in DRAMC register!\n");
265 mtype = -MEM_UNKNOWN;
266 }
267
268 if ((mtype == MEM_SDR) || (mtype == MEM_RDR))
269 mci->edac_cap = mci->edac_ctl_cap;
270 else
271 mci->edac_cap = EDAC_FLAG_NONE;
272
273 mci->scrub_cap = SCRUB_FLAG_HW_SRC;
274 pci_read_config_dword(pdev, I82443BXGX_NBXCFG, &nbxcfg);
275 ecc_mode = ((nbxcfg >> I82443BXGX_NBXCFG_OFFSET_DRAM_INTEGRITY) &
276 (BIT(0) | BIT(1)));
277
278 mci->scrub_mode = (ecc_mode == I82443BXGX_NBXCFG_INTEGRITY_SCRUB)
279 ? SCRUB_HW_SRC : SCRUB_NONE;
280
281 switch (ecc_mode) {
282 case I82443BXGX_NBXCFG_INTEGRITY_NONE:
283 edac_mode = EDAC_NONE;
284 break;
285 case I82443BXGX_NBXCFG_INTEGRITY_EC:
286 edac_mode = EDAC_EC;
287 break;
288 case I82443BXGX_NBXCFG_INTEGRITY_ECC:
289 case I82443BXGX_NBXCFG_INTEGRITY_SCRUB:
290 edac_mode = EDAC_SECDED;
291 break;
292 default:
293 debugf0("%s(): Unknown/reserved ECC state "
294 "in NBXCFG register!\n", __func__);
295 edac_mode = EDAC_UNKNOWN;
296 break;
297 }
298
299 i82443bxgx_init_csrows(mci, pdev, edac_mode, mtype);
300
301 /* Many BIOSes don't clear error flags on boot, so do this
302 * here, or we get "phantom" errors occuring at module-load
303 * time. */
304 pci_write_bits32(pdev, I82443BXGX_EAP,
305 (I82443BXGX_EAP_OFFSET_SBE |
306 I82443BXGX_EAP_OFFSET_MBE),
307 (I82443BXGX_EAP_OFFSET_SBE |
308 I82443BXGX_EAP_OFFSET_MBE));
309
310 mci->mod_name = EDAC_MOD_STR;
311 mci->mod_ver = I82443_REVISION;
312 mci->ctl_name = "I82443BXGX";
313 mci->dev_name = pci_name(pdev);
314 mci->edac_check = i82443bxgx_edacmc_check;
315 mci->ctl_page_to_phys = NULL;
316
317 if (edac_mc_add_mc(mci)) {
318 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
319 goto fail;
320 }
321
322 /* allocating generic PCI control info */
323 i82443bxgx_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
324 if (!i82443bxgx_pci) {
325 printk(KERN_WARNING
326 "%s(): Unable to create PCI control\n",
327 __func__);
328 printk(KERN_WARNING
329 "%s(): PCI error report via EDAC not setup\n",
330 __func__);
331 }
332
333 debugf3("MC: " __FILE__ ": %s(): success\n", __func__);
334 return 0;
335
336fail:
337 edac_mc_free(mci);
338 return -ENODEV;
339}
340
341EXPORT_SYMBOL_GPL(i82443bxgx_edacmc_probe1);
342
343/* returns count (>= 0), or negative on error */
344static int __devinit i82443bxgx_edacmc_init_one(struct pci_dev *pdev,
345 const struct pci_device_id *ent)
346{
347 debugf0("MC: " __FILE__ ": %s()\n", __func__);
348
349 /* don't need to call pci_device_enable() */
350 return i82443bxgx_edacmc_probe1(pdev, ent->driver_data);
351}
352
353static void __devexit i82443bxgx_edacmc_remove_one(struct pci_dev *pdev)
354{
355 struct mem_ctl_info *mci;
356
357 debugf0(__FILE__ ": %s()\n", __func__);
358
359 if (i82443bxgx_pci)
360 edac_pci_release_generic_ctl(i82443bxgx_pci);
361
362 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
363 return;
364
365 edac_mc_free(mci);
366}
367
368EXPORT_SYMBOL_GPL(i82443bxgx_edacmc_remove_one);
369
370static const struct pci_device_id i82443bxgx_pci_tbl[] __devinitdata = {
371 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_0)},
372 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443BX_2)},
373 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0)},
374 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2)},
375 {0,} /* 0 terminated list. */
376};
377
378MODULE_DEVICE_TABLE(pci, i82443bxgx_pci_tbl);
379
380static struct pci_driver i82443bxgx_edacmc_driver = {
381 .name = EDAC_MOD_STR,
382 .probe = i82443bxgx_edacmc_init_one,
383 .remove = __devexit_p(i82443bxgx_edacmc_remove_one),
384 .id_table = i82443bxgx_pci_tbl,
385};
386
387static int __init i82443bxgx_edacmc_init(void)
388{
389 return pci_register_driver(&i82443bxgx_edacmc_driver);
390}
391
392static void __exit i82443bxgx_edacmc_exit(void)
393{
394 pci_unregister_driver(&i82443bxgx_edacmc_driver);
395}
396
397module_init(i82443bxgx_edacmc_init);
398module_exit(i82443bxgx_edacmc_exit);
399
400MODULE_LICENSE("GPL");
401MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD");
402MODULE_DESCRIPTION("EDAC MC support for Intel 82443BX/GX memory controllers");
diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c
index e4bb298e61..f5ecd2c4d8 100644
--- a/drivers/edac/i82860_edac.c
+++ b/drivers/edac/i82860_edac.c
@@ -14,9 +14,9 @@
14#include <linux/pci.h> 14#include <linux/pci.h>
15#include <linux/pci_ids.h> 15#include <linux/pci_ids.h>
16#include <linux/slab.h> 16#include <linux/slab.h>
17#include "edac_mc.h" 17#include "edac_core.h"
18 18
19#define I82860_REVISION " Ver: 2.0.1 " __DATE__ 19#define I82860_REVISION " Ver: 2.0.2 " __DATE__
20#define EDAC_MOD_STR "i82860_edac" 20#define EDAC_MOD_STR "i82860_edac"
21 21
22#define i82860_printk(level, fmt, arg...) \ 22#define i82860_printk(level, fmt, arg...) \
@@ -54,16 +54,16 @@ struct i82860_error_info {
54 54
55static const struct i82860_dev_info i82860_devs[] = { 55static const struct i82860_dev_info i82860_devs[] = {
56 [I82860] = { 56 [I82860] = {
57 .ctl_name = "i82860" 57 .ctl_name = "i82860"},
58 },
59}; 58};
60 59
61static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code 60static struct pci_dev *mci_pdev; /* init dev: in case that AGP code
62 * has already registered driver 61 * has already registered driver
63 */ 62 */
63static struct edac_pci_ctl_info *i82860_pci;
64 64
65static void i82860_get_error_info(struct mem_ctl_info *mci, 65static void i82860_get_error_info(struct mem_ctl_info *mci,
66 struct i82860_error_info *info) 66 struct i82860_error_info *info)
67{ 67{
68 struct pci_dev *pdev; 68 struct pci_dev *pdev;
69 69
@@ -91,13 +91,13 @@ static void i82860_get_error_info(struct mem_ctl_info *mci,
91 91
92 if ((info->errsts ^ info->errsts2) & 0x0003) { 92 if ((info->errsts ^ info->errsts2) & 0x0003) {
93 pci_read_config_dword(pdev, I82860_EAP, &info->eap); 93 pci_read_config_dword(pdev, I82860_EAP, &info->eap);
94 pci_read_config_word(pdev, I82860_DERRCTL_STS, 94 pci_read_config_word(pdev, I82860_DERRCTL_STS, &info->derrsyn);
95 &info->derrsyn);
96 } 95 }
97} 96}
98 97
99static int i82860_process_error_info(struct mem_ctl_info *mci, 98static int i82860_process_error_info(struct mem_ctl_info *mci,
100 struct i82860_error_info *info, int handle_errors) 99 struct i82860_error_info *info,
100 int handle_errors)
101{ 101{
102 int row; 102 int row;
103 103
@@ -136,7 +136,7 @@ static void i82860_check(struct mem_ctl_info *mci)
136static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev) 136static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)
137{ 137{
138 unsigned long last_cumul_size; 138 unsigned long last_cumul_size;
139 u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */ 139 u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
140 u16 value; 140 u16 value;
141 u32 cumul_size; 141 u32 cumul_size;
142 struct csrow_info *csrow; 142 struct csrow_info *csrow;
@@ -155,7 +155,7 @@ static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)
155 csrow = &mci->csrows[index]; 155 csrow = &mci->csrows[index];
156 pci_read_config_word(pdev, I82860_GBA + index * 2, &value); 156 pci_read_config_word(pdev, I82860_GBA + index * 2, &value);
157 cumul_size = (value & I82860_GBA_MASK) << 157 cumul_size = (value & I82860_GBA_MASK) <<
158 (I82860_GBA_SHIFT - PAGE_SHIFT); 158 (I82860_GBA_SHIFT - PAGE_SHIFT);
159 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index, 159 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
160 cumul_size); 160 cumul_size);
161 161
@@ -186,7 +186,7 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
186 the channel and the GRA registers map to physical devices so we are 186 the channel and the GRA registers map to physical devices so we are
187 going to make 1 channel for group. 187 going to make 1 channel for group.
188 */ 188 */
189 mci = edac_mc_alloc(0, 16, 1); 189 mci = edac_mc_alloc(0, 16, 1, 0);
190 190
191 if (!mci) 191 if (!mci)
192 return -ENOMEM; 192 return -ENOMEM;
@@ -200,19 +200,31 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
200 mci->mod_name = EDAC_MOD_STR; 200 mci->mod_name = EDAC_MOD_STR;
201 mci->mod_ver = I82860_REVISION; 201 mci->mod_ver = I82860_REVISION;
202 mci->ctl_name = i82860_devs[dev_idx].ctl_name; 202 mci->ctl_name = i82860_devs[dev_idx].ctl_name;
203 mci->dev_name = pci_name(pdev);
203 mci->edac_check = i82860_check; 204 mci->edac_check = i82860_check;
204 mci->ctl_page_to_phys = NULL; 205 mci->ctl_page_to_phys = NULL;
205 i82860_init_csrows(mci, pdev); 206 i82860_init_csrows(mci, pdev);
206 i82860_get_error_info(mci, &discard); /* clear counters */ 207 i82860_get_error_info(mci, &discard); /* clear counters */
207 208
208 /* Here we assume that we will never see multiple instances of this 209 /* Here we assume that we will never see multiple instances of this
209 * type of memory controller. The ID is therefore hardcoded to 0. 210 * type of memory controller. The ID is therefore hardcoded to 0.
210 */ 211 */
211 if (edac_mc_add_mc(mci,0)) { 212 if (edac_mc_add_mc(mci)) {
212 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 213 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
213 goto fail; 214 goto fail;
214 } 215 }
215 216
217 /* allocating generic PCI control info */
218 i82860_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
219 if (!i82860_pci) {
220 printk(KERN_WARNING
221 "%s(): Unable to create PCI control\n",
222 __func__);
223 printk(KERN_WARNING
224 "%s(): PCI error report via EDAC not setup\n",
225 __func__);
226 }
227
216 /* get this far and it's successful */ 228 /* get this far and it's successful */
217 debugf3("%s(): success\n", __func__); 229 debugf3("%s(): success\n", __func__);
218 230
@@ -225,7 +237,7 @@ fail:
225 237
226/* returns count (>= 0), or negative on error */ 238/* returns count (>= 0), or negative on error */
227static int __devinit i82860_init_one(struct pci_dev *pdev, 239static int __devinit i82860_init_one(struct pci_dev *pdev,
228 const struct pci_device_id *ent) 240 const struct pci_device_id *ent)
229{ 241{
230 int rc; 242 int rc;
231 243
@@ -249,6 +261,9 @@ static void __devexit i82860_remove_one(struct pci_dev *pdev)
249 261
250 debugf0("%s()\n", __func__); 262 debugf0("%s()\n", __func__);
251 263
264 if (i82860_pci)
265 edac_pci_release_generic_ctl(i82860_pci);
266
252 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) 267 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
253 return; 268 return;
254 269
@@ -257,12 +272,11 @@ static void __devexit i82860_remove_one(struct pci_dev *pdev)
257 272
258static const struct pci_device_id i82860_pci_tbl[] __devinitdata = { 273static const struct pci_device_id i82860_pci_tbl[] __devinitdata = {
259 { 274 {
260 PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 275 PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
261 I82860 276 I82860},
262 },
263 { 277 {
264 0, 278 0,
265 } /* 0 terminated list. */ 279 } /* 0 terminated list. */
266}; 280};
267 281
268MODULE_DEVICE_TABLE(pci, i82860_pci_tbl); 282MODULE_DEVICE_TABLE(pci, i82860_pci_tbl);
@@ -329,5 +343,5 @@ module_exit(i82860_exit);
329 343
330MODULE_LICENSE("GPL"); 344MODULE_LICENSE("GPL");
331MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com) " 345MODULE_AUTHOR("Red Hat Inc. (http://www.redhat.com) "
332 "Ben Woodard <woodard@redhat.com>"); 346 "Ben Woodard <woodard@redhat.com>");
333MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers"); 347MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers");
diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c
index 2800b3e614..031abadc43 100644
--- a/drivers/edac/i82875p_edac.c
+++ b/drivers/edac/i82875p_edac.c
@@ -18,9 +18,9 @@
18#include <linux/pci.h> 18#include <linux/pci.h>
19#include <linux/pci_ids.h> 19#include <linux/pci_ids.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include "edac_mc.h" 21#include "edac_core.h"
22 22
23#define I82875P_REVISION " Ver: 2.0.1 " __DATE__ 23#define I82875P_REVISION " Ver: 2.0.2 " __DATE__
24#define EDAC_MOD_STR "i82875p_edac" 24#define EDAC_MOD_STR "i82875p_edac"
25 25
26#define i82875p_printk(level, fmt, arg...) \ 26#define i82875p_printk(level, fmt, arg...) \
@@ -174,18 +174,19 @@ struct i82875p_error_info {
174 174
175static const struct i82875p_dev_info i82875p_devs[] = { 175static const struct i82875p_dev_info i82875p_devs[] = {
176 [I82875P] = { 176 [I82875P] = {
177 .ctl_name = "i82875p" 177 .ctl_name = "i82875p"},
178 },
179}; 178};
180 179
181static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code has 180static struct pci_dev *mci_pdev; /* init dev: in case that AGP code has
182 * already registered driver 181 * already registered driver
183 */ 182 */
184 183
185static int i82875p_registered = 1; 184static int i82875p_registered = 1;
186 185
186static struct edac_pci_ctl_info *i82875p_pci;
187
187static void i82875p_get_error_info(struct mem_ctl_info *mci, 188static void i82875p_get_error_info(struct mem_ctl_info *mci,
188 struct i82875p_error_info *info) 189 struct i82875p_error_info *info)
189{ 190{
190 struct pci_dev *pdev; 191 struct pci_dev *pdev;
191 192
@@ -197,38 +198,39 @@ static void i82875p_get_error_info(struct mem_ctl_info *mci,
197 * overwritten by UE. 198 * overwritten by UE.
198 */ 199 */
199 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts); 200 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts);
201
202 if (!(info->errsts & 0x0081))
203 return;
204
200 pci_read_config_dword(pdev, I82875P_EAP, &info->eap); 205 pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
201 pci_read_config_byte(pdev, I82875P_DES, &info->des); 206 pci_read_config_byte(pdev, I82875P_DES, &info->des);
202 pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn); 207 pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn);
203 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts2); 208 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts2);
204 209
205 pci_write_bits16(pdev, I82875P_ERRSTS, 0x0081, 0x0081);
206
207 /* 210 /*
208 * If the error is the same then we can for both reads then 211 * If the error is the same then we can for both reads then
209 * the first set of reads is valid. If there is a change then 212 * the first set of reads is valid. If there is a change then
210 * there is a CE no info and the second set of reads is valid 213 * there is a CE no info and the second set of reads is valid
211 * and should be UE info. 214 * and should be UE info.
212 */ 215 */
213 if (!(info->errsts2 & 0x0081))
214 return;
215
216 if ((info->errsts ^ info->errsts2) & 0x0081) { 216 if ((info->errsts ^ info->errsts2) & 0x0081) {
217 pci_read_config_dword(pdev, I82875P_EAP, &info->eap); 217 pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
218 pci_read_config_byte(pdev, I82875P_DES, &info->des); 218 pci_read_config_byte(pdev, I82875P_DES, &info->des);
219 pci_read_config_byte(pdev, I82875P_DERRSYN, 219 pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn);
220 &info->derrsyn);
221 } 220 }
221
222 pci_write_bits16(pdev, I82875P_ERRSTS, 0x0081, 0x0081);
222} 223}
223 224
224static int i82875p_process_error_info(struct mem_ctl_info *mci, 225static int i82875p_process_error_info(struct mem_ctl_info *mci,
225 struct i82875p_error_info *info, int handle_errors) 226 struct i82875p_error_info *info,
227 int handle_errors)
226{ 228{
227 int row, multi_chan; 229 int row, multi_chan;
228 230
229 multi_chan = mci->csrows[0].nr_channels - 1; 231 multi_chan = mci->csrows[0].nr_channels - 1;
230 232
231 if (!(info->errsts2 & 0x0081)) 233 if (!(info->errsts & 0x0081))
232 return 0; 234 return 0;
233 235
234 if (!handle_errors) 236 if (!handle_errors)
@@ -263,10 +265,12 @@ static void i82875p_check(struct mem_ctl_info *mci)
263 265
264/* Return 0 on success or 1 on failure. */ 266/* Return 0 on success or 1 on failure. */
265static int i82875p_setup_overfl_dev(struct pci_dev *pdev, 267static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
266 struct pci_dev **ovrfl_pdev, void __iomem **ovrfl_window) 268 struct pci_dev **ovrfl_pdev,
269 void __iomem **ovrfl_window)
267{ 270{
268 struct pci_dev *dev; 271 struct pci_dev *dev;
269 void __iomem *window; 272 void __iomem *window;
273 int err;
270 274
271 *ovrfl_pdev = NULL; 275 *ovrfl_pdev = NULL;
272 *ovrfl_window = NULL; 276 *ovrfl_window = NULL;
@@ -284,14 +288,19 @@ static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
284 if (dev == NULL) 288 if (dev == NULL)
285 return 1; 289 return 1;
286 290
287 pci_bus_add_device(dev); 291 err = pci_bus_add_device(dev);
292 if (err) {
293 i82875p_printk(KERN_ERR,
294 "%s(): pci_bus_add_device() Failed\n",
295 __func__);
296 }
288 } 297 }
289 298
290 *ovrfl_pdev = dev; 299 *ovrfl_pdev = dev;
291 300
292 if (pci_enable_device(dev)) { 301 if (pci_enable_device(dev)) {
293 i82875p_printk(KERN_ERR, "%s(): Failed to enable overflow " 302 i82875p_printk(KERN_ERR, "%s(): Failed to enable overflow "
294 "device\n", __func__); 303 "device\n", __func__);
295 return 1; 304 return 1;
296 } 305 }
297 306
@@ -307,7 +316,7 @@ static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
307 316
308 if (window == NULL) { 317 if (window == NULL) {
309 i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n", 318 i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n",
310 __func__); 319 __func__);
311 goto fail1; 320 goto fail1;
312 } 321 }
313 322
@@ -325,21 +334,20 @@ fail0:
325 return 1; 334 return 1;
326} 335}
327 336
328
329/* Return 1 if dual channel mode is active. Else return 0. */ 337/* Return 1 if dual channel mode is active. Else return 0. */
330static inline int dual_channel_active(u32 drc) 338static inline int dual_channel_active(u32 drc)
331{ 339{
332 return (drc >> 21) & 0x1; 340 return (drc >> 21) & 0x1;
333} 341}
334 342
335
336static void i82875p_init_csrows(struct mem_ctl_info *mci, 343static void i82875p_init_csrows(struct mem_ctl_info *mci,
337 struct pci_dev *pdev, void __iomem *ovrfl_window, u32 drc) 344 struct pci_dev *pdev,
345 void __iomem * ovrfl_window, u32 drc)
338{ 346{
339 struct csrow_info *csrow; 347 struct csrow_info *csrow;
340 unsigned long last_cumul_size; 348 unsigned long last_cumul_size;
341 u8 value; 349 u8 value;
342 u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ 350 u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
343 u32 cumul_size; 351 u32 cumul_size;
344 int index; 352 int index;
345 353
@@ -392,7 +400,7 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
392 drc = readl(ovrfl_window + I82875P_DRC); 400 drc = readl(ovrfl_window + I82875P_DRC);
393 nr_chans = dual_channel_active(drc) + 1; 401 nr_chans = dual_channel_active(drc) + 1;
394 mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans), 402 mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
395 nr_chans); 403 nr_chans, 0);
396 404
397 if (!mci) { 405 if (!mci) {
398 rc = -ENOMEM; 406 rc = -ENOMEM;
@@ -407,23 +415,35 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
407 mci->mod_name = EDAC_MOD_STR; 415 mci->mod_name = EDAC_MOD_STR;
408 mci->mod_ver = I82875P_REVISION; 416 mci->mod_ver = I82875P_REVISION;
409 mci->ctl_name = i82875p_devs[dev_idx].ctl_name; 417 mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
418 mci->dev_name = pci_name(pdev);
410 mci->edac_check = i82875p_check; 419 mci->edac_check = i82875p_check;
411 mci->ctl_page_to_phys = NULL; 420 mci->ctl_page_to_phys = NULL;
412 debugf3("%s(): init pvt\n", __func__); 421 debugf3("%s(): init pvt\n", __func__);
413 pvt = (struct i82875p_pvt *) mci->pvt_info; 422 pvt = (struct i82875p_pvt *)mci->pvt_info;
414 pvt->ovrfl_pdev = ovrfl_pdev; 423 pvt->ovrfl_pdev = ovrfl_pdev;
415 pvt->ovrfl_window = ovrfl_window; 424 pvt->ovrfl_window = ovrfl_window;
416 i82875p_init_csrows(mci, pdev, ovrfl_window, drc); 425 i82875p_init_csrows(mci, pdev, ovrfl_window, drc);
417 i82875p_get_error_info(mci, &discard); /* clear counters */ 426 i82875p_get_error_info(mci, &discard); /* clear counters */
418 427
419 /* Here we assume that we will never see multiple instances of this 428 /* Here we assume that we will never see multiple instances of this
420 * type of memory controller. The ID is therefore hardcoded to 0. 429 * type of memory controller. The ID is therefore hardcoded to 0.
421 */ 430 */
422 if (edac_mc_add_mc(mci,0)) { 431 if (edac_mc_add_mc(mci)) {
423 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 432 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
424 goto fail1; 433 goto fail1;
425 } 434 }
426 435
436 /* allocating generic PCI control info */
437 i82875p_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
438 if (!i82875p_pci) {
439 printk(KERN_WARNING
440 "%s(): Unable to create PCI control\n",
441 __func__);
442 printk(KERN_WARNING
443 "%s(): PCI error report via EDAC not setup\n",
444 __func__);
445 }
446
427 /* get this far and it's successful */ 447 /* get this far and it's successful */
428 debugf3("%s(): success\n", __func__); 448 debugf3("%s(): success\n", __func__);
429 return 0; 449 return 0;
@@ -442,7 +462,7 @@ fail0:
442 462
443/* returns count (>= 0), or negative on error */ 463/* returns count (>= 0), or negative on error */
444static int __devinit i82875p_init_one(struct pci_dev *pdev, 464static int __devinit i82875p_init_one(struct pci_dev *pdev,
445 const struct pci_device_id *ent) 465 const struct pci_device_id *ent)
446{ 466{
447 int rc; 467 int rc;
448 468
@@ -467,10 +487,13 @@ static void __devexit i82875p_remove_one(struct pci_dev *pdev)
467 487
468 debugf0("%s()\n", __func__); 488 debugf0("%s()\n", __func__);
469 489
490 if (i82875p_pci)
491 edac_pci_release_generic_ctl(i82875p_pci);
492
470 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) 493 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
471 return; 494 return;
472 495
473 pvt = (struct i82875p_pvt *) mci->pvt_info; 496 pvt = (struct i82875p_pvt *)mci->pvt_info;
474 497
475 if (pvt->ovrfl_window) 498 if (pvt->ovrfl_window)
476 iounmap(pvt->ovrfl_window); 499 iounmap(pvt->ovrfl_window);
@@ -488,12 +511,11 @@ static void __devexit i82875p_remove_one(struct pci_dev *pdev)
488 511
489static const struct pci_device_id i82875p_pci_tbl[] __devinitdata = { 512static const struct pci_device_id i82875p_pci_tbl[] __devinitdata = {
490 { 513 {
491 PCI_VEND_DEV(INTEL, 82875_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0, 514 PCI_VEND_DEV(INTEL, 82875_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
492 I82875P 515 I82875P},
493 },
494 { 516 {
495 0, 517 0,
496 } /* 0 terminated list. */ 518 } /* 0 terminated list. */
497}; 519};
498 520
499MODULE_DEVICE_TABLE(pci, i82875p_pci_tbl); 521MODULE_DEVICE_TABLE(pci, i82875p_pci_tbl);
@@ -517,7 +539,7 @@ static int __init i82875p_init(void)
517 539
518 if (mci_pdev == NULL) { 540 if (mci_pdev == NULL) {
519 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL, 541 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
520 PCI_DEVICE_ID_INTEL_82875_0, NULL); 542 PCI_DEVICE_ID_INTEL_82875_0, NULL);
521 543
522 if (!mci_pdev) { 544 if (!mci_pdev) {
523 debugf0("875p pci_get_device fail\n"); 545 debugf0("875p pci_get_device fail\n");
diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c
new file mode 100644
index 0000000000..0ee8884569
--- /dev/null
+++ b/drivers/edac/i82975x_edac.c
@@ -0,0 +1,666 @@
1/*
2 * Intel 82975X Memory Controller kernel module
3 * (C) 2007 aCarLab (India) Pvt. Ltd. (http://acarlab.com)
4 * (C) 2007 jetzbroadband (http://jetzbroadband.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
7 *
8 * Written by Arvind R.
9 * Copied from i82875p_edac.c source:
10 */
11
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/pci.h>
15#include <linux/pci_ids.h>
16#include <linux/slab.h>
17
18#include "edac_core.h"
19
20#define I82975X_REVISION " Ver: 1.0.0 " __DATE__
21#define EDAC_MOD_STR "i82975x_edac"
22
23#define i82975x_printk(level, fmt, arg...) \
24 edac_printk(level, "i82975x", fmt, ##arg)
25
26#define i82975x_mc_printk(mci, level, fmt, arg...) \
27 edac_mc_chipset_printk(mci, level, "i82975x", fmt, ##arg)
28
29#ifndef PCI_DEVICE_ID_INTEL_82975_0
30#define PCI_DEVICE_ID_INTEL_82975_0 0x277c
31#endif /* PCI_DEVICE_ID_INTEL_82975_0 */
32
33#define I82975X_NR_CSROWS(nr_chans) (8/(nr_chans))
34
35/* Intel 82975X register addresses - device 0 function 0 - DRAM Controller */
36#define I82975X_EAP 0x58 /* Dram Error Address Pointer (32b)
37 *
38 * 31:7 128 byte cache-line address
39 * 6:1 reserved
40 * 0 0: CH0; 1: CH1
41 */
42
43#define I82975X_DERRSYN 0x5c /* Dram Error SYNdrome (8b)
44 *
45 * 7:0 DRAM ECC Syndrome
46 */
47
48#define I82975X_DES 0x5d /* Dram ERRor DeSTination (8b)
49 * 0h: Processor Memory Reads
50 * 1h:7h reserved
51 * More - See Page 65 of Intel DocSheet.
52 */
53
54#define I82975X_ERRSTS 0xc8 /* Error Status Register (16b)
55 *
56 * 15:12 reserved
57 * 11 Thermal Sensor Event
58 * 10 reserved
59 * 9 non-DRAM lock error (ndlock)
60 * 8 Refresh Timeout
61 * 7:2 reserved
62 * 1 ECC UE (multibit DRAM error)
63 * 0 ECC CE (singlebit DRAM error)
64 */
65
66/* Error Reporting is supported by 3 mechanisms:
67 1. DMI SERR generation ( ERRCMD )
68 2. SMI DMI generation ( SMICMD )
69 3. SCI DMI generation ( SCICMD )
70NOTE: Only ONE of the three must be enabled
71*/
72#define I82975X_ERRCMD 0xca /* Error Command (16b)
73 *
74 * 15:12 reserved
75 * 11 Thermal Sensor Event
76 * 10 reserved
77 * 9 non-DRAM lock error (ndlock)
78 * 8 Refresh Timeout
79 * 7:2 reserved
80 * 1 ECC UE (multibit DRAM error)
81 * 0 ECC CE (singlebit DRAM error)
82 */
83
84#define I82975X_SMICMD 0xcc /* Error Command (16b)
85 *
86 * 15:2 reserved
87 * 1 ECC UE (multibit DRAM error)
88 * 0 ECC CE (singlebit DRAM error)
89 */
90
91#define I82975X_SCICMD 0xce /* Error Command (16b)
92 *
93 * 15:2 reserved
94 * 1 ECC UE (multibit DRAM error)
95 * 0 ECC CE (singlebit DRAM error)
96 */
97
98#define I82975X_XEAP 0xfc /* Extended Dram Error Address Pointer (8b)
99 *
100 * 7:1 reserved
101 * 0 Bit32 of the Dram Error Address
102 */
103
104#define I82975X_MCHBAR 0x44 /*
105 *
106 * 31:14 Base Addr of 16K memory-mapped
107 * configuration space
108 * 13:1 reserverd
109 * 0 mem-mapped config space enable
110 */
111
112/* NOTE: Following addresses have to indexed using MCHBAR offset (44h, 32b) */
113/* Intel 82975x memory mapped register space */
114
115#define I82975X_DRB_SHIFT 25 /* fixed 32MiB grain */
116
117#define I82975X_DRB 0x100 /* DRAM Row Boundary (8b x 8)
118 *
119 * 7 set to 1 in highest DRB of
120 * channel if 4GB in ch.
121 * 6:2 upper boundary of rank in
122 * 32MB grains
123 * 1:0 set to 0
124 */
125#define I82975X_DRB_CH0R0 0x100
126#define I82975X_DRB_CH0R1 0x101
127#define I82975X_DRB_CH0R2 0x102
128#define I82975X_DRB_CH0R3 0x103
129#define I82975X_DRB_CH1R0 0x180
130#define I82975X_DRB_CH1R1 0x181
131#define I82975X_DRB_CH1R2 0x182
132#define I82975X_DRB_CH1R3 0x183
133
134
135#define I82975X_DRA 0x108 /* DRAM Row Attribute (4b x 8)
136 * defines the PAGE SIZE to be used
137 * for the rank
138 * 7 reserved
139 * 6:4 row attr of odd rank, i.e. 1
140 * 3 reserved
141 * 2:0 row attr of even rank, i.e. 0
142 *
143 * 000 = unpopulated
144 * 001 = reserved
145 * 010 = 4KiB
146 * 011 = 8KiB
147 * 100 = 16KiB
148 * others = reserved
149 */
150#define I82975X_DRA_CH0R01 0x108
151#define I82975X_DRA_CH0R23 0x109
152#define I82975X_DRA_CH1R01 0x188
153#define I82975X_DRA_CH1R23 0x189
154
155
156#define I82975X_BNKARC 0x10e /* Type of device in each rank - Bank Arch (16b)
157 *
158 * 15:8 reserved
159 * 7:6 Rank 3 architecture
160 * 5:4 Rank 2 architecture
161 * 3:2 Rank 1 architecture
162 * 1:0 Rank 0 architecture
163 *
164 * 00 => x16 devices; i.e 4 banks
165 * 01 => x8 devices; i.e 8 banks
166 */
167#define I82975X_C0BNKARC 0x10e
168#define I82975X_C1BNKARC 0x18e
169
170
171
172#define I82975X_DRC 0x120 /* DRAM Controller Mode0 (32b)
173 *
174 * 31:30 reserved
175 * 29 init complete
176 * 28:11 reserved, according to Intel
177 * 22:21 number of channels
178 * 00=1 01=2 in 82875
179 * seems to be ECC mode
180 * bits in 82975 in Asus
181 * P5W
182 * 19:18 Data Integ Mode
183 * 00=none 01=ECC in 82875
184 * 10:8 refresh mode
185 * 7 reserved
186 * 6:4 mode select
187 * 3:2 reserved
188 * 1:0 DRAM type 10=Second Revision
189 * DDR2 SDRAM
190 * 00, 01, 11 reserved
191 */
192#define I82975X_DRC_CH0M0 0x120
193#define I82975X_DRC_CH1M0 0x1A0
194
195
196#define I82975X_DRC_M1 0x124 /* DRAM Controller Mode1 (32b)
197 * 31 0=Standard Address Map
198 * 1=Enhanced Address Map
199 * 30:0 reserved
200 */
201
202#define I82975X_DRC_CH0M1 0x124
203#define I82975X_DRC_CH1M1 0x1A4
204
205enum i82975x_chips {
206 I82975X = 0,
207};
208
209struct i82975x_pvt {
210 void __iomem *mch_window;
211};
212
213struct i82975x_dev_info {
214 const char *ctl_name;
215};
216
217struct i82975x_error_info {
218 u16 errsts;
219 u32 eap;
220 u8 des;
221 u8 derrsyn;
222 u16 errsts2;
223 u8 chan; /* the channel is bit 0 of EAP */
224 u8 xeap; /* extended eap bit */
225};
226
227static const struct i82975x_dev_info i82975x_devs[] = {
228 [I82975X] = {
229 .ctl_name = "i82975x"
230 },
231};
232
233static struct pci_dev *mci_pdev; /* init dev: in case that AGP code has
234 * already registered driver
235 */
236
237static int i82975x_registered = 1;
238
239static void i82975x_get_error_info(struct mem_ctl_info *mci,
240 struct i82975x_error_info *info)
241{
242 struct pci_dev *pdev;
243
244 pdev = to_pci_dev(mci->dev);
245
246 /*
247 * This is a mess because there is no atomic way to read all the
248 * registers at once and the registers can transition from CE being
249 * overwritten by UE.
250 */
251 pci_read_config_word(pdev, I82975X_ERRSTS, &info->errsts);
252 pci_read_config_dword(pdev, I82975X_EAP, &info->eap);
253 pci_read_config_byte(pdev, I82975X_XEAP, &info->xeap);
254 pci_read_config_byte(pdev, I82975X_DES, &info->des);
255 pci_read_config_byte(pdev, I82975X_DERRSYN, &info->derrsyn);
256 pci_read_config_word(pdev, I82975X_ERRSTS, &info->errsts2);
257
258 pci_write_bits16(pdev, I82975X_ERRSTS, 0x0003, 0x0003);
259
260 /*
261 * If the error is the same then we can for both reads then
262 * the first set of reads is valid. If there is a change then
263 * there is a CE no info and the second set of reads is valid
264 * and should be UE info.
265 */
266 if (!(info->errsts2 & 0x0003))
267 return;
268
269 if ((info->errsts ^ info->errsts2) & 0x0003) {
270 pci_read_config_dword(pdev, I82975X_EAP, &info->eap);
271 pci_read_config_byte(pdev, I82975X_XEAP, &info->xeap);
272 pci_read_config_byte(pdev, I82975X_DES, &info->des);
273 pci_read_config_byte(pdev, I82975X_DERRSYN,
274 &info->derrsyn);
275 }
276}
277
278static int i82975x_process_error_info(struct mem_ctl_info *mci,
279 struct i82975x_error_info *info, int handle_errors)
280{
281 int row, multi_chan, chan;
282
283 multi_chan = mci->csrows[0].nr_channels - 1;
284
285 if (!(info->errsts2 & 0x0003))
286 return 0;
287
288 if (!handle_errors)
289 return 1;
290
291 if ((info->errsts ^ info->errsts2) & 0x0003) {
292 edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
293 info->errsts = info->errsts2;
294 }
295
296 chan = info->eap & 1;
297 info->eap >>= 1;
298 if (info->xeap )
299 info->eap |= 0x80000000;
300 info->eap >>= PAGE_SHIFT;
301 row = edac_mc_find_csrow_by_page(mci, info->eap);
302
303 if (info->errsts & 0x0002)
304 edac_mc_handle_ue(mci, info->eap, 0, row, "i82975x UE");
305 else
306 edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
307 multi_chan ? chan : 0,
308 "i82975x CE");
309
310 return 1;
311}
312
313static void i82975x_check(struct mem_ctl_info *mci)
314{
315 struct i82975x_error_info info;
316
317 debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
318 i82975x_get_error_info(mci, &info);
319 i82975x_process_error_info(mci, &info, 1);
320}
321
322/* Return 1 if dual channel mode is active. Else return 0. */
323static int dual_channel_active(void __iomem *mch_window)
324{
325 /*
326 * We treat interleaved-symmetric configuration as dual-channel - EAP's
327 * bit-0 giving the channel of the error location.
328 *
329 * All other configurations are treated as single channel - the EAP's
330 * bit-0 will resolve ok in symmetric area of mixed
331 * (symmetric/asymmetric) configurations
332 */
333 u8 drb[4][2];
334 int row;
335 int dualch;
336
337 for (dualch = 1, row = 0; dualch && (row < 4); row++) {
338 drb[row][0] = readb(mch_window + I82975X_DRB + row);
339 drb[row][1] = readb(mch_window + I82975X_DRB + row + 0x80);
340 dualch = dualch && (drb[row][0] == drb[row][1]);
341 }
342 return dualch;
343}
344
345static enum dev_type i82975x_dram_type(void __iomem *mch_window, int rank)
346{
347 /*
348 * ASUS P5W DH either does not program this register or programs
349 * it wrong!
350 * ECC is possible on i92975x ONLY with DEV_X8 which should mean 'val'
351 * for each rank should be 01b - the LSB of the word should be 0x55;
352 * but it reads 0!
353 */
354 return DEV_X8;
355}
356
357static void i82975x_init_csrows(struct mem_ctl_info *mci,
358 struct pci_dev *pdev, void __iomem *mch_window)
359{
360 struct csrow_info *csrow;
361 unsigned long last_cumul_size;
362 u8 value;
363 u32 cumul_size;
364 int index;
365
366 last_cumul_size = 0;
367
368 /*
369 * 82875 comment:
370 * The dram row boundary (DRB) reg values are boundary address
371 * for each DRAM row with a granularity of 32 or 64MB (single/dual
372 * channel operation). DRB regs are cumulative; therefore DRB7 will
373 * contain the total memory contained in all eight rows.
374 *
375 * FIXME:
376 * EDAC currently works for Dual-channel Interleaved configuration.
377 * Other configurations, which the chip supports, need fixing/testing.
378 *
379 */
380
381 for (index = 0; index < mci->nr_csrows; index++) {
382 csrow = &mci->csrows[index];
383
384 value = readb(mch_window + I82975X_DRB + index +
385 ((index >= 4) ? 0x80 : 0));
386 cumul_size = value;
387 cumul_size <<= (I82975X_DRB_SHIFT - PAGE_SHIFT);
388 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
389 cumul_size);
390 if (cumul_size == last_cumul_size)
391 continue; /* not populated */
392
393 csrow->first_page = last_cumul_size;
394 csrow->last_page = cumul_size - 1;
395 csrow->nr_pages = cumul_size - last_cumul_size;
396 last_cumul_size = cumul_size;
397 csrow->grain = 1 << 7; /* I82975X_EAP has 128B resolution */
398 csrow->mtype = MEM_DDR; /* i82975x supports only DDR2 */
399 csrow->dtype = i82975x_dram_type(mch_window, index);
400 csrow->edac_mode = EDAC_SECDED; /* only supported */
401 }
402}
403
404/* #define i82975x_DEBUG_IOMEM */
405
406#ifdef i82975x_DEBUG_IOMEM
407static void i82975x_print_dram_timings(void __iomem *mch_window)
408{
409 /*
410 * The register meanings are from Intel specs;
411 * (shows 13-5-5-5 for 800-DDR2)
412 * Asus P5W Bios reports 15-5-4-4
413 * What's your religion?
414 */
415 static const int caslats[4] = { 5, 4, 3, 6 };
416 u32 dtreg[2];
417
418 dtreg[0] = readl(mch_window + 0x114);
419 dtreg[1] = readl(mch_window + 0x194);
420 i82975x_printk(KERN_INFO, "DRAM Timings : Ch0 Ch1\n"
421 " RAS Active Min = %d %d\n"
422 " CAS latency = %d %d\n"
423 " RAS to CAS = %d %d\n"
424 " RAS precharge = %d %d\n",
425 (dtreg[0] >> 19 ) & 0x0f,
426 (dtreg[1] >> 19) & 0x0f,
427 caslats[(dtreg[0] >> 8) & 0x03],
428 caslats[(dtreg[1] >> 8) & 0x03],
429 ((dtreg[0] >> 4) & 0x07) + 2,
430 ((dtreg[1] >> 4) & 0x07) + 2,
431 (dtreg[0] & 0x07) + 2,
432 (dtreg[1] & 0x07) + 2
433 );
434
435}
436#endif
437
438static int i82975x_probe1(struct pci_dev *pdev, int dev_idx)
439{
440 int rc = -ENODEV;
441 struct mem_ctl_info *mci;
442 struct i82975x_pvt *pvt;
443 void __iomem *mch_window;
444 u32 mchbar;
445 u32 drc[2];
446 struct i82975x_error_info discard;
447 int chans;
448#ifdef i82975x_DEBUG_IOMEM
449 u8 c0drb[4];
450 u8 c1drb[4];
451#endif
452
453 debugf0("%s()\n", __func__);
454
455 pci_read_config_dword(pdev, I82975X_MCHBAR, &mchbar);
456 if (!(mchbar & 1)) {
457 debugf3("%s(): failed, MCHBAR disabled!\n", __func__);
458 goto fail0;
459 }
460 mchbar &= 0xffffc000; /* bits 31:14 used for 16K window */
461 mch_window = ioremap_nocache(mchbar, 0x1000);
462
463#ifdef i82975x_DEBUG_IOMEM
464 i82975x_printk(KERN_INFO, "MCHBAR real = %0x, remapped = %p\n",
465 mchbar, mch_window);
466
467 c0drb[0] = readb(mch_window + I82975X_DRB_CH0R0);
468 c0drb[1] = readb(mch_window + I82975X_DRB_CH0R1);
469 c0drb[2] = readb(mch_window + I82975X_DRB_CH0R2);
470 c0drb[3] = readb(mch_window + I82975X_DRB_CH0R3);
471 c1drb[0] = readb(mch_window + I82975X_DRB_CH1R0);
472 c1drb[1] = readb(mch_window + I82975X_DRB_CH1R1);
473 c1drb[2] = readb(mch_window + I82975X_DRB_CH1R2);
474 c1drb[3] = readb(mch_window + I82975X_DRB_CH1R3);
475 i82975x_printk(KERN_INFO, "DRBCH0R0 = 0x%02x\n", c0drb[0]);
476 i82975x_printk(KERN_INFO, "DRBCH0R1 = 0x%02x\n", c0drb[1]);
477 i82975x_printk(KERN_INFO, "DRBCH0R2 = 0x%02x\n", c0drb[2]);
478 i82975x_printk(KERN_INFO, "DRBCH0R3 = 0x%02x\n", c0drb[3]);
479 i82975x_printk(KERN_INFO, "DRBCH1R0 = 0x%02x\n", c1drb[0]);
480 i82975x_printk(KERN_INFO, "DRBCH1R1 = 0x%02x\n", c1drb[1]);
481 i82975x_printk(KERN_INFO, "DRBCH1R2 = 0x%02x\n", c1drb[2]);
482 i82975x_printk(KERN_INFO, "DRBCH1R3 = 0x%02x\n", c1drb[3]);
483#endif
484
485 drc[0] = readl(mch_window + I82975X_DRC_CH0M0);
486 drc[1] = readl(mch_window + I82975X_DRC_CH1M0);
487#ifdef i82975x_DEBUG_IOMEM
488 i82975x_printk(KERN_INFO, "DRC_CH0 = %0x, %s\n", drc[0],
489 ((drc[0] >> 21) & 3) == 1 ?
490 "ECC enabled" : "ECC disabled");
491 i82975x_printk(KERN_INFO, "DRC_CH1 = %0x, %s\n", drc[1],
492 ((drc[1] >> 21) & 3) == 1 ?
493 "ECC enabled" : "ECC disabled");
494
495 i82975x_printk(KERN_INFO, "C0 BNKARC = %0x\n",
496 readw(mch_window + I82975X_C0BNKARC));
497 i82975x_printk(KERN_INFO, "C1 BNKARC = %0x\n",
498 readw(mch_window + I82975X_C1BNKARC));
499 i82975x_print_dram_timings(mch_window);
500 goto fail1;
501#endif
502 if (!(((drc[0] >> 21) & 3) == 1 || ((drc[1] >> 21) & 3) == 1)) {
503 i82975x_printk(KERN_INFO, "ECC disabled on both channels.\n");
504 goto fail1;
505 }
506
507 chans = dual_channel_active(mch_window) + 1;
508
509 /* assuming only one controller, index thus is 0 */
510 mci = edac_mc_alloc(sizeof(*pvt), I82975X_NR_CSROWS(chans),
511 chans, 0);
512 if (!mci) {
513 rc = -ENOMEM;
514 goto fail1;
515 }
516
517 debugf3("%s(): init mci\n", __func__);
518 mci->dev = &pdev->dev;
519 mci->mtype_cap = MEM_FLAG_DDR;
520 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
521 mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
522 mci->mod_name = EDAC_MOD_STR;
523 mci->mod_ver = I82975X_REVISION;
524 mci->ctl_name = i82975x_devs[dev_idx].ctl_name;
525 mci->edac_check = i82975x_check;
526 mci->ctl_page_to_phys = NULL;
527 debugf3("%s(): init pvt\n", __func__);
528 pvt = (struct i82975x_pvt *) mci->pvt_info;
529 pvt->mch_window = mch_window;
530 i82975x_init_csrows(mci, pdev, mch_window);
531 i82975x_get_error_info(mci, &discard); /* clear counters */
532
533 /* finalize this instance of memory controller with edac core */
534 if (edac_mc_add_mc(mci)) {
535 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
536 goto fail2;
537 }
538
539 /* get this far and it's successful */
540 debugf3("%s(): success\n", __func__);
541 return 0;
542
543fail2:
544 edac_mc_free(mci);
545
546fail1:
547 iounmap(mch_window);
548fail0:
549 return rc;
550}
551
552/* returns count (>= 0), or negative on error */
553static int __devinit i82975x_init_one(struct pci_dev *pdev,
554 const struct pci_device_id *ent)
555{
556 int rc;
557
558 debugf0("%s()\n", __func__);
559
560 if (pci_enable_device(pdev) < 0)
561 return -EIO;
562
563 rc = i82975x_probe1(pdev, ent->driver_data);
564
565 if (mci_pdev == NULL)
566 mci_pdev = pci_dev_get(pdev);
567
568 return rc;
569}
570
571static void __devexit i82975x_remove_one(struct pci_dev *pdev)
572{
573 struct mem_ctl_info *mci;
574 struct i82975x_pvt *pvt;
575
576 debugf0("%s()\n", __func__);
577
578 mci = edac_mc_del_mc(&pdev->dev);
579 if (mci == NULL)
580 return;
581
582 pvt = mci->pvt_info;
583 if (pvt->mch_window)
584 iounmap( pvt->mch_window );
585
586 edac_mc_free(mci);
587}
588
589static const struct pci_device_id i82975x_pci_tbl[] __devinitdata = {
590 {
591 PCI_VEND_DEV(INTEL, 82975_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
592 I82975X
593 },
594 {
595 0,
596 } /* 0 terminated list. */
597};
598
599MODULE_DEVICE_TABLE(pci, i82975x_pci_tbl);
600
601static struct pci_driver i82975x_driver = {
602 .name = EDAC_MOD_STR,
603 .probe = i82975x_init_one,
604 .remove = __devexit_p(i82975x_remove_one),
605 .id_table = i82975x_pci_tbl,
606};
607
608static int __init i82975x_init(void)
609{
610 int pci_rc;
611
612 debugf3("%s()\n", __func__);
613
614 pci_rc = pci_register_driver(&i82975x_driver);
615 if (pci_rc < 0)
616 goto fail0;
617
618 if (mci_pdev == NULL) {
619 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
620 PCI_DEVICE_ID_INTEL_82975_0, NULL);
621
622 if (!mci_pdev) {
623 debugf0("i82975x pci_get_device fail\n");
624 pci_rc = -ENODEV;
625 goto fail1;
626 }
627
628 pci_rc = i82975x_init_one(mci_pdev, i82975x_pci_tbl);
629
630 if (pci_rc < 0) {
631 debugf0("i82975x init fail\n");
632 pci_rc = -ENODEV;
633 goto fail1;
634 }
635 }
636
637 return 0;
638
639fail1:
640 pci_unregister_driver(&i82975x_driver);
641
642fail0:
643 if (mci_pdev != NULL)
644 pci_dev_put(mci_pdev);
645
646 return pci_rc;
647}
648
649static void __exit i82975x_exit(void)
650{
651 debugf3("%s()\n", __func__);
652
653 pci_unregister_driver(&i82975x_driver);
654
655 if (!i82975x_registered) {
656 i82975x_remove_one(mci_pdev);
657 pci_dev_put(mci_pdev);
658 }
659}
660
661module_init(i82975x_init);
662module_exit(i82975x_exit);
663
664MODULE_LICENSE("GPL");
665MODULE_AUTHOR("Arvind R. <arvind@acarlab.com>");
666MODULE_DESCRIPTION("MC support for Intel 82975 memory hub controllers");
diff --git a/drivers/edac/pasemi_edac.c b/drivers/edac/pasemi_edac.c
new file mode 100644
index 0000000000..e66cdd42a3
--- /dev/null
+++ b/drivers/edac/pasemi_edac.c
@@ -0,0 +1,299 @@
1/*
2 * Copyright (C) 2006-2007 PA Semi, Inc
3 *
4 * Author: Egor Martovetsky <egor@pasemi.com>
5 * Maintained by: Olof Johansson <olof@lixom.net>
6 *
7 * Driver for the PWRficient onchip memory controllers
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/pci.h>
27#include <linux/pci_ids.h>
28#include <linux/slab.h>
29#include "edac_core.h"
30
31#define MODULE_NAME "pasemi_edac"
32
33#define MCCFG_MCEN 0x300
34#define MCCFG_MCEN_MMC_EN 0x00000001
35#define MCCFG_ERRCOR 0x388
36#define MCCFG_ERRCOR_RNK_FAIL_DET_EN 0x00000100
37#define MCCFG_ERRCOR_ECC_GEN_EN 0x00000010
38#define MCCFG_ERRCOR_ECC_CRR_EN 0x00000001
39#define MCCFG_SCRUB 0x384
40#define MCCFG_SCRUB_RGLR_SCRB_EN 0x00000001
41#define MCDEBUG_ERRCTL1 0x728
42#define MCDEBUG_ERRCTL1_RFL_LOG_EN 0x00080000
43#define MCDEBUG_ERRCTL1_MBE_LOG_EN 0x00040000
44#define MCDEBUG_ERRCTL1_SBE_LOG_EN 0x00020000
45#define MCDEBUG_ERRSTA 0x730
46#define MCDEBUG_ERRSTA_RFL_STATUS 0x00000004
47#define MCDEBUG_ERRSTA_MBE_STATUS 0x00000002
48#define MCDEBUG_ERRSTA_SBE_STATUS 0x00000001
49#define MCDEBUG_ERRCNT1 0x734
50#define MCDEBUG_ERRCNT1_SBE_CNT_OVRFLO 0x00000080
51#define MCDEBUG_ERRLOG1A 0x738
52#define MCDEBUG_ERRLOG1A_MERR_TYPE_M 0x30000000
53#define MCDEBUG_ERRLOG1A_MERR_TYPE_NONE 0x00000000
54#define MCDEBUG_ERRLOG1A_MERR_TYPE_SBE 0x10000000
55#define MCDEBUG_ERRLOG1A_MERR_TYPE_MBE 0x20000000
56#define MCDEBUG_ERRLOG1A_MERR_TYPE_RFL 0x30000000
57#define MCDEBUG_ERRLOG1A_MERR_BA_M 0x00700000
58#define MCDEBUG_ERRLOG1A_MERR_BA_S 20
59#define MCDEBUG_ERRLOG1A_MERR_CS_M 0x00070000
60#define MCDEBUG_ERRLOG1A_MERR_CS_S 16
61#define MCDEBUG_ERRLOG1A_SYNDROME_M 0x0000ffff
62#define MCDRAM_RANKCFG 0x114
63#define MCDRAM_RANKCFG_EN 0x00000001
64#define MCDRAM_RANKCFG_TYPE_SIZE_M 0x000001c0
65#define MCDRAM_RANKCFG_TYPE_SIZE_S 6
66
67#define PASEMI_EDAC_NR_CSROWS 8
68#define PASEMI_EDAC_NR_CHANS 1
69#define PASEMI_EDAC_ERROR_GRAIN 64
70
71static int last_page_in_mmc;
72static int system_mmc_id;
73
74
75static u32 pasemi_edac_get_error_info(struct mem_ctl_info *mci)
76{
77 struct pci_dev *pdev = to_pci_dev(mci->dev);
78 u32 tmp;
79
80 pci_read_config_dword(pdev, MCDEBUG_ERRSTA,
81 &tmp);
82
83 tmp &= (MCDEBUG_ERRSTA_RFL_STATUS | MCDEBUG_ERRSTA_MBE_STATUS
84 | MCDEBUG_ERRSTA_SBE_STATUS);
85
86 if (tmp) {
87 if (tmp & MCDEBUG_ERRSTA_SBE_STATUS)
88 pci_write_config_dword(pdev, MCDEBUG_ERRCNT1,
89 MCDEBUG_ERRCNT1_SBE_CNT_OVRFLO);
90 pci_write_config_dword(pdev, MCDEBUG_ERRSTA, tmp);
91 }
92
93 return tmp;
94}
95
96static void pasemi_edac_process_error_info(struct mem_ctl_info *mci, u32 errsta)
97{
98 struct pci_dev *pdev = to_pci_dev(mci->dev);
99 u32 errlog1a;
100 u32 cs;
101
102 if (!errsta)
103 return;
104
105 pci_read_config_dword(pdev, MCDEBUG_ERRLOG1A, &errlog1a);
106
107 cs = (errlog1a & MCDEBUG_ERRLOG1A_MERR_CS_M) >>
108 MCDEBUG_ERRLOG1A_MERR_CS_S;
109
110 /* uncorrectable/multi-bit errors */
111 if (errsta & (MCDEBUG_ERRSTA_MBE_STATUS |
112 MCDEBUG_ERRSTA_RFL_STATUS)) {
113 edac_mc_handle_ue(mci, mci->csrows[cs].first_page, 0,
114 cs, mci->ctl_name);
115 }
116
117 /* correctable/single-bit errors */
118 if (errsta & MCDEBUG_ERRSTA_SBE_STATUS) {
119 edac_mc_handle_ce(mci, mci->csrows[cs].first_page, 0,
120 0, cs, 0, mci->ctl_name);
121 }
122}
123
124static void pasemi_edac_check(struct mem_ctl_info *mci)
125{
126 u32 errsta;
127
128 errsta = pasemi_edac_get_error_info(mci);
129 if (errsta)
130 pasemi_edac_process_error_info(mci, errsta);
131}
132
133static int pasemi_edac_init_csrows(struct mem_ctl_info *mci,
134 struct pci_dev *pdev,
135 enum edac_type edac_mode)
136{
137 struct csrow_info *csrow;
138 u32 rankcfg;
139 int index;
140
141 for (index = 0; index < mci->nr_csrows; index++) {
142 csrow = &mci->csrows[index];
143
144 pci_read_config_dword(pdev,
145 MCDRAM_RANKCFG + (index * 12),
146 &rankcfg);
147
148 if (!(rankcfg & MCDRAM_RANKCFG_EN))
149 continue;
150
151 switch ((rankcfg & MCDRAM_RANKCFG_TYPE_SIZE_M) >>
152 MCDRAM_RANKCFG_TYPE_SIZE_S) {
153 case 0:
154 csrow->nr_pages = 128 << (20 - PAGE_SHIFT);
155 break;
156 case 1:
157 csrow->nr_pages = 256 << (20 - PAGE_SHIFT);
158 break;
159 case 2:
160 case 3:
161 csrow->nr_pages = 512 << (20 - PAGE_SHIFT);
162 break;
163 case 4:
164 csrow->nr_pages = 1024 << (20 - PAGE_SHIFT);
165 break;
166 case 5:
167 csrow->nr_pages = 2048 << (20 - PAGE_SHIFT);
168 break;
169 default:
170 edac_mc_printk(mci, KERN_ERR,
171 "Unrecognized Rank Config. rankcfg=%u\n",
172 rankcfg);
173 return -EINVAL;
174 }
175
176 csrow->first_page = last_page_in_mmc;
177 csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
178 last_page_in_mmc += csrow->nr_pages;
179 csrow->page_mask = 0;
180 csrow->grain = PASEMI_EDAC_ERROR_GRAIN;
181 csrow->mtype = MEM_DDR;
182 csrow->dtype = DEV_UNKNOWN;
183 csrow->edac_mode = edac_mode;
184 }
185 return 0;
186}
187
188static int __devinit pasemi_edac_probe(struct pci_dev *pdev,
189 const struct pci_device_id *ent)
190{
191 struct mem_ctl_info *mci = NULL;
192 u32 errctl1, errcor, scrub, mcen;
193
194 pci_read_config_dword(pdev, MCCFG_MCEN, &mcen);
195 if (!(mcen & MCCFG_MCEN_MMC_EN))
196 return -ENODEV;
197
198 /*
199 * We should think about enabling other error detection later on
200 */
201
202 pci_read_config_dword(pdev, MCDEBUG_ERRCTL1, &errctl1);
203 errctl1 |= MCDEBUG_ERRCTL1_SBE_LOG_EN |
204 MCDEBUG_ERRCTL1_MBE_LOG_EN |
205 MCDEBUG_ERRCTL1_RFL_LOG_EN;
206 pci_write_config_dword(pdev, MCDEBUG_ERRCTL1, errctl1);
207
208 mci = edac_mc_alloc(0, PASEMI_EDAC_NR_CSROWS, PASEMI_EDAC_NR_CHANS,
209 system_mmc_id++);
210
211 if (mci == NULL)
212 return -ENOMEM;
213
214 pci_read_config_dword(pdev, MCCFG_ERRCOR, &errcor);
215 errcor |= MCCFG_ERRCOR_RNK_FAIL_DET_EN |
216 MCCFG_ERRCOR_ECC_GEN_EN |
217 MCCFG_ERRCOR_ECC_CRR_EN;
218
219 mci->dev = &pdev->dev;
220 mci->mtype_cap = MEM_FLAG_DDR | MEM_FLAG_RDDR;
221 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
222 mci->edac_cap = (errcor & MCCFG_ERRCOR_ECC_GEN_EN) ?
223 ((errcor & MCCFG_ERRCOR_ECC_CRR_EN) ?
224 (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_EC) :
225 EDAC_FLAG_NONE;
226 mci->mod_name = MODULE_NAME;
227 mci->dev_name = pci_name(pdev);
228 mci->ctl_name = "pasemi,1682m-mc";
229 mci->edac_check = pasemi_edac_check;
230 mci->ctl_page_to_phys = NULL;
231 pci_read_config_dword(pdev, MCCFG_SCRUB, &scrub);
232 mci->scrub_cap = SCRUB_FLAG_HW_PROG | SCRUB_FLAG_HW_SRC;
233 mci->scrub_mode =
234 ((errcor & MCCFG_ERRCOR_ECC_CRR_EN) ? SCRUB_FLAG_HW_SRC : 0) |
235 ((scrub & MCCFG_SCRUB_RGLR_SCRB_EN) ? SCRUB_FLAG_HW_PROG : 0);
236
237 if (pasemi_edac_init_csrows(mci, pdev,
238 (mci->edac_cap & EDAC_FLAG_SECDED) ?
239 EDAC_SECDED :
240 ((mci->edac_cap & EDAC_FLAG_EC) ?
241 EDAC_EC : EDAC_NONE)))
242 goto fail;
243
244 /*
245 * Clear status
246 */
247 pasemi_edac_get_error_info(mci);
248
249 if (edac_mc_add_mc(mci))
250 goto fail;
251
252 /* get this far and it's successful */
253 return 0;
254
255fail:
256 edac_mc_free(mci);
257 return -ENODEV;
258}
259
260static void __devexit pasemi_edac_remove(struct pci_dev *pdev)
261{
262 struct mem_ctl_info *mci = edac_mc_del_mc(&pdev->dev);
263
264 if (!mci)
265 return;
266
267 edac_mc_free(mci);
268}
269
270
271static const struct pci_device_id pasemi_edac_pci_tbl[] = {
272 { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa00a) },
273};
274
275MODULE_DEVICE_TABLE(pci, pasemi_edac_pci_tbl);
276
277static struct pci_driver pasemi_edac_driver = {
278 .name = MODULE_NAME,
279 .probe = pasemi_edac_probe,
280 .remove = __devexit_p(pasemi_edac_remove),
281 .id_table = pasemi_edac_pci_tbl,
282};
283
284static int __init pasemi_edac_init(void)
285{
286 return pci_register_driver(&pasemi_edac_driver);
287}
288
289static void __exit pasemi_edac_exit(void)
290{
291 pci_unregister_driver(&pasemi_edac_driver);
292}
293
294module_init(pasemi_edac_init);
295module_exit(pasemi_edac_exit);
296
297MODULE_LICENSE("GPL");
298MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
299MODULE_DESCRIPTION("MC support for PA Semi PA6T-1682M memory controller");
diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c
index a49cf0a393..e25f712f2d 100644
--- a/drivers/edac/r82600_edac.c
+++ b/drivers/edac/r82600_edac.c
@@ -11,7 +11,7 @@
11 * 11 *
12 * Written with reference to 82600 High Integration Dual PCI System 12 * Written with reference to 82600 High Integration Dual PCI System
13 * Controller Data Book: 13 * Controller Data Book:
14 * http://www.radisys.com/files/support_downloads/007-01277-0002.82600DataBook.pdf 14 * www.radisys.com/files/support_downloads/007-01277-0002.82600DataBook.pdf
15 * references to this document given in [] 15 * references to this document given in []
16 */ 16 */
17 17
@@ -20,9 +20,9 @@
20#include <linux/pci.h> 20#include <linux/pci.h>
21#include <linux/pci_ids.h> 21#include <linux/pci_ids.h>
22#include <linux/slab.h> 22#include <linux/slab.h>
23#include "edac_mc.h" 23#include "edac_core.h"
24 24
25#define R82600_REVISION " Ver: 2.0.1 " __DATE__ 25#define R82600_REVISION " Ver: 2.0.2 " __DATE__
26#define EDAC_MOD_STR "r82600_edac" 26#define EDAC_MOD_STR "r82600_edac"
27 27
28#define r82600_printk(level, fmt, arg...) \ 28#define r82600_printk(level, fmt, arg...) \
@@ -131,10 +131,12 @@ struct r82600_error_info {
131 u32 eapr; 131 u32 eapr;
132}; 132};
133 133
134static unsigned int disable_hardware_scrub = 0; 134static unsigned int disable_hardware_scrub;
135 135
136static void r82600_get_error_info (struct mem_ctl_info *mci, 136static struct edac_pci_ctl_info *r82600_pci;
137 struct r82600_error_info *info) 137
138static void r82600_get_error_info(struct mem_ctl_info *mci,
139 struct r82600_error_info *info)
138{ 140{
139 struct pci_dev *pdev; 141 struct pci_dev *pdev;
140 142
@@ -144,18 +146,19 @@ static void r82600_get_error_info (struct mem_ctl_info *mci,
144 if (info->eapr & BIT(0)) 146 if (info->eapr & BIT(0))
145 /* Clear error to allow next error to be reported [p.62] */ 147 /* Clear error to allow next error to be reported [p.62] */
146 pci_write_bits32(pdev, R82600_EAP, 148 pci_write_bits32(pdev, R82600_EAP,
147 ((u32) BIT(0) & (u32) BIT(1)), 149 ((u32) BIT(0) & (u32) BIT(1)),
148 ((u32) BIT(0) & (u32) BIT(1))); 150 ((u32) BIT(0) & (u32) BIT(1)));
149 151
150 if (info->eapr & BIT(1)) 152 if (info->eapr & BIT(1))
151 /* Clear error to allow next error to be reported [p.62] */ 153 /* Clear error to allow next error to be reported [p.62] */
152 pci_write_bits32(pdev, R82600_EAP, 154 pci_write_bits32(pdev, R82600_EAP,
153 ((u32) BIT(0) & (u32) BIT(1)), 155 ((u32) BIT(0) & (u32) BIT(1)),
154 ((u32) BIT(0) & (u32) BIT(1))); 156 ((u32) BIT(0) & (u32) BIT(1)));
155} 157}
156 158
157static int r82600_process_error_info (struct mem_ctl_info *mci, 159static int r82600_process_error_info(struct mem_ctl_info *mci,
158 struct r82600_error_info *info, int handle_errors) 160 struct r82600_error_info *info,
161 int handle_errors)
159{ 162{
160 int error_found; 163 int error_found;
161 u32 eapaddr, page; 164 u32 eapaddr, page;
@@ -172,25 +175,24 @@ static int r82600_process_error_info (struct mem_ctl_info *mci,
172 * granularity (upper 19 bits only) */ 175 * granularity (upper 19 bits only) */
173 page = eapaddr >> PAGE_SHIFT; 176 page = eapaddr >> PAGE_SHIFT;
174 177
175 if (info->eapr & BIT(0)) { /* CE? */ 178 if (info->eapr & BIT(0)) { /* CE? */
176 error_found = 1; 179 error_found = 1;
177 180
178 if (handle_errors) 181 if (handle_errors)
179 edac_mc_handle_ce(mci, page, 0, /* not avail */ 182 edac_mc_handle_ce(mci, page, 0, /* not avail */
180 syndrome, 183 syndrome,
181 edac_mc_find_csrow_by_page(mci, page), 184 edac_mc_find_csrow_by_page(mci, page),
182 0, /* channel */ 185 0, mci->ctl_name);
183 mci->ctl_name);
184 } 186 }
185 187
186 if (info->eapr & BIT(1)) { /* UE? */ 188 if (info->eapr & BIT(1)) { /* UE? */
187 error_found = 1; 189 error_found = 1;
188 190
189 if (handle_errors) 191 if (handle_errors)
190 /* 82600 doesn't give enough info */ 192 /* 82600 doesn't give enough info */
191 edac_mc_handle_ue(mci, page, 0, 193 edac_mc_handle_ue(mci, page, 0,
192 edac_mc_find_csrow_by_page(mci, page), 194 edac_mc_find_csrow_by_page(mci, page),
193 mci->ctl_name); 195 mci->ctl_name);
194 } 196 }
195 197
196 return error_found; 198 return error_found;
@@ -211,11 +213,11 @@ static inline int ecc_enabled(u8 dramcr)
211} 213}
212 214
213static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev, 215static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
214 u8 dramcr) 216 u8 dramcr)
215{ 217{
216 struct csrow_info *csrow; 218 struct csrow_info *csrow;
217 int index; 219 int index;
218 u8 drbar; /* SDRAM Row Boundry Address Register */ 220 u8 drbar; /* SDRAM Row Boundry Address Register */
219 u32 row_high_limit, row_high_limit_last; 221 u32 row_high_limit, row_high_limit_last;
220 u32 reg_sdram, ecc_on, row_base; 222 u32 reg_sdram, ecc_on, row_base;
221 223
@@ -276,7 +278,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
276 debugf2("%s(): sdram refresh rate = %#0x\n", __func__, 278 debugf2("%s(): sdram refresh rate = %#0x\n", __func__,
277 sdram_refresh_rate); 279 sdram_refresh_rate);
278 debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr); 280 debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
279 mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS); 281 mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS, 0);
280 282
281 if (mci == NULL) 283 if (mci == NULL)
282 return -ENOMEM; 284 return -ENOMEM;
@@ -305,15 +307,16 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
305 mci->mod_name = EDAC_MOD_STR; 307 mci->mod_name = EDAC_MOD_STR;
306 mci->mod_ver = R82600_REVISION; 308 mci->mod_ver = R82600_REVISION;
307 mci->ctl_name = "R82600"; 309 mci->ctl_name = "R82600";
310 mci->dev_name = pci_name(pdev);
308 mci->edac_check = r82600_check; 311 mci->edac_check = r82600_check;
309 mci->ctl_page_to_phys = NULL; 312 mci->ctl_page_to_phys = NULL;
310 r82600_init_csrows(mci, pdev, dramcr); 313 r82600_init_csrows(mci, pdev, dramcr);
311 r82600_get_error_info(mci, &discard); /* clear counters */ 314 r82600_get_error_info(mci, &discard); /* clear counters */
312 315
313 /* Here we assume that we will never see multiple instances of this 316 /* Here we assume that we will never see multiple instances of this
314 * type of memory controller. The ID is therefore hardcoded to 0. 317 * type of memory controller. The ID is therefore hardcoded to 0.
315 */ 318 */
316 if (edac_mc_add_mc(mci,0)) { 319 if (edac_mc_add_mc(mci)) {
317 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 320 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
318 goto fail; 321 goto fail;
319 } 322 }
@@ -326,6 +329,17 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
326 pci_write_bits32(pdev, R82600_EAP, BIT(31), BIT(31)); 329 pci_write_bits32(pdev, R82600_EAP, BIT(31), BIT(31));
327 } 330 }
328 331
332 /* allocating generic PCI control info */
333 r82600_pci = edac_pci_create_generic_ctl(&pdev->dev, EDAC_MOD_STR);
334 if (!r82600_pci) {
335 printk(KERN_WARNING
336 "%s(): Unable to create PCI control\n",
337 __func__);
338 printk(KERN_WARNING
339 "%s(): PCI error report via EDAC not setup\n",
340 __func__);
341 }
342
329 debugf3("%s(): success\n", __func__); 343 debugf3("%s(): success\n", __func__);
330 return 0; 344 return 0;
331 345
@@ -336,7 +350,7 @@ fail:
336 350
337/* returns count (>= 0), or negative on error */ 351/* returns count (>= 0), or negative on error */
338static int __devinit r82600_init_one(struct pci_dev *pdev, 352static int __devinit r82600_init_one(struct pci_dev *pdev,
339 const struct pci_device_id *ent) 353 const struct pci_device_id *ent)
340{ 354{
341 debugf0("%s()\n", __func__); 355 debugf0("%s()\n", __func__);
342 356
@@ -350,6 +364,9 @@ static void __devexit r82600_remove_one(struct pci_dev *pdev)
350 364
351 debugf0("%s()\n", __func__); 365 debugf0("%s()\n", __func__);
352 366
367 if (r82600_pci)
368 edac_pci_release_generic_ctl(r82600_pci);
369
353 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL) 370 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
354 return; 371 return;
355 372
@@ -358,11 +375,11 @@ static void __devexit r82600_remove_one(struct pci_dev *pdev)
358 375
359static const struct pci_device_id r82600_pci_tbl[] __devinitdata = { 376static const struct pci_device_id r82600_pci_tbl[] __devinitdata = {
360 { 377 {
361 PCI_DEVICE(PCI_VENDOR_ID_RADISYS, R82600_BRIDGE_ID) 378 PCI_DEVICE(PCI_VENDOR_ID_RADISYS, R82600_BRIDGE_ID)
362 }, 379 },
363 { 380 {
364 0, 381 0,
365 } /* 0 terminated list. */ 382 } /* 0 terminated list. */
366}; 383};
367 384
368MODULE_DEVICE_TABLE(pci, r82600_pci_tbl); 385MODULE_DEVICE_TABLE(pci, r82600_pci_tbl);
@@ -389,7 +406,7 @@ module_exit(r82600_exit);
389 406
390MODULE_LICENSE("GPL"); 407MODULE_LICENSE("GPL");
391MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD Ltd. " 408MODULE_AUTHOR("Tim Small <tim@buttersideup.com> - WPAD Ltd. "
392 "on behalf of EADS Astrium"); 409 "on behalf of EADS Astrium");
393MODULE_DESCRIPTION("MC support for Radisys 82600 memory controllers"); 410MODULE_DESCRIPTION("MC support for Radisys 82600 memory controllers");
394 411
395module_param(disable_hardware_scrub, bool, 0644); 412module_param(disable_hardware_scrub, bool, 0644);
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 13eea47dce..dbdca6f10e 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -29,17 +29,34 @@ config HWMON_VID
29 default n 29 default n
30 30
31config SENSORS_ABITUGURU 31config SENSORS_ABITUGURU
32 tristate "Abit uGuru" 32 tristate "Abit uGuru (rev 1 & 2)"
33 depends on EXPERIMENTAL 33 depends on EXPERIMENTAL
34 help 34 help
35 If you say yes here you get support for the Abit uGuru chips 35 If you say yes here you get support for the sensor part of the first
36 sensor part. The voltage and frequency control parts of the Abit 36 and second revision of the Abit uGuru chip. The voltage and frequency
37 uGuru are not supported. The Abit uGuru chip can be found on Abit 37 control parts of the Abit uGuru are not supported. The Abit uGuru
38 uGuru featuring motherboards (most modern Abit motherboards). 38 chip can be found on Abit uGuru featuring motherboards (most modern
39 Abit motherboards from before end 2005). For more info and a list
40 of which motherboards have which revision see
41 Documentation/hwmon/abituguru
39 42
40 This driver can also be built as a module. If so, the module 43 This driver can also be built as a module. If so, the module
41 will be called abituguru. 44 will be called abituguru.
42 45
46config SENSORS_ABITUGURU3
47 tristate "Abit uGuru (rev 3)"
48 depends on HWMON && EXPERIMENTAL
49 help
50 If you say yes here you get support for the sensor part of the
51 third revision of the Abit uGuru chip. Only reading the sensors
52 and their settings is supported. The third revision of the Abit
53 uGuru chip can be found on recent Abit motherboards (since end
54 2005). For more info and a list of which motherboards have which
55 revision see Documentation/hwmon/abituguru3
56
57 This driver can also be built as a module. If so, the module
58 will be called abituguru3.
59
43config SENSORS_AD7418 60config SENSORS_AD7418
44 tristate "Analog Devices AD7416, AD7417 and AD7418" 61 tristate "Analog Devices AD7416, AD7417 and AD7418"
45 depends on I2C && EXPERIMENTAL 62 depends on I2C && EXPERIMENTAL
@@ -250,12 +267,10 @@ config SENSORS_CORETEMP
250 267
251config SENSORS_IT87 268config SENSORS_IT87
252 tristate "ITE IT87xx and compatibles" 269 tristate "ITE IT87xx and compatibles"
253 depends on I2C
254 select I2C_ISA
255 select HWMON_VID 270 select HWMON_VID
256 help 271 help
257 If you say yes here you get support for ITE IT8705F, IT8712F, 272 If you say yes here you get support for ITE IT8705F, IT8712F,
258 IT8716F and IT8718F sensor chips, and the SiS960 clone. 273 IT8716F, IT8718F and IT8726F sensor chips, and the SiS960 clone.
259 274
260 This driver can also be built as a module. If so, the module 275 This driver can also be built as a module. If so, the module
261 will be called it87. 276 will be called it87.
@@ -365,8 +380,8 @@ config SENSORS_LM90
365 depends on I2C 380 depends on I2C
366 help 381 help
367 If you say yes here you get support for National Semiconductor LM90, 382 If you say yes here you get support for National Semiconductor LM90,
368 LM86, LM89 and LM99, Analog Devices ADM1032 and Maxim MAX6657 and 383 LM86, LM89 and LM99, Analog Devices ADM1032 and Maxim MAX6657,
369 MAX6658 sensor chips. 384 MAX6658, MAX6659, MAX6680 and MAX6681 sensor chips.
370 385
371 The Analog Devices ADT7461 sensor chip is also supported, but only 386 The Analog Devices ADT7461 sensor chip is also supported, but only
372 if found in ADM1032 compatibility mode. 387 if found in ADM1032 compatibility mode.
@@ -384,6 +399,17 @@ config SENSORS_LM92
384 This driver can also be built as a module. If so, the module 399 This driver can also be built as a module. If so, the module
385 will be called lm92. 400 will be called lm92.
386 401
402config SENSORS_LM93
403 tristate "National Semiconductor LM93 and compatibles"
404 depends on HWMON && I2C
405 select HWMON_VID
406 help
407 If you say yes here you get support for National Semiconductor LM93
408 sensor chips.
409
410 This driver can also be built as a module. If so, the module
411 will be called lm93.
412
387config SENSORS_MAX1619 413config SENSORS_MAX1619
388 tristate "Maxim MAX1619 sensor chip" 414 tristate "Maxim MAX1619 sensor chip"
389 depends on I2C 415 depends on I2C
@@ -405,8 +431,6 @@ config SENSORS_MAX6650
405 431
406config SENSORS_PC87360 432config SENSORS_PC87360
407 tristate "National Semiconductor PC87360 family" 433 tristate "National Semiconductor PC87360 family"
408 depends on I2C && EXPERIMENTAL
409 select I2C_ISA
410 select HWMON_VID 434 select HWMON_VID
411 help 435 help
412 If you say yes here you get access to the hardware monitoring 436 If you say yes here you get access to the hardware monitoring
@@ -433,8 +457,7 @@ config SENSORS_PC87427
433 457
434config SENSORS_SIS5595 458config SENSORS_SIS5595
435 tristate "Silicon Integrated Systems Corp. SiS5595" 459 tristate "Silicon Integrated Systems Corp. SiS5595"
436 depends on I2C && PCI && EXPERIMENTAL 460 depends on PCI
437 select I2C_ISA
438 help 461 help
439 If you say yes here you get support for the integrated sensors in 462 If you say yes here you get support for the integrated sensors in
440 SiS5595 South Bridges. 463 SiS5595 South Bridges.
@@ -442,6 +465,18 @@ config SENSORS_SIS5595
442 This driver can also be built as a module. If so, the module 465 This driver can also be built as a module. If so, the module
443 will be called sis5595. 466 will be called sis5595.
444 467
468config SENSORS_DME1737
469 tristate "SMSC DME1737 and compatibles"
470 depends on I2C && EXPERIMENTAL
471 select HWMON_VID
472 help
473 If you say yes here you get support for the hardware monitoring
474 and fan control features of the SMSC DME1737 (and compatibles
475 like the Asus A8000) Super-I/O chip.
476
477 This driver can also be built as a module. If so, the module
478 will be called dme1737.
479
445config SENSORS_SMSC47M1 480config SENSORS_SMSC47M1
446 tristate "SMSC LPC47M10x and compatibles" 481 tristate "SMSC LPC47M10x and compatibles"
447 help 482 help
@@ -487,8 +522,7 @@ config SENSORS_SMSC47B397
487 522
488config SENSORS_VIA686A 523config SENSORS_VIA686A
489 tristate "VIA686A" 524 tristate "VIA686A"
490 depends on I2C && PCI 525 depends on PCI
491 select I2C_ISA
492 help 526 help
493 If you say yes here you get support for the integrated sensors in 527 If you say yes here you get support for the integrated sensors in
494 Via 686A/B South Bridges. 528 Via 686A/B South Bridges.
@@ -509,9 +543,8 @@ config SENSORS_VT1211
509 543
510config SENSORS_VT8231 544config SENSORS_VT8231
511 tristate "VIA VT8231" 545 tristate "VIA VT8231"
512 depends on I2C && PCI && EXPERIMENTAL 546 depends on PCI
513 select HWMON_VID 547 select HWMON_VID
514 select I2C_ISA
515 help 548 help
516 If you say yes here then you get support for the integrated sensors 549 If you say yes here then you get support for the integrated sensors
517 in the VIA VT8231 device. 550 in the VIA VT8231 device.
@@ -584,17 +617,16 @@ config SENSORS_W83627HF
584 will be called w83627hf. 617 will be called w83627hf.
585 618
586config SENSORS_W83627EHF 619config SENSORS_W83627EHF
587 tristate "Winbond W83627EHF" 620 tristate "Winbond W83627EHF/DHG"
588 depends on I2C && EXPERIMENTAL 621 select HWMON_VID
589 select I2C_ISA
590 help 622 help
591 If you say yes here you get preliminary support for the hardware 623 If you say yes here you get support for the hardware
592 monitoring functionality of the Winbond W83627EHF Super-I/O chip. 624 monitoring functionality of the Winbond W83627EHF Super-I/O chip.
593 Only fan and temperature inputs are supported at the moment, while
594 the chip does much more than that.
595 625
596 This driver also supports the W83627EHG, which is the lead-free 626 This driver also supports the W83627EHG, which is the lead-free
597 version of the W83627EHF. 627 version of the W83627EHF, and the W83627DHG, which is a similar
628 chip suited for specific Intel processors that use PECI such as
629 the Core 2 Duo.
598 630
599 This driver can also be built as a module. If so, the module 631 This driver can also be built as a module. If so, the module
600 will be called w83627ehf. 632 will be called w83627ehf.
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index cfaf338919..59f81fae40 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_SENSORS_W83781D) += w83781d.o
14obj-$(CONFIG_SENSORS_W83791D) += w83791d.o 14obj-$(CONFIG_SENSORS_W83791D) += w83791d.o
15 15
16obj-$(CONFIG_SENSORS_ABITUGURU) += abituguru.o 16obj-$(CONFIG_SENSORS_ABITUGURU) += abituguru.o
17obj-$(CONFIG_SENSORS_ABITUGURU3)+= abituguru3.o
17obj-$(CONFIG_SENSORS_AD7418) += ad7418.o 18obj-$(CONFIG_SENSORS_AD7418) += ad7418.o
18obj-$(CONFIG_SENSORS_ADM1021) += adm1021.o 19obj-$(CONFIG_SENSORS_ADM1021) += adm1021.o
19obj-$(CONFIG_SENSORS_ADM1025) += adm1025.o 20obj-$(CONFIG_SENSORS_ADM1025) += adm1025.o
@@ -25,6 +26,7 @@ obj-$(CONFIG_SENSORS_APPLESMC) += applesmc.o
25obj-$(CONFIG_SENSORS_AMS) += ams/ 26obj-$(CONFIG_SENSORS_AMS) += ams/
26obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o 27obj-$(CONFIG_SENSORS_ATXP1) += atxp1.o
27obj-$(CONFIG_SENSORS_CORETEMP) += coretemp.o 28obj-$(CONFIG_SENSORS_CORETEMP) += coretemp.o
29obj-$(CONFIG_SENSORS_DME1737) += dme1737.o
28obj-$(CONFIG_SENSORS_DS1621) += ds1621.o 30obj-$(CONFIG_SENSORS_DS1621) += ds1621.o
29obj-$(CONFIG_SENSORS_F71805F) += f71805f.o 31obj-$(CONFIG_SENSORS_F71805F) += f71805f.o
30obj-$(CONFIG_SENSORS_FSCHER) += fscher.o 32obj-$(CONFIG_SENSORS_FSCHER) += fscher.o
@@ -45,6 +47,7 @@ obj-$(CONFIG_SENSORS_LM85) += lm85.o
45obj-$(CONFIG_SENSORS_LM87) += lm87.o 47obj-$(CONFIG_SENSORS_LM87) += lm87.o
46obj-$(CONFIG_SENSORS_LM90) += lm90.o 48obj-$(CONFIG_SENSORS_LM90) += lm90.o
47obj-$(CONFIG_SENSORS_LM92) += lm92.o 49obj-$(CONFIG_SENSORS_LM92) += lm92.o
50obj-$(CONFIG_SENSORS_LM93) += lm93.o
48obj-$(CONFIG_SENSORS_MAX1619) += max1619.o 51obj-$(CONFIG_SENSORS_MAX1619) += max1619.o
49obj-$(CONFIG_SENSORS_MAX6650) += max6650.o 52obj-$(CONFIG_SENSORS_MAX6650) += max6650.o
50obj-$(CONFIG_SENSORS_PC87360) += pc87360.o 53obj-$(CONFIG_SENSORS_PC87360) += pc87360.o
diff --git a/drivers/hwmon/abituguru.c b/drivers/hwmon/abituguru.c
index bede4d990e..d575ee958d 100644
--- a/drivers/hwmon/abituguru.c
+++ b/drivers/hwmon/abituguru.c
@@ -16,9 +16,9 @@
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17*/ 17*/
18/* 18/*
19 This driver supports the sensor part of the custom Abit uGuru chip found 19 This driver supports the sensor part of the first and second revision of
20 on Abit uGuru motherboards. Note: because of lack of specs the CPU / RAM / 20 the custom Abit uGuru chip found on Abit uGuru motherboards. Note: because
21 etc voltage & frequency control is not supported! 21 of lack of specs the CPU/RAM voltage & frequency control is not supported!
22*/ 22*/
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/sched.h> 24#include <linux/sched.h>
@@ -31,6 +31,7 @@
31#include <linux/platform_device.h> 31#include <linux/platform_device.h>
32#include <linux/hwmon.h> 32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h> 33#include <linux/hwmon-sysfs.h>
34#include <linux/dmi.h>
34#include <asm/io.h> 35#include <asm/io.h>
35 36
36/* Banks */ 37/* Banks */
@@ -418,7 +419,7 @@ static int __devinit
418abituguru_detect_bank1_sensor_type(struct abituguru_data *data, 419abituguru_detect_bank1_sensor_type(struct abituguru_data *data,
419 u8 sensor_addr) 420 u8 sensor_addr)
420{ 421{
421 u8 val, buf[3]; 422 u8 val, test_flag, buf[3];
422 int i, ret = -ENODEV; /* error is the most common used retval :| */ 423 int i, ret = -ENODEV; /* error is the most common used retval :| */
423 424
424 /* If overriden by the user return the user selected type */ 425 /* If overriden by the user return the user selected type */
@@ -436,7 +437,7 @@ abituguru_detect_bank1_sensor_type(struct abituguru_data *data,
436 return -ENODEV; 437 return -ENODEV;
437 438
438 /* Test val is sane / usable for sensor type detection. */ 439 /* Test val is sane / usable for sensor type detection. */
439 if ((val < 10u) || (val > 240u)) { 440 if ((val < 10u) || (val > 250u)) {
440 printk(KERN_WARNING ABIT_UGURU_NAME 441 printk(KERN_WARNING ABIT_UGURU_NAME
441 ": bank1-sensor: %d reading (%d) too close to limits, " 442 ": bank1-sensor: %d reading (%d) too close to limits, "
442 "unable to determine sensor type, skipping sensor\n", 443 "unable to determine sensor type, skipping sensor\n",
@@ -449,10 +450,20 @@ abituguru_detect_bank1_sensor_type(struct abituguru_data *data,
449 450
450 ABIT_UGURU_DEBUG(2, "testing bank1 sensor %d\n", (int)sensor_addr); 451 ABIT_UGURU_DEBUG(2, "testing bank1 sensor %d\n", (int)sensor_addr);
451 /* Volt sensor test, enable volt low alarm, set min value ridicously 452 /* Volt sensor test, enable volt low alarm, set min value ridicously
452 high. If its a volt sensor this should always give us an alarm. */ 453 high, or vica versa if the reading is very high. If its a volt
453 buf[0] = ABIT_UGURU_VOLT_LOW_ALARM_ENABLE; 454 sensor this should always give us an alarm. */
454 buf[1] = 245; 455 if (val <= 240u) {
455 buf[2] = 250; 456 buf[0] = ABIT_UGURU_VOLT_LOW_ALARM_ENABLE;
457 buf[1] = 245;
458 buf[2] = 250;
459 test_flag = ABIT_UGURU_VOLT_LOW_ALARM_FLAG;
460 } else {
461 buf[0] = ABIT_UGURU_VOLT_HIGH_ALARM_ENABLE;
462 buf[1] = 5;
463 buf[2] = 10;
464 test_flag = ABIT_UGURU_VOLT_HIGH_ALARM_FLAG;
465 }
466
456 if (abituguru_write(data, ABIT_UGURU_SENSOR_BANK1 + 2, sensor_addr, 467 if (abituguru_write(data, ABIT_UGURU_SENSOR_BANK1 + 2, sensor_addr,
457 buf, 3) != 3) 468 buf, 3) != 3)
458 goto abituguru_detect_bank1_sensor_type_exit; 469 goto abituguru_detect_bank1_sensor_type_exit;
@@ -469,13 +480,13 @@ abituguru_detect_bank1_sensor_type(struct abituguru_data *data,
469 sensor_addr, buf, 3, 480 sensor_addr, buf, 3,
470 ABIT_UGURU_MAX_RETRIES) != 3) 481 ABIT_UGURU_MAX_RETRIES) != 3)
471 goto abituguru_detect_bank1_sensor_type_exit; 482 goto abituguru_detect_bank1_sensor_type_exit;
472 if (buf[0] & ABIT_UGURU_VOLT_LOW_ALARM_FLAG) { 483 if (buf[0] & test_flag) {
473 ABIT_UGURU_DEBUG(2, " found volt sensor\n"); 484 ABIT_UGURU_DEBUG(2, " found volt sensor\n");
474 ret = ABIT_UGURU_IN_SENSOR; 485 ret = ABIT_UGURU_IN_SENSOR;
475 goto abituguru_detect_bank1_sensor_type_exit; 486 goto abituguru_detect_bank1_sensor_type_exit;
476 } else 487 } else
477 ABIT_UGURU_DEBUG(2, " alarm raised during volt " 488 ABIT_UGURU_DEBUG(2, " alarm raised during volt "
478 "sensor test, but volt low flag not set\n"); 489 "sensor test, but volt range flag not set\n");
479 } else 490 } else
480 ABIT_UGURU_DEBUG(2, " alarm not raised during volt sensor " 491 ABIT_UGURU_DEBUG(2, " alarm not raised during volt sensor "
481 "test\n"); 492 "test\n");
@@ -1287,6 +1298,7 @@ abituguru_probe_error:
1287 for (i = 0; i < ARRAY_SIZE(abituguru_sysfs_attr); i++) 1298 for (i = 0; i < ARRAY_SIZE(abituguru_sysfs_attr); i++)
1288 device_remove_file(&pdev->dev, 1299 device_remove_file(&pdev->dev,
1289 &abituguru_sysfs_attr[i].dev_attr); 1300 &abituguru_sysfs_attr[i].dev_attr);
1301 platform_set_drvdata(pdev, NULL);
1290 kfree(data); 1302 kfree(data);
1291 return res; 1303 return res;
1292} 1304}
@@ -1296,13 +1308,13 @@ static int __devexit abituguru_remove(struct platform_device *pdev)
1296 int i; 1308 int i;
1297 struct abituguru_data *data = platform_get_drvdata(pdev); 1309 struct abituguru_data *data = platform_get_drvdata(pdev);
1298 1310
1299 platform_set_drvdata(pdev, NULL);
1300 hwmon_device_unregister(data->class_dev); 1311 hwmon_device_unregister(data->class_dev);
1301 for (i = 0; data->sysfs_attr[i].dev_attr.attr.name; i++) 1312 for (i = 0; data->sysfs_attr[i].dev_attr.attr.name; i++)
1302 device_remove_file(&pdev->dev, &data->sysfs_attr[i].dev_attr); 1313 device_remove_file(&pdev->dev, &data->sysfs_attr[i].dev_attr);
1303 for (i = 0; i < ARRAY_SIZE(abituguru_sysfs_attr); i++) 1314 for (i = 0; i < ARRAY_SIZE(abituguru_sysfs_attr); i++)
1304 device_remove_file(&pdev->dev, 1315 device_remove_file(&pdev->dev,
1305 &abituguru_sysfs_attr[i].dev_attr); 1316 &abituguru_sysfs_attr[i].dev_attr);
1317 platform_set_drvdata(pdev, NULL);
1306 kfree(data); 1318 kfree(data);
1307 1319
1308 return 0; 1320 return 0;
@@ -1436,6 +1448,15 @@ static int __init abituguru_init(void)
1436 int address, err; 1448 int address, err;
1437 struct resource res = { .flags = IORESOURCE_IO }; 1449 struct resource res = { .flags = IORESOURCE_IO };
1438 1450
1451#ifdef CONFIG_DMI
1452 char *board_vendor = dmi_get_system_info(DMI_BOARD_VENDOR);
1453
1454 /* safety check, refuse to load on non Abit motherboards */
1455 if (!force && (!board_vendor ||
1456 strcmp(board_vendor, "http://www.abit.com.tw/")))
1457 return -ENODEV;
1458#endif
1459
1439 address = abituguru_detect(); 1460 address = abituguru_detect();
1440 if (address < 0) 1461 if (address < 0)
1441 return address; 1462 return address;
diff --git a/drivers/hwmon/abituguru3.c b/drivers/hwmon/abituguru3.c
new file mode 100644
index 0000000000..a003d104ca
--- /dev/null
+++ b/drivers/hwmon/abituguru3.c
@@ -0,0 +1,1140 @@
1/*
2 abituguru3.c Copyright (c) 2006 Hans de Goede <j.w.r.degoede@hhs.nl>
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17*/
18/*
19 This driver supports the sensor part of revision 3 of the custom Abit uGuru
20 chip found on newer Abit uGuru motherboards. Note: because of lack of specs
21 only reading the sensors and their settings is supported.
22*/
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/slab.h>
26#include <linux/jiffies.h>
27#include <linux/mutex.h>
28#include <linux/err.h>
29#include <linux/delay.h>
30#include <linux/platform_device.h>
31#include <linux/hwmon.h>
32#include <linux/hwmon-sysfs.h>
33#include <asm/io.h>
34
35/* uGuru3 bank addresses */
36#define ABIT_UGURU3_SETTINGS_BANK 0x01
37#define ABIT_UGURU3_SENSORS_BANK 0x08
38#define ABIT_UGURU3_MISC_BANK 0x09
39#define ABIT_UGURU3_ALARMS_START 0x1E
40#define ABIT_UGURU3_SETTINGS_START 0x24
41#define ABIT_UGURU3_VALUES_START 0x80
42#define ABIT_UGURU3_BOARD_ID 0x0A
43/* uGuru3 sensor bank flags */ /* Alarm if: */
44#define ABIT_UGURU3_TEMP_HIGH_ALARM_ENABLE 0x01 /* temp over warn */
45#define ABIT_UGURU3_VOLT_HIGH_ALARM_ENABLE 0x02 /* volt over max */
46#define ABIT_UGURU3_VOLT_LOW_ALARM_ENABLE 0x04 /* volt under min */
47#define ABIT_UGURU3_TEMP_HIGH_ALARM_FLAG 0x10 /* temp is over warn */
48#define ABIT_UGURU3_VOLT_HIGH_ALARM_FLAG 0x20 /* volt is over max */
49#define ABIT_UGURU3_VOLT_LOW_ALARM_FLAG 0x40 /* volt is under min */
50#define ABIT_UGURU3_FAN_LOW_ALARM_ENABLE 0x01 /* fan under min */
51#define ABIT_UGURU3_BEEP_ENABLE 0x08 /* beep if alarm */
52#define ABIT_UGURU3_SHUTDOWN_ENABLE 0x80 /* shutdown if alarm */
53/* sensor types */
54#define ABIT_UGURU3_IN_SENSOR 0
55#define ABIT_UGURU3_TEMP_SENSOR 1
56#define ABIT_UGURU3_FAN_SENSOR 2
57
58/* Timeouts / Retries, if these turn out to need a lot of fiddling we could
59 convert them to params. Determined by trial and error. I assume this is
60 cpu-speed independent, since the ISA-bus and not the CPU should be the
61 bottleneck. */
62#define ABIT_UGURU3_WAIT_TIMEOUT 250
63/* Normally the 0xAC at the end of synchronize() is reported after the
64 first read, but sometimes not and we need to poll */
65#define ABIT_UGURU3_SYNCHRONIZE_TIMEOUT 5
66/* utility macros */
67#define ABIT_UGURU3_NAME "abituguru3"
68#define ABIT_UGURU3_DEBUG(format, arg...) \
69 if (verbose) \
70 printk(KERN_DEBUG ABIT_UGURU3_NAME ": " format , ## arg)
71
72/* Macros to help calculate the sysfs_names array length */
73#define ABIT_UGURU3_MAX_NO_SENSORS 26
74/* sum of strlen +1 of: in??_input\0, in??_{min,max}\0, in??_{min,max}_alarm\0,
75 in??_{min,max}_alarm_enable\0, in??_beep\0, in??_shutdown\0, in??_label\0 */
76#define ABIT_UGURU3_IN_NAMES_LENGTH (11 + 2 * 9 + 2 * 15 + 2 * 22 + 10 + 14 + 11)
77/* sum of strlen +1 of: temp??_input\0, temp??_max\0, temp??_crit\0,
78 temp??_alarm\0, temp??_alarm_enable\0, temp??_beep\0, temp??_shutdown\0,
79 temp??_label\0 */
80#define ABIT_UGURU3_TEMP_NAMES_LENGTH (13 + 11 + 12 + 13 + 20 + 12 + 16 + 13)
81/* sum of strlen +1 of: fan??_input\0, fan??_min\0, fan??_alarm\0,
82 fan??_alarm_enable\0, fan??_beep\0, fan??_shutdown\0, fan??_label\0 */
83#define ABIT_UGURU3_FAN_NAMES_LENGTH (12 + 10 + 12 + 19 + 11 + 15 + 12)
84/* Worst case scenario 16 in sensors (longest names_length) and the rest
85 temp sensors (second longest names_length). */
86#define ABIT_UGURU3_SYSFS_NAMES_LENGTH (16 * ABIT_UGURU3_IN_NAMES_LENGTH + \
87 (ABIT_UGURU3_MAX_NO_SENSORS - 16) * ABIT_UGURU3_TEMP_NAMES_LENGTH)
88
89/* All the macros below are named identical to the openguru2 program
90 reverse engineered by Louis Kruger, hence the names might not be 100%
91 logical. I could come up with better names, but I prefer keeping the names
92 identical so that this driver can be compared with his work more easily. */
93/* Two i/o-ports are used by uGuru */
94#define ABIT_UGURU3_BASE 0x00E0
95#define ABIT_UGURU3_CMD 0x00
96#define ABIT_UGURU3_DATA 0x04
97#define ABIT_UGURU3_REGION_LENGTH 5
98/* The wait_xxx functions return this on success and the last contents
99 of the DATA register (0-255) on failure. */
100#define ABIT_UGURU3_SUCCESS -1
101/* uGuru status flags */
102#define ABIT_UGURU3_STATUS_READY_FOR_READ 0x01
103#define ABIT_UGURU3_STATUS_BUSY 0x02
104
105
106/* Structures */
107struct abituguru3_sensor_info {
108 const char* name;
109 int port;
110 int type;
111 int multiplier;
112 int divisor;
113 int offset;
114};
115
116struct abituguru3_motherboard_info {
117 u16 id;
118 const char *name;
119 /* + 1 -> end of sensors indicated by a sensor with name == NULL */
120 struct abituguru3_sensor_info sensors[ABIT_UGURU3_MAX_NO_SENSORS + 1];
121};
122
123/* For the Abit uGuru, we need to keep some data in memory.
124 The structure is dynamically allocated, at the same time when a new
125 abituguru3 device is allocated. */
126struct abituguru3_data {
127 struct class_device *class_dev; /* hwmon registered device */
128 struct mutex update_lock; /* protect access to data and uGuru */
129 unsigned short addr; /* uguru base address */
130 char valid; /* !=0 if following fields are valid */
131 unsigned long last_updated; /* In jiffies */
132
133 /* For convenience the sysfs attr and their names are generated
134 automatically. We have max 10 entries per sensor (for in sensors) */
135 struct sensor_device_attribute_2 sysfs_attr[ABIT_UGURU3_MAX_NO_SENSORS
136 * 10];
137
138 /* Buffer to store the dynamically generated sysfs names */
139 char sysfs_names[ABIT_UGURU3_SYSFS_NAMES_LENGTH];
140
141 /* Pointer to the sensors info for the detected motherboard */
142 const struct abituguru3_sensor_info *sensors;
143
144 /* The abituguru3 supports upto 48 sensors, and thus has registers
145 sets for 48 sensors, for convienence reasons / simplicity of the
146 code we always read and store all registers for all 48 sensors */
147
148 /* Alarms for all 48 sensors (1 bit per sensor) */
149 u8 alarms[48/8];
150
151 /* Value of all 48 sensors */
152 u8 value[48];
153
154 /* Settings of all 48 sensors, note in and temp sensors (the first 32
155 sensors) have 3 bytes of settings, while fans only have 2 bytes,
156 for convenience we use 3 bytes for all sensors */
157 u8 settings[48][3];
158};
159
160
161/* Constants */
162static const struct abituguru3_motherboard_info abituguru3_motherboards[] = {
163 { 0x000C, "unknown", {
164 { "CPU Core", 0, 0, 10, 1, 0 },
165 { "DDR", 1, 0, 10, 1, 0 },
166 { "DDR VTT", 2, 0, 10, 1, 0 },
167 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
168 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
169 { "MCH 2.5V", 5, 0, 20, 1, 0 },
170 { "ICH 1.05V", 6, 0, 10, 1, 0 },
171 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
172 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
173 { "ATX +5V", 9, 0, 30, 1, 0 },
174 { "+3.3V", 10, 0, 20, 1, 0 },
175 { "5VSB", 11, 0, 30, 1, 0 },
176 { "CPU", 24, 1, 1, 1, 0 },
177 { "System ", 25, 1, 1, 1, 0 },
178 { "PWM", 26, 1, 1, 1, 0 },
179 { "CPU Fan", 32, 2, 60, 1, 0 },
180 { "NB Fan", 33, 2, 60, 1, 0 },
181 { "SYS FAN", 34, 2, 60, 1, 0 },
182 { "AUX1 Fan", 35, 2, 60, 1, 0 },
183 { NULL, 0, 0, 0, 0, 0 } }
184 },
185 { 0x000D, "Abit AW8", {
186 { "CPU Core", 0, 0, 10, 1, 0 },
187 { "DDR", 1, 0, 10, 1, 0 },
188 { "DDR VTT", 2, 0, 10, 1, 0 },
189 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
190 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
191 { "MCH 2.5V", 5, 0, 20, 1, 0 },
192 { "ICH 1.05V", 6, 0, 10, 1, 0 },
193 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
194 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
195 { "ATX +5V", 9, 0, 30, 1, 0 },
196 { "+3.3V", 10, 0, 20, 1, 0 },
197 { "5VSB", 11, 0, 30, 1, 0 },
198 { "CPU", 24, 1, 1, 1, 0 },
199 { "System ", 25, 1, 1, 1, 0 },
200 { "PWM1", 26, 1, 1, 1, 0 },
201 { "PWM2", 27, 1, 1, 1, 0 },
202 { "PWM3", 28, 1, 1, 1, 0 },
203 { "PWM4", 29, 1, 1, 1, 0 },
204 { "CPU Fan", 32, 2, 60, 1, 0 },
205 { "NB Fan", 33, 2, 60, 1, 0 },
206 { "SYS Fan", 34, 2, 60, 1, 0 },
207 { "AUX1 Fan", 35, 2, 60, 1, 0 },
208 { "AUX2 Fan", 36, 2, 60, 1, 0 },
209 { "AUX3 Fan", 37, 2, 60, 1, 0 },
210 { "AUX4 Fan", 38, 2, 60, 1, 0 },
211 { "AUX5 Fan", 39, 2, 60, 1, 0 },
212 { NULL, 0, 0, 0, 0, 0 } }
213 },
214 { 0x000E, "AL-8", {
215 { "CPU Core", 0, 0, 10, 1, 0 },
216 { "DDR", 1, 0, 10, 1, 0 },
217 { "DDR VTT", 2, 0, 10, 1, 0 },
218 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
219 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
220 { "MCH 2.5V", 5, 0, 20, 1, 0 },
221 { "ICH 1.05V", 6, 0, 10, 1, 0 },
222 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
223 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
224 { "ATX +5V", 9, 0, 30, 1, 0 },
225 { "+3.3V", 10, 0, 20, 1, 0 },
226 { "5VSB", 11, 0, 30, 1, 0 },
227 { "CPU", 24, 1, 1, 1, 0 },
228 { "System ", 25, 1, 1, 1, 0 },
229 { "PWM", 26, 1, 1, 1, 0 },
230 { "CPU Fan", 32, 2, 60, 1, 0 },
231 { "NB Fan", 33, 2, 60, 1, 0 },
232 { "SYS Fan", 34, 2, 60, 1, 0 },
233 { NULL, 0, 0, 0, 0, 0 } }
234 },
235 { 0x000F, "unknown", {
236 { "CPU Core", 0, 0, 10, 1, 0 },
237 { "DDR", 1, 0, 10, 1, 0 },
238 { "DDR VTT", 2, 0, 10, 1, 0 },
239 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
240 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
241 { "MCH 2.5V", 5, 0, 20, 1, 0 },
242 { "ICH 1.05V", 6, 0, 10, 1, 0 },
243 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
244 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
245 { "ATX +5V", 9, 0, 30, 1, 0 },
246 { "+3.3V", 10, 0, 20, 1, 0 },
247 { "5VSB", 11, 0, 30, 1, 0 },
248 { "CPU", 24, 1, 1, 1, 0 },
249 { "System ", 25, 1, 1, 1, 0 },
250 { "PWM", 26, 1, 1, 1, 0 },
251 { "CPU Fan", 32, 2, 60, 1, 0 },
252 { "NB Fan", 33, 2, 60, 1, 0 },
253 { "SYS Fan", 34, 2, 60, 1, 0 },
254 { NULL, 0, 0, 0, 0, 0 } }
255 },
256 { 0x0010, "Abit NI8 SLI GR", {
257 { "CPU Core", 0, 0, 10, 1, 0 },
258 { "DDR", 1, 0, 10, 1, 0 },
259 { "DDR VTT", 2, 0, 10, 1, 0 },
260 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
261 { "NB 1.4V", 4, 0, 10, 1, 0 },
262 { "SB 1.5V", 6, 0, 10, 1, 0 },
263 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
264 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
265 { "ATX +5V", 9, 0, 30, 1, 0 },
266 { "+3.3V", 10, 0, 20, 1, 0 },
267 { "5VSB", 11, 0, 30, 1, 0 },
268 { "CPU", 24, 1, 1, 1, 0 },
269 { "SYS", 25, 1, 1, 1, 0 },
270 { "PWM", 26, 1, 1, 1, 0 },
271 { "CPU Fan", 32, 2, 60, 1, 0 },
272 { "NB Fan", 33, 2, 60, 1, 0 },
273 { "SYS Fan", 34, 2, 60, 1, 0 },
274 { "AUX1 Fan", 35, 2, 60, 1, 0 },
275 { "OTES1 Fan", 36, 2, 60, 1, 0 },
276 { NULL, 0, 0, 0, 0, 0 } }
277 },
278 { 0x0011, "Abit AT8 32X", {
279 { "CPU Core", 0, 0, 10, 1, 0 },
280 { "DDR", 1, 0, 20, 1, 0 },
281 { "DDR VTT", 2, 0, 10, 1, 0 },
282 { "CPU VDDA 2.5V", 6, 0, 20, 1, 0 },
283 { "NB 1.8V", 4, 0, 10, 1, 0 },
284 { "NB 1.8V Dual", 5, 0, 10, 1, 0 },
285 { "HTV 1.2", 3, 0, 10, 1, 0 },
286 { "PCIE 1.2V", 12, 0, 10, 1, 0 },
287 { "NB 1.2V", 13, 0, 10, 1, 0 },
288 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
289 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
290 { "ATX +5V", 9, 0, 30, 1, 0 },
291 { "+3.3V", 10, 0, 20, 1, 0 },
292 { "5VSB", 11, 0, 30, 1, 0 },
293 { "CPU", 24, 1, 1, 1, 0 },
294 { "NB", 25, 1, 1, 1, 0 },
295 { "System", 26, 1, 1, 1, 0 },
296 { "PWM", 27, 1, 1, 1, 0 },
297 { "CPU Fan", 32, 2, 60, 1, 0 },
298 { "NB Fan", 33, 2, 60, 1, 0 },
299 { "SYS Fan", 34, 2, 60, 1, 0 },
300 { "AUX1 Fan", 35, 2, 60, 1, 0 },
301 { "AUX2 Fan", 36, 2, 60, 1, 0 },
302 { NULL, 0, 0, 0, 0, 0 } }
303 },
304 { 0x0012, "Abit AN8 32X", {
305 { "CPU Core", 0, 0, 10, 1, 0 },
306 { "DDR", 1, 0, 20, 1, 0 },
307 { "DDR VTT", 2, 0, 10, 1, 0 },
308 { "HyperTransport", 3, 0, 10, 1, 0 },
309 { "CPU VDDA 2.5V", 5, 0, 20, 1, 0 },
310 { "NB", 4, 0, 10, 1, 0 },
311 { "SB", 6, 0, 10, 1, 0 },
312 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
313 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
314 { "ATX +5V", 9, 0, 30, 1, 0 },
315 { "+3.3V", 10, 0, 20, 1, 0 },
316 { "5VSB", 11, 0, 30, 1, 0 },
317 { "CPU", 24, 1, 1, 1, 0 },
318 { "SYS", 25, 1, 1, 1, 0 },
319 { "PWM", 26, 1, 1, 1, 0 },
320 { "CPU Fan", 32, 2, 60, 1, 0 },
321 { "NB Fan", 33, 2, 60, 1, 0 },
322 { "SYS Fan", 34, 2, 60, 1, 0 },
323 { "AUX1 Fan", 36, 2, 60, 1, 0 },
324 { NULL, 0, 0, 0, 0, 0 } }
325 },
326 { 0x0013, "unknown", {
327 { "CPU Core", 0, 0, 10, 1, 0 },
328 { "DDR", 1, 0, 10, 1, 0 },
329 { "DDR VTT", 2, 0, 10, 1, 0 },
330 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
331 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
332 { "MCH 2.5V", 5, 0, 20, 1, 0 },
333 { "ICH 1.05V", 6, 0, 10, 1, 0 },
334 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
335 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
336 { "ATX +5V", 9, 0, 30, 1, 0 },
337 { "+3.3V", 10, 0, 20, 1, 0 },
338 { "5VSB", 11, 0, 30, 1, 0 },
339 { "CPU", 24, 1, 1, 1, 0 },
340 { "System ", 25, 1, 1, 1, 0 },
341 { "PWM1", 26, 1, 1, 1, 0 },
342 { "PWM2", 27, 1, 1, 1, 0 },
343 { "PWM3", 28, 1, 1, 1, 0 },
344 { "PWM4", 29, 1, 1, 1, 0 },
345 { "CPU Fan", 32, 2, 60, 1, 0 },
346 { "NB Fan", 33, 2, 60, 1, 0 },
347 { "SYS Fan", 34, 2, 60, 1, 0 },
348 { "AUX1 Fan", 35, 2, 60, 1, 0 },
349 { "AUX2 Fan", 36, 2, 60, 1, 0 },
350 { "AUX3 Fan", 37, 2, 60, 1, 0 },
351 { "AUX4 Fan", 38, 2, 60, 1, 0 },
352 { NULL, 0, 0, 0, 0, 0 } }
353 },
354 { 0x0014, "Abit AB9 Pro", {
355 { "CPU Core", 0, 0, 10, 1, 0 },
356 { "DDR", 1, 0, 10, 1, 0 },
357 { "DDR VTT", 2, 0, 10, 1, 0 },
358 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
359 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
360 { "MCH 2.5V", 5, 0, 20, 1, 0 },
361 { "ICH 1.05V", 6, 0, 10, 1, 0 },
362 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
363 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
364 { "ATX +5V", 9, 0, 30, 1, 0 },
365 { "+3.3V", 10, 0, 20, 1, 0 },
366 { "5VSB", 11, 0, 30, 1, 0 },
367 { "CPU", 24, 1, 1, 1, 0 },
368 { "System ", 25, 1, 1, 1, 0 },
369 { "PWM", 26, 1, 1, 1, 0 },
370 { "CPU Fan", 32, 2, 60, 1, 0 },
371 { "NB Fan", 33, 2, 60, 1, 0 },
372 { "SYS Fan", 34, 2, 60, 1, 0 },
373 { NULL, 0, 0, 0, 0, 0 } }
374 },
375 { 0x0015, "unknown", {
376 { "CPU Core", 0, 0, 10, 1, 0 },
377 { "DDR", 1, 0, 20, 1, 0 },
378 { "DDR VTT", 2, 0, 10, 1, 0 },
379 { "HyperTransport", 3, 0, 10, 1, 0 },
380 { "CPU VDDA 2.5V", 5, 0, 20, 1, 0 },
381 { "NB", 4, 0, 10, 1, 0 },
382 { "SB", 6, 0, 10, 1, 0 },
383 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
384 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
385 { "ATX +5V", 9, 0, 30, 1, 0 },
386 { "+3.3V", 10, 0, 20, 1, 0 },
387 { "5VSB", 11, 0, 30, 1, 0 },
388 { "CPU", 24, 1, 1, 1, 0 },
389 { "SYS", 25, 1, 1, 1, 0 },
390 { "PWM", 26, 1, 1, 1, 0 },
391 { "CPU Fan", 32, 2, 60, 1, 0 },
392 { "NB Fan", 33, 2, 60, 1, 0 },
393 { "SYS Fan", 34, 2, 60, 1, 0 },
394 { "AUX1 Fan", 33, 2, 60, 1, 0 },
395 { "AUX2 Fan", 35, 2, 60, 1, 0 },
396 { "AUX3 Fan", 36, 2, 60, 1, 0 },
397 { NULL, 0, 0, 0, 0, 0 } }
398 },
399 { 0x0016, "AW9D-MAX", {
400 { "CPU Core", 0, 0, 10, 1, 0 },
401 { "DDR2", 1, 0, 20, 1, 0 },
402 { "DDR2 VTT", 2, 0, 10, 1, 0 },
403 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
404 { "MCH & PCIE 1.5V", 4, 0, 10, 1, 0 },
405 { "MCH 2.5V", 5, 0, 20, 1, 0 },
406 { "ICH 1.05V", 6, 0, 10, 1, 0 },
407 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
408 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
409 { "ATX +5V", 9, 0, 30, 1, 0 },
410 { "+3.3V", 10, 0, 20, 1, 0 },
411 { "5VSB", 11, 0, 30, 1, 0 },
412 { "CPU", 24, 1, 1, 1, 0 },
413 { "System ", 25, 1, 1, 1, 0 },
414 { "PWM1", 26, 1, 1, 1, 0 },
415 { "PWM2", 27, 1, 1, 1, 0 },
416 { "PWM3", 28, 1, 1, 1, 0 },
417 { "PWM4", 29, 1, 1, 1, 0 },
418 { "CPU Fan", 32, 2, 60, 1, 0 },
419 { "NB Fan", 33, 2, 60, 1, 0 },
420 { "SYS Fan", 34, 2, 60, 1, 0 },
421 { "AUX1 Fan", 35, 2, 60, 1, 0 },
422 { "AUX2 Fan", 36, 2, 60, 1, 0 },
423 { "AUX3 Fan", 37, 2, 60, 1, 0 },
424 { "OTES1 Fan", 38, 2, 60, 1, 0 },
425 { NULL, 0, 0, 0, 0, 0 } }
426 },
427 { 0x0017, "unknown", {
428 { "CPU Core", 0, 0, 10, 1, 0 },
429 { "DDR2", 1, 0, 20, 1, 0 },
430 { "DDR2 VTT", 2, 0, 10, 1, 0 },
431 { "HyperTransport", 3, 0, 10, 1, 0 },
432 { "CPU VDDA 2.5V", 6, 0, 20, 1, 0 },
433 { "NB 1.8V", 4, 0, 10, 1, 0 },
434 { "NB 1.2V ", 13, 0, 10, 1, 0 },
435 { "SB 1.2V", 5, 0, 10, 1, 0 },
436 { "PCIE 1.2V", 12, 0, 10, 1, 0 },
437 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
438 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
439 { "ATX +5V", 9, 0, 30, 1, 0 },
440 { "ATX +3.3V", 10, 0, 20, 1, 0 },
441 { "ATX 5VSB", 11, 0, 30, 1, 0 },
442 { "CPU", 24, 1, 1, 1, 0 },
443 { "System ", 26, 1, 1, 1, 0 },
444 { "PWM", 27, 1, 1, 1, 0 },
445 { "CPU FAN", 32, 2, 60, 1, 0 },
446 { "SYS FAN", 34, 2, 60, 1, 0 },
447 { "AUX1 FAN", 35, 2, 60, 1, 0 },
448 { "AUX2 FAN", 36, 2, 60, 1, 0 },
449 { "AUX3 FAN", 37, 2, 60, 1, 0 },
450 { NULL, 0, 0, 0, 0, 0 } }
451 },
452 { 0x0018, "unknown", {
453 { "CPU Core", 0, 0, 10, 1, 0 },
454 { "DDR2", 1, 0, 20, 1, 0 },
455 { "DDR2 VTT", 2, 0, 10, 1, 0 },
456 { "CPU VTT", 3, 0, 10, 1, 0 },
457 { "MCH 1.25V", 4, 0, 10, 1, 0 },
458 { "ICHIO 1.5V", 5, 0, 10, 1, 0 },
459 { "ICH 1.05V", 6, 0, 10, 1, 0 },
460 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
461 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
462 { "ATX +5V", 9, 0, 30, 1, 0 },
463 { "+3.3V", 10, 0, 20, 1, 0 },
464 { "5VSB", 11, 0, 30, 1, 0 },
465 { "CPU", 24, 1, 1, 1, 0 },
466 { "System ", 25, 1, 1, 1, 0 },
467 { "PWM Phase1", 26, 1, 1, 1, 0 },
468 { "PWM Phase2", 27, 1, 1, 1, 0 },
469 { "PWM Phase3", 28, 1, 1, 1, 0 },
470 { "PWM Phase4", 29, 1, 1, 1, 0 },
471 { "PWM Phase5", 30, 1, 1, 1, 0 },
472 { "CPU Fan", 32, 2, 60, 1, 0 },
473 { "SYS Fan", 34, 2, 60, 1, 0 },
474 { "AUX1 Fan", 33, 2, 60, 1, 0 },
475 { "AUX2 Fan", 35, 2, 60, 1, 0 },
476 { "AUX3 Fan", 36, 2, 60, 1, 0 },
477 { NULL, 0, 0, 0, 0, 0 } }
478 },
479 { 0x0019, "unknown", {
480 { "CPU Core", 7, 0, 10, 1, 0 },
481 { "DDR2", 13, 0, 20, 1, 0 },
482 { "DDR2 VTT", 14, 0, 10, 1, 0 },
483 { "CPU VTT", 3, 0, 20, 1, 0 },
484 { "NB 1.2V ", 4, 0, 10, 1, 0 },
485 { "SB 1.5V", 6, 0, 10, 1, 0 },
486 { "HyperTransport", 5, 0, 10, 1, 0 },
487 { "ATX +12V (24-Pin)", 12, 0, 60, 1, 0 },
488 { "ATX +12V (4-pin)", 8, 0, 60, 1, 0 },
489 { "ATX +5V", 9, 0, 30, 1, 0 },
490 { "ATX +3.3V", 10, 0, 20, 1, 0 },
491 { "ATX 5VSB", 11, 0, 30, 1, 0 },
492 { "CPU", 24, 1, 1, 1, 0 },
493 { "System ", 25, 1, 1, 1, 0 },
494 { "PWM Phase1", 26, 1, 1, 1, 0 },
495 { "PWM Phase2", 27, 1, 1, 1, 0 },
496 { "PWM Phase3", 28, 1, 1, 1, 0 },
497 { "PWM Phase4", 29, 1, 1, 1, 0 },
498 { "PWM Phase5", 30, 1, 1, 1, 0 },
499 { "CPU FAN", 32, 2, 60, 1, 0 },
500 { "SYS FAN", 34, 2, 60, 1, 0 },
501 { "AUX1 FAN", 33, 2, 60, 1, 0 },
502 { "AUX2 FAN", 35, 2, 60, 1, 0 },
503 { "AUX3 FAN", 36, 2, 60, 1, 0 },
504 { NULL, 0, 0, 0, 0, 0 } }
505 },
506 { 0x001A, "unknown", {
507 { "CPU Core", 0, 0, 10, 1, 0 },
508 { "DDR2", 1, 0, 20, 1, 0 },
509 { "DDR2 VTT", 2, 0, 10, 1, 0 },
510 { "CPU VTT 1.2V", 3, 0, 10, 1, 0 },
511 { "MCH 1.25V", 4, 0, 10, 1, 0 },
512 { "ICHIO 1.5V", 5, 0, 10, 1, 0 },
513 { "ICH 1.05V", 6, 0, 10, 1, 0 },
514 { "ATX +12V (24-Pin)", 7, 0, 60, 1, 0 },
515 { "ATX +12V (8-pin)", 8, 0, 60, 1, 0 },
516 { "ATX +5V", 9, 0, 30, 1, 0 },
517 { "+3.3V", 10, 0, 20, 1, 0 },
518 { "5VSB", 11, 0, 30, 1, 0 },
519 { "CPU", 24, 1, 1, 1, 0 },
520 { "System ", 25, 1, 1, 1, 0 },
521 { "PWM ", 26, 1, 1, 1, 0 },
522 { "PWM Phase2", 27, 1, 1, 1, 0 },
523 { "PWM Phase3", 28, 1, 1, 1, 0 },
524 { "PWM Phase4", 29, 1, 1, 1, 0 },
525 { "PWM Phase5", 30, 1, 1, 1, 0 },
526 { "CPU Fan", 32, 2, 60, 1, 0 },
527 { "SYS Fan", 34, 2, 60, 1, 0 },
528 { "AUX1 Fan", 33, 2, 60, 1, 0 },
529 { "AUX2 Fan", 35, 2, 60, 1, 0 },
530 { "AUX3 Fan", 36, 2, 60, 1, 0 },
531 { NULL, 0, 0, 0, 0, 0 } }
532 },
533 { 0x0000, NULL, { { NULL, 0, 0, 0, 0, 0 } } }
534};
535
536
537/* Insmod parameters */
538static int force;
539module_param(force, bool, 0);
540MODULE_PARM_DESC(force, "Set to one to force detection.");
541/* Default verbose is 1, since this driver is still in the testing phase */
542static int verbose = 1;
543module_param(verbose, bool, 0644);
544MODULE_PARM_DESC(verbose, "Enable/disable verbose error reporting");
545
546
547/* wait while the uguru is busy (usually after a write) */
548static int abituguru3_wait_while_busy(struct abituguru3_data *data)
549{
550 u8 x;
551 int timeout = ABIT_UGURU3_WAIT_TIMEOUT;
552
553 while ((x = inb_p(data->addr + ABIT_UGURU3_DATA)) &
554 ABIT_UGURU3_STATUS_BUSY) {
555 timeout--;
556 if (timeout == 0)
557 return x;
558 /* sleep a bit before our last try, to give the uGuru3 one
559 last chance to respond. */
560 if (timeout == 1)
561 msleep(1);
562 }
563 return ABIT_UGURU3_SUCCESS;
564}
565
566/* wait till uguru is ready to be read */
567static int abituguru3_wait_for_read(struct abituguru3_data *data)
568{
569 u8 x;
570 int timeout = ABIT_UGURU3_WAIT_TIMEOUT;
571
572 while (!((x = inb_p(data->addr + ABIT_UGURU3_DATA)) &
573 ABIT_UGURU3_STATUS_READY_FOR_READ)) {
574 timeout--;
575 if (timeout == 0)
576 return x;
577 /* sleep a bit before our last try, to give the uGuru3 one
578 last chance to respond. */
579 if (timeout == 1)
580 msleep(1);
581 }
582 return ABIT_UGURU3_SUCCESS;
583}
584
585/* This synchronizes us with the uGuru3's protocol state machine, this
586 must be done before each command. */
587static int abituguru3_synchronize(struct abituguru3_data *data)
588{
589 int x, timeout = ABIT_UGURU3_SYNCHRONIZE_TIMEOUT;
590
591 if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) {
592 ABIT_UGURU3_DEBUG("synchronize timeout during initial busy "
593 "wait, status: 0x%02x\n", x);
594 return -EIO;
595 }
596
597 outb(0x20, data->addr + ABIT_UGURU3_DATA);
598 if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) {
599 ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x20, "
600 "status: 0x%02x\n", x);
601 return -EIO;
602 }
603
604 outb(0x10, data->addr + ABIT_UGURU3_CMD);
605 if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) {
606 ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x10, "
607 "status: 0x%02x\n", x);
608 return -EIO;
609 }
610
611 outb(0x00, data->addr + ABIT_UGURU3_CMD);
612 if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) {
613 ABIT_UGURU3_DEBUG("synchronize timeout after sending 0x00, "
614 "status: 0x%02x\n", x);
615 return -EIO;
616 }
617
618 if ((x = abituguru3_wait_for_read(data)) != ABIT_UGURU3_SUCCESS) {
619 ABIT_UGURU3_DEBUG("synchronize timeout waiting for read, "
620 "status: 0x%02x\n", x);
621 return -EIO;
622 }
623
624 while ((x = inb(data->addr + ABIT_UGURU3_CMD)) != 0xAC) {
625 timeout--;
626 if (timeout == 0) {
627 ABIT_UGURU3_DEBUG("synchronize timeout cmd does not "
628 "hold 0xAC after synchronize, cmd: 0x%02x\n",
629 x);
630 return -EIO;
631 }
632 msleep(1);
633 }
634 return 0;
635}
636
637/* Read count bytes from sensor sensor_addr in bank bank_addr and store the
638 result in buf */
639static int abituguru3_read(struct abituguru3_data *data, u8 bank, u8 offset,
640 u8 count, u8 *buf)
641{
642 int i, x;
643
644 if ((x = abituguru3_synchronize(data)))
645 return x;
646
647 outb(0x1A, data->addr + ABIT_UGURU3_DATA);
648 if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) {
649 ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after "
650 "sending 0x1A, status: 0x%02x\n", (unsigned int)bank,
651 (unsigned int)offset, x);
652 return -EIO;
653 }
654
655 outb(bank, data->addr + ABIT_UGURU3_CMD);
656 if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) {
657 ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after "
658 "sending the bank, status: 0x%02x\n",
659 (unsigned int)bank, (unsigned int)offset, x);
660 return -EIO;
661 }
662
663 outb(offset, data->addr + ABIT_UGURU3_CMD);
664 if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) {
665 ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after "
666 "sending the offset, status: 0x%02x\n",
667 (unsigned int)bank, (unsigned int)offset, x);
668 return -EIO;
669 }
670
671 outb(count, data->addr + ABIT_UGURU3_CMD);
672 if ((x = abituguru3_wait_while_busy(data)) != ABIT_UGURU3_SUCCESS) {
673 ABIT_UGURU3_DEBUG("read from 0x%02x:0x%02x timed out after "
674 "sending the count, status: 0x%02x\n",
675 (unsigned int)bank, (unsigned int)offset, x);
676 return -EIO;
677 }
678
679 for (i = 0; i < count; i++) {
680 if ((x = abituguru3_wait_for_read(data)) !=
681 ABIT_UGURU3_SUCCESS) {
682 ABIT_UGURU3_DEBUG("timeout reading byte %d from "
683 "0x%02x:0x%02x, status: 0x%02x\n", i,
684 (unsigned int)bank, (unsigned int)offset, x);
685 break;
686 }
687 buf[i] = inb(data->addr + ABIT_UGURU3_CMD);
688 }
689 return i;
690}
691
692/* Sensor settings are stored 1 byte per offset with the bytes
693 placed add consecutive offsets. */
694int abituguru3_read_increment_offset(struct abituguru3_data *data, u8 bank,
695 u8 offset, u8 count, u8 *buf, int offset_count)
696{
697 int i, x;
698
699 for (i = 0; i < offset_count; i++)
700 if ((x = abituguru3_read(data, bank, offset + i, count,
701 buf + i * count)) != count)
702 return i * count + (i && (x < 0)) ? 0 : x;
703
704 return i * count;
705}
706
707/* Following are the sysfs callback functions. These functions expect:
708 sensor_device_attribute_2->index: index into the data->sensors array
709 sensor_device_attribute_2->nr: register offset, bitmask or NA. */
710static struct abituguru3_data *abituguru3_update_device(struct device *dev);
711
712static ssize_t show_value(struct device *dev,
713 struct device_attribute *devattr, char *buf)
714{
715 int value;
716 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
717 struct abituguru3_data *data = abituguru3_update_device(dev);
718 const struct abituguru3_sensor_info *sensor;
719
720 if (!data)
721 return -EIO;
722
723 sensor = &data->sensors[attr->index];
724
725 /* are we reading a setting, or is this a normal read? */
726 if (attr->nr)
727 value = data->settings[sensor->port][attr->nr];
728 else
729 value = data->value[sensor->port];
730
731 /* convert the value */
732 value = (value * sensor->multiplier) / sensor->divisor +
733 sensor->offset;
734
735 /* alternatively we could update the sensors settings struct for this,
736 but then its contents would differ from the windows sw ini files */
737 if (sensor->type == ABIT_UGURU3_TEMP_SENSOR)
738 value *= 1000;
739
740 return sprintf(buf, "%d\n", value);
741}
742
743static ssize_t show_alarm(struct device *dev,
744 struct device_attribute *devattr, char *buf)
745{
746 int port;
747 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
748 struct abituguru3_data *data = abituguru3_update_device(dev);
749
750 if (!data)
751 return -EIO;
752
753 port = data->sensors[attr->index].port;
754
755 /* See if the alarm bit for this sensor is set and if a bitmask is
756 given in attr->nr also check if the alarm matches the type of alarm
757 we're looking for (for volt it can be either low or high). The type
758 is stored in a few readonly bits in the settings of the sensor. */
759 if ((data->alarms[port / 8] & (0x01 << (port % 8))) &&
760 (!attr->nr || (data->settings[port][0] & attr->nr)))
761 return sprintf(buf, "1\n");
762 else
763 return sprintf(buf, "0\n");
764}
765
766static ssize_t show_mask(struct device *dev,
767 struct device_attribute *devattr, char *buf)
768{
769 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
770 struct abituguru3_data *data = dev_get_drvdata(dev);
771
772 if (data->settings[data->sensors[attr->index].port][0] & attr->nr)
773 return sprintf(buf, "1\n");
774 else
775 return sprintf(buf, "0\n");
776}
777
778static ssize_t show_label(struct device *dev,
779 struct device_attribute *devattr, char *buf)
780{
781 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
782 struct abituguru3_data *data = dev_get_drvdata(dev);
783
784 return sprintf(buf, "%s\n", data->sensors[attr->index].name);
785}
786
787static ssize_t show_name(struct device *dev,
788 struct device_attribute *devattr, char *buf)
789{
790 return sprintf(buf, "%s\n", ABIT_UGURU3_NAME);
791}
792
793/* Sysfs attr templates, the real entries are generated automatically. */
794static const
795struct sensor_device_attribute_2 abituguru3_sysfs_templ[3][10] = { {
796 SENSOR_ATTR_2(in%d_input, 0444, show_value, NULL, 0, 0),
797 SENSOR_ATTR_2(in%d_min, 0444, show_value, NULL, 1, 0),
798 SENSOR_ATTR_2(in%d_max, 0444, show_value, NULL, 2, 0),
799 SENSOR_ATTR_2(in%d_min_alarm, 0444, show_alarm, NULL,
800 ABIT_UGURU3_VOLT_LOW_ALARM_FLAG, 0),
801 SENSOR_ATTR_2(in%d_max_alarm, 0444, show_alarm, NULL,
802 ABIT_UGURU3_VOLT_HIGH_ALARM_FLAG, 0),
803 SENSOR_ATTR_2(in%d_beep, 0444, show_mask, NULL,
804 ABIT_UGURU3_BEEP_ENABLE, 0),
805 SENSOR_ATTR_2(in%d_shutdown, 0444, show_mask, NULL,
806 ABIT_UGURU3_SHUTDOWN_ENABLE, 0),
807 SENSOR_ATTR_2(in%d_min_alarm_enable, 0444, show_mask, NULL,
808 ABIT_UGURU3_VOLT_LOW_ALARM_ENABLE, 0),
809 SENSOR_ATTR_2(in%d_max_alarm_enable, 0444, show_mask, NULL,
810 ABIT_UGURU3_VOLT_HIGH_ALARM_ENABLE, 0),
811 SENSOR_ATTR_2(in%d_label, 0444, show_label, NULL, 0, 0)
812 }, {
813 SENSOR_ATTR_2(temp%d_input, 0444, show_value, NULL, 0, 0),
814 SENSOR_ATTR_2(temp%d_max, 0444, show_value, NULL, 1, 0),
815 SENSOR_ATTR_2(temp%d_crit, 0444, show_value, NULL, 2, 0),
816 SENSOR_ATTR_2(temp%d_alarm, 0444, show_alarm, NULL, 0, 0),
817 SENSOR_ATTR_2(temp%d_beep, 0444, show_mask, NULL,
818 ABIT_UGURU3_BEEP_ENABLE, 0),
819 SENSOR_ATTR_2(temp%d_shutdown, 0444, show_mask, NULL,
820 ABIT_UGURU3_SHUTDOWN_ENABLE, 0),
821 SENSOR_ATTR_2(temp%d_alarm_enable, 0444, show_mask, NULL,
822 ABIT_UGURU3_TEMP_HIGH_ALARM_ENABLE, 0),
823 SENSOR_ATTR_2(temp%d_label, 0444, show_label, NULL, 0, 0)
824 }, {
825 SENSOR_ATTR_2(fan%d_input, 0444, show_value, NULL, 0, 0),
826 SENSOR_ATTR_2(fan%d_min, 0444, show_value, NULL, 1, 0),
827 SENSOR_ATTR_2(fan%d_alarm, 0444, show_alarm, NULL, 0, 0),
828 SENSOR_ATTR_2(fan%d_beep, 0444, show_mask, NULL,
829 ABIT_UGURU3_BEEP_ENABLE, 0),
830 SENSOR_ATTR_2(fan%d_shutdown, 0444, show_mask, NULL,
831 ABIT_UGURU3_SHUTDOWN_ENABLE, 0),
832 SENSOR_ATTR_2(fan%d_alarm_enable, 0444, show_mask, NULL,
833 ABIT_UGURU3_FAN_LOW_ALARM_ENABLE, 0),
834 SENSOR_ATTR_2(fan%d_label, 0444, show_label, NULL, 0, 0)
835} };
836
837static struct sensor_device_attribute_2 abituguru3_sysfs_attr[] = {
838 SENSOR_ATTR_2(name, 0444, show_name, NULL, 0, 0),
839};
840
841static int __devinit abituguru3_probe(struct platform_device *pdev)
842{
843 const int no_sysfs_attr[3] = { 10, 8, 7 };
844 int sensor_index[3] = { 0, 1, 1 };
845 struct abituguru3_data *data;
846 int i, j, type, used, sysfs_names_free, sysfs_attr_i, res = -ENODEV;
847 char *sysfs_filename;
848 u8 buf[2];
849 u16 id;
850
851 if (!(data = kzalloc(sizeof(struct abituguru3_data), GFP_KERNEL)))
852 return -ENOMEM;
853
854 data->addr = platform_get_resource(pdev, IORESOURCE_IO, 0)->start;
855 mutex_init(&data->update_lock);
856 platform_set_drvdata(pdev, data);
857
858 /* Read the motherboard ID */
859 if ((i = abituguru3_read(data, ABIT_UGURU3_MISC_BANK,
860 ABIT_UGURU3_BOARD_ID, 2, buf)) != 2) {
861 goto abituguru3_probe_error;
862 }
863
864 /* Completely read the uGuru to see if one really is there */
865 if (!abituguru3_update_device(&pdev->dev))
866 goto abituguru3_probe_error;
867
868 /* lookup the ID in our motherboard table */
869 id = ((u16)buf[0] << 8) | (u16)buf[1];
870 for (i = 0; abituguru3_motherboards[i].id; i++)
871 if (abituguru3_motherboards[i].id == id)
872 break;
873 if (!abituguru3_motherboards[i].id) {
874 printk(KERN_ERR ABIT_UGURU3_NAME ": error unknown motherboard "
875 "ID: %04X. Please report this to the abituguru3 "
876 "maintainer (see MAINTAINERS)\n", (unsigned int)id);
877 goto abituguru3_probe_error;
878 }
879 data->sensors = abituguru3_motherboards[i].sensors;
880 printk(KERN_INFO ABIT_UGURU3_NAME ": found Abit uGuru3, motherboard "
881 "ID: %04X (%s)\n", (unsigned int)id,
882 abituguru3_motherboards[i].name);
883
884 /* Fill the sysfs attr array */
885 sysfs_attr_i = 0;
886 sysfs_filename = data->sysfs_names;
887 sysfs_names_free = ABIT_UGURU3_SYSFS_NAMES_LENGTH;
888 for (i = 0; data->sensors[i].name; i++) {
889 /* Fail safe check, this should never happen! */
890 if (i >= ABIT_UGURU3_MAX_NO_SENSORS) {
891 printk(KERN_ERR ABIT_UGURU3_NAME
892 ": Fatal error motherboard has more sensors "
893 "then ABIT_UGURU3_MAX_NO_SENSORS. This should "
894 "never happen please report to the abituguru3 "
895 "maintainer (see MAINTAINERS)\n");
896 res = -ENAMETOOLONG;
897 goto abituguru3_probe_error;
898 }
899 type = data->sensors[i].type;
900 for (j = 0; j < no_sysfs_attr[type]; j++) {
901 used = snprintf(sysfs_filename, sysfs_names_free,
902 abituguru3_sysfs_templ[type][j].dev_attr.attr.
903 name, sensor_index[type]) + 1;
904 data->sysfs_attr[sysfs_attr_i] =
905 abituguru3_sysfs_templ[type][j];
906 data->sysfs_attr[sysfs_attr_i].dev_attr.attr.name =
907 sysfs_filename;
908 data->sysfs_attr[sysfs_attr_i].index = i;
909 sysfs_filename += used;
910 sysfs_names_free -= used;
911 sysfs_attr_i++;
912 }
913 sensor_index[type]++;
914 }
915 /* Fail safe check, this should never happen! */
916 if (sysfs_names_free < 0) {
917 printk(KERN_ERR ABIT_UGURU3_NAME
918 ": Fatal error ran out of space for sysfs attr names. "
919 "This should never happen please report to the "
920 "abituguru3 maintainer (see MAINTAINERS)\n");
921 res = -ENAMETOOLONG;
922 goto abituguru3_probe_error;
923 }
924
925 /* Register sysfs hooks */
926 for (i = 0; i < sysfs_attr_i; i++)
927 if (device_create_file(&pdev->dev,
928 &data->sysfs_attr[i].dev_attr))
929 goto abituguru3_probe_error;
930 for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++)
931 if (device_create_file(&pdev->dev,
932 &abituguru3_sysfs_attr[i].dev_attr))
933 goto abituguru3_probe_error;
934
935 data->class_dev = hwmon_device_register(&pdev->dev);
936 if (IS_ERR(data->class_dev)) {
937 res = PTR_ERR(data->class_dev);
938 goto abituguru3_probe_error;
939 }
940
941 return 0; /* success */
942
943abituguru3_probe_error:
944 for (i = 0; data->sysfs_attr[i].dev_attr.attr.name; i++)
945 device_remove_file(&pdev->dev, &data->sysfs_attr[i].dev_attr);
946 for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++)
947 device_remove_file(&pdev->dev,
948 &abituguru3_sysfs_attr[i].dev_attr);
949 kfree(data);
950 return res;
951}
952
953static int __devexit abituguru3_remove(struct platform_device *pdev)
954{
955 int i;
956 struct abituguru3_data *data = platform_get_drvdata(pdev);
957
958 platform_set_drvdata(pdev, NULL);
959 hwmon_device_unregister(data->class_dev);
960 for (i = 0; data->sysfs_attr[i].dev_attr.attr.name; i++)
961 device_remove_file(&pdev->dev, &data->sysfs_attr[i].dev_attr);
962 for (i = 0; i < ARRAY_SIZE(abituguru3_sysfs_attr); i++)
963 device_remove_file(&pdev->dev,
964 &abituguru3_sysfs_attr[i].dev_attr);
965 kfree(data);
966
967 return 0;
968}
969
970static struct abituguru3_data *abituguru3_update_device(struct device *dev)
971{
972 int i;
973 struct abituguru3_data *data = dev_get_drvdata(dev);
974
975 mutex_lock(&data->update_lock);
976 if (!data->valid || time_after(jiffies, data->last_updated + HZ)) {
977 /* Clear data->valid while updating */
978 data->valid = 0;
979 /* Read alarms */
980 if (abituguru3_read_increment_offset(data,
981 ABIT_UGURU3_SETTINGS_BANK,
982 ABIT_UGURU3_ALARMS_START,
983 1, data->alarms, 48/8) != (48/8))
984 goto LEAVE_UPDATE;
985 /* Read in and temp sensors (3 byte settings / sensor) */
986 for (i = 0; i < 32; i++) {
987 if (abituguru3_read(data, ABIT_UGURU3_SENSORS_BANK,
988 ABIT_UGURU3_VALUES_START + i,
989 1, &data->value[i]) != 1)
990 goto LEAVE_UPDATE;
991 if (abituguru3_read_increment_offset(data,
992 ABIT_UGURU3_SETTINGS_BANK,
993 ABIT_UGURU3_SETTINGS_START + i * 3,
994 1,
995 data->settings[i], 3) != 3)
996 goto LEAVE_UPDATE;
997 }
998 /* Read temp sensors (2 byte settings / sensor) */
999 for (i = 0; i < 16; i++) {
1000 if (abituguru3_read(data, ABIT_UGURU3_SENSORS_BANK,
1001 ABIT_UGURU3_VALUES_START + 32 + i,
1002 1, &data->value[32 + i]) != 1)
1003 goto LEAVE_UPDATE;
1004 if (abituguru3_read_increment_offset(data,
1005 ABIT_UGURU3_SETTINGS_BANK,
1006 ABIT_UGURU3_SETTINGS_START + 32 * 3 +
1007 i * 2, 1,
1008 data->settings[32 + i], 2) != 2)
1009 goto LEAVE_UPDATE;
1010 }
1011 data->last_updated = jiffies;
1012 data->valid = 1;
1013 }
1014LEAVE_UPDATE:
1015 mutex_unlock(&data->update_lock);
1016 if (data->valid)
1017 return data;
1018 else
1019 return NULL;
1020}
1021
1022#ifdef CONFIG_PM
1023static int abituguru3_suspend(struct platform_device *pdev, pm_message_t state)
1024{
1025 struct abituguru3_data *data = platform_get_drvdata(pdev);
1026 /* make sure all communications with the uguru3 are done and no new
1027 ones are started */
1028 mutex_lock(&data->update_lock);
1029 return 0;
1030}
1031
1032static int abituguru3_resume(struct platform_device *pdev)
1033{
1034 struct abituguru3_data *data = platform_get_drvdata(pdev);
1035 mutex_unlock(&data->update_lock);
1036 return 0;
1037}
1038#else
1039#define abituguru3_suspend NULL
1040#define abituguru3_resume NULL
1041#endif /* CONFIG_PM */
1042
1043static struct platform_driver abituguru3_driver = {
1044 .driver = {
1045 .owner = THIS_MODULE,
1046 .name = ABIT_UGURU3_NAME,
1047 },
1048 .probe = abituguru3_probe,
1049 .remove = __devexit_p(abituguru3_remove),
1050 .suspend = abituguru3_suspend,
1051 .resume = abituguru3_resume
1052};
1053
1054static int __init abituguru3_detect(void)
1055{
1056 /* See if there is an uguru3 there. An idle uGuru3 will hold 0x00 or
1057 0x08 at DATA and 0xAC at CMD. Sometimes the uGuru3 will hold 0x05
1058 at CMD instead, why is unknown. So we test for 0x05 too. */
1059 u8 data_val = inb_p(ABIT_UGURU3_BASE + ABIT_UGURU3_DATA);
1060 u8 cmd_val = inb_p(ABIT_UGURU3_BASE + ABIT_UGURU3_CMD);
1061 if (((data_val == 0x00) || (data_val == 0x08)) &&
1062 ((cmd_val == 0xAC) || (cmd_val == 0x05)))
1063 return ABIT_UGURU3_BASE;
1064
1065 ABIT_UGURU3_DEBUG("no Abit uGuru3 found, data = 0x%02X, cmd = "
1066 "0x%02X\n", (unsigned int)data_val, (unsigned int)cmd_val);
1067
1068 if (force) {
1069 printk(KERN_INFO ABIT_UGURU3_NAME ": Assuming Abit uGuru3 is "
1070 "present because of \"force\" parameter\n");
1071 return ABIT_UGURU3_BASE;
1072 }
1073
1074 /* No uGuru3 found */
1075 return -ENODEV;
1076}
1077
1078static struct platform_device *abituguru3_pdev;
1079
1080static int __init abituguru3_init(void)
1081{
1082 int address, err;
1083 struct resource res = { .flags = IORESOURCE_IO };
1084
1085 address = abituguru3_detect();
1086 if (address < 0)
1087 return address;
1088
1089 err = platform_driver_register(&abituguru3_driver);
1090 if (err)
1091 goto exit;
1092
1093 abituguru3_pdev = platform_device_alloc(ABIT_UGURU3_NAME, address);
1094 if (!abituguru3_pdev) {
1095 printk(KERN_ERR ABIT_UGURU3_NAME
1096 ": Device allocation failed\n");
1097 err = -ENOMEM;
1098 goto exit_driver_unregister;
1099 }
1100
1101 res.start = address;
1102 res.end = address + ABIT_UGURU3_REGION_LENGTH - 1;
1103 res.name = ABIT_UGURU3_NAME;
1104
1105 err = platform_device_add_resources(abituguru3_pdev, &res, 1);
1106 if (err) {
1107 printk(KERN_ERR ABIT_UGURU3_NAME
1108 ": Device resource addition failed (%d)\n", err);
1109 goto exit_device_put;
1110 }
1111
1112 err = platform_device_add(abituguru3_pdev);
1113 if (err) {
1114 printk(KERN_ERR ABIT_UGURU3_NAME
1115 ": Device addition failed (%d)\n", err);
1116 goto exit_device_put;
1117 }
1118
1119 return 0;
1120
1121exit_device_put:
1122 platform_device_put(abituguru3_pdev);
1123exit_driver_unregister:
1124 platform_driver_unregister(&abituguru3_driver);
1125exit:
1126 return err;
1127}
1128
1129static void __exit abituguru3_exit(void)
1130{
1131 platform_device_unregister(abituguru3_pdev);
1132 platform_driver_unregister(&abituguru3_driver);
1133}
1134
1135MODULE_AUTHOR("Hans de Goede <j.w.r.degoede@hhs.nl>");
1136MODULE_DESCRIPTION("Abit uGuru3 Sensor device");
1137MODULE_LICENSE("GPL");
1138
1139module_init(abituguru3_init);
1140module_exit(abituguru3_exit);
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 6d54c8caed..7c1795225b 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -318,7 +318,7 @@ exit:
318} 318}
319 319
320#ifdef CONFIG_HOTPLUG_CPU 320#ifdef CONFIG_HOTPLUG_CPU
321void coretemp_device_remove(unsigned int cpu) 321static void coretemp_device_remove(unsigned int cpu)
322{ 322{
323 struct pdev_entry *p, *n; 323 struct pdev_entry *p, *n;
324 mutex_lock(&pdev_list_mutex); 324 mutex_lock(&pdev_list_mutex);
diff --git a/drivers/hwmon/dme1737.c b/drivers/hwmon/dme1737.c
new file mode 100644
index 0000000000..be3aaa5d0b
--- /dev/null
+++ b/drivers/hwmon/dme1737.c
@@ -0,0 +1,2080 @@
1/*
2 * dme1737.c - driver for the SMSC DME1737 and Asus A8000 Super-I/O chips
3 * integrated hardware monitoring features.
4 * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com>
5 *
6 * This driver is based on the LM85 driver. The hardware monitoring
7 * capabilities of the DME1737 are very similar to the LM85 with some
8 * additional features. Even though the DME1737 is a Super-I/O chip, the
9 * hardware monitoring registers are only accessible via SMBus.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/slab.h>
29#include <linux/jiffies.h>
30#include <linux/i2c.h>
31#include <linux/hwmon.h>
32#include <linux/hwmon-sysfs.h>
33#include <linux/hwmon-vid.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36#include <asm/io.h>
37
38/* Module load parameters */
39static int force_start;
40module_param(force_start, bool, 0);
41MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
42
43/* Addresses to scan */
44static unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
45
46/* Insmod parameters */
47I2C_CLIENT_INSMOD_1(dme1737);
48
49/* ---------------------------------------------------------------------
50 * Registers
51 *
52 * The sensors are defined as follows:
53 *
54 * Voltages Temperatures
55 * -------- ------------
56 * in0 +5VTR (+5V stdby) temp1 Remote diode 1
57 * in1 Vccp (proc core) temp2 Internal temp
58 * in2 VCC (internal +3.3V) temp3 Remote diode 2
59 * in3 +5V
60 * in4 +12V
61 * in5 VTR (+3.3V stby)
62 * in6 Vbat
63 *
64 * --------------------------------------------------------------------- */
65
66/* Voltages (in) numbered 0-6 (ix) */
67#define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \
68 : 0x94 + (ix))
69#define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \
70 : 0x91 + (ix) * 2)
71#define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \
72 : 0x92 + (ix) * 2)
73
74/* Temperatures (temp) numbered 0-2 (ix) */
75#define DME1737_REG_TEMP(ix) (0x25 + (ix))
76#define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2)
77#define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2)
78#define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \
79 : 0x1c + (ix))
80
81/* Voltage and temperature LSBs
82 * The LSBs (4 bits each) are stored in 5 registers with the following layouts:
83 * IN_TEMP_LSB(0) = [in5, in6]
84 * IN_TEMP_LSB(1) = [temp3, temp1]
85 * IN_TEMP_LSB(2) = [in4, temp2]
86 * IN_TEMP_LSB(3) = [in3, in0]
87 * IN_TEMP_LSB(4) = [in2, in1] */
88#define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix))
89static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0};
90static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4};
91static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1};
92static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0};
93
94/* Fans numbered 0-5 (ix) */
95#define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \
96 : 0xa1 + (ix) * 2)
97#define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \
98 : 0xa5 + (ix) * 2)
99#define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \
100 : 0xb2 + (ix))
101#define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */
102
103/* PWMs numbered 0-2, 4-5 (ix) */
104#define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \
105 : 0xa1 + (ix))
106#define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */
107#define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */
108#define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \
109 : 0xa3 + (ix))
110/* The layout of the ramp rate registers is different from the other pwm
111 * registers. The bits for the 3 PWMs are stored in 2 registers:
112 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0]
113 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */
114#define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */
115
116/* Thermal zones 0-2 */
117#define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix))
118#define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix))
119/* The layout of the hysteresis registers is different from the other zone
120 * registers. The bits for the 3 zones are stored in 2 registers:
121 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
122 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */
123#define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix))
124
125/* Alarm registers and bit mapping
126 * The 3 8-bit alarm registers will be concatenated to a single 32-bit
127 * alarm value [0, ALARM3, ALARM2, ALARM1]. */
128#define DME1737_REG_ALARM1 0x41
129#define DME1737_REG_ALARM2 0x42
130#define DME1737_REG_ALARM3 0x83
131static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17};
132static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6};
133static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
134
135/* Miscellaneous registers */
136#define DME1737_REG_COMPANY 0x3e
137#define DME1737_REG_VERSTEP 0x3f
138#define DME1737_REG_CONFIG 0x40
139#define DME1737_REG_CONFIG2 0x7f
140#define DME1737_REG_VID 0x43
141#define DME1737_REG_TACH_PWM 0x81
142
143/* ---------------------------------------------------------------------
144 * Misc defines
145 * --------------------------------------------------------------------- */
146
147/* Chip identification */
148#define DME1737_COMPANY_SMSC 0x5c
149#define DME1737_VERSTEP 0x88
150#define DME1737_VERSTEP_MASK 0xf8
151
152/* ---------------------------------------------------------------------
153 * Data structures and manipulation thereof
154 * --------------------------------------------------------------------- */
155
156struct dme1737_data {
157 struct i2c_client client;
158 struct class_device *class_dev;
159
160 struct mutex update_lock;
161 int valid; /* !=0 if following fields are valid */
162 unsigned long last_update; /* in jiffies */
163 unsigned long last_vbat; /* in jiffies */
164
165 u8 vid;
166 u8 pwm_rr_en;
167 u8 has_pwm;
168 u8 has_fan;
169
170 /* Register values */
171 u16 in[7];
172 u8 in_min[7];
173 u8 in_max[7];
174 s16 temp[3];
175 s8 temp_min[3];
176 s8 temp_max[3];
177 s8 temp_offset[3];
178 u8 config;
179 u8 config2;
180 u8 vrm;
181 u16 fan[6];
182 u16 fan_min[6];
183 u8 fan_max[2];
184 u8 fan_opt[6];
185 u8 pwm[6];
186 u8 pwm_min[3];
187 u8 pwm_config[3];
188 u8 pwm_acz[3];
189 u8 pwm_freq[6];
190 u8 pwm_rr[2];
191 u8 zone_low[3];
192 u8 zone_abs[3];
193 u8 zone_hyst[2];
194 u32 alarms;
195};
196
197/* Nominal voltage values */
198static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300};
199
200/* Voltage input
201 * Voltage inputs have 16 bits resolution, limit values have 8 bits
202 * resolution. */
203static inline int IN_FROM_REG(int reg, int ix, int res)
204{
205 return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2));
206}
207
208static inline int IN_TO_REG(int val, int ix)
209{
210 return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) /
211 IN_NOMINAL[ix], 0, 255);
212}
213
214/* Temperature input
215 * The register values represent temperatures in 2's complement notation from
216 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
217 * values have 8 bits resolution. */
218static inline int TEMP_FROM_REG(int reg, int res)
219{
220 return (reg * 1000) >> (res - 8);
221}
222
223static inline int TEMP_TO_REG(int val)
224{
225 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000,
226 -128, 127);
227}
228
229/* Temperature range */
230static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
231 10000, 13333, 16000, 20000, 26666, 32000,
232 40000, 53333, 80000};
233
234static inline int TEMP_RANGE_FROM_REG(int reg)
235{
236 return TEMP_RANGE[(reg >> 4) & 0x0f];
237}
238
239static int TEMP_RANGE_TO_REG(int val, int reg)
240{
241 int i;
242
243 for (i = 15; i > 0; i--) {
244 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) {
245 break;
246 }
247 }
248
249 return (reg & 0x0f) | (i << 4);
250}
251
252/* Temperature hysteresis
253 * Register layout:
254 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
255 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */
256static inline int TEMP_HYST_FROM_REG(int reg, int ix)
257{
258 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000;
259}
260
261static inline int TEMP_HYST_TO_REG(int val, int ix, int reg)
262{
263 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15);
264
265 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4);
266}
267
268/* Fan input RPM */
269static inline int FAN_FROM_REG(int reg, int tpc)
270{
271 return (reg == 0 || reg == 0xffff) ? 0 :
272 (tpc == 0) ? 90000 * 60 / reg : tpc * reg;
273}
274
275static inline int FAN_TO_REG(int val, int tpc)
276{
277 return SENSORS_LIMIT((tpc == 0) ? 90000 * 60 / val : val / tpc,
278 0, 0xffff);
279}
280
281/* Fan TPC (tach pulse count)
282 * Converts a register value to a TPC multiplier or returns 0 if the tachometer
283 * is configured in legacy (non-tpc) mode */
284static inline int FAN_TPC_FROM_REG(int reg)
285{
286 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03);
287}
288
289/* Fan type
290 * The type of a fan is expressed in number of pulses-per-revolution that it
291 * emits */
292static inline int FAN_TYPE_FROM_REG(int reg)
293{
294 int edge = (reg >> 1) & 0x03;
295
296 return (edge > 0) ? 1 << (edge - 1) : 0;
297}
298
299static inline int FAN_TYPE_TO_REG(int val, int reg)
300{
301 int edge = (val == 4) ? 3 : val;
302
303 return (reg & 0xf9) | (edge << 1);
304}
305
306/* Fan max RPM */
307static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
308 0x11, 0x0f, 0x0e};
309
310static int FAN_MAX_FROM_REG(int reg)
311{
312 int i;
313
314 for (i = 10; i > 0; i--) {
315 if (reg == FAN_MAX[i]) {
316 break;
317 }
318 }
319
320 return 1000 + i * 500;
321}
322
323static int FAN_MAX_TO_REG(int val)
324{
325 int i;
326
327 for (i = 10; i > 0; i--) {
328 if (val > (1000 + (i - 1) * 500)) {
329 break;
330 }
331 }
332
333 return FAN_MAX[i];
334}
335
336/* PWM enable
337 * Register to enable mapping:
338 * 000: 2 fan on zone 1 auto
339 * 001: 2 fan on zone 2 auto
340 * 010: 2 fan on zone 3 auto
341 * 011: 0 fan full on
342 * 100: -1 fan disabled
343 * 101: 2 fan on hottest of zones 2,3 auto
344 * 110: 2 fan on hottest of zones 1,2,3 auto
345 * 111: 1 fan in manual mode */
346static inline int PWM_EN_FROM_REG(int reg)
347{
348 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1};
349
350 return en[(reg >> 5) & 0x07];
351}
352
353static inline int PWM_EN_TO_REG(int val, int reg)
354{
355 int en = (val == 1) ? 7 : 3;
356
357 return (reg & 0x1f) | ((en & 0x07) << 5);
358}
359
360/* PWM auto channels zone
361 * Register to auto channels zone mapping (ACZ is a bitfield with bit x
362 * corresponding to zone x+1):
363 * 000: 001 fan on zone 1 auto
364 * 001: 010 fan on zone 2 auto
365 * 010: 100 fan on zone 3 auto
366 * 011: 000 fan full on
367 * 100: 000 fan disabled
368 * 101: 110 fan on hottest of zones 2,3 auto
369 * 110: 111 fan on hottest of zones 1,2,3 auto
370 * 111: 000 fan in manual mode */
371static inline int PWM_ACZ_FROM_REG(int reg)
372{
373 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0};
374
375 return acz[(reg >> 5) & 0x07];
376}
377
378static inline int PWM_ACZ_TO_REG(int val, int reg)
379{
380 int acz = (val == 4) ? 2 : val - 1;
381
382 return (reg & 0x1f) | ((acz & 0x07) << 5);
383}
384
385/* PWM frequency */
386static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88,
387 15000, 20000, 30000, 25000, 0, 0, 0, 0};
388
389static inline int PWM_FREQ_FROM_REG(int reg)
390{
391 return PWM_FREQ[reg & 0x0f];
392}
393
394static int PWM_FREQ_TO_REG(int val, int reg)
395{
396 int i;
397
398 /* the first two cases are special - stupid chip design! */
399 if (val > 27500) {
400 i = 10;
401 } else if (val > 22500) {
402 i = 11;
403 } else {
404 for (i = 9; i > 0; i--) {
405 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) {
406 break;
407 }
408 }
409 }
410
411 return (reg & 0xf0) | i;
412}
413
414/* PWM ramp rate
415 * Register layout:
416 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0]
417 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */
418static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5};
419
420static inline int PWM_RR_FROM_REG(int reg, int ix)
421{
422 int rr = (ix == 1) ? reg >> 4 : reg;
423
424 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0;
425}
426
427static int PWM_RR_TO_REG(int val, int ix, int reg)
428{
429 int i;
430
431 for (i = 0; i < 7; i++) {
432 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) {
433 break;
434 }
435 }
436
437 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i;
438}
439
440/* PWM ramp rate enable */
441static inline int PWM_RR_EN_FROM_REG(int reg, int ix)
442{
443 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0;
444}
445
446static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg)
447{
448 int en = (ix == 1) ? 0x80 : 0x08;
449
450 return val ? reg | en : reg & ~en;
451}
452
453/* PWM min/off
454 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
455 * the register layout). */
456static inline int PWM_OFF_FROM_REG(int reg, int ix)
457{
458 return (reg >> (ix + 5)) & 0x01;
459}
460
461static inline int PWM_OFF_TO_REG(int val, int ix, int reg)
462{
463 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5));
464}
465
466/* ---------------------------------------------------------------------
467 * Device I/O access
468 * --------------------------------------------------------------------- */
469
470static u8 dme1737_read(struct i2c_client *client, u8 reg)
471{
472 s32 val = i2c_smbus_read_byte_data(client, reg);
473
474 if (val < 0) {
475 dev_warn(&client->dev, "Read from register 0x%02x failed! "
476 "Please report to the driver maintainer.\n", reg);
477 }
478
479 return val;
480}
481
482static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 value)
483{
484 s32 res = i2c_smbus_write_byte_data(client, reg, value);
485
486 if (res < 0) {
487 dev_warn(&client->dev, "Write to register 0x%02x failed! "
488 "Please report to the driver maintainer.\n", reg);
489 }
490
491 return res;
492}
493
494static struct dme1737_data *dme1737_update_device(struct device *dev)
495{
496 struct i2c_client *client = to_i2c_client(dev);
497 struct dme1737_data *data = i2c_get_clientdata(client);
498 int ix;
499 u8 lsb[5];
500
501 mutex_lock(&data->update_lock);
502
503 /* Enable a Vbat monitoring cycle every 10 mins */
504 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
505 dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client,
506 DME1737_REG_CONFIG) | 0x10);
507 data->last_vbat = jiffies;
508 }
509
510 /* Sample register contents every 1 sec */
511 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
512 data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f;
513
514 /* In (voltage) registers */
515 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
516 /* Voltage inputs are stored as 16 bit values even
517 * though they have only 12 bits resolution. This is
518 * to make it consistent with the temp inputs. */
519 data->in[ix] = dme1737_read(client,
520 DME1737_REG_IN(ix)) << 8;
521 data->in_min[ix] = dme1737_read(client,
522 DME1737_REG_IN_MIN(ix));
523 data->in_max[ix] = dme1737_read(client,
524 DME1737_REG_IN_MAX(ix));
525 }
526
527 /* Temp registers */
528 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
529 /* Temp inputs are stored as 16 bit values even
530 * though they have only 12 bits resolution. This is
531 * to take advantage of implicit conversions between
532 * register values (2's complement) and temp values
533 * (signed decimal). */
534 data->temp[ix] = dme1737_read(client,
535 DME1737_REG_TEMP(ix)) << 8;
536 data->temp_min[ix] = dme1737_read(client,
537 DME1737_REG_TEMP_MIN(ix));
538 data->temp_max[ix] = dme1737_read(client,
539 DME1737_REG_TEMP_MAX(ix));
540 data->temp_offset[ix] = dme1737_read(client,
541 DME1737_REG_TEMP_OFFSET(ix));
542 }
543
544 /* In and temp LSB registers
545 * The LSBs are latched when the MSBs are read, so the order in
546 * which the registers are read (MSB first, then LSB) is
547 * important! */
548 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
549 lsb[ix] = dme1737_read(client,
550 DME1737_REG_IN_TEMP_LSB(ix));
551 }
552 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
553 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
554 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0;
555 }
556 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
557 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
558 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0;
559 }
560
561 /* Fan registers */
562 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
563 /* Skip reading registers if optional fans are not
564 * present */
565 if (!(data->has_fan & (1 << ix))) {
566 continue;
567 }
568 data->fan[ix] = dme1737_read(client,
569 DME1737_REG_FAN(ix));
570 data->fan[ix] |= dme1737_read(client,
571 DME1737_REG_FAN(ix) + 1) << 8;
572 data->fan_min[ix] = dme1737_read(client,
573 DME1737_REG_FAN_MIN(ix));
574 data->fan_min[ix] |= dme1737_read(client,
575 DME1737_REG_FAN_MIN(ix) + 1) << 8;
576 data->fan_opt[ix] = dme1737_read(client,
577 DME1737_REG_FAN_OPT(ix));
578 /* fan_max exists only for fan[5-6] */
579 if (ix > 3) {
580 data->fan_max[ix - 4] = dme1737_read(client,
581 DME1737_REG_FAN_MAX(ix));
582 }
583 }
584
585 /* PWM registers */
586 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
587 /* Skip reading registers if optional PWMs are not
588 * present */
589 if (!(data->has_pwm & (1 << ix))) {
590 continue;
591 }
592 data->pwm[ix] = dme1737_read(client,
593 DME1737_REG_PWM(ix));
594 data->pwm_freq[ix] = dme1737_read(client,
595 DME1737_REG_PWM_FREQ(ix));
596 /* pwm_config and pwm_min exist only for pwm[1-3] */
597 if (ix < 3) {
598 data->pwm_config[ix] = dme1737_read(client,
599 DME1737_REG_PWM_CONFIG(ix));
600 data->pwm_min[ix] = dme1737_read(client,
601 DME1737_REG_PWM_MIN(ix));
602 }
603 }
604 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
605 data->pwm_rr[ix] = dme1737_read(client,
606 DME1737_REG_PWM_RR(ix));
607 }
608
609 /* Thermal zone registers */
610 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
611 data->zone_low[ix] = dme1737_read(client,
612 DME1737_REG_ZONE_LOW(ix));
613 data->zone_abs[ix] = dme1737_read(client,
614 DME1737_REG_ZONE_ABS(ix));
615 }
616 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
617 data->zone_hyst[ix] = dme1737_read(client,
618 DME1737_REG_ZONE_HYST(ix));
619 }
620
621 /* Alarm registers */
622 data->alarms = dme1737_read(client,
623 DME1737_REG_ALARM1);
624 /* Bit 7 tells us if the other alarm registers are non-zero and
625 * therefore also need to be read */
626 if (data->alarms & 0x80) {
627 data->alarms |= dme1737_read(client,
628 DME1737_REG_ALARM2) << 8;
629 data->alarms |= dme1737_read(client,
630 DME1737_REG_ALARM3) << 16;
631 }
632
633 data->last_update = jiffies;
634 data->valid = 1;
635 }
636
637 mutex_unlock(&data->update_lock);
638
639 return data;
640}
641
642/* ---------------------------------------------------------------------
643 * Voltage sysfs attributes
644 * ix = [0-5]
645 * --------------------------------------------------------------------- */
646
647#define SYS_IN_INPUT 0
648#define SYS_IN_MIN 1
649#define SYS_IN_MAX 2
650#define SYS_IN_ALARM 3
651
652static ssize_t show_in(struct device *dev, struct device_attribute *attr,
653 char *buf)
654{
655 struct dme1737_data *data = dme1737_update_device(dev);
656 struct sensor_device_attribute_2
657 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
658 int ix = sensor_attr_2->index;
659 int fn = sensor_attr_2->nr;
660 int res;
661
662 switch (fn) {
663 case SYS_IN_INPUT:
664 res = IN_FROM_REG(data->in[ix], ix, 16);
665 break;
666 case SYS_IN_MIN:
667 res = IN_FROM_REG(data->in_min[ix], ix, 8);
668 break;
669 case SYS_IN_MAX:
670 res = IN_FROM_REG(data->in_max[ix], ix, 8);
671 break;
672 case SYS_IN_ALARM:
673 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
674 break;
675 default:
676 res = 0;
677 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
678 }
679
680 return sprintf(buf, "%d\n", res);
681}
682
683static ssize_t set_in(struct device *dev, struct device_attribute *attr,
684 const char *buf, size_t count)
685{
686 struct i2c_client *client = to_i2c_client(dev);
687 struct dme1737_data *data = i2c_get_clientdata(client);
688 struct sensor_device_attribute_2
689 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
690 int ix = sensor_attr_2->index;
691 int fn = sensor_attr_2->nr;
692 long val = simple_strtol(buf, NULL, 10);
693
694 mutex_lock(&data->update_lock);
695 switch (fn) {
696 case SYS_IN_MIN:
697 data->in_min[ix] = IN_TO_REG(val, ix);
698 dme1737_write(client, DME1737_REG_IN_MIN(ix),
699 data->in_min[ix]);
700 break;
701 case SYS_IN_MAX:
702 data->in_max[ix] = IN_TO_REG(val, ix);
703 dme1737_write(client, DME1737_REG_IN_MAX(ix),
704 data->in_max[ix]);
705 break;
706 default:
707 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
708 }
709 mutex_unlock(&data->update_lock);
710
711 return count;
712}
713
714/* ---------------------------------------------------------------------
715 * Temperature sysfs attributes
716 * ix = [0-2]
717 * --------------------------------------------------------------------- */
718
719#define SYS_TEMP_INPUT 0
720#define SYS_TEMP_MIN 1
721#define SYS_TEMP_MAX 2
722#define SYS_TEMP_OFFSET 3
723#define SYS_TEMP_ALARM 4
724#define SYS_TEMP_FAULT 5
725
726static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
727 char *buf)
728{
729 struct dme1737_data *data = dme1737_update_device(dev);
730 struct sensor_device_attribute_2
731 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
732 int ix = sensor_attr_2->index;
733 int fn = sensor_attr_2->nr;
734 int res;
735
736 switch (fn) {
737 case SYS_TEMP_INPUT:
738 res = TEMP_FROM_REG(data->temp[ix], 16);
739 break;
740 case SYS_TEMP_MIN:
741 res = TEMP_FROM_REG(data->temp_min[ix], 8);
742 break;
743 case SYS_TEMP_MAX:
744 res = TEMP_FROM_REG(data->temp_max[ix], 8);
745 break;
746 case SYS_TEMP_OFFSET:
747 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
748 break;
749 case SYS_TEMP_ALARM:
750 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
751 break;
752 case SYS_TEMP_FAULT:
753 res = (data->temp[ix] == 0x0800);
754 break;
755 default:
756 res = 0;
757 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
758 }
759
760 return sprintf(buf, "%d\n", res);
761}
762
763static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
764 const char *buf, size_t count)
765{
766 struct i2c_client *client = to_i2c_client(dev);
767 struct dme1737_data *data = i2c_get_clientdata(client);
768 struct sensor_device_attribute_2
769 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
770 int ix = sensor_attr_2->index;
771 int fn = sensor_attr_2->nr;
772 long val = simple_strtol(buf, NULL, 10);
773
774 mutex_lock(&data->update_lock);
775 switch (fn) {
776 case SYS_TEMP_MIN:
777 data->temp_min[ix] = TEMP_TO_REG(val);
778 dme1737_write(client, DME1737_REG_TEMP_MIN(ix),
779 data->temp_min[ix]);
780 break;
781 case SYS_TEMP_MAX:
782 data->temp_max[ix] = TEMP_TO_REG(val);
783 dme1737_write(client, DME1737_REG_TEMP_MAX(ix),
784 data->temp_max[ix]);
785 break;
786 case SYS_TEMP_OFFSET:
787 data->temp_offset[ix] = TEMP_TO_REG(val);
788 dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix),
789 data->temp_offset[ix]);
790 break;
791 default:
792 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
793 }
794 mutex_unlock(&data->update_lock);
795
796 return count;
797}
798
799/* ---------------------------------------------------------------------
800 * Zone sysfs attributes
801 * ix = [0-2]
802 * --------------------------------------------------------------------- */
803
804#define SYS_ZONE_AUTO_CHANNELS_TEMP 0
805#define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1
806#define SYS_ZONE_AUTO_POINT1_TEMP 2
807#define SYS_ZONE_AUTO_POINT2_TEMP 3
808#define SYS_ZONE_AUTO_POINT3_TEMP 4
809
810static ssize_t show_zone(struct device *dev, struct device_attribute *attr,
811 char *buf)
812{
813 struct dme1737_data *data = dme1737_update_device(dev);
814 struct sensor_device_attribute_2
815 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
816 int ix = sensor_attr_2->index;
817 int fn = sensor_attr_2->nr;
818 int res;
819
820 switch (fn) {
821 case SYS_ZONE_AUTO_CHANNELS_TEMP:
822 /* check config2 for non-standard temp-to-zone mapping */
823 if ((ix == 1) && (data->config2 & 0x02)) {
824 res = 4;
825 } else {
826 res = 1 << ix;
827 }
828 break;
829 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
830 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
831 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
832 break;
833 case SYS_ZONE_AUTO_POINT1_TEMP:
834 res = TEMP_FROM_REG(data->zone_low[ix], 8);
835 break;
836 case SYS_ZONE_AUTO_POINT2_TEMP:
837 /* pwm_freq holds the temp range bits in the upper nibble */
838 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
839 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
840 break;
841 case SYS_ZONE_AUTO_POINT3_TEMP:
842 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
843 break;
844 default:
845 res = 0;
846 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
847 }
848
849 return sprintf(buf, "%d\n", res);
850}
851
852static ssize_t set_zone(struct device *dev, struct device_attribute *attr,
853 const char *buf, size_t count)
854{
855 struct i2c_client *client = to_i2c_client(dev);
856 struct dme1737_data *data = i2c_get_clientdata(client);
857 struct sensor_device_attribute_2
858 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
859 int ix = sensor_attr_2->index;
860 int fn = sensor_attr_2->nr;
861 long val = simple_strtol(buf, NULL, 10);
862
863 mutex_lock(&data->update_lock);
864 switch (fn) {
865 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
866 /* Refresh the cache */
867 data->zone_low[ix] = dme1737_read(client,
868 DME1737_REG_ZONE_LOW(ix));
869 /* Modify the temp hyst value */
870 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(
871 TEMP_FROM_REG(data->zone_low[ix], 8) -
872 val, ix, dme1737_read(client,
873 DME1737_REG_ZONE_HYST(ix == 2)));
874 dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2),
875 data->zone_hyst[ix == 2]);
876 break;
877 case SYS_ZONE_AUTO_POINT1_TEMP:
878 data->zone_low[ix] = TEMP_TO_REG(val);
879 dme1737_write(client, DME1737_REG_ZONE_LOW(ix),
880 data->zone_low[ix]);
881 break;
882 case SYS_ZONE_AUTO_POINT2_TEMP:
883 /* Refresh the cache */
884 data->zone_low[ix] = dme1737_read(client,
885 DME1737_REG_ZONE_LOW(ix));
886 /* Modify the temp range value (which is stored in the upper
887 * nibble of the pwm_freq register) */
888 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val -
889 TEMP_FROM_REG(data->zone_low[ix], 8),
890 dme1737_read(client,
891 DME1737_REG_PWM_FREQ(ix)));
892 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
893 data->pwm_freq[ix]);
894 break;
895 case SYS_ZONE_AUTO_POINT3_TEMP:
896 data->zone_abs[ix] = TEMP_TO_REG(val);
897 dme1737_write(client, DME1737_REG_ZONE_ABS(ix),
898 data->zone_abs[ix]);
899 break;
900 default:
901 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
902 }
903 mutex_unlock(&data->update_lock);
904
905 return count;
906}
907
908/* ---------------------------------------------------------------------
909 * Fan sysfs attributes
910 * ix = [0-5]
911 * --------------------------------------------------------------------- */
912
913#define SYS_FAN_INPUT 0
914#define SYS_FAN_MIN 1
915#define SYS_FAN_MAX 2
916#define SYS_FAN_ALARM 3
917#define SYS_FAN_TYPE 4
918
919static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
920 char *buf)
921{
922 struct dme1737_data *data = dme1737_update_device(dev);
923 struct sensor_device_attribute_2
924 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
925 int ix = sensor_attr_2->index;
926 int fn = sensor_attr_2->nr;
927 int res;
928
929 switch (fn) {
930 case SYS_FAN_INPUT:
931 res = FAN_FROM_REG(data->fan[ix],
932 ix < 4 ? 0 :
933 FAN_TPC_FROM_REG(data->fan_opt[ix]));
934 break;
935 case SYS_FAN_MIN:
936 res = FAN_FROM_REG(data->fan_min[ix],
937 ix < 4 ? 0 :
938 FAN_TPC_FROM_REG(data->fan_opt[ix]));
939 break;
940 case SYS_FAN_MAX:
941 /* only valid for fan[5-6] */
942 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
943 break;
944 case SYS_FAN_ALARM:
945 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
946 break;
947 case SYS_FAN_TYPE:
948 /* only valid for fan[1-4] */
949 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
950 break;
951 default:
952 res = 0;
953 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
954 }
955
956 return sprintf(buf, "%d\n", res);
957}
958
959static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
960 const char *buf, size_t count)
961{
962 struct i2c_client *client = to_i2c_client(dev);
963 struct dme1737_data *data = i2c_get_clientdata(client);
964 struct sensor_device_attribute_2
965 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
966 int ix = sensor_attr_2->index;
967 int fn = sensor_attr_2->nr;
968 long val = simple_strtol(buf, NULL, 10);
969
970 mutex_lock(&data->update_lock);
971 switch (fn) {
972 case SYS_FAN_MIN:
973 if (ix < 4) {
974 data->fan_min[ix] = FAN_TO_REG(val, 0);
975 } else {
976 /* Refresh the cache */
977 data->fan_opt[ix] = dme1737_read(client,
978 DME1737_REG_FAN_OPT(ix));
979 /* Modify the fan min value */
980 data->fan_min[ix] = FAN_TO_REG(val,
981 FAN_TPC_FROM_REG(data->fan_opt[ix]));
982 }
983 dme1737_write(client, DME1737_REG_FAN_MIN(ix),
984 data->fan_min[ix] & 0xff);
985 dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1,
986 data->fan_min[ix] >> 8);
987 break;
988 case SYS_FAN_MAX:
989 /* Only valid for fan[5-6] */
990 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
991 dme1737_write(client, DME1737_REG_FAN_MAX(ix),
992 data->fan_max[ix - 4]);
993 break;
994 case SYS_FAN_TYPE:
995 /* Only valid for fan[1-4] */
996 if (!(val == 1 || val == 2 || val == 4)) {
997 count = -EINVAL;
998 dev_warn(&client->dev, "Fan type value %ld not "
999 "supported. Choose one of 1, 2, or 4.\n",
1000 val);
1001 goto exit;
1002 }
1003 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client,
1004 DME1737_REG_FAN_OPT(ix)));
1005 dme1737_write(client, DME1737_REG_FAN_OPT(ix),
1006 data->fan_opt[ix]);
1007 break;
1008 default:
1009 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
1010 }
1011exit:
1012 mutex_unlock(&data->update_lock);
1013
1014 return count;
1015}
1016
1017/* ---------------------------------------------------------------------
1018 * PWM sysfs attributes
1019 * ix = [0-4]
1020 * --------------------------------------------------------------------- */
1021
1022#define SYS_PWM 0
1023#define SYS_PWM_FREQ 1
1024#define SYS_PWM_ENABLE 2
1025#define SYS_PWM_RAMP_RATE 3
1026#define SYS_PWM_AUTO_CHANNELS_ZONE 4
1027#define SYS_PWM_AUTO_PWM_MIN 5
1028#define SYS_PWM_AUTO_POINT1_PWM 6
1029#define SYS_PWM_AUTO_POINT2_PWM 7
1030
1031static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1032 char *buf)
1033{
1034 struct dme1737_data *data = dme1737_update_device(dev);
1035 struct sensor_device_attribute_2
1036 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1037 int ix = sensor_attr_2->index;
1038 int fn = sensor_attr_2->nr;
1039 int res;
1040
1041 switch (fn) {
1042 case SYS_PWM:
1043 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) {
1044 res = 255;
1045 } else {
1046 res = data->pwm[ix];
1047 }
1048 break;
1049 case SYS_PWM_FREQ:
1050 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1051 break;
1052 case SYS_PWM_ENABLE:
1053 if (ix > 3) {
1054 res = 1; /* pwm[5-6] hard-wired to manual mode */
1055 } else {
1056 res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1057 }
1058 break;
1059 case SYS_PWM_RAMP_RATE:
1060 /* Only valid for pwm[1-3] */
1061 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1062 break;
1063 case SYS_PWM_AUTO_CHANNELS_ZONE:
1064 /* Only valid for pwm[1-3] */
1065 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1066 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1067 } else {
1068 res = data->pwm_acz[ix];
1069 }
1070 break;
1071 case SYS_PWM_AUTO_PWM_MIN:
1072 /* Only valid for pwm[1-3] */
1073 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) {
1074 res = data->pwm_min[ix];
1075 } else {
1076 res = 0;
1077 }
1078 break;
1079 case SYS_PWM_AUTO_POINT1_PWM:
1080 /* Only valid for pwm[1-3] */
1081 res = data->pwm_min[ix];
1082 break;
1083 case SYS_PWM_AUTO_POINT2_PWM:
1084 /* Only valid for pwm[1-3] */
1085 res = 255; /* hard-wired */
1086 break;
1087 default:
1088 res = 0;
1089 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
1090 }
1091
1092 return sprintf(buf, "%d\n", res);
1093}
1094
1095static struct attribute *dme1737_attr_pwm[];
1096static void dme1737_chmod_file(struct i2c_client*, struct attribute*, mode_t);
1097
1098static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1099 const char *buf, size_t count)
1100{
1101 struct i2c_client *client = to_i2c_client(dev);
1102 struct dme1737_data *data = i2c_get_clientdata(client);
1103 struct sensor_device_attribute_2
1104 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1105 int ix = sensor_attr_2->index;
1106 int fn = sensor_attr_2->nr;
1107 long val = simple_strtol(buf, NULL, 10);
1108
1109 mutex_lock(&data->update_lock);
1110 switch (fn) {
1111 case SYS_PWM:
1112 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255);
1113 dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]);
1114 break;
1115 case SYS_PWM_FREQ:
1116 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client,
1117 DME1737_REG_PWM_FREQ(ix)));
1118 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
1119 data->pwm_freq[ix]);
1120 break;
1121 case SYS_PWM_ENABLE:
1122 /* Only valid for pwm[1-3] */
1123 if (val < 0 || val > 2) {
1124 count = -EINVAL;
1125 dev_warn(&client->dev, "PWM enable %ld not "
1126 "supported. Choose one of 0, 1, or 2.\n",
1127 val);
1128 goto exit;
1129 }
1130 /* Refresh the cache */
1131 data->pwm_config[ix] = dme1737_read(client,
1132 DME1737_REG_PWM_CONFIG(ix));
1133 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1134 /* Bail out if no change */
1135 goto exit;
1136 }
1137 /* Do some housekeeping if we are currently in auto mode */
1138 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1139 /* Save the current zone channel assignment */
1140 data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1141 data->pwm_config[ix]);
1142 /* Save the current ramp rate state and disable it */
1143 data->pwm_rr[ix > 0] = dme1737_read(client,
1144 DME1737_REG_PWM_RR(ix > 0));
1145 data->pwm_rr_en &= ~(1 << ix);
1146 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1147 data->pwm_rr_en |= (1 << ix);
1148 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1149 data->pwm_rr[ix > 0]);
1150 dme1737_write(client,
1151 DME1737_REG_PWM_RR(ix > 0),
1152 data->pwm_rr[ix > 0]);
1153 }
1154 }
1155 /* Set the new PWM mode */
1156 switch (val) {
1157 case 0:
1158 /* Change permissions of pwm[ix] to read-only */
1159 dme1737_chmod_file(client, dme1737_attr_pwm[ix],
1160 S_IRUGO);
1161 /* Turn fan fully on */
1162 data->pwm_config[ix] = PWM_EN_TO_REG(0,
1163 data->pwm_config[ix]);
1164 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1165 data->pwm_config[ix]);
1166 break;
1167 case 1:
1168 /* Turn on manual mode */
1169 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1170 data->pwm_config[ix]);
1171 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1172 data->pwm_config[ix]);
1173 /* Change permissions of pwm[ix] to read-writeable */
1174 dme1737_chmod_file(client, dme1737_attr_pwm[ix],
1175 S_IRUGO | S_IWUSR);
1176 break;
1177 case 2:
1178 /* Change permissions of pwm[ix] to read-only */
1179 dme1737_chmod_file(client, dme1737_attr_pwm[ix],
1180 S_IRUGO);
1181 /* Turn on auto mode using the saved zone channel
1182 * assignment */
1183 data->pwm_config[ix] = PWM_ACZ_TO_REG(
1184 data->pwm_acz[ix],
1185 data->pwm_config[ix]);
1186 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1187 data->pwm_config[ix]);
1188 /* Enable PWM ramp rate if previously enabled */
1189 if (data->pwm_rr_en & (1 << ix)) {
1190 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1191 dme1737_read(client,
1192 DME1737_REG_PWM_RR(ix > 0)));
1193 dme1737_write(client,
1194 DME1737_REG_PWM_RR(ix > 0),
1195 data->pwm_rr[ix > 0]);
1196 }
1197 break;
1198 }
1199 break;
1200 case SYS_PWM_RAMP_RATE:
1201 /* Only valid for pwm[1-3] */
1202 /* Refresh the cache */
1203 data->pwm_config[ix] = dme1737_read(client,
1204 DME1737_REG_PWM_CONFIG(ix));
1205 data->pwm_rr[ix > 0] = dme1737_read(client,
1206 DME1737_REG_PWM_RR(ix > 0));
1207 /* Set the ramp rate value */
1208 if (val > 0) {
1209 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1210 data->pwm_rr[ix > 0]);
1211 }
1212 /* Enable/disable the feature only if the associated PWM
1213 * output is in automatic mode. */
1214 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1215 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1216 data->pwm_rr[ix > 0]);
1217 }
1218 dme1737_write(client, DME1737_REG_PWM_RR(ix > 0),
1219 data->pwm_rr[ix > 0]);
1220 break;
1221 case SYS_PWM_AUTO_CHANNELS_ZONE:
1222 /* Only valid for pwm[1-3] */
1223 if (!(val == 1 || val == 2 || val == 4 ||
1224 val == 6 || val == 7)) {
1225 count = -EINVAL;
1226 dev_warn(&client->dev, "PWM auto channels zone %ld "
1227 "not supported. Choose one of 1, 2, 4, 6, "
1228 "or 7.\n", val);
1229 goto exit;
1230 }
1231 /* Refresh the cache */
1232 data->pwm_config[ix] = dme1737_read(client,
1233 DME1737_REG_PWM_CONFIG(ix));
1234 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1235 /* PWM is already in auto mode so update the temp
1236 * channel assignment */
1237 data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1238 data->pwm_config[ix]);
1239 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1240 data->pwm_config[ix]);
1241 } else {
1242 /* PWM is not in auto mode so we save the temp
1243 * channel assignment for later use */
1244 data->pwm_acz[ix] = val;
1245 }
1246 break;
1247 case SYS_PWM_AUTO_PWM_MIN:
1248 /* Only valid for pwm[1-3] */
1249 /* Refresh the cache */
1250 data->pwm_min[ix] = dme1737_read(client,
1251 DME1737_REG_PWM_MIN(ix));
1252 /* There are only 2 values supported for the auto_pwm_min
1253 * value: 0 or auto_point1_pwm. So if the temperature drops
1254 * below the auto_point1_temp_hyst value, the fan either turns
1255 * off or runs at auto_point1_pwm duty-cycle. */
1256 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1257 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1258 dme1737_read(client,
1259 DME1737_REG_PWM_RR(0)));
1260
1261 } else {
1262 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1263 dme1737_read(client,
1264 DME1737_REG_PWM_RR(0)));
1265
1266 }
1267 dme1737_write(client, DME1737_REG_PWM_RR(0),
1268 data->pwm_rr[0]);
1269 break;
1270 case SYS_PWM_AUTO_POINT1_PWM:
1271 /* Only valid for pwm[1-3] */
1272 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255);
1273 dme1737_write(client, DME1737_REG_PWM_MIN(ix),
1274 data->pwm_min[ix]);
1275 break;
1276 default:
1277 dev_dbg(dev, "Unknown attr fetch (%d)\n", fn);
1278 }
1279exit:
1280 mutex_unlock(&data->update_lock);
1281
1282 return count;
1283}
1284
1285/* ---------------------------------------------------------------------
1286 * Miscellaneous sysfs attributes
1287 * --------------------------------------------------------------------- */
1288
1289static ssize_t show_vrm(struct device *dev, struct device_attribute *attr,
1290 char *buf)
1291{
1292 struct i2c_client *client = to_i2c_client(dev);
1293 struct dme1737_data *data = i2c_get_clientdata(client);
1294
1295 return sprintf(buf, "%d\n", data->vrm);
1296}
1297
1298static ssize_t set_vrm(struct device *dev, struct device_attribute *attr,
1299 const char *buf, size_t count)
1300{
1301 struct i2c_client *client = to_i2c_client(dev);
1302 struct dme1737_data *data = i2c_get_clientdata(client);
1303 long val = simple_strtol(buf, NULL, 10);
1304
1305 data->vrm = val;
1306 return count;
1307}
1308
1309static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
1310 char *buf)
1311{
1312 struct dme1737_data *data = dme1737_update_device(dev);
1313
1314 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1315}
1316
1317/* ---------------------------------------------------------------------
1318 * Sysfs device attribute defines and structs
1319 * --------------------------------------------------------------------- */
1320
1321/* Voltages 0-6 */
1322
1323#define SENSOR_DEVICE_ATTR_IN(ix) \
1324static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
1325 show_in, NULL, SYS_IN_INPUT, ix); \
1326static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
1327 show_in, set_in, SYS_IN_MIN, ix); \
1328static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
1329 show_in, set_in, SYS_IN_MAX, ix); \
1330static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
1331 show_in, NULL, SYS_IN_ALARM, ix)
1332
1333SENSOR_DEVICE_ATTR_IN(0);
1334SENSOR_DEVICE_ATTR_IN(1);
1335SENSOR_DEVICE_ATTR_IN(2);
1336SENSOR_DEVICE_ATTR_IN(3);
1337SENSOR_DEVICE_ATTR_IN(4);
1338SENSOR_DEVICE_ATTR_IN(5);
1339SENSOR_DEVICE_ATTR_IN(6);
1340
1341/* Temperatures 1-3 */
1342
1343#define SENSOR_DEVICE_ATTR_TEMP(ix) \
1344static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
1345 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
1346static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
1347 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
1348static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
1349 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
1350static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
1351 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
1352static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
1353 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
1354static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
1355 show_temp, NULL, SYS_TEMP_FAULT, ix-1)
1356
1357SENSOR_DEVICE_ATTR_TEMP(1);
1358SENSOR_DEVICE_ATTR_TEMP(2);
1359SENSOR_DEVICE_ATTR_TEMP(3);
1360
1361/* Zones 1-3 */
1362
1363#define SENSOR_DEVICE_ATTR_ZONE(ix) \
1364static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
1365 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
1366static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
1367 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
1368static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
1369 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
1370static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
1371 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
1372static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
1373 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
1374
1375SENSOR_DEVICE_ATTR_ZONE(1);
1376SENSOR_DEVICE_ATTR_ZONE(2);
1377SENSOR_DEVICE_ATTR_ZONE(3);
1378
1379/* Fans 1-4 */
1380
1381#define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
1382static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1383 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1384static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1385 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1386static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1387 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1388static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
1389 show_fan, set_fan, SYS_FAN_TYPE, ix-1)
1390
1391SENSOR_DEVICE_ATTR_FAN_1TO4(1);
1392SENSOR_DEVICE_ATTR_FAN_1TO4(2);
1393SENSOR_DEVICE_ATTR_FAN_1TO4(3);
1394SENSOR_DEVICE_ATTR_FAN_1TO4(4);
1395
1396/* Fans 5-6 */
1397
1398#define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
1399static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1400 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1401static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1402 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1403static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1404 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1405static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
1406 show_fan, set_fan, SYS_FAN_MAX, ix-1)
1407
1408SENSOR_DEVICE_ATTR_FAN_5TO6(5);
1409SENSOR_DEVICE_ATTR_FAN_5TO6(6);
1410
1411/* PWMs 1-3 */
1412
1413#define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
1414static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
1415 show_pwm, set_pwm, SYS_PWM, ix-1); \
1416static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1417 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1418static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1419 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
1420static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
1421 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
1422static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
1423 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
1424static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
1425 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
1426static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
1427 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
1428static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
1429 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
1430
1431SENSOR_DEVICE_ATTR_PWM_1TO3(1);
1432SENSOR_DEVICE_ATTR_PWM_1TO3(2);
1433SENSOR_DEVICE_ATTR_PWM_1TO3(3);
1434
1435/* PWMs 5-6 */
1436
1437#define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
1438static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO | S_IWUSR, \
1439 show_pwm, set_pwm, SYS_PWM, ix-1); \
1440static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \
1441 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1442static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1443 show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
1444
1445SENSOR_DEVICE_ATTR_PWM_5TO6(5);
1446SENSOR_DEVICE_ATTR_PWM_5TO6(6);
1447
1448/* Misc */
1449
1450static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm);
1451static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1452
1453#define SENSOR_DEV_ATTR_IN(ix) \
1454&sensor_dev_attr_in##ix##_input.dev_attr.attr, \
1455&sensor_dev_attr_in##ix##_min.dev_attr.attr, \
1456&sensor_dev_attr_in##ix##_max.dev_attr.attr, \
1457&sensor_dev_attr_in##ix##_alarm.dev_attr.attr
1458
1459/* These attributes are read-writeable only if the chip is *not* locked */
1460#define SENSOR_DEV_ATTR_TEMP_LOCK(ix) \
1461&sensor_dev_attr_temp##ix##_offset.dev_attr.attr
1462
1463#define SENSOR_DEV_ATTR_TEMP(ix) \
1464SENSOR_DEV_ATTR_TEMP_LOCK(ix), \
1465&sensor_dev_attr_temp##ix##_input.dev_attr.attr, \
1466&sensor_dev_attr_temp##ix##_min.dev_attr.attr, \
1467&sensor_dev_attr_temp##ix##_max.dev_attr.attr, \
1468&sensor_dev_attr_temp##ix##_alarm.dev_attr.attr, \
1469&sensor_dev_attr_temp##ix##_fault.dev_attr.attr
1470
1471/* These attributes are read-writeable only if the chip is *not* locked */
1472#define SENSOR_DEV_ATTR_ZONE_LOCK(ix) \
1473&sensor_dev_attr_zone##ix##_auto_point1_temp_hyst.dev_attr.attr, \
1474&sensor_dev_attr_zone##ix##_auto_point1_temp.dev_attr.attr, \
1475&sensor_dev_attr_zone##ix##_auto_point2_temp.dev_attr.attr, \
1476&sensor_dev_attr_zone##ix##_auto_point3_temp.dev_attr.attr
1477
1478#define SENSOR_DEV_ATTR_ZONE(ix) \
1479SENSOR_DEV_ATTR_ZONE_LOCK(ix), \
1480&sensor_dev_attr_zone##ix##_auto_channels_temp.dev_attr.attr
1481
1482#define SENSOR_DEV_ATTR_FAN_1TO4(ix) \
1483&sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
1484&sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
1485&sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
1486&sensor_dev_attr_fan##ix##_type.dev_attr.attr
1487
1488#define SENSOR_DEV_ATTR_FAN_5TO6(ix) \
1489&sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
1490&sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
1491&sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
1492&sensor_dev_attr_fan##ix##_max.dev_attr.attr
1493
1494/* These attributes are read-writeable only if the chip is *not* locked */
1495#define SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix) \
1496&sensor_dev_attr_pwm##ix##_freq.dev_attr.attr, \
1497&sensor_dev_attr_pwm##ix##_enable.dev_attr.attr, \
1498&sensor_dev_attr_pwm##ix##_ramp_rate.dev_attr.attr, \
1499&sensor_dev_attr_pwm##ix##_auto_channels_zone.dev_attr.attr, \
1500&sensor_dev_attr_pwm##ix##_auto_pwm_min.dev_attr.attr, \
1501&sensor_dev_attr_pwm##ix##_auto_point1_pwm.dev_attr.attr
1502
1503#define SENSOR_DEV_ATTR_PWM_1TO3(ix) \
1504SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix), \
1505&sensor_dev_attr_pwm##ix.dev_attr.attr, \
1506&sensor_dev_attr_pwm##ix##_auto_point2_pwm.dev_attr.attr
1507
1508/* These attributes are read-writeable only if the chip is *not* locked */
1509#define SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix) \
1510&sensor_dev_attr_pwm##ix.dev_attr.attr, \
1511&sensor_dev_attr_pwm##ix##_freq.dev_attr.attr
1512
1513#define SENSOR_DEV_ATTR_PWM_5TO6(ix) \
1514SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix), \
1515&sensor_dev_attr_pwm##ix##_enable.dev_attr.attr
1516
1517/* This struct holds all the attributes that are always present and need to be
1518 * created unconditionally. The attributes that need modification of their
1519 * permissions are created read-only and write permissions are added or removed
1520 * on the fly when required */
1521static struct attribute *dme1737_attr[] ={
1522 /* Voltages */
1523 SENSOR_DEV_ATTR_IN(0),
1524 SENSOR_DEV_ATTR_IN(1),
1525 SENSOR_DEV_ATTR_IN(2),
1526 SENSOR_DEV_ATTR_IN(3),
1527 SENSOR_DEV_ATTR_IN(4),
1528 SENSOR_DEV_ATTR_IN(5),
1529 SENSOR_DEV_ATTR_IN(6),
1530 /* Temperatures */
1531 SENSOR_DEV_ATTR_TEMP(1),
1532 SENSOR_DEV_ATTR_TEMP(2),
1533 SENSOR_DEV_ATTR_TEMP(3),
1534 /* Zones */
1535 SENSOR_DEV_ATTR_ZONE(1),
1536 SENSOR_DEV_ATTR_ZONE(2),
1537 SENSOR_DEV_ATTR_ZONE(3),
1538 /* Misc */
1539 &dev_attr_vrm.attr,
1540 &dev_attr_cpu0_vid.attr,
1541 NULL
1542};
1543
1544static const struct attribute_group dme1737_group = {
1545 .attrs = dme1737_attr,
1546};
1547
1548/* The following structs hold the PWM attributes, some of which are optional.
1549 * Their creation depends on the chip configuration which is determined during
1550 * module load. */
1551static struct attribute *dme1737_attr_pwm1[] = {
1552 SENSOR_DEV_ATTR_PWM_1TO3(1),
1553 NULL
1554};
1555static struct attribute *dme1737_attr_pwm2[] = {
1556 SENSOR_DEV_ATTR_PWM_1TO3(2),
1557 NULL
1558};
1559static struct attribute *dme1737_attr_pwm3[] = {
1560 SENSOR_DEV_ATTR_PWM_1TO3(3),
1561 NULL
1562};
1563static struct attribute *dme1737_attr_pwm5[] = {
1564 SENSOR_DEV_ATTR_PWM_5TO6(5),
1565 NULL
1566};
1567static struct attribute *dme1737_attr_pwm6[] = {
1568 SENSOR_DEV_ATTR_PWM_5TO6(6),
1569 NULL
1570};
1571
1572static const struct attribute_group dme1737_pwm_group[] = {
1573 { .attrs = dme1737_attr_pwm1 },
1574 { .attrs = dme1737_attr_pwm2 },
1575 { .attrs = dme1737_attr_pwm3 },
1576 { .attrs = NULL },
1577 { .attrs = dme1737_attr_pwm5 },
1578 { .attrs = dme1737_attr_pwm6 },
1579};
1580
1581/* The following structs hold the fan attributes, some of which are optional.
1582 * Their creation depends on the chip configuration which is determined during
1583 * module load. */
1584static struct attribute *dme1737_attr_fan1[] = {
1585 SENSOR_DEV_ATTR_FAN_1TO4(1),
1586 NULL
1587};
1588static struct attribute *dme1737_attr_fan2[] = {
1589 SENSOR_DEV_ATTR_FAN_1TO4(2),
1590 NULL
1591};
1592static struct attribute *dme1737_attr_fan3[] = {
1593 SENSOR_DEV_ATTR_FAN_1TO4(3),
1594 NULL
1595};
1596static struct attribute *dme1737_attr_fan4[] = {
1597 SENSOR_DEV_ATTR_FAN_1TO4(4),
1598 NULL
1599};
1600static struct attribute *dme1737_attr_fan5[] = {
1601 SENSOR_DEV_ATTR_FAN_5TO6(5),
1602 NULL
1603};
1604static struct attribute *dme1737_attr_fan6[] = {
1605 SENSOR_DEV_ATTR_FAN_5TO6(6),
1606 NULL
1607};
1608
1609static const struct attribute_group dme1737_fan_group[] = {
1610 { .attrs = dme1737_attr_fan1 },
1611 { .attrs = dme1737_attr_fan2 },
1612 { .attrs = dme1737_attr_fan3 },
1613 { .attrs = dme1737_attr_fan4 },
1614 { .attrs = dme1737_attr_fan5 },
1615 { .attrs = dme1737_attr_fan6 },
1616};
1617
1618/* The permissions of all of the following attributes are changed to read-
1619 * writeable if the chip is *not* locked. Otherwise they stay read-only. */
1620static struct attribute *dme1737_attr_lock[] = {
1621 /* Temperatures */
1622 SENSOR_DEV_ATTR_TEMP_LOCK(1),
1623 SENSOR_DEV_ATTR_TEMP_LOCK(2),
1624 SENSOR_DEV_ATTR_TEMP_LOCK(3),
1625 /* Zones */
1626 SENSOR_DEV_ATTR_ZONE_LOCK(1),
1627 SENSOR_DEV_ATTR_ZONE_LOCK(2),
1628 SENSOR_DEV_ATTR_ZONE_LOCK(3),
1629 NULL
1630};
1631
1632static const struct attribute_group dme1737_lock_group = {
1633 .attrs = dme1737_attr_lock,
1634};
1635
1636/* The permissions of the following PWM attributes are changed to read-
1637 * writeable if the chip is *not* locked and the respective PWM is available.
1638 * Otherwise they stay read-only. */
1639static struct attribute *dme1737_attr_pwm1_lock[] = {
1640 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(1),
1641 NULL
1642};
1643static struct attribute *dme1737_attr_pwm2_lock[] = {
1644 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(2),
1645 NULL
1646};
1647static struct attribute *dme1737_attr_pwm3_lock[] = {
1648 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(3),
1649 NULL
1650};
1651static struct attribute *dme1737_attr_pwm5_lock[] = {
1652 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(5),
1653 NULL
1654};
1655static struct attribute *dme1737_attr_pwm6_lock[] = {
1656 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(6),
1657 NULL
1658};
1659
1660static const struct attribute_group dme1737_pwm_lock_group[] = {
1661 { .attrs = dme1737_attr_pwm1_lock },
1662 { .attrs = dme1737_attr_pwm2_lock },
1663 { .attrs = dme1737_attr_pwm3_lock },
1664 { .attrs = NULL },
1665 { .attrs = dme1737_attr_pwm5_lock },
1666 { .attrs = dme1737_attr_pwm6_lock },
1667};
1668
1669/* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
1670 * chip is not locked. Otherwise they are read-only. */
1671static struct attribute *dme1737_attr_pwm[] = {
1672 &sensor_dev_attr_pwm1.dev_attr.attr,
1673 &sensor_dev_attr_pwm2.dev_attr.attr,
1674 &sensor_dev_attr_pwm3.dev_attr.attr,
1675};
1676
1677/* ---------------------------------------------------------------------
1678 * Super-IO functions
1679 * --------------------------------------------------------------------- */
1680
1681static inline int dme1737_sio_inb(int sio_cip, int reg)
1682{
1683 outb(reg, sio_cip);
1684 return inb(sio_cip + 1);
1685}
1686
1687static inline void dme1737_sio_outb(int sio_cip, int reg, int val)
1688{
1689 outb(reg, sio_cip);
1690 outb(val, sio_cip + 1);
1691}
1692
1693static int dme1737_sio_get_features(int sio_cip, struct i2c_client *client)
1694{
1695 struct dme1737_data *data = i2c_get_clientdata(client);
1696 int err = 0, reg;
1697 u16 addr;
1698
1699 /* Enter configuration mode */
1700 outb(0x55, sio_cip);
1701
1702 /* Check device ID
1703 * The DME1737 can return either 0x78 or 0x77 as its device ID. */
1704 reg = dme1737_sio_inb(sio_cip, 0x20);
1705 if (!(reg == 0x77 || reg == 0x78)) {
1706 err = -ENODEV;
1707 goto exit;
1708 }
1709
1710 /* Select logical device A (runtime registers) */
1711 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
1712
1713 /* Get the base address of the runtime registers */
1714 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
1715 dme1737_sio_inb(sio_cip, 0x61))) {
1716 err = -ENODEV;
1717 goto exit;
1718 }
1719
1720 /* Read the runtime registers to determine which optional features
1721 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
1722 * to '10' if the respective feature is enabled. */
1723 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */
1724 data->has_fan |= (1 << 5);
1725 }
1726 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */
1727 data->has_pwm |= (1 << 5);
1728 }
1729 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */
1730 data->has_fan |= (1 << 4);
1731 }
1732 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */
1733 data->has_pwm |= (1 << 4);
1734 }
1735
1736exit:
1737 /* Exit configuration mode */
1738 outb(0xaa, sio_cip);
1739
1740 return err;
1741}
1742
1743/* ---------------------------------------------------------------------
1744 * Device detection, registration and initialization
1745 * --------------------------------------------------------------------- */
1746
1747static struct i2c_driver dme1737_driver;
1748
1749static void dme1737_chmod_file(struct i2c_client *client,
1750 struct attribute *attr, mode_t mode)
1751{
1752 if (sysfs_chmod_file(&client->dev.kobj, attr, mode)) {
1753 dev_warn(&client->dev, "Failed to change permissions of %s.\n",
1754 attr->name);
1755 }
1756}
1757
1758static void dme1737_chmod_group(struct i2c_client *client,
1759 const struct attribute_group *group,
1760 mode_t mode)
1761{
1762 struct attribute **attr;
1763
1764 for (attr = group->attrs; *attr; attr++) {
1765 dme1737_chmod_file(client, *attr, mode);
1766 }
1767}
1768
1769static int dme1737_init_client(struct i2c_client *client)
1770{
1771 struct dme1737_data *data = i2c_get_clientdata(client);
1772 int ix;
1773 u8 reg;
1774
1775 data->config = dme1737_read(client, DME1737_REG_CONFIG);
1776 /* Inform if part is not monitoring/started */
1777 if (!(data->config & 0x01)) {
1778 if (!force_start) {
1779 dev_err(&client->dev, "Device is not monitoring. "
1780 "Use the force_start load parameter to "
1781 "override.\n");
1782 return -EFAULT;
1783 }
1784
1785 /* Force monitoring */
1786 data->config |= 0x01;
1787 dme1737_write(client, DME1737_REG_CONFIG, data->config);
1788 }
1789 /* Inform if part is not ready */
1790 if (!(data->config & 0x04)) {
1791 dev_err(&client->dev, "Device is not ready.\n");
1792 return -EFAULT;
1793 }
1794
1795 data->config2 = dme1737_read(client, DME1737_REG_CONFIG2);
1796 /* Check if optional fan3 input is enabled */
1797 if (data->config2 & 0x04) {
1798 data->has_fan |= (1 << 2);
1799 }
1800
1801 /* Fan4 and pwm3 are only available if the client's I2C address
1802 * is the default 0x2e. Otherwise the I/Os associated with these
1803 * functions are used for addr enable/select. */
1804 if (client->addr == 0x2e) {
1805 data->has_fan |= (1 << 3);
1806 data->has_pwm |= (1 << 2);
1807 }
1808
1809 /* Determine if the optional fan[5-6] and/or pwm[5-6] are enabled.
1810 * For this, we need to query the runtime registers through the
1811 * Super-IO LPC interface. Try both config ports 0x2e and 0x4e. */
1812 if (dme1737_sio_get_features(0x2e, client) &&
1813 dme1737_sio_get_features(0x4e, client)) {
1814 dev_warn(&client->dev, "Failed to query Super-IO for optional "
1815 "features.\n");
1816 }
1817
1818 /* Fan1, fan2, pwm1, and pwm2 are always present */
1819 data->has_fan |= 0x03;
1820 data->has_pwm |= 0x03;
1821
1822 dev_info(&client->dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, "
1823 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
1824 (data->has_pwm & (1 << 2)) ? "yes" : "no",
1825 (data->has_pwm & (1 << 4)) ? "yes" : "no",
1826 (data->has_pwm & (1 << 5)) ? "yes" : "no",
1827 (data->has_fan & (1 << 2)) ? "yes" : "no",
1828 (data->has_fan & (1 << 3)) ? "yes" : "no",
1829 (data->has_fan & (1 << 4)) ? "yes" : "no",
1830 (data->has_fan & (1 << 5)) ? "yes" : "no");
1831
1832 reg = dme1737_read(client, DME1737_REG_TACH_PWM);
1833 /* Inform if fan-to-pwm mapping differs from the default */
1834 if (reg != 0xa4) {
1835 dev_warn(&client->dev, "Non-standard fan to pwm mapping: "
1836 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, "
1837 "fan4->pwm%d. Please report to the driver "
1838 "maintainer.\n",
1839 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
1840 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1);
1841 }
1842
1843 /* Switch pwm[1-3] to manual mode if they are currently disabled and
1844 * set the duty-cycles to 0% (which is identical to the PWMs being
1845 * disabled). */
1846 if (!(data->config & 0x02)) {
1847 for (ix = 0; ix < 3; ix++) {
1848 data->pwm_config[ix] = dme1737_read(client,
1849 DME1737_REG_PWM_CONFIG(ix));
1850 if ((data->has_pwm & (1 << ix)) &&
1851 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
1852 dev_info(&client->dev, "Switching pwm%d to "
1853 "manual mode.\n", ix + 1);
1854 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1855 data->pwm_config[ix]);
1856 dme1737_write(client, DME1737_REG_PWM(ix), 0);
1857 dme1737_write(client,
1858 DME1737_REG_PWM_CONFIG(ix),
1859 data->pwm_config[ix]);
1860 }
1861 }
1862 }
1863
1864 /* Initialize the default PWM auto channels zone (acz) assignments */
1865 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
1866 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
1867 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
1868
1869 /* Set VRM */
1870 data->vrm = vid_which_vrm();
1871
1872 return 0;
1873}
1874
1875static int dme1737_detect(struct i2c_adapter *adapter, int address,
1876 int kind)
1877{
1878 u8 company, verstep = 0;
1879 struct i2c_client *client;
1880 struct dme1737_data *data;
1881 int ix, err = 0;
1882 const char *name;
1883
1884 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1885 goto exit;
1886 }
1887
1888 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
1889 err = -ENOMEM;
1890 goto exit;
1891 }
1892
1893 client = &data->client;
1894 i2c_set_clientdata(client, data);
1895 client->addr = address;
1896 client->adapter = adapter;
1897 client->driver = &dme1737_driver;
1898
1899 /* A negative kind means that the driver was loaded with no force
1900 * parameter (default), so we must identify the chip. */
1901 if (kind < 0) {
1902 company = dme1737_read(client, DME1737_REG_COMPANY);
1903 verstep = dme1737_read(client, DME1737_REG_VERSTEP);
1904
1905 if (!((company == DME1737_COMPANY_SMSC) &&
1906 ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) {
1907 err = -ENODEV;
1908 goto exit_kfree;
1909 }
1910 }
1911
1912 kind = dme1737;
1913 name = "dme1737";
1914
1915 /* Fill in the remaining client fields and put it into the global
1916 * list */
1917 strlcpy(client->name, name, I2C_NAME_SIZE);
1918 mutex_init(&data->update_lock);
1919
1920 /* Tell the I2C layer a new client has arrived */
1921 if ((err = i2c_attach_client(client))) {
1922 goto exit_kfree;
1923 }
1924
1925 /* Initialize the DME1737 chip */
1926 if ((err = dme1737_init_client(client))) {
1927 goto exit_detach;
1928 }
1929
1930 /* Create standard sysfs attributes */
1931 if ((err = sysfs_create_group(&client->dev.kobj, &dme1737_group))) {
1932 goto exit_detach;
1933 }
1934
1935 /* Create fan sysfs attributes */
1936 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1937 if (data->has_fan & (1 << ix)) {
1938 if ((err = sysfs_create_group(&client->dev.kobj,
1939 &dme1737_fan_group[ix]))) {
1940 goto exit_remove;
1941 }
1942 }
1943 }
1944
1945 /* Create PWM sysfs attributes */
1946 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1947 if (data->has_pwm & (1 << ix)) {
1948 if ((err = sysfs_create_group(&client->dev.kobj,
1949 &dme1737_pwm_group[ix]))) {
1950 goto exit_remove;
1951 }
1952 }
1953 }
1954
1955 /* Inform if the device is locked. Otherwise change the permissions of
1956 * selected attributes from read-only to read-writeable. */
1957 if (data->config & 0x02) {
1958 dev_info(&client->dev, "Device is locked. Some attributes "
1959 "will be read-only.\n");
1960 } else {
1961 /* Change permissions of standard attributes */
1962 dme1737_chmod_group(client, &dme1737_lock_group,
1963 S_IRUGO | S_IWUSR);
1964
1965 /* Change permissions of PWM attributes */
1966 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) {
1967 if (data->has_pwm & (1 << ix)) {
1968 dme1737_chmod_group(client,
1969 &dme1737_pwm_lock_group[ix],
1970 S_IRUGO | S_IWUSR);
1971 }
1972 }
1973
1974 /* Change permissions of pwm[1-3] if in manual mode */
1975 for (ix = 0; ix < 3; ix++) {
1976 if ((data->has_pwm & (1 << ix)) &&
1977 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
1978 dme1737_chmod_file(client,
1979 dme1737_attr_pwm[ix],
1980 S_IRUGO | S_IWUSR);
1981 }
1982 }
1983 }
1984
1985 /* Register device */
1986 data->class_dev = hwmon_device_register(&client->dev);
1987 if (IS_ERR(data->class_dev)) {
1988 err = PTR_ERR(data->class_dev);
1989 goto exit_remove;
1990 }
1991
1992 dev_info(&adapter->dev, "Found a DME1737 chip at 0x%02x "
1993 "(rev 0x%02x)\n", client->addr, verstep);
1994
1995 return 0;
1996
1997exit_remove:
1998 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1999 if (data->has_fan & (1 << ix)) {
2000 sysfs_remove_group(&client->dev.kobj,
2001 &dme1737_fan_group[ix]);
2002 }
2003 }
2004 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
2005 if (data->has_pwm & (1 << ix)) {
2006 sysfs_remove_group(&client->dev.kobj,
2007 &dme1737_pwm_group[ix]);
2008 }
2009 }
2010 sysfs_remove_group(&client->dev.kobj, &dme1737_group);
2011exit_detach:
2012 i2c_detach_client(client);
2013exit_kfree:
2014 kfree(data);
2015exit:
2016 return err;
2017}
2018
2019static int dme1737_attach_adapter(struct i2c_adapter *adapter)
2020{
2021 if (!(adapter->class & I2C_CLASS_HWMON)) {
2022 return 0;
2023 }
2024
2025 return i2c_probe(adapter, &addr_data, dme1737_detect);
2026}
2027
2028static int dme1737_detach_client(struct i2c_client *client)
2029{
2030 struct dme1737_data *data = i2c_get_clientdata(client);
2031 int ix, err;
2032
2033 hwmon_device_unregister(data->class_dev);
2034
2035 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
2036 if (data->has_fan & (1 << ix)) {
2037 sysfs_remove_group(&client->dev.kobj,
2038 &dme1737_fan_group[ix]);
2039 }
2040 }
2041 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
2042 if (data->has_pwm & (1 << ix)) {
2043 sysfs_remove_group(&client->dev.kobj,
2044 &dme1737_pwm_group[ix]);
2045 }
2046 }
2047 sysfs_remove_group(&client->dev.kobj, &dme1737_group);
2048
2049 if ((err = i2c_detach_client(client))) {
2050 return err;
2051 }
2052
2053 kfree(data);
2054 return 0;
2055}
2056
2057static struct i2c_driver dme1737_driver = {
2058 .driver = {
2059 .name = "dme1737",
2060 },
2061 .attach_adapter = dme1737_attach_adapter,
2062 .detach_client = dme1737_detach_client,
2063};
2064
2065static int __init dme1737_init(void)
2066{
2067 return i2c_add_driver(&dme1737_driver);
2068}
2069
2070static void __exit dme1737_exit(void)
2071{
2072 i2c_del_driver(&dme1737_driver);
2073}
2074
2075MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
2076MODULE_DESCRIPTION("DME1737 sensors");
2077MODULE_LICENSE("GPL");
2078
2079module_init(dme1737_init);
2080module_exit(dme1737_exit);
diff --git a/drivers/hwmon/ds1621.c b/drivers/hwmon/ds1621.c
index d5ac422d73..1212d6b7f3 100644
--- a/drivers/hwmon/ds1621.c
+++ b/drivers/hwmon/ds1621.c
@@ -27,6 +27,7 @@
27#include <linux/jiffies.h> 27#include <linux/jiffies.h>
28#include <linux/i2c.h> 28#include <linux/i2c.h>
29#include <linux/hwmon.h> 29#include <linux/hwmon.h>
30#include <linux/hwmon-sysfs.h>
30#include <linux/err.h> 31#include <linux/err.h>
31#include <linux/mutex.h> 32#include <linux/mutex.h>
32#include <linux/sysfs.h> 33#include <linux/sysfs.h>
@@ -52,9 +53,11 @@ MODULE_PARM_DESC(polarity, "Output's polarity: 0 = active high, 1 = active low")
52#define DS1621_REG_CONFIG_DONE 0x80 53#define DS1621_REG_CONFIG_DONE 0x80
53 54
54/* The DS1621 registers */ 55/* The DS1621 registers */
55#define DS1621_REG_TEMP 0xAA /* word, RO */ 56static const u8 DS1621_REG_TEMP[3] = {
56#define DS1621_REG_TEMP_MIN 0xA2 /* word, RW */ 57 0xAA, /* input, word, RO */
57#define DS1621_REG_TEMP_MAX 0xA1 /* word, RW */ 58 0xA2, /* min, word, RW */
59 0xA1, /* max, word, RW */
60};
58#define DS1621_REG_CONF 0xAC /* byte, RW */ 61#define DS1621_REG_CONF 0xAC /* byte, RW */
59#define DS1621_COM_START 0xEE /* no data */ 62#define DS1621_COM_START 0xEE /* no data */
60#define DS1621_COM_STOP 0x22 /* no data */ 63#define DS1621_COM_STOP 0x22 /* no data */
@@ -63,10 +66,7 @@ MODULE_PARM_DESC(polarity, "Output's polarity: 0 = active high, 1 = active low")
63#define DS1621_ALARM_TEMP_HIGH 0x40 66#define DS1621_ALARM_TEMP_HIGH 0x40
64#define DS1621_ALARM_TEMP_LOW 0x20 67#define DS1621_ALARM_TEMP_LOW 0x20
65 68
66/* Conversions. Rounding and limit checking is only done on the TO_REG 69/* Conversions */
67 variants. Note that you should be a bit careful with which arguments
68 these macros are called: arguments may be evaluated more than once.
69 Fixing this is just not worth it. */
70#define ALARMS_FROM_REG(val) ((val) & \ 70#define ALARMS_FROM_REG(val) ((val) & \
71 (DS1621_ALARM_TEMP_HIGH | DS1621_ALARM_TEMP_LOW)) 71 (DS1621_ALARM_TEMP_HIGH | DS1621_ALARM_TEMP_LOW))
72 72
@@ -78,7 +78,7 @@ struct ds1621_data {
78 char valid; /* !=0 if following fields are valid */ 78 char valid; /* !=0 if following fields are valid */
79 unsigned long last_updated; /* In jiffies */ 79 unsigned long last_updated; /* In jiffies */
80 80
81 u16 temp, temp_min, temp_max; /* Register values, word */ 81 u16 temp[3]; /* Register values, word */
82 u8 conf; /* Register encoding, combined */ 82 u8 conf; /* Register encoding, combined */
83}; 83};
84 84
@@ -101,7 +101,7 @@ static struct i2c_driver ds1621_driver = {
101 101
102/* All registers are word-sized, except for the configuration register. 102/* All registers are word-sized, except for the configuration register.
103 DS1621 uses a high-byte first convention, which is exactly opposite to 103 DS1621 uses a high-byte first convention, which is exactly opposite to
104 the usual practice. */ 104 the SMBus standard. */
105static int ds1621_read_value(struct i2c_client *client, u8 reg) 105static int ds1621_read_value(struct i2c_client *client, u8 reg)
106{ 106{
107 if (reg == DS1621_REG_CONF) 107 if (reg == DS1621_REG_CONF)
@@ -110,9 +110,6 @@ static int ds1621_read_value(struct i2c_client *client, u8 reg)
110 return swab16(i2c_smbus_read_word_data(client, reg)); 110 return swab16(i2c_smbus_read_word_data(client, reg));
111} 111}
112 112
113/* All registers are word-sized, except for the configuration register.
114 DS1621 uses a high-byte first convention, which is exactly opposite to
115 the usual practice. */
116static int ds1621_write_value(struct i2c_client *client, u8 reg, u16 value) 113static int ds1621_write_value(struct i2c_client *client, u8 reg, u16 value)
117{ 114{
118 if (reg == DS1621_REG_CONF) 115 if (reg == DS1621_REG_CONF)
@@ -139,50 +136,61 @@ static void ds1621_init_client(struct i2c_client *client)
139 i2c_smbus_write_byte(client, DS1621_COM_START); 136 i2c_smbus_write_byte(client, DS1621_COM_START);
140} 137}
141 138
142#define show(value) \ 139static ssize_t show_temp(struct device *dev, struct device_attribute *da,
143static ssize_t show_##value(struct device *dev, struct device_attribute *attr, char *buf) \ 140 char *buf)
144{ \ 141{
145 struct ds1621_data *data = ds1621_update_client(dev); \ 142 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
146 return sprintf(buf, "%d\n", LM75_TEMP_FROM_REG(data->value)); \ 143 struct ds1621_data *data = ds1621_update_client(dev);
144 return sprintf(buf, "%d\n",
145 LM75_TEMP_FROM_REG(data->temp[attr->index]));
147} 146}
148 147
149show(temp); 148static ssize_t set_temp(struct device *dev, struct device_attribute *da,
150show(temp_min); 149 const char *buf, size_t count)
151show(temp_max); 150{
152 151 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
153#define set_temp(suffix, value, reg) \ 152 struct i2c_client *client = to_i2c_client(dev);
154static ssize_t set_temp_##suffix(struct device *dev, struct device_attribute *attr, const char *buf, \ 153 struct ds1621_data *data = ds1621_update_client(dev);
155 size_t count) \ 154 u16 val = LM75_TEMP_TO_REG(simple_strtoul(buf, NULL, 10));
156{ \
157 struct i2c_client *client = to_i2c_client(dev); \
158 struct ds1621_data *data = ds1621_update_client(dev); \
159 u16 val = LM75_TEMP_TO_REG(simple_strtoul(buf, NULL, 10)); \
160 \
161 mutex_lock(&data->update_lock); \
162 data->value = val; \
163 ds1621_write_value(client, reg, data->value); \
164 mutex_unlock(&data->update_lock); \
165 return count; \
166}
167 155
168set_temp(min, temp_min, DS1621_REG_TEMP_MIN); 156 mutex_lock(&data->update_lock);
169set_temp(max, temp_max, DS1621_REG_TEMP_MAX); 157 data->temp[attr->index] = val;
158 ds1621_write_value(client, DS1621_REG_TEMP[attr->index],
159 data->temp[attr->index]);
160 mutex_unlock(&data->update_lock);
161 return count;
162}
170 163
171static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, char *buf) 164static ssize_t show_alarms(struct device *dev, struct device_attribute *da,
165 char *buf)
172{ 166{
173 struct ds1621_data *data = ds1621_update_client(dev); 167 struct ds1621_data *data = ds1621_update_client(dev);
174 return sprintf(buf, "%d\n", ALARMS_FROM_REG(data->conf)); 168 return sprintf(buf, "%d\n", ALARMS_FROM_REG(data->conf));
175} 169}
176 170
171static ssize_t show_alarm(struct device *dev, struct device_attribute *da,
172 char *buf)
173{
174 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
175 struct ds1621_data *data = ds1621_update_client(dev);
176 return sprintf(buf, "%d\n", !!(data->conf & attr->index));
177}
178
177static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); 179static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
178static DEVICE_ATTR(temp1_input, S_IRUGO , show_temp, NULL); 180static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
179static DEVICE_ATTR(temp1_min, S_IWUSR | S_IRUGO , show_temp_min, set_temp_min); 181static SENSOR_DEVICE_ATTR(temp1_min, S_IWUSR | S_IRUGO, show_temp, set_temp, 1);
180static DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO, show_temp_max, set_temp_max); 182static SENSOR_DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO, show_temp, set_temp, 2);
183static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL,
184 DS1621_ALARM_TEMP_LOW);
185static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL,
186 DS1621_ALARM_TEMP_HIGH);
181 187
182static struct attribute *ds1621_attributes[] = { 188static struct attribute *ds1621_attributes[] = {
183 &dev_attr_temp1_input.attr, 189 &sensor_dev_attr_temp1_input.dev_attr.attr,
184 &dev_attr_temp1_min.attr, 190 &sensor_dev_attr_temp1_min.dev_attr.attr,
185 &dev_attr_temp1_max.attr, 191 &sensor_dev_attr_temp1_max.dev_attr.attr,
192 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
193 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
186 &dev_attr_alarms.attr, 194 &dev_attr_alarms.attr,
187 NULL 195 NULL
188}; 196};
@@ -204,9 +212,9 @@ static int ds1621_detect(struct i2c_adapter *adapter, int address,
204 int kind) 212 int kind)
205{ 213{
206 int conf, temp; 214 int conf, temp;
207 struct i2c_client *new_client; 215 struct i2c_client *client;
208 struct ds1621_data *data; 216 struct ds1621_data *data;
209 int err = 0; 217 int i, err = 0;
210 218
211 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA 219 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA
212 | I2C_FUNC_SMBUS_WORD_DATA 220 | I2C_FUNC_SMBUS_WORD_DATA
@@ -221,55 +229,44 @@ static int ds1621_detect(struct i2c_adapter *adapter, int address,
221 goto exit; 229 goto exit;
222 } 230 }
223 231
224 new_client = &data->client; 232 client = &data->client;
225 i2c_set_clientdata(new_client, data); 233 i2c_set_clientdata(client, data);
226 new_client->addr = address; 234 client->addr = address;
227 new_client->adapter = adapter; 235 client->adapter = adapter;
228 new_client->driver = &ds1621_driver; 236 client->driver = &ds1621_driver;
229 new_client->flags = 0;
230
231 237
232 /* Now, we do the remaining detection. It is lousy. */ 238 /* Now, we do the remaining detection. It is lousy. */
233 if (kind < 0) { 239 if (kind < 0) {
234 /* The NVB bit should be low if no EEPROM write has been 240 /* The NVB bit should be low if no EEPROM write has been
235 requested during the latest 10ms, which is highly 241 requested during the latest 10ms, which is highly
236 improbable in our case. */ 242 improbable in our case. */
237 conf = ds1621_read_value(new_client, DS1621_REG_CONF); 243 conf = ds1621_read_value(client, DS1621_REG_CONF);
238 if (conf & DS1621_REG_CONFIG_NVB) 244 if (conf & DS1621_REG_CONFIG_NVB)
239 goto exit_free; 245 goto exit_free;
240 /* The 7 lowest bits of a temperature should always be 0. */ 246 /* The 7 lowest bits of a temperature should always be 0. */
241 temp = ds1621_read_value(new_client, DS1621_REG_TEMP); 247 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
242 if (temp & 0x007f) 248 temp = ds1621_read_value(client, DS1621_REG_TEMP[i]);
243 goto exit_free; 249 if (temp & 0x007f)
244 temp = ds1621_read_value(new_client, DS1621_REG_TEMP_MIN); 250 goto exit_free;
245 if (temp & 0x007f) 251 }
246 goto exit_free;
247 temp = ds1621_read_value(new_client, DS1621_REG_TEMP_MAX);
248 if (temp & 0x007f)
249 goto exit_free;
250 } 252 }
251 253
252 /* Determine the chip type - only one kind supported! */
253 if (kind <= 0)
254 kind = ds1621;
255
256 /* Fill in remaining client fields and put it into the global list */ 254 /* Fill in remaining client fields and put it into the global list */
257 strlcpy(new_client->name, "ds1621", I2C_NAME_SIZE); 255 strlcpy(client->name, "ds1621", I2C_NAME_SIZE);
258 data->valid = 0;
259 mutex_init(&data->update_lock); 256 mutex_init(&data->update_lock);
260 257
261 /* Tell the I2C layer a new client has arrived */ 258 /* Tell the I2C layer a new client has arrived */
262 if ((err = i2c_attach_client(new_client))) 259 if ((err = i2c_attach_client(client)))
263 goto exit_free; 260 goto exit_free;
264 261
265 /* Initialize the DS1621 chip */ 262 /* Initialize the DS1621 chip */
266 ds1621_init_client(new_client); 263 ds1621_init_client(client);
267 264
268 /* Register sysfs hooks */ 265 /* Register sysfs hooks */
269 if ((err = sysfs_create_group(&new_client->dev.kobj, &ds1621_group))) 266 if ((err = sysfs_create_group(&client->dev.kobj, &ds1621_group)))
270 goto exit_detach; 267 goto exit_detach;
271 268
272 data->class_dev = hwmon_device_register(&new_client->dev); 269 data->class_dev = hwmon_device_register(&client->dev);
273 if (IS_ERR(data->class_dev)) { 270 if (IS_ERR(data->class_dev)) {
274 err = PTR_ERR(data->class_dev); 271 err = PTR_ERR(data->class_dev);
275 goto exit_remove_files; 272 goto exit_remove_files;
@@ -278,9 +275,9 @@ static int ds1621_detect(struct i2c_adapter *adapter, int address,
278 return 0; 275 return 0;
279 276
280 exit_remove_files: 277 exit_remove_files:
281 sysfs_remove_group(&new_client->dev.kobj, &ds1621_group); 278 sysfs_remove_group(&client->dev.kobj, &ds1621_group);
282 exit_detach: 279 exit_detach:
283 i2c_detach_client(new_client); 280 i2c_detach_client(client);
284 exit_free: 281 exit_free:
285 kfree(data); 282 kfree(data);
286 exit: 283 exit:
@@ -314,23 +311,21 @@ static struct ds1621_data *ds1621_update_client(struct device *dev)
314 311
315 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 312 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
316 || !data->valid) { 313 || !data->valid) {
314 int i;
317 315
318 dev_dbg(&client->dev, "Starting ds1621 update\n"); 316 dev_dbg(&client->dev, "Starting ds1621 update\n");
319 317
320 data->conf = ds1621_read_value(client, DS1621_REG_CONF); 318 data->conf = ds1621_read_value(client, DS1621_REG_CONF);
321 319
322 data->temp = ds1621_read_value(client, DS1621_REG_TEMP); 320 for (i = 0; i < ARRAY_SIZE(data->temp); i++)
323 321 data->temp[i] = ds1621_read_value(client,
324 data->temp_min = ds1621_read_value(client, 322 DS1621_REG_TEMP[i]);
325 DS1621_REG_TEMP_MIN);
326 data->temp_max = ds1621_read_value(client,
327 DS1621_REG_TEMP_MAX);
328 323
329 /* reset alarms if necessary */ 324 /* reset alarms if necessary */
330 new_conf = data->conf; 325 new_conf = data->conf;
331 if (data->temp > data->temp_min) 326 if (data->temp[0] > data->temp[1]) /* input > min */
332 new_conf &= ~DS1621_ALARM_TEMP_LOW; 327 new_conf &= ~DS1621_ALARM_TEMP_LOW;
333 if (data->temp < data->temp_max) 328 if (data->temp[0] < data->temp[2]) /* input < max */
334 new_conf &= ~DS1621_ALARM_TEMP_HIGH; 329 new_conf &= ~DS1621_ALARM_TEMP_HIGH;
335 if (data->conf != new_conf) 330 if (data->conf != new_conf)
336 ds1621_write_value(client, DS1621_REG_CONF, 331 ds1621_write_value(client, DS1621_REG_CONF,
diff --git a/drivers/hwmon/f71805f.c b/drivers/hwmon/f71805f.c
index cdbe309b8f..6f60715f34 100644
--- a/drivers/hwmon/f71805f.c
+++ b/drivers/hwmon/f71805f.c
@@ -127,6 +127,13 @@ superio_exit(int base)
127#define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr)) 127#define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
128#define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr)) 128#define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
129#define F71805F_REG_TEMP_MODE 0x01 129#define F71805F_REG_TEMP_MODE 0x01
130/* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
131/* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
132#define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
133 (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
134#define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
135 (0xA4 + 0x10 * (pwmnr) + \
136 2 * (2 - (apnr)))
130 137
131#define F71805F_REG_START 0x00 138#define F71805F_REG_START 0x00
132/* status nr from 0 to 2 */ 139/* status nr from 0 to 2 */
@@ -144,6 +151,11 @@ superio_exit(int base)
144 * Data structures and manipulation thereof 151 * Data structures and manipulation thereof
145 */ 152 */
146 153
154struct f71805f_auto_point {
155 u8 temp[3];
156 u16 fan[3];
157};
158
147struct f71805f_data { 159struct f71805f_data {
148 unsigned short addr; 160 unsigned short addr;
149 const char *name; 161 const char *name;
@@ -170,6 +182,7 @@ struct f71805f_data {
170 u8 temp_hyst[3]; 182 u8 temp_hyst[3];
171 u8 temp_mode; 183 u8 temp_mode;
172 unsigned long alarms; 184 unsigned long alarms;
185 struct f71805f_auto_point auto_points[3];
173}; 186};
174 187
175struct f71805f_sio_data { 188struct f71805f_sio_data {
@@ -312,7 +325,7 @@ static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
312static struct f71805f_data *f71805f_update_device(struct device *dev) 325static struct f71805f_data *f71805f_update_device(struct device *dev)
313{ 326{
314 struct f71805f_data *data = dev_get_drvdata(dev); 327 struct f71805f_data *data = dev_get_drvdata(dev);
315 int nr; 328 int nr, apnr;
316 329
317 mutex_lock(&data->update_lock); 330 mutex_lock(&data->update_lock);
318 331
@@ -342,6 +355,18 @@ static struct f71805f_data *f71805f_update_device(struct device *dev)
342 F71805F_REG_TEMP_HYST(nr)); 355 F71805F_REG_TEMP_HYST(nr));
343 } 356 }
344 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE); 357 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
358 for (nr = 0; nr < 3; nr++) {
359 for (apnr = 0; apnr < 3; apnr++) {
360 data->auto_points[nr].temp[apnr] =
361 f71805f_read8(data,
362 F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
363 apnr));
364 data->auto_points[nr].fan[apnr] =
365 f71805f_read16(data,
366 F71805F_REG_PWM_AUTO_POINT_FAN(nr,
367 apnr));
368 }
369 }
345 370
346 data->last_limits = jiffies; 371 data->last_limits = jiffies;
347 } 372 }
@@ -705,6 +730,70 @@ static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
705 return count; 730 return count;
706} 731}
707 732
733static ssize_t show_pwm_auto_point_temp(struct device *dev,
734 struct device_attribute *devattr,
735 char* buf)
736{
737 struct f71805f_data *data = dev_get_drvdata(dev);
738 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
739 int pwmnr = attr->nr;
740 int apnr = attr->index;
741
742 return sprintf(buf, "%ld\n",
743 temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
744}
745
746static ssize_t set_pwm_auto_point_temp(struct device *dev,
747 struct device_attribute *devattr,
748 const char* buf, size_t count)
749{
750 struct f71805f_data *data = dev_get_drvdata(dev);
751 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
752 int pwmnr = attr->nr;
753 int apnr = attr->index;
754 unsigned long val = simple_strtol(buf, NULL, 10);
755
756 mutex_lock(&data->update_lock);
757 data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
758 f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
759 data->auto_points[pwmnr].temp[apnr]);
760 mutex_unlock(&data->update_lock);
761
762 return count;
763}
764
765static ssize_t show_pwm_auto_point_fan(struct device *dev,
766 struct device_attribute *devattr,
767 char* buf)
768{
769 struct f71805f_data *data = dev_get_drvdata(dev);
770 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
771 int pwmnr = attr->nr;
772 int apnr = attr->index;
773
774 return sprintf(buf, "%ld\n",
775 fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
776}
777
778static ssize_t set_pwm_auto_point_fan(struct device *dev,
779 struct device_attribute *devattr,
780 const char* buf, size_t count)
781{
782 struct f71805f_data *data = dev_get_drvdata(dev);
783 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
784 int pwmnr = attr->nr;
785 int apnr = attr->index;
786 unsigned long val = simple_strtoul(buf, NULL, 10);
787
788 mutex_lock(&data->update_lock);
789 data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
790 f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
791 data->auto_points[pwmnr].fan[apnr]);
792 mutex_unlock(&data->update_lock);
793
794 return count;
795}
796
708static ssize_t show_temp(struct device *dev, struct device_attribute *devattr, 797static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
709 char *buf) 798 char *buf)
710{ 799{
@@ -932,6 +1021,63 @@ static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
932 show_pwm_freq, set_pwm_freq, 2); 1021 show_pwm_freq, set_pwm_freq, 2);
933static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2); 1022static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
934 1023
1024static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1025 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1026 0, 0);
1027static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
1028 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1029 0, 0);
1030static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1031 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1032 0, 1);
1033static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
1034 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1035 0, 1);
1036static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1037 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1038 0, 2);
1039static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
1040 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1041 0, 2);
1042
1043static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1044 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1045 1, 0);
1046static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
1047 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1048 1, 0);
1049static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1050 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1051 1, 1);
1052static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
1053 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1054 1, 1);
1055static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1056 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1057 1, 2);
1058static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
1059 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1060 1, 2);
1061
1062static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1063 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1064 2, 0);
1065static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
1066 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1067 2, 0);
1068static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1069 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1070 2, 1);
1071static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
1072 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1073 2, 1);
1074static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1075 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1076 2, 2);
1077static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
1078 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1079 2, 2);
1080
935static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0); 1081static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
936static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1); 1082static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
937static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2); 1083static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
@@ -1014,6 +1160,25 @@ static struct attribute *f71805f_attributes[] = {
1014 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr, 1160 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
1015 &sensor_dev_attr_temp3_type.dev_attr.attr, 1161 &sensor_dev_attr_temp3_type.dev_attr.attr,
1016 1162
1163 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1164 &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
1165 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1166 &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
1167 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1168 &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
1169 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1170 &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
1171 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1172 &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
1173 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1174 &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
1175 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1176 &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
1177 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1178 &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
1179 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1180 &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
1181
1017 &sensor_dev_attr_in0_alarm.dev_attr.attr, 1182 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1018 &sensor_dev_attr_in1_alarm.dev_attr.attr, 1183 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1019 &sensor_dev_attr_in2_alarm.dev_attr.attr, 1184 &sensor_dev_attr_in2_alarm.dev_attr.attr,
@@ -1242,12 +1407,12 @@ static int __devexit f71805f_remove(struct platform_device *pdev)
1242 struct resource *res; 1407 struct resource *res;
1243 int i; 1408 int i;
1244 1409
1245 platform_set_drvdata(pdev, NULL);
1246 hwmon_device_unregister(data->class_dev); 1410 hwmon_device_unregister(data->class_dev);
1247 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group); 1411 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1248 for (i = 0; i < 4; i++) 1412 for (i = 0; i < 4; i++)
1249 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]); 1413 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1250 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq); 1414 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1415 platform_set_drvdata(pdev, NULL);
1251 kfree(data); 1416 kfree(data);
1252 1417
1253 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1418 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
@@ -1290,15 +1455,12 @@ static int __init f71805f_device_add(unsigned short address,
1290 goto exit_device_put; 1455 goto exit_device_put;
1291 } 1456 }
1292 1457
1293 pdev->dev.platform_data = kmalloc(sizeof(struct f71805f_sio_data), 1458 err = platform_device_add_data(pdev, sio_data,
1294 GFP_KERNEL); 1459 sizeof(struct f71805f_sio_data));
1295 if (!pdev->dev.platform_data) { 1460 if (err) {
1296 err = -ENOMEM;
1297 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); 1461 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1298 goto exit_device_put; 1462 goto exit_device_put;
1299 } 1463 }
1300 memcpy(pdev->dev.platform_data, sio_data,
1301 sizeof(struct f71805f_sio_data));
1302 1464
1303 err = platform_device_add(pdev); 1465 err = platform_device_add(pdev);
1304 if (err) { 1466 if (err) {
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
index 62afc63708..eff6036e15 100644
--- a/drivers/hwmon/it87.c
+++ b/drivers/hwmon/it87.c
@@ -6,6 +6,7 @@
6 IT8712F Super I/O chip w/LPC interface 6 IT8712F Super I/O chip w/LPC interface
7 IT8716F Super I/O chip w/LPC interface 7 IT8716F Super I/O chip w/LPC interface
8 IT8718F Super I/O chip w/LPC interface 8 IT8718F Super I/O chip w/LPC interface
9 IT8726F Super I/O chip w/LPC interface
9 Sis950 A clone of the IT8705F 10 Sis950 A clone of the IT8705F
10 11
11 Copyright (C) 2001 Chris Gauthron <chrisg@0-in.com> 12 Copyright (C) 2001 Chris Gauthron <chrisg@0-in.com>
@@ -30,8 +31,7 @@
30#include <linux/init.h> 31#include <linux/init.h>
31#include <linux/slab.h> 32#include <linux/slab.h>
32#include <linux/jiffies.h> 33#include <linux/jiffies.h>
33#include <linux/i2c.h> 34#include <linux/platform_device.h>
34#include <linux/i2c-isa.h>
35#include <linux/hwmon.h> 35#include <linux/hwmon.h>
36#include <linux/hwmon-sysfs.h> 36#include <linux/hwmon-sysfs.h>
37#include <linux/hwmon-vid.h> 37#include <linux/hwmon-vid.h>
@@ -40,10 +40,12 @@
40#include <linux/sysfs.h> 40#include <linux/sysfs.h>
41#include <asm/io.h> 41#include <asm/io.h>
42 42
43#define DRVNAME "it87"
43 44
44static unsigned short isa_address;
45enum chips { it87, it8712, it8716, it8718 }; 45enum chips { it87, it8712, it8716, it8718 };
46 46
47static struct platform_device *pdev;
48
47#define REG 0x2e /* The register to read/write */ 49#define REG 0x2e /* The register to read/write */
48#define DEV 0x07 /* Register: Logical device select */ 50#define DEV 0x07 /* Register: Logical device select */
49#define VAL 0x2f /* The value to read/write */ 51#define VAL 0x2f /* The value to read/write */
@@ -97,6 +99,7 @@ superio_exit(void)
97#define IT8705F_DEVID 0x8705 99#define IT8705F_DEVID 0x8705
98#define IT8716F_DEVID 0x8716 100#define IT8716F_DEVID 0x8716
99#define IT8718F_DEVID 0x8718 101#define IT8718F_DEVID 0x8718
102#define IT8726F_DEVID 0x8726
100#define IT87_ACT_REG 0x30 103#define IT87_ACT_REG 0x30
101#define IT87_BASE_REG 0x60 104#define IT87_BASE_REG 0x60
102 105
@@ -110,10 +113,6 @@ static int update_vbat;
110/* Not all BIOSes properly configure the PWM registers */ 113/* Not all BIOSes properly configure the PWM registers */
111static int fix_pwm_polarity; 114static int fix_pwm_polarity;
112 115
113/* Values read from Super-I/O config space */
114static u16 chip_type;
115static u8 vid_value;
116
117/* Many IT87 constants specified below */ 116/* Many IT87 constants specified below */
118 117
119/* Length of ISA address segment */ 118/* Length of ISA address segment */
@@ -214,13 +213,20 @@ static const unsigned int pwm_freq[8] = {
214}; 213};
215 214
216 215
216struct it87_sio_data {
217 enum chips type;
218 /* Values read from Super-I/O config space */
219 u8 vid_value;
220};
221
217/* For each registered chip, we need to keep some data in memory. 222/* For each registered chip, we need to keep some data in memory.
218 The structure is dynamically allocated. */ 223 The structure is dynamically allocated. */
219struct it87_data { 224struct it87_data {
220 struct i2c_client client;
221 struct class_device *class_dev; 225 struct class_device *class_dev;
222 enum chips type; 226 enum chips type;
223 227
228 unsigned short addr;
229 const char *name;
224 struct mutex update_lock; 230 struct mutex update_lock;
225 char valid; /* !=0 if following fields are valid */ 231 char valid; /* !=0 if following fields are valid */
226 unsigned long last_updated; /* In jiffies */ 232 unsigned long last_updated; /* In jiffies */
@@ -245,26 +251,25 @@ struct it87_data {
245}; 251};
246 252
247 253
248static int it87_detect(struct i2c_adapter *adapter); 254static int it87_probe(struct platform_device *pdev);
249static int it87_detach_client(struct i2c_client *client); 255static int it87_remove(struct platform_device *pdev);
250 256
251static int it87_read_value(struct i2c_client *client, u8 reg); 257static int it87_read_value(struct it87_data *data, u8 reg);
252static void it87_write_value(struct i2c_client *client, u8 reg, u8 value); 258static void it87_write_value(struct it87_data *data, u8 reg, u8 value);
253static struct it87_data *it87_update_device(struct device *dev); 259static struct it87_data *it87_update_device(struct device *dev);
254static int it87_check_pwm(struct i2c_client *client); 260static int it87_check_pwm(struct device *dev);
255static void it87_init_client(struct i2c_client *client, struct it87_data *data); 261static void it87_init_device(struct platform_device *pdev);
256 262
257 263
258static struct i2c_driver it87_isa_driver = { 264static struct platform_driver it87_driver = {
259 .driver = { 265 .driver = {
260 .owner = THIS_MODULE, 266 .owner = THIS_MODULE,
261 .name = "it87-isa", 267 .name = DRVNAME,
262 }, 268 },
263 .attach_adapter = it87_detect, 269 .probe = it87_probe,
264 .detach_client = it87_detach_client, 270 .remove = __devexit_p(it87_remove),
265}; 271};
266 272
267
268static ssize_t show_in(struct device *dev, struct device_attribute *attr, 273static ssize_t show_in(struct device *dev, struct device_attribute *attr,
269 char *buf) 274 char *buf)
270{ 275{
@@ -301,13 +306,12 @@ static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
301 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 306 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
302 int nr = sensor_attr->index; 307 int nr = sensor_attr->index;
303 308
304 struct i2c_client *client = to_i2c_client(dev); 309 struct it87_data *data = dev_get_drvdata(dev);
305 struct it87_data *data = i2c_get_clientdata(client);
306 unsigned long val = simple_strtoul(buf, NULL, 10); 310 unsigned long val = simple_strtoul(buf, NULL, 10);
307 311
308 mutex_lock(&data->update_lock); 312 mutex_lock(&data->update_lock);
309 data->in_min[nr] = IN_TO_REG(val); 313 data->in_min[nr] = IN_TO_REG(val);
310 it87_write_value(client, IT87_REG_VIN_MIN(nr), 314 it87_write_value(data, IT87_REG_VIN_MIN(nr),
311 data->in_min[nr]); 315 data->in_min[nr]);
312 mutex_unlock(&data->update_lock); 316 mutex_unlock(&data->update_lock);
313 return count; 317 return count;
@@ -318,13 +322,12 @@ static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
318 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 322 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
319 int nr = sensor_attr->index; 323 int nr = sensor_attr->index;
320 324
321 struct i2c_client *client = to_i2c_client(dev); 325 struct it87_data *data = dev_get_drvdata(dev);
322 struct it87_data *data = i2c_get_clientdata(client);
323 unsigned long val = simple_strtoul(buf, NULL, 10); 326 unsigned long val = simple_strtoul(buf, NULL, 10);
324 327
325 mutex_lock(&data->update_lock); 328 mutex_lock(&data->update_lock);
326 data->in_max[nr] = IN_TO_REG(val); 329 data->in_max[nr] = IN_TO_REG(val);
327 it87_write_value(client, IT87_REG_VIN_MAX(nr), 330 it87_write_value(data, IT87_REG_VIN_MAX(nr),
328 data->in_max[nr]); 331 data->in_max[nr]);
329 mutex_unlock(&data->update_lock); 332 mutex_unlock(&data->update_lock);
330 return count; 333 return count;
@@ -392,13 +395,12 @@ static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
392 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 395 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
393 int nr = sensor_attr->index; 396 int nr = sensor_attr->index;
394 397
395 struct i2c_client *client = to_i2c_client(dev); 398 struct it87_data *data = dev_get_drvdata(dev);
396 struct it87_data *data = i2c_get_clientdata(client);
397 int val = simple_strtol(buf, NULL, 10); 399 int val = simple_strtol(buf, NULL, 10);
398 400
399 mutex_lock(&data->update_lock); 401 mutex_lock(&data->update_lock);
400 data->temp_high[nr] = TEMP_TO_REG(val); 402 data->temp_high[nr] = TEMP_TO_REG(val);
401 it87_write_value(client, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]); 403 it87_write_value(data, IT87_REG_TEMP_HIGH(nr), data->temp_high[nr]);
402 mutex_unlock(&data->update_lock); 404 mutex_unlock(&data->update_lock);
403 return count; 405 return count;
404} 406}
@@ -408,13 +410,12 @@ static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
408 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 410 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
409 int nr = sensor_attr->index; 411 int nr = sensor_attr->index;
410 412
411 struct i2c_client *client = to_i2c_client(dev); 413 struct it87_data *data = dev_get_drvdata(dev);
412 struct it87_data *data = i2c_get_clientdata(client);
413 int val = simple_strtol(buf, NULL, 10); 414 int val = simple_strtol(buf, NULL, 10);
414 415
415 mutex_lock(&data->update_lock); 416 mutex_lock(&data->update_lock);
416 data->temp_low[nr] = TEMP_TO_REG(val); 417 data->temp_low[nr] = TEMP_TO_REG(val);
417 it87_write_value(client, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]); 418 it87_write_value(data, IT87_REG_TEMP_LOW(nr), data->temp_low[nr]);
418 mutex_unlock(&data->update_lock); 419 mutex_unlock(&data->update_lock);
419 return count; 420 return count;
420} 421}
@@ -451,8 +452,7 @@ static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
451 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 452 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
452 int nr = sensor_attr->index; 453 int nr = sensor_attr->index;
453 454
454 struct i2c_client *client = to_i2c_client(dev); 455 struct it87_data *data = dev_get_drvdata(dev);
455 struct it87_data *data = i2c_get_clientdata(client);
456 int val = simple_strtol(buf, NULL, 10); 456 int val = simple_strtol(buf, NULL, 10);
457 457
458 mutex_lock(&data->update_lock); 458 mutex_lock(&data->update_lock);
@@ -468,7 +468,7 @@ static ssize_t set_sensor(struct device *dev, struct device_attribute *attr,
468 mutex_unlock(&data->update_lock); 468 mutex_unlock(&data->update_lock);
469 return -EINVAL; 469 return -EINVAL;
470 } 470 }
471 it87_write_value(client, IT87_REG_TEMP_ENABLE, data->sensor); 471 it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
472 mutex_unlock(&data->update_lock); 472 mutex_unlock(&data->update_lock);
473 return count; 473 return count;
474} 474}
@@ -542,13 +542,12 @@ static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
542 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 542 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
543 int nr = sensor_attr->index; 543 int nr = sensor_attr->index;
544 544
545 struct i2c_client *client = to_i2c_client(dev); 545 struct it87_data *data = dev_get_drvdata(dev);
546 struct it87_data *data = i2c_get_clientdata(client);
547 int val = simple_strtol(buf, NULL, 10); 546 int val = simple_strtol(buf, NULL, 10);
548 u8 reg; 547 u8 reg;
549 548
550 mutex_lock(&data->update_lock); 549 mutex_lock(&data->update_lock);
551 reg = it87_read_value(client, IT87_REG_FAN_DIV); 550 reg = it87_read_value(data, IT87_REG_FAN_DIV);
552 switch (nr) { 551 switch (nr) {
553 case 0: data->fan_div[nr] = reg & 0x07; break; 552 case 0: data->fan_div[nr] = reg & 0x07; break;
554 case 1: data->fan_div[nr] = (reg >> 3) & 0x07; break; 553 case 1: data->fan_div[nr] = (reg >> 3) & 0x07; break;
@@ -556,7 +555,7 @@ static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
556 } 555 }
557 556
558 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 557 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
559 it87_write_value(client, IT87_REG_FAN_MIN(nr), data->fan_min[nr]); 558 it87_write_value(data, IT87_REG_FAN_MIN(nr), data->fan_min[nr]);
560 mutex_unlock(&data->update_lock); 559 mutex_unlock(&data->update_lock);
561 return count; 560 return count;
562} 561}
@@ -566,14 +565,13 @@ static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
566 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 565 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
567 int nr = sensor_attr->index; 566 int nr = sensor_attr->index;
568 567
569 struct i2c_client *client = to_i2c_client(dev); 568 struct it87_data *data = dev_get_drvdata(dev);
570 struct it87_data *data = i2c_get_clientdata(client);
571 unsigned long val = simple_strtoul(buf, NULL, 10); 569 unsigned long val = simple_strtoul(buf, NULL, 10);
572 int min; 570 int min;
573 u8 old; 571 u8 old;
574 572
575 mutex_lock(&data->update_lock); 573 mutex_lock(&data->update_lock);
576 old = it87_read_value(client, IT87_REG_FAN_DIV); 574 old = it87_read_value(data, IT87_REG_FAN_DIV);
577 575
578 /* Save fan min limit */ 576 /* Save fan min limit */
579 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])); 577 min = FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr]));
@@ -594,11 +592,11 @@ static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
594 val |= (data->fan_div[1] & 0x07) << 3; 592 val |= (data->fan_div[1] & 0x07) << 3;
595 if (data->fan_div[2] == 3) 593 if (data->fan_div[2] == 3)
596 val |= 0x1 << 6; 594 val |= 0x1 << 6;
597 it87_write_value(client, IT87_REG_FAN_DIV, val); 595 it87_write_value(data, IT87_REG_FAN_DIV, val);
598 596
599 /* Restore fan min limit */ 597 /* Restore fan min limit */
600 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 598 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
601 it87_write_value(client, IT87_REG_FAN_MIN(nr), data->fan_min[nr]); 599 it87_write_value(data, IT87_REG_FAN_MIN(nr), data->fan_min[nr]);
602 600
603 mutex_unlock(&data->update_lock); 601 mutex_unlock(&data->update_lock);
604 return count; 602 return count;
@@ -609,8 +607,7 @@ static ssize_t set_pwm_enable(struct device *dev,
609 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 607 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
610 int nr = sensor_attr->index; 608 int nr = sensor_attr->index;
611 609
612 struct i2c_client *client = to_i2c_client(dev); 610 struct it87_data *data = dev_get_drvdata(dev);
613 struct it87_data *data = i2c_get_clientdata(client);
614 int val = simple_strtol(buf, NULL, 10); 611 int val = simple_strtol(buf, NULL, 10);
615 612
616 mutex_lock(&data->update_lock); 613 mutex_lock(&data->update_lock);
@@ -618,17 +615,17 @@ static ssize_t set_pwm_enable(struct device *dev,
618 if (val == 0) { 615 if (val == 0) {
619 int tmp; 616 int tmp;
620 /* make sure the fan is on when in on/off mode */ 617 /* make sure the fan is on when in on/off mode */
621 tmp = it87_read_value(client, IT87_REG_FAN_CTL); 618 tmp = it87_read_value(data, IT87_REG_FAN_CTL);
622 it87_write_value(client, IT87_REG_FAN_CTL, tmp | (1 << nr)); 619 it87_write_value(data, IT87_REG_FAN_CTL, tmp | (1 << nr));
623 /* set on/off mode */ 620 /* set on/off mode */
624 data->fan_main_ctrl &= ~(1 << nr); 621 data->fan_main_ctrl &= ~(1 << nr);
625 it87_write_value(client, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl); 622 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
626 } else if (val == 1) { 623 } else if (val == 1) {
627 /* set SmartGuardian mode */ 624 /* set SmartGuardian mode */
628 data->fan_main_ctrl |= (1 << nr); 625 data->fan_main_ctrl |= (1 << nr);
629 it87_write_value(client, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl); 626 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
630 /* set saved pwm value, clear FAN_CTLX PWM mode bit */ 627 /* set saved pwm value, clear FAN_CTLX PWM mode bit */
631 it87_write_value(client, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr])); 628 it87_write_value(data, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr]));
632 } else { 629 } else {
633 mutex_unlock(&data->update_lock); 630 mutex_unlock(&data->update_lock);
634 return -EINVAL; 631 return -EINVAL;
@@ -643,8 +640,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
643 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 640 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
644 int nr = sensor_attr->index; 641 int nr = sensor_attr->index;
645 642
646 struct i2c_client *client = to_i2c_client(dev); 643 struct it87_data *data = dev_get_drvdata(dev);
647 struct it87_data *data = i2c_get_clientdata(client);
648 int val = simple_strtol(buf, NULL, 10); 644 int val = simple_strtol(buf, NULL, 10);
649 645
650 if (val < 0 || val > 255) 646 if (val < 0 || val > 255)
@@ -653,15 +649,14 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
653 mutex_lock(&data->update_lock); 649 mutex_lock(&data->update_lock);
654 data->manual_pwm_ctl[nr] = val; 650 data->manual_pwm_ctl[nr] = val;
655 if (data->fan_main_ctrl & (1 << nr)) 651 if (data->fan_main_ctrl & (1 << nr))
656 it87_write_value(client, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr])); 652 it87_write_value(data, IT87_REG_PWM(nr), PWM_TO_REG(data->manual_pwm_ctl[nr]));
657 mutex_unlock(&data->update_lock); 653 mutex_unlock(&data->update_lock);
658 return count; 654 return count;
659} 655}
660static ssize_t set_pwm_freq(struct device *dev, 656static ssize_t set_pwm_freq(struct device *dev,
661 struct device_attribute *attr, const char *buf, size_t count) 657 struct device_attribute *attr, const char *buf, size_t count)
662{ 658{
663 struct i2c_client *client = to_i2c_client(dev); 659 struct it87_data *data = dev_get_drvdata(dev);
664 struct it87_data *data = i2c_get_clientdata(client);
665 unsigned long val = simple_strtoul(buf, NULL, 10); 660 unsigned long val = simple_strtoul(buf, NULL, 10);
666 int i; 661 int i;
667 662
@@ -672,9 +667,9 @@ static ssize_t set_pwm_freq(struct device *dev,
672 } 667 }
673 668
674 mutex_lock(&data->update_lock); 669 mutex_lock(&data->update_lock);
675 data->fan_ctl = it87_read_value(client, IT87_REG_FAN_CTL) & 0x8f; 670 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
676 data->fan_ctl |= i << 4; 671 data->fan_ctl |= i << 4;
677 it87_write_value(client, IT87_REG_FAN_CTL, data->fan_ctl); 672 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
678 mutex_unlock(&data->update_lock); 673 mutex_unlock(&data->update_lock);
679 674
680 return count; 675 return count;
@@ -729,15 +724,14 @@ static ssize_t set_fan16_min(struct device *dev, struct device_attribute *attr,
729{ 724{
730 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 725 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
731 int nr = sensor_attr->index; 726 int nr = sensor_attr->index;
732 struct i2c_client *client = to_i2c_client(dev); 727 struct it87_data *data = dev_get_drvdata(dev);
733 struct it87_data *data = i2c_get_clientdata(client);
734 int val = simple_strtol(buf, NULL, 10); 728 int val = simple_strtol(buf, NULL, 10);
735 729
736 mutex_lock(&data->update_lock); 730 mutex_lock(&data->update_lock);
737 data->fan_min[nr] = FAN16_TO_REG(val); 731 data->fan_min[nr] = FAN16_TO_REG(val);
738 it87_write_value(client, IT87_REG_FAN_MIN(nr), 732 it87_write_value(data, IT87_REG_FAN_MIN(nr),
739 data->fan_min[nr] & 0xff); 733 data->fan_min[nr] & 0xff);
740 it87_write_value(client, IT87_REG_FANX_MIN(nr), 734 it87_write_value(data, IT87_REG_FANX_MIN(nr),
741 data->fan_min[nr] >> 8); 735 data->fan_min[nr] >> 8);
742 mutex_unlock(&data->update_lock); 736 mutex_unlock(&data->update_lock);
743 return count; 737 return count;
@@ -775,8 +769,7 @@ show_vrm_reg(struct device *dev, struct device_attribute *attr, char *buf)
775static ssize_t 769static ssize_t
776store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 770store_vrm_reg(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
777{ 771{
778 struct i2c_client *client = to_i2c_client(dev); 772 struct it87_data *data = dev_get_drvdata(dev);
779 struct it87_data *data = i2c_get_clientdata(client);
780 u32 val; 773 u32 val;
781 774
782 val = simple_strtoul(buf, NULL, 10); 775 val = simple_strtoul(buf, NULL, 10);
@@ -794,6 +787,14 @@ show_vid_reg(struct device *dev, struct device_attribute *attr, char *buf)
794} 787}
795static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL); 788static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid_reg, NULL);
796 789
790static ssize_t show_name(struct device *dev, struct device_attribute
791 *devattr, char *buf)
792{
793 struct it87_data *data = dev_get_drvdata(dev);
794 return sprintf(buf, "%s\n", data->name);
795}
796static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
797
797static struct attribute *it87_attributes[] = { 798static struct attribute *it87_attributes[] = {
798 &sensor_dev_attr_in0_input.dev_attr.attr, 799 &sensor_dev_attr_in0_input.dev_attr.attr,
799 &sensor_dev_attr_in1_input.dev_attr.attr, 800 &sensor_dev_attr_in1_input.dev_attr.attr,
@@ -835,6 +836,7 @@ static struct attribute *it87_attributes[] = {
835 &sensor_dev_attr_temp3_type.dev_attr.attr, 836 &sensor_dev_attr_temp3_type.dev_attr.attr,
836 837
837 &dev_attr_alarms.attr, 838 &dev_attr_alarms.attr,
839 &dev_attr_name.attr,
838 NULL 840 NULL
839}; 841};
840 842
@@ -877,17 +879,36 @@ static const struct attribute_group it87_group_opt = {
877}; 879};
878 880
879/* SuperIO detection - will change isa_address if a chip is found */ 881/* SuperIO detection - will change isa_address if a chip is found */
880static int __init it87_find(unsigned short *address) 882static int __init it87_find(unsigned short *address,
883 struct it87_sio_data *sio_data)
881{ 884{
882 int err = -ENODEV; 885 int err = -ENODEV;
886 u16 chip_type;
883 887
884 superio_enter(); 888 superio_enter();
885 chip_type = superio_inw(DEVID); 889 chip_type = superio_inw(DEVID);
886 if (chip_type != IT8712F_DEVID 890
887 && chip_type != IT8716F_DEVID 891 switch (chip_type) {
888 && chip_type != IT8718F_DEVID 892 case IT8705F_DEVID:
889 && chip_type != IT8705F_DEVID) 893 sio_data->type = it87;
890 goto exit; 894 break;
895 case IT8712F_DEVID:
896 sio_data->type = it8712;
897 break;
898 case IT8716F_DEVID:
899 case IT8726F_DEVID:
900 sio_data->type = it8716;
901 break;
902 case IT8718F_DEVID:
903 sio_data->type = it8718;
904 break;
905 case 0xffff: /* No device at all */
906 goto exit;
907 default:
908 pr_debug(DRVNAME ": Unsupported chip (DEVID=0x%x)\n",
909 chip_type);
910 goto exit;
911 }
891 912
892 superio_select(PME); 913 superio_select(PME);
893 if (!(superio_inb(IT87_ACT_REG) & 0x01)) { 914 if (!(superio_inb(IT87_ACT_REG) & 0x01)) {
@@ -911,7 +932,7 @@ static int __init it87_find(unsigned short *address)
911 932
912 superio_select(GPIO); 933 superio_select(GPIO);
913 if (chip_type == it8718) 934 if (chip_type == it8718)
914 vid_value = superio_inb(IT87_SIO_VID_REG); 935 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
915 936
916 reg = superio_inb(IT87_SIO_PINX2_REG); 937 reg = superio_inb(IT87_SIO_PINX2_REG);
917 if (reg & (1 << 0)) 938 if (reg & (1 << 0))
@@ -925,18 +946,26 @@ exit:
925 return err; 946 return err;
926} 947}
927 948
928/* This function is called by i2c_probe */ 949static int __devinit it87_probe(struct platform_device *pdev)
929static int it87_detect(struct i2c_adapter *adapter)
930{ 950{
931 struct i2c_client *new_client;
932 struct it87_data *data; 951 struct it87_data *data;
952 struct resource *res;
953 struct device *dev = &pdev->dev;
954 struct it87_sio_data *sio_data = dev->platform_data;
933 int err = 0; 955 int err = 0;
934 const char *name;
935 int enable_pwm_interface; 956 int enable_pwm_interface;
936 957 static const char *names[] = {
937 /* Reserve the ISA region */ 958 "it87",
938 if (!request_region(isa_address, IT87_EXTENT, 959 "it8712",
939 it87_isa_driver.driver.name)){ 960 "it8716",
961 "it8718",
962 };
963
964 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
965 if (!request_region(res->start, IT87_EXTENT, DRVNAME)) {
966 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
967 (unsigned long)res->start,
968 (unsigned long)(res->start + IT87_EXTENT - 1));
940 err = -EBUSY; 969 err = -EBUSY;
941 goto ERROR0; 970 goto ERROR0;
942 } 971 }
@@ -946,129 +975,104 @@ static int it87_detect(struct i2c_adapter *adapter)
946 goto ERROR1; 975 goto ERROR1;
947 } 976 }
948 977
949 new_client = &data->client; 978 data->addr = res->start;
950 i2c_set_clientdata(new_client, data); 979 data->type = sio_data->type;
951 new_client->addr = isa_address; 980 data->name = names[sio_data->type];
952 new_client->adapter = adapter;
953 new_client->driver = &it87_isa_driver;
954 981
955 /* Now, we do the remaining detection. */ 982 /* Now, we do the remaining detection. */
956 if ((it87_read_value(new_client, IT87_REG_CONFIG) & 0x80) 983 if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80)
957 || it87_read_value(new_client, IT87_REG_CHIPID) != 0x90) { 984 || it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
958 err = -ENODEV; 985 err = -ENODEV;
959 goto ERROR2; 986 goto ERROR2;
960 } 987 }
961 988
962 /* Determine the chip type. */ 989 platform_set_drvdata(pdev, data);
963 switch (chip_type) {
964 case IT8712F_DEVID:
965 data->type = it8712;
966 name = "it8712";
967 break;
968 case IT8716F_DEVID:
969 data->type = it8716;
970 name = "it8716";
971 break;
972 case IT8718F_DEVID:
973 data->type = it8718;
974 name = "it8718";
975 break;
976 default:
977 data->type = it87;
978 name = "it87";
979 }
980 990
981 /* Fill in the remaining client fields and put it into the global list */
982 strlcpy(new_client->name, name, I2C_NAME_SIZE);
983 mutex_init(&data->update_lock); 991 mutex_init(&data->update_lock);
984 992
985 /* Tell the I2C layer a new client has arrived */
986 if ((err = i2c_attach_client(new_client)))
987 goto ERROR2;
988
989 /* Check PWM configuration */ 993 /* Check PWM configuration */
990 enable_pwm_interface = it87_check_pwm(new_client); 994 enable_pwm_interface = it87_check_pwm(dev);
991 995
992 /* Initialize the IT87 chip */ 996 /* Initialize the IT87 chip */
993 it87_init_client(new_client, data); 997 it87_init_device(pdev);
994 998
995 /* Register sysfs hooks */ 999 /* Register sysfs hooks */
996 if ((err = sysfs_create_group(&new_client->dev.kobj, &it87_group))) 1000 if ((err = sysfs_create_group(&dev->kobj, &it87_group)))
997 goto ERROR3; 1001 goto ERROR2;
998 1002
999 /* Do not create fan files for disabled fans */ 1003 /* Do not create fan files for disabled fans */
1000 if (data->type == it8716 || data->type == it8718) { 1004 if (data->type == it8716 || data->type == it8718) {
1001 /* 16-bit tachometers */ 1005 /* 16-bit tachometers */
1002 if (data->has_fan & (1 << 0)) { 1006 if (data->has_fan & (1 << 0)) {
1003 if ((err = device_create_file(&new_client->dev, 1007 if ((err = device_create_file(dev,
1004 &sensor_dev_attr_fan1_input16.dev_attr)) 1008 &sensor_dev_attr_fan1_input16.dev_attr))
1005 || (err = device_create_file(&new_client->dev, 1009 || (err = device_create_file(dev,
1006 &sensor_dev_attr_fan1_min16.dev_attr))) 1010 &sensor_dev_attr_fan1_min16.dev_attr)))
1007 goto ERROR4; 1011 goto ERROR4;
1008 } 1012 }
1009 if (data->has_fan & (1 << 1)) { 1013 if (data->has_fan & (1 << 1)) {
1010 if ((err = device_create_file(&new_client->dev, 1014 if ((err = device_create_file(dev,
1011 &sensor_dev_attr_fan2_input16.dev_attr)) 1015 &sensor_dev_attr_fan2_input16.dev_attr))
1012 || (err = device_create_file(&new_client->dev, 1016 || (err = device_create_file(dev,
1013 &sensor_dev_attr_fan2_min16.dev_attr))) 1017 &sensor_dev_attr_fan2_min16.dev_attr)))
1014 goto ERROR4; 1018 goto ERROR4;
1015 } 1019 }
1016 if (data->has_fan & (1 << 2)) { 1020 if (data->has_fan & (1 << 2)) {
1017 if ((err = device_create_file(&new_client->dev, 1021 if ((err = device_create_file(dev,
1018 &sensor_dev_attr_fan3_input16.dev_attr)) 1022 &sensor_dev_attr_fan3_input16.dev_attr))
1019 || (err = device_create_file(&new_client->dev, 1023 || (err = device_create_file(dev,
1020 &sensor_dev_attr_fan3_min16.dev_attr))) 1024 &sensor_dev_attr_fan3_min16.dev_attr)))
1021 goto ERROR4; 1025 goto ERROR4;
1022 } 1026 }
1023 } else { 1027 } else {
1024 /* 8-bit tachometers with clock divider */ 1028 /* 8-bit tachometers with clock divider */
1025 if (data->has_fan & (1 << 0)) { 1029 if (data->has_fan & (1 << 0)) {
1026 if ((err = device_create_file(&new_client->dev, 1030 if ((err = device_create_file(dev,
1027 &sensor_dev_attr_fan1_input.dev_attr)) 1031 &sensor_dev_attr_fan1_input.dev_attr))
1028 || (err = device_create_file(&new_client->dev, 1032 || (err = device_create_file(dev,
1029 &sensor_dev_attr_fan1_min.dev_attr)) 1033 &sensor_dev_attr_fan1_min.dev_attr))
1030 || (err = device_create_file(&new_client->dev, 1034 || (err = device_create_file(dev,
1031 &sensor_dev_attr_fan1_div.dev_attr))) 1035 &sensor_dev_attr_fan1_div.dev_attr)))
1032 goto ERROR4; 1036 goto ERROR4;
1033 } 1037 }
1034 if (data->has_fan & (1 << 1)) { 1038 if (data->has_fan & (1 << 1)) {
1035 if ((err = device_create_file(&new_client->dev, 1039 if ((err = device_create_file(dev,
1036 &sensor_dev_attr_fan2_input.dev_attr)) 1040 &sensor_dev_attr_fan2_input.dev_attr))
1037 || (err = device_create_file(&new_client->dev, 1041 || (err = device_create_file(dev,
1038 &sensor_dev_attr_fan2_min.dev_attr)) 1042 &sensor_dev_attr_fan2_min.dev_attr))
1039 || (err = device_create_file(&new_client->dev, 1043 || (err = device_create_file(dev,
1040 &sensor_dev_attr_fan2_div.dev_attr))) 1044 &sensor_dev_attr_fan2_div.dev_attr)))
1041 goto ERROR4; 1045 goto ERROR4;
1042 } 1046 }
1043 if (data->has_fan & (1 << 2)) { 1047 if (data->has_fan & (1 << 2)) {
1044 if ((err = device_create_file(&new_client->dev, 1048 if ((err = device_create_file(dev,
1045 &sensor_dev_attr_fan3_input.dev_attr)) 1049 &sensor_dev_attr_fan3_input.dev_attr))
1046 || (err = device_create_file(&new_client->dev, 1050 || (err = device_create_file(dev,
1047 &sensor_dev_attr_fan3_min.dev_attr)) 1051 &sensor_dev_attr_fan3_min.dev_attr))
1048 || (err = device_create_file(&new_client->dev, 1052 || (err = device_create_file(dev,
1049 &sensor_dev_attr_fan3_div.dev_attr))) 1053 &sensor_dev_attr_fan3_div.dev_attr)))
1050 goto ERROR4; 1054 goto ERROR4;
1051 } 1055 }
1052 } 1056 }
1053 1057
1054 if (enable_pwm_interface) { 1058 if (enable_pwm_interface) {
1055 if ((err = device_create_file(&new_client->dev, 1059 if ((err = device_create_file(dev,
1056 &sensor_dev_attr_pwm1_enable.dev_attr)) 1060 &sensor_dev_attr_pwm1_enable.dev_attr))
1057 || (err = device_create_file(&new_client->dev, 1061 || (err = device_create_file(dev,
1058 &sensor_dev_attr_pwm2_enable.dev_attr)) 1062 &sensor_dev_attr_pwm2_enable.dev_attr))
1059 || (err = device_create_file(&new_client->dev, 1063 || (err = device_create_file(dev,
1060 &sensor_dev_attr_pwm3_enable.dev_attr)) 1064 &sensor_dev_attr_pwm3_enable.dev_attr))
1061 || (err = device_create_file(&new_client->dev, 1065 || (err = device_create_file(dev,
1062 &sensor_dev_attr_pwm1.dev_attr)) 1066 &sensor_dev_attr_pwm1.dev_attr))
1063 || (err = device_create_file(&new_client->dev, 1067 || (err = device_create_file(dev,
1064 &sensor_dev_attr_pwm2.dev_attr)) 1068 &sensor_dev_attr_pwm2.dev_attr))
1065 || (err = device_create_file(&new_client->dev, 1069 || (err = device_create_file(dev,
1066 &sensor_dev_attr_pwm3.dev_attr)) 1070 &sensor_dev_attr_pwm3.dev_attr))
1067 || (err = device_create_file(&new_client->dev, 1071 || (err = device_create_file(dev,
1068 &dev_attr_pwm1_freq)) 1072 &dev_attr_pwm1_freq))
1069 || (err = device_create_file(&new_client->dev, 1073 || (err = device_create_file(dev,
1070 &dev_attr_pwm2_freq)) 1074 &dev_attr_pwm2_freq))
1071 || (err = device_create_file(&new_client->dev, 1075 || (err = device_create_file(dev,
1072 &dev_attr_pwm3_freq))) 1076 &dev_attr_pwm3_freq)))
1073 goto ERROR4; 1077 goto ERROR4;
1074 } 1078 }
@@ -1077,15 +1081,15 @@ static int it87_detect(struct i2c_adapter *adapter)
1077 || data->type == it8718) { 1081 || data->type == it8718) {
1078 data->vrm = vid_which_vrm(); 1082 data->vrm = vid_which_vrm();
1079 /* VID reading from Super-I/O config space if available */ 1083 /* VID reading from Super-I/O config space if available */
1080 data->vid = vid_value; 1084 data->vid = sio_data->vid_value;
1081 if ((err = device_create_file(&new_client->dev, 1085 if ((err = device_create_file(dev,
1082 &dev_attr_vrm)) 1086 &dev_attr_vrm))
1083 || (err = device_create_file(&new_client->dev, 1087 || (err = device_create_file(dev,
1084 &dev_attr_cpu0_vid))) 1088 &dev_attr_cpu0_vid)))
1085 goto ERROR4; 1089 goto ERROR4;
1086 } 1090 }
1087 1091
1088 data->class_dev = hwmon_device_register(&new_client->dev); 1092 data->class_dev = hwmon_device_register(dev);
1089 if (IS_ERR(data->class_dev)) { 1093 if (IS_ERR(data->class_dev)) {
1090 err = PTR_ERR(data->class_dev); 1094 err = PTR_ERR(data->class_dev);
1091 goto ERROR4; 1095 goto ERROR4;
@@ -1094,31 +1098,27 @@ static int it87_detect(struct i2c_adapter *adapter)
1094 return 0; 1098 return 0;
1095 1099
1096ERROR4: 1100ERROR4:
1097 sysfs_remove_group(&new_client->dev.kobj, &it87_group); 1101 sysfs_remove_group(&dev->kobj, &it87_group);
1098 sysfs_remove_group(&new_client->dev.kobj, &it87_group_opt); 1102 sysfs_remove_group(&dev->kobj, &it87_group_opt);
1099ERROR3:
1100 i2c_detach_client(new_client);
1101ERROR2: 1103ERROR2:
1104 platform_set_drvdata(pdev, NULL);
1102 kfree(data); 1105 kfree(data);
1103ERROR1: 1106ERROR1:
1104 release_region(isa_address, IT87_EXTENT); 1107 release_region(res->start, IT87_EXTENT);
1105ERROR0: 1108ERROR0:
1106 return err; 1109 return err;
1107} 1110}
1108 1111
1109static int it87_detach_client(struct i2c_client *client) 1112static int __devexit it87_remove(struct platform_device *pdev)
1110{ 1113{
1111 struct it87_data *data = i2c_get_clientdata(client); 1114 struct it87_data *data = platform_get_drvdata(pdev);
1112 int err;
1113 1115
1114 hwmon_device_unregister(data->class_dev); 1116 hwmon_device_unregister(data->class_dev);
1115 sysfs_remove_group(&client->dev.kobj, &it87_group); 1117 sysfs_remove_group(&pdev->dev.kobj, &it87_group);
1116 sysfs_remove_group(&client->dev.kobj, &it87_group_opt); 1118 sysfs_remove_group(&pdev->dev.kobj, &it87_group_opt);
1117 1119
1118 if ((err = i2c_detach_client(client))) 1120 release_region(data->addr, IT87_EXTENT);
1119 return err; 1121 platform_set_drvdata(pdev, NULL);
1120
1121 release_region(client->addr, IT87_EXTENT);
1122 kfree(data); 1122 kfree(data);
1123 1123
1124 return 0; 1124 return 0;
@@ -1127,28 +1127,29 @@ static int it87_detach_client(struct i2c_client *client)
1127/* Must be called with data->update_lock held, except during initialization. 1127/* Must be called with data->update_lock held, except during initialization.
1128 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, 1128 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1129 would slow down the IT87 access and should not be necessary. */ 1129 would slow down the IT87 access and should not be necessary. */
1130static int it87_read_value(struct i2c_client *client, u8 reg) 1130static int it87_read_value(struct it87_data *data, u8 reg)
1131{ 1131{
1132 outb_p(reg, client->addr + IT87_ADDR_REG_OFFSET); 1132 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1133 return inb_p(client->addr + IT87_DATA_REG_OFFSET); 1133 return inb_p(data->addr + IT87_DATA_REG_OFFSET);
1134} 1134}
1135 1135
1136/* Must be called with data->update_lock held, except during initialization. 1136/* Must be called with data->update_lock held, except during initialization.
1137 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks, 1137 We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
1138 would slow down the IT87 access and should not be necessary. */ 1138 would slow down the IT87 access and should not be necessary. */
1139static void it87_write_value(struct i2c_client *client, u8 reg, u8 value) 1139static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
1140{ 1140{
1141 outb_p(reg, client->addr + IT87_ADDR_REG_OFFSET); 1141 outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
1142 outb_p(value, client->addr + IT87_DATA_REG_OFFSET); 1142 outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
1143} 1143}
1144 1144
1145/* Return 1 if and only if the PWM interface is safe to use */ 1145/* Return 1 if and only if the PWM interface is safe to use */
1146static int it87_check_pwm(struct i2c_client *client) 1146static int __devinit it87_check_pwm(struct device *dev)
1147{ 1147{
1148 struct it87_data *data = dev_get_drvdata(dev);
1148 /* Some BIOSes fail to correctly configure the IT87 fans. All fans off 1149 /* Some BIOSes fail to correctly configure the IT87 fans. All fans off
1149 * and polarity set to active low is sign that this is the case so we 1150 * and polarity set to active low is sign that this is the case so we
1150 * disable pwm control to protect the user. */ 1151 * disable pwm control to protect the user. */
1151 int tmp = it87_read_value(client, IT87_REG_FAN_CTL); 1152 int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1152 if ((tmp & 0x87) == 0) { 1153 if ((tmp & 0x87) == 0) {
1153 if (fix_pwm_polarity) { 1154 if (fix_pwm_polarity) {
1154 /* The user asks us to attempt a chip reconfiguration. 1155 /* The user asks us to attempt a chip reconfiguration.
@@ -1158,7 +1159,7 @@ static int it87_check_pwm(struct i2c_client *client)
1158 u8 pwm[3]; 1159 u8 pwm[3];
1159 1160
1160 for (i = 0; i < 3; i++) 1161 for (i = 0; i < 3; i++)
1161 pwm[i] = it87_read_value(client, 1162 pwm[i] = it87_read_value(data,
1162 IT87_REG_PWM(i)); 1163 IT87_REG_PWM(i));
1163 1164
1164 /* If any fan is in automatic pwm mode, the polarity 1165 /* If any fan is in automatic pwm mode, the polarity
@@ -1166,26 +1167,26 @@ static int it87_check_pwm(struct i2c_client *client)
1166 * better don't change anything (but still disable the 1167 * better don't change anything (but still disable the
1167 * PWM interface). */ 1168 * PWM interface). */
1168 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) { 1169 if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
1169 dev_info(&client->dev, "Reconfiguring PWM to " 1170 dev_info(dev, "Reconfiguring PWM to "
1170 "active high polarity\n"); 1171 "active high polarity\n");
1171 it87_write_value(client, IT87_REG_FAN_CTL, 1172 it87_write_value(data, IT87_REG_FAN_CTL,
1172 tmp | 0x87); 1173 tmp | 0x87);
1173 for (i = 0; i < 3; i++) 1174 for (i = 0; i < 3; i++)
1174 it87_write_value(client, 1175 it87_write_value(data,
1175 IT87_REG_PWM(i), 1176 IT87_REG_PWM(i),
1176 0x7f & ~pwm[i]); 1177 0x7f & ~pwm[i]);
1177 return 1; 1178 return 1;
1178 } 1179 }
1179 1180
1180 dev_info(&client->dev, "PWM configuration is " 1181 dev_info(dev, "PWM configuration is "
1181 "too broken to be fixed\n"); 1182 "too broken to be fixed\n");
1182 } 1183 }
1183 1184
1184 dev_info(&client->dev, "Detected broken BIOS " 1185 dev_info(dev, "Detected broken BIOS "
1185 "defaults, disabling PWM interface\n"); 1186 "defaults, disabling PWM interface\n");
1186 return 0; 1187 return 0;
1187 } else if (fix_pwm_polarity) { 1188 } else if (fix_pwm_polarity) {
1188 dev_info(&client->dev, "PWM configuration looks " 1189 dev_info(dev, "PWM configuration looks "
1189 "sane, won't touch\n"); 1190 "sane, won't touch\n");
1190 } 1191 }
1191 1192
@@ -1193,8 +1194,9 @@ static int it87_check_pwm(struct i2c_client *client)
1193} 1194}
1194 1195
1195/* Called when we have found a new IT87. */ 1196/* Called when we have found a new IT87. */
1196static void it87_init_client(struct i2c_client *client, struct it87_data *data) 1197static void __devinit it87_init_device(struct platform_device *pdev)
1197{ 1198{
1199 struct it87_data *data = platform_get_drvdata(pdev);
1198 int tmp, i; 1200 int tmp, i;
1199 1201
1200 /* initialize to sane defaults: 1202 /* initialize to sane defaults:
@@ -1214,48 +1216,48 @@ static void it87_init_client(struct i2c_client *client, struct it87_data *data)
1214 * means -1 degree C, which surprisingly doesn't trigger an alarm, 1216 * means -1 degree C, which surprisingly doesn't trigger an alarm,
1215 * but is still confusing, so change to 127 degrees C. */ 1217 * but is still confusing, so change to 127 degrees C. */
1216 for (i = 0; i < 8; i++) { 1218 for (i = 0; i < 8; i++) {
1217 tmp = it87_read_value(client, IT87_REG_VIN_MIN(i)); 1219 tmp = it87_read_value(data, IT87_REG_VIN_MIN(i));
1218 if (tmp == 0xff) 1220 if (tmp == 0xff)
1219 it87_write_value(client, IT87_REG_VIN_MIN(i), 0); 1221 it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
1220 } 1222 }
1221 for (i = 0; i < 3; i++) { 1223 for (i = 0; i < 3; i++) {
1222 tmp = it87_read_value(client, IT87_REG_TEMP_HIGH(i)); 1224 tmp = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1223 if (tmp == 0xff) 1225 if (tmp == 0xff)
1224 it87_write_value(client, IT87_REG_TEMP_HIGH(i), 127); 1226 it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
1225 } 1227 }
1226 1228
1227 /* Check if temperature channnels are reset manually or by some reason */ 1229 /* Check if temperature channnels are reset manually or by some reason */
1228 tmp = it87_read_value(client, IT87_REG_TEMP_ENABLE); 1230 tmp = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1229 if ((tmp & 0x3f) == 0) { 1231 if ((tmp & 0x3f) == 0) {
1230 /* Temp1,Temp3=thermistor; Temp2=thermal diode */ 1232 /* Temp1,Temp3=thermistor; Temp2=thermal diode */
1231 tmp = (tmp & 0xc0) | 0x2a; 1233 tmp = (tmp & 0xc0) | 0x2a;
1232 it87_write_value(client, IT87_REG_TEMP_ENABLE, tmp); 1234 it87_write_value(data, IT87_REG_TEMP_ENABLE, tmp);
1233 } 1235 }
1234 data->sensor = tmp; 1236 data->sensor = tmp;
1235 1237
1236 /* Check if voltage monitors are reset manually or by some reason */ 1238 /* Check if voltage monitors are reset manually or by some reason */
1237 tmp = it87_read_value(client, IT87_REG_VIN_ENABLE); 1239 tmp = it87_read_value(data, IT87_REG_VIN_ENABLE);
1238 if ((tmp & 0xff) == 0) { 1240 if ((tmp & 0xff) == 0) {
1239 /* Enable all voltage monitors */ 1241 /* Enable all voltage monitors */
1240 it87_write_value(client, IT87_REG_VIN_ENABLE, 0xff); 1242 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
1241 } 1243 }
1242 1244
1243 /* Check if tachometers are reset manually or by some reason */ 1245 /* Check if tachometers are reset manually or by some reason */
1244 data->fan_main_ctrl = it87_read_value(client, IT87_REG_FAN_MAIN_CTRL); 1246 data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
1245 if ((data->fan_main_ctrl & 0x70) == 0) { 1247 if ((data->fan_main_ctrl & 0x70) == 0) {
1246 /* Enable all fan tachometers */ 1248 /* Enable all fan tachometers */
1247 data->fan_main_ctrl |= 0x70; 1249 data->fan_main_ctrl |= 0x70;
1248 it87_write_value(client, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl); 1250 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL, data->fan_main_ctrl);
1249 } 1251 }
1250 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07; 1252 data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
1251 1253
1252 /* Set tachometers to 16-bit mode if needed */ 1254 /* Set tachometers to 16-bit mode if needed */
1253 if (data->type == it8716 || data->type == it8718) { 1255 if (data->type == it8716 || data->type == it8718) {
1254 tmp = it87_read_value(client, IT87_REG_FAN_16BIT); 1256 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
1255 if (~tmp & 0x07 & data->has_fan) { 1257 if (~tmp & 0x07 & data->has_fan) {
1256 dev_dbg(&client->dev, 1258 dev_dbg(&pdev->dev,
1257 "Setting fan1-3 to 16-bit mode\n"); 1259 "Setting fan1-3 to 16-bit mode\n");
1258 it87_write_value(client, IT87_REG_FAN_16BIT, 1260 it87_write_value(data, IT87_REG_FAN_16BIT,
1259 tmp | 0x07); 1261 tmp | 0x07);
1260 } 1262 }
1261 } 1263 }
@@ -1265,7 +1267,7 @@ static void it87_init_client(struct i2c_client *client, struct it87_data *data)
1265 for (i = 0; i < 3; i++) { 1267 for (i = 0; i < 3; i++) {
1266 if (data->fan_main_ctrl & (1 << i)) { 1268 if (data->fan_main_ctrl & (1 << i)) {
1267 /* pwm mode */ 1269 /* pwm mode */
1268 tmp = it87_read_value(client, IT87_REG_PWM(i)); 1270 tmp = it87_read_value(data, IT87_REG_PWM(i));
1269 if (tmp & 0x80) { 1271 if (tmp & 0x80) {
1270 /* automatic pwm - not yet implemented, but 1272 /* automatic pwm - not yet implemented, but
1271 * leave the settings made by the BIOS alone 1273 * leave the settings made by the BIOS alone
@@ -1279,15 +1281,14 @@ static void it87_init_client(struct i2c_client *client, struct it87_data *data)
1279 } 1281 }
1280 1282
1281 /* Start monitoring */ 1283 /* Start monitoring */
1282 it87_write_value(client, IT87_REG_CONFIG, 1284 it87_write_value(data, IT87_REG_CONFIG,
1283 (it87_read_value(client, IT87_REG_CONFIG) & 0x36) 1285 (it87_read_value(data, IT87_REG_CONFIG) & 0x36)
1284 | (update_vbat ? 0x41 : 0x01)); 1286 | (update_vbat ? 0x41 : 0x01));
1285} 1287}
1286 1288
1287static struct it87_data *it87_update_device(struct device *dev) 1289static struct it87_data *it87_update_device(struct device *dev)
1288{ 1290{
1289 struct i2c_client *client = to_i2c_client(dev); 1291 struct it87_data *data = dev_get_drvdata(dev);
1290 struct it87_data *data = i2c_get_clientdata(client);
1291 int i; 1292 int i;
1292 1293
1293 mutex_lock(&data->update_lock); 1294 mutex_lock(&data->update_lock);
@@ -1298,20 +1299,20 @@ static struct it87_data *it87_update_device(struct device *dev)
1298 if (update_vbat) { 1299 if (update_vbat) {
1299 /* Cleared after each update, so reenable. Value 1300 /* Cleared after each update, so reenable. Value
1300 returned by this read will be previous value */ 1301 returned by this read will be previous value */
1301 it87_write_value(client, IT87_REG_CONFIG, 1302 it87_write_value(data, IT87_REG_CONFIG,
1302 it87_read_value(client, IT87_REG_CONFIG) | 0x40); 1303 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
1303 } 1304 }
1304 for (i = 0; i <= 7; i++) { 1305 for (i = 0; i <= 7; i++) {
1305 data->in[i] = 1306 data->in[i] =
1306 it87_read_value(client, IT87_REG_VIN(i)); 1307 it87_read_value(data, IT87_REG_VIN(i));
1307 data->in_min[i] = 1308 data->in_min[i] =
1308 it87_read_value(client, IT87_REG_VIN_MIN(i)); 1309 it87_read_value(data, IT87_REG_VIN_MIN(i));
1309 data->in_max[i] = 1310 data->in_max[i] =
1310 it87_read_value(client, IT87_REG_VIN_MAX(i)); 1311 it87_read_value(data, IT87_REG_VIN_MAX(i));
1311 } 1312 }
1312 /* in8 (battery) has no limit registers */ 1313 /* in8 (battery) has no limit registers */
1313 data->in[8] = 1314 data->in[8] =
1314 it87_read_value(client, IT87_REG_VIN(8)); 1315 it87_read_value(data, IT87_REG_VIN(8));
1315 1316
1316 for (i = 0; i < 3; i++) { 1317 for (i = 0; i < 3; i++) {
1317 /* Skip disabled fans */ 1318 /* Skip disabled fans */
@@ -1319,46 +1320,47 @@ static struct it87_data *it87_update_device(struct device *dev)
1319 continue; 1320 continue;
1320 1321
1321 data->fan_min[i] = 1322 data->fan_min[i] =
1322 it87_read_value(client, IT87_REG_FAN_MIN(i)); 1323 it87_read_value(data, IT87_REG_FAN_MIN(i));
1323 data->fan[i] = it87_read_value(client, 1324 data->fan[i] = it87_read_value(data,
1324 IT87_REG_FAN(i)); 1325 IT87_REG_FAN(i));
1325 /* Add high byte if in 16-bit mode */ 1326 /* Add high byte if in 16-bit mode */
1326 if (data->type == it8716 || data->type == it8718) { 1327 if (data->type == it8716 || data->type == it8718) {
1327 data->fan[i] |= it87_read_value(client, 1328 data->fan[i] |= it87_read_value(data,
1328 IT87_REG_FANX(i)) << 8; 1329 IT87_REG_FANX(i)) << 8;
1329 data->fan_min[i] |= it87_read_value(client, 1330 data->fan_min[i] |= it87_read_value(data,
1330 IT87_REG_FANX_MIN(i)) << 8; 1331 IT87_REG_FANX_MIN(i)) << 8;
1331 } 1332 }
1332 } 1333 }
1333 for (i = 0; i < 3; i++) { 1334 for (i = 0; i < 3; i++) {
1334 data->temp[i] = 1335 data->temp[i] =
1335 it87_read_value(client, IT87_REG_TEMP(i)); 1336 it87_read_value(data, IT87_REG_TEMP(i));
1336 data->temp_high[i] = 1337 data->temp_high[i] =
1337 it87_read_value(client, IT87_REG_TEMP_HIGH(i)); 1338 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
1338 data->temp_low[i] = 1339 data->temp_low[i] =
1339 it87_read_value(client, IT87_REG_TEMP_LOW(i)); 1340 it87_read_value(data, IT87_REG_TEMP_LOW(i));
1340 } 1341 }
1341 1342
1342 /* Newer chips don't have clock dividers */ 1343 /* Newer chips don't have clock dividers */
1343 if ((data->has_fan & 0x07) && data->type != it8716 1344 if ((data->has_fan & 0x07) && data->type != it8716
1344 && data->type != it8718) { 1345 && data->type != it8718) {
1345 i = it87_read_value(client, IT87_REG_FAN_DIV); 1346 i = it87_read_value(data, IT87_REG_FAN_DIV);
1346 data->fan_div[0] = i & 0x07; 1347 data->fan_div[0] = i & 0x07;
1347 data->fan_div[1] = (i >> 3) & 0x07; 1348 data->fan_div[1] = (i >> 3) & 0x07;
1348 data->fan_div[2] = (i & 0x40) ? 3 : 1; 1349 data->fan_div[2] = (i & 0x40) ? 3 : 1;
1349 } 1350 }
1350 1351
1351 data->alarms = 1352 data->alarms =
1352 it87_read_value(client, IT87_REG_ALARM1) | 1353 it87_read_value(data, IT87_REG_ALARM1) |
1353 (it87_read_value(client, IT87_REG_ALARM2) << 8) | 1354 (it87_read_value(data, IT87_REG_ALARM2) << 8) |
1354 (it87_read_value(client, IT87_REG_ALARM3) << 16); 1355 (it87_read_value(data, IT87_REG_ALARM3) << 16);
1355 data->fan_main_ctrl = it87_read_value(client, IT87_REG_FAN_MAIN_CTRL); 1356 data->fan_main_ctrl = it87_read_value(data,
1356 data->fan_ctl = it87_read_value(client, IT87_REG_FAN_CTL); 1357 IT87_REG_FAN_MAIN_CTRL);
1357 1358 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
1358 data->sensor = it87_read_value(client, IT87_REG_TEMP_ENABLE); 1359
1360 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1359 /* The 8705 does not have VID capability */ 1361 /* The 8705 does not have VID capability */
1360 if (data->type == it8712 || data->type == it8716) { 1362 if (data->type == it8712 || data->type == it8716) {
1361 data->vid = it87_read_value(client, IT87_REG_VID); 1363 data->vid = it87_read_value(data, IT87_REG_VID);
1362 /* The older IT8712F revisions had only 5 VID pins, 1364 /* The older IT8712F revisions had only 5 VID pins,
1363 but we assume it is always safe to read 6 bits. */ 1365 but we assume it is always safe to read 6 bits. */
1364 data->vid &= 0x3f; 1366 data->vid &= 0x3f;
@@ -1372,24 +1374,85 @@ static struct it87_data *it87_update_device(struct device *dev)
1372 return data; 1374 return data;
1373} 1375}
1374 1376
1377static int __init it87_device_add(unsigned short address,
1378 const struct it87_sio_data *sio_data)
1379{
1380 struct resource res = {
1381 .start = address ,
1382 .end = address + IT87_EXTENT - 1,
1383 .name = DRVNAME,
1384 .flags = IORESOURCE_IO,
1385 };
1386 int err;
1387
1388 pdev = platform_device_alloc(DRVNAME, address);
1389 if (!pdev) {
1390 err = -ENOMEM;
1391 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1392 goto exit;
1393 }
1394
1395 err = platform_device_add_resources(pdev, &res, 1);
1396 if (err) {
1397 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1398 "(%d)\n", err);
1399 goto exit_device_put;
1400 }
1401
1402 err = platform_device_add_data(pdev, sio_data,
1403 sizeof(struct it87_sio_data));
1404 if (err) {
1405 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1406 goto exit_device_put;
1407 }
1408
1409 err = platform_device_add(pdev);
1410 if (err) {
1411 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1412 err);
1413 goto exit_device_put;
1414 }
1415
1416 return 0;
1417
1418exit_device_put:
1419 platform_device_put(pdev);
1420exit:
1421 return err;
1422}
1423
1375static int __init sm_it87_init(void) 1424static int __init sm_it87_init(void)
1376{ 1425{
1377 int res; 1426 int err;
1427 unsigned short isa_address=0;
1428 struct it87_sio_data sio_data;
1429
1430 err = it87_find(&isa_address, &sio_data);
1431 if (err)
1432 return err;
1433 err = platform_driver_register(&it87_driver);
1434 if (err)
1435 return err;
1378 1436
1379 if ((res = it87_find(&isa_address))) 1437 err = it87_device_add(isa_address, &sio_data);
1380 return res; 1438 if (err){
1381 return i2c_isa_add_driver(&it87_isa_driver); 1439 platform_driver_unregister(&it87_driver);
1440 return err;
1441 }
1442
1443 return 0;
1382} 1444}
1383 1445
1384static void __exit sm_it87_exit(void) 1446static void __exit sm_it87_exit(void)
1385{ 1447{
1386 i2c_isa_del_driver(&it87_isa_driver); 1448 platform_device_unregister(pdev);
1449 platform_driver_unregister(&it87_driver);
1387} 1450}
1388 1451
1389 1452
1390MODULE_AUTHOR("Chris Gauthron <chrisg@0-in.com>, " 1453MODULE_AUTHOR("Chris Gauthron <chrisg@0-in.com>, "
1391 "Jean Delvare <khali@linux-fr.org>"); 1454 "Jean Delvare <khali@linux-fr.org>");
1392MODULE_DESCRIPTION("IT8705F/8712F/8716F/8718F, SiS950 driver"); 1455MODULE_DESCRIPTION("IT8705F/8712F/8716F/8718F/8726F, SiS950 driver");
1393module_param(update_vbat, bool, 0); 1456module_param(update_vbat, bool, 0);
1394MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value"); 1457MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
1395module_param(fix_pwm_polarity, bool, 0); 1458module_param(fix_pwm_polarity, bool, 0);
diff --git a/drivers/hwmon/lm63.c b/drivers/hwmon/lm63.c
index d69f3cf071..2162d69a8c 100644
--- a/drivers/hwmon/lm63.c
+++ b/drivers/hwmon/lm63.c
@@ -364,7 +364,7 @@ static DEVICE_ATTR(temp2_crit_hyst, S_IWUSR | S_IRUGO, show_temp2_crit_hyst,
364/* Individual alarm files */ 364/* Individual alarm files */
365static SENSOR_DEVICE_ATTR(fan1_min_alarm, S_IRUGO, show_alarm, NULL, 0); 365static SENSOR_DEVICE_ATTR(fan1_min_alarm, S_IRUGO, show_alarm, NULL, 0);
366static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO, show_alarm, NULL, 1); 366static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO, show_alarm, NULL, 1);
367static SENSOR_DEVICE_ATTR(temp2_input_fault, S_IRUGO, show_alarm, NULL, 2); 367static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_alarm, NULL, 2);
368static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO, show_alarm, NULL, 3); 368static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO, show_alarm, NULL, 3);
369static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO, show_alarm, NULL, 4); 369static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO, show_alarm, NULL, 4);
370static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, 6); 370static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, 6);
@@ -383,7 +383,7 @@ static struct attribute *lm63_attributes[] = {
383 &dev_attr_temp2_crit_hyst.attr, 383 &dev_attr_temp2_crit_hyst.attr,
384 384
385 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, 385 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
386 &sensor_dev_attr_temp2_input_fault.dev_attr.attr, 386 &sensor_dev_attr_temp2_fault.dev_attr.attr,
387 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr, 387 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
388 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, 388 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
389 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, 389 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
diff --git a/drivers/hwmon/lm83.c b/drivers/hwmon/lm83.c
index feb87b41e9..654c0f7346 100644
--- a/drivers/hwmon/lm83.c
+++ b/drivers/hwmon/lm83.c
@@ -223,14 +223,14 @@ static SENSOR_DEVICE_ATTR(temp4_crit, S_IRUGO, show_temp, NULL, 8);
223/* Individual alarm files */ 223/* Individual alarm files */
224static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL, 0); 224static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL, 0);
225static SENSOR_DEVICE_ATTR(temp3_crit_alarm, S_IRUGO, show_alarm, NULL, 1); 225static SENSOR_DEVICE_ATTR(temp3_crit_alarm, S_IRUGO, show_alarm, NULL, 1);
226static SENSOR_DEVICE_ATTR(temp3_input_fault, S_IRUGO, show_alarm, NULL, 2); 226static SENSOR_DEVICE_ATTR(temp3_fault, S_IRUGO, show_alarm, NULL, 2);
227static SENSOR_DEVICE_ATTR(temp3_max_alarm, S_IRUGO, show_alarm, NULL, 4); 227static SENSOR_DEVICE_ATTR(temp3_max_alarm, S_IRUGO, show_alarm, NULL, 4);
228static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, 6); 228static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO, show_alarm, NULL, 6);
229static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO, show_alarm, NULL, 8); 229static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO, show_alarm, NULL, 8);
230static SENSOR_DEVICE_ATTR(temp4_crit_alarm, S_IRUGO, show_alarm, NULL, 9); 230static SENSOR_DEVICE_ATTR(temp4_crit_alarm, S_IRUGO, show_alarm, NULL, 9);
231static SENSOR_DEVICE_ATTR(temp4_input_fault, S_IRUGO, show_alarm, NULL, 10); 231static SENSOR_DEVICE_ATTR(temp4_fault, S_IRUGO, show_alarm, NULL, 10);
232static SENSOR_DEVICE_ATTR(temp4_max_alarm, S_IRUGO, show_alarm, NULL, 12); 232static SENSOR_DEVICE_ATTR(temp4_max_alarm, S_IRUGO, show_alarm, NULL, 12);
233static SENSOR_DEVICE_ATTR(temp2_input_fault, S_IRUGO, show_alarm, NULL, 13); 233static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_alarm, NULL, 13);
234static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO, show_alarm, NULL, 15); 234static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO, show_alarm, NULL, 15);
235/* Raw alarm file for compatibility */ 235/* Raw alarm file for compatibility */
236static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); 236static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
@@ -245,7 +245,7 @@ static struct attribute *lm83_attributes[] = {
245 245
246 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, 246 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
247 &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr, 247 &sensor_dev_attr_temp3_crit_alarm.dev_attr.attr,
248 &sensor_dev_attr_temp3_input_fault.dev_attr.attr, 248 &sensor_dev_attr_temp3_fault.dev_attr.attr,
249 &sensor_dev_attr_temp3_max_alarm.dev_attr.attr, 249 &sensor_dev_attr_temp3_max_alarm.dev_attr.attr,
250 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr, 250 &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
251 &dev_attr_alarms.attr, 251 &dev_attr_alarms.attr,
@@ -266,9 +266,9 @@ static struct attribute *lm83_attributes_opt[] = {
266 266
267 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, 267 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
268 &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr, 268 &sensor_dev_attr_temp4_crit_alarm.dev_attr.attr,
269 &sensor_dev_attr_temp4_input_fault.dev_attr.attr, 269 &sensor_dev_attr_temp4_fault.dev_attr.attr,
270 &sensor_dev_attr_temp4_max_alarm.dev_attr.attr, 270 &sensor_dev_attr_temp4_max_alarm.dev_attr.attr,
271 &sensor_dev_attr_temp2_input_fault.dev_attr.attr, 271 &sensor_dev_attr_temp2_fault.dev_attr.attr,
272 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, 272 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
273 NULL 273 NULL
274}; 274};
diff --git a/drivers/hwmon/lm90.c b/drivers/hwmon/lm90.c
index 6882ce75fe..48833fff49 100644
--- a/drivers/hwmon/lm90.c
+++ b/drivers/hwmon/lm90.c
@@ -43,6 +43,13 @@
43 * variants. The extra address and features of the MAX6659 are not 43 * variants. The extra address and features of the MAX6659 are not
44 * supported by this driver. 44 * supported by this driver.
45 * 45 *
46 * This driver also supports the MAX6680 and MAX6681, two other sensor
47 * chips made by Maxim. These are quite similar to the other Maxim
48 * chips. Complete datasheet can be obtained at:
49 * http://www.maxim-ic.com/quick_view2.cfm/qv_pk/3370
50 * The MAX6680 and MAX6681 only differ in the pinout so they can be
51 * treated identically.
52 *
46 * This driver also supports the ADT7461 chip from Analog Devices but 53 * This driver also supports the ADT7461 chip from Analog Devices but
47 * only in its "compatability mode". If an ADT7461 chip is found but 54 * only in its "compatability mode". If an ADT7461 chip is found but
48 * is configured in non-compatible mode (where its temperature 55 * is configured in non-compatible mode (where its temperature
@@ -84,20 +91,25 @@
84/* 91/*
85 * Addresses to scan 92 * Addresses to scan
86 * Address is fully defined internally and cannot be changed except for 93 * Address is fully defined internally and cannot be changed except for
87 * MAX6659. 94 * MAX6659, MAX6680 and MAX6681.
88 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, MAX6657 and MAX6658 95 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, MAX6657 and MAX6658
89 * have address 0x4c. 96 * have address 0x4c.
90 * ADM1032-2, ADT7461-2, LM89-1, and LM99-1 have address 0x4d. 97 * ADM1032-2, ADT7461-2, LM89-1, and LM99-1 have address 0x4d.
91 * MAX6659 can have address 0x4c, 0x4d or 0x4e (unsupported). 98 * MAX6659 can have address 0x4c, 0x4d or 0x4e (unsupported).
99 * MAX6680 and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
100 * 0x4c, 0x4d or 0x4e.
92 */ 101 */
93 102
94static unsigned short normal_i2c[] = { 0x4c, 0x4d, I2C_CLIENT_END }; 103static unsigned short normal_i2c[] = { 0x18, 0x19, 0x1a,
104 0x29, 0x2a, 0x2b,
105 0x4c, 0x4d, 0x4e,
106 I2C_CLIENT_END };
95 107
96/* 108/*
97 * Insmod parameters 109 * Insmod parameters
98 */ 110 */
99 111
100I2C_CLIENT_INSMOD_6(lm90, adm1032, lm99, lm86, max6657, adt7461); 112I2C_CLIENT_INSMOD_7(lm90, adm1032, lm99, lm86, max6657, adt7461, max6680);
101 113
102/* 114/*
103 * The LM90 registers 115 * The LM90 registers
@@ -359,7 +371,7 @@ static SENSOR_DEVICE_ATTR(temp2_crit_hyst, S_IRUGO, show_temphyst, NULL, 4);
359/* Individual alarm files */ 371/* Individual alarm files */
360static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL, 0); 372static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO, show_alarm, NULL, 0);
361static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO, show_alarm, NULL, 1); 373static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO, show_alarm, NULL, 1);
362static SENSOR_DEVICE_ATTR(temp2_input_fault, S_IRUGO, show_alarm, NULL, 2); 374static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_alarm, NULL, 2);
363static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO, show_alarm, NULL, 3); 375static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO, show_alarm, NULL, 3);
364static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO, show_alarm, NULL, 4); 376static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO, show_alarm, NULL, 4);
365static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL, 5); 377static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO, show_alarm, NULL, 5);
@@ -381,7 +393,7 @@ static struct attribute *lm90_attributes[] = {
381 393
382 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr, 394 &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
383 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr, 395 &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
384 &sensor_dev_attr_temp2_input_fault.dev_attr.attr, 396 &sensor_dev_attr_temp2_fault.dev_attr.attr,
385 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr, 397 &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
386 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr, 398 &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
387 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr, 399 &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
@@ -429,7 +441,7 @@ static DEVICE_ATTR(pec, S_IWUSR | S_IRUGO, show_pec, set_pec);
429 */ 441 */
430 442
431/* The ADM1032 supports PEC but not on write byte transactions, so we need 443/* The ADM1032 supports PEC but not on write byte transactions, so we need
432 to explicitely ask for a transaction without PEC. */ 444 to explicitly ask for a transaction without PEC. */
433static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value) 445static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
434{ 446{
435 return i2c_smbus_xfer(client->adapter, client->addr, 447 return i2c_smbus_xfer(client->adapter, client->addr,
@@ -525,7 +537,8 @@ static int lm90_detect(struct i2c_adapter *adapter, int address, int kind)
525 &reg_convrate) < 0) 537 &reg_convrate) < 0)
526 goto exit_free; 538 goto exit_free;
527 539
528 if (man_id == 0x01) { /* National Semiconductor */ 540 if ((address == 0x4C || address == 0x4D)
541 && man_id == 0x01) { /* National Semiconductor */
529 u8 reg_config2; 542 u8 reg_config2;
530 543
531 if (lm90_read_reg(new_client, LM90_REG_R_CONFIG2, 544 if (lm90_read_reg(new_client, LM90_REG_R_CONFIG2,
@@ -548,7 +561,8 @@ static int lm90_detect(struct i2c_adapter *adapter, int address, int kind)
548 } 561 }
549 } 562 }
550 } else 563 } else
551 if (man_id == 0x41) { /* Analog Devices */ 564 if ((address == 0x4C || address == 0x4D)
565 && man_id == 0x41) { /* Analog Devices */
552 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */ 566 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
553 && (reg_config1 & 0x3F) == 0x00 567 && (reg_config1 & 0x3F) == 0x00
554 && reg_convrate <= 0x0A) { 568 && reg_convrate <= 0x0A) {
@@ -562,18 +576,30 @@ static int lm90_detect(struct i2c_adapter *adapter, int address, int kind)
562 } else 576 } else
563 if (man_id == 0x4D) { /* Maxim */ 577 if (man_id == 0x4D) { /* Maxim */
564 /* 578 /*
565 * The Maxim variants do NOT have a chip_id register. 579 * The MAX6657, MAX6658 and MAX6659 do NOT have a
566 * Reading from that address will return the last read 580 * chip_id register. Reading from that address will
567 * value, which in our case is those of the man_id 581 * return the last read value, which in our case is
568 * register. Likewise, the config1 register seems to 582 * those of the man_id register. Likewise, the config1
569 * lack a low nibble, so the value will be those of the 583 * register seems to lack a low nibble, so the value
570 * previous read, so in our case those of the man_id 584 * will be those of the previous read, so in our case
571 * register. 585 * those of the man_id register.
572 */ 586 */
573 if (chip_id == man_id 587 if (chip_id == man_id
588 && (address == 0x4F || address == 0x4D)
574 && (reg_config1 & 0x1F) == (man_id & 0x0F) 589 && (reg_config1 & 0x1F) == (man_id & 0x0F)
575 && reg_convrate <= 0x09) { 590 && reg_convrate <= 0x09) {
576 kind = max6657; 591 kind = max6657;
592 } else
593 /* The chip_id register of the MAX6680 and MAX6681
594 * holds the revision of the chip.
595 * the lowest bit of the config1 register is unused
596 * and should return zero when read, so should the
597 * second to last bit of config1 (software reset)
598 */
599 if (chip_id == 0x01
600 && (reg_config1 & 0x03) == 0x00
601 && reg_convrate <= 0x07) {
602 kind = max6680;
577 } 603 }
578 } 604 }
579 605
@@ -599,6 +625,8 @@ static int lm90_detect(struct i2c_adapter *adapter, int address, int kind)
599 name = "lm86"; 625 name = "lm86";
600 } else if (kind == max6657) { 626 } else if (kind == max6657) {
601 name = "max6657"; 627 name = "max6657";
628 } else if (kind == max6680) {
629 name = "max6680";
602 } else if (kind == adt7461) { 630 } else if (kind == adt7461) {
603 name = "adt7461"; 631 name = "adt7461";
604 } 632 }
@@ -646,7 +674,8 @@ exit:
646 674
647static void lm90_init_client(struct i2c_client *client) 675static void lm90_init_client(struct i2c_client *client)
648{ 676{
649 u8 config; 677 u8 config, config_orig;
678 struct lm90_data *data = i2c_get_clientdata(client);
650 679
651 /* 680 /*
652 * Start the conversions. 681 * Start the conversions.
@@ -657,9 +686,20 @@ static void lm90_init_client(struct i2c_client *client)
657 dev_warn(&client->dev, "Initialization failed!\n"); 686 dev_warn(&client->dev, "Initialization failed!\n");
658 return; 687 return;
659 } 688 }
660 if (config & 0x40) 689 config_orig = config;
661 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, 690
662 config & 0xBF); /* run */ 691 /*
692 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
693 * 0.125 degree resolution) and range (0x08, extend range
694 * to -64 degree) mode for the remote temperature sensor.
695 */
696 if (data->kind == max6680) {
697 config |= 0x18;
698 }
699
700 config &= 0xBF; /* run */
701 if (config != config_orig) /* Only write if changed */
702 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, config);
663} 703}
664 704
665static int lm90_detach_client(struct i2c_client *client) 705static int lm90_detach_client(struct i2c_client *client)
diff --git a/drivers/hwmon/lm93.c b/drivers/hwmon/lm93.c
new file mode 100644
index 0000000000..23edf4fe42
--- /dev/null
+++ b/drivers/hwmon/lm93.c
@@ -0,0 +1,2655 @@
1/*
2 lm93.c - Part of lm_sensors, Linux kernel modules for hardware monitoring
3
4 Author/Maintainer: Mark M. Hoffman <mhoffman@lightlink.com>
5 Copyright (c) 2004 Utilitek Systems, Inc.
6
7 derived in part from lm78.c:
8 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl>
9
10 derived in part from lm85.c:
11 Copyright (c) 2002, 2003 Philip Pokorny <ppokorny@penguincomputing.com>
12 Copyright (c) 2003 Margit Schubert-While <margitsw@t-online.de>
13
14 derived in part from w83l785ts.c:
15 Copyright (c) 2003-2004 Jean Delvare <khali@linux-fr.org>
16
17 Ported to Linux 2.6 by Eric J. Bowersox <ericb@aspsys.com>
18 Copyright (c) 2005 Aspen Systems, Inc.
19
20 Adapted to 2.6.20 by Carsten Emde <cbe@osadl.org>
21 Copyright (c) 2006 Carsten Emde, Open Source Automation Development Lab
22
23 Modified for mainline integration by Hans J. Koch <hjk@linutronix.de>
24 Copyright (c) 2007 Hans J. Koch, Linutronix GmbH
25
26 This program is free software; you can redistribute it and/or modify
27 it under the terms of the GNU General Public License as published by
28 the Free Software Foundation; either version 2 of the License, or
29 (at your option) any later version.
30
31 This program is distributed in the hope that it will be useful,
32 but WITHOUT ANY WARRANTY; without even the implied warranty of
33 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
34 GNU General Public License for more details.
35
36 You should have received a copy of the GNU General Public License
37 along with this program; if not, write to the Free Software
38 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
39*/
40
41#include <linux/module.h>
42#include <linux/init.h>
43#include <linux/slab.h>
44#include <linux/i2c.h>
45#include <linux/hwmon.h>
46#include <linux/hwmon-sysfs.h>
47#include <linux/hwmon-vid.h>
48#include <linux/err.h>
49#include <linux/delay.h>
50
51/* LM93 REGISTER ADDRESSES */
52
53/* miscellaneous */
54#define LM93_REG_MFR_ID 0x3e
55#define LM93_REG_VER 0x3f
56#define LM93_REG_STATUS_CONTROL 0xe2
57#define LM93_REG_CONFIG 0xe3
58#define LM93_REG_SLEEP_CONTROL 0xe4
59
60/* alarm values start here */
61#define LM93_REG_HOST_ERROR_1 0x48
62
63/* voltage inputs: in1-in16 (nr => 0-15) */
64#define LM93_REG_IN(nr) (0x56 + (nr))
65#define LM93_REG_IN_MIN(nr) (0x90 + (nr) * 2)
66#define LM93_REG_IN_MAX(nr) (0x91 + (nr) * 2)
67
68/* temperature inputs: temp1-temp4 (nr => 0-3) */
69#define LM93_REG_TEMP(nr) (0x50 + (nr))
70#define LM93_REG_TEMP_MIN(nr) (0x78 + (nr) * 2)
71#define LM93_REG_TEMP_MAX(nr) (0x79 + (nr) * 2)
72
73/* temp[1-4]_auto_boost (nr => 0-3) */
74#define LM93_REG_BOOST(nr) (0x80 + (nr))
75
76/* #PROCHOT inputs: prochot1-prochot2 (nr => 0-1) */
77#define LM93_REG_PROCHOT_CUR(nr) (0x67 + (nr) * 2)
78#define LM93_REG_PROCHOT_AVG(nr) (0x68 + (nr) * 2)
79#define LM93_REG_PROCHOT_MAX(nr) (0xb0 + (nr))
80
81/* fan tach inputs: fan1-fan4 (nr => 0-3) */
82#define LM93_REG_FAN(nr) (0x6e + (nr) * 2)
83#define LM93_REG_FAN_MIN(nr) (0xb4 + (nr) * 2)
84
85/* pwm outputs: pwm1-pwm2 (nr => 0-1, reg => 0-3) */
86#define LM93_REG_PWM_CTL(nr,reg) (0xc8 + (reg) + (nr) * 4)
87#define LM93_PWM_CTL1 0x0
88#define LM93_PWM_CTL2 0x1
89#define LM93_PWM_CTL3 0x2
90#define LM93_PWM_CTL4 0x3
91
92/* GPIO input state */
93#define LM93_REG_GPI 0x6b
94
95/* vid inputs: vid1-vid2 (nr => 0-1) */
96#define LM93_REG_VID(nr) (0x6c + (nr))
97
98/* vccp1 & vccp2: VID relative inputs (nr => 0-1) */
99#define LM93_REG_VCCP_LIMIT_OFF(nr) (0xb2 + (nr))
100
101/* temp[1-4]_auto_boost_hyst */
102#define LM93_REG_BOOST_HYST_12 0xc0
103#define LM93_REG_BOOST_HYST_34 0xc1
104#define LM93_REG_BOOST_HYST(nr) (0xc0 + (nr)/2)
105
106/* temp[1-4]_auto_pwm_[min|hyst] */
107#define LM93_REG_PWM_MIN_HYST_12 0xc3
108#define LM93_REG_PWM_MIN_HYST_34 0xc4
109#define LM93_REG_PWM_MIN_HYST(nr) (0xc3 + (nr)/2)
110
111/* prochot_override & prochot_interval */
112#define LM93_REG_PROCHOT_OVERRIDE 0xc6
113#define LM93_REG_PROCHOT_INTERVAL 0xc7
114
115/* temp[1-4]_auto_base (nr => 0-3) */
116#define LM93_REG_TEMP_BASE(nr) (0xd0 + (nr))
117
118/* temp[1-4]_auto_offsets (step => 0-11) */
119#define LM93_REG_TEMP_OFFSET(step) (0xd4 + (step))
120
121/* #PROCHOT & #VRDHOT PWM ramp control */
122#define LM93_REG_PWM_RAMP_CTL 0xbf
123
124/* miscellaneous */
125#define LM93_REG_SFC1 0xbc
126#define LM93_REG_SFC2 0xbd
127#define LM93_REG_GPI_VID_CTL 0xbe
128#define LM93_REG_SF_TACH_TO_PWM 0xe0
129
130/* error masks */
131#define LM93_REG_GPI_ERR_MASK 0xec
132#define LM93_REG_MISC_ERR_MASK 0xed
133
134/* LM93 REGISTER VALUES */
135#define LM93_MFR_ID 0x73
136#define LM93_MFR_ID_PROTOTYPE 0x72
137
138/* SMBus capabilities */
139#define LM93_SMBUS_FUNC_FULL (I2C_FUNC_SMBUS_BYTE_DATA | \
140 I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BLOCK_DATA)
141#define LM93_SMBUS_FUNC_MIN (I2C_FUNC_SMBUS_BYTE_DATA | \
142 I2C_FUNC_SMBUS_WORD_DATA)
143
144/* Addresses to scan */
145static unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, I2C_CLIENT_END };
146
147/* Insmod parameters */
148I2C_CLIENT_INSMOD_1(lm93);
149
150static int disable_block;
151module_param(disable_block, bool, 0);
152MODULE_PARM_DESC(disable_block,
153 "Set to non-zero to disable SMBus block data transactions.");
154
155static int init;
156module_param(init, bool, 0);
157MODULE_PARM_DESC(init, "Set to non-zero to force chip initialization.");
158
159static int vccp_limit_type[2] = {0,0};
160module_param_array(vccp_limit_type, int, NULL, 0);
161MODULE_PARM_DESC(vccp_limit_type, "Configures in7 and in8 limit modes.");
162
163static int vid_agtl;
164module_param(vid_agtl, int, 0);
165MODULE_PARM_DESC(vid_agtl, "Configures VID pin input thresholds.");
166
167/* Driver data */
168static struct i2c_driver lm93_driver;
169
170/* LM93 BLOCK READ COMMANDS */
171static const struct { u8 cmd; u8 len; } lm93_block_read_cmds[12] = {
172 { 0xf2, 8 },
173 { 0xf3, 8 },
174 { 0xf4, 6 },
175 { 0xf5, 16 },
176 { 0xf6, 4 },
177 { 0xf7, 8 },
178 { 0xf8, 12 },
179 { 0xf9, 32 },
180 { 0xfa, 8 },
181 { 0xfb, 8 },
182 { 0xfc, 16 },
183 { 0xfd, 9 },
184};
185
186/* ALARMS: SYSCTL format described further below
187 REG: 64 bits in 8 registers, as immediately below */
188struct block1_t {
189 u8 host_status_1;
190 u8 host_status_2;
191 u8 host_status_3;
192 u8 host_status_4;
193 u8 p1_prochot_status;
194 u8 p2_prochot_status;
195 u8 gpi_status;
196 u8 fan_status;
197};
198
199/*
200 * Client-specific data
201 */
202struct lm93_data {
203 struct i2c_client client;
204 struct class_device *class_dev;
205
206 struct mutex update_lock;
207 unsigned long last_updated; /* In jiffies */
208
209 /* client update function */
210 void (*update)(struct lm93_data *, struct i2c_client *);
211
212 char valid; /* !=0 if following fields are valid */
213
214 /* register values, arranged by block read groups */
215 struct block1_t block1;
216
217 /* temp1 - temp4: unfiltered readings
218 temp1 - temp2: filtered readings */
219 u8 block2[6];
220
221 /* vin1 - vin16: readings */
222 u8 block3[16];
223
224 /* prochot1 - prochot2: readings */
225 struct {
226 u8 cur;
227 u8 avg;
228 } block4[2];
229
230 /* fan counts 1-4 => 14-bits, LE, *left* justified */
231 u16 block5[4];
232
233 /* block6 has a lot of data we don't need */
234 struct {
235 u8 min;
236 u8 max;
237 } temp_lim[3];
238
239 /* vin1 - vin16: low and high limits */
240 struct {
241 u8 min;
242 u8 max;
243 } block7[16];
244
245 /* fan count limits 1-4 => same format as block5 */
246 u16 block8[4];
247
248 /* pwm control registers (2 pwms, 4 regs) */
249 u8 block9[2][4];
250
251 /* auto/pwm base temp and offset temp registers */
252 struct {
253 u8 base[4];
254 u8 offset[12];
255 } block10;
256
257 /* master config register */
258 u8 config;
259
260 /* VID1 & VID2 => register format, 6-bits, right justified */
261 u8 vid[2];
262
263 /* prochot1 - prochot2: limits */
264 u8 prochot_max[2];
265
266 /* vccp1 & vccp2 (in7 & in8): VID relative limits (register format) */
267 u8 vccp_limits[2];
268
269 /* GPIO input state (register format, i.e. inverted) */
270 u8 gpi;
271
272 /* #PROCHOT override (register format) */
273 u8 prochot_override;
274
275 /* #PROCHOT intervals (register format) */
276 u8 prochot_interval;
277
278 /* Fan Boost Temperatures (register format) */
279 u8 boost[4];
280
281 /* Fan Boost Hysteresis (register format) */
282 u8 boost_hyst[2];
283
284 /* Temperature Zone Min. PWM & Hysteresis (register format) */
285 u8 auto_pwm_min_hyst[2];
286
287 /* #PROCHOT & #VRDHOT PWM Ramp Control */
288 u8 pwm_ramp_ctl;
289
290 /* miscellaneous setup regs */
291 u8 sfc1;
292 u8 sfc2;
293 u8 sf_tach_to_pwm;
294
295 /* The two PWM CTL2 registers can read something other than what was
296 last written for the OVR_DC field (duty cycle override). So, we
297 save the user-commanded value here. */
298 u8 pwm_override[2];
299};
300
301/* VID: mV
302 REG: 6-bits, right justified, *always* using Intel VRM/VRD 10 */
303static int LM93_VID_FROM_REG(u8 reg)
304{
305 return vid_from_reg((reg & 0x3f), 100);
306}
307
308/* min, max, and nominal register values, per channel (u8) */
309static const u8 lm93_vin_reg_min[16] = {
310 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
311 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xae,
312};
313static const u8 lm93_vin_reg_max[16] = {
314 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
315 0xff, 0xfa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xd1,
316};
317/* Values from the datasheet. They're here for documentation only.
318static const u8 lm93_vin_reg_nom[16] = {
319 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0,
320 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0xc0, 0x40, 0xc0,
321};
322*/
323
324/* min, max, and nominal voltage readings, per channel (mV)*/
325static const unsigned long lm93_vin_val_min[16] = {
326 0, 0, 0, 0, 0, 0, 0, 0,
327 0, 0, 0, 0, 0, 0, 0, 3000,
328};
329
330static const unsigned long lm93_vin_val_max[16] = {
331 1236, 1236, 1236, 1600, 2000, 2000, 1600, 1600,
332 4400, 6500, 3333, 2625, 1312, 1312, 1236, 3600,
333};
334/* Values from the datasheet. They're here for documentation only.
335static const unsigned long lm93_vin_val_nom[16] = {
336 927, 927, 927, 1200, 1500, 1500, 1200, 1200,
337 3300, 5000, 2500, 1969, 984, 984, 309, 3300,
338};
339*/
340
341static unsigned LM93_IN_FROM_REG(int nr, u8 reg)
342{
343 const long uV_max = lm93_vin_val_max[nr] * 1000;
344 const long uV_min = lm93_vin_val_min[nr] * 1000;
345
346 const long slope = (uV_max - uV_min) /
347 (lm93_vin_reg_max[nr] - lm93_vin_reg_min[nr]);
348 const long intercept = uV_min - slope * lm93_vin_reg_min[nr];
349
350 return (slope * reg + intercept + 500) / 1000;
351}
352
353/* IN: mV, limits determined by channel nr
354 REG: scaling determined by channel nr */
355static u8 LM93_IN_TO_REG(int nr, unsigned val)
356{
357 /* range limit */
358 const long mV = SENSORS_LIMIT(val,
359 lm93_vin_val_min[nr], lm93_vin_val_max[nr]);
360
361 /* try not to lose too much precision here */
362 const long uV = mV * 1000;
363 const long uV_max = lm93_vin_val_max[nr] * 1000;
364 const long uV_min = lm93_vin_val_min[nr] * 1000;
365
366 /* convert */
367 const long slope = (uV_max - uV_min) /
368 (lm93_vin_reg_max[nr] - lm93_vin_reg_min[nr]);
369 const long intercept = uV_min - slope * lm93_vin_reg_min[nr];
370
371 u8 result = ((uV - intercept + (slope/2)) / slope);
372 result = SENSORS_LIMIT(result,
373 lm93_vin_reg_min[nr], lm93_vin_reg_max[nr]);
374 return result;
375}
376
377/* vid in mV, upper == 0 indicates low limit, otherwise upper limit */
378static unsigned LM93_IN_REL_FROM_REG(u8 reg, int upper, int vid)
379{
380 const long uV_offset = upper ? (((reg >> 4 & 0x0f) + 1) * 12500) :
381 (((reg >> 0 & 0x0f) + 1) * -25000);
382 const long uV_vid = vid * 1000;
383 return (uV_vid + uV_offset + 5000) / 10000;
384}
385
386#define LM93_IN_MIN_FROM_REG(reg,vid) LM93_IN_REL_FROM_REG(reg,0,vid)
387#define LM93_IN_MAX_FROM_REG(reg,vid) LM93_IN_REL_FROM_REG(reg,1,vid)
388
389/* vid in mV , upper == 0 indicates low limit, otherwise upper limit
390 upper also determines which nibble of the register is returned
391 (the other nibble will be 0x0) */
392static u8 LM93_IN_REL_TO_REG(unsigned val, int upper, int vid)
393{
394 long uV_offset = vid * 1000 - val * 10000;
395 if (upper) {
396 uV_offset = SENSORS_LIMIT(uV_offset, 12500, 200000);
397 return (u8)((uV_offset / 12500 - 1) << 4);
398 } else {
399 uV_offset = SENSORS_LIMIT(uV_offset, -400000, -25000);
400 return (u8)((uV_offset / -25000 - 1) << 0);
401 }
402}
403
404/* TEMP: 1/1000 degrees C (-128C to +127C)
405 REG: 1C/bit, two's complement */
406static int LM93_TEMP_FROM_REG(u8 reg)
407{
408 return (s8)reg * 1000;
409}
410
411#define LM93_TEMP_MIN (-128000)
412#define LM93_TEMP_MAX ( 127000)
413
414/* TEMP: 1/1000 degrees C (-128C to +127C)
415 REG: 1C/bit, two's complement */
416static u8 LM93_TEMP_TO_REG(int temp)
417{
418 int ntemp = SENSORS_LIMIT(temp, LM93_TEMP_MIN, LM93_TEMP_MAX);
419 ntemp += (ntemp<0 ? -500 : 500);
420 return (u8)(ntemp / 1000);
421}
422
423/* Determine 4-bit temperature offset resolution */
424static int LM93_TEMP_OFFSET_MODE_FROM_REG(u8 sfc2, int nr)
425{
426 /* mode: 0 => 1C/bit, nonzero => 0.5C/bit */
427 return sfc2 & (nr < 2 ? 0x10 : 0x20);
428}
429
430/* This function is common to all 4-bit temperature offsets
431 reg is 4 bits right justified
432 mode 0 => 1C/bit, mode !0 => 0.5C/bit */
433static int LM93_TEMP_OFFSET_FROM_REG(u8 reg, int mode)
434{
435 return (reg & 0x0f) * (mode ? 5 : 10);
436}
437
438#define LM93_TEMP_OFFSET_MIN ( 0)
439#define LM93_TEMP_OFFSET_MAX0 (150)
440#define LM93_TEMP_OFFSET_MAX1 ( 75)
441
442/* This function is common to all 4-bit temperature offsets
443 returns 4 bits right justified
444 mode 0 => 1C/bit, mode !0 => 0.5C/bit */
445static u8 LM93_TEMP_OFFSET_TO_REG(int off, int mode)
446{
447 int factor = mode ? 5 : 10;
448
449 off = SENSORS_LIMIT(off, LM93_TEMP_OFFSET_MIN,
450 mode ? LM93_TEMP_OFFSET_MAX1 : LM93_TEMP_OFFSET_MAX0);
451 return (u8)((off + factor/2) / factor);
452}
453
454/* 0 <= nr <= 3 */
455static int LM93_TEMP_AUTO_OFFSET_FROM_REG(u8 reg, int nr, int mode)
456{
457 /* temp1-temp2 (nr=0,1) use lower nibble */
458 if (nr < 2)
459 return LM93_TEMP_OFFSET_FROM_REG(reg & 0x0f, mode);
460
461 /* temp3-temp4 (nr=2,3) use upper nibble */
462 else
463 return LM93_TEMP_OFFSET_FROM_REG(reg >> 4 & 0x0f, mode);
464}
465
466/* TEMP: 1/10 degrees C (0C to +15C (mode 0) or +7.5C (mode non-zero))
467 REG: 1.0C/bit (mode 0) or 0.5C/bit (mode non-zero)
468 0 <= nr <= 3 */
469static u8 LM93_TEMP_AUTO_OFFSET_TO_REG(u8 old, int off, int nr, int mode)
470{
471 u8 new = LM93_TEMP_OFFSET_TO_REG(off, mode);
472
473 /* temp1-temp2 (nr=0,1) use lower nibble */
474 if (nr < 2)
475 return (old & 0xf0) | (new & 0x0f);
476
477 /* temp3-temp4 (nr=2,3) use upper nibble */
478 else
479 return (new << 4 & 0xf0) | (old & 0x0f);
480}
481
482static int LM93_AUTO_BOOST_HYST_FROM_REGS(struct lm93_data *data, int nr,
483 int mode)
484{
485 u8 reg;
486
487 switch (nr) {
488 case 0:
489 reg = data->boost_hyst[0] & 0x0f;
490 break;
491 case 1:
492 reg = data->boost_hyst[0] >> 4 & 0x0f;
493 break;
494 case 2:
495 reg = data->boost_hyst[1] & 0x0f;
496 break;
497 case 3:
498 default:
499 reg = data->boost_hyst[1] >> 4 & 0x0f;
500 break;
501 }
502
503 return LM93_TEMP_FROM_REG(data->boost[nr]) -
504 LM93_TEMP_OFFSET_FROM_REG(reg, mode);
505}
506
507static u8 LM93_AUTO_BOOST_HYST_TO_REG(struct lm93_data *data, long hyst,
508 int nr, int mode)
509{
510 u8 reg = LM93_TEMP_OFFSET_TO_REG(
511 (LM93_TEMP_FROM_REG(data->boost[nr]) - hyst), mode);
512
513 switch (nr) {
514 case 0:
515 reg = (data->boost_hyst[0] & 0xf0) | (reg & 0x0f);
516 break;
517 case 1:
518 reg = (reg << 4 & 0xf0) | (data->boost_hyst[0] & 0x0f);
519 break;
520 case 2:
521 reg = (data->boost_hyst[1] & 0xf0) | (reg & 0x0f);
522 break;
523 case 3:
524 default:
525 reg = (reg << 4 & 0xf0) | (data->boost_hyst[1] & 0x0f);
526 break;
527 }
528
529 return reg;
530}
531
532/* PWM: 0-255 per sensors documentation
533 REG: 0-13 as mapped below... right justified */
534typedef enum { LM93_PWM_MAP_HI_FREQ, LM93_PWM_MAP_LO_FREQ } pwm_freq_t;
535static int lm93_pwm_map[2][16] = {
536 {
537 0x00, /* 0.00% */ 0x40, /* 25.00% */
538 0x50, /* 31.25% */ 0x60, /* 37.50% */
539 0x70, /* 43.75% */ 0x80, /* 50.00% */
540 0x90, /* 56.25% */ 0xa0, /* 62.50% */
541 0xb0, /* 68.75% */ 0xc0, /* 75.00% */
542 0xd0, /* 81.25% */ 0xe0, /* 87.50% */
543 0xf0, /* 93.75% */ 0xff, /* 100.00% */
544 0xff, 0xff, /* 14, 15 are reserved and should never occur */
545 },
546 {
547 0x00, /* 0.00% */ 0x40, /* 25.00% */
548 0x49, /* 28.57% */ 0x52, /* 32.14% */
549 0x5b, /* 35.71% */ 0x64, /* 39.29% */
550 0x6d, /* 42.86% */ 0x76, /* 46.43% */
551 0x80, /* 50.00% */ 0x89, /* 53.57% */
552 0x92, /* 57.14% */ 0xb6, /* 71.43% */
553 0xdb, /* 85.71% */ 0xff, /* 100.00% */
554 0xff, 0xff, /* 14, 15 are reserved and should never occur */
555 },
556};
557
558static int LM93_PWM_FROM_REG(u8 reg, pwm_freq_t freq)
559{
560 return lm93_pwm_map[freq][reg & 0x0f];
561}
562
563/* round up to nearest match */
564static u8 LM93_PWM_TO_REG(int pwm, pwm_freq_t freq)
565{
566 int i;
567 for (i = 0; i < 13; i++)
568 if (pwm <= lm93_pwm_map[freq][i])
569 break;
570
571 /* can fall through with i==13 */
572 return (u8)i;
573}
574
575static int LM93_FAN_FROM_REG(u16 regs)
576{
577 const u16 count = le16_to_cpu(regs) >> 2;
578 return count==0 ? -1 : count==0x3fff ? 0: 1350000 / count;
579}
580
581/*
582 * RPM: (82.5 to 1350000)
583 * REG: 14-bits, LE, *left* justified
584 */
585static u16 LM93_FAN_TO_REG(long rpm)
586{
587 u16 count, regs;
588
589 if (rpm == 0) {
590 count = 0x3fff;
591 } else {
592 rpm = SENSORS_LIMIT(rpm, 1, 1000000);
593 count = SENSORS_LIMIT((1350000 + rpm) / rpm, 1, 0x3ffe);
594 }
595
596 regs = count << 2;
597 return cpu_to_le16(regs);
598}
599
600/* PWM FREQ: HZ
601 REG: 0-7 as mapped below */
602static int lm93_pwm_freq_map[8] = {
603 22500, 96, 84, 72, 60, 48, 36, 12
604};
605
606static int LM93_PWM_FREQ_FROM_REG(u8 reg)
607{
608 return lm93_pwm_freq_map[reg & 0x07];
609}
610
611/* round up to nearest match */
612static u8 LM93_PWM_FREQ_TO_REG(int freq)
613{
614 int i;
615 for (i = 7; i > 0; i--)
616 if (freq <= lm93_pwm_freq_map[i])
617 break;
618
619 /* can fall through with i==0 */
620 return (u8)i;
621}
622
623/* TIME: 1/100 seconds
624 * REG: 0-7 as mapped below */
625static int lm93_spinup_time_map[8] = {
626 0, 10, 25, 40, 70, 100, 200, 400,
627};
628
629static int LM93_SPINUP_TIME_FROM_REG(u8 reg)
630{
631 return lm93_spinup_time_map[reg >> 5 & 0x07];
632}
633
634/* round up to nearest match */
635static u8 LM93_SPINUP_TIME_TO_REG(int time)
636{
637 int i;
638 for (i = 0; i < 7; i++)
639 if (time <= lm93_spinup_time_map[i])
640 break;
641
642 /* can fall through with i==8 */
643 return (u8)i;
644}
645
646#define LM93_RAMP_MIN 0
647#define LM93_RAMP_MAX 75
648
649static int LM93_RAMP_FROM_REG(u8 reg)
650{
651 return (reg & 0x0f) * 5;
652}
653
654/* RAMP: 1/100 seconds
655 REG: 50mS/bit 4-bits right justified */
656static u8 LM93_RAMP_TO_REG(int ramp)
657{
658 ramp = SENSORS_LIMIT(ramp, LM93_RAMP_MIN, LM93_RAMP_MAX);
659 return (u8)((ramp + 2) / 5);
660}
661
662/* PROCHOT: 0-255, 0 => 0%, 255 => > 96.6%
663 * REG: (same) */
664static u8 LM93_PROCHOT_TO_REG(long prochot)
665{
666 prochot = SENSORS_LIMIT(prochot, 0, 255);
667 return (u8)prochot;
668}
669
670/* PROCHOT-INTERVAL: 73 - 37200 (1/100 seconds)
671 * REG: 0-9 as mapped below */
672static int lm93_interval_map[10] = {
673 73, 146, 290, 580, 1170, 2330, 4660, 9320, 18600, 37200,
674};
675
676static int LM93_INTERVAL_FROM_REG(u8 reg)
677{
678 return lm93_interval_map[reg & 0x0f];
679}
680
681/* round up to nearest match */
682static u8 LM93_INTERVAL_TO_REG(long interval)
683{
684 int i;
685 for (i = 0; i < 9; i++)
686 if (interval <= lm93_interval_map[i])
687 break;
688
689 /* can fall through with i==9 */
690 return (u8)i;
691}
692
693/* GPIO: 0-255, GPIO0 is LSB
694 * REG: inverted */
695static unsigned LM93_GPI_FROM_REG(u8 reg)
696{
697 return ~reg & 0xff;
698}
699
700/* alarm bitmask definitions
701 The LM93 has nearly 64 bits of error status... I've pared that down to
702 what I think is a useful subset in order to fit it into 32 bits.
703
704 Especially note that the #VRD_HOT alarms are missing because we provide
705 that information as values in another sysfs file.
706
707 If libsensors is extended to support 64 bit values, this could be revisited.
708*/
709#define LM93_ALARM_IN1 0x00000001
710#define LM93_ALARM_IN2 0x00000002
711#define LM93_ALARM_IN3 0x00000004
712#define LM93_ALARM_IN4 0x00000008
713#define LM93_ALARM_IN5 0x00000010
714#define LM93_ALARM_IN6 0x00000020
715#define LM93_ALARM_IN7 0x00000040
716#define LM93_ALARM_IN8 0x00000080
717#define LM93_ALARM_IN9 0x00000100
718#define LM93_ALARM_IN10 0x00000200
719#define LM93_ALARM_IN11 0x00000400
720#define LM93_ALARM_IN12 0x00000800
721#define LM93_ALARM_IN13 0x00001000
722#define LM93_ALARM_IN14 0x00002000
723#define LM93_ALARM_IN15 0x00004000
724#define LM93_ALARM_IN16 0x00008000
725#define LM93_ALARM_FAN1 0x00010000
726#define LM93_ALARM_FAN2 0x00020000
727#define LM93_ALARM_FAN3 0x00040000
728#define LM93_ALARM_FAN4 0x00080000
729#define LM93_ALARM_PH1_ERR 0x00100000
730#define LM93_ALARM_PH2_ERR 0x00200000
731#define LM93_ALARM_SCSI1_ERR 0x00400000
732#define LM93_ALARM_SCSI2_ERR 0x00800000
733#define LM93_ALARM_DVDDP1_ERR 0x01000000
734#define LM93_ALARM_DVDDP2_ERR 0x02000000
735#define LM93_ALARM_D1_ERR 0x04000000
736#define LM93_ALARM_D2_ERR 0x08000000
737#define LM93_ALARM_TEMP1 0x10000000
738#define LM93_ALARM_TEMP2 0x20000000
739#define LM93_ALARM_TEMP3 0x40000000
740
741static unsigned LM93_ALARMS_FROM_REG(struct block1_t b1)
742{
743 unsigned result;
744 result = b1.host_status_2 & 0x3f;
745
746 if (vccp_limit_type[0])
747 result |= (b1.host_status_4 & 0x10) << 2;
748 else
749 result |= b1.host_status_2 & 0x40;
750
751 if (vccp_limit_type[1])
752 result |= (b1.host_status_4 & 0x20) << 2;
753 else
754 result |= b1.host_status_2 & 0x80;
755
756 result |= b1.host_status_3 << 8;
757 result |= (b1.fan_status & 0x0f) << 16;
758 result |= (b1.p1_prochot_status & 0x80) << 13;
759 result |= (b1.p2_prochot_status & 0x80) << 14;
760 result |= (b1.host_status_4 & 0xfc) << 20;
761 result |= (b1.host_status_1 & 0x07) << 28;
762 return result;
763}
764
765#define MAX_RETRIES 5
766
767static u8 lm93_read_byte(struct i2c_client *client, u8 reg)
768{
769 int value, i;
770
771 /* retry in case of read errors */
772 for (i=1; i<=MAX_RETRIES; i++) {
773 if ((value = i2c_smbus_read_byte_data(client, reg)) >= 0) {
774 return value;
775 } else {
776 dev_warn(&client->dev,"lm93: read byte data failed, "
777 "address 0x%02x.\n", reg);
778 mdelay(i + 3);
779 }
780
781 }
782
783 /* <TODO> what to return in case of error? */
784 dev_err(&client->dev,"lm93: All read byte retries failed!!\n");
785 return 0;
786}
787
788static int lm93_write_byte(struct i2c_client *client, u8 reg, u8 value)
789{
790 int result;
791
792 /* <TODO> how to handle write errors? */
793 result = i2c_smbus_write_byte_data(client, reg, value);
794
795 if (result < 0)
796 dev_warn(&client->dev,"lm93: write byte data failed, "
797 "0x%02x at address 0x%02x.\n", value, reg);
798
799 return result;
800}
801
802static u16 lm93_read_word(struct i2c_client *client, u8 reg)
803{
804 int value, i;
805
806 /* retry in case of read errors */
807 for (i=1; i<=MAX_RETRIES; i++) {
808 if ((value = i2c_smbus_read_word_data(client, reg)) >= 0) {
809 return value;
810 } else {
811 dev_warn(&client->dev,"lm93: read word data failed, "
812 "address 0x%02x.\n", reg);
813 mdelay(i + 3);
814 }
815
816 }
817
818 /* <TODO> what to return in case of error? */
819 dev_err(&client->dev,"lm93: All read word retries failed!!\n");
820 return 0;
821}
822
823static int lm93_write_word(struct i2c_client *client, u8 reg, u16 value)
824{
825 int result;
826
827 /* <TODO> how to handle write errors? */
828 result = i2c_smbus_write_word_data(client, reg, value);
829
830 if (result < 0)
831 dev_warn(&client->dev,"lm93: write word data failed, "
832 "0x%04x at address 0x%02x.\n", value, reg);
833
834 return result;
835}
836
837static u8 lm93_block_buffer[I2C_SMBUS_BLOCK_MAX];
838
839/*
840 read block data into values, retry if not expected length
841 fbn => index to lm93_block_read_cmds table
842 (Fixed Block Number - section 14.5.2 of LM93 datasheet)
843*/
844static void lm93_read_block(struct i2c_client *client, u8 fbn, u8 *values)
845{
846 int i, result=0;
847
848 for (i = 1; i <= MAX_RETRIES; i++) {
849 result = i2c_smbus_read_block_data(client,
850 lm93_block_read_cmds[fbn].cmd, lm93_block_buffer);
851
852 if (result == lm93_block_read_cmds[fbn].len) {
853 break;
854 } else {
855 dev_warn(&client->dev,"lm93: block read data failed, "
856 "command 0x%02x.\n",
857 lm93_block_read_cmds[fbn].cmd);
858 mdelay(i + 3);
859 }
860 }
861
862 if (result == lm93_block_read_cmds[fbn].len) {
863 memcpy(values,lm93_block_buffer,lm93_block_read_cmds[fbn].len);
864 } else {
865 /* <TODO> what to do in case of error? */
866 }
867}
868
869static struct lm93_data *lm93_update_device(struct device *dev)
870{
871 struct i2c_client *client = to_i2c_client(dev);
872 struct lm93_data *data = i2c_get_clientdata(client);
873 const unsigned long interval = HZ + (HZ / 2);
874
875 mutex_lock(&data->update_lock);
876
877 if (time_after(jiffies, data->last_updated + interval) ||
878 !data->valid) {
879
880 data->update(data, client);
881 data->last_updated = jiffies;
882 data->valid = 1;
883 }
884
885 mutex_unlock(&data->update_lock);
886 return data;
887}
888
889/* update routine for data that has no corresponding SMBus block command */
890static void lm93_update_client_common(struct lm93_data *data,
891 struct i2c_client *client)
892{
893 int i;
894 u8 *ptr;
895
896 /* temp1 - temp4: limits */
897 for (i = 0; i < 4; i++) {
898 data->temp_lim[i].min =
899 lm93_read_byte(client, LM93_REG_TEMP_MIN(i));
900 data->temp_lim[i].max =
901 lm93_read_byte(client, LM93_REG_TEMP_MAX(i));
902 }
903
904 /* config register */
905 data->config = lm93_read_byte(client, LM93_REG_CONFIG);
906
907 /* vid1 - vid2: values */
908 for (i = 0; i < 2; i++)
909 data->vid[i] = lm93_read_byte(client, LM93_REG_VID(i));
910
911 /* prochot1 - prochot2: limits */
912 for (i = 0; i < 2; i++)
913 data->prochot_max[i] = lm93_read_byte(client,
914 LM93_REG_PROCHOT_MAX(i));
915
916 /* vccp1 - vccp2: VID relative limits */
917 for (i = 0; i < 2; i++)
918 data->vccp_limits[i] = lm93_read_byte(client,
919 LM93_REG_VCCP_LIMIT_OFF(i));
920
921 /* GPIO input state */
922 data->gpi = lm93_read_byte(client, LM93_REG_GPI);
923
924 /* #PROCHOT override state */
925 data->prochot_override = lm93_read_byte(client,
926 LM93_REG_PROCHOT_OVERRIDE);
927
928 /* #PROCHOT intervals */
929 data->prochot_interval = lm93_read_byte(client,
930 LM93_REG_PROCHOT_INTERVAL);
931
932 /* Fan Boost Termperature registers */
933 for (i = 0; i < 4; i++)
934 data->boost[i] = lm93_read_byte(client, LM93_REG_BOOST(i));
935
936 /* Fan Boost Temperature Hyst. registers */
937 data->boost_hyst[0] = lm93_read_byte(client, LM93_REG_BOOST_HYST_12);
938 data->boost_hyst[1] = lm93_read_byte(client, LM93_REG_BOOST_HYST_34);
939
940 /* Temperature Zone Min. PWM & Hysteresis registers */
941 data->auto_pwm_min_hyst[0] =
942 lm93_read_byte(client, LM93_REG_PWM_MIN_HYST_12);
943 data->auto_pwm_min_hyst[1] =
944 lm93_read_byte(client, LM93_REG_PWM_MIN_HYST_34);
945
946 /* #PROCHOT & #VRDHOT PWM Ramp Control register */
947 data->pwm_ramp_ctl = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
948
949 /* misc setup registers */
950 data->sfc1 = lm93_read_byte(client, LM93_REG_SFC1);
951 data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
952 data->sf_tach_to_pwm = lm93_read_byte(client,
953 LM93_REG_SF_TACH_TO_PWM);
954
955 /* write back alarm values to clear */
956 for (i = 0, ptr = (u8 *)(&data->block1); i < 8; i++)
957 lm93_write_byte(client, LM93_REG_HOST_ERROR_1 + i, *(ptr + i));
958}
959
960/* update routine which uses SMBus block data commands */
961static void lm93_update_client_full(struct lm93_data *data,
962 struct i2c_client *client)
963{
964 dev_dbg(&client->dev,"starting device update (block data enabled)\n");
965
966 /* in1 - in16: values & limits */
967 lm93_read_block(client, 3, (u8 *)(data->block3));
968 lm93_read_block(client, 7, (u8 *)(data->block7));
969
970 /* temp1 - temp4: values */
971 lm93_read_block(client, 2, (u8 *)(data->block2));
972
973 /* prochot1 - prochot2: values */
974 lm93_read_block(client, 4, (u8 *)(data->block4));
975
976 /* fan1 - fan4: values & limits */
977 lm93_read_block(client, 5, (u8 *)(data->block5));
978 lm93_read_block(client, 8, (u8 *)(data->block8));
979
980 /* pmw control registers */
981 lm93_read_block(client, 9, (u8 *)(data->block9));
982
983 /* alarm values */
984 lm93_read_block(client, 1, (u8 *)(&data->block1));
985
986 /* auto/pwm registers */
987 lm93_read_block(client, 10, (u8 *)(&data->block10));
988
989 lm93_update_client_common(data, client);
990}
991
992/* update routine which uses SMBus byte/word data commands only */
993static void lm93_update_client_min(struct lm93_data *data,
994 struct i2c_client *client)
995{
996 int i,j;
997 u8 *ptr;
998
999 dev_dbg(&client->dev,"starting device update (block data disabled)\n");
1000
1001 /* in1 - in16: values & limits */
1002 for (i = 0; i < 16; i++) {
1003 data->block3[i] =
1004 lm93_read_byte(client, LM93_REG_IN(i));
1005 data->block7[i].min =
1006 lm93_read_byte(client, LM93_REG_IN_MIN(i));
1007 data->block7[i].max =
1008 lm93_read_byte(client, LM93_REG_IN_MAX(i));
1009 }
1010
1011 /* temp1 - temp4: values */
1012 for (i = 0; i < 4; i++) {
1013 data->block2[i] =
1014 lm93_read_byte(client, LM93_REG_TEMP(i));
1015 }
1016
1017 /* prochot1 - prochot2: values */
1018 for (i = 0; i < 2; i++) {
1019 data->block4[i].cur =
1020 lm93_read_byte(client, LM93_REG_PROCHOT_CUR(i));
1021 data->block4[i].avg =
1022 lm93_read_byte(client, LM93_REG_PROCHOT_AVG(i));
1023 }
1024
1025 /* fan1 - fan4: values & limits */
1026 for (i = 0; i < 4; i++) {
1027 data->block5[i] =
1028 lm93_read_word(client, LM93_REG_FAN(i));
1029 data->block8[i] =
1030 lm93_read_word(client, LM93_REG_FAN_MIN(i));
1031 }
1032
1033 /* pwm control registers */
1034 for (i = 0; i < 2; i++) {
1035 for (j = 0; j < 4; j++) {
1036 data->block9[i][j] =
1037 lm93_read_byte(client, LM93_REG_PWM_CTL(i,j));
1038 }
1039 }
1040
1041 /* alarm values */
1042 for (i = 0, ptr = (u8 *)(&data->block1); i < 8; i++) {
1043 *(ptr + i) =
1044 lm93_read_byte(client, LM93_REG_HOST_ERROR_1 + i);
1045 }
1046
1047 /* auto/pwm (base temp) registers */
1048 for (i = 0; i < 4; i++) {
1049 data->block10.base[i] =
1050 lm93_read_byte(client, LM93_REG_TEMP_BASE(i));
1051 }
1052
1053 /* auto/pwm (offset temp) registers */
1054 for (i = 0; i < 12; i++) {
1055 data->block10.offset[i] =
1056 lm93_read_byte(client, LM93_REG_TEMP_OFFSET(i));
1057 }
1058
1059 lm93_update_client_common(data, client);
1060}
1061
1062/* following are the sysfs callback functions */
1063static ssize_t show_in(struct device *dev, struct device_attribute *attr,
1064 char *buf)
1065{
1066 int nr = (to_sensor_dev_attr(attr))->index;
1067
1068 struct lm93_data *data = lm93_update_device(dev);
1069 return sprintf(buf, "%d\n", LM93_IN_FROM_REG(nr, data->block3[nr]));
1070}
1071
1072static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 0);
1073static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 1);
1074static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 2);
1075static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 3);
1076static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 4);
1077static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 5);
1078static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 6);
1079static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 7);
1080static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in, NULL, 8);
1081static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in, NULL, 9);
1082static SENSOR_DEVICE_ATTR(in11_input, S_IRUGO, show_in, NULL, 10);
1083static SENSOR_DEVICE_ATTR(in12_input, S_IRUGO, show_in, NULL, 11);
1084static SENSOR_DEVICE_ATTR(in13_input, S_IRUGO, show_in, NULL, 12);
1085static SENSOR_DEVICE_ATTR(in14_input, S_IRUGO, show_in, NULL, 13);
1086static SENSOR_DEVICE_ATTR(in15_input, S_IRUGO, show_in, NULL, 14);
1087static SENSOR_DEVICE_ATTR(in16_input, S_IRUGO, show_in, NULL, 15);
1088
1089static ssize_t show_in_min(struct device *dev,
1090 struct device_attribute *attr, char *buf)
1091{
1092 int nr = (to_sensor_dev_attr(attr))->index;
1093 struct lm93_data *data = lm93_update_device(dev);
1094 int vccp = nr - 6;
1095 long rc, vid;
1096
1097 if ((nr==6 || nr==7) && (vccp_limit_type[vccp])) {
1098 vid = LM93_VID_FROM_REG(data->vid[vccp]);
1099 rc = LM93_IN_MIN_FROM_REG(data->vccp_limits[vccp], vid);
1100 }
1101 else {
1102 rc = LM93_IN_FROM_REG(nr, data->block7[nr].min); \
1103 }
1104 return sprintf(buf, "%ld\n", rc); \
1105}
1106
1107static ssize_t store_in_min(struct device *dev, struct device_attribute *attr,
1108 const char *buf, size_t count)
1109{
1110 int nr = (to_sensor_dev_attr(attr))->index;
1111 struct i2c_client *client = to_i2c_client(dev);
1112 struct lm93_data *data = i2c_get_clientdata(client);
1113 u32 val = simple_strtoul(buf, NULL, 10);
1114 int vccp = nr - 6;
1115 long vid;
1116
1117 mutex_lock(&data->update_lock);
1118 if ((nr==6 || nr==7) && (vccp_limit_type[vccp])) {
1119 vid = LM93_VID_FROM_REG(data->vid[vccp]);
1120 data->vccp_limits[vccp] = (data->vccp_limits[vccp] & 0xf0) |
1121 LM93_IN_REL_TO_REG(val, 0, vid);
1122 lm93_write_byte(client, LM93_REG_VCCP_LIMIT_OFF(vccp),
1123 data->vccp_limits[vccp]);
1124 }
1125 else {
1126 data->block7[nr].min = LM93_IN_TO_REG(nr,val);
1127 lm93_write_byte(client, LM93_REG_IN_MIN(nr),
1128 data->block7[nr].min);
1129 }
1130 mutex_unlock(&data->update_lock);
1131 return count;
1132}
1133
1134static SENSOR_DEVICE_ATTR(in1_min, S_IWUSR | S_IRUGO,
1135 show_in_min, store_in_min, 0);
1136static SENSOR_DEVICE_ATTR(in2_min, S_IWUSR | S_IRUGO,
1137 show_in_min, store_in_min, 1);
1138static SENSOR_DEVICE_ATTR(in3_min, S_IWUSR | S_IRUGO,
1139 show_in_min, store_in_min, 2);
1140static SENSOR_DEVICE_ATTR(in4_min, S_IWUSR | S_IRUGO,
1141 show_in_min, store_in_min, 3);
1142static SENSOR_DEVICE_ATTR(in5_min, S_IWUSR | S_IRUGO,
1143 show_in_min, store_in_min, 4);
1144static SENSOR_DEVICE_ATTR(in6_min, S_IWUSR | S_IRUGO,
1145 show_in_min, store_in_min, 5);
1146static SENSOR_DEVICE_ATTR(in7_min, S_IWUSR | S_IRUGO,
1147 show_in_min, store_in_min, 6);
1148static SENSOR_DEVICE_ATTR(in8_min, S_IWUSR | S_IRUGO,
1149 show_in_min, store_in_min, 7);
1150static SENSOR_DEVICE_ATTR(in9_min, S_IWUSR | S_IRUGO,
1151 show_in_min, store_in_min, 8);
1152static SENSOR_DEVICE_ATTR(in10_min, S_IWUSR | S_IRUGO,
1153 show_in_min, store_in_min, 9);
1154static SENSOR_DEVICE_ATTR(in11_min, S_IWUSR | S_IRUGO,
1155 show_in_min, store_in_min, 10);
1156static SENSOR_DEVICE_ATTR(in12_min, S_IWUSR | S_IRUGO,
1157 show_in_min, store_in_min, 11);
1158static SENSOR_DEVICE_ATTR(in13_min, S_IWUSR | S_IRUGO,
1159 show_in_min, store_in_min, 12);
1160static SENSOR_DEVICE_ATTR(in14_min, S_IWUSR | S_IRUGO,
1161 show_in_min, store_in_min, 13);
1162static SENSOR_DEVICE_ATTR(in15_min, S_IWUSR | S_IRUGO,
1163 show_in_min, store_in_min, 14);
1164static SENSOR_DEVICE_ATTR(in16_min, S_IWUSR | S_IRUGO,
1165 show_in_min, store_in_min, 15);
1166
1167static ssize_t show_in_max(struct device *dev,
1168 struct device_attribute *attr, char *buf)
1169{
1170 int nr = (to_sensor_dev_attr(attr))->index;
1171 struct lm93_data *data = lm93_update_device(dev);
1172 int vccp = nr - 6;
1173 long rc, vid;
1174
1175 if ((nr==6 || nr==7) && (vccp_limit_type[vccp])) {
1176 vid = LM93_VID_FROM_REG(data->vid[vccp]);
1177 rc = LM93_IN_MAX_FROM_REG(data->vccp_limits[vccp],vid);
1178 }
1179 else {
1180 rc = LM93_IN_FROM_REG(nr,data->block7[nr].max); \
1181 }
1182 return sprintf(buf,"%ld\n",rc); \
1183}
1184
1185static ssize_t store_in_max(struct device *dev, struct device_attribute *attr,
1186 const char *buf, size_t count)
1187{
1188 int nr = (to_sensor_dev_attr(attr))->index;
1189 struct i2c_client *client = to_i2c_client(dev);
1190 struct lm93_data *data = i2c_get_clientdata(client);
1191 u32 val = simple_strtoul(buf, NULL, 10);
1192 int vccp = nr - 6;
1193 long vid;
1194
1195 mutex_lock(&data->update_lock);
1196 if ((nr==6 || nr==7) && (vccp_limit_type[vccp])) {
1197 vid = LM93_VID_FROM_REG(data->vid[vccp]);
1198 data->vccp_limits[vccp] = (data->vccp_limits[vccp] & 0x0f) |
1199 LM93_IN_REL_TO_REG(val, 1, vid);
1200 lm93_write_byte(client, LM93_REG_VCCP_LIMIT_OFF(vccp),
1201 data->vccp_limits[vccp]);
1202 }
1203 else {
1204 data->block7[nr].max = LM93_IN_TO_REG(nr,val);
1205 lm93_write_byte(client, LM93_REG_IN_MAX(nr),
1206 data->block7[nr].max);
1207 }
1208 mutex_unlock(&data->update_lock);
1209 return count;
1210}
1211
1212static SENSOR_DEVICE_ATTR(in1_max, S_IWUSR | S_IRUGO,
1213 show_in_max, store_in_max, 0);
1214static SENSOR_DEVICE_ATTR(in2_max, S_IWUSR | S_IRUGO,
1215 show_in_max, store_in_max, 1);
1216static SENSOR_DEVICE_ATTR(in3_max, S_IWUSR | S_IRUGO,
1217 show_in_max, store_in_max, 2);
1218static SENSOR_DEVICE_ATTR(in4_max, S_IWUSR | S_IRUGO,
1219 show_in_max, store_in_max, 3);
1220static SENSOR_DEVICE_ATTR(in5_max, S_IWUSR | S_IRUGO,
1221 show_in_max, store_in_max, 4);
1222static SENSOR_DEVICE_ATTR(in6_max, S_IWUSR | S_IRUGO,
1223 show_in_max, store_in_max, 5);
1224static SENSOR_DEVICE_ATTR(in7_max, S_IWUSR | S_IRUGO,
1225 show_in_max, store_in_max, 6);
1226static SENSOR_DEVICE_ATTR(in8_max, S_IWUSR | S_IRUGO,
1227 show_in_max, store_in_max, 7);
1228static SENSOR_DEVICE_ATTR(in9_max, S_IWUSR | S_IRUGO,
1229 show_in_max, store_in_max, 8);
1230static SENSOR_DEVICE_ATTR(in10_max, S_IWUSR | S_IRUGO,
1231 show_in_max, store_in_max, 9);
1232static SENSOR_DEVICE_ATTR(in11_max, S_IWUSR | S_IRUGO,
1233 show_in_max, store_in_max, 10);
1234static SENSOR_DEVICE_ATTR(in12_max, S_IWUSR | S_IRUGO,
1235 show_in_max, store_in_max, 11);
1236static SENSOR_DEVICE_ATTR(in13_max, S_IWUSR | S_IRUGO,
1237 show_in_max, store_in_max, 12);
1238static SENSOR_DEVICE_ATTR(in14_max, S_IWUSR | S_IRUGO,
1239 show_in_max, store_in_max, 13);
1240static SENSOR_DEVICE_ATTR(in15_max, S_IWUSR | S_IRUGO,
1241 show_in_max, store_in_max, 14);
1242static SENSOR_DEVICE_ATTR(in16_max, S_IWUSR | S_IRUGO,
1243 show_in_max, store_in_max, 15);
1244
1245static ssize_t show_temp(struct device *dev,
1246 struct device_attribute *attr, char *buf)
1247{
1248 int nr = (to_sensor_dev_attr(attr))->index;
1249 struct lm93_data *data = lm93_update_device(dev);
1250 return sprintf(buf,"%d\n",LM93_TEMP_FROM_REG(data->block2[nr]));
1251}
1252
1253static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
1254static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
1255static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
1256
1257static ssize_t show_temp_min(struct device *dev,
1258 struct device_attribute *attr, char *buf)
1259{
1260 int nr = (to_sensor_dev_attr(attr))->index;
1261 struct lm93_data *data = lm93_update_device(dev);
1262 return sprintf(buf,"%d\n",LM93_TEMP_FROM_REG(data->temp_lim[nr].min));
1263}
1264
1265static ssize_t store_temp_min(struct device *dev, struct device_attribute *attr,
1266 const char *buf, size_t count)
1267{
1268 int nr = (to_sensor_dev_attr(attr))->index;
1269 struct i2c_client *client = to_i2c_client(dev);
1270 struct lm93_data *data = i2c_get_clientdata(client);
1271 u32 val = simple_strtoul(buf, NULL, 10);
1272
1273 mutex_lock(&data->update_lock);
1274 data->temp_lim[nr].min = LM93_TEMP_TO_REG(val);
1275 lm93_write_byte(client, LM93_REG_TEMP_MIN(nr), data->temp_lim[nr].min);
1276 mutex_unlock(&data->update_lock);
1277 return count;
1278}
1279
1280static SENSOR_DEVICE_ATTR(temp1_min, S_IWUSR | S_IRUGO,
1281 show_temp_min, store_temp_min, 0);
1282static SENSOR_DEVICE_ATTR(temp2_min, S_IWUSR | S_IRUGO,
1283 show_temp_min, store_temp_min, 1);
1284static SENSOR_DEVICE_ATTR(temp3_min, S_IWUSR | S_IRUGO,
1285 show_temp_min, store_temp_min, 2);
1286
1287static ssize_t show_temp_max(struct device *dev,
1288 struct device_attribute *attr, char *buf)
1289{
1290 int nr = (to_sensor_dev_attr(attr))->index;
1291 struct lm93_data *data = lm93_update_device(dev);
1292 return sprintf(buf,"%d\n",LM93_TEMP_FROM_REG(data->temp_lim[nr].max));
1293}
1294
1295static ssize_t store_temp_max(struct device *dev, struct device_attribute *attr,
1296 const char *buf, size_t count)
1297{
1298 int nr = (to_sensor_dev_attr(attr))->index;
1299 struct i2c_client *client = to_i2c_client(dev);
1300 struct lm93_data *data = i2c_get_clientdata(client);
1301 u32 val = simple_strtoul(buf, NULL, 10);
1302
1303 mutex_lock(&data->update_lock);
1304 data->temp_lim[nr].max = LM93_TEMP_TO_REG(val);
1305 lm93_write_byte(client, LM93_REG_TEMP_MAX(nr), data->temp_lim[nr].max);
1306 mutex_unlock(&data->update_lock);
1307 return count;
1308}
1309
1310static SENSOR_DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO,
1311 show_temp_max, store_temp_max, 0);
1312static SENSOR_DEVICE_ATTR(temp2_max, S_IWUSR | S_IRUGO,
1313 show_temp_max, store_temp_max, 1);
1314static SENSOR_DEVICE_ATTR(temp3_max, S_IWUSR | S_IRUGO,
1315 show_temp_max, store_temp_max, 2);
1316
1317static ssize_t show_temp_auto_base(struct device *dev,
1318 struct device_attribute *attr, char *buf)
1319{
1320 int nr = (to_sensor_dev_attr(attr))->index;
1321 struct lm93_data *data = lm93_update_device(dev);
1322 return sprintf(buf,"%d\n",LM93_TEMP_FROM_REG(data->block10.base[nr]));
1323}
1324
1325static ssize_t store_temp_auto_base(struct device *dev,
1326 struct device_attribute *attr,
1327 const char *buf, size_t count)
1328{
1329 int nr = (to_sensor_dev_attr(attr))->index;
1330 struct i2c_client *client = to_i2c_client(dev);
1331 struct lm93_data *data = i2c_get_clientdata(client);
1332 u32 val = simple_strtoul(buf, NULL, 10);
1333
1334 mutex_lock(&data->update_lock);
1335 data->block10.base[nr] = LM93_TEMP_TO_REG(val);
1336 lm93_write_byte(client, LM93_REG_TEMP_BASE(nr), data->block10.base[nr]);
1337 mutex_unlock(&data->update_lock);
1338 return count;
1339}
1340
1341static SENSOR_DEVICE_ATTR(temp1_auto_base, S_IWUSR | S_IRUGO,
1342 show_temp_auto_base, store_temp_auto_base, 0);
1343static SENSOR_DEVICE_ATTR(temp2_auto_base, S_IWUSR | S_IRUGO,
1344 show_temp_auto_base, store_temp_auto_base, 1);
1345static SENSOR_DEVICE_ATTR(temp3_auto_base, S_IWUSR | S_IRUGO,
1346 show_temp_auto_base, store_temp_auto_base, 2);
1347
1348static ssize_t show_temp_auto_boost(struct device *dev,
1349 struct device_attribute *attr,char *buf)
1350{
1351 int nr = (to_sensor_dev_attr(attr))->index;
1352 struct lm93_data *data = lm93_update_device(dev);
1353 return sprintf(buf,"%d\n",LM93_TEMP_FROM_REG(data->boost[nr]));
1354}
1355
1356static ssize_t store_temp_auto_boost(struct device *dev,
1357 struct device_attribute *attr,
1358 const char *buf, size_t count)
1359{
1360 int nr = (to_sensor_dev_attr(attr))->index;
1361 struct i2c_client *client = to_i2c_client(dev);
1362 struct lm93_data *data = i2c_get_clientdata(client);
1363 u32 val = simple_strtoul(buf, NULL, 10);
1364
1365 mutex_lock(&data->update_lock);
1366 data->boost[nr] = LM93_TEMP_TO_REG(val);
1367 lm93_write_byte(client, LM93_REG_BOOST(nr), data->boost[nr]);
1368 mutex_unlock(&data->update_lock);
1369 return count;
1370}
1371
1372static SENSOR_DEVICE_ATTR(temp1_auto_boost, S_IWUSR | S_IRUGO,
1373 show_temp_auto_boost, store_temp_auto_boost, 0);
1374static SENSOR_DEVICE_ATTR(temp2_auto_boost, S_IWUSR | S_IRUGO,
1375 show_temp_auto_boost, store_temp_auto_boost, 1);
1376static SENSOR_DEVICE_ATTR(temp3_auto_boost, S_IWUSR | S_IRUGO,
1377 show_temp_auto_boost, store_temp_auto_boost, 2);
1378
1379static ssize_t show_temp_auto_boost_hyst(struct device *dev,
1380 struct device_attribute *attr,
1381 char *buf)
1382{
1383 int nr = (to_sensor_dev_attr(attr))->index;
1384 struct lm93_data *data = lm93_update_device(dev);
1385 int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
1386 return sprintf(buf,"%d\n",
1387 LM93_AUTO_BOOST_HYST_FROM_REGS(data, nr, mode));
1388}
1389
1390static ssize_t store_temp_auto_boost_hyst(struct device *dev,
1391 struct device_attribute *attr,
1392 const char *buf, size_t count)
1393{
1394 int nr = (to_sensor_dev_attr(attr))->index;
1395 struct i2c_client *client = to_i2c_client(dev);
1396 struct lm93_data *data = i2c_get_clientdata(client);
1397 u32 val = simple_strtoul(buf, NULL, 10);
1398
1399 mutex_lock(&data->update_lock);
1400 /* force 0.5C/bit mode */
1401 data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
1402 data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
1403 lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
1404 data->boost_hyst[nr/2] = LM93_AUTO_BOOST_HYST_TO_REG(data, val, nr, 1);
1405 lm93_write_byte(client, LM93_REG_BOOST_HYST(nr),
1406 data->boost_hyst[nr/2]);
1407 mutex_unlock(&data->update_lock);
1408 return count;
1409}
1410
1411static SENSOR_DEVICE_ATTR(temp1_auto_boost_hyst, S_IWUSR | S_IRUGO,
1412 show_temp_auto_boost_hyst,
1413 store_temp_auto_boost_hyst, 0);
1414static SENSOR_DEVICE_ATTR(temp2_auto_boost_hyst, S_IWUSR | S_IRUGO,
1415 show_temp_auto_boost_hyst,
1416 store_temp_auto_boost_hyst, 1);
1417static SENSOR_DEVICE_ATTR(temp3_auto_boost_hyst, S_IWUSR | S_IRUGO,
1418 show_temp_auto_boost_hyst,
1419 store_temp_auto_boost_hyst, 2);
1420
1421static ssize_t show_temp_auto_offset(struct device *dev,
1422 struct device_attribute *attr, char *buf)
1423{
1424 struct sensor_device_attribute_2 *s_attr = to_sensor_dev_attr_2(attr);
1425 int nr = s_attr->index;
1426 int ofs = s_attr->nr;
1427 struct lm93_data *data = lm93_update_device(dev);
1428 int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
1429 return sprintf(buf,"%d\n",
1430 LM93_TEMP_AUTO_OFFSET_FROM_REG(data->block10.offset[ofs],
1431 nr,mode));
1432}
1433
1434static ssize_t store_temp_auto_offset(struct device *dev,
1435 struct device_attribute *attr,
1436 const char *buf, size_t count)
1437{
1438 struct sensor_device_attribute_2 *s_attr = to_sensor_dev_attr_2(attr);
1439 int nr = s_attr->index;
1440 int ofs = s_attr->nr;
1441 struct i2c_client *client = to_i2c_client(dev);
1442 struct lm93_data *data = i2c_get_clientdata(client);
1443 u32 val = simple_strtoul(buf, NULL, 10);
1444
1445 mutex_lock(&data->update_lock);
1446 /* force 0.5C/bit mode */
1447 data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
1448 data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
1449 lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
1450 data->block10.offset[ofs] = LM93_TEMP_AUTO_OFFSET_TO_REG(
1451 data->block10.offset[ofs], val, nr, 1);
1452 lm93_write_byte(client, LM93_REG_TEMP_OFFSET(ofs),
1453 data->block10.offset[ofs]);
1454 mutex_unlock(&data->update_lock);
1455 return count;
1456}
1457
1458static SENSOR_DEVICE_ATTR_2(temp1_auto_offset1, S_IWUSR | S_IRUGO,
1459 show_temp_auto_offset, store_temp_auto_offset, 0, 0);
1460static SENSOR_DEVICE_ATTR_2(temp1_auto_offset2, S_IWUSR | S_IRUGO,
1461 show_temp_auto_offset, store_temp_auto_offset, 1, 0);
1462static SENSOR_DEVICE_ATTR_2(temp1_auto_offset3, S_IWUSR | S_IRUGO,
1463 show_temp_auto_offset, store_temp_auto_offset, 2, 0);
1464static SENSOR_DEVICE_ATTR_2(temp1_auto_offset4, S_IWUSR | S_IRUGO,
1465 show_temp_auto_offset, store_temp_auto_offset, 3, 0);
1466static SENSOR_DEVICE_ATTR_2(temp1_auto_offset5, S_IWUSR | S_IRUGO,
1467 show_temp_auto_offset, store_temp_auto_offset, 4, 0);
1468static SENSOR_DEVICE_ATTR_2(temp1_auto_offset6, S_IWUSR | S_IRUGO,
1469 show_temp_auto_offset, store_temp_auto_offset, 5, 0);
1470static SENSOR_DEVICE_ATTR_2(temp1_auto_offset7, S_IWUSR | S_IRUGO,
1471 show_temp_auto_offset, store_temp_auto_offset, 6, 0);
1472static SENSOR_DEVICE_ATTR_2(temp1_auto_offset8, S_IWUSR | S_IRUGO,
1473 show_temp_auto_offset, store_temp_auto_offset, 7, 0);
1474static SENSOR_DEVICE_ATTR_2(temp1_auto_offset9, S_IWUSR | S_IRUGO,
1475 show_temp_auto_offset, store_temp_auto_offset, 8, 0);
1476static SENSOR_DEVICE_ATTR_2(temp1_auto_offset10, S_IWUSR | S_IRUGO,
1477 show_temp_auto_offset, store_temp_auto_offset, 9, 0);
1478static SENSOR_DEVICE_ATTR_2(temp1_auto_offset11, S_IWUSR | S_IRUGO,
1479 show_temp_auto_offset, store_temp_auto_offset, 10, 0);
1480static SENSOR_DEVICE_ATTR_2(temp1_auto_offset12, S_IWUSR | S_IRUGO,
1481 show_temp_auto_offset, store_temp_auto_offset, 11, 0);
1482static SENSOR_DEVICE_ATTR_2(temp2_auto_offset1, S_IWUSR | S_IRUGO,
1483 show_temp_auto_offset, store_temp_auto_offset, 0, 1);
1484static SENSOR_DEVICE_ATTR_2(temp2_auto_offset2, S_IWUSR | S_IRUGO,
1485 show_temp_auto_offset, store_temp_auto_offset, 1, 1);
1486static SENSOR_DEVICE_ATTR_2(temp2_auto_offset3, S_IWUSR | S_IRUGO,
1487 show_temp_auto_offset, store_temp_auto_offset, 2, 1);
1488static SENSOR_DEVICE_ATTR_2(temp2_auto_offset4, S_IWUSR | S_IRUGO,
1489 show_temp_auto_offset, store_temp_auto_offset, 3, 1);
1490static SENSOR_DEVICE_ATTR_2(temp2_auto_offset5, S_IWUSR | S_IRUGO,
1491 show_temp_auto_offset, store_temp_auto_offset, 4, 1);
1492static SENSOR_DEVICE_ATTR_2(temp2_auto_offset6, S_IWUSR | S_IRUGO,
1493 show_temp_auto_offset, store_temp_auto_offset, 5, 1);
1494static SENSOR_DEVICE_ATTR_2(temp2_auto_offset7, S_IWUSR | S_IRUGO,
1495 show_temp_auto_offset, store_temp_auto_offset, 6, 1);
1496static SENSOR_DEVICE_ATTR_2(temp2_auto_offset8, S_IWUSR | S_IRUGO,
1497 show_temp_auto_offset, store_temp_auto_offset, 7, 1);
1498static SENSOR_DEVICE_ATTR_2(temp2_auto_offset9, S_IWUSR | S_IRUGO,
1499 show_temp_auto_offset, store_temp_auto_offset, 8, 1);
1500static SENSOR_DEVICE_ATTR_2(temp2_auto_offset10, S_IWUSR | S_IRUGO,
1501 show_temp_auto_offset, store_temp_auto_offset, 9, 1);
1502static SENSOR_DEVICE_ATTR_2(temp2_auto_offset11, S_IWUSR | S_IRUGO,
1503 show_temp_auto_offset, store_temp_auto_offset, 10, 1);
1504static SENSOR_DEVICE_ATTR_2(temp2_auto_offset12, S_IWUSR | S_IRUGO,
1505 show_temp_auto_offset, store_temp_auto_offset, 11, 1);
1506static SENSOR_DEVICE_ATTR_2(temp3_auto_offset1, S_IWUSR | S_IRUGO,
1507 show_temp_auto_offset, store_temp_auto_offset, 0, 2);
1508static SENSOR_DEVICE_ATTR_2(temp3_auto_offset2, S_IWUSR | S_IRUGO,
1509 show_temp_auto_offset, store_temp_auto_offset, 1, 2);
1510static SENSOR_DEVICE_ATTR_2(temp3_auto_offset3, S_IWUSR | S_IRUGO,
1511 show_temp_auto_offset, store_temp_auto_offset, 2, 2);
1512static SENSOR_DEVICE_ATTR_2(temp3_auto_offset4, S_IWUSR | S_IRUGO,
1513 show_temp_auto_offset, store_temp_auto_offset, 3, 2);
1514static SENSOR_DEVICE_ATTR_2(temp3_auto_offset5, S_IWUSR | S_IRUGO,
1515 show_temp_auto_offset, store_temp_auto_offset, 4, 2);
1516static SENSOR_DEVICE_ATTR_2(temp3_auto_offset6, S_IWUSR | S_IRUGO,
1517 show_temp_auto_offset, store_temp_auto_offset, 5, 2);
1518static SENSOR_DEVICE_ATTR_2(temp3_auto_offset7, S_IWUSR | S_IRUGO,
1519 show_temp_auto_offset, store_temp_auto_offset, 6, 2);
1520static SENSOR_DEVICE_ATTR_2(temp3_auto_offset8, S_IWUSR | S_IRUGO,
1521 show_temp_auto_offset, store_temp_auto_offset, 7, 2);
1522static SENSOR_DEVICE_ATTR_2(temp3_auto_offset9, S_IWUSR | S_IRUGO,
1523 show_temp_auto_offset, store_temp_auto_offset, 8, 2);
1524static SENSOR_DEVICE_ATTR_2(temp3_auto_offset10, S_IWUSR | S_IRUGO,
1525 show_temp_auto_offset, store_temp_auto_offset, 9, 2);
1526static SENSOR_DEVICE_ATTR_2(temp3_auto_offset11, S_IWUSR | S_IRUGO,
1527 show_temp_auto_offset, store_temp_auto_offset, 10, 2);
1528static SENSOR_DEVICE_ATTR_2(temp3_auto_offset12, S_IWUSR | S_IRUGO,
1529 show_temp_auto_offset, store_temp_auto_offset, 11, 2);
1530
1531static ssize_t show_temp_auto_pwm_min(struct device *dev,
1532 struct device_attribute *attr, char *buf)
1533{
1534 int nr = (to_sensor_dev_attr(attr))->index;
1535 u8 reg, ctl4;
1536 struct lm93_data *data = lm93_update_device(dev);
1537 reg = data->auto_pwm_min_hyst[nr/2] >> 4 & 0x0f;
1538 ctl4 = data->block9[nr][LM93_PWM_CTL4];
1539 return sprintf(buf,"%d\n",LM93_PWM_FROM_REG(reg, (ctl4 & 0x07) ?
1540 LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ));
1541}
1542
1543static ssize_t store_temp_auto_pwm_min(struct device *dev,
1544 struct device_attribute *attr,
1545 const char *buf, size_t count)
1546{
1547 int nr = (to_sensor_dev_attr(attr))->index;
1548 struct i2c_client *client = to_i2c_client(dev);
1549 struct lm93_data *data = i2c_get_clientdata(client);
1550 u32 val = simple_strtoul(buf, NULL, 10);
1551 u8 reg, ctl4;
1552
1553 mutex_lock(&data->update_lock);
1554 reg = lm93_read_byte(client, LM93_REG_PWM_MIN_HYST(nr));
1555 ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr,LM93_PWM_CTL4));
1556 reg = (reg & 0x0f) |
1557 LM93_PWM_TO_REG(val, (ctl4 & 0x07) ?
1558 LM93_PWM_MAP_LO_FREQ :
1559 LM93_PWM_MAP_HI_FREQ) << 4;
1560 data->auto_pwm_min_hyst[nr/2] = reg;
1561 lm93_write_byte(client, LM93_REG_PWM_MIN_HYST(nr), reg);
1562 mutex_unlock(&data->update_lock);
1563 return count;
1564}
1565
1566static SENSOR_DEVICE_ATTR(temp1_auto_pwm_min, S_IWUSR | S_IRUGO,
1567 show_temp_auto_pwm_min,
1568 store_temp_auto_pwm_min, 0);
1569static SENSOR_DEVICE_ATTR(temp2_auto_pwm_min, S_IWUSR | S_IRUGO,
1570 show_temp_auto_pwm_min,
1571 store_temp_auto_pwm_min, 1);
1572static SENSOR_DEVICE_ATTR(temp3_auto_pwm_min, S_IWUSR | S_IRUGO,
1573 show_temp_auto_pwm_min,
1574 store_temp_auto_pwm_min, 2);
1575
1576static ssize_t show_temp_auto_offset_hyst(struct device *dev,
1577 struct device_attribute *attr, char *buf)
1578{
1579 int nr = (to_sensor_dev_attr(attr))->index;
1580 struct lm93_data *data = lm93_update_device(dev);
1581 int mode = LM93_TEMP_OFFSET_MODE_FROM_REG(data->sfc2, nr);
1582 return sprintf(buf,"%d\n",LM93_TEMP_OFFSET_FROM_REG(
1583 data->auto_pwm_min_hyst[nr/2], mode));
1584}
1585
1586static ssize_t store_temp_auto_offset_hyst(struct device *dev,
1587 struct device_attribute *attr,
1588 const char *buf, size_t count)
1589{
1590 int nr = (to_sensor_dev_attr(attr))->index;
1591 struct i2c_client *client = to_i2c_client(dev);
1592 struct lm93_data *data = i2c_get_clientdata(client);
1593 u32 val = simple_strtoul(buf, NULL, 10);
1594 u8 reg;
1595
1596 mutex_lock(&data->update_lock);
1597 /* force 0.5C/bit mode */
1598 data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
1599 data->sfc2 |= ((nr < 2) ? 0x10 : 0x20);
1600 lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
1601 reg = data->auto_pwm_min_hyst[nr/2];
1602 reg = (reg & 0xf0) | (LM93_TEMP_OFFSET_TO_REG(val, 1) & 0x0f);
1603 data->auto_pwm_min_hyst[nr/2] = reg;
1604 lm93_write_byte(client, LM93_REG_PWM_MIN_HYST(nr), reg);
1605 mutex_unlock(&data->update_lock);
1606 return count;
1607}
1608
1609static SENSOR_DEVICE_ATTR(temp1_auto_offset_hyst, S_IWUSR | S_IRUGO,
1610 show_temp_auto_offset_hyst,
1611 store_temp_auto_offset_hyst, 0);
1612static SENSOR_DEVICE_ATTR(temp2_auto_offset_hyst, S_IWUSR | S_IRUGO,
1613 show_temp_auto_offset_hyst,
1614 store_temp_auto_offset_hyst, 1);
1615static SENSOR_DEVICE_ATTR(temp3_auto_offset_hyst, S_IWUSR | S_IRUGO,
1616 show_temp_auto_offset_hyst,
1617 store_temp_auto_offset_hyst, 2);
1618
1619static ssize_t show_fan_input(struct device *dev,
1620 struct device_attribute *attr, char *buf)
1621{
1622 struct sensor_device_attribute *s_attr = to_sensor_dev_attr(attr);
1623 int nr = s_attr->index;
1624 struct lm93_data *data = lm93_update_device(dev);
1625
1626 return sprintf(buf,"%d\n",LM93_FAN_FROM_REG(data->block5[nr]));
1627}
1628
1629static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan_input, NULL, 0);
1630static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan_input, NULL, 1);
1631static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan_input, NULL, 2);
1632static SENSOR_DEVICE_ATTR(fan4_input, S_IRUGO, show_fan_input, NULL, 3);
1633
1634static ssize_t show_fan_min(struct device *dev,
1635 struct device_attribute *attr, char *buf)
1636{
1637 int nr = (to_sensor_dev_attr(attr))->index;
1638 struct lm93_data *data = lm93_update_device(dev);
1639
1640 return sprintf(buf,"%d\n",LM93_FAN_FROM_REG(data->block8[nr]));
1641}
1642
1643static ssize_t store_fan_min(struct device *dev, struct device_attribute *attr,
1644 const char *buf, size_t count)
1645{
1646 int nr = (to_sensor_dev_attr(attr))->index;
1647 struct i2c_client *client = to_i2c_client(dev);
1648 struct lm93_data *data = i2c_get_clientdata(client);
1649 u32 val = simple_strtoul(buf, NULL, 10);
1650
1651 mutex_lock(&data->update_lock);
1652 data->block8[nr] = LM93_FAN_TO_REG(val);
1653 lm93_write_word(client,LM93_REG_FAN_MIN(nr),data->block8[nr]);
1654 mutex_unlock(&data->update_lock);
1655 return count;
1656}
1657
1658static SENSOR_DEVICE_ATTR(fan1_min, S_IWUSR | S_IRUGO,
1659 show_fan_min, store_fan_min, 0);
1660static SENSOR_DEVICE_ATTR(fan2_min, S_IWUSR | S_IRUGO,
1661 show_fan_min, store_fan_min, 1);
1662static SENSOR_DEVICE_ATTR(fan3_min, S_IWUSR | S_IRUGO,
1663 show_fan_min, store_fan_min, 2);
1664static SENSOR_DEVICE_ATTR(fan4_min, S_IWUSR | S_IRUGO,
1665 show_fan_min, store_fan_min, 3);
1666
1667/* some tedious bit-twiddling here to deal with the register format:
1668
1669 data->sf_tach_to_pwm: (tach to pwm mapping bits)
1670
1671 bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
1672 T4:P2 T4:P1 T3:P2 T3:P1 T2:P2 T2:P1 T1:P2 T1:P1
1673
1674 data->sfc2: (enable bits)
1675
1676 bit | 3 | 2 | 1 | 0
1677 T4 T3 T2 T1
1678*/
1679
1680static ssize_t show_fan_smart_tach(struct device *dev,
1681 struct device_attribute *attr, char *buf)
1682{
1683 int nr = (to_sensor_dev_attr(attr))->index;
1684 struct lm93_data *data = lm93_update_device(dev);
1685 long rc = 0;
1686 int mapping;
1687
1688 /* extract the relevant mapping */
1689 mapping = (data->sf_tach_to_pwm >> (nr * 2)) & 0x03;
1690
1691 /* if there's a mapping and it's enabled */
1692 if (mapping && ((data->sfc2 >> nr) & 0x01))
1693 rc = mapping;
1694 return sprintf(buf,"%ld\n",rc);
1695}
1696
1697/* helper function - must grab data->update_lock before calling
1698 fan is 0-3, indicating fan1-fan4 */
1699static void lm93_write_fan_smart_tach(struct i2c_client *client,
1700 struct lm93_data *data, int fan, long value)
1701{
1702 /* insert the new mapping and write it out */
1703 data->sf_tach_to_pwm = lm93_read_byte(client, LM93_REG_SF_TACH_TO_PWM);
1704 data->sf_tach_to_pwm &= ~(0x3 << fan * 2);
1705 data->sf_tach_to_pwm |= value << fan * 2;
1706 lm93_write_byte(client, LM93_REG_SF_TACH_TO_PWM, data->sf_tach_to_pwm);
1707
1708 /* insert the enable bit and write it out */
1709 data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
1710 if (value)
1711 data->sfc2 |= 1 << fan;
1712 else
1713 data->sfc2 &= ~(1 << fan);
1714 lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
1715}
1716
1717static ssize_t store_fan_smart_tach(struct device *dev,
1718 struct device_attribute *attr,
1719 const char *buf, size_t count)
1720{
1721 int nr = (to_sensor_dev_attr(attr))->index;
1722 struct i2c_client *client = to_i2c_client(dev);
1723 struct lm93_data *data = i2c_get_clientdata(client);
1724 u32 val = simple_strtoul(buf, NULL, 10);
1725
1726 mutex_lock(&data->update_lock);
1727 /* sanity test, ignore the write otherwise */
1728 if (0 <= val && val <= 2) {
1729 /* can't enable if pwm freq is 22.5KHz */
1730 if (val) {
1731 u8 ctl4 = lm93_read_byte(client,
1732 LM93_REG_PWM_CTL(val-1,LM93_PWM_CTL4));
1733 if ((ctl4 & 0x07) == 0)
1734 val = 0;
1735 }
1736 lm93_write_fan_smart_tach(client, data, nr, val);
1737 }
1738 mutex_unlock(&data->update_lock);
1739 return count;
1740}
1741
1742static SENSOR_DEVICE_ATTR(fan1_smart_tach, S_IWUSR | S_IRUGO,
1743 show_fan_smart_tach, store_fan_smart_tach, 0);
1744static SENSOR_DEVICE_ATTR(fan2_smart_tach, S_IWUSR | S_IRUGO,
1745 show_fan_smart_tach, store_fan_smart_tach, 1);
1746static SENSOR_DEVICE_ATTR(fan3_smart_tach, S_IWUSR | S_IRUGO,
1747 show_fan_smart_tach, store_fan_smart_tach, 2);
1748static SENSOR_DEVICE_ATTR(fan4_smart_tach, S_IWUSR | S_IRUGO,
1749 show_fan_smart_tach, store_fan_smart_tach, 3);
1750
1751static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1752 char *buf)
1753{
1754 int nr = (to_sensor_dev_attr(attr))->index;
1755 struct lm93_data *data = lm93_update_device(dev);
1756 u8 ctl2, ctl4;
1757 long rc;
1758
1759 ctl2 = data->block9[nr][LM93_PWM_CTL2];
1760 ctl4 = data->block9[nr][LM93_PWM_CTL4];
1761 if (ctl2 & 0x01) /* show user commanded value if enabled */
1762 rc = data->pwm_override[nr];
1763 else /* show present h/w value if manual pwm disabled */
1764 rc = LM93_PWM_FROM_REG(ctl2 >> 4, (ctl4 & 0x07) ?
1765 LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ);
1766 return sprintf(buf,"%ld\n",rc);
1767}
1768
1769static ssize_t store_pwm(struct device *dev, struct device_attribute *attr,
1770 const char *buf, size_t count)
1771{
1772 int nr = (to_sensor_dev_attr(attr))->index;
1773 struct i2c_client *client = to_i2c_client(dev);
1774 struct lm93_data *data = i2c_get_clientdata(client);
1775 u32 val = simple_strtoul(buf, NULL, 10);
1776 u8 ctl2, ctl4;
1777
1778 mutex_lock(&data->update_lock);
1779 ctl2 = lm93_read_byte(client,LM93_REG_PWM_CTL(nr,LM93_PWM_CTL2));
1780 ctl4 = lm93_read_byte(client, LM93_REG_PWM_CTL(nr,LM93_PWM_CTL4));
1781 ctl2 = (ctl2 & 0x0f) | LM93_PWM_TO_REG(val,(ctl4 & 0x07) ?
1782 LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ) << 4;
1783 /* save user commanded value */
1784 data->pwm_override[nr] = LM93_PWM_FROM_REG(ctl2 >> 4,
1785 (ctl4 & 0x07) ? LM93_PWM_MAP_LO_FREQ :
1786 LM93_PWM_MAP_HI_FREQ);
1787 lm93_write_byte(client,LM93_REG_PWM_CTL(nr,LM93_PWM_CTL2),ctl2);
1788 mutex_unlock(&data->update_lock);
1789 return count;
1790}
1791
1792static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0);
1793static SENSOR_DEVICE_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1);
1794
1795static ssize_t show_pwm_enable(struct device *dev,
1796 struct device_attribute *attr, char *buf)
1797{
1798 int nr = (to_sensor_dev_attr(attr))->index;
1799 struct lm93_data *data = lm93_update_device(dev);
1800 u8 ctl2;
1801 long rc;
1802
1803 ctl2 = data->block9[nr][LM93_PWM_CTL2];
1804 if (ctl2 & 0x01) /* manual override enabled ? */
1805 rc = ((ctl2 & 0xF0) == 0xF0) ? 0 : 1;
1806 else
1807 rc = 2;
1808 return sprintf(buf,"%ld\n",rc);
1809}
1810
1811static ssize_t store_pwm_enable(struct device *dev,
1812 struct device_attribute *attr,
1813 const char *buf, size_t count)
1814{
1815 int nr = (to_sensor_dev_attr(attr))->index;
1816 struct i2c_client *client = to_i2c_client(dev);
1817 struct lm93_data *data = i2c_get_clientdata(client);
1818 u32 val = simple_strtoul(buf, NULL, 10);
1819 u8 ctl2;
1820
1821 mutex_lock(&data->update_lock);
1822 ctl2 = lm93_read_byte(client,LM93_REG_PWM_CTL(nr,LM93_PWM_CTL2));
1823
1824 switch (val) {
1825 case 0:
1826 ctl2 |= 0xF1; /* enable manual override, set PWM to max */
1827 break;
1828 case 1: ctl2 |= 0x01; /* enable manual override */
1829 break;
1830 case 2: ctl2 &= ~0x01; /* disable manual override */
1831 break;
1832 default:
1833 mutex_unlock(&data->update_lock);
1834 return -EINVAL;
1835 }
1836
1837 lm93_write_byte(client,LM93_REG_PWM_CTL(nr,LM93_PWM_CTL2),ctl2);
1838 mutex_unlock(&data->update_lock);
1839 return count;
1840}
1841
1842static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
1843 show_pwm_enable, store_pwm_enable, 0);
1844static SENSOR_DEVICE_ATTR(pwm2_enable, S_IWUSR | S_IRUGO,
1845 show_pwm_enable, store_pwm_enable, 1);
1846
1847static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1848 char *buf)
1849{
1850 int nr = (to_sensor_dev_attr(attr))->index;
1851 struct lm93_data *data = lm93_update_device(dev);
1852 u8 ctl4;
1853
1854 ctl4 = data->block9[nr][LM93_PWM_CTL4];
1855 return sprintf(buf,"%d\n",LM93_PWM_FREQ_FROM_REG(ctl4));
1856}
1857
1858/* helper function - must grab data->update_lock before calling
1859 pwm is 0-1, indicating pwm1-pwm2
1860 this disables smart tach for all tach channels bound to the given pwm */
1861static void lm93_disable_fan_smart_tach(struct i2c_client *client,
1862 struct lm93_data *data, int pwm)
1863{
1864 int mapping = lm93_read_byte(client, LM93_REG_SF_TACH_TO_PWM);
1865 int mask;
1866
1867 /* collapse the mapping into a mask of enable bits */
1868 mapping = (mapping >> pwm) & 0x55;
1869 mask = mapping & 0x01;
1870 mask |= (mapping & 0x04) >> 1;
1871 mask |= (mapping & 0x10) >> 2;
1872 mask |= (mapping & 0x40) >> 3;
1873
1874 /* disable smart tach according to the mask */
1875 data->sfc2 = lm93_read_byte(client, LM93_REG_SFC2);
1876 data->sfc2 &= ~mask;
1877 lm93_write_byte(client, LM93_REG_SFC2, data->sfc2);
1878}
1879
1880static ssize_t store_pwm_freq(struct device *dev,
1881 struct device_attribute *attr,
1882 const char *buf, size_t count)
1883{
1884 int nr = (to_sensor_dev_attr(attr))->index;
1885 struct i2c_client *client = to_i2c_client(dev);
1886 struct lm93_data *data = i2c_get_clientdata(client);
1887 u32 val = simple_strtoul(buf, NULL, 10);
1888 u8 ctl4;
1889
1890 mutex_lock(&data->update_lock);
1891 ctl4 = lm93_read_byte(client,LM93_REG_PWM_CTL(nr,LM93_PWM_CTL4));
1892 ctl4 = (ctl4 & 0xf8) | LM93_PWM_FREQ_TO_REG(val);
1893 data->block9[nr][LM93_PWM_CTL4] = ctl4;
1894 /* ctl4 == 0 -> 22.5KHz -> disable smart tach */
1895 if (!ctl4)
1896 lm93_disable_fan_smart_tach(client, data, nr);
1897 lm93_write_byte(client, LM93_REG_PWM_CTL(nr,LM93_PWM_CTL4), ctl4);
1898 mutex_unlock(&data->update_lock);
1899 return count;
1900}
1901
1902static SENSOR_DEVICE_ATTR(pwm1_freq, S_IWUSR | S_IRUGO,
1903 show_pwm_freq, store_pwm_freq, 0);
1904static SENSOR_DEVICE_ATTR(pwm2_freq, S_IWUSR | S_IRUGO,
1905 show_pwm_freq, store_pwm_freq, 1);
1906
1907static ssize_t show_pwm_auto_channels(struct device *dev,
1908 struct device_attribute *attr, char *buf)
1909{
1910 int nr = (to_sensor_dev_attr(attr))->index;
1911 struct lm93_data *data = lm93_update_device(dev);
1912 return sprintf(buf,"%d\n",data->block9[nr][LM93_PWM_CTL1]);
1913}
1914
1915static ssize_t store_pwm_auto_channels(struct device *dev,
1916 struct device_attribute *attr,
1917 const char *buf, size_t count)
1918{
1919 int nr = (to_sensor_dev_attr(attr))->index;
1920 struct i2c_client *client = to_i2c_client(dev);
1921 struct lm93_data *data = i2c_get_clientdata(client);
1922 u32 val = simple_strtoul(buf, NULL, 10);
1923
1924 mutex_lock(&data->update_lock);
1925 data->block9[nr][LM93_PWM_CTL1] = SENSORS_LIMIT(val, 0, 255);
1926 lm93_write_byte(client, LM93_REG_PWM_CTL(nr,LM93_PWM_CTL1),
1927 data->block9[nr][LM93_PWM_CTL1]);
1928 mutex_unlock(&data->update_lock);
1929 return count;
1930}
1931
1932static SENSOR_DEVICE_ATTR(pwm1_auto_channels, S_IWUSR | S_IRUGO,
1933 show_pwm_auto_channels, store_pwm_auto_channels, 0);
1934static SENSOR_DEVICE_ATTR(pwm2_auto_channels, S_IWUSR | S_IRUGO,
1935 show_pwm_auto_channels, store_pwm_auto_channels, 1);
1936
1937static ssize_t show_pwm_auto_spinup_min(struct device *dev,
1938 struct device_attribute *attr,char *buf)
1939{
1940 int nr = (to_sensor_dev_attr(attr))->index;
1941 struct lm93_data *data = lm93_update_device(dev);
1942 u8 ctl3, ctl4;
1943
1944 ctl3 = data->block9[nr][LM93_PWM_CTL3];
1945 ctl4 = data->block9[nr][LM93_PWM_CTL4];
1946 return sprintf(buf,"%d\n",
1947 LM93_PWM_FROM_REG(ctl3 & 0x0f, (ctl4 & 0x07) ?
1948 LM93_PWM_MAP_LO_FREQ : LM93_PWM_MAP_HI_FREQ));
1949}
1950
1951static ssize_t store_pwm_auto_spinup_min(struct device *dev,
1952 struct device_attribute *attr,
1953 const char *buf, size_t count)
1954{
1955 int nr = (to_sensor_dev_attr(attr))->index;
1956 struct i2c_client *client = to_i2c_client(dev);
1957 struct lm93_data *data = i2c_get_clientdata(client);
1958 u32 val = simple_strtoul(buf, NULL, 10);
1959 u8 ctl3, ctl4;
1960
1961 mutex_lock(&data->update_lock);
1962 ctl3 = lm93_read_byte(client,LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3));
1963 ctl4 = lm93_read_byte(client,LM93_REG_PWM_CTL(nr, LM93_PWM_CTL4));
1964 ctl3 = (ctl3 & 0xf0) | LM93_PWM_TO_REG(val, (ctl4 & 0x07) ?
1965 LM93_PWM_MAP_LO_FREQ :
1966 LM93_PWM_MAP_HI_FREQ);
1967 data->block9[nr][LM93_PWM_CTL3] = ctl3;
1968 lm93_write_byte(client,LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3), ctl3);
1969 mutex_unlock(&data->update_lock);
1970 return count;
1971}
1972
1973static SENSOR_DEVICE_ATTR(pwm1_auto_spinup_min, S_IWUSR | S_IRUGO,
1974 show_pwm_auto_spinup_min,
1975 store_pwm_auto_spinup_min, 0);
1976static SENSOR_DEVICE_ATTR(pwm2_auto_spinup_min, S_IWUSR | S_IRUGO,
1977 show_pwm_auto_spinup_min,
1978 store_pwm_auto_spinup_min, 1);
1979
1980static ssize_t show_pwm_auto_spinup_time(struct device *dev,
1981 struct device_attribute *attr, char *buf)
1982{
1983 int nr = (to_sensor_dev_attr(attr))->index;
1984 struct lm93_data *data = lm93_update_device(dev);
1985 return sprintf(buf,"%d\n",LM93_SPINUP_TIME_FROM_REG(
1986 data->block9[nr][LM93_PWM_CTL3]));
1987}
1988
1989static ssize_t store_pwm_auto_spinup_time(struct device *dev,
1990 struct device_attribute *attr,
1991 const char *buf, size_t count)
1992{
1993 int nr = (to_sensor_dev_attr(attr))->index;
1994 struct i2c_client *client = to_i2c_client(dev);
1995 struct lm93_data *data = i2c_get_clientdata(client);
1996 u32 val = simple_strtoul(buf, NULL, 10);
1997 u8 ctl3;
1998
1999 mutex_lock(&data->update_lock);
2000 ctl3 = lm93_read_byte(client,LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3));
2001 ctl3 = (ctl3 & 0x1f) | (LM93_SPINUP_TIME_TO_REG(val) << 5 & 0xe0);
2002 data->block9[nr][LM93_PWM_CTL3] = ctl3;
2003 lm93_write_byte(client,LM93_REG_PWM_CTL(nr, LM93_PWM_CTL3), ctl3);
2004 mutex_unlock(&data->update_lock);
2005 return count;
2006}
2007
2008static SENSOR_DEVICE_ATTR(pwm1_auto_spinup_time, S_IWUSR | S_IRUGO,
2009 show_pwm_auto_spinup_time,
2010 store_pwm_auto_spinup_time, 0);
2011static SENSOR_DEVICE_ATTR(pwm2_auto_spinup_time, S_IWUSR | S_IRUGO,
2012 show_pwm_auto_spinup_time,
2013 store_pwm_auto_spinup_time, 1);
2014
2015static ssize_t show_pwm_auto_prochot_ramp(struct device *dev,
2016 struct device_attribute *attr, char *buf)
2017{
2018 struct lm93_data *data = lm93_update_device(dev);
2019 return sprintf(buf,"%d\n",
2020 LM93_RAMP_FROM_REG(data->pwm_ramp_ctl >> 4 & 0x0f));
2021}
2022
2023static ssize_t store_pwm_auto_prochot_ramp(struct device *dev,
2024 struct device_attribute *attr,
2025 const char *buf, size_t count)
2026{
2027 struct i2c_client *client = to_i2c_client(dev);
2028 struct lm93_data *data = i2c_get_clientdata(client);
2029 u32 val = simple_strtoul(buf, NULL, 10);
2030 u8 ramp;
2031
2032 mutex_lock(&data->update_lock);
2033 ramp = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
2034 ramp = (ramp & 0x0f) | (LM93_RAMP_TO_REG(val) << 4 & 0xf0);
2035 lm93_write_byte(client, LM93_REG_PWM_RAMP_CTL, ramp);
2036 mutex_unlock(&data->update_lock);
2037 return count;
2038}
2039
2040static DEVICE_ATTR(pwm_auto_prochot_ramp, S_IRUGO | S_IWUSR,
2041 show_pwm_auto_prochot_ramp,
2042 store_pwm_auto_prochot_ramp);
2043
2044static ssize_t show_pwm_auto_vrdhot_ramp(struct device *dev,
2045 struct device_attribute *attr, char *buf)
2046{
2047 struct lm93_data *data = lm93_update_device(dev);
2048 return sprintf(buf,"%d\n",
2049 LM93_RAMP_FROM_REG(data->pwm_ramp_ctl & 0x0f));
2050}
2051
2052static ssize_t store_pwm_auto_vrdhot_ramp(struct device *dev,
2053 struct device_attribute *attr,
2054 const char *buf, size_t count)
2055{
2056 struct i2c_client *client = to_i2c_client(dev);
2057 struct lm93_data *data = i2c_get_clientdata(client);
2058 u32 val = simple_strtoul(buf, NULL, 10);
2059 u8 ramp;
2060
2061 mutex_lock(&data->update_lock);
2062 ramp = lm93_read_byte(client, LM93_REG_PWM_RAMP_CTL);
2063 ramp = (ramp & 0xf0) | (LM93_RAMP_TO_REG(val) & 0x0f);
2064 lm93_write_byte(client, LM93_REG_PWM_RAMP_CTL, ramp);
2065 mutex_unlock(&data->update_lock);
2066 return 0;
2067}
2068
2069static DEVICE_ATTR(pwm_auto_vrdhot_ramp, S_IRUGO | S_IWUSR,
2070 show_pwm_auto_vrdhot_ramp,
2071 store_pwm_auto_vrdhot_ramp);
2072
2073static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
2074 char *buf)
2075{
2076 int nr = (to_sensor_dev_attr(attr))->index;
2077 struct lm93_data *data = lm93_update_device(dev);
2078 return sprintf(buf,"%d\n",LM93_VID_FROM_REG(data->vid[nr]));
2079}
2080
2081static SENSOR_DEVICE_ATTR(vid1, S_IRUGO, show_vid, NULL, 0);
2082static SENSOR_DEVICE_ATTR(vid2, S_IRUGO, show_vid, NULL, 1);
2083
2084static ssize_t show_prochot(struct device *dev, struct device_attribute *attr,
2085 char *buf)
2086{
2087 int nr = (to_sensor_dev_attr(attr))->index;
2088 struct lm93_data *data = lm93_update_device(dev);
2089 return sprintf(buf,"%d\n",data->block4[nr].cur);
2090}
2091
2092static SENSOR_DEVICE_ATTR(prochot1, S_IRUGO, show_prochot, NULL, 0);
2093static SENSOR_DEVICE_ATTR(prochot2, S_IRUGO, show_prochot, NULL, 1);
2094
2095static ssize_t show_prochot_avg(struct device *dev,
2096 struct device_attribute *attr, char *buf)
2097{
2098 int nr = (to_sensor_dev_attr(attr))->index;
2099 struct lm93_data *data = lm93_update_device(dev);
2100 return sprintf(buf,"%d\n",data->block4[nr].avg);
2101}
2102
2103static SENSOR_DEVICE_ATTR(prochot1_avg, S_IRUGO, show_prochot_avg, NULL, 0);
2104static SENSOR_DEVICE_ATTR(prochot2_avg, S_IRUGO, show_prochot_avg, NULL, 1);
2105
2106static ssize_t show_prochot_max(struct device *dev,
2107 struct device_attribute *attr, char *buf)
2108{
2109 int nr = (to_sensor_dev_attr(attr))->index;
2110 struct lm93_data *data = lm93_update_device(dev);
2111 return sprintf(buf,"%d\n",data->prochot_max[nr]);
2112}
2113
2114static ssize_t store_prochot_max(struct device *dev,
2115 struct device_attribute *attr,
2116 const char *buf, size_t count)
2117{
2118 int nr = (to_sensor_dev_attr(attr))->index;
2119 struct i2c_client *client = to_i2c_client(dev);
2120 struct lm93_data *data = i2c_get_clientdata(client);
2121 u32 val = simple_strtoul(buf, NULL, 10);
2122
2123 mutex_lock(&data->update_lock);
2124 data->prochot_max[nr] = LM93_PROCHOT_TO_REG(val);
2125 lm93_write_byte(client, LM93_REG_PROCHOT_MAX(nr),
2126 data->prochot_max[nr]);
2127 mutex_unlock(&data->update_lock);
2128 return count;
2129}
2130
2131static SENSOR_DEVICE_ATTR(prochot1_max, S_IWUSR | S_IRUGO,
2132 show_prochot_max, store_prochot_max, 0);
2133static SENSOR_DEVICE_ATTR(prochot2_max, S_IWUSR | S_IRUGO,
2134 show_prochot_max, store_prochot_max, 1);
2135
2136static const u8 prochot_override_mask[] = { 0x80, 0x40 };
2137
2138static ssize_t show_prochot_override(struct device *dev,
2139 struct device_attribute *attr, char *buf)
2140{
2141 int nr = (to_sensor_dev_attr(attr))->index;
2142 struct lm93_data *data = lm93_update_device(dev);
2143 return sprintf(buf,"%d\n",
2144 (data->prochot_override & prochot_override_mask[nr]) ? 1 : 0);
2145}
2146
2147static ssize_t store_prochot_override(struct device *dev,
2148 struct device_attribute *attr,
2149 const char *buf, size_t count)
2150{
2151 int nr = (to_sensor_dev_attr(attr))->index;
2152 struct i2c_client *client = to_i2c_client(dev);
2153 struct lm93_data *data = i2c_get_clientdata(client);
2154 u32 val = simple_strtoul(buf, NULL, 10);
2155
2156 mutex_lock(&data->update_lock);
2157 if (val)
2158 data->prochot_override |= prochot_override_mask[nr];
2159 else
2160 data->prochot_override &= (~prochot_override_mask[nr]);
2161 lm93_write_byte(client, LM93_REG_PROCHOT_OVERRIDE,
2162 data->prochot_override);
2163 mutex_unlock(&data->update_lock);
2164 return count;
2165}
2166
2167static SENSOR_DEVICE_ATTR(prochot1_override, S_IWUSR | S_IRUGO,
2168 show_prochot_override, store_prochot_override, 0);
2169static SENSOR_DEVICE_ATTR(prochot2_override, S_IWUSR | S_IRUGO,
2170 show_prochot_override, store_prochot_override, 1);
2171
2172static ssize_t show_prochot_interval(struct device *dev,
2173 struct device_attribute *attr, char *buf)
2174{
2175 int nr = (to_sensor_dev_attr(attr))->index;
2176 struct lm93_data *data = lm93_update_device(dev);
2177 u8 tmp;
2178 if (nr==1)
2179 tmp = (data->prochot_interval & 0xf0) >> 4;
2180 else
2181 tmp = data->prochot_interval & 0x0f;
2182 return sprintf(buf,"%d\n",LM93_INTERVAL_FROM_REG(tmp));
2183}
2184
2185static ssize_t store_prochot_interval(struct device *dev,
2186 struct device_attribute *attr,
2187 const char *buf, size_t count)
2188{
2189 int nr = (to_sensor_dev_attr(attr))->index;
2190 struct i2c_client *client = to_i2c_client(dev);
2191 struct lm93_data *data = i2c_get_clientdata(client);
2192 u32 val = simple_strtoul(buf, NULL, 10);
2193 u8 tmp;
2194
2195 mutex_lock(&data->update_lock);
2196 tmp = lm93_read_byte(client, LM93_REG_PROCHOT_INTERVAL);
2197 if (nr==1)
2198 tmp = (tmp & 0x0f) | (LM93_INTERVAL_TO_REG(val) << 4);
2199 else
2200 tmp = (tmp & 0xf0) | LM93_INTERVAL_TO_REG(val);
2201 data->prochot_interval = tmp;
2202 lm93_write_byte(client, LM93_REG_PROCHOT_INTERVAL, tmp);
2203 mutex_unlock(&data->update_lock);
2204 return count;
2205}
2206
2207static SENSOR_DEVICE_ATTR(prochot1_interval, S_IWUSR | S_IRUGO,
2208 show_prochot_interval, store_prochot_interval, 0);
2209static SENSOR_DEVICE_ATTR(prochot2_interval, S_IWUSR | S_IRUGO,
2210 show_prochot_interval, store_prochot_interval, 1);
2211
2212static ssize_t show_prochot_override_duty_cycle(struct device *dev,
2213 struct device_attribute *attr,
2214 char *buf)
2215{
2216 struct lm93_data *data = lm93_update_device(dev);
2217 return sprintf(buf,"%d\n",data->prochot_override & 0x0f);
2218}
2219
2220static ssize_t store_prochot_override_duty_cycle(struct device *dev,
2221 struct device_attribute *attr,
2222 const char *buf, size_t count)
2223{
2224 struct i2c_client *client = to_i2c_client(dev);
2225 struct lm93_data *data = i2c_get_clientdata(client);
2226 u32 val = simple_strtoul(buf, NULL, 10);
2227
2228 mutex_lock(&data->update_lock);
2229 data->prochot_override = (data->prochot_override & 0xf0) |
2230 SENSORS_LIMIT(val, 0, 15);
2231 lm93_write_byte(client, LM93_REG_PROCHOT_OVERRIDE,
2232 data->prochot_override);
2233 mutex_unlock(&data->update_lock);
2234 return count;
2235}
2236
2237static DEVICE_ATTR(prochot_override_duty_cycle, S_IRUGO | S_IWUSR,
2238 show_prochot_override_duty_cycle,
2239 store_prochot_override_duty_cycle);
2240
2241static ssize_t show_prochot_short(struct device *dev,
2242 struct device_attribute *attr, char *buf)
2243{
2244 struct lm93_data *data = lm93_update_device(dev);
2245 return sprintf(buf,"%d\n",(data->config & 0x10) ? 1 : 0);
2246}
2247
2248static ssize_t store_prochot_short(struct device *dev,
2249 struct device_attribute *attr,
2250 const char *buf, size_t count)
2251{
2252 struct i2c_client *client = to_i2c_client(dev);
2253 struct lm93_data *data = i2c_get_clientdata(client);
2254 u32 val = simple_strtoul(buf, NULL, 10);
2255
2256 mutex_lock(&data->update_lock);
2257 if (val)
2258 data->config |= 0x10;
2259 else
2260 data->config &= ~0x10;
2261 lm93_write_byte(client, LM93_REG_CONFIG, data->config);
2262 mutex_unlock(&data->update_lock);
2263 return count;
2264}
2265
2266static DEVICE_ATTR(prochot_short, S_IRUGO | S_IWUSR,
2267 show_prochot_short, store_prochot_short);
2268
2269static ssize_t show_vrdhot(struct device *dev, struct device_attribute *attr,
2270 char *buf)
2271{
2272 int nr = (to_sensor_dev_attr(attr))->index;
2273 struct lm93_data *data = lm93_update_device(dev);
2274 return sprintf(buf,"%d\n",
2275 data->block1.host_status_1 & (1 << (nr+4)) ? 1 : 0);
2276}
2277
2278static SENSOR_DEVICE_ATTR(vrdhot1, S_IRUGO, show_vrdhot, NULL, 0);
2279static SENSOR_DEVICE_ATTR(vrdhot2, S_IRUGO, show_vrdhot, NULL, 1);
2280
2281static ssize_t show_gpio(struct device *dev, struct device_attribute *attr,
2282 char *buf)
2283{
2284 struct lm93_data *data = lm93_update_device(dev);
2285 return sprintf(buf,"%d\n",LM93_GPI_FROM_REG(data->gpi));
2286}
2287
2288static DEVICE_ATTR(gpio, S_IRUGO, show_gpio, NULL);
2289
2290static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
2291 char *buf)
2292{
2293 struct lm93_data *data = lm93_update_device(dev);
2294 return sprintf(buf,"%d\n",LM93_ALARMS_FROM_REG(data->block1));
2295}
2296
2297static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
2298
2299static struct attribute *lm93_attrs[] = {
2300 &sensor_dev_attr_in1_input.dev_attr.attr,
2301 &sensor_dev_attr_in2_input.dev_attr.attr,
2302 &sensor_dev_attr_in3_input.dev_attr.attr,
2303 &sensor_dev_attr_in4_input.dev_attr.attr,
2304 &sensor_dev_attr_in5_input.dev_attr.attr,
2305 &sensor_dev_attr_in6_input.dev_attr.attr,
2306 &sensor_dev_attr_in7_input.dev_attr.attr,
2307 &sensor_dev_attr_in8_input.dev_attr.attr,
2308 &sensor_dev_attr_in9_input.dev_attr.attr,
2309 &sensor_dev_attr_in10_input.dev_attr.attr,
2310 &sensor_dev_attr_in11_input.dev_attr.attr,
2311 &sensor_dev_attr_in12_input.dev_attr.attr,
2312 &sensor_dev_attr_in13_input.dev_attr.attr,
2313 &sensor_dev_attr_in14_input.dev_attr.attr,
2314 &sensor_dev_attr_in15_input.dev_attr.attr,
2315 &sensor_dev_attr_in16_input.dev_attr.attr,
2316 &sensor_dev_attr_in1_min.dev_attr.attr,
2317 &sensor_dev_attr_in2_min.dev_attr.attr,
2318 &sensor_dev_attr_in3_min.dev_attr.attr,
2319 &sensor_dev_attr_in4_min.dev_attr.attr,
2320 &sensor_dev_attr_in5_min.dev_attr.attr,
2321 &sensor_dev_attr_in6_min.dev_attr.attr,
2322 &sensor_dev_attr_in7_min.dev_attr.attr,
2323 &sensor_dev_attr_in8_min.dev_attr.attr,
2324 &sensor_dev_attr_in9_min.dev_attr.attr,
2325 &sensor_dev_attr_in10_min.dev_attr.attr,
2326 &sensor_dev_attr_in11_min.dev_attr.attr,
2327 &sensor_dev_attr_in12_min.dev_attr.attr,
2328 &sensor_dev_attr_in13_min.dev_attr.attr,
2329 &sensor_dev_attr_in14_min.dev_attr.attr,
2330 &sensor_dev_attr_in15_min.dev_attr.attr,
2331 &sensor_dev_attr_in16_min.dev_attr.attr,
2332 &sensor_dev_attr_in1_max.dev_attr.attr,
2333 &sensor_dev_attr_in2_max.dev_attr.attr,
2334 &sensor_dev_attr_in3_max.dev_attr.attr,
2335 &sensor_dev_attr_in4_max.dev_attr.attr,
2336 &sensor_dev_attr_in5_max.dev_attr.attr,
2337 &sensor_dev_attr_in6_max.dev_attr.attr,
2338 &sensor_dev_attr_in7_max.dev_attr.attr,
2339 &sensor_dev_attr_in8_max.dev_attr.attr,
2340 &sensor_dev_attr_in9_max.dev_attr.attr,
2341 &sensor_dev_attr_in10_max.dev_attr.attr,
2342 &sensor_dev_attr_in11_max.dev_attr.attr,
2343 &sensor_dev_attr_in12_max.dev_attr.attr,
2344 &sensor_dev_attr_in13_max.dev_attr.attr,
2345 &sensor_dev_attr_in14_max.dev_attr.attr,
2346 &sensor_dev_attr_in15_max.dev_attr.attr,
2347 &sensor_dev_attr_in16_max.dev_attr.attr,
2348 &sensor_dev_attr_temp1_input.dev_attr.attr,
2349 &sensor_dev_attr_temp2_input.dev_attr.attr,
2350 &sensor_dev_attr_temp3_input.dev_attr.attr,
2351 &sensor_dev_attr_temp1_min.dev_attr.attr,
2352 &sensor_dev_attr_temp2_min.dev_attr.attr,
2353 &sensor_dev_attr_temp3_min.dev_attr.attr,
2354 &sensor_dev_attr_temp1_max.dev_attr.attr,
2355 &sensor_dev_attr_temp2_max.dev_attr.attr,
2356 &sensor_dev_attr_temp3_max.dev_attr.attr,
2357 &sensor_dev_attr_temp1_auto_base.dev_attr.attr,
2358 &sensor_dev_attr_temp2_auto_base.dev_attr.attr,
2359 &sensor_dev_attr_temp3_auto_base.dev_attr.attr,
2360 &sensor_dev_attr_temp1_auto_boost.dev_attr.attr,
2361 &sensor_dev_attr_temp2_auto_boost.dev_attr.attr,
2362 &sensor_dev_attr_temp3_auto_boost.dev_attr.attr,
2363 &sensor_dev_attr_temp1_auto_boost_hyst.dev_attr.attr,
2364 &sensor_dev_attr_temp2_auto_boost_hyst.dev_attr.attr,
2365 &sensor_dev_attr_temp3_auto_boost_hyst.dev_attr.attr,
2366 &sensor_dev_attr_temp1_auto_offset1.dev_attr.attr,
2367 &sensor_dev_attr_temp1_auto_offset2.dev_attr.attr,
2368 &sensor_dev_attr_temp1_auto_offset3.dev_attr.attr,
2369 &sensor_dev_attr_temp1_auto_offset4.dev_attr.attr,
2370 &sensor_dev_attr_temp1_auto_offset5.dev_attr.attr,
2371 &sensor_dev_attr_temp1_auto_offset6.dev_attr.attr,
2372 &sensor_dev_attr_temp1_auto_offset7.dev_attr.attr,
2373 &sensor_dev_attr_temp1_auto_offset8.dev_attr.attr,
2374 &sensor_dev_attr_temp1_auto_offset9.dev_attr.attr,
2375 &sensor_dev_attr_temp1_auto_offset10.dev_attr.attr,
2376 &sensor_dev_attr_temp1_auto_offset11.dev_attr.attr,
2377 &sensor_dev_attr_temp1_auto_offset12.dev_attr.attr,
2378 &sensor_dev_attr_temp2_auto_offset1.dev_attr.attr,
2379 &sensor_dev_attr_temp2_auto_offset2.dev_attr.attr,
2380 &sensor_dev_attr_temp2_auto_offset3.dev_attr.attr,
2381 &sensor_dev_attr_temp2_auto_offset4.dev_attr.attr,
2382 &sensor_dev_attr_temp2_auto_offset5.dev_attr.attr,
2383 &sensor_dev_attr_temp2_auto_offset6.dev_attr.attr,
2384 &sensor_dev_attr_temp2_auto_offset7.dev_attr.attr,
2385 &sensor_dev_attr_temp2_auto_offset8.dev_attr.attr,
2386 &sensor_dev_attr_temp2_auto_offset9.dev_attr.attr,
2387 &sensor_dev_attr_temp2_auto_offset10.dev_attr.attr,
2388 &sensor_dev_attr_temp2_auto_offset11.dev_attr.attr,
2389 &sensor_dev_attr_temp2_auto_offset12.dev_attr.attr,
2390 &sensor_dev_attr_temp3_auto_offset1.dev_attr.attr,
2391 &sensor_dev_attr_temp3_auto_offset2.dev_attr.attr,
2392 &sensor_dev_attr_temp3_auto_offset3.dev_attr.attr,
2393 &sensor_dev_attr_temp3_auto_offset4.dev_attr.attr,
2394 &sensor_dev_attr_temp3_auto_offset5.dev_attr.attr,
2395 &sensor_dev_attr_temp3_auto_offset6.dev_attr.attr,
2396 &sensor_dev_attr_temp3_auto_offset7.dev_attr.attr,
2397 &sensor_dev_attr_temp3_auto_offset8.dev_attr.attr,
2398 &sensor_dev_attr_temp3_auto_offset9.dev_attr.attr,
2399 &sensor_dev_attr_temp3_auto_offset10.dev_attr.attr,
2400 &sensor_dev_attr_temp3_auto_offset11.dev_attr.attr,
2401 &sensor_dev_attr_temp3_auto_offset12.dev_attr.attr,
2402 &sensor_dev_attr_temp1_auto_pwm_min.dev_attr.attr,
2403 &sensor_dev_attr_temp2_auto_pwm_min.dev_attr.attr,
2404 &sensor_dev_attr_temp3_auto_pwm_min.dev_attr.attr,
2405 &sensor_dev_attr_temp1_auto_offset_hyst.dev_attr.attr,
2406 &sensor_dev_attr_temp2_auto_offset_hyst.dev_attr.attr,
2407 &sensor_dev_attr_temp3_auto_offset_hyst.dev_attr.attr,
2408 &sensor_dev_attr_fan1_input.dev_attr.attr,
2409 &sensor_dev_attr_fan2_input.dev_attr.attr,
2410 &sensor_dev_attr_fan3_input.dev_attr.attr,
2411 &sensor_dev_attr_fan4_input.dev_attr.attr,
2412 &sensor_dev_attr_fan1_min.dev_attr.attr,
2413 &sensor_dev_attr_fan2_min.dev_attr.attr,
2414 &sensor_dev_attr_fan3_min.dev_attr.attr,
2415 &sensor_dev_attr_fan4_min.dev_attr.attr,
2416 &sensor_dev_attr_fan1_smart_tach.dev_attr.attr,
2417 &sensor_dev_attr_fan2_smart_tach.dev_attr.attr,
2418 &sensor_dev_attr_fan3_smart_tach.dev_attr.attr,
2419 &sensor_dev_attr_fan4_smart_tach.dev_attr.attr,
2420 &sensor_dev_attr_pwm1.dev_attr.attr,
2421 &sensor_dev_attr_pwm2.dev_attr.attr,
2422 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2423 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2424 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2425 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2426 &sensor_dev_attr_pwm1_auto_channels.dev_attr.attr,
2427 &sensor_dev_attr_pwm2_auto_channels.dev_attr.attr,
2428 &sensor_dev_attr_pwm1_auto_spinup_min.dev_attr.attr,
2429 &sensor_dev_attr_pwm2_auto_spinup_min.dev_attr.attr,
2430 &sensor_dev_attr_pwm1_auto_spinup_time.dev_attr.attr,
2431 &sensor_dev_attr_pwm2_auto_spinup_time.dev_attr.attr,
2432 &dev_attr_pwm_auto_prochot_ramp.attr,
2433 &dev_attr_pwm_auto_vrdhot_ramp.attr,
2434 &sensor_dev_attr_vid1.dev_attr.attr,
2435 &sensor_dev_attr_vid2.dev_attr.attr,
2436 &sensor_dev_attr_prochot1.dev_attr.attr,
2437 &sensor_dev_attr_prochot2.dev_attr.attr,
2438 &sensor_dev_attr_prochot1_avg.dev_attr.attr,
2439 &sensor_dev_attr_prochot2_avg.dev_attr.attr,
2440 &sensor_dev_attr_prochot1_max.dev_attr.attr,
2441 &sensor_dev_attr_prochot2_max.dev_attr.attr,
2442 &sensor_dev_attr_prochot1_override.dev_attr.attr,
2443 &sensor_dev_attr_prochot2_override.dev_attr.attr,
2444 &sensor_dev_attr_prochot1_interval.dev_attr.attr,
2445 &sensor_dev_attr_prochot2_interval.dev_attr.attr,
2446 &dev_attr_prochot_override_duty_cycle.attr,
2447 &dev_attr_prochot_short.attr,
2448 &sensor_dev_attr_vrdhot1.dev_attr.attr,
2449 &sensor_dev_attr_vrdhot2.dev_attr.attr,
2450 &dev_attr_gpio.attr,
2451 &dev_attr_alarms.attr,
2452 NULL
2453};
2454
2455static struct attribute_group lm93_attr_grp = {
2456 .attrs = lm93_attrs,
2457};
2458
2459static void lm93_init_client(struct i2c_client *client)
2460{
2461 int i;
2462 u8 reg;
2463
2464 /* configure VID pin input thresholds */
2465 reg = lm93_read_byte(client, LM93_REG_GPI_VID_CTL);
2466 lm93_write_byte(client, LM93_REG_GPI_VID_CTL,
2467 reg | (vid_agtl ? 0x03 : 0x00));
2468
2469 if (init) {
2470 /* enable #ALERT pin */
2471 reg = lm93_read_byte(client, LM93_REG_CONFIG);
2472 lm93_write_byte(client, LM93_REG_CONFIG, reg | 0x08);
2473
2474 /* enable ASF mode for BMC status registers */
2475 reg = lm93_read_byte(client, LM93_REG_STATUS_CONTROL);
2476 lm93_write_byte(client, LM93_REG_STATUS_CONTROL, reg | 0x02);
2477
2478 /* set sleep state to S0 */
2479 lm93_write_byte(client, LM93_REG_SLEEP_CONTROL, 0);
2480
2481 /* unmask #VRDHOT and dynamic VCCP (if nec) error events */
2482 reg = lm93_read_byte(client, LM93_REG_MISC_ERR_MASK);
2483 reg &= ~0x03;
2484 reg &= ~(vccp_limit_type[0] ? 0x10 : 0);
2485 reg &= ~(vccp_limit_type[1] ? 0x20 : 0);
2486 lm93_write_byte(client, LM93_REG_MISC_ERR_MASK, reg);
2487 }
2488
2489 /* start monitoring */
2490 reg = lm93_read_byte(client, LM93_REG_CONFIG);
2491 lm93_write_byte(client, LM93_REG_CONFIG, reg | 0x01);
2492
2493 /* spin until ready */
2494 for (i=0; i<20; i++) {
2495 msleep(10);
2496 if ((lm93_read_byte(client, LM93_REG_CONFIG) & 0x80) == 0x80)
2497 return;
2498 }
2499
2500 dev_warn(&client->dev,"timed out waiting for sensor "
2501 "chip to signal ready!\n");
2502}
2503
2504static int lm93_detect(struct i2c_adapter *adapter, int address, int kind)
2505{
2506 struct lm93_data *data;
2507 struct i2c_client *client;
2508
2509 int err = -ENODEV, func;
2510 void (*update)(struct lm93_data *, struct i2c_client *);
2511
2512 /* choose update routine based on bus capabilities */
2513 func = i2c_get_functionality(adapter);
2514 if ( ((LM93_SMBUS_FUNC_FULL & func) == LM93_SMBUS_FUNC_FULL) &&
2515 (!disable_block) ) {
2516 dev_dbg(&adapter->dev,"using SMBus block data transactions\n");
2517 update = lm93_update_client_full;
2518 } else if ((LM93_SMBUS_FUNC_MIN & func) == LM93_SMBUS_FUNC_MIN) {
2519 dev_dbg(&adapter->dev,"disabled SMBus block data "
2520 "transactions\n");
2521 update = lm93_update_client_min;
2522 } else {
2523 dev_dbg(&adapter->dev,"detect failed, "
2524 "smbus byte and/or word data not supported!\n");
2525 goto err_out;
2526 }
2527
2528 /* OK. For now, we presume we have a valid client. We now create the
2529 client structure, even though we cannot fill it completely yet.
2530 But it allows us to access lm78_{read,write}_value. */
2531
2532 if ( !(data = kzalloc(sizeof(struct lm93_data), GFP_KERNEL))) {
2533 dev_dbg(&adapter->dev,"out of memory!\n");
2534 err = -ENOMEM;
2535 goto err_out;
2536 }
2537
2538 client = &data->client;
2539 i2c_set_clientdata(client, data);
2540 client->addr = address;
2541 client->adapter = adapter;
2542 client->driver = &lm93_driver;
2543
2544 /* detection */
2545 if (kind < 0) {
2546 int mfr = lm93_read_byte(client, LM93_REG_MFR_ID);
2547
2548 if (mfr != 0x01) {
2549 dev_dbg(&adapter->dev,"detect failed, "
2550 "bad manufacturer id 0x%02x!\n", mfr);
2551 goto err_free;
2552 }
2553 }
2554
2555 if (kind <= 0) {
2556 int ver = lm93_read_byte(client, LM93_REG_VER);
2557
2558 if ((ver == LM93_MFR_ID) || (ver == LM93_MFR_ID_PROTOTYPE)) {
2559 kind = lm93;
2560 } else {
2561 dev_dbg(&adapter->dev,"detect failed, "
2562 "bad version id 0x%02x!\n", ver);
2563 if (kind == 0)
2564 dev_dbg(&adapter->dev,
2565 "(ignored 'force' parameter)\n");
2566 goto err_free;
2567 }
2568 }
2569
2570 /* fill in remaining client fields */
2571 strlcpy(client->name, "lm93", I2C_NAME_SIZE);
2572 dev_dbg(&adapter->dev,"loading %s at %d,0x%02x\n",
2573 client->name, i2c_adapter_id(client->adapter),
2574 client->addr);
2575
2576 /* housekeeping */
2577 data->valid = 0;
2578 data->update = update;
2579 mutex_init(&data->update_lock);
2580
2581 /* tell the I2C layer a new client has arrived */
2582 if ((err = i2c_attach_client(client)))
2583 goto err_free;
2584
2585 /* initialize the chip */
2586 lm93_init_client(client);
2587
2588 err = sysfs_create_group(&client->dev.kobj, &lm93_attr_grp);
2589 if (err)
2590 goto err_detach;
2591
2592 /* Register hwmon driver class */
2593 data->class_dev = hwmon_device_register(&client->dev);
2594 if ( !IS_ERR(data->class_dev))
2595 return 0;
2596
2597 err = PTR_ERR(data->class_dev);
2598 dev_err(&client->dev, "error registering hwmon device.\n");
2599 sysfs_remove_group(&client->dev.kobj, &lm93_attr_grp);
2600err_detach:
2601 i2c_detach_client(client);
2602err_free:
2603 kfree(data);
2604err_out:
2605 return err;
2606}
2607
2608/* This function is called when:
2609 * lm93_driver is inserted (when this module is loaded), for each
2610 available adapter
2611 * when a new adapter is inserted (and lm93_driver is still present) */
2612static int lm93_attach_adapter(struct i2c_adapter *adapter)
2613{
2614 return i2c_probe(adapter, &addr_data, lm93_detect);
2615}
2616
2617static int lm93_detach_client(struct i2c_client *client)
2618{
2619 struct lm93_data *data = i2c_get_clientdata(client);
2620 int err = 0;
2621
2622 hwmon_device_unregister(data->class_dev);
2623 sysfs_remove_group(&client->dev.kobj, &lm93_attr_grp);
2624
2625 err = i2c_detach_client(client);
2626 if (!err)
2627 kfree(data);
2628 return err;
2629}
2630
2631static struct i2c_driver lm93_driver = {
2632 .driver = {
2633 .name = "lm93",
2634 },
2635 .attach_adapter = lm93_attach_adapter,
2636 .detach_client = lm93_detach_client,
2637};
2638
2639static int __init lm93_init(void)
2640{
2641 return i2c_add_driver(&lm93_driver);
2642}
2643
2644static void __exit lm93_exit(void)
2645{
2646 i2c_del_driver(&lm93_driver);
2647}
2648
2649MODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>, "
2650 "Hans J. Koch <hjk@linutronix.de");
2651MODULE_DESCRIPTION("LM93 driver");
2652MODULE_LICENSE("GPL");
2653
2654module_init(lm93_init);
2655module_exit(lm93_exit);
diff --git a/drivers/hwmon/pc87360.c b/drivers/hwmon/pc87360.c
index c8a21be09d..cb72526c34 100644
--- a/drivers/hwmon/pc87360.c
+++ b/drivers/hwmon/pc87360.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * pc87360.c - Part of lm_sensors, Linux kernel modules 2 * pc87360.c - Part of lm_sensors, Linux kernel modules
3 * for hardware monitoring 3 * for hardware monitoring
4 * Copyright (C) 2004 Jean Delvare <khali@linux-fr.org> 4 * Copyright (C) 2004, 2007 Jean Delvare <khali@linux-fr.org>
5 * 5 *
6 * Copied from smsc47m1.c: 6 * Copied from smsc47m1.c:
7 * Copyright (C) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com> 7 * Copyright (C) 2002 Mark D. Studebaker <mdsxyz123@yahoo.com>
@@ -37,8 +37,7 @@
37#include <linux/init.h> 37#include <linux/init.h>
38#include <linux/slab.h> 38#include <linux/slab.h>
39#include <linux/jiffies.h> 39#include <linux/jiffies.h>
40#include <linux/i2c.h> 40#include <linux/platform_device.h>
41#include <linux/i2c-isa.h>
42#include <linux/hwmon.h> 41#include <linux/hwmon.h>
43#include <linux/hwmon-sysfs.h> 42#include <linux/hwmon-sysfs.h>
44#include <linux/hwmon-vid.h> 43#include <linux/hwmon-vid.h>
@@ -47,12 +46,10 @@
47#include <asm/io.h> 46#include <asm/io.h>
48 47
49static u8 devid; 48static u8 devid;
50static unsigned short address; 49static struct platform_device *pdev;
51static unsigned short extra_isa[3]; 50static unsigned short extra_isa[3];
52static u8 confreg[4]; 51static u8 confreg[4];
53 52
54enum chips { any_chip, pc87360, pc87363, pc87364, pc87365, pc87366 };
55
56static int init = 1; 53static int init = 1;
57module_param(init, int, 0); 54module_param(init, int, 0);
58MODULE_PARM_DESC(init, 55MODULE_PARM_DESC(init,
@@ -178,11 +175,11 @@ static inline u8 PWM_TO_REG(int val, int inv)
178 ((val) + 500) / 1000) 175 ((val) + 500) / 1000)
179 176
180/* 177/*
181 * Client data (each client gets its own) 178 * Device data
182 */ 179 */
183 180
184struct pc87360_data { 181struct pc87360_data {
185 struct i2c_client client; 182 const char *name;
186 struct class_device *class_dev; 183 struct class_device *class_dev;
187 struct mutex lock; 184 struct mutex lock;
188 struct mutex update_lock; 185 struct mutex update_lock;
@@ -222,27 +219,28 @@ struct pc87360_data {
222 * Functions declaration 219 * Functions declaration
223 */ 220 */
224 221
225static int pc87360_detect(struct i2c_adapter *adapter); 222static int pc87360_probe(struct platform_device *pdev);
226static int pc87360_detach_client(struct i2c_client *client); 223static int pc87360_remove(struct platform_device *pdev);
227 224
228static int pc87360_read_value(struct pc87360_data *data, u8 ldi, u8 bank, 225static int pc87360_read_value(struct pc87360_data *data, u8 ldi, u8 bank,
229 u8 reg); 226 u8 reg);
230static void pc87360_write_value(struct pc87360_data *data, u8 ldi, u8 bank, 227static void pc87360_write_value(struct pc87360_data *data, u8 ldi, u8 bank,
231 u8 reg, u8 value); 228 u8 reg, u8 value);
232static void pc87360_init_client(struct i2c_client *client, int use_thermistors); 229static void pc87360_init_device(struct platform_device *pdev,
230 int use_thermistors);
233static struct pc87360_data *pc87360_update_device(struct device *dev); 231static struct pc87360_data *pc87360_update_device(struct device *dev);
234 232
235/* 233/*
236 * Driver data (common to all clients) 234 * Driver data
237 */ 235 */
238 236
239static struct i2c_driver pc87360_driver = { 237static struct platform_driver pc87360_driver = {
240 .driver = { 238 .driver = {
241 .owner = THIS_MODULE, 239 .owner = THIS_MODULE,
242 .name = "pc87360", 240 .name = "pc87360",
243 }, 241 },
244 .attach_adapter = pc87360_detect, 242 .probe = pc87360_probe,
245 .detach_client = pc87360_detach_client, 243 .remove = __devexit_p(pc87360_remove),
246}; 244};
247 245
248/* 246/*
@@ -281,8 +279,7 @@ static ssize_t set_fan_min(struct device *dev, struct device_attribute *devattr,
281 size_t count) 279 size_t count)
282{ 280{
283 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 281 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
284 struct i2c_client *client = to_i2c_client(dev); 282 struct pc87360_data *data = dev_get_drvdata(dev);
285 struct pc87360_data *data = i2c_get_clientdata(client);
286 long fan_min = simple_strtol(buf, NULL, 10); 283 long fan_min = simple_strtol(buf, NULL, 10);
287 284
288 mutex_lock(&data->update_lock); 285 mutex_lock(&data->update_lock);
@@ -347,8 +344,7 @@ static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr, con
347 size_t count) 344 size_t count)
348{ 345{
349 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 346 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
350 struct i2c_client *client = to_i2c_client(dev); 347 struct pc87360_data *data = dev_get_drvdata(dev);
351 struct pc87360_data *data = i2c_get_clientdata(client);
352 long val = simple_strtol(buf, NULL, 10); 348 long val = simple_strtol(buf, NULL, 10);
353 349
354 mutex_lock(&data->update_lock); 350 mutex_lock(&data->update_lock);
@@ -410,8 +406,7 @@ static ssize_t set_in_min(struct device *dev, struct device_attribute *devattr,
410 size_t count) 406 size_t count)
411{ 407{
412 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 408 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
413 struct i2c_client *client = to_i2c_client(dev); 409 struct pc87360_data *data = dev_get_drvdata(dev);
414 struct pc87360_data *data = i2c_get_clientdata(client);
415 long val = simple_strtol(buf, NULL, 10); 410 long val = simple_strtol(buf, NULL, 10);
416 411
417 mutex_lock(&data->update_lock); 412 mutex_lock(&data->update_lock);
@@ -425,8 +420,7 @@ static ssize_t set_in_max(struct device *dev, struct device_attribute *devattr,
425 size_t count) 420 size_t count)
426{ 421{
427 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 422 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
428 struct i2c_client *client = to_i2c_client(dev); 423 struct pc87360_data *data = dev_get_drvdata(dev);
429 struct pc87360_data *data = i2c_get_clientdata(client);
430 long val = simple_strtol(buf, NULL, 10); 424 long val = simple_strtol(buf, NULL, 10);
431 425
432 mutex_lock(&data->update_lock); 426 mutex_lock(&data->update_lock);
@@ -511,8 +505,7 @@ static ssize_t show_vrm(struct device *dev, struct device_attribute *attr, char
511} 505}
512static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 506static ssize_t set_vrm(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
513{ 507{
514 struct i2c_client *client = to_i2c_client(dev); 508 struct pc87360_data *data = dev_get_drvdata(dev);
515 struct pc87360_data *data = i2c_get_clientdata(client);
516 data->vrm = simple_strtoul(buf, NULL, 10); 509 data->vrm = simple_strtoul(buf, NULL, 10);
517 return count; 510 return count;
518} 511}
@@ -584,8 +577,7 @@ static ssize_t set_therm_min(struct device *dev, struct device_attribute *devatt
584 size_t count) 577 size_t count)
585{ 578{
586 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 579 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
587 struct i2c_client *client = to_i2c_client(dev); 580 struct pc87360_data *data = dev_get_drvdata(dev);
588 struct pc87360_data *data = i2c_get_clientdata(client);
589 long val = simple_strtol(buf, NULL, 10); 581 long val = simple_strtol(buf, NULL, 10);
590 582
591 mutex_lock(&data->update_lock); 583 mutex_lock(&data->update_lock);
@@ -599,8 +591,7 @@ static ssize_t set_therm_max(struct device *dev, struct device_attribute *devatt
599 size_t count) 591 size_t count)
600{ 592{
601 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 593 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
602 struct i2c_client *client = to_i2c_client(dev); 594 struct pc87360_data *data = dev_get_drvdata(dev);
603 struct pc87360_data *data = i2c_get_clientdata(client);
604 long val = simple_strtol(buf, NULL, 10); 595 long val = simple_strtol(buf, NULL, 10);
605 596
606 mutex_lock(&data->update_lock); 597 mutex_lock(&data->update_lock);
@@ -614,8 +605,7 @@ static ssize_t set_therm_crit(struct device *dev, struct device_attribute *devat
614 size_t count) 605 size_t count)
615{ 606{
616 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 607 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
617 struct i2c_client *client = to_i2c_client(dev); 608 struct pc87360_data *data = dev_get_drvdata(dev);
618 struct pc87360_data *data = i2c_get_clientdata(client);
619 long val = simple_strtol(buf, NULL, 10); 609 long val = simple_strtol(buf, NULL, 10);
620 610
621 mutex_lock(&data->update_lock); 611 mutex_lock(&data->update_lock);
@@ -715,8 +705,7 @@ static ssize_t set_temp_min(struct device *dev, struct device_attribute *devattr
715 size_t count) 705 size_t count)
716{ 706{
717 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 707 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
718 struct i2c_client *client = to_i2c_client(dev); 708 struct pc87360_data *data = dev_get_drvdata(dev);
719 struct pc87360_data *data = i2c_get_clientdata(client);
720 long val = simple_strtol(buf, NULL, 10); 709 long val = simple_strtol(buf, NULL, 10);
721 710
722 mutex_lock(&data->update_lock); 711 mutex_lock(&data->update_lock);
@@ -730,8 +719,7 @@ static ssize_t set_temp_max(struct device *dev, struct device_attribute *devattr
730 size_t count) 719 size_t count)
731{ 720{
732 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 721 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
733 struct i2c_client *client = to_i2c_client(dev); 722 struct pc87360_data *data = dev_get_drvdata(dev);
734 struct pc87360_data *data = i2c_get_clientdata(client);
735 long val = simple_strtol(buf, NULL, 10); 723 long val = simple_strtol(buf, NULL, 10);
736 724
737 mutex_lock(&data->update_lock); 725 mutex_lock(&data->update_lock);
@@ -745,8 +733,7 @@ static ssize_t set_temp_crit(struct device *dev, struct device_attribute *devatt
745 size_t count) 733 size_t count)
746{ 734{
747 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 735 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
748 struct i2c_client *client = to_i2c_client(dev); 736 struct pc87360_data *data = dev_get_drvdata(dev);
749 struct pc87360_data *data = i2c_get_clientdata(client);
750 long val = simple_strtol(buf, NULL, 10); 737 long val = simple_strtol(buf, NULL, 10);
751 738
752 mutex_lock(&data->update_lock); 739 mutex_lock(&data->update_lock);
@@ -818,6 +805,14 @@ static const struct attribute_group pc8736x_temp_group = {
818 .attrs = pc8736x_temp_attr_array, 805 .attrs = pc8736x_temp_attr_array,
819}; 806};
820 807
808static ssize_t show_name(struct device *dev, struct device_attribute
809 *devattr, char *buf)
810{
811 struct pc87360_data *data = dev_get_drvdata(dev);
812 return sprintf(buf, "%s\n", data->name);
813}
814static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
815
821/* 816/*
822 * Device detection, registration and update 817 * Device detection, registration and update
823 */ 818 */
@@ -912,28 +907,18 @@ static int __init pc87360_find(int sioaddr, u8 *devid, unsigned short *addresses
912 return 0; 907 return 0;
913} 908}
914 909
915static int pc87360_detect(struct i2c_adapter *adapter) 910static int __devinit pc87360_probe(struct platform_device *pdev)
916{ 911{
917 int i; 912 int i;
918 struct i2c_client *client;
919 struct pc87360_data *data; 913 struct pc87360_data *data;
920 int err = 0; 914 int err = 0;
921 const char *name = "pc87360"; 915 const char *name = "pc87360";
922 int use_thermistors = 0; 916 int use_thermistors = 0;
923 struct device *dev; 917 struct device *dev = &pdev->dev;
924 918
925 if (!(data = kzalloc(sizeof(struct pc87360_data), GFP_KERNEL))) 919 if (!(data = kzalloc(sizeof(struct pc87360_data), GFP_KERNEL)))
926 return -ENOMEM; 920 return -ENOMEM;
927 921
928 client = &data->client;
929 dev = &client->dev;
930 i2c_set_clientdata(client, data);
931 client->addr = address;
932 mutex_init(&data->lock);
933 client->adapter = adapter;
934 client->driver = &pc87360_driver;
935 client->flags = 0;
936
937 data->fannr = 2; 922 data->fannr = 2;
938 data->innr = 0; 923 data->innr = 0;
939 data->tempnr = 0; 924 data->tempnr = 0;
@@ -960,15 +945,17 @@ static int pc87360_detect(struct i2c_adapter *adapter)
960 break; 945 break;
961 } 946 }
962 947
963 strlcpy(client->name, name, sizeof(client->name)); 948 data->name = name;
964 data->valid = 0; 949 data->valid = 0;
950 mutex_init(&data->lock);
965 mutex_init(&data->update_lock); 951 mutex_init(&data->update_lock);
952 platform_set_drvdata(pdev, data);
966 953
967 for (i = 0; i < 3; i++) { 954 for (i = 0; i < 3; i++) {
968 if (((data->address[i] = extra_isa[i])) 955 if (((data->address[i] = extra_isa[i]))
969 && !request_region(extra_isa[i], PC87360_EXTENT, 956 && !request_region(extra_isa[i], PC87360_EXTENT,
970 pc87360_driver.driver.name)) { 957 pc87360_driver.driver.name)) {
971 dev_err(&client->dev, "Region 0x%x-0x%x already " 958 dev_err(dev, "Region 0x%x-0x%x already "
972 "in use!\n", extra_isa[i], 959 "in use!\n", extra_isa[i],
973 extra_isa[i]+PC87360_EXTENT-1); 960 extra_isa[i]+PC87360_EXTENT-1);
974 for (i--; i >= 0; i--) 961 for (i--; i >= 0; i--)
@@ -982,9 +969,6 @@ static int pc87360_detect(struct i2c_adapter *adapter)
982 if (data->fannr) 969 if (data->fannr)
983 data->fan_conf = confreg[0] | (confreg[1] << 8); 970 data->fan_conf = confreg[0] | (confreg[1] << 8);
984 971
985 if ((err = i2c_attach_client(client)))
986 goto ERROR2;
987
988 /* Use the correct reference voltage 972 /* Use the correct reference voltage
989 Unless both the VLM and the TMS logical devices agree to 973 Unless both the VLM and the TMS logical devices agree to
990 use an external Vref, the internal one is used. */ 974 use an external Vref, the internal one is used. */
@@ -996,7 +980,7 @@ static int pc87360_detect(struct i2c_adapter *adapter)
996 PC87365_REG_TEMP_CONFIG); 980 PC87365_REG_TEMP_CONFIG);
997 } 981 }
998 data->in_vref = (i&0x02) ? 3025 : 2966; 982 data->in_vref = (i&0x02) ? 3025 : 2966;
999 dev_dbg(&client->dev, "Using %s reference voltage\n", 983 dev_dbg(dev, "Using %s reference voltage\n",
1000 (i&0x02) ? "external" : "internal"); 984 (i&0x02) ? "external" : "internal");
1001 985
1002 data->vid_conf = confreg[3]; 986 data->vid_conf = confreg[3];
@@ -1015,18 +999,18 @@ static int pc87360_detect(struct i2c_adapter *adapter)
1015 if (devid == 0xe9 && data->address[1]) /* PC87366 */ 999 if (devid == 0xe9 && data->address[1]) /* PC87366 */
1016 use_thermistors = confreg[2] & 0x40; 1000 use_thermistors = confreg[2] & 0x40;
1017 1001
1018 pc87360_init_client(client, use_thermistors); 1002 pc87360_init_device(pdev, use_thermistors);
1019 } 1003 }
1020 1004
1021 /* Register all-or-nothing sysfs groups */ 1005 /* Register all-or-nothing sysfs groups */
1022 1006
1023 if (data->innr && 1007 if (data->innr &&
1024 (err = sysfs_create_group(&client->dev.kobj, 1008 (err = sysfs_create_group(&dev->kobj,
1025 &pc8736x_vin_group))) 1009 &pc8736x_vin_group)))
1026 goto ERROR3; 1010 goto ERROR3;
1027 1011
1028 if (data->innr == 14 && 1012 if (data->innr == 14 &&
1029 (err = sysfs_create_group(&client->dev.kobj, 1013 (err = sysfs_create_group(&dev->kobj,
1030 &pc8736x_therm_group))) 1014 &pc8736x_therm_group)))
1031 goto ERROR3; 1015 goto ERROR3;
1032 1016
@@ -1067,7 +1051,10 @@ static int pc87360_detect(struct i2c_adapter *adapter)
1067 goto ERROR3; 1051 goto ERROR3;
1068 } 1052 }
1069 1053
1070 data->class_dev = hwmon_device_register(&client->dev); 1054 if ((err = device_create_file(dev, &dev_attr_name)))
1055 goto ERROR3;
1056
1057 data->class_dev = hwmon_device_register(dev);
1071 if (IS_ERR(data->class_dev)) { 1058 if (IS_ERR(data->class_dev)) {
1072 err = PTR_ERR(data->class_dev); 1059 err = PTR_ERR(data->class_dev);
1073 goto ERROR3; 1060 goto ERROR3;
@@ -1075,14 +1062,12 @@ static int pc87360_detect(struct i2c_adapter *adapter)
1075 return 0; 1062 return 0;
1076 1063
1077ERROR3: 1064ERROR3:
1065 device_remove_file(dev, &dev_attr_name);
1078 /* can still remove groups whose members were added individually */ 1066 /* can still remove groups whose members were added individually */
1079 sysfs_remove_group(&client->dev.kobj, &pc8736x_temp_group); 1067 sysfs_remove_group(&dev->kobj, &pc8736x_temp_group);
1080 sysfs_remove_group(&client->dev.kobj, &pc8736x_fan_group); 1068 sysfs_remove_group(&dev->kobj, &pc8736x_fan_group);
1081 sysfs_remove_group(&client->dev.kobj, &pc8736x_therm_group); 1069 sysfs_remove_group(&dev->kobj, &pc8736x_therm_group);
1082 sysfs_remove_group(&client->dev.kobj, &pc8736x_vin_group); 1070 sysfs_remove_group(&dev->kobj, &pc8736x_vin_group);
1083
1084 i2c_detach_client(client);
1085ERROR2:
1086 for (i = 0; i < 3; i++) { 1071 for (i = 0; i < 3; i++) {
1087 if (data->address[i]) { 1072 if (data->address[i]) {
1088 release_region(data->address[i], PC87360_EXTENT); 1073 release_region(data->address[i], PC87360_EXTENT);
@@ -1093,20 +1078,18 @@ ERROR1:
1093 return err; 1078 return err;
1094} 1079}
1095 1080
1096static int pc87360_detach_client(struct i2c_client *client) 1081static int __devexit pc87360_remove(struct platform_device *pdev)
1097{ 1082{
1098 struct pc87360_data *data = i2c_get_clientdata(client); 1083 struct pc87360_data *data = platform_get_drvdata(pdev);
1099 int i; 1084 int i;
1100 1085
1101 hwmon_device_unregister(data->class_dev); 1086 hwmon_device_unregister(data->class_dev);
1102 1087
1103 sysfs_remove_group(&client->dev.kobj, &pc8736x_temp_group); 1088 device_remove_file(&pdev->dev, &dev_attr_name);
1104 sysfs_remove_group(&client->dev.kobj, &pc8736x_fan_group); 1089 sysfs_remove_group(&pdev->dev.kobj, &pc8736x_temp_group);
1105 sysfs_remove_group(&client->dev.kobj, &pc8736x_therm_group); 1090 sysfs_remove_group(&pdev->dev.kobj, &pc8736x_fan_group);
1106 sysfs_remove_group(&client->dev.kobj, &pc8736x_vin_group); 1091 sysfs_remove_group(&pdev->dev.kobj, &pc8736x_therm_group);
1107 1092 sysfs_remove_group(&pdev->dev.kobj, &pc8736x_vin_group);
1108 if ((i = i2c_detach_client(client)))
1109 return i;
1110 1093
1111 for (i = 0; i < 3; i++) { 1094 for (i = 0; i < 3; i++) {
1112 if (data->address[i]) { 1095 if (data->address[i]) {
@@ -1144,9 +1127,10 @@ static void pc87360_write_value(struct pc87360_data *data, u8 ldi, u8 bank,
1144 mutex_unlock(&(data->lock)); 1127 mutex_unlock(&(data->lock));
1145} 1128}
1146 1129
1147static void pc87360_init_client(struct i2c_client *client, int use_thermistors) 1130static void pc87360_init_device(struct platform_device *pdev,
1131 int use_thermistors)
1148{ 1132{
1149 struct pc87360_data *data = i2c_get_clientdata(client); 1133 struct pc87360_data *data = platform_get_drvdata(pdev);
1150 int i, nr; 1134 int i, nr;
1151 const u8 init_in[14] = { 2, 2, 2, 2, 2, 2, 2, 1, 1, 3, 1, 2, 2, 2 }; 1135 const u8 init_in[14] = { 2, 2, 2, 2, 2, 2, 2, 1, 1, 3, 1, 2, 2, 2 };
1152 const u8 init_temp[3] = { 2, 2, 1 }; 1136 const u8 init_temp[3] = { 2, 2, 1 };
@@ -1155,7 +1139,7 @@ static void pc87360_init_client(struct i2c_client *client, int use_thermistors)
1155 if (init >= 2 && data->innr) { 1139 if (init >= 2 && data->innr) {
1156 reg = pc87360_read_value(data, LD_IN, NO_BANK, 1140 reg = pc87360_read_value(data, LD_IN, NO_BANK,
1157 PC87365_REG_IN_CONVRATE); 1141 PC87365_REG_IN_CONVRATE);
1158 dev_info(&client->dev, "VLM conversion set to " 1142 dev_info(&pdev->dev, "VLM conversion set to "
1159 "1s period, 160us delay\n"); 1143 "1s period, 160us delay\n");
1160 pc87360_write_value(data, LD_IN, NO_BANK, 1144 pc87360_write_value(data, LD_IN, NO_BANK,
1161 PC87365_REG_IN_CONVRATE, 1145 PC87365_REG_IN_CONVRATE,
@@ -1169,7 +1153,7 @@ static void pc87360_init_client(struct i2c_client *client, int use_thermistors)
1169 reg = pc87360_read_value(data, LD_IN, i, 1153 reg = pc87360_read_value(data, LD_IN, i,
1170 PC87365_REG_IN_STATUS); 1154 PC87365_REG_IN_STATUS);
1171 if (!(reg & 0x01)) { 1155 if (!(reg & 0x01)) {
1172 dev_dbg(&client->dev, "Forcibly " 1156 dev_dbg(&pdev->dev, "Forcibly "
1173 "enabling in%d\n", i); 1157 "enabling in%d\n", i);
1174 pc87360_write_value(data, LD_IN, i, 1158 pc87360_write_value(data, LD_IN, i,
1175 PC87365_REG_IN_STATUS, 1159 PC87365_REG_IN_STATUS,
@@ -1193,7 +1177,7 @@ static void pc87360_init_client(struct i2c_client *client, int use_thermistors)
1193 reg = pc87360_read_value(data, LD_TEMP, i, 1177 reg = pc87360_read_value(data, LD_TEMP, i,
1194 PC87365_REG_TEMP_STATUS); 1178 PC87365_REG_TEMP_STATUS);
1195 if (!(reg & 0x01)) { 1179 if (!(reg & 0x01)) {
1196 dev_dbg(&client->dev, "Forcibly " 1180 dev_dbg(&pdev->dev, "Forcibly "
1197 "enabling temp%d\n", i+1); 1181 "enabling temp%d\n", i+1);
1198 pc87360_write_value(data, LD_TEMP, i, 1182 pc87360_write_value(data, LD_TEMP, i,
1199 PC87365_REG_TEMP_STATUS, 1183 PC87365_REG_TEMP_STATUS,
@@ -1210,7 +1194,7 @@ static void pc87360_init_client(struct i2c_client *client, int use_thermistors)
1210 reg = pc87360_read_value(data, LD_TEMP, 1194 reg = pc87360_read_value(data, LD_TEMP,
1211 (i-11)/2, PC87365_REG_TEMP_STATUS); 1195 (i-11)/2, PC87365_REG_TEMP_STATUS);
1212 if (reg & 0x01) { 1196 if (reg & 0x01) {
1213 dev_dbg(&client->dev, "Skipping " 1197 dev_dbg(&pdev->dev, "Skipping "
1214 "temp%d, pin already in use " 1198 "temp%d, pin already in use "
1215 "by temp%d\n", i-7, (i-11)/2); 1199 "by temp%d\n", i-7, (i-11)/2);
1216 continue; 1200 continue;
@@ -1220,7 +1204,7 @@ static void pc87360_init_client(struct i2c_client *client, int use_thermistors)
1220 reg = pc87360_read_value(data, LD_IN, i, 1204 reg = pc87360_read_value(data, LD_IN, i,
1221 PC87365_REG_IN_STATUS); 1205 PC87365_REG_IN_STATUS);
1222 if (!(reg & 0x01)) { 1206 if (!(reg & 0x01)) {
1223 dev_dbg(&client->dev, "Forcibly " 1207 dev_dbg(&pdev->dev, "Forcibly "
1224 "enabling temp%d\n", i-7); 1208 "enabling temp%d\n", i-7);
1225 pc87360_write_value(data, LD_IN, i, 1209 pc87360_write_value(data, LD_IN, i,
1226 PC87365_REG_TEMP_STATUS, 1210 PC87365_REG_TEMP_STATUS,
@@ -1234,7 +1218,7 @@ static void pc87360_init_client(struct i2c_client *client, int use_thermistors)
1234 reg = pc87360_read_value(data, LD_IN, NO_BANK, 1218 reg = pc87360_read_value(data, LD_IN, NO_BANK,
1235 PC87365_REG_IN_CONFIG); 1219 PC87365_REG_IN_CONFIG);
1236 if (reg & 0x01) { 1220 if (reg & 0x01) {
1237 dev_dbg(&client->dev, "Forcibly " 1221 dev_dbg(&pdev->dev, "Forcibly "
1238 "enabling monitoring (VLM)\n"); 1222 "enabling monitoring (VLM)\n");
1239 pc87360_write_value(data, LD_IN, NO_BANK, 1223 pc87360_write_value(data, LD_IN, NO_BANK,
1240 PC87365_REG_IN_CONFIG, 1224 PC87365_REG_IN_CONFIG,
@@ -1246,7 +1230,7 @@ static void pc87360_init_client(struct i2c_client *client, int use_thermistors)
1246 reg = pc87360_read_value(data, LD_TEMP, NO_BANK, 1230 reg = pc87360_read_value(data, LD_TEMP, NO_BANK,
1247 PC87365_REG_TEMP_CONFIG); 1231 PC87365_REG_TEMP_CONFIG);
1248 if (reg & 0x01) { 1232 if (reg & 0x01) {
1249 dev_dbg(&client->dev, "Forcibly enabling " 1233 dev_dbg(&pdev->dev, "Forcibly enabling "
1250 "monitoring (TMS)\n"); 1234 "monitoring (TMS)\n");
1251 pc87360_write_value(data, LD_TEMP, NO_BANK, 1235 pc87360_write_value(data, LD_TEMP, NO_BANK,
1252 PC87365_REG_TEMP_CONFIG, 1236 PC87365_REG_TEMP_CONFIG,
@@ -1268,9 +1252,9 @@ static void pc87360_init_client(struct i2c_client *client, int use_thermistors)
1268 } 1252 }
1269} 1253}
1270 1254
1271static void pc87360_autodiv(struct i2c_client *client, int nr) 1255static void pc87360_autodiv(struct device *dev, int nr)
1272{ 1256{
1273 struct pc87360_data *data = i2c_get_clientdata(client); 1257 struct pc87360_data *data = dev_get_drvdata(dev);
1274 u8 old_min = data->fan_min[nr]; 1258 u8 old_min = data->fan_min[nr];
1275 1259
1276 /* Increase clock divider if needed and possible */ 1260 /* Increase clock divider if needed and possible */
@@ -1280,7 +1264,7 @@ static void pc87360_autodiv(struct i2c_client *client, int nr)
1280 data->fan_status[nr] += 0x20; 1264 data->fan_status[nr] += 0x20;
1281 data->fan_min[nr] >>= 1; 1265 data->fan_min[nr] >>= 1;
1282 data->fan[nr] >>= 1; 1266 data->fan[nr] >>= 1;
1283 dev_dbg(&client->dev, "Increasing " 1267 dev_dbg(dev, "Increasing "
1284 "clock divider to %d for fan %d\n", 1268 "clock divider to %d for fan %d\n",
1285 FAN_DIV_FROM_REG(data->fan_status[nr]), nr+1); 1269 FAN_DIV_FROM_REG(data->fan_status[nr]), nr+1);
1286 } 1270 }
@@ -1292,7 +1276,7 @@ static void pc87360_autodiv(struct i2c_client *client, int nr)
1292 data->fan_status[nr] -= 0x20; 1276 data->fan_status[nr] -= 0x20;
1293 data->fan_min[nr] <<= 1; 1277 data->fan_min[nr] <<= 1;
1294 data->fan[nr] <<= 1; 1278 data->fan[nr] <<= 1;
1295 dev_dbg(&client->dev, "Decreasing " 1279 dev_dbg(dev, "Decreasing "
1296 "clock divider to %d for fan %d\n", 1280 "clock divider to %d for fan %d\n",
1297 FAN_DIV_FROM_REG(data->fan_status[nr]), 1281 FAN_DIV_FROM_REG(data->fan_status[nr]),
1298 nr+1); 1282 nr+1);
@@ -1309,14 +1293,13 @@ static void pc87360_autodiv(struct i2c_client *client, int nr)
1309 1293
1310static struct pc87360_data *pc87360_update_device(struct device *dev) 1294static struct pc87360_data *pc87360_update_device(struct device *dev)
1311{ 1295{
1312 struct i2c_client *client = to_i2c_client(dev); 1296 struct pc87360_data *data = dev_get_drvdata(dev);
1313 struct pc87360_data *data = i2c_get_clientdata(client);
1314 u8 i; 1297 u8 i;
1315 1298
1316 mutex_lock(&data->update_lock); 1299 mutex_lock(&data->update_lock);
1317 1300
1318 if (time_after(jiffies, data->last_updated + HZ * 2) || !data->valid) { 1301 if (time_after(jiffies, data->last_updated + HZ * 2) || !data->valid) {
1319 dev_dbg(&client->dev, "Data update\n"); 1302 dev_dbg(dev, "Data update\n");
1320 1303
1321 /* Fans */ 1304 /* Fans */
1322 for (i = 0; i < data->fannr; i++) { 1305 for (i = 0; i < data->fannr; i++) {
@@ -1330,7 +1313,7 @@ static struct pc87360_data *pc87360_update_device(struct device *dev)
1330 LD_FAN, NO_BANK, 1313 LD_FAN, NO_BANK,
1331 PC87360_REG_FAN_MIN(i)); 1314 PC87360_REG_FAN_MIN(i));
1332 /* Change clock divider if needed */ 1315 /* Change clock divider if needed */
1333 pc87360_autodiv(client, i); 1316 pc87360_autodiv(dev, i);
1334 /* Clear bits and write new divider */ 1317 /* Clear bits and write new divider */
1335 pc87360_write_value(data, LD_FAN, NO_BANK, 1318 pc87360_write_value(data, LD_FAN, NO_BANK,
1336 PC87360_REG_FAN_STATUS(i), 1319 PC87360_REG_FAN_STATUS(i),
@@ -1418,9 +1401,53 @@ static struct pc87360_data *pc87360_update_device(struct device *dev)
1418 return data; 1401 return data;
1419} 1402}
1420 1403
1404static int __init pc87360_device_add(unsigned short address)
1405{
1406 struct resource res = {
1407 .name = "pc87360",
1408 .flags = IORESOURCE_IO,
1409 };
1410 int err, i;
1411
1412 pdev = platform_device_alloc("pc87360", address);
1413 if (!pdev) {
1414 err = -ENOMEM;
1415 printk(KERN_ERR "pc87360: Device allocation failed\n");
1416 goto exit;
1417 }
1418
1419 for (i = 0; i < 3; i++) {
1420 if (!extra_isa[i])
1421 continue;
1422 res.start = extra_isa[i];
1423 res.end = extra_isa[i] + PC87360_EXTENT - 1;
1424 err = platform_device_add_resources(pdev, &res, 1);
1425 if (err) {
1426 printk(KERN_ERR "pc87360: Device resource[%d] "
1427 "addition failed (%d)\n", i, err);
1428 goto exit_device_put;
1429 }
1430 }
1431
1432 err = platform_device_add(pdev);
1433 if (err) {
1434 printk(KERN_ERR "pc87360: Device addition failed (%d)\n",
1435 err);
1436 goto exit_device_put;
1437 }
1438
1439 return 0;
1440
1441exit_device_put:
1442 platform_device_put(pdev);
1443exit:
1444 return err;
1445}
1446
1421static int __init pc87360_init(void) 1447static int __init pc87360_init(void)
1422{ 1448{
1423 int i; 1449 int err, i;
1450 unsigned short address = 0;
1424 1451
1425 if (pc87360_find(0x2e, &devid, extra_isa) 1452 if (pc87360_find(0x2e, &devid, extra_isa)
1426 && pc87360_find(0x4e, &devid, extra_isa)) { 1453 && pc87360_find(0x4e, &devid, extra_isa)) {
@@ -1443,12 +1470,27 @@ static int __init pc87360_init(void)
1443 return -ENODEV; 1470 return -ENODEV;
1444 } 1471 }
1445 1472
1446 return i2c_isa_add_driver(&pc87360_driver); 1473 err = platform_driver_register(&pc87360_driver);
1474 if (err)
1475 goto exit;
1476
1477 /* Sets global pdev as a side effect */
1478 err = pc87360_device_add(address);
1479 if (err)
1480 goto exit_driver;
1481
1482 return 0;
1483
1484 exit_driver:
1485 platform_driver_unregister(&pc87360_driver);
1486 exit:
1487 return err;
1447} 1488}
1448 1489
1449static void __exit pc87360_exit(void) 1490static void __exit pc87360_exit(void)
1450{ 1491{
1451 i2c_isa_del_driver(&pc87360_driver); 1492 platform_device_unregister(pdev);
1493 platform_driver_unregister(&pc87360_driver);
1452} 1494}
1453 1495
1454 1496
diff --git a/drivers/hwmon/pc87427.c b/drivers/hwmon/pc87427.c
index 29354fa26f..2915bc4ad0 100644
--- a/drivers/hwmon/pc87427.c
+++ b/drivers/hwmon/pc87427.c
@@ -484,7 +484,6 @@ static int __devexit pc87427_remove(struct platform_device *pdev)
484 struct resource *res; 484 struct resource *res;
485 int i; 485 int i;
486 486
487 platform_set_drvdata(pdev, NULL);
488 hwmon_device_unregister(data->class_dev); 487 hwmon_device_unregister(data->class_dev);
489 device_remove_file(&pdev->dev, &dev_attr_name); 488 device_remove_file(&pdev->dev, &dev_attr_name);
490 for (i = 0; i < 8; i++) { 489 for (i = 0; i < 8; i++) {
@@ -492,6 +491,7 @@ static int __devexit pc87427_remove(struct platform_device *pdev)
492 continue; 491 continue;
493 sysfs_remove_group(&pdev->dev.kobj, &pc87427_group_fan[i]); 492 sysfs_remove_group(&pdev->dev.kobj, &pc87427_group_fan[i]);
494 } 493 }
494 platform_set_drvdata(pdev, NULL);
495 kfree(data); 495 kfree(data);
496 496
497 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 497 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 3f400263fc..83321b28cf 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -54,9 +54,9 @@
54#include <linux/slab.h> 54#include <linux/slab.h>
55#include <linux/ioport.h> 55#include <linux/ioport.h>
56#include <linux/pci.h> 56#include <linux/pci.h>
57#include <linux/i2c.h> 57#include <linux/platform_device.h>
58#include <linux/i2c-isa.h>
59#include <linux/hwmon.h> 58#include <linux/hwmon.h>
59#include <linux/hwmon-sysfs.h>
60#include <linux/err.h> 60#include <linux/err.h>
61#include <linux/init.h> 61#include <linux/init.h>
62#include <linux/jiffies.h> 62#include <linux/jiffies.h>
@@ -72,17 +72,13 @@ module_param(force_addr, ushort, 0);
72MODULE_PARM_DESC(force_addr, 72MODULE_PARM_DESC(force_addr,
73 "Initialize the base address of the sensors"); 73 "Initialize the base address of the sensors");
74 74
75/* Device address 75static struct platform_device *pdev;
76 Note that we can't determine the ISA address until we have initialized
77 our module */
78static unsigned short address;
79 76
80/* Many SIS5595 constants specified below */ 77/* Many SIS5595 constants specified below */
81 78
82/* Length of ISA address segment */ 79/* Length of ISA address segment */
83#define SIS5595_EXTENT 8 80#define SIS5595_EXTENT 8
84/* PCI Config Registers */ 81/* PCI Config Registers */
85#define SIS5595_REVISION_REG 0x08
86#define SIS5595_BASE_REG 0x68 82#define SIS5595_BASE_REG 0x68
87#define SIS5595_PIN_REG 0x7A 83#define SIS5595_PIN_REG 0x7A
88#define SIS5595_ENABLE_REG 0x7B 84#define SIS5595_ENABLE_REG 0x7B
@@ -165,7 +161,8 @@ static inline u8 DIV_TO_REG(int val)
165/* For each registered chip, we need to keep some data in memory. 161/* For each registered chip, we need to keep some data in memory.
166 The structure is dynamically allocated. */ 162 The structure is dynamically allocated. */
167struct sis5595_data { 163struct sis5595_data {
168 struct i2c_client client; 164 unsigned short addr;
165 const char *name;
169 struct class_device *class_dev; 166 struct class_device *class_dev;
170 struct mutex lock; 167 struct mutex lock;
171 168
@@ -189,102 +186,88 @@ struct sis5595_data {
189 186
190static struct pci_dev *s_bridge; /* pointer to the (only) sis5595 */ 187static struct pci_dev *s_bridge; /* pointer to the (only) sis5595 */
191 188
192static int sis5595_detect(struct i2c_adapter *adapter); 189static int sis5595_probe(struct platform_device *pdev);
193static int sis5595_detach_client(struct i2c_client *client); 190static int sis5595_remove(struct platform_device *pdev);
194 191
195static int sis5595_read_value(struct i2c_client *client, u8 reg); 192static int sis5595_read_value(struct sis5595_data *data, u8 reg);
196static int sis5595_write_value(struct i2c_client *client, u8 reg, u8 value); 193static void sis5595_write_value(struct sis5595_data *data, u8 reg, u8 value);
197static struct sis5595_data *sis5595_update_device(struct device *dev); 194static struct sis5595_data *sis5595_update_device(struct device *dev);
198static void sis5595_init_client(struct i2c_client *client); 195static void sis5595_init_device(struct sis5595_data *data);
199 196
200static struct i2c_driver sis5595_driver = { 197static struct platform_driver sis5595_driver = {
201 .driver = { 198 .driver = {
202 .owner = THIS_MODULE, 199 .owner = THIS_MODULE,
203 .name = "sis5595", 200 .name = "sis5595",
204 }, 201 },
205 .attach_adapter = sis5595_detect, 202 .probe = sis5595_probe,
206 .detach_client = sis5595_detach_client, 203 .remove = __devexit_p(sis5595_remove),
207}; 204};
208 205
209/* 4 Voltages */ 206/* 4 Voltages */
210static ssize_t show_in(struct device *dev, char *buf, int nr) 207static ssize_t show_in(struct device *dev, struct device_attribute *da,
208 char *buf)
211{ 209{
212 struct sis5595_data *data = sis5595_update_device(dev); 210 struct sis5595_data *data = sis5595_update_device(dev);
211 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
212 int nr = attr->index;
213 return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr])); 213 return sprintf(buf, "%d\n", IN_FROM_REG(data->in[nr]));
214} 214}
215 215
216static ssize_t show_in_min(struct device *dev, char *buf, int nr) 216static ssize_t show_in_min(struct device *dev, struct device_attribute *da,
217 char *buf)
217{ 218{
218 struct sis5595_data *data = sis5595_update_device(dev); 219 struct sis5595_data *data = sis5595_update_device(dev);
220 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
221 int nr = attr->index;
219 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr])); 222 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_min[nr]));
220} 223}
221 224
222static ssize_t show_in_max(struct device *dev, char *buf, int nr) 225static ssize_t show_in_max(struct device *dev, struct device_attribute *da,
226 char *buf)
223{ 227{
224 struct sis5595_data *data = sis5595_update_device(dev); 228 struct sis5595_data *data = sis5595_update_device(dev);
229 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
230 int nr = attr->index;
225 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr])); 231 return sprintf(buf, "%d\n", IN_FROM_REG(data->in_max[nr]));
226} 232}
227 233
228static ssize_t set_in_min(struct device *dev, const char *buf, 234static ssize_t set_in_min(struct device *dev, struct device_attribute *da,
229 size_t count, int nr) 235 const char *buf, size_t count)
230{ 236{
231 struct i2c_client *client = to_i2c_client(dev); 237 struct sis5595_data *data = dev_get_drvdata(dev);
232 struct sis5595_data *data = i2c_get_clientdata(client); 238 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
239 int nr = attr->index;
233 unsigned long val = simple_strtoul(buf, NULL, 10); 240 unsigned long val = simple_strtoul(buf, NULL, 10);
234 241
235 mutex_lock(&data->update_lock); 242 mutex_lock(&data->update_lock);
236 data->in_min[nr] = IN_TO_REG(val); 243 data->in_min[nr] = IN_TO_REG(val);
237 sis5595_write_value(client, SIS5595_REG_IN_MIN(nr), data->in_min[nr]); 244 sis5595_write_value(data, SIS5595_REG_IN_MIN(nr), data->in_min[nr]);
238 mutex_unlock(&data->update_lock); 245 mutex_unlock(&data->update_lock);
239 return count; 246 return count;
240} 247}
241 248
242static ssize_t set_in_max(struct device *dev, const char *buf, 249static ssize_t set_in_max(struct device *dev, struct device_attribute *da,
243 size_t count, int nr) 250 const char *buf, size_t count)
244{ 251{
245 struct i2c_client *client = to_i2c_client(dev); 252 struct sis5595_data *data = dev_get_drvdata(dev);
246 struct sis5595_data *data = i2c_get_clientdata(client); 253 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
254 int nr = attr->index;
247 unsigned long val = simple_strtoul(buf, NULL, 10); 255 unsigned long val = simple_strtoul(buf, NULL, 10);
248 256
249 mutex_lock(&data->update_lock); 257 mutex_lock(&data->update_lock);
250 data->in_max[nr] = IN_TO_REG(val); 258 data->in_max[nr] = IN_TO_REG(val);
251 sis5595_write_value(client, SIS5595_REG_IN_MAX(nr), data->in_max[nr]); 259 sis5595_write_value(data, SIS5595_REG_IN_MAX(nr), data->in_max[nr]);
252 mutex_unlock(&data->update_lock); 260 mutex_unlock(&data->update_lock);
253 return count; 261 return count;
254} 262}
255 263
256#define show_in_offset(offset) \ 264#define show_in_offset(offset) \
257static ssize_t \ 265static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
258 show_in##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 266 show_in, NULL, offset); \
259{ \ 267static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
260 return show_in(dev, buf, offset); \ 268 show_in_min, set_in_min, offset); \
261} \ 269static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
262static DEVICE_ATTR(in##offset##_input, S_IRUGO, \ 270 show_in_max, set_in_max, offset);
263 show_in##offset, NULL); \
264static ssize_t \
265 show_in##offset##_min (struct device *dev, struct device_attribute *attr, char *buf) \
266{ \
267 return show_in_min(dev, buf, offset); \
268} \
269static ssize_t \
270 show_in##offset##_max (struct device *dev, struct device_attribute *attr, char *buf) \
271{ \
272 return show_in_max(dev, buf, offset); \
273} \
274static ssize_t set_in##offset##_min (struct device *dev, struct device_attribute *attr, \
275 const char *buf, size_t count) \
276{ \
277 return set_in_min(dev, buf, count, offset); \
278} \
279static ssize_t set_in##offset##_max (struct device *dev, struct device_attribute *attr, \
280 const char *buf, size_t count) \
281{ \
282 return set_in_max(dev, buf, count, offset); \
283} \
284static DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
285 show_in##offset##_min, set_in##offset##_min); \
286static DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
287 show_in##offset##_max, set_in##offset##_max);
288 271
289show_in_offset(0); 272show_in_offset(0);
290show_in_offset(1); 273show_in_offset(1);
@@ -307,13 +290,12 @@ static ssize_t show_temp_over(struct device *dev, struct device_attribute *attr,
307 290
308static ssize_t set_temp_over(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 291static ssize_t set_temp_over(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
309{ 292{
310 struct i2c_client *client = to_i2c_client(dev); 293 struct sis5595_data *data = dev_get_drvdata(dev);
311 struct sis5595_data *data = i2c_get_clientdata(client);
312 long val = simple_strtol(buf, NULL, 10); 294 long val = simple_strtol(buf, NULL, 10);
313 295
314 mutex_lock(&data->update_lock); 296 mutex_lock(&data->update_lock);
315 data->temp_over = TEMP_TO_REG(val); 297 data->temp_over = TEMP_TO_REG(val);
316 sis5595_write_value(client, SIS5595_REG_TEMP_OVER, data->temp_over); 298 sis5595_write_value(data, SIS5595_REG_TEMP_OVER, data->temp_over);
317 mutex_unlock(&data->update_lock); 299 mutex_unlock(&data->update_lock);
318 return count; 300 return count;
319} 301}
@@ -326,13 +308,12 @@ static ssize_t show_temp_hyst(struct device *dev, struct device_attribute *attr,
326 308
327static ssize_t set_temp_hyst(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) 309static ssize_t set_temp_hyst(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
328{ 310{
329 struct i2c_client *client = to_i2c_client(dev); 311 struct sis5595_data *data = dev_get_drvdata(dev);
330 struct sis5595_data *data = i2c_get_clientdata(client);
331 long val = simple_strtol(buf, NULL, 10); 312 long val = simple_strtol(buf, NULL, 10);
332 313
333 mutex_lock(&data->update_lock); 314 mutex_lock(&data->update_lock);
334 data->temp_hyst = TEMP_TO_REG(val); 315 data->temp_hyst = TEMP_TO_REG(val);
335 sis5595_write_value(client, SIS5595_REG_TEMP_HYST, data->temp_hyst); 316 sis5595_write_value(data, SIS5595_REG_TEMP_HYST, data->temp_hyst);
336 mutex_unlock(&data->update_lock); 317 mutex_unlock(&data->update_lock);
337 return count; 318 return count;
338} 319}
@@ -344,37 +325,47 @@ static DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
344 show_temp_hyst, set_temp_hyst); 325 show_temp_hyst, set_temp_hyst);
345 326
346/* 2 Fans */ 327/* 2 Fans */
347static ssize_t show_fan(struct device *dev, char *buf, int nr) 328static ssize_t show_fan(struct device *dev, struct device_attribute *da,
329 char *buf)
348{ 330{
349 struct sis5595_data *data = sis5595_update_device(dev); 331 struct sis5595_data *data = sis5595_update_device(dev);
332 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
333 int nr = attr->index;
350 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr], 334 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
351 DIV_FROM_REG(data->fan_div[nr])) ); 335 DIV_FROM_REG(data->fan_div[nr])) );
352} 336}
353 337
354static ssize_t show_fan_min(struct device *dev, char *buf, int nr) 338static ssize_t show_fan_min(struct device *dev, struct device_attribute *da,
339 char *buf)
355{ 340{
356 struct sis5595_data *data = sis5595_update_device(dev); 341 struct sis5595_data *data = sis5595_update_device(dev);
342 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
343 int nr = attr->index;
357 return sprintf(buf,"%d\n", FAN_FROM_REG(data->fan_min[nr], 344 return sprintf(buf,"%d\n", FAN_FROM_REG(data->fan_min[nr],
358 DIV_FROM_REG(data->fan_div[nr])) ); 345 DIV_FROM_REG(data->fan_div[nr])) );
359} 346}
360 347
361static ssize_t set_fan_min(struct device *dev, const char *buf, 348static ssize_t set_fan_min(struct device *dev, struct device_attribute *da,
362 size_t count, int nr) 349 const char *buf, size_t count)
363{ 350{
364 struct i2c_client *client = to_i2c_client(dev); 351 struct sis5595_data *data = dev_get_drvdata(dev);
365 struct sis5595_data *data = i2c_get_clientdata(client); 352 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
353 int nr = attr->index;
366 unsigned long val = simple_strtoul(buf, NULL, 10); 354 unsigned long val = simple_strtoul(buf, NULL, 10);
367 355
368 mutex_lock(&data->update_lock); 356 mutex_lock(&data->update_lock);
369 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 357 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
370 sis5595_write_value(client, SIS5595_REG_FAN_MIN(nr), data->fan_min[nr]); 358 sis5595_write_value(data, SIS5595_REG_FAN_MIN(nr), data->fan_min[nr]);
371 mutex_unlock(&data->update_lock); 359 mutex_unlock(&data->update_lock);
372 return count; 360 return count;
373} 361}
374 362
375static ssize_t show_fan_div(struct device *dev, char *buf, int nr) 363static ssize_t show_fan_div(struct device *dev, struct device_attribute *da,
364 char *buf)
376{ 365{
377 struct sis5595_data *data = sis5595_update_device(dev); 366 struct sis5595_data *data = sis5595_update_device(dev);
367 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
368 int nr = attr->index;
378 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]) ); 369 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]) );
379} 370}
380 371
@@ -382,11 +373,12 @@ static ssize_t show_fan_div(struct device *dev, char *buf, int nr)
382 determined in part by the fan divisor. This follows the principle of 373 determined in part by the fan divisor. This follows the principle of
383 least surprise; the user doesn't expect the fan minimum to change just 374 least surprise; the user doesn't expect the fan minimum to change just
384 because the divisor changed. */ 375 because the divisor changed. */
385static ssize_t set_fan_div(struct device *dev, const char *buf, 376static ssize_t set_fan_div(struct device *dev, struct device_attribute *da,
386 size_t count, int nr) 377 const char *buf, size_t count)
387{ 378{
388 struct i2c_client *client = to_i2c_client(dev); 379 struct sis5595_data *data = dev_get_drvdata(dev);
389 struct sis5595_data *data = i2c_get_clientdata(client); 380 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
381 int nr = attr->index;
390 unsigned long min; 382 unsigned long min;
391 unsigned long val = simple_strtoul(buf, NULL, 10); 383 unsigned long val = simple_strtoul(buf, NULL, 10);
392 int reg; 384 int reg;
@@ -394,7 +386,7 @@ static ssize_t set_fan_div(struct device *dev, const char *buf,
394 mutex_lock(&data->update_lock); 386 mutex_lock(&data->update_lock);
395 min = FAN_FROM_REG(data->fan_min[nr], 387 min = FAN_FROM_REG(data->fan_min[nr],
396 DIV_FROM_REG(data->fan_div[nr])); 388 DIV_FROM_REG(data->fan_div[nr]));
397 reg = sis5595_read_value(client, SIS5595_REG_FANDIV); 389 reg = sis5595_read_value(data, SIS5595_REG_FANDIV);
398 390
399 switch (val) { 391 switch (val) {
400 case 1: data->fan_div[nr] = 0; break; 392 case 1: data->fan_div[nr] = 0; break;
@@ -402,7 +394,7 @@ static ssize_t set_fan_div(struct device *dev, const char *buf,
402 case 4: data->fan_div[nr] = 2; break; 394 case 4: data->fan_div[nr] = 2; break;
403 case 8: data->fan_div[nr] = 3; break; 395 case 8: data->fan_div[nr] = 3; break;
404 default: 396 default:
405 dev_err(&client->dev, "fan_div value %ld not " 397 dev_err(dev, "fan_div value %ld not "
406 "supported. Choose one of 1, 2, 4 or 8!\n", val); 398 "supported. Choose one of 1, 2, 4 or 8!\n", val);
407 mutex_unlock(&data->update_lock); 399 mutex_unlock(&data->update_lock);
408 return -EINVAL; 400 return -EINVAL;
@@ -416,55 +408,25 @@ static ssize_t set_fan_div(struct device *dev, const char *buf,
416 reg = (reg & 0x3f) | (data->fan_div[nr] << 6); 408 reg = (reg & 0x3f) | (data->fan_div[nr] << 6);
417 break; 409 break;
418 } 410 }
419 sis5595_write_value(client, SIS5595_REG_FANDIV, reg); 411 sis5595_write_value(data, SIS5595_REG_FANDIV, reg);
420 data->fan_min[nr] = 412 data->fan_min[nr] =
421 FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 413 FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
422 sis5595_write_value(client, SIS5595_REG_FAN_MIN(nr), data->fan_min[nr]); 414 sis5595_write_value(data, SIS5595_REG_FAN_MIN(nr), data->fan_min[nr]);
423 mutex_unlock(&data->update_lock); 415 mutex_unlock(&data->update_lock);
424 return count; 416 return count;
425} 417}
426 418
427#define show_fan_offset(offset) \ 419#define show_fan_offset(offset) \
428static ssize_t show_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 420static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
429{ \ 421 show_fan, NULL, offset - 1); \
430 return show_fan(dev, buf, offset - 1); \ 422static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
431} \ 423 show_fan_min, set_fan_min, offset - 1); \
432static ssize_t show_fan_##offset##_min (struct device *dev, struct device_attribute *attr, char *buf) \ 424static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
433{ \ 425 show_fan_div, set_fan_div, offset - 1);
434 return show_fan_min(dev, buf, offset - 1); \
435} \
436static ssize_t show_fan_##offset##_div (struct device *dev, struct device_attribute *attr, char *buf) \
437{ \
438 return show_fan_div(dev, buf, offset - 1); \
439} \
440static ssize_t set_fan_##offset##_min (struct device *dev, struct device_attribute *attr, \
441 const char *buf, size_t count) \
442{ \
443 return set_fan_min(dev, buf, count, offset - 1); \
444} \
445static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_fan_##offset, NULL);\
446static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
447 show_fan_##offset##_min, set_fan_##offset##_min);
448 426
449show_fan_offset(1); 427show_fan_offset(1);
450show_fan_offset(2); 428show_fan_offset(2);
451 429
452static ssize_t set_fan_1_div(struct device *dev, struct device_attribute *attr, const char *buf,
453 size_t count)
454{
455 return set_fan_div(dev, buf, count, 0) ;
456}
457
458static ssize_t set_fan_2_div(struct device *dev, struct device_attribute *attr, const char *buf,
459 size_t count)
460{
461 return set_fan_div(dev, buf, count, 1) ;
462}
463static DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
464 show_fan_1_div, set_fan_1_div);
465static DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR,
466 show_fan_2_div, set_fan_2_div);
467
468/* Alarms */ 430/* Alarms */
469static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, char *buf) 431static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, char *buf)
470{ 432{
@@ -473,28 +435,37 @@ static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, ch
473} 435}
474static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); 436static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
475 437
438static ssize_t show_name(struct device *dev, struct device_attribute *attr,
439 char *buf)
440{
441 struct sis5595_data *data = dev_get_drvdata(dev);
442 return sprintf(buf, "%s\n", data->name);
443}
444static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
445
476static struct attribute *sis5595_attributes[] = { 446static struct attribute *sis5595_attributes[] = {
477 &dev_attr_in0_input.attr, 447 &sensor_dev_attr_in0_input.dev_attr.attr,
478 &dev_attr_in0_min.attr, 448 &sensor_dev_attr_in0_min.dev_attr.attr,
479 &dev_attr_in0_max.attr, 449 &sensor_dev_attr_in0_max.dev_attr.attr,
480 &dev_attr_in1_input.attr, 450 &sensor_dev_attr_in1_input.dev_attr.attr,
481 &dev_attr_in1_min.attr, 451 &sensor_dev_attr_in1_min.dev_attr.attr,
482 &dev_attr_in1_max.attr, 452 &sensor_dev_attr_in1_max.dev_attr.attr,
483 &dev_attr_in2_input.attr, 453 &sensor_dev_attr_in2_input.dev_attr.attr,
484 &dev_attr_in2_min.attr, 454 &sensor_dev_attr_in2_min.dev_attr.attr,
485 &dev_attr_in2_max.attr, 455 &sensor_dev_attr_in2_max.dev_attr.attr,
486 &dev_attr_in3_input.attr, 456 &sensor_dev_attr_in3_input.dev_attr.attr,
487 &dev_attr_in3_min.attr, 457 &sensor_dev_attr_in3_min.dev_attr.attr,
488 &dev_attr_in3_max.attr, 458 &sensor_dev_attr_in3_max.dev_attr.attr,
489 459
490 &dev_attr_fan1_input.attr, 460 &sensor_dev_attr_fan1_input.dev_attr.attr,
491 &dev_attr_fan1_min.attr, 461 &sensor_dev_attr_fan1_min.dev_attr.attr,
492 &dev_attr_fan1_div.attr, 462 &sensor_dev_attr_fan1_div.dev_attr.attr,
493 &dev_attr_fan2_input.attr, 463 &sensor_dev_attr_fan2_input.dev_attr.attr,
494 &dev_attr_fan2_min.attr, 464 &sensor_dev_attr_fan2_min.dev_attr.attr,
495 &dev_attr_fan2_div.attr, 465 &sensor_dev_attr_fan2_div.dev_attr.attr,
496 466
497 &dev_attr_alarms.attr, 467 &dev_attr_alarms.attr,
468 &dev_attr_name.attr,
498 NULL 469 NULL
499}; 470};
500 471
@@ -503,9 +474,9 @@ static const struct attribute_group sis5595_group = {
503}; 474};
504 475
505static struct attribute *sis5595_attributes_opt[] = { 476static struct attribute *sis5595_attributes_opt[] = {
506 &dev_attr_in4_input.attr, 477 &sensor_dev_attr_in4_input.dev_attr.attr,
507 &dev_attr_in4_min.attr, 478 &sensor_dev_attr_in4_min.dev_attr.attr,
508 &dev_attr_in4_max.attr, 479 &sensor_dev_attr_in4_max.dev_attr.attr,
509 480
510 &dev_attr_temp1_input.attr, 481 &dev_attr_temp1_input.attr,
511 &dev_attr_temp1_max.attr, 482 &dev_attr_temp1_max.attr,
@@ -518,68 +489,35 @@ static const struct attribute_group sis5595_group_opt = {
518}; 489};
519 490
520/* This is called when the module is loaded */ 491/* This is called when the module is loaded */
521static int sis5595_detect(struct i2c_adapter *adapter) 492static int __devinit sis5595_probe(struct platform_device *pdev)
522{ 493{
523 int err = 0; 494 int err = 0;
524 int i; 495 int i;
525 struct i2c_client *new_client;
526 struct sis5595_data *data; 496 struct sis5595_data *data;
497 struct resource *res;
527 char val; 498 char val;
528 u16 a;
529 499
530 if (force_addr)
531 address = force_addr & ~(SIS5595_EXTENT - 1);
532 /* Reserve the ISA region */ 500 /* Reserve the ISA region */
533 if (!request_region(address, SIS5595_EXTENT, 501 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
502 if (!request_region(res->start, SIS5595_EXTENT,
534 sis5595_driver.driver.name)) { 503 sis5595_driver.driver.name)) {
535 err = -EBUSY; 504 err = -EBUSY;
536 goto exit; 505 goto exit;
537 } 506 }
538 if (force_addr) {
539 dev_warn(&adapter->dev, "forcing ISA address 0x%04X\n", address);
540 if (PCIBIOS_SUCCESSFUL !=
541 pci_write_config_word(s_bridge, SIS5595_BASE_REG, address))
542 goto exit_release;
543 if (PCIBIOS_SUCCESSFUL !=
544 pci_read_config_word(s_bridge, SIS5595_BASE_REG, &a))
545 goto exit_release;
546 if ((a & ~(SIS5595_EXTENT - 1)) != address)
547 /* doesn't work for some chips? */
548 goto exit_release;
549 }
550
551 if (PCIBIOS_SUCCESSFUL !=
552 pci_read_config_byte(s_bridge, SIS5595_ENABLE_REG, &val)) {
553 goto exit_release;
554 }
555 if ((val & 0x80) == 0) {
556 if (PCIBIOS_SUCCESSFUL !=
557 pci_write_config_byte(s_bridge, SIS5595_ENABLE_REG,
558 val | 0x80))
559 goto exit_release;
560 if (PCIBIOS_SUCCESSFUL !=
561 pci_read_config_byte(s_bridge, SIS5595_ENABLE_REG, &val))
562 goto exit_release;
563 if ((val & 0x80) == 0)
564 /* doesn't work for some chips! */
565 goto exit_release;
566 }
567 507
568 if (!(data = kzalloc(sizeof(struct sis5595_data), GFP_KERNEL))) { 508 if (!(data = kzalloc(sizeof(struct sis5595_data), GFP_KERNEL))) {
569 err = -ENOMEM; 509 err = -ENOMEM;
570 goto exit_release; 510 goto exit_release;
571 } 511 }
572 512
573 new_client = &data->client;
574 new_client->addr = address;
575 mutex_init(&data->lock); 513 mutex_init(&data->lock);
576 i2c_set_clientdata(new_client, data); 514 mutex_init(&data->update_lock);
577 new_client->adapter = adapter; 515 data->addr = res->start;
578 new_client->driver = &sis5595_driver; 516 data->name = "sis5595";
579 new_client->flags = 0; 517 platform_set_drvdata(pdev, data);
580 518
581 /* Check revision and pin registers to determine whether 4 or 5 voltages */ 519 /* Check revision and pin registers to determine whether 4 or 5 voltages */
582 pci_read_config_byte(s_bridge, SIS5595_REVISION_REG, &(data->revision)); 520 pci_read_config_byte(s_bridge, PCI_REVISION_ID, &data->revision);
583 /* 4 voltages, 1 temp */ 521 /* 4 voltages, 1 temp */
584 data->maxins = 3; 522 data->maxins = 3;
585 if (data->revision >= REV2MIN) { 523 if (data->revision >= REV2MIN) {
@@ -589,47 +527,37 @@ static int sis5595_detect(struct i2c_adapter *adapter)
589 data->maxins = 4; 527 data->maxins = 4;
590 } 528 }
591 529
592 /* Fill in the remaining client fields and put it into the global list */
593 strlcpy(new_client->name, "sis5595", I2C_NAME_SIZE);
594
595 data->valid = 0;
596 mutex_init(&data->update_lock);
597
598 /* Tell the I2C layer a new client has arrived */
599 if ((err = i2c_attach_client(new_client)))
600 goto exit_free;
601
602 /* Initialize the SIS5595 chip */ 530 /* Initialize the SIS5595 chip */
603 sis5595_init_client(new_client); 531 sis5595_init_device(data);
604 532
605 /* A few vars need to be filled upon startup */ 533 /* A few vars need to be filled upon startup */
606 for (i = 0; i < 2; i++) { 534 for (i = 0; i < 2; i++) {
607 data->fan_min[i] = sis5595_read_value(new_client, 535 data->fan_min[i] = sis5595_read_value(data,
608 SIS5595_REG_FAN_MIN(i)); 536 SIS5595_REG_FAN_MIN(i));
609 } 537 }
610 538
611 /* Register sysfs hooks */ 539 /* Register sysfs hooks */
612 if ((err = sysfs_create_group(&new_client->dev.kobj, &sis5595_group))) 540 if ((err = sysfs_create_group(&pdev->dev.kobj, &sis5595_group)))
613 goto exit_detach; 541 goto exit_free;
614 if (data->maxins == 4) { 542 if (data->maxins == 4) {
615 if ((err = device_create_file(&new_client->dev, 543 if ((err = device_create_file(&pdev->dev,
616 &dev_attr_in4_input)) 544 &sensor_dev_attr_in4_input.dev_attr))
617 || (err = device_create_file(&new_client->dev, 545 || (err = device_create_file(&pdev->dev,
618 &dev_attr_in4_min)) 546 &sensor_dev_attr_in4_min.dev_attr))
619 || (err = device_create_file(&new_client->dev, 547 || (err = device_create_file(&pdev->dev,
620 &dev_attr_in4_max))) 548 &sensor_dev_attr_in4_max.dev_attr)))
621 goto exit_remove_files; 549 goto exit_remove_files;
622 } else { 550 } else {
623 if ((err = device_create_file(&new_client->dev, 551 if ((err = device_create_file(&pdev->dev,
624 &dev_attr_temp1_input)) 552 &dev_attr_temp1_input))
625 || (err = device_create_file(&new_client->dev, 553 || (err = device_create_file(&pdev->dev,
626 &dev_attr_temp1_max)) 554 &dev_attr_temp1_max))
627 || (err = device_create_file(&new_client->dev, 555 || (err = device_create_file(&pdev->dev,
628 &dev_attr_temp1_max_hyst))) 556 &dev_attr_temp1_max_hyst)))
629 goto exit_remove_files; 557 goto exit_remove_files;
630 } 558 }
631 559
632 data->class_dev = hwmon_device_register(&new_client->dev); 560 data->class_dev = hwmon_device_register(&pdev->dev);
633 if (IS_ERR(data->class_dev)) { 561 if (IS_ERR(data->class_dev)) {
634 err = PTR_ERR(data->class_dev); 562 err = PTR_ERR(data->class_dev);
635 goto exit_remove_files; 563 goto exit_remove_files;
@@ -638,32 +566,26 @@ static int sis5595_detect(struct i2c_adapter *adapter)
638 return 0; 566 return 0;
639 567
640exit_remove_files: 568exit_remove_files:
641 sysfs_remove_group(&new_client->dev.kobj, &sis5595_group); 569 sysfs_remove_group(&pdev->dev.kobj, &sis5595_group);
642 sysfs_remove_group(&new_client->dev.kobj, &sis5595_group_opt); 570 sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_opt);
643exit_detach:
644 i2c_detach_client(new_client);
645exit_free: 571exit_free:
646 kfree(data); 572 kfree(data);
647exit_release: 573exit_release:
648 release_region(address, SIS5595_EXTENT); 574 release_region(res->start, SIS5595_EXTENT);
649exit: 575exit:
650 return err; 576 return err;
651} 577}
652 578
653static int sis5595_detach_client(struct i2c_client *client) 579static int __devexit sis5595_remove(struct platform_device *pdev)
654{ 580{
655 struct sis5595_data *data = i2c_get_clientdata(client); 581 struct sis5595_data *data = platform_get_drvdata(pdev);
656 int err;
657 582
658 hwmon_device_unregister(data->class_dev); 583 hwmon_device_unregister(data->class_dev);
659 sysfs_remove_group(&client->dev.kobj, &sis5595_group); 584 sysfs_remove_group(&pdev->dev.kobj, &sis5595_group);
660 sysfs_remove_group(&client->dev.kobj, &sis5595_group_opt); 585 sysfs_remove_group(&pdev->dev.kobj, &sis5595_group_opt);
661
662 if ((err = i2c_detach_client(client)))
663 return err;
664
665 release_region(client->addr, SIS5595_EXTENT);
666 586
587 release_region(data->addr, SIS5595_EXTENT);
588 platform_set_drvdata(pdev, NULL);
667 kfree(data); 589 kfree(data);
668 590
669 return 0; 591 return 0;
@@ -671,41 +593,37 @@ static int sis5595_detach_client(struct i2c_client *client)
671 593
672 594
673/* ISA access must be locked explicitly. */ 595/* ISA access must be locked explicitly. */
674static int sis5595_read_value(struct i2c_client *client, u8 reg) 596static int sis5595_read_value(struct sis5595_data *data, u8 reg)
675{ 597{
676 int res; 598 int res;
677 599
678 struct sis5595_data *data = i2c_get_clientdata(client);
679 mutex_lock(&data->lock); 600 mutex_lock(&data->lock);
680 outb_p(reg, client->addr + SIS5595_ADDR_REG_OFFSET); 601 outb_p(reg, data->addr + SIS5595_ADDR_REG_OFFSET);
681 res = inb_p(client->addr + SIS5595_DATA_REG_OFFSET); 602 res = inb_p(data->addr + SIS5595_DATA_REG_OFFSET);
682 mutex_unlock(&data->lock); 603 mutex_unlock(&data->lock);
683 return res; 604 return res;
684} 605}
685 606
686static int sis5595_write_value(struct i2c_client *client, u8 reg, u8 value) 607static void sis5595_write_value(struct sis5595_data *data, u8 reg, u8 value)
687{ 608{
688 struct sis5595_data *data = i2c_get_clientdata(client);
689 mutex_lock(&data->lock); 609 mutex_lock(&data->lock);
690 outb_p(reg, client->addr + SIS5595_ADDR_REG_OFFSET); 610 outb_p(reg, data->addr + SIS5595_ADDR_REG_OFFSET);
691 outb_p(value, client->addr + SIS5595_DATA_REG_OFFSET); 611 outb_p(value, data->addr + SIS5595_DATA_REG_OFFSET);
692 mutex_unlock(&data->lock); 612 mutex_unlock(&data->lock);
693 return 0;
694} 613}
695 614
696/* Called when we have found a new SIS5595. */ 615/* Called when we have found a new SIS5595. */
697static void sis5595_init_client(struct i2c_client *client) 616static void __devinit sis5595_init_device(struct sis5595_data *data)
698{ 617{
699 u8 config = sis5595_read_value(client, SIS5595_REG_CONFIG); 618 u8 config = sis5595_read_value(data, SIS5595_REG_CONFIG);
700 if (!(config & 0x01)) 619 if (!(config & 0x01))
701 sis5595_write_value(client, SIS5595_REG_CONFIG, 620 sis5595_write_value(data, SIS5595_REG_CONFIG,
702 (config & 0xf7) | 0x01); 621 (config & 0xf7) | 0x01);
703} 622}
704 623
705static struct sis5595_data *sis5595_update_device(struct device *dev) 624static struct sis5595_data *sis5595_update_device(struct device *dev)
706{ 625{
707 struct i2c_client *client = to_i2c_client(dev); 626 struct sis5595_data *data = dev_get_drvdata(dev);
708 struct sis5595_data *data = i2c_get_clientdata(client);
709 int i; 627 int i;
710 628
711 mutex_lock(&data->update_lock); 629 mutex_lock(&data->update_lock);
@@ -715,35 +633,35 @@ static struct sis5595_data *sis5595_update_device(struct device *dev)
715 633
716 for (i = 0; i <= data->maxins; i++) { 634 for (i = 0; i <= data->maxins; i++) {
717 data->in[i] = 635 data->in[i] =
718 sis5595_read_value(client, SIS5595_REG_IN(i)); 636 sis5595_read_value(data, SIS5595_REG_IN(i));
719 data->in_min[i] = 637 data->in_min[i] =
720 sis5595_read_value(client, 638 sis5595_read_value(data,
721 SIS5595_REG_IN_MIN(i)); 639 SIS5595_REG_IN_MIN(i));
722 data->in_max[i] = 640 data->in_max[i] =
723 sis5595_read_value(client, 641 sis5595_read_value(data,
724 SIS5595_REG_IN_MAX(i)); 642 SIS5595_REG_IN_MAX(i));
725 } 643 }
726 for (i = 0; i < 2; i++) { 644 for (i = 0; i < 2; i++) {
727 data->fan[i] = 645 data->fan[i] =
728 sis5595_read_value(client, SIS5595_REG_FAN(i)); 646 sis5595_read_value(data, SIS5595_REG_FAN(i));
729 data->fan_min[i] = 647 data->fan_min[i] =
730 sis5595_read_value(client, 648 sis5595_read_value(data,
731 SIS5595_REG_FAN_MIN(i)); 649 SIS5595_REG_FAN_MIN(i));
732 } 650 }
733 if (data->maxins == 3) { 651 if (data->maxins == 3) {
734 data->temp = 652 data->temp =
735 sis5595_read_value(client, SIS5595_REG_TEMP); 653 sis5595_read_value(data, SIS5595_REG_TEMP);
736 data->temp_over = 654 data->temp_over =
737 sis5595_read_value(client, SIS5595_REG_TEMP_OVER); 655 sis5595_read_value(data, SIS5595_REG_TEMP_OVER);
738 data->temp_hyst = 656 data->temp_hyst =
739 sis5595_read_value(client, SIS5595_REG_TEMP_HYST); 657 sis5595_read_value(data, SIS5595_REG_TEMP_HYST);
740 } 658 }
741 i = sis5595_read_value(client, SIS5595_REG_FANDIV); 659 i = sis5595_read_value(data, SIS5595_REG_FANDIV);
742 data->fan_div[0] = (i >> 4) & 0x03; 660 data->fan_div[0] = (i >> 4) & 0x03;
743 data->fan_div[1] = i >> 6; 661 data->fan_div[1] = i >> 6;
744 data->alarms = 662 data->alarms =
745 sis5595_read_value(client, SIS5595_REG_ALARM1) | 663 sis5595_read_value(data, SIS5595_REG_ALARM1) |
746 (sis5595_read_value(client, SIS5595_REG_ALARM2) << 8); 664 (sis5595_read_value(data, SIS5595_REG_ALARM2) << 8);
747 data->last_updated = jiffies; 665 data->last_updated = jiffies;
748 data->valid = 1; 666 data->valid = 1;
749 } 667 }
@@ -774,10 +692,50 @@ static int blacklist[] __devinitdata = {
774 PCI_DEVICE_ID_SI_5598, 692 PCI_DEVICE_ID_SI_5598,
775 0 }; 693 0 };
776 694
695static int __devinit sis5595_device_add(unsigned short address)
696{
697 struct resource res = {
698 .start = address,
699 .end = address + SIS5595_EXTENT - 1,
700 .name = "sis5595",
701 .flags = IORESOURCE_IO,
702 };
703 int err;
704
705 pdev = platform_device_alloc("sis5595", address);
706 if (!pdev) {
707 err = -ENOMEM;
708 printk(KERN_ERR "sis5595: Device allocation failed\n");
709 goto exit;
710 }
711
712 err = platform_device_add_resources(pdev, &res, 1);
713 if (err) {
714 printk(KERN_ERR "sis5595: Device resource addition failed "
715 "(%d)\n", err);
716 goto exit_device_put;
717 }
718
719 err = platform_device_add(pdev);
720 if (err) {
721 printk(KERN_ERR "sis5595: Device addition failed (%d)\n",
722 err);
723 goto exit_device_put;
724 }
725
726 return 0;
727
728exit_device_put:
729 platform_device_put(pdev);
730exit:
731 return err;
732}
733
777static int __devinit sis5595_pci_probe(struct pci_dev *dev, 734static int __devinit sis5595_pci_probe(struct pci_dev *dev,
778 const struct pci_device_id *id) 735 const struct pci_device_id *id)
779{ 736{
780 u16 val; 737 u16 address;
738 u8 enable;
781 int *i; 739 int *i;
782 740
783 for (i = blacklist; *i != 0; i++) { 741 for (i = blacklist; *i != 0; i++) {
@@ -790,27 +748,68 @@ static int __devinit sis5595_pci_probe(struct pci_dev *dev,
790 } 748 }
791 } 749 }
792 750
751 force_addr &= ~(SIS5595_EXTENT - 1);
752 if (force_addr) {
753 dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", force_addr);
754 pci_write_config_word(dev, SIS5595_BASE_REG, force_addr);
755 }
756
793 if (PCIBIOS_SUCCESSFUL != 757 if (PCIBIOS_SUCCESSFUL !=
794 pci_read_config_word(dev, SIS5595_BASE_REG, &val)) 758 pci_read_config_word(dev, SIS5595_BASE_REG, &address)) {
759 dev_err(&dev->dev, "Failed to read ISA address\n");
795 return -ENODEV; 760 return -ENODEV;
761 }
796 762
797 address = val & ~(SIS5595_EXTENT - 1); 763 address &= ~(SIS5595_EXTENT - 1);
798 if (address == 0 && force_addr == 0) { 764 if (!address) {
799 dev_err(&dev->dev, "Base address not set - upgrade BIOS or use force_addr=0xaddr\n"); 765 dev_err(&dev->dev, "Base address not set - upgrade BIOS or use force_addr=0xaddr\n");
800 return -ENODEV; 766 return -ENODEV;
801 } 767 }
768 if (force_addr && address != force_addr) {
769 /* doesn't work for some chips? */
770 dev_err(&dev->dev, "Failed to force ISA address\n");
771 return -ENODEV;
772 }
802 773
803 s_bridge = pci_dev_get(dev); 774 if (PCIBIOS_SUCCESSFUL !=
804 if (i2c_isa_add_driver(&sis5595_driver)) { 775 pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable)) {
805 pci_dev_put(s_bridge); 776 dev_err(&dev->dev, "Failed to read enable register\n");
806 s_bridge = NULL; 777 return -ENODEV;
778 }
779 if (!(enable & 0x80)) {
780 if ((PCIBIOS_SUCCESSFUL !=
781 pci_write_config_byte(dev, SIS5595_ENABLE_REG,
782 enable | 0x80))
783 || (PCIBIOS_SUCCESSFUL !=
784 pci_read_config_byte(dev, SIS5595_ENABLE_REG, &enable))
785 || (!(enable & 0x80))) {
786 /* doesn't work for some chips! */
787 dev_err(&dev->dev, "Failed to enable HWM device\n");
788 return -ENODEV;
789 }
807 } 790 }
808 791
792 if (platform_driver_register(&sis5595_driver)) {
793 dev_dbg(&dev->dev, "Failed to register sis5595 driver\n");
794 goto exit;
795 }
796
797 s_bridge = pci_dev_get(dev);
798 /* Sets global pdev as a side effect */
799 if (sis5595_device_add(address))
800 goto exit_unregister;
801
809 /* Always return failure here. This is to allow other drivers to bind 802 /* Always return failure here. This is to allow other drivers to bind
810 * to this pci device. We don't really want to have control over the 803 * to this pci device. We don't really want to have control over the
811 * pci device, we only wanted to read as few register values from it. 804 * pci device, we only wanted to read as few register values from it.
812 */ 805 */
813 return -ENODEV; 806 return -ENODEV;
807
808exit_unregister:
809 pci_dev_put(dev);
810 platform_driver_unregister(&sis5595_driver);
811exit:
812 return -ENODEV;
814} 813}
815 814
816static struct pci_driver sis5595_pci_driver = { 815static struct pci_driver sis5595_pci_driver = {
@@ -828,7 +827,8 @@ static void __exit sm_sis5595_exit(void)
828{ 827{
829 pci_unregister_driver(&sis5595_pci_driver); 828 pci_unregister_driver(&sis5595_pci_driver);
830 if (s_bridge != NULL) { 829 if (s_bridge != NULL) {
831 i2c_isa_del_driver(&sis5595_driver); 830 platform_device_unregister(pdev);
831 platform_driver_unregister(&sis5595_driver);
832 pci_dev_put(s_bridge); 832 pci_dev_put(s_bridge);
833 s_bridge = NULL; 833 s_bridge = NULL;
834 } 834 }
diff --git a/drivers/hwmon/smsc47b397.c b/drivers/hwmon/smsc47b397.c
index 943abbd95a..45266b30ce 100644
--- a/drivers/hwmon/smsc47b397.c
+++ b/drivers/hwmon/smsc47b397.c
@@ -174,6 +174,8 @@ static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_temp, NULL, 3);
174 REG: count of 90kHz pulses / revolution */ 174 REG: count of 90kHz pulses / revolution */
175static int fan_from_reg(u16 reg) 175static int fan_from_reg(u16 reg)
176{ 176{
177 if (reg == 0 || reg == 0xffff)
178 return 0;
177 return 90000 * 60 / reg; 179 return 90000 * 60 / reg;
178} 180}
179 181
@@ -333,7 +335,7 @@ static int __init smsc47b397_find(unsigned short *addr)
333 superio_enter(); 335 superio_enter();
334 id = superio_inb(SUPERIO_REG_DEVID); 336 id = superio_inb(SUPERIO_REG_DEVID);
335 337
336 if ((id != 0x6f) && (id != 0x81)) { 338 if ((id != 0x6f) && (id != 0x81) && (id != 0x85)) {
337 superio_exit(); 339 superio_exit();
338 return -ENODEV; 340 return -ENODEV;
339 } 341 }
@@ -346,7 +348,8 @@ static int __init smsc47b397_find(unsigned short *addr)
346 348
347 printk(KERN_INFO DRVNAME ": found SMSC %s " 349 printk(KERN_INFO DRVNAME ": found SMSC %s "
348 "(base address 0x%04x, revision %u)\n", 350 "(base address 0x%04x, revision %u)\n",
349 id == 0x81 ? "SCH5307-NS" : "LPC47B397-NC", *addr, rev); 351 id == 0x81 ? "SCH5307-NS" : id == 0x85 ? "SCH5317" :
352 "LPC47B397-NC", *addr, rev);
350 353
351 superio_exit(); 354 superio_exit();
352 return 0; 355 return 0;
diff --git a/drivers/hwmon/smsc47m1.c b/drivers/hwmon/smsc47m1.c
index 1e21c8cc94..1de2f2be87 100644
--- a/drivers/hwmon/smsc47m1.c
+++ b/drivers/hwmon/smsc47m1.c
@@ -597,6 +597,7 @@ static int __devinit smsc47m1_probe(struct platform_device *pdev)
597error_remove_files: 597error_remove_files:
598 sysfs_remove_group(&dev->kobj, &smsc47m1_group); 598 sysfs_remove_group(&dev->kobj, &smsc47m1_group);
599error_free: 599error_free:
600 platform_set_drvdata(pdev, NULL);
600 kfree(data); 601 kfree(data);
601error_release: 602error_release:
602 release_region(res->start, SMSC_EXTENT); 603 release_region(res->start, SMSC_EXTENT);
@@ -608,12 +609,12 @@ static int __devexit smsc47m1_remove(struct platform_device *pdev)
608 struct smsc47m1_data *data = platform_get_drvdata(pdev); 609 struct smsc47m1_data *data = platform_get_drvdata(pdev);
609 struct resource *res; 610 struct resource *res;
610 611
611 platform_set_drvdata(pdev, NULL);
612 hwmon_device_unregister(data->class_dev); 612 hwmon_device_unregister(data->class_dev);
613 sysfs_remove_group(&pdev->dev.kobj, &smsc47m1_group); 613 sysfs_remove_group(&pdev->dev.kobj, &smsc47m1_group);
614 614
615 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 615 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
616 release_region(res->start, SMSC_EXTENT); 616 release_region(res->start, SMSC_EXTENT);
617 platform_set_drvdata(pdev, NULL);
617 kfree(data); 618 kfree(data);
618 619
619 return 0; 620 return 0;
@@ -693,15 +694,12 @@ static int __init smsc47m1_device_add(unsigned short address,
693 goto exit_device_put; 694 goto exit_device_put;
694 } 695 }
695 696
696 pdev->dev.platform_data = kmalloc(sizeof(struct smsc47m1_sio_data), 697 err = platform_device_add_data(pdev, sio_data,
697 GFP_KERNEL); 698 sizeof(struct smsc47m1_sio_data));
698 if (!pdev->dev.platform_data) { 699 if (err) {
699 err = -ENOMEM;
700 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); 700 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
701 goto exit_device_put; 701 goto exit_device_put;
702 } 702 }
703 memcpy(pdev->dev.platform_data, sio_data,
704 sizeof(struct smsc47m1_sio_data));
705 703
706 err = platform_device_add(pdev); 704 err = platform_device_add(pdev);
707 if (err) { 705 if (err) {
diff --git a/drivers/hwmon/smsc47m192.c b/drivers/hwmon/smsc47m192.c
index a012f396f3..d3a3ba04cb 100644
--- a/drivers/hwmon/smsc47m192.c
+++ b/drivers/hwmon/smsc47m192.c
@@ -31,6 +31,7 @@
31#include <linux/hwmon-vid.h> 31#include <linux/hwmon-vid.h>
32#include <linux/err.h> 32#include <linux/err.h>
33#include <linux/sysfs.h> 33#include <linux/sysfs.h>
34#include <linux/mutex.h>
34 35
35/* Addresses to scan */ 36/* Addresses to scan */
36static unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END }; 37static unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END };
@@ -97,7 +98,7 @@ static inline int TEMP_FROM_REG(s8 val)
97struct smsc47m192_data { 98struct smsc47m192_data {
98 struct i2c_client client; 99 struct i2c_client client;
99 struct class_device *class_dev; 100 struct class_device *class_dev;
100 struct semaphore update_lock; 101 struct mutex update_lock;
101 char valid; /* !=0 if following fields are valid */ 102 char valid; /* !=0 if following fields are valid */
102 unsigned long last_updated; /* In jiffies */ 103 unsigned long last_updated; /* In jiffies */
103 104
@@ -164,11 +165,11 @@ static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
164 struct smsc47m192_data *data = i2c_get_clientdata(client); 165 struct smsc47m192_data *data = i2c_get_clientdata(client);
165 unsigned long val = simple_strtoul(buf, NULL, 10); 166 unsigned long val = simple_strtoul(buf, NULL, 10);
166 167
167 down(&data->update_lock); 168 mutex_lock(&data->update_lock);
168 data->in_min[nr] = IN_TO_REG(val, nr); 169 data->in_min[nr] = IN_TO_REG(val, nr);
169 i2c_smbus_write_byte_data(client, SMSC47M192_REG_IN_MIN(nr), 170 i2c_smbus_write_byte_data(client, SMSC47M192_REG_IN_MIN(nr),
170 data->in_min[nr]); 171 data->in_min[nr]);
171 up(&data->update_lock); 172 mutex_unlock(&data->update_lock);
172 return count; 173 return count;
173} 174}
174 175
@@ -181,11 +182,11 @@ static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
181 struct smsc47m192_data *data = i2c_get_clientdata(client); 182 struct smsc47m192_data *data = i2c_get_clientdata(client);
182 unsigned long val = simple_strtoul(buf, NULL, 10); 183 unsigned long val = simple_strtoul(buf, NULL, 10);
183 184
184 down(&data->update_lock); 185 mutex_lock(&data->update_lock);
185 data->in_max[nr] = IN_TO_REG(val, nr); 186 data->in_max[nr] = IN_TO_REG(val, nr);
186 i2c_smbus_write_byte_data(client, SMSC47M192_REG_IN_MAX(nr), 187 i2c_smbus_write_byte_data(client, SMSC47M192_REG_IN_MAX(nr),
187 data->in_max[nr]); 188 data->in_max[nr]);
188 up(&data->update_lock); 189 mutex_unlock(&data->update_lock);
189 return count; 190 return count;
190} 191}
191 192
@@ -243,11 +244,11 @@ static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
243 struct smsc47m192_data *data = i2c_get_clientdata(client); 244 struct smsc47m192_data *data = i2c_get_clientdata(client);
244 long val = simple_strtol(buf, NULL, 10); 245 long val = simple_strtol(buf, NULL, 10);
245 246
246 down(&data->update_lock); 247 mutex_lock(&data->update_lock);
247 data->temp_min[nr] = TEMP_TO_REG(val); 248 data->temp_min[nr] = TEMP_TO_REG(val);
248 i2c_smbus_write_byte_data(client, SMSC47M192_REG_TEMP_MIN[nr], 249 i2c_smbus_write_byte_data(client, SMSC47M192_REG_TEMP_MIN[nr],
249 data->temp_min[nr]); 250 data->temp_min[nr]);
250 up(&data->update_lock); 251 mutex_unlock(&data->update_lock);
251 return count; 252 return count;
252} 253}
253 254
@@ -260,11 +261,11 @@ static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
260 struct smsc47m192_data *data = i2c_get_clientdata(client); 261 struct smsc47m192_data *data = i2c_get_clientdata(client);
261 long val = simple_strtol(buf, NULL, 10); 262 long val = simple_strtol(buf, NULL, 10);
262 263
263 down(&data->update_lock); 264 mutex_lock(&data->update_lock);
264 data->temp_max[nr] = TEMP_TO_REG(val); 265 data->temp_max[nr] = TEMP_TO_REG(val);
265 i2c_smbus_write_byte_data(client, SMSC47M192_REG_TEMP_MAX[nr], 266 i2c_smbus_write_byte_data(client, SMSC47M192_REG_TEMP_MAX[nr],
266 data->temp_max[nr]); 267 data->temp_max[nr]);
267 up(&data->update_lock); 268 mutex_unlock(&data->update_lock);
268 return count; 269 return count;
269} 270}
270 271
@@ -287,7 +288,7 @@ static ssize_t set_temp_offset(struct device *dev, struct device_attribute
287 u8 sfr = i2c_smbus_read_byte_data(client, SMSC47M192_REG_SFR); 288 u8 sfr = i2c_smbus_read_byte_data(client, SMSC47M192_REG_SFR);
288 long val = simple_strtol(buf, NULL, 10); 289 long val = simple_strtol(buf, NULL, 10);
289 290
290 down(&data->update_lock); 291 mutex_lock(&data->update_lock);
291 data->temp_offset[nr] = TEMP_TO_REG(val); 292 data->temp_offset[nr] = TEMP_TO_REG(val);
292 if (nr>1) 293 if (nr>1)
293 i2c_smbus_write_byte_data(client, 294 i2c_smbus_write_byte_data(client,
@@ -303,7 +304,7 @@ static ssize_t set_temp_offset(struct device *dev, struct device_attribute
303 } else if ((sfr & 0x10) == (nr==0 ? 0x10 : 0)) 304 } else if ((sfr & 0x10) == (nr==0 ? 0x10 : 0))
304 i2c_smbus_write_byte_data(client, 305 i2c_smbus_write_byte_data(client,
305 SMSC47M192_REG_TEMP_OFFSET(nr), 0); 306 SMSC47M192_REG_TEMP_OFFSET(nr), 0);
306 up(&data->update_lock); 307 mutex_unlock(&data->update_lock);
307 return count; 308 return count;
308} 309}
309 310
@@ -360,8 +361,8 @@ static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
360static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 0x0010); 361static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 0x0010);
361static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 0x0020); 362static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 0x0020);
362static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 0x0040); 363static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 0x0040);
363static SENSOR_DEVICE_ATTR(temp2_input_fault, S_IRUGO, show_alarm, NULL, 0x4000); 364static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_alarm, NULL, 0x4000);
364static SENSOR_DEVICE_ATTR(temp3_input_fault, S_IRUGO, show_alarm, NULL, 0x8000); 365static SENSOR_DEVICE_ATTR(temp3_fault, S_IRUGO, show_alarm, NULL, 0x8000);
365static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0x0001); 366static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0x0001);
366static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 0x0002); 367static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 0x0002);
367static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 0x0004); 368static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 0x0004);
@@ -411,13 +412,13 @@ static struct attribute *smsc47m192_attributes[] = {
411 &sensor_dev_attr_temp2_min.dev_attr.attr, 412 &sensor_dev_attr_temp2_min.dev_attr.attr,
412 &sensor_dev_attr_temp2_offset.dev_attr.attr, 413 &sensor_dev_attr_temp2_offset.dev_attr.attr,
413 &sensor_dev_attr_temp2_alarm.dev_attr.attr, 414 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
414 &sensor_dev_attr_temp2_input_fault.dev_attr.attr, 415 &sensor_dev_attr_temp2_fault.dev_attr.attr,
415 &sensor_dev_attr_temp3_input.dev_attr.attr, 416 &sensor_dev_attr_temp3_input.dev_attr.attr,
416 &sensor_dev_attr_temp3_max.dev_attr.attr, 417 &sensor_dev_attr_temp3_max.dev_attr.attr,
417 &sensor_dev_attr_temp3_min.dev_attr.attr, 418 &sensor_dev_attr_temp3_min.dev_attr.attr,
418 &sensor_dev_attr_temp3_offset.dev_attr.attr, 419 &sensor_dev_attr_temp3_offset.dev_attr.attr,
419 &sensor_dev_attr_temp3_alarm.dev_attr.attr, 420 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
420 &sensor_dev_attr_temp3_input_fault.dev_attr.attr, 421 &sensor_dev_attr_temp3_fault.dev_attr.attr,
421 422
422 &dev_attr_cpu0_vid.attr, 423 &dev_attr_cpu0_vid.attr,
423 &dev_attr_vrm.attr, 424 &dev_attr_vrm.attr,
@@ -531,7 +532,7 @@ static int smsc47m192_detect(struct i2c_adapter *adapter, int address,
531 /* Fill in the remaining client fields and put into the global list */ 532 /* Fill in the remaining client fields and put into the global list */
532 strlcpy(client->name, "smsc47m192", I2C_NAME_SIZE); 533 strlcpy(client->name, "smsc47m192", I2C_NAME_SIZE);
533 data->vrm = vid_which_vrm(); 534 data->vrm = vid_which_vrm();
534 init_MUTEX(&data->update_lock); 535 mutex_init(&data->update_lock);
535 536
536 /* Tell the I2C layer a new client has arrived */ 537 /* Tell the I2C layer a new client has arrived */
537 if ((err = i2c_attach_client(client))) 538 if ((err = i2c_attach_client(client)))
@@ -594,7 +595,7 @@ static struct smsc47m192_data *smsc47m192_update_device(struct device *dev)
594 struct smsc47m192_data *data = i2c_get_clientdata(client); 595 struct smsc47m192_data *data = i2c_get_clientdata(client);
595 int i, config; 596 int i, config;
596 597
597 down(&data->update_lock); 598 mutex_lock(&data->update_lock);
598 599
599 if (time_after(jiffies, data->last_updated + HZ + HZ / 2) 600 if (time_after(jiffies, data->last_updated + HZ + HZ / 2)
600 || !data->valid) { 601 || !data->valid) {
@@ -645,7 +646,7 @@ static struct smsc47m192_data *smsc47m192_update_device(struct device *dev)
645 data->valid = 1; 646 data->valid = 1;
646 } 647 }
647 648
648 up(&data->update_lock); 649 mutex_unlock(&data->update_lock);
649 650
650 return data; 651 return data;
651} 652}
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index 9a440c8cc5..24a6851491 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -34,9 +34,9 @@
34#include <linux/slab.h> 34#include <linux/slab.h>
35#include <linux/pci.h> 35#include <linux/pci.h>
36#include <linux/jiffies.h> 36#include <linux/jiffies.h>
37#include <linux/i2c.h> 37#include <linux/platform_device.h>
38#include <linux/i2c-isa.h>
39#include <linux/hwmon.h> 38#include <linux/hwmon.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h> 40#include <linux/err.h>
41#include <linux/init.h> 41#include <linux/init.h>
42#include <linux/mutex.h> 42#include <linux/mutex.h>
@@ -51,10 +51,7 @@ module_param(force_addr, ushort, 0);
51MODULE_PARM_DESC(force_addr, 51MODULE_PARM_DESC(force_addr,
52 "Initialize the base address of the sensors"); 52 "Initialize the base address of the sensors");
53 53
54/* Device address 54static struct platform_device *pdev;
55 Note that we can't determine the ISA address until we have initialized
56 our module */
57static unsigned short address;
58 55
59/* 56/*
60 The Via 686a southbridge has a LM78-like chip integrated on the same IC. 57 The Via 686a southbridge has a LM78-like chip integrated on the same IC.
@@ -295,7 +292,8 @@ static inline long TEMP_FROM_REG10(u16 val)
295/* For each registered chip, we need to keep some data in memory. 292/* For each registered chip, we need to keep some data in memory.
296 The structure is dynamically allocated. */ 293 The structure is dynamically allocated. */
297struct via686a_data { 294struct via686a_data {
298 struct i2c_client client; 295 unsigned short addr;
296 const char *name;
299 struct class_device *class_dev; 297 struct class_device *class_dev;
300 struct mutex update_lock; 298 struct mutex update_lock;
301 char valid; /* !=0 if following fields are valid */ 299 char valid; /* !=0 if following fields are valid */
@@ -315,98 +313,85 @@ struct via686a_data {
315 313
316static struct pci_dev *s_bridge; /* pointer to the (only) via686a */ 314static struct pci_dev *s_bridge; /* pointer to the (only) via686a */
317 315
318static int via686a_detect(struct i2c_adapter *adapter); 316static int via686a_probe(struct platform_device *pdev);
319static int via686a_detach_client(struct i2c_client *client); 317static int via686a_remove(struct platform_device *pdev);
320 318
321static inline int via686a_read_value(struct i2c_client *client, u8 reg) 319static inline int via686a_read_value(struct via686a_data *data, u8 reg)
322{ 320{
323 return (inb_p(client->addr + reg)); 321 return inb_p(data->addr + reg);
324} 322}
325 323
326static inline void via686a_write_value(struct i2c_client *client, u8 reg, 324static inline void via686a_write_value(struct via686a_data *data, u8 reg,
327 u8 value) 325 u8 value)
328{ 326{
329 outb_p(value, client->addr + reg); 327 outb_p(value, data->addr + reg);
330} 328}
331 329
332static struct via686a_data *via686a_update_device(struct device *dev); 330static struct via686a_data *via686a_update_device(struct device *dev);
333static void via686a_init_client(struct i2c_client *client); 331static void via686a_init_device(struct via686a_data *data);
334 332
335/* following are the sysfs callback functions */ 333/* following are the sysfs callback functions */
336 334
337/* 7 voltage sensors */ 335/* 7 voltage sensors */
338static ssize_t show_in(struct device *dev, char *buf, int nr) { 336static ssize_t show_in(struct device *dev, struct device_attribute *da,
337 char *buf) {
339 struct via686a_data *data = via686a_update_device(dev); 338 struct via686a_data *data = via686a_update_device(dev);
339 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
340 int nr = attr->index;
340 return sprintf(buf, "%ld\n", IN_FROM_REG(data->in[nr], nr)); 341 return sprintf(buf, "%ld\n", IN_FROM_REG(data->in[nr], nr));
341} 342}
342 343
343static ssize_t show_in_min(struct device *dev, char *buf, int nr) { 344static ssize_t show_in_min(struct device *dev, struct device_attribute *da,
345 char *buf) {
344 struct via686a_data *data = via686a_update_device(dev); 346 struct via686a_data *data = via686a_update_device(dev);
347 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
348 int nr = attr->index;
345 return sprintf(buf, "%ld\n", IN_FROM_REG(data->in_min[nr], nr)); 349 return sprintf(buf, "%ld\n", IN_FROM_REG(data->in_min[nr], nr));
346} 350}
347 351
348static ssize_t show_in_max(struct device *dev, char *buf, int nr) { 352static ssize_t show_in_max(struct device *dev, struct device_attribute *da,
353 char *buf) {
349 struct via686a_data *data = via686a_update_device(dev); 354 struct via686a_data *data = via686a_update_device(dev);
355 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
356 int nr = attr->index;
350 return sprintf(buf, "%ld\n", IN_FROM_REG(data->in_max[nr], nr)); 357 return sprintf(buf, "%ld\n", IN_FROM_REG(data->in_max[nr], nr));
351} 358}
352 359
353static ssize_t set_in_min(struct device *dev, const char *buf, 360static ssize_t set_in_min(struct device *dev, struct device_attribute *da,
354 size_t count, int nr) { 361 const char *buf, size_t count) {
355 struct i2c_client *client = to_i2c_client(dev); 362 struct via686a_data *data = dev_get_drvdata(dev);
356 struct via686a_data *data = i2c_get_clientdata(client); 363 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
364 int nr = attr->index;
357 unsigned long val = simple_strtoul(buf, NULL, 10); 365 unsigned long val = simple_strtoul(buf, NULL, 10);
358 366
359 mutex_lock(&data->update_lock); 367 mutex_lock(&data->update_lock);
360 data->in_min[nr] = IN_TO_REG(val, nr); 368 data->in_min[nr] = IN_TO_REG(val, nr);
361 via686a_write_value(client, VIA686A_REG_IN_MIN(nr), 369 via686a_write_value(data, VIA686A_REG_IN_MIN(nr),
362 data->in_min[nr]); 370 data->in_min[nr]);
363 mutex_unlock(&data->update_lock); 371 mutex_unlock(&data->update_lock);
364 return count; 372 return count;
365} 373}
366static ssize_t set_in_max(struct device *dev, const char *buf, 374static ssize_t set_in_max(struct device *dev, struct device_attribute *da,
367 size_t count, int nr) { 375 const char *buf, size_t count) {
368 struct i2c_client *client = to_i2c_client(dev); 376 struct via686a_data *data = dev_get_drvdata(dev);
369 struct via686a_data *data = i2c_get_clientdata(client); 377 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
378 int nr = attr->index;
370 unsigned long val = simple_strtoul(buf, NULL, 10); 379 unsigned long val = simple_strtoul(buf, NULL, 10);
371 380
372 mutex_lock(&data->update_lock); 381 mutex_lock(&data->update_lock);
373 data->in_max[nr] = IN_TO_REG(val, nr); 382 data->in_max[nr] = IN_TO_REG(val, nr);
374 via686a_write_value(client, VIA686A_REG_IN_MAX(nr), 383 via686a_write_value(data, VIA686A_REG_IN_MAX(nr),
375 data->in_max[nr]); 384 data->in_max[nr]);
376 mutex_unlock(&data->update_lock); 385 mutex_unlock(&data->update_lock);
377 return count; 386 return count;
378} 387}
379#define show_in_offset(offset) \ 388#define show_in_offset(offset) \
380static ssize_t \ 389static SENSOR_DEVICE_ATTR(in##offset##_input, S_IRUGO, \
381 show_in##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 390 show_in, NULL, offset); \
382{ \ 391static SENSOR_DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
383 return show_in(dev, buf, offset); \ 392 show_in_min, set_in_min, offset); \
384} \ 393static SENSOR_DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
385static ssize_t \ 394 show_in_max, set_in_max, offset);
386 show_in##offset##_min (struct device *dev, struct device_attribute *attr, char *buf) \
387{ \
388 return show_in_min(dev, buf, offset); \
389} \
390static ssize_t \
391 show_in##offset##_max (struct device *dev, struct device_attribute *attr, char *buf) \
392{ \
393 return show_in_max(dev, buf, offset); \
394} \
395static ssize_t set_in##offset##_min (struct device *dev, struct device_attribute *attr, \
396 const char *buf, size_t count) \
397{ \
398 return set_in_min(dev, buf, count, offset); \
399} \
400static ssize_t set_in##offset##_max (struct device *dev, struct device_attribute *attr, \
401 const char *buf, size_t count) \
402{ \
403 return set_in_max(dev, buf, count, offset); \
404} \
405static DEVICE_ATTR(in##offset##_input, S_IRUGO, show_in##offset, NULL);\
406static DEVICE_ATTR(in##offset##_min, S_IRUGO | S_IWUSR, \
407 show_in##offset##_min, set_in##offset##_min); \
408static DEVICE_ATTR(in##offset##_max, S_IRUGO | S_IWUSR, \
409 show_in##offset##_max, set_in##offset##_max);
410 395
411show_in_offset(0); 396show_in_offset(0);
412show_in_offset(1); 397show_in_offset(1);
@@ -415,150 +400,128 @@ show_in_offset(3);
415show_in_offset(4); 400show_in_offset(4);
416 401
417/* 3 temperatures */ 402/* 3 temperatures */
418static ssize_t show_temp(struct device *dev, char *buf, int nr) { 403static ssize_t show_temp(struct device *dev, struct device_attribute *da,
404 char *buf) {
419 struct via686a_data *data = via686a_update_device(dev); 405 struct via686a_data *data = via686a_update_device(dev);
406 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
407 int nr = attr->index;
420 return sprintf(buf, "%ld\n", TEMP_FROM_REG10(data->temp[nr])); 408 return sprintf(buf, "%ld\n", TEMP_FROM_REG10(data->temp[nr]));
421} 409}
422static ssize_t show_temp_over(struct device *dev, char *buf, int nr) { 410static ssize_t show_temp_over(struct device *dev, struct device_attribute *da,
411 char *buf) {
423 struct via686a_data *data = via686a_update_device(dev); 412 struct via686a_data *data = via686a_update_device(dev);
413 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
414 int nr = attr->index;
424 return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_over[nr])); 415 return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_over[nr]));
425} 416}
426static ssize_t show_temp_hyst(struct device *dev, char *buf, int nr) { 417static ssize_t show_temp_hyst(struct device *dev, struct device_attribute *da,
418 char *buf) {
427 struct via686a_data *data = via686a_update_device(dev); 419 struct via686a_data *data = via686a_update_device(dev);
420 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
421 int nr = attr->index;
428 return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_hyst[nr])); 422 return sprintf(buf, "%ld\n", TEMP_FROM_REG(data->temp_hyst[nr]));
429} 423}
430static ssize_t set_temp_over(struct device *dev, const char *buf, 424static ssize_t set_temp_over(struct device *dev, struct device_attribute *da,
431 size_t count, int nr) { 425 const char *buf, size_t count) {
432 struct i2c_client *client = to_i2c_client(dev); 426 struct via686a_data *data = dev_get_drvdata(dev);
433 struct via686a_data *data = i2c_get_clientdata(client); 427 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
428 int nr = attr->index;
434 int val = simple_strtol(buf, NULL, 10); 429 int val = simple_strtol(buf, NULL, 10);
435 430
436 mutex_lock(&data->update_lock); 431 mutex_lock(&data->update_lock);
437 data->temp_over[nr] = TEMP_TO_REG(val); 432 data->temp_over[nr] = TEMP_TO_REG(val);
438 via686a_write_value(client, VIA686A_REG_TEMP_OVER[nr], 433 via686a_write_value(data, VIA686A_REG_TEMP_OVER[nr],
439 data->temp_over[nr]); 434 data->temp_over[nr]);
440 mutex_unlock(&data->update_lock); 435 mutex_unlock(&data->update_lock);
441 return count; 436 return count;
442} 437}
443static ssize_t set_temp_hyst(struct device *dev, const char *buf, 438static ssize_t set_temp_hyst(struct device *dev, struct device_attribute *da,
444 size_t count, int nr) { 439 const char *buf, size_t count) {
445 struct i2c_client *client = to_i2c_client(dev); 440 struct via686a_data *data = dev_get_drvdata(dev);
446 struct via686a_data *data = i2c_get_clientdata(client); 441 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
442 int nr = attr->index;
447 int val = simple_strtol(buf, NULL, 10); 443 int val = simple_strtol(buf, NULL, 10);
448 444
449 mutex_lock(&data->update_lock); 445 mutex_lock(&data->update_lock);
450 data->temp_hyst[nr] = TEMP_TO_REG(val); 446 data->temp_hyst[nr] = TEMP_TO_REG(val);
451 via686a_write_value(client, VIA686A_REG_TEMP_HYST[nr], 447 via686a_write_value(data, VIA686A_REG_TEMP_HYST[nr],
452 data->temp_hyst[nr]); 448 data->temp_hyst[nr]);
453 mutex_unlock(&data->update_lock); 449 mutex_unlock(&data->update_lock);
454 return count; 450 return count;
455} 451}
456#define show_temp_offset(offset) \ 452#define show_temp_offset(offset) \
457static ssize_t show_temp_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 453static SENSOR_DEVICE_ATTR(temp##offset##_input, S_IRUGO, \
458{ \ 454 show_temp, NULL, offset - 1); \
459 return show_temp(dev, buf, offset - 1); \ 455static SENSOR_DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
460} \ 456 show_temp_over, set_temp_over, offset - 1); \
461static ssize_t \ 457static SENSOR_DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
462show_temp_##offset##_over (struct device *dev, struct device_attribute *attr, char *buf) \ 458 show_temp_hyst, set_temp_hyst, offset - 1);
463{ \
464 return show_temp_over(dev, buf, offset - 1); \
465} \
466static ssize_t \
467show_temp_##offset##_hyst (struct device *dev, struct device_attribute *attr, char *buf) \
468{ \
469 return show_temp_hyst(dev, buf, offset - 1); \
470} \
471static ssize_t set_temp_##offset##_over (struct device *dev, struct device_attribute *attr, \
472 const char *buf, size_t count) \
473{ \
474 return set_temp_over(dev, buf, count, offset - 1); \
475} \
476static ssize_t set_temp_##offset##_hyst (struct device *dev, struct device_attribute *attr, \
477 const char *buf, size_t count) \
478{ \
479 return set_temp_hyst(dev, buf, count, offset - 1); \
480} \
481static DEVICE_ATTR(temp##offset##_input, S_IRUGO, show_temp_##offset, NULL);\
482static DEVICE_ATTR(temp##offset##_max, S_IRUGO | S_IWUSR, \
483 show_temp_##offset##_over, set_temp_##offset##_over); \
484static DEVICE_ATTR(temp##offset##_max_hyst, S_IRUGO | S_IWUSR, \
485 show_temp_##offset##_hyst, set_temp_##offset##_hyst);
486 459
487show_temp_offset(1); 460show_temp_offset(1);
488show_temp_offset(2); 461show_temp_offset(2);
489show_temp_offset(3); 462show_temp_offset(3);
490 463
491/* 2 Fans */ 464/* 2 Fans */
492static ssize_t show_fan(struct device *dev, char *buf, int nr) { 465static ssize_t show_fan(struct device *dev, struct device_attribute *da,
466 char *buf) {
493 struct via686a_data *data = via686a_update_device(dev); 467 struct via686a_data *data = via686a_update_device(dev);
468 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
469 int nr = attr->index;
494 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr], 470 return sprintf(buf, "%d\n", FAN_FROM_REG(data->fan[nr],
495 DIV_FROM_REG(data->fan_div[nr])) ); 471 DIV_FROM_REG(data->fan_div[nr])) );
496} 472}
497static ssize_t show_fan_min(struct device *dev, char *buf, int nr) { 473static ssize_t show_fan_min(struct device *dev, struct device_attribute *da,
474 char *buf) {
498 struct via686a_data *data = via686a_update_device(dev); 475 struct via686a_data *data = via686a_update_device(dev);
476 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
477 int nr = attr->index;
499 return sprintf(buf, "%d\n", 478 return sprintf(buf, "%d\n",
500 FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])) ); 479 FAN_FROM_REG(data->fan_min[nr], DIV_FROM_REG(data->fan_div[nr])) );
501} 480}
502static ssize_t show_fan_div(struct device *dev, char *buf, int nr) { 481static ssize_t show_fan_div(struct device *dev, struct device_attribute *da,
482 char *buf) {
503 struct via686a_data *data = via686a_update_device(dev); 483 struct via686a_data *data = via686a_update_device(dev);
484 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
485 int nr = attr->index;
504 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]) ); 486 return sprintf(buf, "%d\n", DIV_FROM_REG(data->fan_div[nr]) );
505} 487}
506static ssize_t set_fan_min(struct device *dev, const char *buf, 488static ssize_t set_fan_min(struct device *dev, struct device_attribute *da,
507 size_t count, int nr) { 489 const char *buf, size_t count) {
508 struct i2c_client *client = to_i2c_client(dev); 490 struct via686a_data *data = dev_get_drvdata(dev);
509 struct via686a_data *data = i2c_get_clientdata(client); 491 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
492 int nr = attr->index;
510 int val = simple_strtol(buf, NULL, 10); 493 int val = simple_strtol(buf, NULL, 10);
511 494
512 mutex_lock(&data->update_lock); 495 mutex_lock(&data->update_lock);
513 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 496 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
514 via686a_write_value(client, VIA686A_REG_FAN_MIN(nr+1), data->fan_min[nr]); 497 via686a_write_value(data, VIA686A_REG_FAN_MIN(nr+1), data->fan_min[nr]);
515 mutex_unlock(&data->update_lock); 498 mutex_unlock(&data->update_lock);
516 return count; 499 return count;
517} 500}
518static ssize_t set_fan_div(struct device *dev, const char *buf, 501static ssize_t set_fan_div(struct device *dev, struct device_attribute *da,
519 size_t count, int nr) { 502 const char *buf, size_t count) {
520 struct i2c_client *client = to_i2c_client(dev); 503 struct via686a_data *data = dev_get_drvdata(dev);
521 struct via686a_data *data = i2c_get_clientdata(client); 504 struct sensor_device_attribute *attr = to_sensor_dev_attr(da);
505 int nr = attr->index;
522 int val = simple_strtol(buf, NULL, 10); 506 int val = simple_strtol(buf, NULL, 10);
523 int old; 507 int old;
524 508
525 mutex_lock(&data->update_lock); 509 mutex_lock(&data->update_lock);
526 old = via686a_read_value(client, VIA686A_REG_FANDIV); 510 old = via686a_read_value(data, VIA686A_REG_FANDIV);
527 data->fan_div[nr] = DIV_TO_REG(val); 511 data->fan_div[nr] = DIV_TO_REG(val);
528 old = (old & 0x0f) | (data->fan_div[1] << 6) | (data->fan_div[0] << 4); 512 old = (old & 0x0f) | (data->fan_div[1] << 6) | (data->fan_div[0] << 4);
529 via686a_write_value(client, VIA686A_REG_FANDIV, old); 513 via686a_write_value(data, VIA686A_REG_FANDIV, old);
530 mutex_unlock(&data->update_lock); 514 mutex_unlock(&data->update_lock);
531 return count; 515 return count;
532} 516}
533 517
534#define show_fan_offset(offset) \ 518#define show_fan_offset(offset) \
535static ssize_t show_fan_##offset (struct device *dev, struct device_attribute *attr, char *buf) \ 519static SENSOR_DEVICE_ATTR(fan##offset##_input, S_IRUGO, \
536{ \ 520 show_fan, NULL, offset - 1); \
537 return show_fan(dev, buf, offset - 1); \ 521static SENSOR_DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
538} \ 522 show_fan_min, set_fan_min, offset - 1); \
539static ssize_t show_fan_##offset##_min (struct device *dev, struct device_attribute *attr, char *buf) \ 523static SENSOR_DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
540{ \ 524 show_fan_div, set_fan_div, offset - 1);
541 return show_fan_min(dev, buf, offset - 1); \
542} \
543static ssize_t show_fan_##offset##_div (struct device *dev, struct device_attribute *attr, char *buf) \
544{ \
545 return show_fan_div(dev, buf, offset - 1); \
546} \
547static ssize_t set_fan_##offset##_min (struct device *dev, struct device_attribute *attr, \
548 const char *buf, size_t count) \
549{ \
550 return set_fan_min(dev, buf, count, offset - 1); \
551} \
552static ssize_t set_fan_##offset##_div (struct device *dev, struct device_attribute *attr, \
553 const char *buf, size_t count) \
554{ \
555 return set_fan_div(dev, buf, count, offset - 1); \
556} \
557static DEVICE_ATTR(fan##offset##_input, S_IRUGO, show_fan_##offset, NULL);\
558static DEVICE_ATTR(fan##offset##_min, S_IRUGO | S_IWUSR, \
559 show_fan_##offset##_min, set_fan_##offset##_min); \
560static DEVICE_ATTR(fan##offset##_div, S_IRUGO | S_IWUSR, \
561 show_fan_##offset##_div, set_fan_##offset##_div);
562 525
563show_fan_offset(1); 526show_fan_offset(1);
564show_fan_offset(2); 527show_fan_offset(2);
@@ -570,41 +533,50 @@ static ssize_t show_alarms(struct device *dev, struct device_attribute *attr, ch
570} 533}
571static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); 534static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
572 535
536static ssize_t show_name(struct device *dev, struct device_attribute
537 *devattr, char *buf)
538{
539 struct via686a_data *data = dev_get_drvdata(dev);
540 return sprintf(buf, "%s\n", data->name);
541}
542static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
543
573static struct attribute *via686a_attributes[] = { 544static struct attribute *via686a_attributes[] = {
574 &dev_attr_in0_input.attr, 545 &sensor_dev_attr_in0_input.dev_attr.attr,
575 &dev_attr_in1_input.attr, 546 &sensor_dev_attr_in1_input.dev_attr.attr,
576 &dev_attr_in2_input.attr, 547 &sensor_dev_attr_in2_input.dev_attr.attr,
577 &dev_attr_in3_input.attr, 548 &sensor_dev_attr_in3_input.dev_attr.attr,
578 &dev_attr_in4_input.attr, 549 &sensor_dev_attr_in4_input.dev_attr.attr,
579 &dev_attr_in0_min.attr, 550 &sensor_dev_attr_in0_min.dev_attr.attr,
580 &dev_attr_in1_min.attr, 551 &sensor_dev_attr_in1_min.dev_attr.attr,
581 &dev_attr_in2_min.attr, 552 &sensor_dev_attr_in2_min.dev_attr.attr,
582 &dev_attr_in3_min.attr, 553 &sensor_dev_attr_in3_min.dev_attr.attr,
583 &dev_attr_in4_min.attr, 554 &sensor_dev_attr_in4_min.dev_attr.attr,
584 &dev_attr_in0_max.attr, 555 &sensor_dev_attr_in0_max.dev_attr.attr,
585 &dev_attr_in1_max.attr, 556 &sensor_dev_attr_in1_max.dev_attr.attr,
586 &dev_attr_in2_max.attr, 557 &sensor_dev_attr_in2_max.dev_attr.attr,
587 &dev_attr_in3_max.attr, 558 &sensor_dev_attr_in3_max.dev_attr.attr,
588 &dev_attr_in4_max.attr, 559 &sensor_dev_attr_in4_max.dev_attr.attr,
589 560
590 &dev_attr_temp1_input.attr, 561 &sensor_dev_attr_temp1_input.dev_attr.attr,
591 &dev_attr_temp2_input.attr, 562 &sensor_dev_attr_temp2_input.dev_attr.attr,
592 &dev_attr_temp3_input.attr, 563 &sensor_dev_attr_temp3_input.dev_attr.attr,
593 &dev_attr_temp1_max.attr, 564 &sensor_dev_attr_temp1_max.dev_attr.attr,
594 &dev_attr_temp2_max.attr, 565 &sensor_dev_attr_temp2_max.dev_attr.attr,
595 &dev_attr_temp3_max.attr, 566 &sensor_dev_attr_temp3_max.dev_attr.attr,
596 &dev_attr_temp1_max_hyst.attr, 567 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
597 &dev_attr_temp2_max_hyst.attr, 568 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
598 &dev_attr_temp3_max_hyst.attr, 569 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
599 570
600 &dev_attr_fan1_input.attr, 571 &sensor_dev_attr_fan1_input.dev_attr.attr,
601 &dev_attr_fan2_input.attr, 572 &sensor_dev_attr_fan2_input.dev_attr.attr,
602 &dev_attr_fan1_min.attr, 573 &sensor_dev_attr_fan1_min.dev_attr.attr,
603 &dev_attr_fan2_min.attr, 574 &sensor_dev_attr_fan2_min.dev_attr.attr,
604 &dev_attr_fan1_div.attr, 575 &sensor_dev_attr_fan1_div.dev_attr.attr,
605 &dev_attr_fan2_div.attr, 576 &sensor_dev_attr_fan2_div.dev_attr.attr,
606 577
607 &dev_attr_alarms.attr, 578 &dev_attr_alarms.attr,
579 &dev_attr_name.attr,
608 NULL 580 NULL
609}; 581};
610 582
@@ -612,58 +584,29 @@ static const struct attribute_group via686a_group = {
612 .attrs = via686a_attributes, 584 .attrs = via686a_attributes,
613}; 585};
614 586
615/* The driver. I choose to use type i2c_driver, as at is identical to both 587static struct platform_driver via686a_driver = {
616 smbus_driver and isa_driver, and clients could be of either kind */
617static struct i2c_driver via686a_driver = {
618 .driver = { 588 .driver = {
619 .owner = THIS_MODULE, 589 .owner = THIS_MODULE,
620 .name = "via686a", 590 .name = "via686a",
621 }, 591 },
622 .attach_adapter = via686a_detect, 592 .probe = via686a_probe,
623 .detach_client = via686a_detach_client, 593 .remove = __devexit_p(via686a_remove),
624}; 594};
625 595
626 596
627/* This is called when the module is loaded */ 597/* This is called when the module is loaded */
628static int via686a_detect(struct i2c_adapter *adapter) 598static int __devinit via686a_probe(struct platform_device *pdev)
629{ 599{
630 struct i2c_client *new_client;
631 struct via686a_data *data; 600 struct via686a_data *data;
632 int err = 0; 601 struct resource *res;
633 const char client_name[] = "via686a"; 602 int err;
634 u16 val;
635
636 /* 8231 requires multiple of 256, we enforce that on 686 as well */
637 if (force_addr) {
638 address = force_addr & 0xFF00;
639 dev_warn(&adapter->dev, "forcing ISA address 0x%04X\n",
640 address);
641 if (PCIBIOS_SUCCESSFUL !=
642 pci_write_config_word(s_bridge, VIA686A_BASE_REG, address))
643 return -ENODEV;
644 }
645 if (PCIBIOS_SUCCESSFUL !=
646 pci_read_config_word(s_bridge, VIA686A_ENABLE_REG, &val))
647 return -ENODEV;
648 if (!(val & 0x0001)) {
649 if (force_addr) {
650 dev_info(&adapter->dev, "enabling sensors\n");
651 if (PCIBIOS_SUCCESSFUL !=
652 pci_write_config_word(s_bridge, VIA686A_ENABLE_REG,
653 val | 0x0001))
654 return -ENODEV;
655 } else {
656 dev_warn(&adapter->dev, "sensors disabled - enable "
657 "with force_addr=0x%x\n", address);
658 return -ENODEV;
659 }
660 }
661 603
662 /* Reserve the ISA region */ 604 /* Reserve the ISA region */
663 if (!request_region(address, VIA686A_EXTENT, 605 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
606 if (!request_region(res->start, VIA686A_EXTENT,
664 via686a_driver.driver.name)) { 607 via686a_driver.driver.name)) {
665 dev_err(&adapter->dev, "region 0x%x already in use!\n", 608 dev_err(&pdev->dev, "Region 0x%lx-0x%lx already in use!\n",
666 address); 609 (unsigned long)res->start, (unsigned long)res->end);
667 return -ENODEV; 610 return -ENODEV;
668 } 611 }
669 612
@@ -672,30 +615,19 @@ static int via686a_detect(struct i2c_adapter *adapter)
672 goto exit_release; 615 goto exit_release;
673 } 616 }
674 617
675 new_client = &data->client; 618 platform_set_drvdata(pdev, data);
676 i2c_set_clientdata(new_client, data); 619 data->addr = res->start;
677 new_client->addr = address; 620 data->name = "via686a";
678 new_client->adapter = adapter;
679 new_client->driver = &via686a_driver;
680 new_client->flags = 0;
681
682 /* Fill in the remaining client fields and put into the global list */
683 strlcpy(new_client->name, client_name, I2C_NAME_SIZE);
684
685 data->valid = 0;
686 mutex_init(&data->update_lock); 621 mutex_init(&data->update_lock);
687 /* Tell the I2C layer a new client has arrived */
688 if ((err = i2c_attach_client(new_client)))
689 goto exit_free;
690 622
691 /* Initialize the VIA686A chip */ 623 /* Initialize the VIA686A chip */
692 via686a_init_client(new_client); 624 via686a_init_device(data);
693 625
694 /* Register sysfs hooks */ 626 /* Register sysfs hooks */
695 if ((err = sysfs_create_group(&new_client->dev.kobj, &via686a_group))) 627 if ((err = sysfs_create_group(&pdev->dev.kobj, &via686a_group)))
696 goto exit_detach; 628 goto exit_free;
697 629
698 data->class_dev = hwmon_device_register(&new_client->dev); 630 data->class_dev = hwmon_device_register(&pdev->dev);
699 if (IS_ERR(data->class_dev)) { 631 if (IS_ERR(data->class_dev)) {
700 err = PTR_ERR(data->class_dev); 632 err = PTR_ERR(data->class_dev);
701 goto exit_remove_files; 633 goto exit_remove_files;
@@ -704,51 +636,46 @@ static int via686a_detect(struct i2c_adapter *adapter)
704 return 0; 636 return 0;
705 637
706exit_remove_files: 638exit_remove_files:
707 sysfs_remove_group(&new_client->dev.kobj, &via686a_group); 639 sysfs_remove_group(&pdev->dev.kobj, &via686a_group);
708exit_detach:
709 i2c_detach_client(new_client);
710exit_free: 640exit_free:
711 kfree(data); 641 kfree(data);
712exit_release: 642exit_release:
713 release_region(address, VIA686A_EXTENT); 643 release_region(res->start, VIA686A_EXTENT);
714 return err; 644 return err;
715} 645}
716 646
717static int via686a_detach_client(struct i2c_client *client) 647static int __devexit via686a_remove(struct platform_device *pdev)
718{ 648{
719 struct via686a_data *data = i2c_get_clientdata(client); 649 struct via686a_data *data = platform_get_drvdata(pdev);
720 int err;
721 650
722 hwmon_device_unregister(data->class_dev); 651 hwmon_device_unregister(data->class_dev);
723 sysfs_remove_group(&client->dev.kobj, &via686a_group); 652 sysfs_remove_group(&pdev->dev.kobj, &via686a_group);
724 653
725 if ((err = i2c_detach_client(client))) 654 release_region(data->addr, VIA686A_EXTENT);
726 return err; 655 platform_set_drvdata(pdev, NULL);
727
728 release_region(client->addr, VIA686A_EXTENT);
729 kfree(data); 656 kfree(data);
730 657
731 return 0; 658 return 0;
732} 659}
733 660
734static void via686a_init_client(struct i2c_client *client) 661static void __devinit via686a_init_device(struct via686a_data *data)
735{ 662{
736 u8 reg; 663 u8 reg;
737 664
738 /* Start monitoring */ 665 /* Start monitoring */
739 reg = via686a_read_value(client, VIA686A_REG_CONFIG); 666 reg = via686a_read_value(data, VIA686A_REG_CONFIG);
740 via686a_write_value(client, VIA686A_REG_CONFIG, (reg|0x01)&0x7F); 667 via686a_write_value(data, VIA686A_REG_CONFIG, (reg | 0x01) & 0x7F);
741 668
742 /* Configure temp interrupt mode for continuous-interrupt operation */ 669 /* Configure temp interrupt mode for continuous-interrupt operation */
743 via686a_write_value(client, VIA686A_REG_TEMP_MODE, 670 reg = via686a_read_value(data, VIA686A_REG_TEMP_MODE);
744 via686a_read_value(client, VIA686A_REG_TEMP_MODE) & 671 via686a_write_value(data, VIA686A_REG_TEMP_MODE,
745 !(VIA686A_TEMP_MODE_MASK | VIA686A_TEMP_MODE_CONTINUOUS)); 672 (reg & ~VIA686A_TEMP_MODE_MASK)
673 | VIA686A_TEMP_MODE_CONTINUOUS);
746} 674}
747 675
748static struct via686a_data *via686a_update_device(struct device *dev) 676static struct via686a_data *via686a_update_device(struct device *dev)
749{ 677{
750 struct i2c_client *client = to_i2c_client(dev); 678 struct via686a_data *data = dev_get_drvdata(dev);
751 struct via686a_data *data = i2c_get_clientdata(client);
752 int i; 679 int i;
753 680
754 mutex_lock(&data->update_lock); 681 mutex_lock(&data->update_lock);
@@ -757,27 +684,27 @@ static struct via686a_data *via686a_update_device(struct device *dev)
757 || !data->valid) { 684 || !data->valid) {
758 for (i = 0; i <= 4; i++) { 685 for (i = 0; i <= 4; i++) {
759 data->in[i] = 686 data->in[i] =
760 via686a_read_value(client, VIA686A_REG_IN(i)); 687 via686a_read_value(data, VIA686A_REG_IN(i));
761 data->in_min[i] = via686a_read_value(client, 688 data->in_min[i] = via686a_read_value(data,
762 VIA686A_REG_IN_MIN 689 VIA686A_REG_IN_MIN
763 (i)); 690 (i));
764 data->in_max[i] = 691 data->in_max[i] =
765 via686a_read_value(client, VIA686A_REG_IN_MAX(i)); 692 via686a_read_value(data, VIA686A_REG_IN_MAX(i));
766 } 693 }
767 for (i = 1; i <= 2; i++) { 694 for (i = 1; i <= 2; i++) {
768 data->fan[i - 1] = 695 data->fan[i - 1] =
769 via686a_read_value(client, VIA686A_REG_FAN(i)); 696 via686a_read_value(data, VIA686A_REG_FAN(i));
770 data->fan_min[i - 1] = via686a_read_value(client, 697 data->fan_min[i - 1] = via686a_read_value(data,
771 VIA686A_REG_FAN_MIN(i)); 698 VIA686A_REG_FAN_MIN(i));
772 } 699 }
773 for (i = 0; i <= 2; i++) { 700 for (i = 0; i <= 2; i++) {
774 data->temp[i] = via686a_read_value(client, 701 data->temp[i] = via686a_read_value(data,
775 VIA686A_REG_TEMP[i]) << 2; 702 VIA686A_REG_TEMP[i]) << 2;
776 data->temp_over[i] = 703 data->temp_over[i] =
777 via686a_read_value(client, 704 via686a_read_value(data,
778 VIA686A_REG_TEMP_OVER[i]); 705 VIA686A_REG_TEMP_OVER[i]);
779 data->temp_hyst[i] = 706 data->temp_hyst[i] =
780 via686a_read_value(client, 707 via686a_read_value(data,
781 VIA686A_REG_TEMP_HYST[i]); 708 VIA686A_REG_TEMP_HYST[i]);
782 } 709 }
783 /* add in lower 2 bits 710 /* add in lower 2 bits
@@ -785,23 +712,23 @@ static struct via686a_data *via686a_update_device(struct device *dev)
785 temp2 uses bits 5-4 of VIA686A_REG_TEMP_LOW23 712 temp2 uses bits 5-4 of VIA686A_REG_TEMP_LOW23
786 temp3 uses bits 7-6 of VIA686A_REG_TEMP_LOW23 713 temp3 uses bits 7-6 of VIA686A_REG_TEMP_LOW23
787 */ 714 */
788 data->temp[0] |= (via686a_read_value(client, 715 data->temp[0] |= (via686a_read_value(data,
789 VIA686A_REG_TEMP_LOW1) 716 VIA686A_REG_TEMP_LOW1)
790 & 0xc0) >> 6; 717 & 0xc0) >> 6;
791 data->temp[1] |= 718 data->temp[1] |=
792 (via686a_read_value(client, VIA686A_REG_TEMP_LOW23) & 719 (via686a_read_value(data, VIA686A_REG_TEMP_LOW23) &
793 0x30) >> 4; 720 0x30) >> 4;
794 data->temp[2] |= 721 data->temp[2] |=
795 (via686a_read_value(client, VIA686A_REG_TEMP_LOW23) & 722 (via686a_read_value(data, VIA686A_REG_TEMP_LOW23) &
796 0xc0) >> 6; 723 0xc0) >> 6;
797 724
798 i = via686a_read_value(client, VIA686A_REG_FANDIV); 725 i = via686a_read_value(data, VIA686A_REG_FANDIV);
799 data->fan_div[0] = (i >> 4) & 0x03; 726 data->fan_div[0] = (i >> 4) & 0x03;
800 data->fan_div[1] = i >> 6; 727 data->fan_div[1] = i >> 6;
801 data->alarms = 728 data->alarms =
802 via686a_read_value(client, 729 via686a_read_value(data,
803 VIA686A_REG_ALARM1) | 730 VIA686A_REG_ALARM1) |
804 (via686a_read_value(client, VIA686A_REG_ALARM2) << 8); 731 (via686a_read_value(data, VIA686A_REG_ALARM2) << 8);
805 data->last_updated = jiffies; 732 data->last_updated = jiffies;
806 data->valid = 1; 733 data->valid = 1;
807 } 734 }
@@ -818,32 +745,102 @@ static struct pci_device_id via686a_pci_ids[] = {
818 745
819MODULE_DEVICE_TABLE(pci, via686a_pci_ids); 746MODULE_DEVICE_TABLE(pci, via686a_pci_ids);
820 747
748static int __devinit via686a_device_add(unsigned short address)
749{
750 struct resource res = {
751 .start = address,
752 .end = address + VIA686A_EXTENT - 1,
753 .name = "via686a",
754 .flags = IORESOURCE_IO,
755 };
756 int err;
757
758 pdev = platform_device_alloc("via686a", address);
759 if (!pdev) {
760 err = -ENOMEM;
761 printk(KERN_ERR "via686a: Device allocation failed\n");
762 goto exit;
763 }
764
765 err = platform_device_add_resources(pdev, &res, 1);
766 if (err) {
767 printk(KERN_ERR "via686a: Device resource addition failed "
768 "(%d)\n", err);
769 goto exit_device_put;
770 }
771
772 err = platform_device_add(pdev);
773 if (err) {
774 printk(KERN_ERR "via686a: Device addition failed (%d)\n",
775 err);
776 goto exit_device_put;
777 }
778
779 return 0;
780
781exit_device_put:
782 platform_device_put(pdev);
783exit:
784 return err;
785}
786
821static int __devinit via686a_pci_probe(struct pci_dev *dev, 787static int __devinit via686a_pci_probe(struct pci_dev *dev,
822 const struct pci_device_id *id) 788 const struct pci_device_id *id)
823{ 789{
824 u16 val; 790 u16 address, val;
825 791
792 if (force_addr) {
793 address = force_addr & ~(VIA686A_EXTENT - 1);
794 dev_warn(&dev->dev, "Forcing ISA address 0x%x\n", address);
795 if (PCIBIOS_SUCCESSFUL !=
796 pci_write_config_word(dev, VIA686A_BASE_REG, address | 1))
797 return -ENODEV;
798 }
826 if (PCIBIOS_SUCCESSFUL != 799 if (PCIBIOS_SUCCESSFUL !=
827 pci_read_config_word(dev, VIA686A_BASE_REG, &val)) 800 pci_read_config_word(dev, VIA686A_BASE_REG, &val))
828 return -ENODEV; 801 return -ENODEV;
829 802
830 address = val & ~(VIA686A_EXTENT - 1); 803 address = val & ~(VIA686A_EXTENT - 1);
831 if (address == 0 && force_addr == 0) { 804 if (address == 0) {
832 dev_err(&dev->dev, "base address not set - upgrade BIOS " 805 dev_err(&dev->dev, "base address not set - upgrade BIOS "
833 "or use force_addr=0xaddr\n"); 806 "or use force_addr=0xaddr\n");
834 return -ENODEV; 807 return -ENODEV;
835 } 808 }
836 809
837 s_bridge = pci_dev_get(dev); 810 if (PCIBIOS_SUCCESSFUL !=
838 if (i2c_isa_add_driver(&via686a_driver)) { 811 pci_read_config_word(dev, VIA686A_ENABLE_REG, &val))
839 pci_dev_put(s_bridge); 812 return -ENODEV;
840 s_bridge = NULL; 813 if (!(val & 0x0001)) {
814 if (!force_addr) {
815 dev_warn(&dev->dev, "Sensors disabled, enable "
816 "with force_addr=0x%x\n", address);
817 return -ENODEV;
818 }
819
820 dev_warn(&dev->dev, "Enabling sensors\n");
821 if (PCIBIOS_SUCCESSFUL !=
822 pci_write_config_word(dev, VIA686A_ENABLE_REG,
823 val | 0x0001))
824 return -ENODEV;
841 } 825 }
842 826
827 if (platform_driver_register(&via686a_driver))
828 goto exit;
829
830 /* Sets global pdev as a side effect */
831 if (via686a_device_add(address))
832 goto exit_unregister;
833
843 /* Always return failure here. This is to allow other drivers to bind 834 /* Always return failure here. This is to allow other drivers to bind
844 * to this pci device. We don't really want to have control over the 835 * to this pci device. We don't really want to have control over the
845 * pci device, we only wanted to read as few register values from it. 836 * pci device, we only wanted to read as few register values from it.
846 */ 837 */
838 s_bridge = pci_dev_get(dev);
839 return -ENODEV;
840
841exit_unregister:
842 platform_driver_unregister(&via686a_driver);
843exit:
847 return -ENODEV; 844 return -ENODEV;
848} 845}
849 846
@@ -862,7 +859,8 @@ static void __exit sm_via686a_exit(void)
862{ 859{
863 pci_unregister_driver(&via686a_pci_driver); 860 pci_unregister_driver(&via686a_pci_driver);
864 if (s_bridge != NULL) { 861 if (s_bridge != NULL) {
865 i2c_isa_del_driver(&via686a_driver); 862 platform_device_unregister(pdev);
863 platform_driver_unregister(&via686a_driver);
866 pci_dev_put(s_bridge); 864 pci_dev_put(s_bridge);
867 s_bridge = NULL; 865 s_bridge = NULL;
868 } 866 }
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index a6a4aa0eee..c604972f01 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -29,8 +29,7 @@
29#include <linux/slab.h> 29#include <linux/slab.h>
30#include <linux/pci.h> 30#include <linux/pci.h>
31#include <linux/jiffies.h> 31#include <linux/jiffies.h>
32#include <linux/i2c.h> 32#include <linux/platform_device.h>
33#include <linux/i2c-isa.h>
34#include <linux/hwmon.h> 33#include <linux/hwmon.h>
35#include <linux/hwmon-sysfs.h> 34#include <linux/hwmon-sysfs.h>
36#include <linux/hwmon-vid.h> 35#include <linux/hwmon-vid.h>
@@ -42,10 +41,7 @@ static int force_addr;
42module_param(force_addr, int, 0); 41module_param(force_addr, int, 0);
43MODULE_PARM_DESC(force_addr, "Initialize the base address of the sensors"); 42MODULE_PARM_DESC(force_addr, "Initialize the base address of the sensors");
44 43
45/* Device address 44static struct platform_device *pdev;
46 Note that we can't determine the ISA address until we have initialized
47 our module */
48static unsigned short isa_address;
49 45
50#define VT8231_EXTENT 0x80 46#define VT8231_EXTENT 0x80
51#define VT8231_BASE_REG 0x70 47#define VT8231_BASE_REG 0x70
@@ -148,7 +144,9 @@ static inline u8 FAN_TO_REG(long rpm, int div)
148#define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : 1310720 / ((val) * (div))) 144#define FAN_FROM_REG(val, div) ((val) == 0 ? 0 : 1310720 / ((val) * (div)))
149 145
150struct vt8231_data { 146struct vt8231_data {
151 struct i2c_client client; 147 unsigned short addr;
148 const char *name;
149
152 struct mutex update_lock; 150 struct mutex update_lock;
153 struct class_device *class_dev; 151 struct class_device *class_dev;
154 char valid; /* !=0 if following fields are valid */ 152 char valid; /* !=0 if following fields are valid */
@@ -168,20 +166,20 @@ struct vt8231_data {
168}; 166};
169 167
170static struct pci_dev *s_bridge; 168static struct pci_dev *s_bridge;
171static int vt8231_detect(struct i2c_adapter *adapter); 169static int vt8231_probe(struct platform_device *pdev);
172static int vt8231_detach_client(struct i2c_client *client); 170static int vt8231_remove(struct platform_device *pdev);
173static struct vt8231_data *vt8231_update_device(struct device *dev); 171static struct vt8231_data *vt8231_update_device(struct device *dev);
174static void vt8231_init_client(struct i2c_client *client); 172static void vt8231_init_device(struct vt8231_data *data);
175 173
176static inline int vt8231_read_value(struct i2c_client *client, u8 reg) 174static inline int vt8231_read_value(struct vt8231_data *data, u8 reg)
177{ 175{
178 return inb_p(client->addr + reg); 176 return inb_p(data->addr + reg);
179} 177}
180 178
181static inline void vt8231_write_value(struct i2c_client *client, u8 reg, 179static inline void vt8231_write_value(struct vt8231_data *data, u8 reg,
182 u8 value) 180 u8 value)
183{ 181{
184 outb_p(value, client->addr + reg); 182 outb_p(value, data->addr + reg);
185} 183}
186 184
187/* following are the sysfs callback functions */ 185/* following are the sysfs callback functions */
@@ -220,13 +218,12 @@ static ssize_t set_in_min(struct device *dev, struct device_attribute *attr,
220{ 218{
221 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 219 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
222 int nr = sensor_attr->index; 220 int nr = sensor_attr->index;
223 struct i2c_client *client = to_i2c_client(dev); 221 struct vt8231_data *data = dev_get_drvdata(dev);
224 struct vt8231_data *data = i2c_get_clientdata(client);
225 unsigned long val = simple_strtoul(buf, NULL, 10); 222 unsigned long val = simple_strtoul(buf, NULL, 10);
226 223
227 mutex_lock(&data->update_lock); 224 mutex_lock(&data->update_lock);
228 data->in_min[nr] = SENSORS_LIMIT(((val * 958) / 10000) + 3, 0, 255); 225 data->in_min[nr] = SENSORS_LIMIT(((val * 958) / 10000) + 3, 0, 255);
229 vt8231_write_value(client, regvoltmin[nr], data->in_min[nr]); 226 vt8231_write_value(data, regvoltmin[nr], data->in_min[nr]);
230 mutex_unlock(&data->update_lock); 227 mutex_unlock(&data->update_lock);
231 return count; 228 return count;
232} 229}
@@ -236,13 +233,12 @@ static ssize_t set_in_max(struct device *dev, struct device_attribute *attr,
236{ 233{
237 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 234 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
238 int nr = sensor_attr->index; 235 int nr = sensor_attr->index;
239 struct i2c_client *client = to_i2c_client(dev); 236 struct vt8231_data *data = dev_get_drvdata(dev);
240 struct vt8231_data *data = i2c_get_clientdata(client);
241 unsigned long val = simple_strtoul(buf, NULL, 10); 237 unsigned long val = simple_strtoul(buf, NULL, 10);
242 238
243 mutex_lock(&data->update_lock); 239 mutex_lock(&data->update_lock);
244 data->in_max[nr] = SENSORS_LIMIT(((val * 958) / 10000) + 3, 0, 255); 240 data->in_max[nr] = SENSORS_LIMIT(((val * 958) / 10000) + 3, 0, 255);
245 vt8231_write_value(client, regvoltmax[nr], data->in_max[nr]); 241 vt8231_write_value(data, regvoltmax[nr], data->in_max[nr]);
246 mutex_unlock(&data->update_lock); 242 mutex_unlock(&data->update_lock);
247 return count; 243 return count;
248} 244}
@@ -278,14 +274,13 @@ static ssize_t show_in5_max(struct device *dev, struct device_attribute *attr,
278static ssize_t set_in5_min(struct device *dev, struct device_attribute *attr, 274static ssize_t set_in5_min(struct device *dev, struct device_attribute *attr,
279 const char *buf, size_t count) 275 const char *buf, size_t count)
280{ 276{
281 struct i2c_client *client = to_i2c_client(dev); 277 struct vt8231_data *data = dev_get_drvdata(dev);
282 struct vt8231_data *data = i2c_get_clientdata(client);
283 unsigned long val = simple_strtoul(buf, NULL, 10); 278 unsigned long val = simple_strtoul(buf, NULL, 10);
284 279
285 mutex_lock(&data->update_lock); 280 mutex_lock(&data->update_lock);
286 data->in_min[5] = SENSORS_LIMIT(((val * 958 * 34) / (10000 * 54)) + 3, 281 data->in_min[5] = SENSORS_LIMIT(((val * 958 * 34) / (10000 * 54)) + 3,
287 0, 255); 282 0, 255);
288 vt8231_write_value(client, regvoltmin[5], data->in_min[5]); 283 vt8231_write_value(data, regvoltmin[5], data->in_min[5]);
289 mutex_unlock(&data->update_lock); 284 mutex_unlock(&data->update_lock);
290 return count; 285 return count;
291} 286}
@@ -293,14 +288,13 @@ static ssize_t set_in5_min(struct device *dev, struct device_attribute *attr,
293static ssize_t set_in5_max(struct device *dev, struct device_attribute *attr, 288static ssize_t set_in5_max(struct device *dev, struct device_attribute *attr,
294 const char *buf, size_t count) 289 const char *buf, size_t count)
295{ 290{
296 struct i2c_client *client = to_i2c_client(dev); 291 struct vt8231_data *data = dev_get_drvdata(dev);
297 struct vt8231_data *data = i2c_get_clientdata(client);
298 unsigned long val = simple_strtoul(buf, NULL, 10); 292 unsigned long val = simple_strtoul(buf, NULL, 10);
299 293
300 mutex_lock(&data->update_lock); 294 mutex_lock(&data->update_lock);
301 data->in_max[5] = SENSORS_LIMIT(((val * 958 * 34) / (10000 * 54)) + 3, 295 data->in_max[5] = SENSORS_LIMIT(((val * 958 * 34) / (10000 * 54)) + 3,
302 0, 255); 296 0, 255);
303 vt8231_write_value(client, regvoltmax[5], data->in_max[5]); 297 vt8231_write_value(data, regvoltmax[5], data->in_max[5]);
304 mutex_unlock(&data->update_lock); 298 mutex_unlock(&data->update_lock);
305 return count; 299 return count;
306} 300}
@@ -348,26 +342,24 @@ static ssize_t show_temp0_min(struct device *dev, struct device_attribute *attr,
348static ssize_t set_temp0_max(struct device *dev, struct device_attribute *attr, 342static ssize_t set_temp0_max(struct device *dev, struct device_attribute *attr,
349 const char *buf, size_t count) 343 const char *buf, size_t count)
350{ 344{
351 struct i2c_client *client = to_i2c_client(dev); 345 struct vt8231_data *data = dev_get_drvdata(dev);
352 struct vt8231_data *data = i2c_get_clientdata(client);
353 int val = simple_strtol(buf, NULL, 10); 346 int val = simple_strtol(buf, NULL, 10);
354 347
355 mutex_lock(&data->update_lock); 348 mutex_lock(&data->update_lock);
356 data->temp_max[0] = SENSORS_LIMIT((val + 500) / 1000, 0, 255); 349 data->temp_max[0] = SENSORS_LIMIT((val + 500) / 1000, 0, 255);
357 vt8231_write_value(client, regtempmax[0], data->temp_max[0]); 350 vt8231_write_value(data, regtempmax[0], data->temp_max[0]);
358 mutex_unlock(&data->update_lock); 351 mutex_unlock(&data->update_lock);
359 return count; 352 return count;
360} 353}
361static ssize_t set_temp0_min(struct device *dev, struct device_attribute *attr, 354static ssize_t set_temp0_min(struct device *dev, struct device_attribute *attr,
362 const char *buf, size_t count) 355 const char *buf, size_t count)
363{ 356{
364 struct i2c_client *client = to_i2c_client(dev); 357 struct vt8231_data *data = dev_get_drvdata(dev);
365 struct vt8231_data *data = i2c_get_clientdata(client);
366 int val = simple_strtol(buf, NULL, 10); 358 int val = simple_strtol(buf, NULL, 10);
367 359
368 mutex_lock(&data->update_lock); 360 mutex_lock(&data->update_lock);
369 data->temp_min[0] = SENSORS_LIMIT((val + 500) / 1000, 0, 255); 361 data->temp_min[0] = SENSORS_LIMIT((val + 500) / 1000, 0, 255);
370 vt8231_write_value(client, regtempmin[0], data->temp_min[0]); 362 vt8231_write_value(data, regtempmin[0], data->temp_min[0]);
371 mutex_unlock(&data->update_lock); 363 mutex_unlock(&data->update_lock);
372 return count; 364 return count;
373} 365}
@@ -404,13 +396,12 @@ static ssize_t set_temp_max(struct device *dev, struct device_attribute *attr,
404{ 396{
405 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 397 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
406 int nr = sensor_attr->index; 398 int nr = sensor_attr->index;
407 struct i2c_client *client = to_i2c_client(dev); 399 struct vt8231_data *data = dev_get_drvdata(dev);
408 struct vt8231_data *data = i2c_get_clientdata(client);
409 int val = simple_strtol(buf, NULL, 10); 400 int val = simple_strtol(buf, NULL, 10);
410 401
411 mutex_lock(&data->update_lock); 402 mutex_lock(&data->update_lock);
412 data->temp_max[nr] = SENSORS_LIMIT(TEMP_MAXMIN_TO_REG(val), 0, 255); 403 data->temp_max[nr] = SENSORS_LIMIT(TEMP_MAXMIN_TO_REG(val), 0, 255);
413 vt8231_write_value(client, regtempmax[nr], data->temp_max[nr]); 404 vt8231_write_value(data, regtempmax[nr], data->temp_max[nr]);
414 mutex_unlock(&data->update_lock); 405 mutex_unlock(&data->update_lock);
415 return count; 406 return count;
416} 407}
@@ -419,13 +410,12 @@ static ssize_t set_temp_min(struct device *dev, struct device_attribute *attr,
419{ 410{
420 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 411 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
421 int nr = sensor_attr->index; 412 int nr = sensor_attr->index;
422 struct i2c_client *client = to_i2c_client(dev); 413 struct vt8231_data *data = dev_get_drvdata(dev);
423 struct vt8231_data *data = i2c_get_clientdata(client);
424 int val = simple_strtol(buf, NULL, 10); 414 int val = simple_strtol(buf, NULL, 10);
425 415
426 mutex_lock(&data->update_lock); 416 mutex_lock(&data->update_lock);
427 data->temp_min[nr] = SENSORS_LIMIT(TEMP_MAXMIN_TO_REG(val), 0, 255); 417 data->temp_min[nr] = SENSORS_LIMIT(TEMP_MAXMIN_TO_REG(val), 0, 255);
428 vt8231_write_value(client, regtempmin[nr], data->temp_min[nr]); 418 vt8231_write_value(data, regtempmin[nr], data->temp_min[nr]);
429 mutex_unlock(&data->update_lock); 419 mutex_unlock(&data->update_lock);
430 return count; 420 return count;
431} 421}
@@ -486,13 +476,12 @@ static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
486{ 476{
487 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 477 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
488 int nr = sensor_attr->index; 478 int nr = sensor_attr->index;
489 struct i2c_client *client = to_i2c_client(dev); 479 struct vt8231_data *data = dev_get_drvdata(dev);
490 struct vt8231_data *data = i2c_get_clientdata(client);
491 int val = simple_strtoul(buf, NULL, 10); 480 int val = simple_strtoul(buf, NULL, 10);
492 481
493 mutex_lock(&data->update_lock); 482 mutex_lock(&data->update_lock);
494 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr])); 483 data->fan_min[nr] = FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
495 vt8231_write_value(client, VT8231_REG_FAN_MIN(nr), data->fan_min[nr]); 484 vt8231_write_value(data, VT8231_REG_FAN_MIN(nr), data->fan_min[nr]);
496 mutex_unlock(&data->update_lock); 485 mutex_unlock(&data->update_lock);
497 return count; 486 return count;
498} 487}
@@ -500,12 +489,11 @@ static ssize_t set_fan_min(struct device *dev, struct device_attribute *attr,
500static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr, 489static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
501 const char *buf, size_t count) 490 const char *buf, size_t count)
502{ 491{
503 struct i2c_client *client = to_i2c_client(dev); 492 struct vt8231_data *data = dev_get_drvdata(dev);
504 struct vt8231_data *data = i2c_get_clientdata(client);
505 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 493 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
506 unsigned long val = simple_strtoul(buf, NULL, 10); 494 unsigned long val = simple_strtoul(buf, NULL, 10);
507 int nr = sensor_attr->index; 495 int nr = sensor_attr->index;
508 int old = vt8231_read_value(client, VT8231_REG_FANDIV); 496 int old = vt8231_read_value(data, VT8231_REG_FANDIV);
509 long min = FAN_FROM_REG(data->fan_min[nr], 497 long min = FAN_FROM_REG(data->fan_min[nr],
510 DIV_FROM_REG(data->fan_div[nr])); 498 DIV_FROM_REG(data->fan_div[nr]));
511 499
@@ -516,7 +504,7 @@ static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
516 case 4: data->fan_div[nr] = 2; break; 504 case 4: data->fan_div[nr] = 2; break;
517 case 8: data->fan_div[nr] = 3; break; 505 case 8: data->fan_div[nr] = 3; break;
518 default: 506 default:
519 dev_err(&client->dev, "fan_div value %ld not supported." 507 dev_err(dev, "fan_div value %ld not supported."
520 "Choose one of 1, 2, 4 or 8!\n", val); 508 "Choose one of 1, 2, 4 or 8!\n", val);
521 mutex_unlock(&data->update_lock); 509 mutex_unlock(&data->update_lock);
522 return -EINVAL; 510 return -EINVAL;
@@ -524,10 +512,10 @@ static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
524 512
525 /* Correct the fan minimum speed */ 513 /* Correct the fan minimum speed */
526 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr])); 514 data->fan_min[nr] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
527 vt8231_write_value(client, VT8231_REG_FAN_MIN(nr), data->fan_min[nr]); 515 vt8231_write_value(data, VT8231_REG_FAN_MIN(nr), data->fan_min[nr]);
528 516
529 old = (old & 0x0f) | (data->fan_div[1] << 6) | (data->fan_div[0] << 4); 517 old = (old & 0x0f) | (data->fan_div[1] << 6) | (data->fan_div[0] << 4);
530 vt8231_write_value(client, VT8231_REG_FANDIV, old); 518 vt8231_write_value(data, VT8231_REG_FANDIV, old);
531 mutex_unlock(&data->update_lock); 519 mutex_unlock(&data->update_lock);
532 return count; 520 return count;
533} 521}
@@ -551,9 +539,16 @@ static ssize_t show_alarms(struct device *dev, struct device_attribute *attr,
551 struct vt8231_data *data = vt8231_update_device(dev); 539 struct vt8231_data *data = vt8231_update_device(dev);
552 return sprintf(buf, "%d\n", data->alarms); 540 return sprintf(buf, "%d\n", data->alarms);
553} 541}
554
555static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL); 542static DEVICE_ATTR(alarms, S_IRUGO, show_alarms, NULL);
556 543
544static ssize_t show_name(struct device *dev, struct device_attribute
545 *devattr, char *buf)
546{
547 struct vt8231_data *data = dev_get_drvdata(dev);
548 return sprintf(buf, "%s\n", data->name);
549}
550static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
551
557static struct attribute *vt8231_attributes_temps[6][4] = { 552static struct attribute *vt8231_attributes_temps[6][4] = {
558 { 553 {
559 &dev_attr_temp1_input.attr, 554 &dev_attr_temp1_input.attr,
@@ -648,6 +643,7 @@ static struct attribute *vt8231_attributes[] = {
648 &sensor_dev_attr_fan1_div.dev_attr.attr, 643 &sensor_dev_attr_fan1_div.dev_attr.attr,
649 &sensor_dev_attr_fan2_div.dev_attr.attr, 644 &sensor_dev_attr_fan2_div.dev_attr.attr,
650 &dev_attr_alarms.attr, 645 &dev_attr_alarms.attr,
646 &dev_attr_name.attr,
651 NULL 647 NULL
652}; 648};
653 649
@@ -655,13 +651,13 @@ static const struct attribute_group vt8231_group = {
655 .attrs = vt8231_attributes, 651 .attrs = vt8231_attributes,
656}; 652};
657 653
658static struct i2c_driver vt8231_driver = { 654static struct platform_driver vt8231_driver = {
659 .driver = { 655 .driver = {
660 .owner = THIS_MODULE, 656 .owner = THIS_MODULE,
661 .name = "vt8231", 657 .name = "vt8231",
662 }, 658 },
663 .attach_adapter = vt8231_detect, 659 .probe = vt8231_probe,
664 .detach_client = vt8231_detach_client, 660 .remove = __devexit_p(vt8231_remove),
665}; 661};
666 662
667static struct pci_device_id vt8231_pci_ids[] = { 663static struct pci_device_id vt8231_pci_ids[] = {
@@ -680,40 +676,18 @@ static struct pci_driver vt8231_pci_driver = {
680 .probe = vt8231_pci_probe, 676 .probe = vt8231_pci_probe,
681}; 677};
682 678
683int vt8231_detect(struct i2c_adapter *adapter) 679int vt8231_probe(struct platform_device *pdev)
684{ 680{
685 struct i2c_client *client; 681 struct resource *res;
686 struct vt8231_data *data; 682 struct vt8231_data *data;
687 int err = 0, i; 683 int err = 0, i;
688 u16 val;
689
690 /* 8231 requires multiple of 256 */
691 if (force_addr) {
692 isa_address = force_addr & 0xFF00;
693 dev_warn(&adapter->dev, "forcing ISA address 0x%04X\n",
694 isa_address);
695 if (PCIBIOS_SUCCESSFUL != pci_write_config_word(s_bridge,
696 VT8231_BASE_REG, isa_address))
697 return -ENODEV;
698 }
699
700 if (PCIBIOS_SUCCESSFUL !=
701 pci_read_config_word(s_bridge, VT8231_ENABLE_REG, &val))
702 return -ENODEV;
703
704 if (!(val & 0x0001)) {
705 dev_warn(&adapter->dev, "enabling sensors\n");
706 if (PCIBIOS_SUCCESSFUL !=
707 pci_write_config_word(s_bridge, VT8231_ENABLE_REG,
708 val | 0x0001))
709 return -ENODEV;
710 }
711 684
712 /* Reserve the ISA region */ 685 /* Reserve the ISA region */
713 if (!request_region(isa_address, VT8231_EXTENT, 686 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
714 vt8231_pci_driver.name)) { 687 if (!request_region(res->start, VT8231_EXTENT,
715 dev_err(&adapter->dev, "region 0x%x already in use!\n", 688 vt8231_driver.driver.name)) {
716 isa_address); 689 dev_err(&pdev->dev, "Region 0x%lx-0x%lx already in use!\n",
690 (unsigned long)res->start, (unsigned long)res->end);
717 return -ENODEV; 691 return -ENODEV;
718 } 692 }
719 693
@@ -722,33 +696,23 @@ int vt8231_detect(struct i2c_adapter *adapter)
722 goto exit_release; 696 goto exit_release;
723 } 697 }
724 698
725 client = &data->client; 699 platform_set_drvdata(pdev, data);
726 i2c_set_clientdata(client, data); 700 data->addr = res->start;
727 client->addr = isa_address; 701 data->name = "vt8231";
728 client->adapter = adapter;
729 client->driver = &vt8231_driver;
730
731 /* Fill in the remaining client fields and put into the global list */
732 strlcpy(client->name, "vt8231", I2C_NAME_SIZE);
733 702
734 mutex_init(&data->update_lock); 703 mutex_init(&data->update_lock);
735 704 vt8231_init_device(data);
736 /* Tell the I2C layer a new client has arrived */
737 if ((err = i2c_attach_client(client)))
738 goto exit_free;
739
740 vt8231_init_client(client);
741 705
742 /* Register sysfs hooks */ 706 /* Register sysfs hooks */
743 if ((err = sysfs_create_group(&client->dev.kobj, &vt8231_group))) 707 if ((err = sysfs_create_group(&pdev->dev.kobj, &vt8231_group)))
744 goto exit_detach; 708 goto exit_free;
745 709
746 /* Must update device information to find out the config field */ 710 /* Must update device information to find out the config field */
747 data->uch_config = vt8231_read_value(client, VT8231_REG_UCH_CONFIG); 711 data->uch_config = vt8231_read_value(data, VT8231_REG_UCH_CONFIG);
748 712
749 for (i = 0; i < ARRAY_SIZE(vt8231_group_temps); i++) { 713 for (i = 0; i < ARRAY_SIZE(vt8231_group_temps); i++) {
750 if (ISTEMP(i, data->uch_config)) { 714 if (ISTEMP(i, data->uch_config)) {
751 if ((err = sysfs_create_group(&client->dev.kobj, 715 if ((err = sysfs_create_group(&pdev->dev.kobj,
752 &vt8231_group_temps[i]))) 716 &vt8231_group_temps[i])))
753 goto exit_remove_files; 717 goto exit_remove_files;
754 } 718 }
@@ -756,13 +720,13 @@ int vt8231_detect(struct i2c_adapter *adapter)
756 720
757 for (i = 0; i < ARRAY_SIZE(vt8231_group_volts); i++) { 721 for (i = 0; i < ARRAY_SIZE(vt8231_group_volts); i++) {
758 if (ISVOLT(i, data->uch_config)) { 722 if (ISVOLT(i, data->uch_config)) {
759 if ((err = sysfs_create_group(&client->dev.kobj, 723 if ((err = sysfs_create_group(&pdev->dev.kobj,
760 &vt8231_group_volts[i]))) 724 &vt8231_group_volts[i])))
761 goto exit_remove_files; 725 goto exit_remove_files;
762 } 726 }
763 } 727 }
764 728
765 data->class_dev = hwmon_device_register(&client->dev); 729 data->class_dev = hwmon_device_register(&pdev->dev);
766 if (IS_ERR(data->class_dev)) { 730 if (IS_ERR(data->class_dev)) {
767 err = PTR_ERR(data->class_dev); 731 err = PTR_ERR(data->class_dev);
768 goto exit_remove_files; 732 goto exit_remove_files;
@@ -771,56 +735,52 @@ int vt8231_detect(struct i2c_adapter *adapter)
771 735
772exit_remove_files: 736exit_remove_files:
773 for (i = 0; i < ARRAY_SIZE(vt8231_group_volts); i++) 737 for (i = 0; i < ARRAY_SIZE(vt8231_group_volts); i++)
774 sysfs_remove_group(&client->dev.kobj, &vt8231_group_volts[i]); 738 sysfs_remove_group(&pdev->dev.kobj, &vt8231_group_volts[i]);
775 739
776 for (i = 0; i < ARRAY_SIZE(vt8231_group_temps); i++) 740 for (i = 0; i < ARRAY_SIZE(vt8231_group_temps); i++)
777 sysfs_remove_group(&client->dev.kobj, &vt8231_group_temps[i]); 741 sysfs_remove_group(&pdev->dev.kobj, &vt8231_group_temps[i]);
742
743 sysfs_remove_group(&pdev->dev.kobj, &vt8231_group);
778 744
779 sysfs_remove_group(&client->dev.kobj, &vt8231_group);
780exit_detach:
781 i2c_detach_client(client);
782exit_free: 745exit_free:
746 platform_set_drvdata(pdev, NULL);
783 kfree(data); 747 kfree(data);
748
784exit_release: 749exit_release:
785 release_region(isa_address, VT8231_EXTENT); 750 release_region(res->start, VT8231_EXTENT);
786 return err; 751 return err;
787} 752}
788 753
789static int vt8231_detach_client(struct i2c_client *client) 754static int vt8231_remove(struct platform_device *pdev)
790{ 755{
791 struct vt8231_data *data = i2c_get_clientdata(client); 756 struct vt8231_data *data = platform_get_drvdata(pdev);
792 int err, i; 757 int i;
793 758
794 hwmon_device_unregister(data->class_dev); 759 hwmon_device_unregister(data->class_dev);
795 760
796 for (i = 0; i < ARRAY_SIZE(vt8231_group_volts); i++) 761 for (i = 0; i < ARRAY_SIZE(vt8231_group_volts); i++)
797 sysfs_remove_group(&client->dev.kobj, &vt8231_group_volts[i]); 762 sysfs_remove_group(&pdev->dev.kobj, &vt8231_group_volts[i]);
798 763
799 for (i = 0; i < ARRAY_SIZE(vt8231_group_temps); i++) 764 for (i = 0; i < ARRAY_SIZE(vt8231_group_temps); i++)
800 sysfs_remove_group(&client->dev.kobj, &vt8231_group_temps[i]); 765 sysfs_remove_group(&pdev->dev.kobj, &vt8231_group_temps[i]);
801 766
802 sysfs_remove_group(&client->dev.kobj, &vt8231_group); 767 sysfs_remove_group(&pdev->dev.kobj, &vt8231_group);
803 768
804 if ((err = i2c_detach_client(client))) { 769 release_region(data->addr, VT8231_EXTENT);
805 return err; 770 platform_set_drvdata(pdev, NULL);
806 }
807
808 release_region(client->addr, VT8231_EXTENT);
809 kfree(data); 771 kfree(data);
810
811 return 0; 772 return 0;
812} 773}
813 774
814static void vt8231_init_client(struct i2c_client *client) 775static void vt8231_init_device(struct vt8231_data *data)
815{ 776{
816 vt8231_write_value(client, VT8231_REG_TEMP1_CONFIG, 0); 777 vt8231_write_value(data, VT8231_REG_TEMP1_CONFIG, 0);
817 vt8231_write_value(client, VT8231_REG_TEMP2_CONFIG, 0); 778 vt8231_write_value(data, VT8231_REG_TEMP2_CONFIG, 0);
818} 779}
819 780
820static struct vt8231_data *vt8231_update_device(struct device *dev) 781static struct vt8231_data *vt8231_update_device(struct device *dev)
821{ 782{
822 struct i2c_client *client = to_i2c_client(dev); 783 struct vt8231_data *data = dev_get_drvdata(dev);
823 struct vt8231_data *data = i2c_get_clientdata(client);
824 int i; 784 int i;
825 u16 low; 785 u16 low;
826 786
@@ -830,41 +790,41 @@ static struct vt8231_data *vt8231_update_device(struct device *dev)
830 || !data->valid) { 790 || !data->valid) {
831 for (i = 0; i < 6; i++) { 791 for (i = 0; i < 6; i++) {
832 if (ISVOLT(i, data->uch_config)) { 792 if (ISVOLT(i, data->uch_config)) {
833 data->in[i] = vt8231_read_value(client, 793 data->in[i] = vt8231_read_value(data,
834 regvolt[i]); 794 regvolt[i]);
835 data->in_min[i] = vt8231_read_value(client, 795 data->in_min[i] = vt8231_read_value(data,
836 regvoltmin[i]); 796 regvoltmin[i]);
837 data->in_max[i] = vt8231_read_value(client, 797 data->in_max[i] = vt8231_read_value(data,
838 regvoltmax[i]); 798 regvoltmax[i]);
839 } 799 }
840 } 800 }
841 for (i = 0; i < 2; i++) { 801 for (i = 0; i < 2; i++) {
842 data->fan[i] = vt8231_read_value(client, 802 data->fan[i] = vt8231_read_value(data,
843 VT8231_REG_FAN(i)); 803 VT8231_REG_FAN(i));
844 data->fan_min[i] = vt8231_read_value(client, 804 data->fan_min[i] = vt8231_read_value(data,
845 VT8231_REG_FAN_MIN(i)); 805 VT8231_REG_FAN_MIN(i));
846 } 806 }
847 807
848 low = vt8231_read_value(client, VT8231_REG_TEMP_LOW01); 808 low = vt8231_read_value(data, VT8231_REG_TEMP_LOW01);
849 low = (low >> 6) | ((low & 0x30) >> 2) 809 low = (low >> 6) | ((low & 0x30) >> 2)
850 | (vt8231_read_value(client, VT8231_REG_TEMP_LOW25) << 4); 810 | (vt8231_read_value(data, VT8231_REG_TEMP_LOW25) << 4);
851 for (i = 0; i < 6; i++) { 811 for (i = 0; i < 6; i++) {
852 if (ISTEMP(i, data->uch_config)) { 812 if (ISTEMP(i, data->uch_config)) {
853 data->temp[i] = (vt8231_read_value(client, 813 data->temp[i] = (vt8231_read_value(data,
854 regtemp[i]) << 2) 814 regtemp[i]) << 2)
855 | ((low >> (2 * i)) & 0x03); 815 | ((low >> (2 * i)) & 0x03);
856 data->temp_max[i] = vt8231_read_value(client, 816 data->temp_max[i] = vt8231_read_value(data,
857 regtempmax[i]); 817 regtempmax[i]);
858 data->temp_min[i] = vt8231_read_value(client, 818 data->temp_min[i] = vt8231_read_value(data,
859 regtempmin[i]); 819 regtempmin[i]);
860 } 820 }
861 } 821 }
862 822
863 i = vt8231_read_value(client, VT8231_REG_FANDIV); 823 i = vt8231_read_value(data, VT8231_REG_FANDIV);
864 data->fan_div[0] = (i >> 4) & 0x03; 824 data->fan_div[0] = (i >> 4) & 0x03;
865 data->fan_div[1] = i >> 6; 825 data->fan_div[1] = i >> 6;
866 data->alarms = vt8231_read_value(client, VT8231_REG_ALARM1) | 826 data->alarms = vt8231_read_value(data, VT8231_REG_ALARM1) |
867 (vt8231_read_value(client, VT8231_REG_ALARM2) << 8); 827 (vt8231_read_value(data, VT8231_REG_ALARM2) << 8);
868 828
869 /* Set alarm flags correctly */ 829 /* Set alarm flags correctly */
870 if (!data->fan[0] && data->fan_min[0]) { 830 if (!data->fan[0] && data->fan_min[0]) {
@@ -888,33 +848,102 @@ static struct vt8231_data *vt8231_update_device(struct device *dev)
888 return data; 848 return data;
889} 849}
890 850
851static int __devinit vt8231_device_add(unsigned short address)
852{
853 struct resource res = {
854 .start = address,
855 .end = address + VT8231_EXTENT - 1,
856 .name = "vt8231",
857 .flags = IORESOURCE_IO,
858 };
859 int err;
860
861 pdev = platform_device_alloc("vt8231", address);
862 if (!pdev) {
863 err = -ENOMEM;
864 printk(KERN_ERR "vt8231: Device allocation failed\n");
865 goto exit;
866 }
867
868 err = platform_device_add_resources(pdev, &res, 1);
869 if (err) {
870 printk(KERN_ERR "vt8231: Device resource addition failed "
871 "(%d)\n", err);
872 goto exit_device_put;
873 }
874
875 err = platform_device_add(pdev);
876 if (err) {
877 printk(KERN_ERR "vt8231: Device addition failed (%d)\n",
878 err);
879 goto exit_device_put;
880 }
881
882 return 0;
883
884exit_device_put:
885 platform_device_put(pdev);
886exit:
887 return err;
888}
889
891static int __devinit vt8231_pci_probe(struct pci_dev *dev, 890static int __devinit vt8231_pci_probe(struct pci_dev *dev,
892 const struct pci_device_id *id) 891 const struct pci_device_id *id)
893{ 892{
894 u16 val; 893 u16 address, val;
894 if (force_addr) {
895 address = force_addr & 0xff00;
896 dev_warn(&dev->dev, "Forcing ISA address 0x%x\n",
897 address);
898
899 if (PCIBIOS_SUCCESSFUL !=
900 pci_write_config_word(dev, VT8231_BASE_REG, address | 1))
901 return -ENODEV;
902 }
895 903
896 if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_BASE_REG, 904 if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_BASE_REG,
897 &val)) 905 &val))
898 return -ENODEV; 906 return -ENODEV;
899 907
900 isa_address = val & ~(VT8231_EXTENT - 1); 908 address = val & ~(VT8231_EXTENT - 1);
901 if (isa_address == 0 && force_addr == 0) { 909 if (address == 0) {
902 dev_err(&dev->dev, "base address not set -\ 910 dev_err(&dev->dev, "base address not set -\
903 upgrade BIOS or use force_addr=0xaddr\n"); 911 upgrade BIOS or use force_addr=0xaddr\n");
904 return -ENODEV; 912 return -ENODEV;
905 } 913 }
906 914
907 s_bridge = pci_dev_get(dev); 915 if (PCIBIOS_SUCCESSFUL != pci_read_config_word(dev, VT8231_ENABLE_REG,
916 &val))
917 return -ENODEV;
908 918
909 if (i2c_isa_add_driver(&vt8231_driver)) { 919 if (!(val & 0x0001)) {
910 pci_dev_put(s_bridge); 920 dev_warn(&dev->dev, "enabling sensors\n");
911 s_bridge = NULL; 921 if (PCIBIOS_SUCCESSFUL !=
922 pci_write_config_word(dev, VT8231_ENABLE_REG,
923 val | 0x0001))
924 return -ENODEV;
912 } 925 }
913 926
927 if (platform_driver_register(&vt8231_driver))
928 goto exit;
929
930 /* Sets global pdev as a side effect */
931 if (vt8231_device_add(address))
932 goto exit_unregister;
933
914 /* Always return failure here. This is to allow other drivers to bind 934 /* Always return failure here. This is to allow other drivers to bind
915 * to this pci device. We don't really want to have control over the 935 * to this pci device. We don't really want to have control over the
916 * pci device, we only wanted to read as few register values from it. 936 * pci device, we only wanted to read as few register values from it.
917 */ 937 */
938
939 /* We do, however, mark ourselves as using the PCI device to stop it
940 getting unloaded. */
941 s_bridge = pci_dev_get(dev);
942 return -ENODEV;
943
944exit_unregister:
945 platform_driver_unregister(&vt8231_driver);
946exit:
918 return -ENODEV; 947 return -ENODEV;
919} 948}
920 949
@@ -927,7 +956,8 @@ static void __exit sm_vt8231_exit(void)
927{ 956{
928 pci_unregister_driver(&vt8231_pci_driver); 957 pci_unregister_driver(&vt8231_pci_driver);
929 if (s_bridge != NULL) { 958 if (s_bridge != NULL) {
930 i2c_isa_del_driver(&vt8231_driver); 959 platform_device_unregister(pdev);
960 platform_driver_unregister(&vt8231_driver);
931 pci_dev_put(s_bridge); 961 pci_dev_put(s_bridge);
932 s_bridge = NULL; 962 s_bridge = NULL;
933 } 963 }
diff --git a/drivers/hwmon/w83627ehf.c b/drivers/hwmon/w83627ehf.c
index 30a76404f0..c51ae2e177 100644
--- a/drivers/hwmon/w83627ehf.c
+++ b/drivers/hwmon/w83627ehf.c
@@ -41,41 +41,39 @@
41#include <linux/module.h> 41#include <linux/module.h>
42#include <linux/init.h> 42#include <linux/init.h>
43#include <linux/slab.h> 43#include <linux/slab.h>
44#include <linux/i2c.h> 44#include <linux/jiffies.h>
45#include <linux/i2c-isa.h> 45#include <linux/platform_device.h>
46#include <linux/hwmon.h> 46#include <linux/hwmon.h>
47#include <linux/hwmon-sysfs.h> 47#include <linux/hwmon-sysfs.h>
48#include <linux/hwmon-vid.h>
48#include <linux/err.h> 49#include <linux/err.h>
49#include <linux/mutex.h> 50#include <linux/mutex.h>
50#include <asm/io.h> 51#include <asm/io.h>
51#include "lm75.h" 52#include "lm75.h"
52 53
53/* The actual ISA address is read from Super-I/O configuration space */ 54enum kinds { w83627ehf, w83627dhg };
54static unsigned short address;
55 55
56/* 56/* used to set data->name = w83627ehf_device_names[data->sio_kind] */
57 * Super-I/O constants and functions 57static const char * w83627ehf_device_names[] = {
58 */ 58 "w83627ehf",
59 "w83627dhg",
60};
61
62#define DRVNAME "w83627ehf"
59 63
60/* 64/*
61 * The three following globals are initialized in w83627ehf_find(), before 65 * Super-I/O constants and functions
62 * the i2c-isa device is created. Otherwise, they could be stored in
63 * w83627ehf_data. This is ugly, but necessary, and when the driver is next
64 * updated to become a platform driver, the globals will disappear.
65 */ 66 */
66static int REG; /* The register to read/write */
67static int VAL; /* The value to read/write */
68/* The w83627ehf/ehg have 10 voltage inputs, but the w83627dhg has 9. This
69 * value is also used in w83627ehf_detect() to export a device name in sysfs
70 * (e.g. w83627ehf or w83627dhg) */
71static int w83627ehf_num_in;
72 67
73#define W83627EHF_LD_HWM 0x0b 68#define W83627EHF_LD_HWM 0x0b
74 69
75#define SIO_REG_LDSEL 0x07 /* Logical device select */ 70#define SIO_REG_LDSEL 0x07 /* Logical device select */
76#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */ 71#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
72#define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
77#define SIO_REG_ENABLE 0x30 /* Logical device enable */ 73#define SIO_REG_ENABLE 0x30 /* Logical device enable */
78#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */ 74#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
75#define SIO_REG_VID_CTRL 0xF0 /* VID control */
76#define SIO_REG_VID_DATA 0xF1 /* VID data */
79 77
80#define SIO_W83627EHF_ID 0x8850 78#define SIO_W83627EHF_ID 0x8850
81#define SIO_W83627EHG_ID 0x8860 79#define SIO_W83627EHG_ID 0x8860
@@ -83,38 +81,38 @@ static int w83627ehf_num_in;
83#define SIO_ID_MASK 0xFFF0 81#define SIO_ID_MASK 0xFFF0
84 82
85static inline void 83static inline void
86superio_outb(int reg, int val) 84superio_outb(int ioreg, int reg, int val)
87{ 85{
88 outb(reg, REG); 86 outb(reg, ioreg);
89 outb(val, VAL); 87 outb(val, ioreg + 1);
90} 88}
91 89
92static inline int 90static inline int
93superio_inb(int reg) 91superio_inb(int ioreg, int reg)
94{ 92{
95 outb(reg, REG); 93 outb(reg, ioreg);
96 return inb(VAL); 94 return inb(ioreg + 1);
97} 95}
98 96
99static inline void 97static inline void
100superio_select(int ld) 98superio_select(int ioreg, int ld)
101{ 99{
102 outb(SIO_REG_LDSEL, REG); 100 outb(SIO_REG_LDSEL, ioreg);
103 outb(ld, VAL); 101 outb(ld, ioreg + 1);
104} 102}
105 103
106static inline void 104static inline void
107superio_enter(void) 105superio_enter(int ioreg)
108{ 106{
109 outb(0x87, REG); 107 outb(0x87, ioreg);
110 outb(0x87, REG); 108 outb(0x87, ioreg);
111} 109}
112 110
113static inline void 111static inline void
114superio_exit(void) 112superio_exit(int ioreg)
115{ 113{
116 outb(0x02, REG); 114 outb(0x02, ioreg);
117 outb(0x02, VAL); 115 outb(0x02, ioreg + 1);
118} 116}
119 117
120/* 118/*
@@ -124,8 +122,8 @@ superio_exit(void)
124#define IOREGION_ALIGNMENT ~7 122#define IOREGION_ALIGNMENT ~7
125#define IOREGION_OFFSET 5 123#define IOREGION_OFFSET 5
126#define IOREGION_LENGTH 2 124#define IOREGION_LENGTH 2
127#define ADDR_REG_OFFSET 5 125#define ADDR_REG_OFFSET 0
128#define DATA_REG_OFFSET 6 126#define DATA_REG_OFFSET 1
129 127
130#define W83627EHF_REG_BANK 0x4E 128#define W83627EHF_REG_BANK 0x4E
131#define W83627EHF_REG_CONFIG 0x40 129#define W83627EHF_REG_CONFIG 0x40
@@ -255,7 +253,9 @@ static inline u8 in_to_reg(u32 val, u8 nr)
255 */ 253 */
256 254
257struct w83627ehf_data { 255struct w83627ehf_data {
258 struct i2c_client client; 256 int addr; /* IO base of hw monitor block */
257 const char *name;
258
259 struct class_device *class_dev; 259 struct class_device *class_dev;
260 struct mutex lock; 260 struct mutex lock;
261 261
@@ -264,6 +264,7 @@ struct w83627ehf_data {
264 unsigned long last_updated; /* In jiffies */ 264 unsigned long last_updated; /* In jiffies */
265 265
266 /* Register values */ 266 /* Register values */
267 u8 in_num; /* number of in inputs we have */
267 u8 in[10]; /* Register value */ 268 u8 in[10]; /* Register value */
268 u8 in_max[10]; /* Register value */ 269 u8 in_max[10]; /* Register value */
269 u8 in_min[10]; /* Register value */ 270 u8 in_min[10]; /* Register value */
@@ -271,6 +272,7 @@ struct w83627ehf_data {
271 u8 fan_min[5]; 272 u8 fan_min[5];
272 u8 fan_div[5]; 273 u8 fan_div[5];
273 u8 has_fan; /* some fan inputs can be disabled */ 274 u8 has_fan; /* some fan inputs can be disabled */
275 u8 temp_type[3];
274 s8 temp1; 276 s8 temp1;
275 s8 temp1_max; 277 s8 temp1_max;
276 s8 temp1_max_hyst; 278 s8 temp1_max_hyst;
@@ -288,6 +290,14 @@ struct w83627ehf_data {
288 290
289 u8 fan_min_output[4]; /* minimum fan speed */ 291 u8 fan_min_output[4]; /* minimum fan speed */
290 u8 fan_stop_time[4]; 292 u8 fan_stop_time[4];
293
294 u8 vid;
295 u8 vrm;
296};
297
298struct w83627ehf_sio_data {
299 int sioreg;
300 enum kinds kind;
291}; 301};
292 302
293static inline int is_word_sized(u16 reg) 303static inline int is_word_sized(u16 reg)
@@ -303,156 +313,152 @@ static inline int is_word_sized(u16 reg)
303 nothing for registers which live in bank 0. For others, they respectively 313 nothing for registers which live in bank 0. For others, they respectively
304 set the bank register to the correct value (before the register is 314 set the bank register to the correct value (before the register is
305 accessed), and back to 0 (afterwards). */ 315 accessed), and back to 0 (afterwards). */
306static inline void w83627ehf_set_bank(struct i2c_client *client, u16 reg) 316static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
307{ 317{
308 if (reg & 0xff00) { 318 if (reg & 0xff00) {
309 outb_p(W83627EHF_REG_BANK, client->addr + ADDR_REG_OFFSET); 319 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
310 outb_p(reg >> 8, client->addr + DATA_REG_OFFSET); 320 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
311 } 321 }
312} 322}
313 323
314static inline void w83627ehf_reset_bank(struct i2c_client *client, u16 reg) 324static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
315{ 325{
316 if (reg & 0xff00) { 326 if (reg & 0xff00) {
317 outb_p(W83627EHF_REG_BANK, client->addr + ADDR_REG_OFFSET); 327 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
318 outb_p(0, client->addr + DATA_REG_OFFSET); 328 outb_p(0, data->addr + DATA_REG_OFFSET);
319 } 329 }
320} 330}
321 331
322static u16 w83627ehf_read_value(struct i2c_client *client, u16 reg) 332static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
323{ 333{
324 struct w83627ehf_data *data = i2c_get_clientdata(client);
325 int res, word_sized = is_word_sized(reg); 334 int res, word_sized = is_word_sized(reg);
326 335
327 mutex_lock(&data->lock); 336 mutex_lock(&data->lock);
328 337
329 w83627ehf_set_bank(client, reg); 338 w83627ehf_set_bank(data, reg);
330 outb_p(reg & 0xff, client->addr + ADDR_REG_OFFSET); 339 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
331 res = inb_p(client->addr + DATA_REG_OFFSET); 340 res = inb_p(data->addr + DATA_REG_OFFSET);
332 if (word_sized) { 341 if (word_sized) {
333 outb_p((reg & 0xff) + 1, 342 outb_p((reg & 0xff) + 1,
334 client->addr + ADDR_REG_OFFSET); 343 data->addr + ADDR_REG_OFFSET);
335 res = (res << 8) + inb_p(client->addr + DATA_REG_OFFSET); 344 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
336 } 345 }
337 w83627ehf_reset_bank(client, reg); 346 w83627ehf_reset_bank(data, reg);
338 347
339 mutex_unlock(&data->lock); 348 mutex_unlock(&data->lock);
340 349
341 return res; 350 return res;
342} 351}
343 352
344static int w83627ehf_write_value(struct i2c_client *client, u16 reg, u16 value) 353static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
345{ 354{
346 struct w83627ehf_data *data = i2c_get_clientdata(client);
347 int word_sized = is_word_sized(reg); 355 int word_sized = is_word_sized(reg);
348 356
349 mutex_lock(&data->lock); 357 mutex_lock(&data->lock);
350 358
351 w83627ehf_set_bank(client, reg); 359 w83627ehf_set_bank(data, reg);
352 outb_p(reg & 0xff, client->addr + ADDR_REG_OFFSET); 360 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
353 if (word_sized) { 361 if (word_sized) {
354 outb_p(value >> 8, client->addr + DATA_REG_OFFSET); 362 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
355 outb_p((reg & 0xff) + 1, 363 outb_p((reg & 0xff) + 1,
356 client->addr + ADDR_REG_OFFSET); 364 data->addr + ADDR_REG_OFFSET);
357 } 365 }
358 outb_p(value & 0xff, client->addr + DATA_REG_OFFSET); 366 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
359 w83627ehf_reset_bank(client, reg); 367 w83627ehf_reset_bank(data, reg);
360 368
361 mutex_unlock(&data->lock); 369 mutex_unlock(&data->lock);
362 return 0; 370 return 0;
363} 371}
364 372
365/* This function assumes that the caller holds data->update_lock */ 373/* This function assumes that the caller holds data->update_lock */
366static void w83627ehf_write_fan_div(struct i2c_client *client, int nr) 374static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
367{ 375{
368 struct w83627ehf_data *data = i2c_get_clientdata(client);
369 u8 reg; 376 u8 reg;
370 377
371 switch (nr) { 378 switch (nr) {
372 case 0: 379 case 0:
373 reg = (w83627ehf_read_value(client, W83627EHF_REG_FANDIV1) & 0xcf) 380 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
374 | ((data->fan_div[0] & 0x03) << 4); 381 | ((data->fan_div[0] & 0x03) << 4);
375 /* fan5 input control bit is write only, compute the value */ 382 /* fan5 input control bit is write only, compute the value */
376 reg |= (data->has_fan & (1 << 4)) ? 1 : 0; 383 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
377 w83627ehf_write_value(client, W83627EHF_REG_FANDIV1, reg); 384 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
378 reg = (w83627ehf_read_value(client, W83627EHF_REG_VBAT) & 0xdf) 385 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
379 | ((data->fan_div[0] & 0x04) << 3); 386 | ((data->fan_div[0] & 0x04) << 3);
380 w83627ehf_write_value(client, W83627EHF_REG_VBAT, reg); 387 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
381 break; 388 break;
382 case 1: 389 case 1:
383 reg = (w83627ehf_read_value(client, W83627EHF_REG_FANDIV1) & 0x3f) 390 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
384 | ((data->fan_div[1] & 0x03) << 6); 391 | ((data->fan_div[1] & 0x03) << 6);
385 /* fan5 input control bit is write only, compute the value */ 392 /* fan5 input control bit is write only, compute the value */
386 reg |= (data->has_fan & (1 << 4)) ? 1 : 0; 393 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
387 w83627ehf_write_value(client, W83627EHF_REG_FANDIV1, reg); 394 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
388 reg = (w83627ehf_read_value(client, W83627EHF_REG_VBAT) & 0xbf) 395 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
389 | ((data->fan_div[1] & 0x04) << 4); 396 | ((data->fan_div[1] & 0x04) << 4);
390 w83627ehf_write_value(client, W83627EHF_REG_VBAT, reg); 397 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
391 break; 398 break;
392 case 2: 399 case 2:
393 reg = (w83627ehf_read_value(client, W83627EHF_REG_FANDIV2) & 0x3f) 400 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
394 | ((data->fan_div[2] & 0x03) << 6); 401 | ((data->fan_div[2] & 0x03) << 6);
395 w83627ehf_write_value(client, W83627EHF_REG_FANDIV2, reg); 402 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
396 reg = (w83627ehf_read_value(client, W83627EHF_REG_VBAT) & 0x7f) 403 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
397 | ((data->fan_div[2] & 0x04) << 5); 404 | ((data->fan_div[2] & 0x04) << 5);
398 w83627ehf_write_value(client, W83627EHF_REG_VBAT, reg); 405 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
399 break; 406 break;
400 case 3: 407 case 3:
401 reg = (w83627ehf_read_value(client, W83627EHF_REG_DIODE) & 0xfc) 408 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
402 | (data->fan_div[3] & 0x03); 409 | (data->fan_div[3] & 0x03);
403 w83627ehf_write_value(client, W83627EHF_REG_DIODE, reg); 410 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
404 reg = (w83627ehf_read_value(client, W83627EHF_REG_SMI_OVT) & 0x7f) 411 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
405 | ((data->fan_div[3] & 0x04) << 5); 412 | ((data->fan_div[3] & 0x04) << 5);
406 w83627ehf_write_value(client, W83627EHF_REG_SMI_OVT, reg); 413 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
407 break; 414 break;
408 case 4: 415 case 4:
409 reg = (w83627ehf_read_value(client, W83627EHF_REG_DIODE) & 0x73) 416 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
410 | ((data->fan_div[4] & 0x03) << 2) 417 | ((data->fan_div[4] & 0x03) << 2)
411 | ((data->fan_div[4] & 0x04) << 5); 418 | ((data->fan_div[4] & 0x04) << 5);
412 w83627ehf_write_value(client, W83627EHF_REG_DIODE, reg); 419 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
413 break; 420 break;
414 } 421 }
415} 422}
416 423
417static struct w83627ehf_data *w83627ehf_update_device(struct device *dev) 424static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
418{ 425{
419 struct i2c_client *client = to_i2c_client(dev); 426 struct w83627ehf_data *data = dev_get_drvdata(dev);
420 struct w83627ehf_data *data = i2c_get_clientdata(client);
421 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */ 427 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
422 int i; 428 int i;
423 429
424 mutex_lock(&data->update_lock); 430 mutex_lock(&data->update_lock);
425 431
426 if (time_after(jiffies, data->last_updated + HZ) 432 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
427 || !data->valid) { 433 || !data->valid) {
428 /* Fan clock dividers */ 434 /* Fan clock dividers */
429 i = w83627ehf_read_value(client, W83627EHF_REG_FANDIV1); 435 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
430 data->fan_div[0] = (i >> 4) & 0x03; 436 data->fan_div[0] = (i >> 4) & 0x03;
431 data->fan_div[1] = (i >> 6) & 0x03; 437 data->fan_div[1] = (i >> 6) & 0x03;
432 i = w83627ehf_read_value(client, W83627EHF_REG_FANDIV2); 438 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
433 data->fan_div[2] = (i >> 6) & 0x03; 439 data->fan_div[2] = (i >> 6) & 0x03;
434 i = w83627ehf_read_value(client, W83627EHF_REG_VBAT); 440 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
435 data->fan_div[0] |= (i >> 3) & 0x04; 441 data->fan_div[0] |= (i >> 3) & 0x04;
436 data->fan_div[1] |= (i >> 4) & 0x04; 442 data->fan_div[1] |= (i >> 4) & 0x04;
437 data->fan_div[2] |= (i >> 5) & 0x04; 443 data->fan_div[2] |= (i >> 5) & 0x04;
438 if (data->has_fan & ((1 << 3) | (1 << 4))) { 444 if (data->has_fan & ((1 << 3) | (1 << 4))) {
439 i = w83627ehf_read_value(client, W83627EHF_REG_DIODE); 445 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
440 data->fan_div[3] = i & 0x03; 446 data->fan_div[3] = i & 0x03;
441 data->fan_div[4] = ((i >> 2) & 0x03) 447 data->fan_div[4] = ((i >> 2) & 0x03)
442 | ((i >> 5) & 0x04); 448 | ((i >> 5) & 0x04);
443 } 449 }
444 if (data->has_fan & (1 << 3)) { 450 if (data->has_fan & (1 << 3)) {
445 i = w83627ehf_read_value(client, W83627EHF_REG_SMI_OVT); 451 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
446 data->fan_div[3] |= (i >> 5) & 0x04; 452 data->fan_div[3] |= (i >> 5) & 0x04;
447 } 453 }
448 454
449 /* Measured voltages and limits */ 455 /* Measured voltages and limits */
450 for (i = 0; i < w83627ehf_num_in; i++) { 456 for (i = 0; i < data->in_num; i++) {
451 data->in[i] = w83627ehf_read_value(client, 457 data->in[i] = w83627ehf_read_value(data,
452 W83627EHF_REG_IN(i)); 458 W83627EHF_REG_IN(i));
453 data->in_min[i] = w83627ehf_read_value(client, 459 data->in_min[i] = w83627ehf_read_value(data,
454 W83627EHF_REG_IN_MIN(i)); 460 W83627EHF_REG_IN_MIN(i));
455 data->in_max[i] = w83627ehf_read_value(client, 461 data->in_max[i] = w83627ehf_read_value(data,
456 W83627EHF_REG_IN_MAX(i)); 462 W83627EHF_REG_IN_MAX(i));
457 } 463 }
458 464
@@ -461,9 +467,9 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
461 if (!(data->has_fan & (1 << i))) 467 if (!(data->has_fan & (1 << i)))
462 continue; 468 continue;
463 469
464 data->fan[i] = w83627ehf_read_value(client, 470 data->fan[i] = w83627ehf_read_value(data,
465 W83627EHF_REG_FAN[i]); 471 W83627EHF_REG_FAN[i]);
466 data->fan_min[i] = w83627ehf_read_value(client, 472 data->fan_min[i] = w83627ehf_read_value(data,
467 W83627EHF_REG_FAN_MIN[i]); 473 W83627EHF_REG_FAN_MIN[i]);
468 474
469 /* If we failed to measure the fan speed and clock 475 /* If we failed to measure the fan speed and clock
@@ -471,16 +477,16 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
471 time */ 477 time */
472 if (data->fan[i] == 0xff 478 if (data->fan[i] == 0xff
473 && data->fan_div[i] < 0x07) { 479 && data->fan_div[i] < 0x07) {
474 dev_dbg(&client->dev, "Increasing fan%d " 480 dev_dbg(dev, "Increasing fan%d "
475 "clock divider from %u to %u\n", 481 "clock divider from %u to %u\n",
476 i + 1, div_from_reg(data->fan_div[i]), 482 i + 1, div_from_reg(data->fan_div[i]),
477 div_from_reg(data->fan_div[i] + 1)); 483 div_from_reg(data->fan_div[i] + 1));
478 data->fan_div[i]++; 484 data->fan_div[i]++;
479 w83627ehf_write_fan_div(client, i); 485 w83627ehf_write_fan_div(data, i);
480 /* Preserve min limit if possible */ 486 /* Preserve min limit if possible */
481 if (data->fan_min[i] >= 2 487 if (data->fan_min[i] >= 2
482 && data->fan_min[i] != 255) 488 && data->fan_min[i] != 255)
483 w83627ehf_write_value(client, 489 w83627ehf_write_value(data,
484 W83627EHF_REG_FAN_MIN[i], 490 W83627EHF_REG_FAN_MIN[i],
485 (data->fan_min[i] /= 2)); 491 (data->fan_min[i] /= 2));
486 } 492 }
@@ -489,9 +495,9 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
489 for (i = 0; i < 4; i++) { 495 for (i = 0; i < 4; i++) {
490 /* pwmcfg, tolarance mapped for i=0, i=1 to same reg */ 496 /* pwmcfg, tolarance mapped for i=0, i=1 to same reg */
491 if (i != 1) { 497 if (i != 1) {
492 pwmcfg = w83627ehf_read_value(client, 498 pwmcfg = w83627ehf_read_value(data,
493 W83627EHF_REG_PWM_ENABLE[i]); 499 W83627EHF_REG_PWM_ENABLE[i]);
494 tolerance = w83627ehf_read_value(client, 500 tolerance = w83627ehf_read_value(data,
495 W83627EHF_REG_TOLERANCE[i]); 501 W83627EHF_REG_TOLERANCE[i]);
496 } 502 }
497 data->pwm_mode[i] = 503 data->pwm_mode[i] =
@@ -500,14 +506,14 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
500 data->pwm_enable[i] = 506 data->pwm_enable[i] =
501 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i]) 507 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
502 & 3) + 1; 508 & 3) + 1;
503 data->pwm[i] = w83627ehf_read_value(client, 509 data->pwm[i] = w83627ehf_read_value(data,
504 W83627EHF_REG_PWM[i]); 510 W83627EHF_REG_PWM[i]);
505 data->fan_min_output[i] = w83627ehf_read_value(client, 511 data->fan_min_output[i] = w83627ehf_read_value(data,
506 W83627EHF_REG_FAN_MIN_OUTPUT[i]); 512 W83627EHF_REG_FAN_MIN_OUTPUT[i]);
507 data->fan_stop_time[i] = w83627ehf_read_value(client, 513 data->fan_stop_time[i] = w83627ehf_read_value(data,
508 W83627EHF_REG_FAN_STOP_TIME[i]); 514 W83627EHF_REG_FAN_STOP_TIME[i]);
509 data->target_temp[i] = 515 data->target_temp[i] =
510 w83627ehf_read_value(client, 516 w83627ehf_read_value(data,
511 W83627EHF_REG_TARGET[i]) & 517 W83627EHF_REG_TARGET[i]) &
512 (data->pwm_mode[i] == 1 ? 0x7f : 0xff); 518 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
513 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0)) 519 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
@@ -515,26 +521,26 @@ static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
515 } 521 }
516 522
517 /* Measured temperatures and limits */ 523 /* Measured temperatures and limits */
518 data->temp1 = w83627ehf_read_value(client, 524 data->temp1 = w83627ehf_read_value(data,
519 W83627EHF_REG_TEMP1); 525 W83627EHF_REG_TEMP1);
520 data->temp1_max = w83627ehf_read_value(client, 526 data->temp1_max = w83627ehf_read_value(data,
521 W83627EHF_REG_TEMP1_OVER); 527 W83627EHF_REG_TEMP1_OVER);
522 data->temp1_max_hyst = w83627ehf_read_value(client, 528 data->temp1_max_hyst = w83627ehf_read_value(data,
523 W83627EHF_REG_TEMP1_HYST); 529 W83627EHF_REG_TEMP1_HYST);
524 for (i = 0; i < 2; i++) { 530 for (i = 0; i < 2; i++) {
525 data->temp[i] = w83627ehf_read_value(client, 531 data->temp[i] = w83627ehf_read_value(data,
526 W83627EHF_REG_TEMP[i]); 532 W83627EHF_REG_TEMP[i]);
527 data->temp_max[i] = w83627ehf_read_value(client, 533 data->temp_max[i] = w83627ehf_read_value(data,
528 W83627EHF_REG_TEMP_OVER[i]); 534 W83627EHF_REG_TEMP_OVER[i]);
529 data->temp_max_hyst[i] = w83627ehf_read_value(client, 535 data->temp_max_hyst[i] = w83627ehf_read_value(data,
530 W83627EHF_REG_TEMP_HYST[i]); 536 W83627EHF_REG_TEMP_HYST[i]);
531 } 537 }
532 538
533 data->alarms = w83627ehf_read_value(client, 539 data->alarms = w83627ehf_read_value(data,
534 W83627EHF_REG_ALARM1) | 540 W83627EHF_REG_ALARM1) |
535 (w83627ehf_read_value(client, 541 (w83627ehf_read_value(data,
536 W83627EHF_REG_ALARM2) << 8) | 542 W83627EHF_REG_ALARM2) << 8) |
537 (w83627ehf_read_value(client, 543 (w83627ehf_read_value(data,
538 W83627EHF_REG_ALARM3) << 16); 544 W83627EHF_REG_ALARM3) << 16);
539 545
540 data->last_updated = jiffies; 546 data->last_updated = jiffies;
@@ -567,15 +573,14 @@ static ssize_t \
567store_in_##reg (struct device *dev, struct device_attribute *attr, \ 573store_in_##reg (struct device *dev, struct device_attribute *attr, \
568 const char *buf, size_t count) \ 574 const char *buf, size_t count) \
569{ \ 575{ \
570 struct i2c_client *client = to_i2c_client(dev); \ 576 struct w83627ehf_data *data = dev_get_drvdata(dev); \
571 struct w83627ehf_data *data = i2c_get_clientdata(client); \
572 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ 577 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
573 int nr = sensor_attr->index; \ 578 int nr = sensor_attr->index; \
574 u32 val = simple_strtoul(buf, NULL, 10); \ 579 u32 val = simple_strtoul(buf, NULL, 10); \
575 \ 580 \
576 mutex_lock(&data->update_lock); \ 581 mutex_lock(&data->update_lock); \
577 data->in_##reg[nr] = in_to_reg(val, nr); \ 582 data->in_##reg[nr] = in_to_reg(val, nr); \
578 w83627ehf_write_value(client, W83627EHF_REG_IN_##REG(nr), \ 583 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
579 data->in_##reg[nr]); \ 584 data->in_##reg[nr]); \
580 mutex_unlock(&data->update_lock); \ 585 mutex_unlock(&data->update_lock); \
581 return count; \ 586 return count; \
@@ -673,8 +678,7 @@ static ssize_t
673store_fan_min(struct device *dev, struct device_attribute *attr, 678store_fan_min(struct device *dev, struct device_attribute *attr,
674 const char *buf, size_t count) 679 const char *buf, size_t count)
675{ 680{
676 struct i2c_client *client = to_i2c_client(dev); 681 struct w83627ehf_data *data = dev_get_drvdata(dev);
677 struct w83627ehf_data *data = i2c_get_clientdata(client);
678 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 682 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
679 int nr = sensor_attr->index; 683 int nr = sensor_attr->index;
680 unsigned int val = simple_strtoul(buf, NULL, 10); 684 unsigned int val = simple_strtoul(buf, NULL, 10);
@@ -716,18 +720,25 @@ store_fan_min(struct device *dev, struct device_attribute *attr,
716 /* Write both the fan clock divider (if it changed) and the new 720 /* Write both the fan clock divider (if it changed) and the new
717 fan min (unconditionally) */ 721 fan min (unconditionally) */
718 if (new_div != data->fan_div[nr]) { 722 if (new_div != data->fan_div[nr]) {
719 if (new_div > data->fan_div[nr]) 723 /* Preserve the fan speed reading */
720 data->fan[nr] >>= (data->fan_div[nr] - new_div); 724 if (data->fan[nr] != 0xff) {
721 else 725 if (new_div > data->fan_div[nr])
722 data->fan[nr] <<= (new_div - data->fan_div[nr]); 726 data->fan[nr] >>= new_div - data->fan_div[nr];
727 else if (data->fan[nr] & 0x80)
728 data->fan[nr] = 0xff;
729 else
730 data->fan[nr] <<= data->fan_div[nr] - new_div;
731 }
723 732
724 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n", 733 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
725 nr + 1, div_from_reg(data->fan_div[nr]), 734 nr + 1, div_from_reg(data->fan_div[nr]),
726 div_from_reg(new_div)); 735 div_from_reg(new_div));
727 data->fan_div[nr] = new_div; 736 data->fan_div[nr] = new_div;
728 w83627ehf_write_fan_div(client, nr); 737 w83627ehf_write_fan_div(data, nr);
738 /* Give the chip time to sample a new speed value */
739 data->last_updated = jiffies;
729 } 740 }
730 w83627ehf_write_value(client, W83627EHF_REG_FAN_MIN[nr], 741 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
731 data->fan_min[nr]); 742 data->fan_min[nr]);
732 mutex_unlock(&data->update_lock); 743 mutex_unlock(&data->update_lock);
733 744
@@ -788,13 +799,12 @@ static ssize_t \
788store_temp1_##reg(struct device *dev, struct device_attribute *attr, \ 799store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
789 const char *buf, size_t count) \ 800 const char *buf, size_t count) \
790{ \ 801{ \
791 struct i2c_client *client = to_i2c_client(dev); \ 802 struct w83627ehf_data *data = dev_get_drvdata(dev); \
792 struct w83627ehf_data *data = i2c_get_clientdata(client); \
793 u32 val = simple_strtoul(buf, NULL, 10); \ 803 u32 val = simple_strtoul(buf, NULL, 10); \
794 \ 804 \
795 mutex_lock(&data->update_lock); \ 805 mutex_lock(&data->update_lock); \
796 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \ 806 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
797 w83627ehf_write_value(client, W83627EHF_REG_TEMP1_##REG, \ 807 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
798 data->temp1_##reg); \ 808 data->temp1_##reg); \
799 mutex_unlock(&data->update_lock); \ 809 mutex_unlock(&data->update_lock); \
800 return count; \ 810 return count; \
@@ -822,15 +832,14 @@ static ssize_t \
822store_##reg(struct device *dev, struct device_attribute *attr, \ 832store_##reg(struct device *dev, struct device_attribute *attr, \
823 const char *buf, size_t count) \ 833 const char *buf, size_t count) \
824{ \ 834{ \
825 struct i2c_client *client = to_i2c_client(dev); \ 835 struct w83627ehf_data *data = dev_get_drvdata(dev); \
826 struct w83627ehf_data *data = i2c_get_clientdata(client); \
827 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ 836 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
828 int nr = sensor_attr->index; \ 837 int nr = sensor_attr->index; \
829 u32 val = simple_strtoul(buf, NULL, 10); \ 838 u32 val = simple_strtoul(buf, NULL, 10); \
830 \ 839 \
831 mutex_lock(&data->update_lock); \ 840 mutex_lock(&data->update_lock); \
832 data->reg[nr] = LM75_TEMP_TO_REG(val); \ 841 data->reg[nr] = LM75_TEMP_TO_REG(val); \
833 w83627ehf_write_value(client, W83627EHF_REG_TEMP_##REG[nr], \ 842 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
834 data->reg[nr]); \ 843 data->reg[nr]); \
835 mutex_unlock(&data->update_lock); \ 844 mutex_unlock(&data->update_lock); \
836 return count; \ 845 return count; \
@@ -838,6 +847,15 @@ store_##reg(struct device *dev, struct device_attribute *attr, \
838store_temp_reg(OVER, temp_max); 847store_temp_reg(OVER, temp_max);
839store_temp_reg(HYST, temp_max_hyst); 848store_temp_reg(HYST, temp_max_hyst);
840 849
850static ssize_t
851show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
852{
853 struct w83627ehf_data *data = w83627ehf_update_device(dev);
854 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
855 int nr = sensor_attr->index;
856 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
857}
858
841static struct sensor_device_attribute sda_temp[] = { 859static struct sensor_device_attribute sda_temp[] = {
842 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0), 860 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
843 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0), 861 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
@@ -857,6 +875,9 @@ static struct sensor_device_attribute sda_temp[] = {
857 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4), 875 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
858 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5), 876 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
859 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13), 877 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
878 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
879 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
880 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
860}; 881};
861 882
862#define show_pwm_reg(reg) \ 883#define show_pwm_reg(reg) \
@@ -877,8 +898,7 @@ static ssize_t
877store_pwm_mode(struct device *dev, struct device_attribute *attr, 898store_pwm_mode(struct device *dev, struct device_attribute *attr,
878 const char *buf, size_t count) 899 const char *buf, size_t count)
879{ 900{
880 struct i2c_client *client = to_i2c_client(dev); 901 struct w83627ehf_data *data = dev_get_drvdata(dev);
881 struct w83627ehf_data *data = i2c_get_clientdata(client);
882 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 902 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
883 int nr = sensor_attr->index; 903 int nr = sensor_attr->index;
884 u32 val = simple_strtoul(buf, NULL, 10); 904 u32 val = simple_strtoul(buf, NULL, 10);
@@ -887,12 +907,12 @@ store_pwm_mode(struct device *dev, struct device_attribute *attr,
887 if (val > 1) 907 if (val > 1)
888 return -EINVAL; 908 return -EINVAL;
889 mutex_lock(&data->update_lock); 909 mutex_lock(&data->update_lock);
890 reg = w83627ehf_read_value(client, W83627EHF_REG_PWM_ENABLE[nr]); 910 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
891 data->pwm_mode[nr] = val; 911 data->pwm_mode[nr] = val;
892 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]); 912 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
893 if (!val) 913 if (!val)
894 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr]; 914 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
895 w83627ehf_write_value(client, W83627EHF_REG_PWM_ENABLE[nr], reg); 915 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
896 mutex_unlock(&data->update_lock); 916 mutex_unlock(&data->update_lock);
897 return count; 917 return count;
898} 918}
@@ -901,15 +921,14 @@ static ssize_t
901store_pwm(struct device *dev, struct device_attribute *attr, 921store_pwm(struct device *dev, struct device_attribute *attr,
902 const char *buf, size_t count) 922 const char *buf, size_t count)
903{ 923{
904 struct i2c_client *client = to_i2c_client(dev); 924 struct w83627ehf_data *data = dev_get_drvdata(dev);
905 struct w83627ehf_data *data = i2c_get_clientdata(client);
906 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 925 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
907 int nr = sensor_attr->index; 926 int nr = sensor_attr->index;
908 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255); 927 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
909 928
910 mutex_lock(&data->update_lock); 929 mutex_lock(&data->update_lock);
911 data->pwm[nr] = val; 930 data->pwm[nr] = val;
912 w83627ehf_write_value(client, W83627EHF_REG_PWM[nr], val); 931 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
913 mutex_unlock(&data->update_lock); 932 mutex_unlock(&data->update_lock);
914 return count; 933 return count;
915} 934}
@@ -918,8 +937,7 @@ static ssize_t
918store_pwm_enable(struct device *dev, struct device_attribute *attr, 937store_pwm_enable(struct device *dev, struct device_attribute *attr,
919 const char *buf, size_t count) 938 const char *buf, size_t count)
920{ 939{
921 struct i2c_client *client = to_i2c_client(dev); 940 struct w83627ehf_data *data = dev_get_drvdata(dev);
922 struct w83627ehf_data *data = i2c_get_clientdata(client);
923 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 941 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
924 int nr = sensor_attr->index; 942 int nr = sensor_attr->index;
925 u32 val = simple_strtoul(buf, NULL, 10); 943 u32 val = simple_strtoul(buf, NULL, 10);
@@ -928,11 +946,11 @@ store_pwm_enable(struct device *dev, struct device_attribute *attr,
928 if (!val || (val > 2)) /* only modes 1 and 2 are supported */ 946 if (!val || (val > 2)) /* only modes 1 and 2 are supported */
929 return -EINVAL; 947 return -EINVAL;
930 mutex_lock(&data->update_lock); 948 mutex_lock(&data->update_lock);
931 reg = w83627ehf_read_value(client, W83627EHF_REG_PWM_ENABLE[nr]); 949 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
932 data->pwm_enable[nr] = val; 950 data->pwm_enable[nr] = val;
933 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]); 951 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
934 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr]; 952 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
935 w83627ehf_write_value(client, W83627EHF_REG_PWM_ENABLE[nr], reg); 953 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
936 mutex_unlock(&data->update_lock); 954 mutex_unlock(&data->update_lock);
937 return count; 955 return count;
938} 956}
@@ -955,15 +973,14 @@ static ssize_t
955store_target_temp(struct device *dev, struct device_attribute *attr, 973store_target_temp(struct device *dev, struct device_attribute *attr,
956 const char *buf, size_t count) 974 const char *buf, size_t count)
957{ 975{
958 struct i2c_client *client = to_i2c_client(dev); 976 struct w83627ehf_data *data = dev_get_drvdata(dev);
959 struct w83627ehf_data *data = i2c_get_clientdata(client);
960 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 977 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
961 int nr = sensor_attr->index; 978 int nr = sensor_attr->index;
962 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000); 979 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
963 980
964 mutex_lock(&data->update_lock); 981 mutex_lock(&data->update_lock);
965 data->target_temp[nr] = val; 982 data->target_temp[nr] = val;
966 w83627ehf_write_value(client, W83627EHF_REG_TARGET[nr], val); 983 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
967 mutex_unlock(&data->update_lock); 984 mutex_unlock(&data->update_lock);
968 return count; 985 return count;
969} 986}
@@ -972,8 +989,7 @@ static ssize_t
972store_tolerance(struct device *dev, struct device_attribute *attr, 989store_tolerance(struct device *dev, struct device_attribute *attr,
973 const char *buf, size_t count) 990 const char *buf, size_t count)
974{ 991{
975 struct i2c_client *client = to_i2c_client(dev); 992 struct w83627ehf_data *data = dev_get_drvdata(dev);
976 struct w83627ehf_data *data = i2c_get_clientdata(client);
977 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); 993 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
978 int nr = sensor_attr->index; 994 int nr = sensor_attr->index;
979 u16 reg; 995 u16 reg;
@@ -981,13 +997,13 @@ store_tolerance(struct device *dev, struct device_attribute *attr,
981 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000); 997 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
982 998
983 mutex_lock(&data->update_lock); 999 mutex_lock(&data->update_lock);
984 reg = w83627ehf_read_value(client, W83627EHF_REG_TOLERANCE[nr]); 1000 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
985 data->tolerance[nr] = val; 1001 data->tolerance[nr] = val;
986 if (nr == 1) 1002 if (nr == 1)
987 reg = (reg & 0x0f) | (val << 4); 1003 reg = (reg & 0x0f) | (val << 4);
988 else 1004 else
989 reg = (reg & 0xf0) | val; 1005 reg = (reg & 0xf0) | val;
990 w83627ehf_write_value(client, W83627EHF_REG_TOLERANCE[nr], reg); 1006 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
991 mutex_unlock(&data->update_lock); 1007 mutex_unlock(&data->update_lock);
992 return count; 1008 return count;
993} 1009}
@@ -1058,14 +1074,13 @@ static ssize_t \
1058store_##reg(struct device *dev, struct device_attribute *attr, \ 1074store_##reg(struct device *dev, struct device_attribute *attr, \
1059 const char *buf, size_t count) \ 1075 const char *buf, size_t count) \
1060{\ 1076{\
1061 struct i2c_client *client = to_i2c_client(dev); \ 1077 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1062 struct w83627ehf_data *data = i2c_get_clientdata(client); \
1063 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ 1078 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1064 int nr = sensor_attr->index; \ 1079 int nr = sensor_attr->index; \
1065 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \ 1080 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1066 mutex_lock(&data->update_lock); \ 1081 mutex_lock(&data->update_lock); \
1067 data->reg[nr] = val; \ 1082 data->reg[nr] = val; \
1068 w83627ehf_write_value(client, W83627EHF_REG_##REG[nr], val); \ 1083 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1069 mutex_unlock(&data->update_lock); \ 1084 mutex_unlock(&data->update_lock); \
1070 return count; \ 1085 return count; \
1071} 1086}
@@ -1087,21 +1102,28 @@ static ssize_t \
1087store_##reg(struct device *dev, struct device_attribute *attr, \ 1102store_##reg(struct device *dev, struct device_attribute *attr, \
1088 const char *buf, size_t count) \ 1103 const char *buf, size_t count) \
1089{ \ 1104{ \
1090 struct i2c_client *client = to_i2c_client(dev); \ 1105 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1091 struct w83627ehf_data *data = i2c_get_clientdata(client); \
1092 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \ 1106 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1093 int nr = sensor_attr->index; \ 1107 int nr = sensor_attr->index; \
1094 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \ 1108 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1095 data->pwm_mode[nr]); \ 1109 data->pwm_mode[nr]); \
1096 mutex_lock(&data->update_lock); \ 1110 mutex_lock(&data->update_lock); \
1097 data->reg[nr] = val; \ 1111 data->reg[nr] = val; \
1098 w83627ehf_write_value(client, W83627EHF_REG_##REG[nr], val); \ 1112 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1099 mutex_unlock(&data->update_lock); \ 1113 mutex_unlock(&data->update_lock); \
1100 return count; \ 1114 return count; \
1101} \ 1115} \
1102 1116
1103fan_time_functions(fan_stop_time, FAN_STOP_TIME) 1117fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1104 1118
1119static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1120 char *buf)
1121{
1122 struct w83627ehf_data *data = dev_get_drvdata(dev);
1123
1124 return sprintf(buf, "%s\n", data->name);
1125}
1126static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1105 1127
1106static struct sensor_device_attribute sda_sf3_arrays_fan4[] = { 1128static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1107 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time, 1129 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
@@ -1125,8 +1147,16 @@ static struct sensor_device_attribute sda_sf3_arrays[] = {
1125 store_fan_min_output, 2), 1147 store_fan_min_output, 2),
1126}; 1148};
1127 1149
1150static ssize_t
1151show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1152{
1153 struct w83627ehf_data *data = dev_get_drvdata(dev);
1154 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1155}
1156static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1157
1128/* 1158/*
1129 * Driver and client management 1159 * Driver and device management
1130 */ 1160 */
1131 1161
1132static void w83627ehf_device_remove_files(struct device *dev) 1162static void w83627ehf_device_remove_files(struct device *dev)
@@ -1134,12 +1164,13 @@ static void w83627ehf_device_remove_files(struct device *dev)
1134 /* some entries in the following arrays may not have been used in 1164 /* some entries in the following arrays may not have been used in
1135 * device_create_file(), but device_remove_file() will ignore them */ 1165 * device_create_file(), but device_remove_file() will ignore them */
1136 int i; 1166 int i;
1167 struct w83627ehf_data *data = dev_get_drvdata(dev);
1137 1168
1138 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++) 1169 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1139 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr); 1170 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1140 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) 1171 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1141 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr); 1172 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1142 for (i = 0; i < w83627ehf_num_in; i++) { 1173 for (i = 0; i < data->in_num; i++) {
1143 device_remove_file(dev, &sda_in_input[i].dev_attr); 1174 device_remove_file(dev, &sda_in_input[i].dev_attr);
1144 device_remove_file(dev, &sda_in_alarm[i].dev_attr); 1175 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1145 device_remove_file(dev, &sda_in_min[i].dev_attr); 1176 device_remove_file(dev, &sda_in_min[i].dev_attr);
@@ -1160,43 +1191,64 @@ static void w83627ehf_device_remove_files(struct device *dev)
1160 } 1191 }
1161 for (i = 0; i < ARRAY_SIZE(sda_temp); i++) 1192 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1162 device_remove_file(dev, &sda_temp[i].dev_attr); 1193 device_remove_file(dev, &sda_temp[i].dev_attr);
1163}
1164 1194
1165static struct i2c_driver w83627ehf_driver; 1195 device_remove_file(dev, &dev_attr_name);
1196 if (data->vid != 0x3f)
1197 device_remove_file(dev, &dev_attr_cpu0_vid);
1198}
1166 1199
1167static void w83627ehf_init_client(struct i2c_client *client) 1200/* Get the monitoring functions started */
1201static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1168{ 1202{
1169 int i; 1203 int i;
1170 u8 tmp; 1204 u8 tmp, diode;
1171 1205
1172 /* Start monitoring is needed */ 1206 /* Start monitoring is needed */
1173 tmp = w83627ehf_read_value(client, W83627EHF_REG_CONFIG); 1207 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1174 if (!(tmp & 0x01)) 1208 if (!(tmp & 0x01))
1175 w83627ehf_write_value(client, W83627EHF_REG_CONFIG, 1209 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1176 tmp | 0x01); 1210 tmp | 0x01);
1177 1211
1178 /* Enable temp2 and temp3 if needed */ 1212 /* Enable temp2 and temp3 if needed */
1179 for (i = 0; i < 2; i++) { 1213 for (i = 0; i < 2; i++) {
1180 tmp = w83627ehf_read_value(client, 1214 tmp = w83627ehf_read_value(data,
1181 W83627EHF_REG_TEMP_CONFIG[i]); 1215 W83627EHF_REG_TEMP_CONFIG[i]);
1182 if (tmp & 0x01) 1216 if (tmp & 0x01)
1183 w83627ehf_write_value(client, 1217 w83627ehf_write_value(data,
1184 W83627EHF_REG_TEMP_CONFIG[i], 1218 W83627EHF_REG_TEMP_CONFIG[i],
1185 tmp & 0xfe); 1219 tmp & 0xfe);
1186 } 1220 }
1221
1222 /* Enable VBAT monitoring if needed */
1223 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1224 if (!(tmp & 0x01))
1225 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1226
1227 /* Get thermal sensor types */
1228 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1229 for (i = 0; i < 3; i++) {
1230 if ((tmp & (0x02 << i)))
1231 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1232 else
1233 data->temp_type[i] = 4; /* thermistor */
1234 }
1187} 1235}
1188 1236
1189static int w83627ehf_detect(struct i2c_adapter *adapter) 1237static int __devinit w83627ehf_probe(struct platform_device *pdev)
1190{ 1238{
1191 struct i2c_client *client; 1239 struct device *dev = &pdev->dev;
1240 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1192 struct w83627ehf_data *data; 1241 struct w83627ehf_data *data;
1193 struct device *dev; 1242 struct resource *res;
1194 u8 fan4pin, fan5pin; 1243 u8 fan4pin, fan5pin, en_vrm10;
1195 int i, err = 0; 1244 int i, err = 0;
1196 1245
1197 if (!request_region(address + IOREGION_OFFSET, IOREGION_LENGTH, 1246 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1198 w83627ehf_driver.driver.name)) { 1247 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1199 err = -EBUSY; 1248 err = -EBUSY;
1249 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1250 (unsigned long)res->start,
1251 (unsigned long)res->start + IOREGION_LENGTH - 1);
1200 goto exit; 1252 goto exit;
1201 } 1253 }
1202 1254
@@ -1205,41 +1257,47 @@ static int w83627ehf_detect(struct i2c_adapter *adapter)
1205 goto exit_release; 1257 goto exit_release;
1206 } 1258 }
1207 1259
1208 client = &data->client; 1260 data->addr = res->start;
1209 i2c_set_clientdata(client, data);
1210 client->addr = address;
1211 mutex_init(&data->lock); 1261 mutex_init(&data->lock);
1212 client->adapter = adapter;
1213 client->driver = &w83627ehf_driver;
1214 client->flags = 0;
1215 dev = &client->dev;
1216
1217 if (w83627ehf_num_in == 9)
1218 strlcpy(client->name, "w83627dhg", I2C_NAME_SIZE);
1219 else /* just say ehf. 627EHG is 627EHF in lead-free packaging. */
1220 strlcpy(client->name, "w83627ehf", I2C_NAME_SIZE);
1221
1222 data->valid = 0;
1223 mutex_init(&data->update_lock); 1262 mutex_init(&data->update_lock);
1263 data->name = w83627ehf_device_names[sio_data->kind];
1264 platform_set_drvdata(pdev, data);
1224 1265
1225 /* Tell the i2c layer a new client has arrived */ 1266 /* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
1226 if ((err = i2c_attach_client(client))) 1267 data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
1227 goto exit_free;
1228 1268
1229 /* Initialize the chip */ 1269 /* Initialize the chip */
1230 w83627ehf_init_client(client); 1270 w83627ehf_init_device(data);
1231 1271
1232 /* A few vars need to be filled upon startup */ 1272 data->vrm = vid_which_vrm();
1233 for (i = 0; i < 5; i++) 1273 superio_enter(sio_data->sioreg);
1234 data->fan_min[i] = w83627ehf_read_value(client, 1274 /* Set VID input sensibility if needed. In theory the BIOS should
1235 W83627EHF_REG_FAN_MIN[i]); 1275 have set it, but in practice it's not always the case. */
1276 en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10);
1277 if ((en_vrm10 & 0x08) && data->vrm != 100) {
1278 dev_warn(dev, "Setting VID input voltage to TTL\n");
1279 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1280 en_vrm10 & ~0x08);
1281 } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
1282 dev_warn(dev, "Setting VID input voltage to VRM10\n");
1283 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1284 en_vrm10 | 0x08);
1285 }
1286 /* Read VID value */
1287 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1288 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80)
1289 data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f;
1290 else {
1291 dev_info(dev, "VID pins in output mode, CPU VID not "
1292 "available\n");
1293 data->vid = 0x3f;
1294 }
1236 1295
1237 /* fan4 and fan5 share some pins with the GPIO and serial flash */ 1296 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1238 1297
1239 superio_enter(); 1298 fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
1240 fan5pin = superio_inb(0x24) & 0x2; 1299 fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
1241 fan4pin = superio_inb(0x29) & 0x6; 1300 superio_exit(sio_data->sioreg);
1242 superio_exit();
1243 1301
1244 /* It looks like fan4 and fan5 pins can be alternatively used 1302 /* It looks like fan4 and fan5 pins can be alternatively used
1245 as fan on/off switches, but fan5 control is write only :/ 1303 as fan on/off switches, but fan5 control is write only :/
@@ -1248,7 +1306,7 @@ static int w83627ehf_detect(struct i2c_adapter *adapter)
1248 is not the default. */ 1306 is not the default. */
1249 1307
1250 data->has_fan = 0x07; /* fan1, fan2 and fan3 */ 1308 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1251 i = w83627ehf_read_value(client, W83627EHF_REG_FANDIV1); 1309 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1252 if ((i & (1 << 2)) && (!fan4pin)) 1310 if ((i & (1 << 2)) && (!fan4pin))
1253 data->has_fan |= (1 << 3); 1311 data->has_fan |= (1 << 3);
1254 if (!(i & (1 << 1)) && (!fan5pin)) 1312 if (!(i & (1 << 1)) && (!fan5pin))
@@ -1268,7 +1326,7 @@ static int w83627ehf_detect(struct i2c_adapter *adapter)
1268 goto exit_remove; 1326 goto exit_remove;
1269 } 1327 }
1270 1328
1271 for (i = 0; i < w83627ehf_num_in; i++) 1329 for (i = 0; i < data->in_num; i++)
1272 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr)) 1330 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1273 || (err = device_create_file(dev, 1331 || (err = device_create_file(dev,
1274 &sda_in_alarm[i].dev_attr)) 1332 &sda_in_alarm[i].dev_attr))
@@ -1308,6 +1366,16 @@ static int w83627ehf_detect(struct i2c_adapter *adapter)
1308 if ((err = device_create_file(dev, &sda_temp[i].dev_attr))) 1366 if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
1309 goto exit_remove; 1367 goto exit_remove;
1310 1368
1369 err = device_create_file(dev, &dev_attr_name);
1370 if (err)
1371 goto exit_remove;
1372
1373 if (data->vid != 0x3f) {
1374 err = device_create_file(dev, &dev_attr_cpu0_vid);
1375 if (err)
1376 goto exit_remove;
1377 }
1378
1311 data->class_dev = hwmon_device_register(dev); 1379 data->class_dev = hwmon_device_register(dev);
1312 if (IS_ERR(data->class_dev)) { 1380 if (IS_ERR(data->class_dev)) {
1313 err = PTR_ERR(data->class_dev); 1381 err = PTR_ERR(data->class_dev);
@@ -1318,95 +1386,172 @@ static int w83627ehf_detect(struct i2c_adapter *adapter)
1318 1386
1319exit_remove: 1387exit_remove:
1320 w83627ehf_device_remove_files(dev); 1388 w83627ehf_device_remove_files(dev);
1321 i2c_detach_client(client);
1322exit_free:
1323 kfree(data); 1389 kfree(data);
1390 platform_set_drvdata(pdev, NULL);
1324exit_release: 1391exit_release:
1325 release_region(address + IOREGION_OFFSET, IOREGION_LENGTH); 1392 release_region(res->start, IOREGION_LENGTH);
1326exit: 1393exit:
1327 return err; 1394 return err;
1328} 1395}
1329 1396
1330static int w83627ehf_detach_client(struct i2c_client *client) 1397static int __devexit w83627ehf_remove(struct platform_device *pdev)
1331{ 1398{
1332 struct w83627ehf_data *data = i2c_get_clientdata(client); 1399 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1333 int err;
1334 1400
1335 hwmon_device_unregister(data->class_dev); 1401 hwmon_device_unregister(data->class_dev);
1336 w83627ehf_device_remove_files(&client->dev); 1402 w83627ehf_device_remove_files(&pdev->dev);
1337 1403 release_region(data->addr, IOREGION_LENGTH);
1338 if ((err = i2c_detach_client(client))) 1404 platform_set_drvdata(pdev, NULL);
1339 return err;
1340 release_region(client->addr + IOREGION_OFFSET, IOREGION_LENGTH);
1341 kfree(data); 1405 kfree(data);
1342 1406
1343 return 0; 1407 return 0;
1344} 1408}
1345 1409
1346static struct i2c_driver w83627ehf_driver = { 1410static struct platform_driver w83627ehf_driver = {
1347 .driver = { 1411 .driver = {
1348 .owner = THIS_MODULE, 1412 .owner = THIS_MODULE,
1349 .name = "w83627ehf", 1413 .name = DRVNAME,
1350 }, 1414 },
1351 .attach_adapter = w83627ehf_detect, 1415 .probe = w83627ehf_probe,
1352 .detach_client = w83627ehf_detach_client, 1416 .remove = __devexit_p(w83627ehf_remove),
1353}; 1417};
1354 1418
1355static int __init w83627ehf_find(int sioaddr, unsigned short *addr) 1419/* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1420static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1421 struct w83627ehf_sio_data *sio_data)
1356{ 1422{
1423 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1424 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1425 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1426
1357 u16 val; 1427 u16 val;
1428 const char *sio_name;
1358 1429
1359 REG = sioaddr; 1430 superio_enter(sioaddr);
1360 VAL = sioaddr + 1;
1361 superio_enter();
1362 1431
1363 val = (superio_inb(SIO_REG_DEVID) << 8) 1432 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1364 | superio_inb(SIO_REG_DEVID + 1); 1433 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1365 switch (val & SIO_ID_MASK) { 1434 switch (val & SIO_ID_MASK) {
1366 case SIO_W83627DHG_ID:
1367 w83627ehf_num_in = 9;
1368 break;
1369 case SIO_W83627EHF_ID: 1435 case SIO_W83627EHF_ID:
1436 sio_data->kind = w83627ehf;
1437 sio_name = sio_name_W83627EHF;
1438 break;
1370 case SIO_W83627EHG_ID: 1439 case SIO_W83627EHG_ID:
1371 w83627ehf_num_in = 10; 1440 sio_data->kind = w83627ehf;
1441 sio_name = sio_name_W83627EHG;
1442 break;
1443 case SIO_W83627DHG_ID:
1444 sio_data->kind = w83627dhg;
1445 sio_name = sio_name_W83627DHG;
1372 break; 1446 break;
1373 default: 1447 default:
1374 printk(KERN_WARNING "w83627ehf: unsupported chip ID: 0x%04x\n", 1448 if (val != 0xffff)
1375 val); 1449 pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n",
1376 superio_exit(); 1450 val);
1451 superio_exit(sioaddr);
1377 return -ENODEV; 1452 return -ENODEV;
1378 } 1453 }
1379 1454
1380 superio_select(W83627EHF_LD_HWM); 1455 /* We have a known chip, find the HWM I/O address */
1381 val = (superio_inb(SIO_REG_ADDR) << 8) 1456 superio_select(sioaddr, W83627EHF_LD_HWM);
1382 | superio_inb(SIO_REG_ADDR + 1); 1457 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1458 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1383 *addr = val & IOREGION_ALIGNMENT; 1459 *addr = val & IOREGION_ALIGNMENT;
1384 if (*addr == 0) { 1460 if (*addr == 0) {
1385 superio_exit(); 1461 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1462 "device with a base I/O port 0.\n");
1463 superio_exit(sioaddr);
1386 return -ENODEV; 1464 return -ENODEV;
1387 } 1465 }
1388 1466
1389 /* Activate logical device if needed */ 1467 /* Activate logical device if needed */
1390 val = superio_inb(SIO_REG_ENABLE); 1468 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1391 if (!(val & 0x01)) 1469 if (!(val & 0x01)) {
1392 superio_outb(SIO_REG_ENABLE, val | 0x01); 1470 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1471 "Sensor is probably unusable.\n");
1472 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1473 }
1474
1475 superio_exit(sioaddr);
1476 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1477 sio_data->sioreg = sioaddr;
1393 1478
1394 superio_exit();
1395 return 0; 1479 return 0;
1396} 1480}
1397 1481
1482/* when Super-I/O functions move to a separate file, the Super-I/O
1483 * bus will manage the lifetime of the device and this module will only keep
1484 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1485 * must keep track of the device */
1486static struct platform_device *pdev;
1487
1398static int __init sensors_w83627ehf_init(void) 1488static int __init sensors_w83627ehf_init(void)
1399{ 1489{
1400 if (w83627ehf_find(0x2e, &address) 1490 int err;
1401 && w83627ehf_find(0x4e, &address)) 1491 unsigned short address;
1492 struct resource res;
1493 struct w83627ehf_sio_data sio_data;
1494
1495 /* initialize sio_data->kind and sio_data->sioreg.
1496 *
1497 * when Super-I/O functions move to a separate file, the Super-I/O
1498 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1499 * w83627ehf hardware monitor, and call probe() */
1500 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1501 w83627ehf_find(0x4e, &address, &sio_data))
1402 return -ENODEV; 1502 return -ENODEV;
1403 1503
1404 return i2c_isa_add_driver(&w83627ehf_driver); 1504 err = platform_driver_register(&w83627ehf_driver);
1505 if (err)
1506 goto exit;
1507
1508 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1509 err = -ENOMEM;
1510 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1511 goto exit_unregister;
1512 }
1513
1514 err = platform_device_add_data(pdev, &sio_data,
1515 sizeof(struct w83627ehf_sio_data));
1516 if (err) {
1517 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1518 goto exit_device_put;
1519 }
1520
1521 memset(&res, 0, sizeof(res));
1522 res.name = DRVNAME;
1523 res.start = address + IOREGION_OFFSET;
1524 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1525 res.flags = IORESOURCE_IO;
1526 err = platform_device_add_resources(pdev, &res, 1);
1527 if (err) {
1528 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1529 "(%d)\n", err);
1530 goto exit_device_put;
1531 }
1532
1533 /* platform_device_add calls probe() */
1534 err = platform_device_add(pdev);
1535 if (err) {
1536 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1537 err);
1538 goto exit_device_put;
1539 }
1540
1541 return 0;
1542
1543exit_device_put:
1544 platform_device_put(pdev);
1545exit_unregister:
1546 platform_driver_unregister(&w83627ehf_driver);
1547exit:
1548 return err;
1405} 1549}
1406 1550
1407static void __exit sensors_w83627ehf_exit(void) 1551static void __exit sensors_w83627ehf_exit(void)
1408{ 1552{
1409 i2c_isa_del_driver(&w83627ehf_driver); 1553 platform_device_unregister(pdev);
1554 platform_driver_unregister(&w83627ehf_driver);
1410} 1555}
1411 1556
1412MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>"); 1557MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c
index 12cb40a975..1ce78179b0 100644
--- a/drivers/hwmon/w83627hf.c
+++ b/drivers/hwmon/w83627hf.c
@@ -220,6 +220,18 @@ static const u8 regpwm[] = { W83627THF_REG_PWM1, W83627THF_REG_PWM2,
220#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \ 220#define W836X7HF_REG_PWM(type, nr) (((type) == w83627hf) ? \
221 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1]) 221 regpwm_627hf[(nr) - 1] : regpwm[(nr) - 1])
222 222
223#define W83627HF_REG_PWM_FREQ 0x5C /* Only for the 627HF */
224
225#define W83637HF_REG_PWM_FREQ1 0x00 /* 697HF/687THF too */
226#define W83637HF_REG_PWM_FREQ2 0x02 /* 697HF/687THF too */
227#define W83637HF_REG_PWM_FREQ3 0x10 /* 687THF too */
228
229static const u8 W83637HF_REG_PWM_FREQ[] = { W83637HF_REG_PWM_FREQ1,
230 W83637HF_REG_PWM_FREQ2,
231 W83637HF_REG_PWM_FREQ3 };
232
233#define W83627HF_BASE_PWM_FREQ 46870
234
223#define W83781D_REG_I2C_ADDR 0x48 235#define W83781D_REG_I2C_ADDR 0x48
224#define W83781D_REG_I2C_SUBADDR 0x4A 236#define W83781D_REG_I2C_SUBADDR 0x4A
225 237
@@ -267,6 +279,49 @@ static int TEMP_FROM_REG(u8 reg)
267 279
268#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255)) 280#define PWM_TO_REG(val) (SENSORS_LIMIT((val),0,255))
269 281
282static inline unsigned long pwm_freq_from_reg_627hf(u8 reg)
283{
284 unsigned long freq;
285 freq = W83627HF_BASE_PWM_FREQ >> reg;
286 return freq;
287}
288static inline u8 pwm_freq_to_reg_627hf(unsigned long val)
289{
290 u8 i;
291 /* Only 5 dividers (1 2 4 8 16)
292 Search for the nearest available frequency */
293 for (i = 0; i < 4; i++) {
294 if (val > (((W83627HF_BASE_PWM_FREQ >> i) +
295 (W83627HF_BASE_PWM_FREQ >> (i+1))) / 2))
296 break;
297 }
298 return i;
299}
300
301static inline unsigned long pwm_freq_from_reg(u8 reg)
302{
303 /* Clock bit 8 -> 180 kHz or 24 MHz */
304 unsigned long clock = (reg & 0x80) ? 180000UL : 24000000UL;
305
306 reg &= 0x7f;
307 /* This should not happen but anyway... */
308 if (reg == 0)
309 reg++;
310 return (clock / (reg << 8));
311}
312static inline u8 pwm_freq_to_reg(unsigned long val)
313{
314 /* Minimum divider value is 0x01 and maximum is 0x7F */
315 if (val >= 93750) /* The highest we can do */
316 return 0x01;
317 if (val >= 720) /* Use 24 MHz clock */
318 return (24000000UL / (val << 8));
319 if (val < 6) /* The lowest we can do */
320 return 0xFF;
321 else /* Use 180 kHz clock */
322 return (0x80 | (180000UL / (val << 8)));
323}
324
270#define BEEP_MASK_FROM_REG(val) (val) 325#define BEEP_MASK_FROM_REG(val) (val)
271#define BEEP_MASK_TO_REG(val) ((val) & 0xffffff) 326#define BEEP_MASK_TO_REG(val) ((val) & 0xffffff)
272#define BEEP_ENABLE_TO_REG(val) ((val)?1:0) 327#define BEEP_ENABLE_TO_REG(val) ((val)?1:0)
@@ -316,6 +371,7 @@ struct w83627hf_data {
316 u32 beep_mask; /* Register encoding, combined */ 371 u32 beep_mask; /* Register encoding, combined */
317 u8 beep_enable; /* Boolean */ 372 u8 beep_enable; /* Boolean */
318 u8 pwm[3]; /* Register value */ 373 u8 pwm[3]; /* Register value */
374 u8 pwm_freq[3]; /* Register value */
319 u16 sens[3]; /* 782D/783S only. 375 u16 sens[3]; /* 782D/783S only.
320 1 = pentium diode; 2 = 3904 diode; 376 1 = pentium diode; 2 = 3904 diode;
321 3000-5000 = thermistor beta. 377 3000-5000 = thermistor beta.
@@ -852,6 +908,64 @@ sysfs_pwm(2);
852sysfs_pwm(3); 908sysfs_pwm(3);
853 909
854static ssize_t 910static ssize_t
911show_pwm_freq_reg(struct device *dev, char *buf, int nr)
912{
913 struct w83627hf_data *data = w83627hf_update_device(dev);
914 if (data->type == w83627hf)
915 return sprintf(buf, "%ld\n",
916 pwm_freq_from_reg_627hf(data->pwm_freq[nr - 1]));
917 else
918 return sprintf(buf, "%ld\n",
919 pwm_freq_from_reg(data->pwm_freq[nr - 1]));
920}
921
922static ssize_t
923store_pwm_freq_reg(struct device *dev, const char *buf, size_t count, int nr)
924{
925 struct w83627hf_data *data = dev_get_drvdata(dev);
926 static const u8 mask[]={0xF8, 0x8F};
927 u32 val;
928
929 val = simple_strtoul(buf, NULL, 10);
930
931 mutex_lock(&data->update_lock);
932
933 if (data->type == w83627hf) {
934 data->pwm_freq[nr - 1] = pwm_freq_to_reg_627hf(val);
935 w83627hf_write_value(data, W83627HF_REG_PWM_FREQ,
936 (data->pwm_freq[nr - 1] << ((nr - 1)*4)) |
937 (w83627hf_read_value(data,
938 W83627HF_REG_PWM_FREQ) & mask[nr - 1]));
939 } else {
940 data->pwm_freq[nr - 1] = pwm_freq_to_reg(val);
941 w83627hf_write_value(data, W83637HF_REG_PWM_FREQ[nr - 1],
942 data->pwm_freq[nr - 1]);
943 }
944
945 mutex_unlock(&data->update_lock);
946 return count;
947}
948
949#define sysfs_pwm_freq(offset) \
950static ssize_t show_regs_pwm_freq_##offset(struct device *dev, \
951 struct device_attribute *attr, char *buf) \
952{ \
953 return show_pwm_freq_reg(dev, buf, offset); \
954} \
955static ssize_t \
956store_regs_pwm_freq_##offset(struct device *dev, \
957 struct device_attribute *attr, const char *buf, size_t count) \
958{ \
959 return store_pwm_freq_reg(dev, buf, count, offset); \
960} \
961static DEVICE_ATTR(pwm##offset##_freq, S_IRUGO | S_IWUSR, \
962 show_regs_pwm_freq_##offset, store_regs_pwm_freq_##offset);
963
964sysfs_pwm_freq(1);
965sysfs_pwm_freq(2);
966sysfs_pwm_freq(3);
967
968static ssize_t
855show_sensor_reg(struct device *dev, char *buf, int nr) 969show_sensor_reg(struct device *dev, char *buf, int nr)
856{ 970{
857 struct w83627hf_data *data = w83627hf_update_device(dev); 971 struct w83627hf_data *data = w83627hf_update_device(dev);
@@ -1077,6 +1191,9 @@ static struct attribute *w83627hf_attributes_opt[] = {
1077 1191
1078 &dev_attr_pwm3.attr, 1192 &dev_attr_pwm3.attr,
1079 1193
1194 &dev_attr_pwm1_freq.attr,
1195 &dev_attr_pwm2_freq.attr,
1196 &dev_attr_pwm3_freq.attr,
1080 NULL 1197 NULL
1081}; 1198};
1082 1199
@@ -1139,7 +1256,9 @@ static int __devinit w83627hf_probe(struct platform_device *pdev)
1139 || (err = device_create_file(dev, &dev_attr_in5_max)) 1256 || (err = device_create_file(dev, &dev_attr_in5_max))
1140 || (err = device_create_file(dev, &dev_attr_in6_input)) 1257 || (err = device_create_file(dev, &dev_attr_in6_input))
1141 || (err = device_create_file(dev, &dev_attr_in6_min)) 1258 || (err = device_create_file(dev, &dev_attr_in6_min))
1142 || (err = device_create_file(dev, &dev_attr_in6_max))) 1259 || (err = device_create_file(dev, &dev_attr_in6_max))
1260 || (err = device_create_file(dev, &dev_attr_pwm1_freq))
1261 || (err = device_create_file(dev, &dev_attr_pwm2_freq)))
1143 goto ERROR4; 1262 goto ERROR4;
1144 1263
1145 if (data->type != w83697hf) 1264 if (data->type != w83697hf)
@@ -1169,6 +1288,12 @@ static int __devinit w83627hf_probe(struct platform_device *pdev)
1169 if ((err = device_create_file(dev, &dev_attr_pwm3))) 1288 if ((err = device_create_file(dev, &dev_attr_pwm3)))
1170 goto ERROR4; 1289 goto ERROR4;
1171 1290
1291 if (data->type == w83637hf || data->type == w83687thf)
1292 if ((err = device_create_file(dev, &dev_attr_pwm1_freq))
1293 || (err = device_create_file(dev, &dev_attr_pwm2_freq))
1294 || (err = device_create_file(dev, &dev_attr_pwm3_freq)))
1295 goto ERROR4;
1296
1172 data->class_dev = hwmon_device_register(dev); 1297 data->class_dev = hwmon_device_register(dev);
1173 if (IS_ERR(data->class_dev)) { 1298 if (IS_ERR(data->class_dev)) {
1174 err = PTR_ERR(data->class_dev); 1299 err = PTR_ERR(data->class_dev);
@@ -1181,6 +1306,7 @@ static int __devinit w83627hf_probe(struct platform_device *pdev)
1181 sysfs_remove_group(&dev->kobj, &w83627hf_group); 1306 sysfs_remove_group(&dev->kobj, &w83627hf_group);
1182 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt); 1307 sysfs_remove_group(&dev->kobj, &w83627hf_group_opt);
1183 ERROR3: 1308 ERROR3:
1309 platform_set_drvdata(pdev, NULL);
1184 kfree(data); 1310 kfree(data);
1185 ERROR1: 1311 ERROR1:
1186 release_region(res->start, WINB_REGION_SIZE); 1312 release_region(res->start, WINB_REGION_SIZE);
@@ -1193,11 +1319,11 @@ static int __devexit w83627hf_remove(struct platform_device *pdev)
1193 struct w83627hf_data *data = platform_get_drvdata(pdev); 1319 struct w83627hf_data *data = platform_get_drvdata(pdev);
1194 struct resource *res; 1320 struct resource *res;
1195 1321
1196 platform_set_drvdata(pdev, NULL);
1197 hwmon_device_unregister(data->class_dev); 1322 hwmon_device_unregister(data->class_dev);
1198 1323
1199 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group); 1324 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group);
1200 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt); 1325 sysfs_remove_group(&pdev->dev.kobj, &w83627hf_group_opt);
1326 platform_set_drvdata(pdev, NULL);
1201 kfree(data); 1327 kfree(data);
1202 1328
1203 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 1329 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
@@ -1472,6 +1598,20 @@ static struct w83627hf_data *w83627hf_update_device(struct device *dev)
1472 (data->type == w83627hf || data->type == w83697hf)) 1598 (data->type == w83627hf || data->type == w83697hf))
1473 break; 1599 break;
1474 } 1600 }
1601 if (data->type == w83627hf) {
1602 u8 tmp = w83627hf_read_value(data,
1603 W83627HF_REG_PWM_FREQ);
1604 data->pwm_freq[0] = tmp & 0x07;
1605 data->pwm_freq[1] = (tmp >> 4) & 0x07;
1606 } else if (data->type != w83627thf) {
1607 for (i = 1; i <= 3; i++) {
1608 data->pwm_freq[i - 1] =
1609 w83627hf_read_value(data,
1610 W83637HF_REG_PWM_FREQ[i - 1]);
1611 if (i == 2 && (data->type == w83697hf))
1612 break;
1613 }
1614 }
1475 1615
1476 data->temp = w83627hf_read_value(data, W83781D_REG_TEMP(1)); 1616 data->temp = w83627hf_read_value(data, W83781D_REG_TEMP(1));
1477 data->temp_max = 1617 data->temp_max =
@@ -1548,15 +1688,12 @@ static int __init w83627hf_device_add(unsigned short address,
1548 goto exit_device_put; 1688 goto exit_device_put;
1549 } 1689 }
1550 1690
1551 pdev->dev.platform_data = kmalloc(sizeof(struct w83627hf_sio_data), 1691 err = platform_device_add_data(pdev, sio_data,
1552 GFP_KERNEL); 1692 sizeof(struct w83627hf_sio_data));
1553 if (!pdev->dev.platform_data) { 1693 if (err) {
1554 err = -ENOMEM;
1555 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n"); 1694 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1556 goto exit_device_put; 1695 goto exit_device_put;
1557 } 1696 }
1558 memcpy(pdev->dev.platform_data, sio_data,
1559 sizeof(struct w83627hf_sio_data));
1560 1697
1561 err = platform_device_add(pdev); 1698 err = platform_device_add(pdev);
1562 if (err) { 1699 if (err) {
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 1c77e14480..da1647869f 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -237,9 +237,6 @@ config I2C_IOP3XX
237 This driver can also be built as a module. If so, the module 237 This driver can also be built as a module. If so, the module
238 will be called i2c-iop3xx. 238 will be called i2c-iop3xx.
239 239
240config I2C_ISA
241 tristate
242
243config I2C_IXP4XX 240config I2C_IXP4XX
244 tristate "IXP4xx GPIO-Based I2C Interface (DEPRECATED)" 241 tristate "IXP4xx GPIO-Based I2C Interface (DEPRECATED)"
245 depends on ARCH_IXP4XX 242 depends on ARCH_IXP4XX
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index a6db4e38bd..5b752e4e19 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -18,7 +18,6 @@ obj-$(CONFIG_I2C_I801) += i2c-i801.o
18obj-$(CONFIG_I2C_I810) += i2c-i810.o 18obj-$(CONFIG_I2C_I810) += i2c-i810.o
19obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o 19obj-$(CONFIG_I2C_IBM_IIC) += i2c-ibm_iic.o
20obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o 20obj-$(CONFIG_I2C_IOP3XX) += i2c-iop3xx.o
21obj-$(CONFIG_I2C_ISA) += i2c-isa.o
22obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o 21obj-$(CONFIG_I2C_IXP2000) += i2c-ixp2000.o
23obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o 22obj-$(CONFIG_I2C_IXP4XX) += i2c-ixp4xx.o
24obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o 23obj-$(CONFIG_I2C_POWERMAC) += i2c-powermac.o
diff --git a/drivers/i2c/busses/i2c-isa.c b/drivers/i2c/busses/i2c-isa.c
deleted file mode 100644
index b0e1370075..0000000000
--- a/drivers/i2c/busses/i2c-isa.c
+++ /dev/null
@@ -1,192 +0,0 @@
1/*
2 i2c-isa.c - an i2c-core-like thing for ISA hardware monitoring chips
3 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
4
5 Based on the i2c-isa pseudo-adapter from the lm_sensors project
6 Copyright (c) 1998, 1999 Frodo Looijaard <frodol@dds.nl>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21*/
22
23/* This implements an i2c-core-like thing for ISA hardware monitoring
24 chips. Such chips are linked to the i2c subsystem for historical
25 reasons (because the early ISA hardware monitoring chips such as the
26 LM78 had both an I2C and an ISA interface). They used to be
27 registered with the main i2c-core, but as a first step in the
28 direction of a clean separation between I2C and ISA chip drivers,
29 we now have this separate core for ISA ones. It is significantly
30 more simple than the real one, of course, because we don't have to
31 handle multiple busses: there is only one (fake) ISA adapter.
32 It is worth noting that we still rely on i2c-core for some things
33 at the moment - but hopefully this won't last. */
34
35#include <linux/init.h>
36#include <linux/module.h>
37#include <linux/kernel.h>
38#include <linux/errno.h>
39#include <linux/i2c.h>
40#include <linux/i2c-isa.h>
41#include <linux/platform_device.h>
42#include <linux/completion.h>
43
44/* Exported by i2c-core for i2c-isa only */
45extern void i2c_adapter_dev_release(struct device *dev);
46extern struct class i2c_adapter_class;
47
48static u32 isa_func(struct i2c_adapter *adapter);
49
50/* This is the actual algorithm we define */
51static const struct i2c_algorithm isa_algorithm = {
52 .functionality = isa_func,
53};
54
55/* There can only be one... */
56static struct i2c_adapter isa_adapter = {
57 .owner = THIS_MODULE,
58 .id = I2C_HW_ISA,
59 .class = I2C_CLASS_HWMON,
60 .algo = &isa_algorithm,
61 .name = "ISA main adapter",
62};
63
64/* We can't do a thing... */
65static u32 isa_func(struct i2c_adapter *adapter)
66{
67 return 0;
68}
69
70
71/* We implement an interface which resembles i2c_{add,del}_driver,
72 but for i2c-isa drivers. We don't have to remember and handle lists
73 of drivers and adapters so this is much more simple, of course. */
74
75int i2c_isa_add_driver(struct i2c_driver *driver)
76{
77 int res;
78
79 /* Add the driver to the list of i2c drivers in the driver core */
80 driver->driver.bus = &i2c_bus_type;
81 res = driver_register(&driver->driver);
82 if (res)
83 return res;
84 dev_dbg(&isa_adapter.dev, "Driver %s registered\n", driver->driver.name);
85
86 /* Now look for clients */
87 res = driver->attach_adapter(&isa_adapter);
88 if (res) {
89 dev_dbg(&isa_adapter.dev,
90 "Driver %s failed to attach adapter, unregistering\n",
91 driver->driver.name);
92 driver_unregister(&driver->driver);
93 }
94 return res;
95}
96
97int i2c_isa_del_driver(struct i2c_driver *driver)
98{
99 struct list_head *item, *_n;
100 struct i2c_client *client;
101 int res;
102
103 /* Detach all clients belonging to this one driver */
104 list_for_each_safe(item, _n, &isa_adapter.clients) {
105 client = list_entry(item, struct i2c_client, list);
106 if (client->driver != driver)
107 continue;
108 dev_dbg(&isa_adapter.dev, "Detaching client %s at 0x%x\n",
109 client->name, client->addr);
110 if ((res = driver->detach_client(client))) {
111 dev_err(&isa_adapter.dev, "Failed, driver "
112 "%s not unregistered!\n",
113 driver->driver.name);
114 return res;
115 }
116 }
117
118 /* Get the driver off the core list */
119 driver_unregister(&driver->driver);
120 dev_dbg(&isa_adapter.dev, "Driver %s unregistered\n", driver->driver.name);
121
122 return 0;
123}
124
125
126static int __init i2c_isa_init(void)
127{
128 int err;
129
130 mutex_init(&isa_adapter.clist_lock);
131 INIT_LIST_HEAD(&isa_adapter.clients);
132
133 isa_adapter.nr = ANY_I2C_ISA_BUS;
134 isa_adapter.dev.parent = &platform_bus;
135 sprintf(isa_adapter.dev.bus_id, "i2c-%d", isa_adapter.nr);
136 isa_adapter.dev.release = &i2c_adapter_dev_release;
137 isa_adapter.dev.class = &i2c_adapter_class;
138 err = device_register(&isa_adapter.dev);
139 if (err) {
140 printk(KERN_ERR "i2c-isa: Failed to register device\n");
141 goto exit;
142 }
143
144 dev_dbg(&isa_adapter.dev, "%s registered\n", isa_adapter.name);
145
146 return 0;
147
148exit:
149 return err;
150}
151
152static void __exit i2c_isa_exit(void)
153{
154#ifdef DEBUG
155 struct list_head *item, *_n;
156 struct i2c_client *client = NULL;
157#endif
158
159 /* There should be no more active client */
160#ifdef DEBUG
161 dev_dbg(&isa_adapter.dev, "Looking for clients\n");
162 list_for_each_safe(item, _n, &isa_adapter.clients) {
163 client = list_entry(item, struct i2c_client, list);
164 dev_err(&isa_adapter.dev, "Driver %s still has an active "
165 "ISA client at 0x%x\n", client->driver->driver.name,
166 client->addr);
167 }
168 if (client != NULL)
169 return;
170#endif
171
172 /* Clean up the sysfs representation */
173 dev_dbg(&isa_adapter.dev, "Unregistering from sysfs\n");
174 init_completion(&isa_adapter.dev_released);
175 device_unregister(&isa_adapter.dev);
176
177 /* Wait for sysfs to drop all references */
178 dev_dbg(&isa_adapter.dev, "Waiting for sysfs completion\n");
179 wait_for_completion(&isa_adapter.dev_released);
180
181 dev_dbg(&isa_adapter.dev, "%s unregistered\n", isa_adapter.name);
182}
183
184EXPORT_SYMBOL(i2c_isa_add_driver);
185EXPORT_SYMBOL(i2c_isa_del_driver);
186
187MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
188MODULE_DESCRIPTION("ISA bus access through i2c");
189MODULE_LICENSE("GPL");
190
191module_init(i2c_isa_init);
192module_exit(i2c_isa_exit);
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 6971a62397..d663e6960d 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -288,7 +288,6 @@ void i2c_adapter_dev_release(struct device *dev)
288 struct i2c_adapter *adap = to_i2c_adapter(dev); 288 struct i2c_adapter *adap = to_i2c_adapter(dev);
289 complete(&adap->dev_released); 289 complete(&adap->dev_released);
290} 290}
291EXPORT_SYMBOL_GPL(i2c_adapter_dev_release); /* exported to i2c-isa */
292 291
293static ssize_t 292static ssize_t
294show_adapter_name(struct device *dev, struct device_attribute *attr, char *buf) 293show_adapter_name(struct device *dev, struct device_attribute *attr, char *buf)
@@ -307,7 +306,6 @@ struct class i2c_adapter_class = {
307 .name = "i2c-adapter", 306 .name = "i2c-adapter",
308 .dev_attrs = i2c_adapter_attrs, 307 .dev_attrs = i2c_adapter_attrs,
309}; 308};
310EXPORT_SYMBOL_GPL(i2c_adapter_class); /* exported to i2c-isa */
311 309
312static void i2c_scan_static_board_info(struct i2c_adapter *adapter) 310static void i2c_scan_static_board_info(struct i2c_adapter *adapter)
313{ 311{
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c
index c5b5011da5..f9de798444 100644
--- a/drivers/ide/ide-io.c
+++ b/drivers/ide/ide-io.c
@@ -55,7 +55,7 @@
55#include <asm/bitops.h> 55#include <asm/bitops.h>
56 56
57static int __ide_end_request(ide_drive_t *drive, struct request *rq, 57static int __ide_end_request(ide_drive_t *drive, struct request *rq,
58 int uptodate, int nr_sectors) 58 int uptodate, unsigned int nr_bytes)
59{ 59{
60 int ret = 1; 60 int ret = 1;
61 61
@@ -64,7 +64,7 @@ static int __ide_end_request(ide_drive_t *drive, struct request *rq,
64 * complete the whole request right now 64 * complete the whole request right now
65 */ 65 */
66 if (blk_noretry_request(rq) && end_io_error(uptodate)) 66 if (blk_noretry_request(rq) && end_io_error(uptodate))
67 nr_sectors = rq->hard_nr_sectors; 67 nr_bytes = rq->hard_nr_sectors << 9;
68 68
69 if (!blk_fs_request(rq) && end_io_error(uptodate) && !rq->errors) 69 if (!blk_fs_request(rq) && end_io_error(uptodate) && !rq->errors)
70 rq->errors = -EIO; 70 rq->errors = -EIO;
@@ -78,7 +78,7 @@ static int __ide_end_request(ide_drive_t *drive, struct request *rq,
78 HWGROUP(drive)->hwif->ide_dma_on(drive); 78 HWGROUP(drive)->hwif->ide_dma_on(drive);
79 } 79 }
80 80
81 if (!end_that_request_first(rq, uptodate, nr_sectors)) { 81 if (!end_that_request_chunk(rq, uptodate, nr_bytes)) {
82 add_disk_randomness(rq->rq_disk); 82 add_disk_randomness(rq->rq_disk);
83 if (!list_empty(&rq->queuelist)) 83 if (!list_empty(&rq->queuelist))
84 blkdev_dequeue_request(rq); 84 blkdev_dequeue_request(rq);
@@ -103,6 +103,7 @@ static int __ide_end_request(ide_drive_t *drive, struct request *rq,
103 103
104int ide_end_request (ide_drive_t *drive, int uptodate, int nr_sectors) 104int ide_end_request (ide_drive_t *drive, int uptodate, int nr_sectors)
105{ 105{
106 unsigned int nr_bytes = nr_sectors << 9;
106 struct request *rq; 107 struct request *rq;
107 unsigned long flags; 108 unsigned long flags;
108 int ret = 1; 109 int ret = 1;
@@ -114,10 +115,14 @@ int ide_end_request (ide_drive_t *drive, int uptodate, int nr_sectors)
114 spin_lock_irqsave(&ide_lock, flags); 115 spin_lock_irqsave(&ide_lock, flags);
115 rq = HWGROUP(drive)->rq; 116 rq = HWGROUP(drive)->rq;
116 117
117 if (!nr_sectors) 118 if (!nr_bytes) {
118 nr_sectors = rq->hard_cur_sectors; 119 if (blk_pc_request(rq))
120 nr_bytes = rq->data_len;
121 else
122 nr_bytes = rq->hard_cur_sectors << 9;
123 }
119 124
120 ret = __ide_end_request(drive, rq, uptodate, nr_sectors); 125 ret = __ide_end_request(drive, rq, uptodate, nr_bytes);
121 126
122 spin_unlock_irqrestore(&ide_lock, flags); 127 spin_unlock_irqrestore(&ide_lock, flags);
123 return ret; 128 return ret;
diff --git a/drivers/ide/mips/swarm.c b/drivers/ide/mips/swarm.c
index 6e935d7c63..c2e29571b0 100644
--- a/drivers/ide/mips/swarm.c
+++ b/drivers/ide/mips/swarm.c
@@ -165,12 +165,11 @@ static int __devinit swarm_ide_init_module(void)
165 goto out; 165 goto out;
166 } 166 }
167 167
168 if (!(pldev = kmalloc(sizeof (*pldev), GFP_KERNEL))) { 168 if (!(pldev = kzalloc(sizeof (*pldev), GFP_KERNEL))) {
169 err = -ENOMEM; 169 err = -ENOMEM;
170 goto out_unregister_driver; 170 goto out_unregister_driver;
171 } 171 }
172 172
173 memset (pldev, 0, sizeof (*pldev));
174 pldev->name = swarm_ide_string; 173 pldev->name = swarm_ide_string;
175 pldev->id = 0; 174 pldev->id = 0;
176 pldev->dev.release = swarm_ide_platform_release; 175 pldev->dev.release = swarm_ide_platform_release;
diff --git a/drivers/infiniband/core/addr.c b/drivers/infiniband/core/addr.c
index a91001c59b..c5c33d35f8 100644
--- a/drivers/infiniband/core/addr.c
+++ b/drivers/infiniband/core/addr.c
@@ -295,10 +295,9 @@ int rdma_resolve_ip(struct rdma_addr_client *client,
295 struct addr_req *req; 295 struct addr_req *req;
296 int ret = 0; 296 int ret = 0;
297 297
298 req = kmalloc(sizeof *req, GFP_KERNEL); 298 req = kzalloc(sizeof *req, GFP_KERNEL);
299 if (!req) 299 if (!req)
300 return -ENOMEM; 300 return -ENOMEM;
301 memset(req, 0, sizeof *req);
302 301
303 if (src_addr) 302 if (src_addr)
304 memcpy(&req->src_addr, src_addr, ip_addr_size(src_addr)); 303 memcpy(&req->src_addr, src_addr, ip_addr_size(src_addr));
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cm.c b/drivers/infiniband/hw/cxgb3/iwch_cm.c
index 5dc68cd562..9574088f0d 100644
--- a/drivers/infiniband/hw/cxgb3/iwch_cm.c
+++ b/drivers/infiniband/hw/cxgb3/iwch_cm.c
@@ -229,9 +229,8 @@ static void *alloc_ep(int size, gfp_t gfp)
229{ 229{
230 struct iwch_ep_common *epc; 230 struct iwch_ep_common *epc;
231 231
232 epc = kmalloc(size, gfp); 232 epc = kzalloc(size, gfp);
233 if (epc) { 233 if (epc) {
234 memset(epc, 0, size);
235 kref_init(&epc->kref); 234 kref_init(&epc->kref);
236 spin_lock_init(&epc->lock); 235 spin_lock_init(&epc->lock);
237 init_waitqueue_head(&epc->waitq); 236 init_waitqueue_head(&epc->waitq);
diff --git a/drivers/input/serio/ambakmi.c b/drivers/input/serio/ambakmi.c
index 5a7b49c355..b10ffae7c3 100644
--- a/drivers/input/serio/ambakmi.c
+++ b/drivers/input/serio/ambakmi.c
@@ -117,15 +117,13 @@ static int amba_kmi_probe(struct amba_device *dev, void *id)
117 if (ret) 117 if (ret)
118 return ret; 118 return ret;
119 119
120 kmi = kmalloc(sizeof(struct amba_kmi_port), GFP_KERNEL); 120 kmi = kzalloc(sizeof(struct amba_kmi_port), GFP_KERNEL);
121 io = kmalloc(sizeof(struct serio), GFP_KERNEL); 121 io = kzalloc(sizeof(struct serio), GFP_KERNEL);
122 if (!kmi || !io) { 122 if (!kmi || !io) {
123 ret = -ENOMEM; 123 ret = -ENOMEM;
124 goto out; 124 goto out;
125 } 125 }
126 126
127 memset(kmi, 0, sizeof(struct amba_kmi_port));
128 memset(io, 0, sizeof(struct serio));
129 127
130 io->id.type = SERIO_8042; 128 io->id.type = SERIO_8042;
131 io->write = amba_kmi_write; 129 io->write = amba_kmi_write;
diff --git a/drivers/input/serio/pcips2.c b/drivers/input/serio/pcips2.c
index ea5e3c6ddb..1b404f9e3b 100644
--- a/drivers/input/serio/pcips2.c
+++ b/drivers/input/serio/pcips2.c
@@ -140,15 +140,13 @@ static int __devinit pcips2_probe(struct pci_dev *dev, const struct pci_device_i
140 if (ret) 140 if (ret)
141 goto disable; 141 goto disable;
142 142
143 ps2if = kmalloc(sizeof(struct pcips2_data), GFP_KERNEL); 143 ps2if = kzalloc(sizeof(struct pcips2_data), GFP_KERNEL);
144 serio = kmalloc(sizeof(struct serio), GFP_KERNEL); 144 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
145 if (!ps2if || !serio) { 145 if (!ps2if || !serio) {
146 ret = -ENOMEM; 146 ret = -ENOMEM;
147 goto release; 147 goto release;
148 } 148 }
149 149
150 memset(ps2if, 0, sizeof(struct pcips2_data));
151 memset(serio, 0, sizeof(struct serio));
152 150
153 serio->id.type = SERIO_8042; 151 serio->id.type = SERIO_8042;
154 serio->write = pcips2_write; 152 serio->write = pcips2_write;
diff --git a/drivers/input/serio/sa1111ps2.c b/drivers/input/serio/sa1111ps2.c
index d31ece8f68..2ad88780a1 100644
--- a/drivers/input/serio/sa1111ps2.c
+++ b/drivers/input/serio/sa1111ps2.c
@@ -234,15 +234,13 @@ static int __devinit ps2_probe(struct sa1111_dev *dev)
234 struct serio *serio; 234 struct serio *serio;
235 int ret; 235 int ret;
236 236
237 ps2if = kmalloc(sizeof(struct ps2if), GFP_KERNEL); 237 ps2if = kzalloc(sizeof(struct ps2if), GFP_KERNEL);
238 serio = kmalloc(sizeof(struct serio), GFP_KERNEL); 238 serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
239 if (!ps2if || !serio) { 239 if (!ps2if || !serio) {
240 ret = -ENOMEM; 240 ret = -ENOMEM;
241 goto free; 241 goto free;
242 } 242 }
243 243
244 memset(ps2if, 0, sizeof(struct ps2if));
245 memset(serio, 0, sizeof(struct serio));
246 244
247 serio->id.type = SERIO_8042; 245 serio->id.type = SERIO_8042;
248 serio->write = ps2_write; 246 serio->write = ps2_write;
diff --git a/drivers/isdn/sc/card.h b/drivers/isdn/sc/card.h
index 4fbfa825c3..5992f63c38 100644
--- a/drivers/isdn/sc/card.h
+++ b/drivers/isdn/sc/card.h
@@ -125,7 +125,7 @@ int sendmessage(int card, unsigned int procid, unsigned int type,
125int receivemessage(int card, RspMessage *rspmsg); 125int receivemessage(int card, RspMessage *rspmsg);
126int sc_ioctl(int card, scs_ioctl *data); 126int sc_ioctl(int card, scs_ioctl *data);
127int setup_buffers(int card, int c); 127int setup_buffers(int card, int c);
128void check_reset(unsigned long data); 128void sc_check_reset(unsigned long data);
129void check_phystat(unsigned long data); 129void check_phystat(unsigned long data);
130 130
131#endif /* CARD_H */ 131#endif /* CARD_H */
diff --git a/drivers/isdn/sc/command.c b/drivers/isdn/sc/command.c
index b7bb7cbcf5..0e4969c2ef 100644
--- a/drivers/isdn/sc/command.c
+++ b/drivers/isdn/sc/command.c
@@ -344,7 +344,7 @@ int reset(int card)
344 344
345 spin_lock_irqsave(&sc_adapter[card]->lock, flags); 345 spin_lock_irqsave(&sc_adapter[card]->lock, flags);
346 init_timer(&sc_adapter[card]->reset_timer); 346 init_timer(&sc_adapter[card]->reset_timer);
347 sc_adapter[card]->reset_timer.function = check_reset; 347 sc_adapter[card]->reset_timer.function = sc_check_reset;
348 sc_adapter[card]->reset_timer.data = card; 348 sc_adapter[card]->reset_timer.data = card;
349 sc_adapter[card]->reset_timer.expires = jiffies + CHECKRESET_TIME; 349 sc_adapter[card]->reset_timer.expires = jiffies + CHECKRESET_TIME;
350 add_timer(&sc_adapter[card]->reset_timer); 350 add_timer(&sc_adapter[card]->reset_timer);
diff --git a/drivers/isdn/sc/timer.c b/drivers/isdn/sc/timer.c
index cc1b8861be..91fbe0dc28 100644
--- a/drivers/isdn/sc/timer.c
+++ b/drivers/isdn/sc/timer.c
@@ -43,7 +43,7 @@ static void setup_ports(int card)
43 * Then, check to see if the signate has been set. Next, set the 43 * Then, check to see if the signate has been set. Next, set the
44 * signature to a known value and issue a startproc if needed. 44 * signature to a known value and issue a startproc if needed.
45 */ 45 */
46void check_reset(unsigned long data) 46void sc_check_reset(unsigned long data)
47{ 47{
48 unsigned long flags; 48 unsigned long flags;
49 unsigned long sig; 49 unsigned long sig;
diff --git a/drivers/kvm/Kconfig b/drivers/kvm/Kconfig
index 33fa28a8c1..2f661e5f0d 100644
--- a/drivers/kvm/Kconfig
+++ b/drivers/kvm/Kconfig
@@ -11,7 +11,6 @@ if VIRTUALIZATION
11config KVM 11config KVM
12 tristate "Kernel-based Virtual Machine (KVM) support" 12 tristate "Kernel-based Virtual Machine (KVM) support"
13 depends on X86 && EXPERIMENTAL 13 depends on X86 && EXPERIMENTAL
14 depends on X86_CMPXCHG64 || 64BIT
15 ---help--- 14 ---help---
16 Support hosting fully virtualized guest machines using hardware 15 Support hosting fully virtualized guest machines using hardware
17 virtualization extensions. You will need a fairly recent 16 virtualization extensions. You will need a fairly recent
diff --git a/drivers/lguest/Kconfig b/drivers/lguest/Kconfig
new file mode 100644
index 0000000000..43d901fdc7
--- /dev/null
+++ b/drivers/lguest/Kconfig
@@ -0,0 +1,20 @@
1config LGUEST
2 tristate "Linux hypervisor example code"
3 depends on X86 && PARAVIRT && NET && EXPERIMENTAL && !X86_PAE
4 select LGUEST_GUEST
5 select HVC_DRIVER
6 ---help---
7 This is a very simple module which allows you to run
8 multiple instances of the same Linux kernel, using the
9 "lguest" command found in the Documentation/lguest directory.
10 Note that "lguest" is pronounced to rhyme with "fell quest",
11 not "rustyvisor". See Documentation/lguest/lguest.txt.
12
13 If unsure, say N. If curious, say M. If masochistic, say Y.
14
15config LGUEST_GUEST
16 bool
17 help
18 The guest needs code built-in, even if the host has lguest
19 support as a module. The drivers are tiny, so we build them
20 in too.
diff --git a/drivers/lguest/Makefile b/drivers/lguest/Makefile
new file mode 100644
index 0000000000..55382c7d79
--- /dev/null
+++ b/drivers/lguest/Makefile
@@ -0,0 +1,7 @@
1# Guest requires the paravirt_ops replacement and the bus driver.
2obj-$(CONFIG_LGUEST_GUEST) += lguest.o lguest_asm.o lguest_bus.o
3
4# Host requires the other files, which can be a module.
5obj-$(CONFIG_LGUEST) += lg.o
6lg-y := core.o hypercalls.o page_tables.o interrupts_and_traps.o \
7 segments.o io.o lguest_user.o switcher.o
diff --git a/drivers/lguest/core.c b/drivers/lguest/core.c
new file mode 100644
index 0000000000..ce909ec574
--- /dev/null
+++ b/drivers/lguest/core.c
@@ -0,0 +1,462 @@
1/* World's simplest hypervisor, to test paravirt_ops and show
2 * unbelievers that virtualization is the future. Plus, it's fun! */
3#include <linux/module.h>
4#include <linux/stringify.h>
5#include <linux/stddef.h>
6#include <linux/io.h>
7#include <linux/mm.h>
8#include <linux/vmalloc.h>
9#include <linux/cpu.h>
10#include <linux/freezer.h>
11#include <asm/paravirt.h>
12#include <asm/desc.h>
13#include <asm/pgtable.h>
14#include <asm/uaccess.h>
15#include <asm/poll.h>
16#include <asm/highmem.h>
17#include <asm/asm-offsets.h>
18#include <asm/i387.h>
19#include "lg.h"
20
21/* Found in switcher.S */
22extern char start_switcher_text[], end_switcher_text[], switch_to_guest[];
23extern unsigned long default_idt_entries[];
24
25/* Every guest maps the core switcher code. */
26#define SHARED_SWITCHER_PAGES \
27 DIV_ROUND_UP(end_switcher_text - start_switcher_text, PAGE_SIZE)
28/* Pages for switcher itself, then two pages per cpu */
29#define TOTAL_SWITCHER_PAGES (SHARED_SWITCHER_PAGES + 2 * NR_CPUS)
30
31/* We map at -4M for ease of mapping into the guest (one PTE page). */
32#define SWITCHER_ADDR 0xFFC00000
33
34static struct vm_struct *switcher_vma;
35static struct page **switcher_page;
36
37static int cpu_had_pge;
38static struct {
39 unsigned long offset;
40 unsigned short segment;
41} lguest_entry;
42
43/* This One Big lock protects all inter-guest data structures. */
44DEFINE_MUTEX(lguest_lock);
45static DEFINE_PER_CPU(struct lguest *, last_guest);
46
47/* FIXME: Make dynamic. */
48#define MAX_LGUEST_GUESTS 16
49struct lguest lguests[MAX_LGUEST_GUESTS];
50
51/* Offset from where switcher.S was compiled to where we've copied it */
52static unsigned long switcher_offset(void)
53{
54 return SWITCHER_ADDR - (unsigned long)start_switcher_text;
55}
56
57/* This cpu's struct lguest_pages. */
58static struct lguest_pages *lguest_pages(unsigned int cpu)
59{
60 return &(((struct lguest_pages *)
61 (SWITCHER_ADDR + SHARED_SWITCHER_PAGES*PAGE_SIZE))[cpu]);
62}
63
64static __init int map_switcher(void)
65{
66 int i, err;
67 struct page **pagep;
68
69 switcher_page = kmalloc(sizeof(switcher_page[0])*TOTAL_SWITCHER_PAGES,
70 GFP_KERNEL);
71 if (!switcher_page) {
72 err = -ENOMEM;
73 goto out;
74 }
75
76 for (i = 0; i < TOTAL_SWITCHER_PAGES; i++) {
77 unsigned long addr = get_zeroed_page(GFP_KERNEL);
78 if (!addr) {
79 err = -ENOMEM;
80 goto free_some_pages;
81 }
82 switcher_page[i] = virt_to_page(addr);
83 }
84
85 switcher_vma = __get_vm_area(TOTAL_SWITCHER_PAGES * PAGE_SIZE,
86 VM_ALLOC, SWITCHER_ADDR, VMALLOC_END);
87 if (!switcher_vma) {
88 err = -ENOMEM;
89 printk("lguest: could not map switcher pages high\n");
90 goto free_pages;
91 }
92
93 pagep = switcher_page;
94 err = map_vm_area(switcher_vma, PAGE_KERNEL, &pagep);
95 if (err) {
96 printk("lguest: map_vm_area failed: %i\n", err);
97 goto free_vma;
98 }
99 memcpy(switcher_vma->addr, start_switcher_text,
100 end_switcher_text - start_switcher_text);
101
102 /* Fix up IDT entries to point into copied text. */
103 for (i = 0; i < IDT_ENTRIES; i++)
104 default_idt_entries[i] += switcher_offset();
105
106 for_each_possible_cpu(i) {
107 struct lguest_pages *pages = lguest_pages(i);
108 struct lguest_ro_state *state = &pages->state;
109
110 /* These fields are static: rest done in copy_in_guest_info */
111 state->host_gdt_desc.size = GDT_SIZE-1;
112 state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
113 store_idt(&state->host_idt_desc);
114 state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
115 state->guest_idt_desc.address = (long)&state->guest_idt;
116 state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
117 state->guest_gdt_desc.address = (long)&state->guest_gdt;
118 state->guest_tss.esp0 = (long)(&pages->regs + 1);
119 state->guest_tss.ss0 = LGUEST_DS;
120 /* No I/O for you! */
121 state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
122 setup_default_gdt_entries(state);
123 setup_default_idt_entries(state, default_idt_entries);
124
125 /* Setup LGUEST segments on all cpus */
126 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
127 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
128 }
129
130 /* Initialize entry point into switcher. */
131 lguest_entry.offset = (long)switch_to_guest + switcher_offset();
132 lguest_entry.segment = LGUEST_CS;
133
134 printk(KERN_INFO "lguest: mapped switcher at %p\n",
135 switcher_vma->addr);
136 return 0;
137
138free_vma:
139 vunmap(switcher_vma->addr);
140free_pages:
141 i = TOTAL_SWITCHER_PAGES;
142free_some_pages:
143 for (--i; i >= 0; i--)
144 __free_pages(switcher_page[i], 0);
145 kfree(switcher_page);
146out:
147 return err;
148}
149
150static void unmap_switcher(void)
151{
152 unsigned int i;
153
154 vunmap(switcher_vma->addr);
155 for (i = 0; i < TOTAL_SWITCHER_PAGES; i++)
156 __free_pages(switcher_page[i], 0);
157}
158
159/* IN/OUT insns: enough to get us past boot-time probing. */
160static int emulate_insn(struct lguest *lg)
161{
162 u8 insn;
163 unsigned int insnlen = 0, in = 0, shift = 0;
164 unsigned long physaddr = guest_pa(lg, lg->regs->eip);
165
166 /* This only works for addresses in linear mapping... */
167 if (lg->regs->eip < lg->page_offset)
168 return 0;
169 lgread(lg, &insn, physaddr, 1);
170
171 /* Operand size prefix means it's actually for ax. */
172 if (insn == 0x66) {
173 shift = 16;
174 insnlen = 1;
175 lgread(lg, &insn, physaddr + insnlen, 1);
176 }
177
178 switch (insn & 0xFE) {
179 case 0xE4: /* in <next byte>,%al */
180 insnlen += 2;
181 in = 1;
182 break;
183 case 0xEC: /* in (%dx),%al */
184 insnlen += 1;
185 in = 1;
186 break;
187 case 0xE6: /* out %al,<next byte> */
188 insnlen += 2;
189 break;
190 case 0xEE: /* out %al,(%dx) */
191 insnlen += 1;
192 break;
193 default:
194 return 0;
195 }
196
197 if (in) {
198 /* Lower bit tells is whether it's a 16 or 32 bit access */
199 if (insn & 0x1)
200 lg->regs->eax = 0xFFFFFFFF;
201 else
202 lg->regs->eax |= (0xFFFF << shift);
203 }
204 lg->regs->eip += insnlen;
205 return 1;
206}
207
208int lguest_address_ok(const struct lguest *lg,
209 unsigned long addr, unsigned long len)
210{
211 return (addr+len) / PAGE_SIZE < lg->pfn_limit && (addr+len >= addr);
212}
213
214/* Just like get_user, but don't let guest access lguest binary. */
215u32 lgread_u32(struct lguest *lg, unsigned long addr)
216{
217 u32 val = 0;
218
219 /* Don't let them access lguest binary */
220 if (!lguest_address_ok(lg, addr, sizeof(val))
221 || get_user(val, (u32 __user *)addr) != 0)
222 kill_guest(lg, "bad read address %#lx", addr);
223 return val;
224}
225
226void lgwrite_u32(struct lguest *lg, unsigned long addr, u32 val)
227{
228 if (!lguest_address_ok(lg, addr, sizeof(val))
229 || put_user(val, (u32 __user *)addr) != 0)
230 kill_guest(lg, "bad write address %#lx", addr);
231}
232
233void lgread(struct lguest *lg, void *b, unsigned long addr, unsigned bytes)
234{
235 if (!lguest_address_ok(lg, addr, bytes)
236 || copy_from_user(b, (void __user *)addr, bytes) != 0) {
237 /* copy_from_user should do this, but as we rely on it... */
238 memset(b, 0, bytes);
239 kill_guest(lg, "bad read address %#lx len %u", addr, bytes);
240 }
241}
242
243void lgwrite(struct lguest *lg, unsigned long addr, const void *b,
244 unsigned bytes)
245{
246 if (!lguest_address_ok(lg, addr, bytes)
247 || copy_to_user((void __user *)addr, b, bytes) != 0)
248 kill_guest(lg, "bad write address %#lx len %u", addr, bytes);
249}
250
251static void set_ts(void)
252{
253 u32 cr0;
254
255 cr0 = read_cr0();
256 if (!(cr0 & 8))
257 write_cr0(cr0|8);
258}
259
260static void copy_in_guest_info(struct lguest *lg, struct lguest_pages *pages)
261{
262 if (__get_cpu_var(last_guest) != lg || lg->last_pages != pages) {
263 __get_cpu_var(last_guest) = lg;
264 lg->last_pages = pages;
265 lg->changed = CHANGED_ALL;
266 }
267
268 /* These are pretty cheap, so we do them unconditionally. */
269 pages->state.host_cr3 = __pa(current->mm->pgd);
270 map_switcher_in_guest(lg, pages);
271 pages->state.guest_tss.esp1 = lg->esp1;
272 pages->state.guest_tss.ss1 = lg->ss1;
273
274 /* Copy direct trap entries. */
275 if (lg->changed & CHANGED_IDT)
276 copy_traps(lg, pages->state.guest_idt, default_idt_entries);
277
278 /* Copy all GDT entries but the TSS. */
279 if (lg->changed & CHANGED_GDT)
280 copy_gdt(lg, pages->state.guest_gdt);
281 /* If only the TLS entries have changed, copy them. */
282 else if (lg->changed & CHANGED_GDT_TLS)
283 copy_gdt_tls(lg, pages->state.guest_gdt);
284
285 lg->changed = 0;
286}
287
288static void run_guest_once(struct lguest *lg, struct lguest_pages *pages)
289{
290 unsigned int clobber;
291
292 copy_in_guest_info(lg, pages);
293
294 /* Put eflags on stack, lcall does rest: suitable for iret return. */
295 asm volatile("pushf; lcall *lguest_entry"
296 : "=a"(clobber), "=b"(clobber)
297 : "0"(pages), "1"(__pa(lg->pgdirs[lg->pgdidx].pgdir))
298 : "memory", "%edx", "%ecx", "%edi", "%esi");
299}
300
301int run_guest(struct lguest *lg, unsigned long __user *user)
302{
303 while (!lg->dead) {
304 unsigned int cr2 = 0; /* Damn gcc */
305
306 /* Hypercalls first: we might have been out to userspace */
307 do_hypercalls(lg);
308 if (lg->dma_is_pending) {
309 if (put_user(lg->pending_dma, user) ||
310 put_user(lg->pending_key, user+1))
311 return -EFAULT;
312 return sizeof(unsigned long)*2;
313 }
314
315 if (signal_pending(current))
316 return -ERESTARTSYS;
317
318 /* If Waker set break_out, return to Launcher. */
319 if (lg->break_out)
320 return -EAGAIN;
321
322 maybe_do_interrupt(lg);
323
324 try_to_freeze();
325
326 if (lg->dead)
327 break;
328
329 if (lg->halted) {
330 set_current_state(TASK_INTERRUPTIBLE);
331 schedule();
332 continue;
333 }
334
335 local_irq_disable();
336
337 /* Even if *we* don't want FPU trap, guest might... */
338 if (lg->ts)
339 set_ts();
340
341 /* Don't let Guest do SYSENTER: we can't handle it. */
342 if (boot_cpu_has(X86_FEATURE_SEP))
343 wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
344
345 run_guest_once(lg, lguest_pages(raw_smp_processor_id()));
346
347 /* Save cr2 now if we page-faulted. */
348 if (lg->regs->trapnum == 14)
349 cr2 = read_cr2();
350 else if (lg->regs->trapnum == 7)
351 math_state_restore();
352
353 if (boot_cpu_has(X86_FEATURE_SEP))
354 wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
355 local_irq_enable();
356
357 switch (lg->regs->trapnum) {
358 case 13: /* We've intercepted a GPF. */
359 if (lg->regs->errcode == 0) {
360 if (emulate_insn(lg))
361 continue;
362 }
363 break;
364 case 14: /* We've intercepted a page fault. */
365 if (demand_page(lg, cr2, lg->regs->errcode))
366 continue;
367
368 /* If lguest_data is NULL, this won't hurt. */
369 if (put_user(cr2, &lg->lguest_data->cr2))
370 kill_guest(lg, "Writing cr2");
371 break;
372 case 7: /* We've intercepted a Device Not Available fault. */
373 /* If they don't want to know, just absorb it. */
374 if (!lg->ts)
375 continue;
376 break;
377 case 32 ... 255: /* Real interrupt, fall thru */
378 cond_resched();
379 case LGUEST_TRAP_ENTRY: /* Handled at top of loop */
380 continue;
381 }
382
383 if (deliver_trap(lg, lg->regs->trapnum))
384 continue;
385
386 kill_guest(lg, "unhandled trap %li at %#lx (%#lx)",
387 lg->regs->trapnum, lg->regs->eip,
388 lg->regs->trapnum == 14 ? cr2 : lg->regs->errcode);
389 }
390 return -ENOENT;
391}
392
393int find_free_guest(void)
394{
395 unsigned int i;
396 for (i = 0; i < MAX_LGUEST_GUESTS; i++)
397 if (!lguests[i].tsk)
398 return i;
399 return -1;
400}
401
402static void adjust_pge(void *on)
403{
404 if (on)
405 write_cr4(read_cr4() | X86_CR4_PGE);
406 else
407 write_cr4(read_cr4() & ~X86_CR4_PGE);
408}
409
410static int __init init(void)
411{
412 int err;
413
414 if (paravirt_enabled()) {
415 printk("lguest is afraid of %s\n", paravirt_ops.name);
416 return -EPERM;
417 }
418
419 err = map_switcher();
420 if (err)
421 return err;
422
423 err = init_pagetables(switcher_page, SHARED_SWITCHER_PAGES);
424 if (err) {
425 unmap_switcher();
426 return err;
427 }
428 lguest_io_init();
429
430 err = lguest_device_init();
431 if (err) {
432 free_pagetables();
433 unmap_switcher();
434 return err;
435 }
436 lock_cpu_hotplug();
437 if (cpu_has_pge) { /* We have a broader idea of "global". */
438 cpu_had_pge = 1;
439 on_each_cpu(adjust_pge, (void *)0, 0, 1);
440 clear_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
441 }
442 unlock_cpu_hotplug();
443 return 0;
444}
445
446static void __exit fini(void)
447{
448 lguest_device_remove();
449 free_pagetables();
450 unmap_switcher();
451 lock_cpu_hotplug();
452 if (cpu_had_pge) {
453 set_bit(X86_FEATURE_PGE, boot_cpu_data.x86_capability);
454 on_each_cpu(adjust_pge, (void *)1, 0, 1);
455 }
456 unlock_cpu_hotplug();
457}
458
459module_init(init);
460module_exit(fini);
461MODULE_LICENSE("GPL");
462MODULE_AUTHOR("Rusty Russell <rusty@rustcorp.com.au>");
diff --git a/drivers/lguest/hypercalls.c b/drivers/lguest/hypercalls.c
new file mode 100644
index 0000000000..ea52ca451f
--- /dev/null
+++ b/drivers/lguest/hypercalls.c
@@ -0,0 +1,192 @@
1/* Actual hypercalls, which allow guests to actually do something.
2 Copyright (C) 2006 Rusty Russell IBM Corporation
3
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17*/
18#include <linux/uaccess.h>
19#include <linux/syscalls.h>
20#include <linux/mm.h>
21#include <asm/page.h>
22#include <asm/pgtable.h>
23#include <irq_vectors.h>
24#include "lg.h"
25
26static void do_hcall(struct lguest *lg, struct lguest_regs *regs)
27{
28 switch (regs->eax) {
29 case LHCALL_FLUSH_ASYNC:
30 break;
31 case LHCALL_LGUEST_INIT:
32 kill_guest(lg, "already have lguest_data");
33 break;
34 case LHCALL_CRASH: {
35 char msg[128];
36 lgread(lg, msg, regs->edx, sizeof(msg));
37 msg[sizeof(msg)-1] = '\0';
38 kill_guest(lg, "CRASH: %s", msg);
39 break;
40 }
41 case LHCALL_FLUSH_TLB:
42 if (regs->edx)
43 guest_pagetable_clear_all(lg);
44 else
45 guest_pagetable_flush_user(lg);
46 break;
47 case LHCALL_GET_WALLCLOCK: {
48 struct timespec ts;
49 ktime_get_real_ts(&ts);
50 regs->eax = ts.tv_sec;
51 break;
52 }
53 case LHCALL_BIND_DMA:
54 regs->eax = bind_dma(lg, regs->edx, regs->ebx,
55 regs->ecx >> 8, regs->ecx & 0xFF);
56 break;
57 case LHCALL_SEND_DMA:
58 send_dma(lg, regs->edx, regs->ebx);
59 break;
60 case LHCALL_LOAD_GDT:
61 load_guest_gdt(lg, regs->edx, regs->ebx);
62 break;
63 case LHCALL_LOAD_IDT_ENTRY:
64 load_guest_idt_entry(lg, regs->edx, regs->ebx, regs->ecx);
65 break;
66 case LHCALL_NEW_PGTABLE:
67 guest_new_pagetable(lg, regs->edx);
68 break;
69 case LHCALL_SET_STACK:
70 guest_set_stack(lg, regs->edx, regs->ebx, regs->ecx);
71 break;
72 case LHCALL_SET_PTE:
73 guest_set_pte(lg, regs->edx, regs->ebx, mkgpte(regs->ecx));
74 break;
75 case LHCALL_SET_PMD:
76 guest_set_pmd(lg, regs->edx, regs->ebx);
77 break;
78 case LHCALL_LOAD_TLS:
79 guest_load_tls(lg, regs->edx);
80 break;
81 case LHCALL_SET_CLOCKEVENT:
82 guest_set_clockevent(lg, regs->edx);
83 break;
84 case LHCALL_TS:
85 lg->ts = regs->edx;
86 break;
87 case LHCALL_HALT:
88 lg->halted = 1;
89 break;
90 default:
91 kill_guest(lg, "Bad hypercall %li\n", regs->eax);
92 }
93}
94
95/* We always do queued calls before actual hypercall. */
96static void do_async_hcalls(struct lguest *lg)
97{
98 unsigned int i;
99 u8 st[LHCALL_RING_SIZE];
100
101 if (copy_from_user(&st, &lg->lguest_data->hcall_status, sizeof(st)))
102 return;
103
104 for (i = 0; i < ARRAY_SIZE(st); i++) {
105 struct lguest_regs regs;
106 unsigned int n = lg->next_hcall;
107
108 if (st[n] == 0xFF)
109 break;
110
111 if (++lg->next_hcall == LHCALL_RING_SIZE)
112 lg->next_hcall = 0;
113
114 if (get_user(regs.eax, &lg->lguest_data->hcalls[n].eax)
115 || get_user(regs.edx, &lg->lguest_data->hcalls[n].edx)
116 || get_user(regs.ecx, &lg->lguest_data->hcalls[n].ecx)
117 || get_user(regs.ebx, &lg->lguest_data->hcalls[n].ebx)) {
118 kill_guest(lg, "Fetching async hypercalls");
119 break;
120 }
121
122 do_hcall(lg, &regs);
123 if (put_user(0xFF, &lg->lguest_data->hcall_status[n])) {
124 kill_guest(lg, "Writing result for async hypercall");
125 break;
126 }
127
128 if (lg->dma_is_pending)
129 break;
130 }
131}
132
133static void initialize(struct lguest *lg)
134{
135 u32 tsc_speed;
136
137 if (lg->regs->eax != LHCALL_LGUEST_INIT) {
138 kill_guest(lg, "hypercall %li before LGUEST_INIT",
139 lg->regs->eax);
140 return;
141 }
142
143 /* We only tell the guest to use the TSC if it's reliable. */
144 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
145 tsc_speed = tsc_khz;
146 else
147 tsc_speed = 0;
148
149 lg->lguest_data = (struct lguest_data __user *)lg->regs->edx;
150 /* We check here so we can simply copy_to_user/from_user */
151 if (!lguest_address_ok(lg, lg->regs->edx, sizeof(*lg->lguest_data))) {
152 kill_guest(lg, "bad guest page %p", lg->lguest_data);
153 return;
154 }
155 if (get_user(lg->noirq_start, &lg->lguest_data->noirq_start)
156 || get_user(lg->noirq_end, &lg->lguest_data->noirq_end)
157 /* We reserve the top pgd entry. */
158 || put_user(4U*1024*1024, &lg->lguest_data->reserve_mem)
159 || put_user(tsc_speed, &lg->lguest_data->tsc_khz)
160 || put_user(lg->guestid, &lg->lguest_data->guestid))
161 kill_guest(lg, "bad guest page %p", lg->lguest_data);
162
163 /* This is the one case where the above accesses might have
164 * been the first write to a Guest page. This may have caused
165 * a copy-on-write fault, but the Guest might be referring to
166 * the old (read-only) page. */
167 guest_pagetable_clear_all(lg);
168}
169
170/* Even if we go out to userspace and come back, we don't want to do
171 * the hypercall again. */
172static void clear_hcall(struct lguest *lg)
173{
174 lg->regs->trapnum = 255;
175}
176
177void do_hypercalls(struct lguest *lg)
178{
179 if (unlikely(!lg->lguest_data)) {
180 if (lg->regs->trapnum == LGUEST_TRAP_ENTRY) {
181 initialize(lg);
182 clear_hcall(lg);
183 }
184 return;
185 }
186
187 do_async_hcalls(lg);
188 if (!lg->dma_is_pending && lg->regs->trapnum == LGUEST_TRAP_ENTRY) {
189 do_hcall(lg, lg->regs);
190 clear_hcall(lg);
191 }
192}
diff --git a/drivers/lguest/interrupts_and_traps.c b/drivers/lguest/interrupts_and_traps.c
new file mode 100644
index 0000000000..d9de5bbc61
--- /dev/null
+++ b/drivers/lguest/interrupts_and_traps.c
@@ -0,0 +1,268 @@
1#include <linux/uaccess.h>
2#include "lg.h"
3
4static unsigned long idt_address(u32 lo, u32 hi)
5{
6 return (lo & 0x0000FFFF) | (hi & 0xFFFF0000);
7}
8
9static int idt_type(u32 lo, u32 hi)
10{
11 return (hi >> 8) & 0xF;
12}
13
14static int idt_present(u32 lo, u32 hi)
15{
16 return (hi & 0x8000);
17}
18
19static void push_guest_stack(struct lguest *lg, unsigned long *gstack, u32 val)
20{
21 *gstack -= 4;
22 lgwrite_u32(lg, *gstack, val);
23}
24
25static void set_guest_interrupt(struct lguest *lg, u32 lo, u32 hi, int has_err)
26{
27 unsigned long gstack;
28 u32 eflags, ss, irq_enable;
29
30 /* If they want a ring change, we use new stack and push old ss/esp */
31 if ((lg->regs->ss&0x3) != GUEST_PL) {
32 gstack = guest_pa(lg, lg->esp1);
33 ss = lg->ss1;
34 push_guest_stack(lg, &gstack, lg->regs->ss);
35 push_guest_stack(lg, &gstack, lg->regs->esp);
36 } else {
37 gstack = guest_pa(lg, lg->regs->esp);
38 ss = lg->regs->ss;
39 }
40
41 /* We use IF bit in eflags to indicate whether irqs were disabled
42 (it's always 0, since irqs are enabled when guest is running). */
43 eflags = lg->regs->eflags;
44 if (get_user(irq_enable, &lg->lguest_data->irq_enabled))
45 irq_enable = 0;
46 eflags |= (irq_enable & X86_EFLAGS_IF);
47
48 push_guest_stack(lg, &gstack, eflags);
49 push_guest_stack(lg, &gstack, lg->regs->cs);
50 push_guest_stack(lg, &gstack, lg->regs->eip);
51
52 if (has_err)
53 push_guest_stack(lg, &gstack, lg->regs->errcode);
54
55 /* Change the real stack so switcher returns to trap handler */
56 lg->regs->ss = ss;
57 lg->regs->esp = gstack + lg->page_offset;
58 lg->regs->cs = (__KERNEL_CS|GUEST_PL);
59 lg->regs->eip = idt_address(lo, hi);
60
61 /* Disable interrupts for an interrupt gate. */
62 if (idt_type(lo, hi) == 0xE)
63 if (put_user(0, &lg->lguest_data->irq_enabled))
64 kill_guest(lg, "Disabling interrupts");
65}
66
67void maybe_do_interrupt(struct lguest *lg)
68{
69 unsigned int irq;
70 DECLARE_BITMAP(blk, LGUEST_IRQS);
71 struct desc_struct *idt;
72
73 if (!lg->lguest_data)
74 return;
75
76 /* Mask out any interrupts they have blocked. */
77 if (copy_from_user(&blk, lg->lguest_data->blocked_interrupts,
78 sizeof(blk)))
79 return;
80
81 bitmap_andnot(blk, lg->irqs_pending, blk, LGUEST_IRQS);
82
83 irq = find_first_bit(blk, LGUEST_IRQS);
84 if (irq >= LGUEST_IRQS)
85 return;
86
87 if (lg->regs->eip >= lg->noirq_start && lg->regs->eip < lg->noirq_end)
88 return;
89
90 /* If they're halted, we re-enable interrupts. */
91 if (lg->halted) {
92 /* Re-enable interrupts. */
93 if (put_user(X86_EFLAGS_IF, &lg->lguest_data->irq_enabled))
94 kill_guest(lg, "Re-enabling interrupts");
95 lg->halted = 0;
96 } else {
97 /* Maybe they have interrupts disabled? */
98 u32 irq_enabled;
99 if (get_user(irq_enabled, &lg->lguest_data->irq_enabled))
100 irq_enabled = 0;
101 if (!irq_enabled)
102 return;
103 }
104
105 idt = &lg->idt[FIRST_EXTERNAL_VECTOR+irq];
106 if (idt_present(idt->a, idt->b)) {
107 clear_bit(irq, lg->irqs_pending);
108 set_guest_interrupt(lg, idt->a, idt->b, 0);
109 }
110}
111
112static int has_err(unsigned int trap)
113{
114 return (trap == 8 || (trap >= 10 && trap <= 14) || trap == 17);
115}
116
117int deliver_trap(struct lguest *lg, unsigned int num)
118{
119 u32 lo = lg->idt[num].a, hi = lg->idt[num].b;
120
121 if (!idt_present(lo, hi))
122 return 0;
123 set_guest_interrupt(lg, lo, hi, has_err(num));
124 return 1;
125}
126
127static int direct_trap(const struct lguest *lg,
128 const struct desc_struct *trap,
129 unsigned int num)
130{
131 /* Hardware interrupts don't go to guest (except syscall). */
132 if (num >= FIRST_EXTERNAL_VECTOR && num != SYSCALL_VECTOR)
133 return 0;
134
135 /* We intercept page fault (demand shadow paging & cr2 saving)
136 protection fault (in/out emulation) and device not
137 available (TS handling), and hypercall */
138 if (num == 14 || num == 13 || num == 7 || num == LGUEST_TRAP_ENTRY)
139 return 0;
140
141 /* Interrupt gates (0xE) or not present (0x0) can't go direct. */
142 return idt_type(trap->a, trap->b) == 0xF;
143}
144
145void pin_stack_pages(struct lguest *lg)
146{
147 unsigned int i;
148
149 for (i = 0; i < lg->stack_pages; i++)
150 pin_page(lg, lg->esp1 - i * PAGE_SIZE);
151}
152
153void guest_set_stack(struct lguest *lg, u32 seg, u32 esp, unsigned int pages)
154{
155 /* You cannot have a stack segment with priv level 0. */
156 if ((seg & 0x3) != GUEST_PL)
157 kill_guest(lg, "bad stack segment %i", seg);
158 if (pages > 2)
159 kill_guest(lg, "bad stack pages %u", pages);
160 lg->ss1 = seg;
161 lg->esp1 = esp;
162 lg->stack_pages = pages;
163 pin_stack_pages(lg);
164}
165
166/* Set up trap in IDT. */
167static void set_trap(struct lguest *lg, struct desc_struct *trap,
168 unsigned int num, u32 lo, u32 hi)
169{
170 u8 type = idt_type(lo, hi);
171
172 if (!idt_present(lo, hi)) {
173 trap->a = trap->b = 0;
174 return;
175 }
176
177 if (type != 0xE && type != 0xF)
178 kill_guest(lg, "bad IDT type %i", type);
179
180 trap->a = ((__KERNEL_CS|GUEST_PL)<<16) | (lo&0x0000FFFF);
181 trap->b = (hi&0xFFFFEF00);
182}
183
184void load_guest_idt_entry(struct lguest *lg, unsigned int num, u32 lo, u32 hi)
185{
186 /* Guest never handles: NMI, doublefault, hypercall, spurious irq. */
187 if (num == 2 || num == 8 || num == 15 || num == LGUEST_TRAP_ENTRY)
188 return;
189
190 lg->changed |= CHANGED_IDT;
191 if (num < ARRAY_SIZE(lg->idt))
192 set_trap(lg, &lg->idt[num], num, lo, hi);
193 else if (num == SYSCALL_VECTOR)
194 set_trap(lg, &lg->syscall_idt, num, lo, hi);
195}
196
197static void default_idt_entry(struct desc_struct *idt,
198 int trap,
199 const unsigned long handler)
200{
201 u32 flags = 0x8e00;
202
203 /* They can't "int" into any of them except hypercall. */
204 if (trap == LGUEST_TRAP_ENTRY)
205 flags |= (GUEST_PL << 13);
206
207 idt->a = (LGUEST_CS<<16) | (handler&0x0000FFFF);
208 idt->b = (handler&0xFFFF0000) | flags;
209}
210
211void setup_default_idt_entries(struct lguest_ro_state *state,
212 const unsigned long *def)
213{
214 unsigned int i;
215
216 for (i = 0; i < ARRAY_SIZE(state->guest_idt); i++)
217 default_idt_entry(&state->guest_idt[i], i, def[i]);
218}
219
220void copy_traps(const struct lguest *lg, struct desc_struct *idt,
221 const unsigned long *def)
222{
223 unsigned int i;
224
225 /* All hardware interrupts are same whatever the guest: only the
226 * traps might be different. */
227 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++) {
228 if (direct_trap(lg, &lg->idt[i], i))
229 idt[i] = lg->idt[i];
230 else
231 default_idt_entry(&idt[i], i, def[i]);
232 }
233 i = SYSCALL_VECTOR;
234 if (direct_trap(lg, &lg->syscall_idt, i))
235 idt[i] = lg->syscall_idt;
236 else
237 default_idt_entry(&idt[i], i, def[i]);
238}
239
240void guest_set_clockevent(struct lguest *lg, unsigned long delta)
241{
242 ktime_t expires;
243
244 if (unlikely(delta == 0)) {
245 /* Clock event device is shutting down. */
246 hrtimer_cancel(&lg->hrt);
247 return;
248 }
249
250 expires = ktime_add_ns(ktime_get_real(), delta);
251 hrtimer_start(&lg->hrt, expires, HRTIMER_MODE_ABS);
252}
253
254static enum hrtimer_restart clockdev_fn(struct hrtimer *timer)
255{
256 struct lguest *lg = container_of(timer, struct lguest, hrt);
257
258 set_bit(0, lg->irqs_pending);
259 if (lg->halted)
260 wake_up_process(lg->tsk);
261 return HRTIMER_NORESTART;
262}
263
264void init_clockdev(struct lguest *lg)
265{
266 hrtimer_init(&lg->hrt, CLOCK_REALTIME, HRTIMER_MODE_ABS);
267 lg->hrt.function = clockdev_fn;
268}
diff --git a/drivers/lguest/io.c b/drivers/lguest/io.c
new file mode 100644
index 0000000000..06bdba2337
--- /dev/null
+++ b/drivers/lguest/io.c
@@ -0,0 +1,399 @@
1/* Simple I/O model for guests, based on shared memory.
2 * Copyright (C) 2006 Rusty Russell IBM Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
17 */
18#include <linux/types.h>
19#include <linux/futex.h>
20#include <linux/jhash.h>
21#include <linux/mm.h>
22#include <linux/highmem.h>
23#include <linux/uaccess.h>
24#include "lg.h"
25
26static struct list_head dma_hash[61];
27
28void lguest_io_init(void)
29{
30 unsigned int i;
31
32 for (i = 0; i < ARRAY_SIZE(dma_hash); i++)
33 INIT_LIST_HEAD(&dma_hash[i]);
34}
35
36/* FIXME: allow multi-page lengths. */
37static int check_dma_list(struct lguest *lg, const struct lguest_dma *dma)
38{
39 unsigned int i;
40
41 for (i = 0; i < LGUEST_MAX_DMA_SECTIONS; i++) {
42 if (!dma->len[i])
43 return 1;
44 if (!lguest_address_ok(lg, dma->addr[i], dma->len[i]))
45 goto kill;
46 if (dma->len[i] > PAGE_SIZE)
47 goto kill;
48 /* We could do over a page, but is it worth it? */
49 if ((dma->addr[i] % PAGE_SIZE) + dma->len[i] > PAGE_SIZE)
50 goto kill;
51 }
52 return 1;
53
54kill:
55 kill_guest(lg, "bad DMA entry: %u@%#lx", dma->len[i], dma->addr[i]);
56 return 0;
57}
58
59static unsigned int hash(const union futex_key *key)
60{
61 return jhash2((u32*)&key->both.word,
62 (sizeof(key->both.word)+sizeof(key->both.ptr))/4,
63 key->both.offset)
64 % ARRAY_SIZE(dma_hash);
65}
66
67static inline int key_eq(const union futex_key *a, const union futex_key *b)
68{
69 return (a->both.word == b->both.word
70 && a->both.ptr == b->both.ptr
71 && a->both.offset == b->both.offset);
72}
73
74/* Must hold read lock on dmainfo owner's current->mm->mmap_sem */
75static void unlink_dma(struct lguest_dma_info *dmainfo)
76{
77 BUG_ON(!mutex_is_locked(&lguest_lock));
78 dmainfo->interrupt = 0;
79 list_del(&dmainfo->list);
80 drop_futex_key_refs(&dmainfo->key);
81}
82
83static int unbind_dma(struct lguest *lg,
84 const union futex_key *key,
85 unsigned long dmas)
86{
87 int i, ret = 0;
88
89 for (i = 0; i < LGUEST_MAX_DMA; i++) {
90 if (key_eq(key, &lg->dma[i].key) && dmas == lg->dma[i].dmas) {
91 unlink_dma(&lg->dma[i]);
92 ret = 1;
93 break;
94 }
95 }
96 return ret;
97}
98
99int bind_dma(struct lguest *lg,
100 unsigned long ukey, unsigned long dmas, u16 numdmas, u8 interrupt)
101{
102 unsigned int i;
103 int ret = 0;
104 union futex_key key;
105 struct rw_semaphore *fshared = &current->mm->mmap_sem;
106
107 if (interrupt >= LGUEST_IRQS)
108 return 0;
109
110 mutex_lock(&lguest_lock);
111 down_read(fshared);
112 if (get_futex_key((u32 __user *)ukey, fshared, &key) != 0) {
113 kill_guest(lg, "bad dma key %#lx", ukey);
114 goto unlock;
115 }
116 get_futex_key_refs(&key);
117
118 if (interrupt == 0)
119 ret = unbind_dma(lg, &key, dmas);
120 else {
121 for (i = 0; i < LGUEST_MAX_DMA; i++) {
122 if (lg->dma[i].interrupt)
123 continue;
124
125 lg->dma[i].dmas = dmas;
126 lg->dma[i].num_dmas = numdmas;
127 lg->dma[i].next_dma = 0;
128 lg->dma[i].key = key;
129 lg->dma[i].guestid = lg->guestid;
130 lg->dma[i].interrupt = interrupt;
131 list_add(&lg->dma[i].list, &dma_hash[hash(&key)]);
132 ret = 1;
133 goto unlock;
134 }
135 }
136 drop_futex_key_refs(&key);
137unlock:
138 up_read(fshared);
139 mutex_unlock(&lguest_lock);
140 return ret;
141}
142
143/* lgread from another guest */
144static int lgread_other(struct lguest *lg,
145 void *buf, u32 addr, unsigned bytes)
146{
147 if (!lguest_address_ok(lg, addr, bytes)
148 || access_process_vm(lg->tsk, addr, buf, bytes, 0) != bytes) {
149 memset(buf, 0, bytes);
150 kill_guest(lg, "bad address in registered DMA struct");
151 return 0;
152 }
153 return 1;
154}
155
156/* lgwrite to another guest */
157static int lgwrite_other(struct lguest *lg, u32 addr,
158 const void *buf, unsigned bytes)
159{
160 if (!lguest_address_ok(lg, addr, bytes)
161 || (access_process_vm(lg->tsk, addr, (void *)buf, bytes, 1)
162 != bytes)) {
163 kill_guest(lg, "bad address writing to registered DMA");
164 return 0;
165 }
166 return 1;
167}
168
169static u32 copy_data(struct lguest *srclg,
170 const struct lguest_dma *src,
171 const struct lguest_dma *dst,
172 struct page *pages[])
173{
174 unsigned int totlen, si, di, srcoff, dstoff;
175 void *maddr = NULL;
176
177 totlen = 0;
178 si = di = 0;
179 srcoff = dstoff = 0;
180 while (si < LGUEST_MAX_DMA_SECTIONS && src->len[si]
181 && di < LGUEST_MAX_DMA_SECTIONS && dst->len[di]) {
182 u32 len = min(src->len[si] - srcoff, dst->len[di] - dstoff);
183
184 if (!maddr)
185 maddr = kmap(pages[di]);
186
187 /* FIXME: This is not completely portable, since
188 archs do different things for copy_to_user_page. */
189 if (copy_from_user(maddr + (dst->addr[di] + dstoff)%PAGE_SIZE,
190 (void *__user)src->addr[si], len) != 0) {
191 kill_guest(srclg, "bad address in sending DMA");
192 totlen = 0;
193 break;
194 }
195
196 totlen += len;
197 srcoff += len;
198 dstoff += len;
199 if (srcoff == src->len[si]) {
200 si++;
201 srcoff = 0;
202 }
203 if (dstoff == dst->len[di]) {
204 kunmap(pages[di]);
205 maddr = NULL;
206 di++;
207 dstoff = 0;
208 }
209 }
210
211 if (maddr)
212 kunmap(pages[di]);
213
214 return totlen;
215}
216
217/* Src is us, ie. current. */
218static u32 do_dma(struct lguest *srclg, const struct lguest_dma *src,
219 struct lguest *dstlg, const struct lguest_dma *dst)
220{
221 int i;
222 u32 ret;
223 struct page *pages[LGUEST_MAX_DMA_SECTIONS];
224
225 if (!check_dma_list(dstlg, dst) || !check_dma_list(srclg, src))
226 return 0;
227
228 /* First get the destination pages */
229 for (i = 0; i < LGUEST_MAX_DMA_SECTIONS; i++) {
230 if (dst->len[i] == 0)
231 break;
232 if (get_user_pages(dstlg->tsk, dstlg->mm,
233 dst->addr[i], 1, 1, 1, pages+i, NULL)
234 != 1) {
235 kill_guest(dstlg, "Error mapping DMA pages");
236 ret = 0;
237 goto drop_pages;
238 }
239 }
240
241 /* Now copy until we run out of src or dst. */
242 ret = copy_data(srclg, src, dst, pages);
243
244drop_pages:
245 while (--i >= 0)
246 put_page(pages[i]);
247 return ret;
248}
249
250static int dma_transfer(struct lguest *srclg,
251 unsigned long udma,
252 struct lguest_dma_info *dst)
253{
254 struct lguest_dma dst_dma, src_dma;
255 struct lguest *dstlg;
256 u32 i, dma = 0;
257
258 dstlg = &lguests[dst->guestid];
259 /* Get our dma list. */
260 lgread(srclg, &src_dma, udma, sizeof(src_dma));
261
262 /* We can't deadlock against them dmaing to us, because this
263 * is all under the lguest_lock. */
264 down_read(&dstlg->mm->mmap_sem);
265
266 for (i = 0; i < dst->num_dmas; i++) {
267 dma = (dst->next_dma + i) % dst->num_dmas;
268 if (!lgread_other(dstlg, &dst_dma,
269 dst->dmas + dma * sizeof(struct lguest_dma),
270 sizeof(dst_dma))) {
271 goto fail;
272 }
273 if (!dst_dma.used_len)
274 break;
275 }
276 if (i != dst->num_dmas) {
277 unsigned long used_lenp;
278 unsigned int ret;
279
280 ret = do_dma(srclg, &src_dma, dstlg, &dst_dma);
281 /* Put used length in src. */
282 lgwrite_u32(srclg,
283 udma+offsetof(struct lguest_dma, used_len), ret);
284 if (ret == 0 && src_dma.len[0] != 0)
285 goto fail;
286
287 /* Make sure destination sees contents before length. */
288 wmb();
289 used_lenp = dst->dmas
290 + dma * sizeof(struct lguest_dma)
291 + offsetof(struct lguest_dma, used_len);
292 lgwrite_other(dstlg, used_lenp, &ret, sizeof(ret));
293 dst->next_dma++;
294 }
295 up_read(&dstlg->mm->mmap_sem);
296
297 /* Do this last so dst doesn't simply sleep on lock. */
298 set_bit(dst->interrupt, dstlg->irqs_pending);
299 wake_up_process(dstlg->tsk);
300 return i == dst->num_dmas;
301
302fail:
303 up_read(&dstlg->mm->mmap_sem);
304 return 0;
305}
306
307void send_dma(struct lguest *lg, unsigned long ukey, unsigned long udma)
308{
309 union futex_key key;
310 int empty = 0;
311 struct rw_semaphore *fshared = &current->mm->mmap_sem;
312
313again:
314 mutex_lock(&lguest_lock);
315 down_read(fshared);
316 if (get_futex_key((u32 __user *)ukey, fshared, &key) != 0) {
317 kill_guest(lg, "bad sending DMA key");
318 goto unlock;
319 }
320 /* Shared mapping? Look for other guests... */
321 if (key.shared.offset & 1) {
322 struct lguest_dma_info *i;
323 list_for_each_entry(i, &dma_hash[hash(&key)], list) {
324 if (i->guestid == lg->guestid)
325 continue;
326 if (!key_eq(&key, &i->key))
327 continue;
328
329 empty += dma_transfer(lg, udma, i);
330 break;
331 }
332 if (empty == 1) {
333 /* Give any recipients one chance to restock. */
334 up_read(&current->mm->mmap_sem);
335 mutex_unlock(&lguest_lock);
336 empty++;
337 goto again;
338 }
339 } else {
340 /* Private mapping: tell our userspace. */
341 lg->dma_is_pending = 1;
342 lg->pending_dma = udma;
343 lg->pending_key = ukey;
344 }
345unlock:
346 up_read(fshared);
347 mutex_unlock(&lguest_lock);
348}
349
350void release_all_dma(struct lguest *lg)
351{
352 unsigned int i;
353
354 BUG_ON(!mutex_is_locked(&lguest_lock));
355
356 down_read(&lg->mm->mmap_sem);
357 for (i = 0; i < LGUEST_MAX_DMA; i++) {
358 if (lg->dma[i].interrupt)
359 unlink_dma(&lg->dma[i]);
360 }
361 up_read(&lg->mm->mmap_sem);
362}
363
364/* Userspace wants a dma buffer from this guest. */
365unsigned long get_dma_buffer(struct lguest *lg,
366 unsigned long ukey, unsigned long *interrupt)
367{
368 unsigned long ret = 0;
369 union futex_key key;
370 struct lguest_dma_info *i;
371 struct rw_semaphore *fshared = &current->mm->mmap_sem;
372
373 mutex_lock(&lguest_lock);
374 down_read(fshared);
375 if (get_futex_key((u32 __user *)ukey, fshared, &key) != 0) {
376 kill_guest(lg, "bad registered DMA buffer");
377 goto unlock;
378 }
379 list_for_each_entry(i, &dma_hash[hash(&key)], list) {
380 if (key_eq(&key, &i->key) && i->guestid == lg->guestid) {
381 unsigned int j;
382 for (j = 0; j < i->num_dmas; j++) {
383 struct lguest_dma dma;
384
385 ret = i->dmas + j * sizeof(struct lguest_dma);
386 lgread(lg, &dma, ret, sizeof(dma));
387 if (dma.used_len == 0)
388 break;
389 }
390 *interrupt = i->interrupt;
391 break;
392 }
393 }
394unlock:
395 up_read(fshared);
396 mutex_unlock(&lguest_lock);
397 return ret;
398}
399
diff --git a/drivers/lguest/lg.h b/drivers/lguest/lg.h
new file mode 100644
index 0000000000..3e2ddfbc81
--- /dev/null
+++ b/drivers/lguest/lg.h
@@ -0,0 +1,261 @@
1#ifndef _LGUEST_H
2#define _LGUEST_H
3
4#include <asm/desc.h>
5
6#define GDT_ENTRY_LGUEST_CS 10
7#define GDT_ENTRY_LGUEST_DS 11
8#define LGUEST_CS (GDT_ENTRY_LGUEST_CS * 8)
9#define LGUEST_DS (GDT_ENTRY_LGUEST_DS * 8)
10
11#ifndef __ASSEMBLY__
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/stringify.h>
15#include <linux/binfmts.h>
16#include <linux/futex.h>
17#include <linux/lguest.h>
18#include <linux/lguest_launcher.h>
19#include <linux/wait.h>
20#include <linux/err.h>
21#include <asm/semaphore.h>
22#include "irq_vectors.h"
23
24#define GUEST_PL 1
25
26struct lguest_regs
27{
28 /* Manually saved part. */
29 unsigned long ebx, ecx, edx;
30 unsigned long esi, edi, ebp;
31 unsigned long gs;
32 unsigned long eax;
33 unsigned long fs, ds, es;
34 unsigned long trapnum, errcode;
35 /* Trap pushed part */
36 unsigned long eip;
37 unsigned long cs;
38 unsigned long eflags;
39 unsigned long esp;
40 unsigned long ss;
41};
42
43void free_pagetables(void);
44int init_pagetables(struct page **switcher_page, unsigned int pages);
45
46/* Full 4G segment descriptors, suitable for CS and DS. */
47#define FULL_EXEC_SEGMENT ((struct desc_struct){0x0000ffff, 0x00cf9b00})
48#define FULL_SEGMENT ((struct desc_struct){0x0000ffff, 0x00cf9300})
49
50struct lguest_dma_info
51{
52 struct list_head list;
53 union futex_key key;
54 unsigned long dmas;
55 u16 next_dma;
56 u16 num_dmas;
57 u16 guestid;
58 u8 interrupt; /* 0 when not registered */
59};
60
61/* We have separate types for the guest's ptes & pgds and the shadow ptes &
62 * pgds. Since this host might use three-level pagetables and the guest and
63 * shadow pagetables don't, we can't use the normal pte_t/pgd_t. */
64typedef union {
65 struct { unsigned flags:12, pfn:20; };
66 struct { unsigned long val; } raw;
67} spgd_t;
68typedef union {
69 struct { unsigned flags:12, pfn:20; };
70 struct { unsigned long val; } raw;
71} spte_t;
72typedef union {
73 struct { unsigned flags:12, pfn:20; };
74 struct { unsigned long val; } raw;
75} gpgd_t;
76typedef union {
77 struct { unsigned flags:12, pfn:20; };
78 struct { unsigned long val; } raw;
79} gpte_t;
80#define mkgpte(_val) ((gpte_t){.raw.val = _val})
81#define mkgpgd(_val) ((gpgd_t){.raw.val = _val})
82
83struct pgdir
84{
85 unsigned long cr3;
86 spgd_t *pgdir;
87};
88
89/* This is a guest-specific page (mapped ro) into the guest. */
90struct lguest_ro_state
91{
92 /* Host information we need to restore when we switch back. */
93 u32 host_cr3;
94 struct Xgt_desc_struct host_idt_desc;
95 struct Xgt_desc_struct host_gdt_desc;
96 u32 host_sp;
97
98 /* Fields which are used when guest is running. */
99 struct Xgt_desc_struct guest_idt_desc;
100 struct Xgt_desc_struct guest_gdt_desc;
101 struct i386_hw_tss guest_tss;
102 struct desc_struct guest_idt[IDT_ENTRIES];
103 struct desc_struct guest_gdt[GDT_ENTRIES];
104};
105
106/* We have two pages shared with guests, per cpu. */
107struct lguest_pages
108{
109 /* This is the stack page mapped rw in guest */
110 char spare[PAGE_SIZE - sizeof(struct lguest_regs)];
111 struct lguest_regs regs;
112
113 /* This is the host state & guest descriptor page, ro in guest */
114 struct lguest_ro_state state;
115} __attribute__((aligned(PAGE_SIZE)));
116
117#define CHANGED_IDT 1
118#define CHANGED_GDT 2
119#define CHANGED_GDT_TLS 4 /* Actually a subset of CHANGED_GDT */
120#define CHANGED_ALL 3
121
122/* The private info the thread maintains about the guest. */
123struct lguest
124{
125 /* At end of a page shared mapped over lguest_pages in guest. */
126 unsigned long regs_page;
127 struct lguest_regs *regs;
128 struct lguest_data __user *lguest_data;
129 struct task_struct *tsk;
130 struct mm_struct *mm; /* == tsk->mm, but that becomes NULL on exit */
131 u16 guestid;
132 u32 pfn_limit;
133 u32 page_offset;
134 u32 cr2;
135 int halted;
136 int ts;
137 u32 next_hcall;
138 u32 esp1;
139 u8 ss1;
140
141 /* Do we need to stop what we're doing and return to userspace? */
142 int break_out;
143 wait_queue_head_t break_wq;
144
145 /* Bitmap of what has changed: see CHANGED_* above. */
146 int changed;
147 struct lguest_pages *last_pages;
148
149 /* We keep a small number of these. */
150 u32 pgdidx;
151 struct pgdir pgdirs[4];
152
153 /* Cached wakeup: we hold a reference to this task. */
154 struct task_struct *wake;
155
156 unsigned long noirq_start, noirq_end;
157 int dma_is_pending;
158 unsigned long pending_dma; /* struct lguest_dma */
159 unsigned long pending_key; /* address they're sending to */
160
161 unsigned int stack_pages;
162 u32 tsc_khz;
163
164 struct lguest_dma_info dma[LGUEST_MAX_DMA];
165
166 /* Dead? */
167 const char *dead;
168
169 /* The GDT entries copied into lguest_ro_state when running. */
170 struct desc_struct gdt[GDT_ENTRIES];
171
172 /* The IDT entries: some copied into lguest_ro_state when running. */
173 struct desc_struct idt[FIRST_EXTERNAL_VECTOR+LGUEST_IRQS];
174 struct desc_struct syscall_idt;
175
176 /* Virtual clock device */
177 struct hrtimer hrt;
178
179 /* Pending virtual interrupts */
180 DECLARE_BITMAP(irqs_pending, LGUEST_IRQS);
181};
182
183extern struct lguest lguests[];
184extern struct mutex lguest_lock;
185
186/* core.c: */
187u32 lgread_u32(struct lguest *lg, unsigned long addr);
188void lgwrite_u32(struct lguest *lg, unsigned long addr, u32 val);
189void lgread(struct lguest *lg, void *buf, unsigned long addr, unsigned len);
190void lgwrite(struct lguest *lg, unsigned long, const void *buf, unsigned len);
191int find_free_guest(void);
192int lguest_address_ok(const struct lguest *lg,
193 unsigned long addr, unsigned long len);
194int run_guest(struct lguest *lg, unsigned long __user *user);
195
196
197/* interrupts_and_traps.c: */
198void maybe_do_interrupt(struct lguest *lg);
199int deliver_trap(struct lguest *lg, unsigned int num);
200void load_guest_idt_entry(struct lguest *lg, unsigned int i, u32 low, u32 hi);
201void guest_set_stack(struct lguest *lg, u32 seg, u32 esp, unsigned int pages);
202void pin_stack_pages(struct lguest *lg);
203void setup_default_idt_entries(struct lguest_ro_state *state,
204 const unsigned long *def);
205void copy_traps(const struct lguest *lg, struct desc_struct *idt,
206 const unsigned long *def);
207void guest_set_clockevent(struct lguest *lg, unsigned long delta);
208void init_clockdev(struct lguest *lg);
209
210/* segments.c: */
211void setup_default_gdt_entries(struct lguest_ro_state *state);
212void setup_guest_gdt(struct lguest *lg);
213void load_guest_gdt(struct lguest *lg, unsigned long table, u32 num);
214void guest_load_tls(struct lguest *lg, unsigned long tls_array);
215void copy_gdt(const struct lguest *lg, struct desc_struct *gdt);
216void copy_gdt_tls(const struct lguest *lg, struct desc_struct *gdt);
217
218/* page_tables.c: */
219int init_guest_pagetable(struct lguest *lg, unsigned long pgtable);
220void free_guest_pagetable(struct lguest *lg);
221void guest_new_pagetable(struct lguest *lg, unsigned long pgtable);
222void guest_set_pmd(struct lguest *lg, unsigned long cr3, u32 i);
223void guest_pagetable_clear_all(struct lguest *lg);
224void guest_pagetable_flush_user(struct lguest *lg);
225void guest_set_pte(struct lguest *lg, unsigned long cr3,
226 unsigned long vaddr, gpte_t val);
227void map_switcher_in_guest(struct lguest *lg, struct lguest_pages *pages);
228int demand_page(struct lguest *info, unsigned long cr2, int errcode);
229void pin_page(struct lguest *lg, unsigned long vaddr);
230
231/* lguest_user.c: */
232int lguest_device_init(void);
233void lguest_device_remove(void);
234
235/* io.c: */
236void lguest_io_init(void);
237int bind_dma(struct lguest *lg,
238 unsigned long key, unsigned long udma, u16 numdmas, u8 interrupt);
239void send_dma(struct lguest *info, unsigned long key, unsigned long udma);
240void release_all_dma(struct lguest *lg);
241unsigned long get_dma_buffer(struct lguest *lg, unsigned long key,
242 unsigned long *interrupt);
243
244/* hypercalls.c: */
245void do_hypercalls(struct lguest *lg);
246
247#define kill_guest(lg, fmt...) \
248do { \
249 if (!(lg)->dead) { \
250 (lg)->dead = kasprintf(GFP_ATOMIC, fmt); \
251 if (!(lg)->dead) \
252 (lg)->dead = ERR_PTR(-ENOMEM); \
253 } \
254} while(0)
255
256static inline unsigned long guest_pa(struct lguest *lg, unsigned long vaddr)
257{
258 return vaddr - lg->page_offset;
259}
260#endif /* __ASSEMBLY__ */
261#endif /* _LGUEST_H */
diff --git a/drivers/lguest/lguest.c b/drivers/lguest/lguest.c
new file mode 100644
index 0000000000..b9a58b78c9
--- /dev/null
+++ b/drivers/lguest/lguest.c
@@ -0,0 +1,621 @@
1/*
2 * Lguest specific paravirt-ops implementation
3 *
4 * Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14 * NON INFRINGEMENT. See the GNU General Public License for more
15 * details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21#include <linux/kernel.h>
22#include <linux/start_kernel.h>
23#include <linux/string.h>
24#include <linux/console.h>
25#include <linux/screen_info.h>
26#include <linux/irq.h>
27#include <linux/interrupt.h>
28#include <linux/clocksource.h>
29#include <linux/clockchips.h>
30#include <linux/lguest.h>
31#include <linux/lguest_launcher.h>
32#include <linux/lguest_bus.h>
33#include <asm/paravirt.h>
34#include <asm/param.h>
35#include <asm/page.h>
36#include <asm/pgtable.h>
37#include <asm/desc.h>
38#include <asm/setup.h>
39#include <asm/e820.h>
40#include <asm/mce.h>
41#include <asm/io.h>
42//#include <asm/sched-clock.h>
43
44/* Declarations for definitions in lguest_guest.S */
45extern char lguest_noirq_start[], lguest_noirq_end[];
46extern const char lgstart_cli[], lgend_cli[];
47extern const char lgstart_sti[], lgend_sti[];
48extern const char lgstart_popf[], lgend_popf[];
49extern const char lgstart_pushf[], lgend_pushf[];
50extern const char lgstart_iret[], lgend_iret[];
51extern void lguest_iret(void);
52
53struct lguest_data lguest_data = {
54 .hcall_status = { [0 ... LHCALL_RING_SIZE-1] = 0xFF },
55 .noirq_start = (u32)lguest_noirq_start,
56 .noirq_end = (u32)lguest_noirq_end,
57 .blocked_interrupts = { 1 }, /* Block timer interrupts */
58};
59struct lguest_device_desc *lguest_devices;
60
61static enum paravirt_lazy_mode lazy_mode;
62static void lguest_lazy_mode(enum paravirt_lazy_mode mode)
63{
64 if (mode == PARAVIRT_LAZY_FLUSH) {
65 if (unlikely(lazy_mode != PARAVIRT_LAZY_NONE))
66 hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0);
67 } else {
68 lazy_mode = mode;
69 if (mode == PARAVIRT_LAZY_NONE)
70 hcall(LHCALL_FLUSH_ASYNC, 0, 0, 0);
71 }
72}
73
74static void lazy_hcall(unsigned long call,
75 unsigned long arg1,
76 unsigned long arg2,
77 unsigned long arg3)
78{
79 if (lazy_mode == PARAVIRT_LAZY_NONE)
80 hcall(call, arg1, arg2, arg3);
81 else
82 async_hcall(call, arg1, arg2, arg3);
83}
84
85void async_hcall(unsigned long call,
86 unsigned long arg1, unsigned long arg2, unsigned long arg3)
87{
88 /* Note: This code assumes we're uniprocessor. */
89 static unsigned int next_call;
90 unsigned long flags;
91
92 local_irq_save(flags);
93 if (lguest_data.hcall_status[next_call] != 0xFF) {
94 /* Table full, so do normal hcall which will flush table. */
95 hcall(call, arg1, arg2, arg3);
96 } else {
97 lguest_data.hcalls[next_call].eax = call;
98 lguest_data.hcalls[next_call].edx = arg1;
99 lguest_data.hcalls[next_call].ebx = arg2;
100 lguest_data.hcalls[next_call].ecx = arg3;
101 /* Make sure host sees arguments before "valid" flag. */
102 wmb();
103 lguest_data.hcall_status[next_call] = 0;
104 if (++next_call == LHCALL_RING_SIZE)
105 next_call = 0;
106 }
107 local_irq_restore(flags);
108}
109
110void lguest_send_dma(unsigned long key, struct lguest_dma *dma)
111{
112 dma->used_len = 0;
113 hcall(LHCALL_SEND_DMA, key, __pa(dma), 0);
114}
115
116int lguest_bind_dma(unsigned long key, struct lguest_dma *dmas,
117 unsigned int num, u8 irq)
118{
119 if (!hcall(LHCALL_BIND_DMA, key, __pa(dmas), (num << 8) | irq))
120 return -ENOMEM;
121 return 0;
122}
123
124void lguest_unbind_dma(unsigned long key, struct lguest_dma *dmas)
125{
126 hcall(LHCALL_BIND_DMA, key, __pa(dmas), 0);
127}
128
129/* For guests, device memory can be used as normal memory, so we cast away the
130 * __iomem to quieten sparse. */
131void *lguest_map(unsigned long phys_addr, unsigned long pages)
132{
133 return (__force void *)ioremap(phys_addr, PAGE_SIZE*pages);
134}
135
136void lguest_unmap(void *addr)
137{
138 iounmap((__force void __iomem *)addr);
139}
140
141static unsigned long save_fl(void)
142{
143 return lguest_data.irq_enabled;
144}
145
146static void restore_fl(unsigned long flags)
147{
148 /* FIXME: Check if interrupt pending... */
149 lguest_data.irq_enabled = flags;
150}
151
152static void irq_disable(void)
153{
154 lguest_data.irq_enabled = 0;
155}
156
157static void irq_enable(void)
158{
159 /* FIXME: Check if interrupt pending... */
160 lguest_data.irq_enabled = X86_EFLAGS_IF;
161}
162
163static void lguest_write_idt_entry(struct desc_struct *dt,
164 int entrynum, u32 low, u32 high)
165{
166 write_dt_entry(dt, entrynum, low, high);
167 hcall(LHCALL_LOAD_IDT_ENTRY, entrynum, low, high);
168}
169
170static void lguest_load_idt(const struct Xgt_desc_struct *desc)
171{
172 unsigned int i;
173 struct desc_struct *idt = (void *)desc->address;
174
175 for (i = 0; i < (desc->size+1)/8; i++)
176 hcall(LHCALL_LOAD_IDT_ENTRY, i, idt[i].a, idt[i].b);
177}
178
179static void lguest_load_gdt(const struct Xgt_desc_struct *desc)
180{
181 BUG_ON((desc->size+1)/8 != GDT_ENTRIES);
182 hcall(LHCALL_LOAD_GDT, __pa(desc->address), GDT_ENTRIES, 0);
183}
184
185static void lguest_write_gdt_entry(struct desc_struct *dt,
186 int entrynum, u32 low, u32 high)
187{
188 write_dt_entry(dt, entrynum, low, high);
189 hcall(LHCALL_LOAD_GDT, __pa(dt), GDT_ENTRIES, 0);
190}
191
192static void lguest_load_tls(struct thread_struct *t, unsigned int cpu)
193{
194 lazy_hcall(LHCALL_LOAD_TLS, __pa(&t->tls_array), cpu, 0);
195}
196
197static void lguest_set_ldt(const void *addr, unsigned entries)
198{
199}
200
201static void lguest_load_tr_desc(void)
202{
203}
204
205static void lguest_cpuid(unsigned int *eax, unsigned int *ebx,
206 unsigned int *ecx, unsigned int *edx)
207{
208 int function = *eax;
209
210 native_cpuid(eax, ebx, ecx, edx);
211 switch (function) {
212 case 1: /* Basic feature request. */
213 /* We only allow kernel to see SSE3, CMPXCHG16B and SSSE3 */
214 *ecx &= 0x00002201;
215 /* SSE, SSE2, FXSR, MMX, CMOV, CMPXCHG8B, FPU. */
216 *edx &= 0x07808101;
217 /* Host wants to know when we flush kernel pages: set PGE. */
218 *edx |= 0x00002000;
219 break;
220 case 0x80000000:
221 /* Futureproof this a little: if they ask how much extended
222 * processor information, limit it to known fields. */
223 if (*eax > 0x80000008)
224 *eax = 0x80000008;
225 break;
226 }
227}
228
229static unsigned long current_cr0, current_cr3;
230static void lguest_write_cr0(unsigned long val)
231{
232 lazy_hcall(LHCALL_TS, val & 8, 0, 0);
233 current_cr0 = val;
234}
235
236static unsigned long lguest_read_cr0(void)
237{
238 return current_cr0;
239}
240
241static void lguest_clts(void)
242{
243 lazy_hcall(LHCALL_TS, 0, 0, 0);
244 current_cr0 &= ~8U;
245}
246
247static unsigned long lguest_read_cr2(void)
248{
249 return lguest_data.cr2;
250}
251
252static void lguest_write_cr3(unsigned long cr3)
253{
254 lazy_hcall(LHCALL_NEW_PGTABLE, cr3, 0, 0);
255 current_cr3 = cr3;
256}
257
258static unsigned long lguest_read_cr3(void)
259{
260 return current_cr3;
261}
262
263/* Used to enable/disable PGE, but we don't care. */
264static unsigned long lguest_read_cr4(void)
265{
266 return 0;
267}
268
269static void lguest_write_cr4(unsigned long val)
270{
271}
272
273static void lguest_set_pte_at(struct mm_struct *mm, unsigned long addr,
274 pte_t *ptep, pte_t pteval)
275{
276 *ptep = pteval;
277 lazy_hcall(LHCALL_SET_PTE, __pa(mm->pgd), addr, pteval.pte_low);
278}
279
280/* We only support two-level pagetables at the moment. */
281static void lguest_set_pmd(pmd_t *pmdp, pmd_t pmdval)
282{
283 *pmdp = pmdval;
284 lazy_hcall(LHCALL_SET_PMD, __pa(pmdp)&PAGE_MASK,
285 (__pa(pmdp)&(PAGE_SIZE-1))/4, 0);
286}
287
288/* FIXME: Eliminate all callers of this. */
289static void lguest_set_pte(pte_t *ptep, pte_t pteval)
290{
291 *ptep = pteval;
292 /* Don't bother with hypercall before initial setup. */
293 if (current_cr3)
294 lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
295}
296
297static void lguest_flush_tlb_single(unsigned long addr)
298{
299 /* Simply set it to zero, and it will fault back in. */
300 lazy_hcall(LHCALL_SET_PTE, current_cr3, addr, 0);
301}
302
303static void lguest_flush_tlb_user(void)
304{
305 lazy_hcall(LHCALL_FLUSH_TLB, 0, 0, 0);
306}
307
308static void lguest_flush_tlb_kernel(void)
309{
310 lazy_hcall(LHCALL_FLUSH_TLB, 1, 0, 0);
311}
312
313static void disable_lguest_irq(unsigned int irq)
314{
315 set_bit(irq, lguest_data.blocked_interrupts);
316}
317
318static void enable_lguest_irq(unsigned int irq)
319{
320 clear_bit(irq, lguest_data.blocked_interrupts);
321 /* FIXME: If it's pending? */
322}
323
324static struct irq_chip lguest_irq_controller = {
325 .name = "lguest",
326 .mask = disable_lguest_irq,
327 .mask_ack = disable_lguest_irq,
328 .unmask = enable_lguest_irq,
329};
330
331static void __init lguest_init_IRQ(void)
332{
333 unsigned int i;
334
335 for (i = 0; i < LGUEST_IRQS; i++) {
336 int vector = FIRST_EXTERNAL_VECTOR + i;
337 if (vector != SYSCALL_VECTOR) {
338 set_intr_gate(vector, interrupt[i]);
339 set_irq_chip_and_handler(i, &lguest_irq_controller,
340 handle_level_irq);
341 }
342 }
343 irq_ctx_init(smp_processor_id());
344}
345
346static unsigned long lguest_get_wallclock(void)
347{
348 return hcall(LHCALL_GET_WALLCLOCK, 0, 0, 0);
349}
350
351static cycle_t lguest_clock_read(void)
352{
353 if (lguest_data.tsc_khz)
354 return native_read_tsc();
355 else
356 return jiffies;
357}
358
359/* This is what we tell the kernel is our clocksource. */
360static struct clocksource lguest_clock = {
361 .name = "lguest",
362 .rating = 400,
363 .read = lguest_clock_read,
364};
365
366/* We also need a "struct clock_event_device": Linux asks us to set it to go
367 * off some time in the future. Actually, James Morris figured all this out, I
368 * just applied the patch. */
369static int lguest_clockevent_set_next_event(unsigned long delta,
370 struct clock_event_device *evt)
371{
372 if (delta < LG_CLOCK_MIN_DELTA) {
373 if (printk_ratelimit())
374 printk(KERN_DEBUG "%s: small delta %lu ns\n",
375 __FUNCTION__, delta);
376 return -ETIME;
377 }
378 hcall(LHCALL_SET_CLOCKEVENT, delta, 0, 0);
379 return 0;
380}
381
382static void lguest_clockevent_set_mode(enum clock_event_mode mode,
383 struct clock_event_device *evt)
384{
385 switch (mode) {
386 case CLOCK_EVT_MODE_UNUSED:
387 case CLOCK_EVT_MODE_SHUTDOWN:
388 /* A 0 argument shuts the clock down. */
389 hcall(LHCALL_SET_CLOCKEVENT, 0, 0, 0);
390 break;
391 case CLOCK_EVT_MODE_ONESHOT:
392 /* This is what we expect. */
393 break;
394 case CLOCK_EVT_MODE_PERIODIC:
395 BUG();
396 }
397}
398
399/* This describes our primitive timer chip. */
400static struct clock_event_device lguest_clockevent = {
401 .name = "lguest",
402 .features = CLOCK_EVT_FEAT_ONESHOT,
403 .set_next_event = lguest_clockevent_set_next_event,
404 .set_mode = lguest_clockevent_set_mode,
405 .rating = INT_MAX,
406 .mult = 1,
407 .shift = 0,
408 .min_delta_ns = LG_CLOCK_MIN_DELTA,
409 .max_delta_ns = LG_CLOCK_MAX_DELTA,
410};
411
412/* This is the Guest timer interrupt handler (hardware interrupt 0). We just
413 * call the clockevent infrastructure and it does whatever needs doing. */
414static void lguest_time_irq(unsigned int irq, struct irq_desc *desc)
415{
416 unsigned long flags;
417
418 /* Don't interrupt us while this is running. */
419 local_irq_save(flags);
420 lguest_clockevent.event_handler(&lguest_clockevent);
421 local_irq_restore(flags);
422}
423
424static void lguest_time_init(void)
425{
426 set_irq_handler(0, lguest_time_irq);
427
428 /* We use the TSC if the Host tells us we can, otherwise a dumb
429 * jiffies-based clock. */
430 if (lguest_data.tsc_khz) {
431 lguest_clock.shift = 22;
432 lguest_clock.mult = clocksource_khz2mult(lguest_data.tsc_khz,
433 lguest_clock.shift);
434 lguest_clock.mask = CLOCKSOURCE_MASK(64);
435 lguest_clock.flags = CLOCK_SOURCE_IS_CONTINUOUS;
436 } else {
437 /* To understand this, start at kernel/time/jiffies.c... */
438 lguest_clock.shift = 8;
439 lguest_clock.mult = (((u64)NSEC_PER_SEC<<8)/ACTHZ) << 8;
440 lguest_clock.mask = CLOCKSOURCE_MASK(32);
441 }
442 clocksource_register(&lguest_clock);
443
444 /* We can't set cpumask in the initializer: damn C limitations! */
445 lguest_clockevent.cpumask = cpumask_of_cpu(0);
446 clockevents_register_device(&lguest_clockevent);
447
448 enable_lguest_irq(0);
449}
450
451static void lguest_load_esp0(struct tss_struct *tss,
452 struct thread_struct *thread)
453{
454 lazy_hcall(LHCALL_SET_STACK, __KERNEL_DS|0x1, thread->esp0,
455 THREAD_SIZE/PAGE_SIZE);
456}
457
458static void lguest_set_debugreg(int regno, unsigned long value)
459{
460 /* FIXME: Implement */
461}
462
463static void lguest_wbinvd(void)
464{
465}
466
467#ifdef CONFIG_X86_LOCAL_APIC
468static void lguest_apic_write(unsigned long reg, unsigned long v)
469{
470}
471
472static unsigned long lguest_apic_read(unsigned long reg)
473{
474 return 0;
475}
476#endif
477
478static void lguest_safe_halt(void)
479{
480 hcall(LHCALL_HALT, 0, 0, 0);
481}
482
483static void lguest_power_off(void)
484{
485 hcall(LHCALL_CRASH, __pa("Power down"), 0, 0);
486}
487
488static int lguest_panic(struct notifier_block *nb, unsigned long l, void *p)
489{
490 hcall(LHCALL_CRASH, __pa(p), 0, 0);
491 return NOTIFY_DONE;
492}
493
494static struct notifier_block paniced = {
495 .notifier_call = lguest_panic
496};
497
498static __init char *lguest_memory_setup(void)
499{
500 /* We do this here because lockcheck barfs if before start_kernel */
501 atomic_notifier_chain_register(&panic_notifier_list, &paniced);
502
503 add_memory_region(E820_MAP->addr, E820_MAP->size, E820_MAP->type);
504 return "LGUEST";
505}
506
507static const struct lguest_insns
508{
509 const char *start, *end;
510} lguest_insns[] = {
511 [PARAVIRT_PATCH(irq_disable)] = { lgstart_cli, lgend_cli },
512 [PARAVIRT_PATCH(irq_enable)] = { lgstart_sti, lgend_sti },
513 [PARAVIRT_PATCH(restore_fl)] = { lgstart_popf, lgend_popf },
514 [PARAVIRT_PATCH(save_fl)] = { lgstart_pushf, lgend_pushf },
515};
516static unsigned lguest_patch(u8 type, u16 clobber, void *insns, unsigned len)
517{
518 unsigned int insn_len;
519
520 /* Don't touch it if we don't have a replacement */
521 if (type >= ARRAY_SIZE(lguest_insns) || !lguest_insns[type].start)
522 return paravirt_patch_default(type, clobber, insns, len);
523
524 insn_len = lguest_insns[type].end - lguest_insns[type].start;
525
526 /* Similarly if we can't fit replacement. */
527 if (len < insn_len)
528 return paravirt_patch_default(type, clobber, insns, len);
529
530 memcpy(insns, lguest_insns[type].start, insn_len);
531 return insn_len;
532}
533
534__init void lguest_init(void *boot)
535{
536 /* Copy boot parameters first. */
537 memcpy(&boot_params, boot, PARAM_SIZE);
538 memcpy(boot_command_line, __va(boot_params.hdr.cmd_line_ptr),
539 COMMAND_LINE_SIZE);
540
541 paravirt_ops.name = "lguest";
542 paravirt_ops.paravirt_enabled = 1;
543 paravirt_ops.kernel_rpl = 1;
544
545 paravirt_ops.save_fl = save_fl;
546 paravirt_ops.restore_fl = restore_fl;
547 paravirt_ops.irq_disable = irq_disable;
548 paravirt_ops.irq_enable = irq_enable;
549 paravirt_ops.load_gdt = lguest_load_gdt;
550 paravirt_ops.memory_setup = lguest_memory_setup;
551 paravirt_ops.cpuid = lguest_cpuid;
552 paravirt_ops.write_cr3 = lguest_write_cr3;
553 paravirt_ops.flush_tlb_user = lguest_flush_tlb_user;
554 paravirt_ops.flush_tlb_single = lguest_flush_tlb_single;
555 paravirt_ops.flush_tlb_kernel = lguest_flush_tlb_kernel;
556 paravirt_ops.set_pte = lguest_set_pte;
557 paravirt_ops.set_pte_at = lguest_set_pte_at;
558 paravirt_ops.set_pmd = lguest_set_pmd;
559#ifdef CONFIG_X86_LOCAL_APIC
560 paravirt_ops.apic_write = lguest_apic_write;
561 paravirt_ops.apic_write_atomic = lguest_apic_write;
562 paravirt_ops.apic_read = lguest_apic_read;
563#endif
564 paravirt_ops.load_idt = lguest_load_idt;
565 paravirt_ops.iret = lguest_iret;
566 paravirt_ops.load_esp0 = lguest_load_esp0;
567 paravirt_ops.load_tr_desc = lguest_load_tr_desc;
568 paravirt_ops.set_ldt = lguest_set_ldt;
569 paravirt_ops.load_tls = lguest_load_tls;
570 paravirt_ops.set_debugreg = lguest_set_debugreg;
571 paravirt_ops.clts = lguest_clts;
572 paravirt_ops.read_cr0 = lguest_read_cr0;
573 paravirt_ops.write_cr0 = lguest_write_cr0;
574 paravirt_ops.init_IRQ = lguest_init_IRQ;
575 paravirt_ops.read_cr2 = lguest_read_cr2;
576 paravirt_ops.read_cr3 = lguest_read_cr3;
577 paravirt_ops.read_cr4 = lguest_read_cr4;
578 paravirt_ops.write_cr4 = lguest_write_cr4;
579 paravirt_ops.write_gdt_entry = lguest_write_gdt_entry;
580 paravirt_ops.write_idt_entry = lguest_write_idt_entry;
581 paravirt_ops.patch = lguest_patch;
582 paravirt_ops.safe_halt = lguest_safe_halt;
583 paravirt_ops.get_wallclock = lguest_get_wallclock;
584 paravirt_ops.time_init = lguest_time_init;
585 paravirt_ops.set_lazy_mode = lguest_lazy_mode;
586 paravirt_ops.wbinvd = lguest_wbinvd;
587
588 hcall(LHCALL_LGUEST_INIT, __pa(&lguest_data), 0, 0);
589
590 /* We use top of mem for initial pagetables. */
591 init_pg_tables_end = __pa(pg0);
592
593 asm volatile ("mov %0, %%fs" : : "r" (__KERNEL_DS) : "memory");
594
595 reserve_top_address(lguest_data.reserve_mem);
596
597 lockdep_init();
598
599 paravirt_disable_iospace();
600
601 cpu_detect(&new_cpu_data);
602 /* head.S usually sets up the first capability word, so do it here. */
603 new_cpu_data.x86_capability[0] = cpuid_edx(1);
604
605 /* Math is always hard! */
606 new_cpu_data.hard_math = 1;
607
608#ifdef CONFIG_X86_MCE
609 mce_disabled = 1;
610#endif
611
612#ifdef CONFIG_ACPI
613 acpi_disabled = 1;
614 acpi_ht = 0;
615#endif
616
617 add_preferred_console("hvc", 0, NULL);
618
619 pm_power_off = lguest_power_off;
620 start_kernel();
621}
diff --git a/drivers/lguest/lguest_asm.S b/drivers/lguest/lguest_asm.S
new file mode 100644
index 0000000000..00046c57b5
--- /dev/null
+++ b/drivers/lguest/lguest_asm.S
@@ -0,0 +1,56 @@
1#include <linux/linkage.h>
2#include <linux/lguest.h>
3#include <asm/asm-offsets.h>
4#include <asm/thread_info.h>
5
6/* FIXME: Once asm/processor-flags.h goes in, include that */
7#define X86_EFLAGS_IF 0x00000200
8
9/*
10 * This is where we begin: we have a magic signature which the launcher looks
11 * for. The plan is that the Linux boot protocol will be extended with a
12 * "platform type" field which will guide us here from the normal entry point,
13 * but for the moment this suffices. We pass the virtual address of the boot
14 * info to lguest_init().
15 *
16 * We put it in .init.text will be discarded after boot.
17 */
18.section .init.text, "ax", @progbits
19.ascii "GenuineLguest"
20 /* Set up initial stack. */
21 movl $(init_thread_union+THREAD_SIZE),%esp
22 movl %esi, %eax
23 addl $__PAGE_OFFSET, %eax
24 jmp lguest_init
25
26/* The templates for inline patching. */
27#define LGUEST_PATCH(name, insns...) \
28 lgstart_##name: insns; lgend_##name:; \
29 .globl lgstart_##name; .globl lgend_##name
30
31LGUEST_PATCH(cli, movl $0, lguest_data+LGUEST_DATA_irq_enabled)
32LGUEST_PATCH(sti, movl $X86_EFLAGS_IF, lguest_data+LGUEST_DATA_irq_enabled)
33LGUEST_PATCH(popf, movl %eax, lguest_data+LGUEST_DATA_irq_enabled)
34LGUEST_PATCH(pushf, movl lguest_data+LGUEST_DATA_irq_enabled, %eax)
35
36.text
37/* These demark the EIP range where host should never deliver interrupts. */
38.global lguest_noirq_start
39.global lguest_noirq_end
40
41/*
42 * We move eflags word to lguest_data.irq_enabled to restore interrupt state.
43 * For page faults, gpfs and virtual interrupts, the hypervisor has saved
44 * eflags manually, otherwise it was delivered directly and so eflags reflects
45 * the real machine IF state, ie. interrupts on. Since the kernel always dies
46 * if it takes such a trap with interrupts disabled anyway, turning interrupts
47 * back on unconditionally here is OK.
48 */
49ENTRY(lguest_iret)
50 pushl %eax
51 movl 12(%esp), %eax
52lguest_noirq_start:
53 movl %eax,%ss:lguest_data+LGUEST_DATA_irq_enabled
54 popl %eax
55 iret
56lguest_noirq_end:
diff --git a/drivers/lguest/lguest_bus.c b/drivers/lguest/lguest_bus.c
new file mode 100644
index 0000000000..18d6ab21a4
--- /dev/null
+++ b/drivers/lguest/lguest_bus.c
@@ -0,0 +1,148 @@
1#include <linux/init.h>
2#include <linux/bootmem.h>
3#include <linux/lguest_bus.h>
4#include <asm/io.h>
5
6static ssize_t type_show(struct device *_dev,
7 struct device_attribute *attr, char *buf)
8{
9 struct lguest_device *dev = container_of(_dev,struct lguest_device,dev);
10 return sprintf(buf, "%hu", lguest_devices[dev->index].type);
11}
12static ssize_t features_show(struct device *_dev,
13 struct device_attribute *attr, char *buf)
14{
15 struct lguest_device *dev = container_of(_dev,struct lguest_device,dev);
16 return sprintf(buf, "%hx", lguest_devices[dev->index].features);
17}
18static ssize_t pfn_show(struct device *_dev,
19 struct device_attribute *attr, char *buf)
20{
21 struct lguest_device *dev = container_of(_dev,struct lguest_device,dev);
22 return sprintf(buf, "%u", lguest_devices[dev->index].pfn);
23}
24static ssize_t status_show(struct device *_dev,
25 struct device_attribute *attr, char *buf)
26{
27 struct lguest_device *dev = container_of(_dev,struct lguest_device,dev);
28 return sprintf(buf, "%hx", lguest_devices[dev->index].status);
29}
30static ssize_t status_store(struct device *_dev, struct device_attribute *attr,
31 const char *buf, size_t count)
32{
33 struct lguest_device *dev = container_of(_dev,struct lguest_device,dev);
34 if (sscanf(buf, "%hi", &lguest_devices[dev->index].status) != 1)
35 return -EINVAL;
36 return count;
37}
38static struct device_attribute lguest_dev_attrs[] = {
39 __ATTR_RO(type),
40 __ATTR_RO(features),
41 __ATTR_RO(pfn),
42 __ATTR(status, 0644, status_show, status_store),
43 __ATTR_NULL
44};
45
46static int lguest_dev_match(struct device *_dev, struct device_driver *_drv)
47{
48 struct lguest_device *dev = container_of(_dev,struct lguest_device,dev);
49 struct lguest_driver *drv = container_of(_drv,struct lguest_driver,drv);
50
51 return (drv->device_type == lguest_devices[dev->index].type);
52}
53
54struct lguest_bus {
55 struct bus_type bus;
56 struct device dev;
57};
58
59static struct lguest_bus lguest_bus = {
60 .bus = {
61 .name = "lguest",
62 .match = lguest_dev_match,
63 .dev_attrs = lguest_dev_attrs,
64 },
65 .dev = {
66 .parent = NULL,
67 .bus_id = "lguest",
68 }
69};
70
71static int lguest_dev_probe(struct device *_dev)
72{
73 int ret;
74 struct lguest_device *dev = container_of(_dev,struct lguest_device,dev);
75 struct lguest_driver *drv = container_of(dev->dev.driver,
76 struct lguest_driver, drv);
77
78 lguest_devices[dev->index].status |= LGUEST_DEVICE_S_DRIVER;
79 ret = drv->probe(dev);
80 if (ret == 0)
81 lguest_devices[dev->index].status |= LGUEST_DEVICE_S_DRIVER_OK;
82 return ret;
83}
84
85int register_lguest_driver(struct lguest_driver *drv)
86{
87 if (!lguest_devices)
88 return 0;
89
90 drv->drv.bus = &lguest_bus.bus;
91 drv->drv.name = drv->name;
92 drv->drv.owner = drv->owner;
93 drv->drv.probe = lguest_dev_probe;
94
95 return driver_register(&drv->drv);
96}
97EXPORT_SYMBOL_GPL(register_lguest_driver);
98
99static void add_lguest_device(unsigned int index)
100{
101 struct lguest_device *new;
102
103 lguest_devices[index].status |= LGUEST_DEVICE_S_ACKNOWLEDGE;
104 new = kmalloc(sizeof(struct lguest_device), GFP_KERNEL);
105 if (!new) {
106 printk(KERN_EMERG "Cannot allocate lguest device %u\n", index);
107 lguest_devices[index].status |= LGUEST_DEVICE_S_FAILED;
108 return;
109 }
110
111 new->index = index;
112 new->private = NULL;
113 memset(&new->dev, 0, sizeof(new->dev));
114 new->dev.parent = &lguest_bus.dev;
115 new->dev.bus = &lguest_bus.bus;
116 sprintf(new->dev.bus_id, "%u", index);
117 if (device_register(&new->dev) != 0) {
118 printk(KERN_EMERG "Cannot register lguest device %u\n", index);
119 lguest_devices[index].status |= LGUEST_DEVICE_S_FAILED;
120 kfree(new);
121 }
122}
123
124static void scan_devices(void)
125{
126 unsigned int i;
127
128 for (i = 0; i < LGUEST_MAX_DEVICES; i++)
129 if (lguest_devices[i].type)
130 add_lguest_device(i);
131}
132
133static int __init lguest_bus_init(void)
134{
135 if (strcmp(paravirt_ops.name, "lguest") != 0)
136 return 0;
137
138 /* Devices are in page above top of "normal" mem. */
139 lguest_devices = lguest_map(max_pfn<<PAGE_SHIFT, 1);
140
141 if (bus_register(&lguest_bus.bus) != 0
142 || device_register(&lguest_bus.dev) != 0)
143 panic("lguest bus registration failed");
144
145 scan_devices();
146 return 0;
147}
148postcore_initcall(lguest_bus_init);
diff --git a/drivers/lguest/lguest_user.c b/drivers/lguest/lguest_user.c
new file mode 100644
index 0000000000..e90d7a783d
--- /dev/null
+++ b/drivers/lguest/lguest_user.c
@@ -0,0 +1,236 @@
1/* Userspace control of the guest, via /dev/lguest. */
2#include <linux/uaccess.h>
3#include <linux/miscdevice.h>
4#include <linux/fs.h>
5#include "lg.h"
6
7static void setup_regs(struct lguest_regs *regs, unsigned long start)
8{
9 /* Write out stack in format lguest expects, so we can switch to it. */
10 regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
11 regs->cs = __KERNEL_CS|GUEST_PL;
12 regs->eflags = 0x202; /* Interrupts enabled. */
13 regs->eip = start;
14 /* esi points to our boot information (physical address 0) */
15}
16
17/* + addr */
18static long user_get_dma(struct lguest *lg, const u32 __user *input)
19{
20 unsigned long key, udma, irq;
21
22 if (get_user(key, input) != 0)
23 return -EFAULT;
24 udma = get_dma_buffer(lg, key, &irq);
25 if (!udma)
26 return -ENOENT;
27
28 /* We put irq number in udma->used_len. */
29 lgwrite_u32(lg, udma + offsetof(struct lguest_dma, used_len), irq);
30 return udma;
31}
32
33/* To force the Guest to stop running and return to the Launcher, the
34 * Waker sets writes LHREQ_BREAK and the value "1" to /dev/lguest. The
35 * Launcher then writes LHREQ_BREAK and "0" to release the Waker. */
36static int break_guest_out(struct lguest *lg, const u32 __user *input)
37{
38 unsigned long on;
39
40 /* Fetch whether they're turning break on or off.. */
41 if (get_user(on, input) != 0)
42 return -EFAULT;
43
44 if (on) {
45 lg->break_out = 1;
46 /* Pop it out (may be running on different CPU) */
47 wake_up_process(lg->tsk);
48 /* Wait for them to reset it */
49 return wait_event_interruptible(lg->break_wq, !lg->break_out);
50 } else {
51 lg->break_out = 0;
52 wake_up(&lg->break_wq);
53 return 0;
54 }
55}
56
57/* + irq */
58static int user_send_irq(struct lguest *lg, const u32 __user *input)
59{
60 u32 irq;
61
62 if (get_user(irq, input) != 0)
63 return -EFAULT;
64 if (irq >= LGUEST_IRQS)
65 return -EINVAL;
66 set_bit(irq, lg->irqs_pending);
67 return 0;
68}
69
70static ssize_t read(struct file *file, char __user *user, size_t size,loff_t*o)
71{
72 struct lguest *lg = file->private_data;
73
74 if (!lg)
75 return -EINVAL;
76
77 /* If you're not the task which owns the guest, go away. */
78 if (current != lg->tsk)
79 return -EPERM;
80
81 if (lg->dead) {
82 size_t len;
83
84 if (IS_ERR(lg->dead))
85 return PTR_ERR(lg->dead);
86
87 len = min(size, strlen(lg->dead)+1);
88 if (copy_to_user(user, lg->dead, len) != 0)
89 return -EFAULT;
90 return len;
91 }
92
93 if (lg->dma_is_pending)
94 lg->dma_is_pending = 0;
95
96 return run_guest(lg, (unsigned long __user *)user);
97}
98
99/* Take: pfnlimit, pgdir, start, pageoffset. */
100static int initialize(struct file *file, const u32 __user *input)
101{
102 struct lguest *lg;
103 int err, i;
104 u32 args[4];
105
106 /* We grab the Big Lguest lock, which protects the global array
107 * "lguests" and multiple simultaneous initializations. */
108 mutex_lock(&lguest_lock);
109
110 if (file->private_data) {
111 err = -EBUSY;
112 goto unlock;
113 }
114
115 if (copy_from_user(args, input, sizeof(args)) != 0) {
116 err = -EFAULT;
117 goto unlock;
118 }
119
120 i = find_free_guest();
121 if (i < 0) {
122 err = -ENOSPC;
123 goto unlock;
124 }
125 lg = &lguests[i];
126 lg->guestid = i;
127 lg->pfn_limit = args[0];
128 lg->page_offset = args[3];
129 lg->regs_page = get_zeroed_page(GFP_KERNEL);
130 if (!lg->regs_page) {
131 err = -ENOMEM;
132 goto release_guest;
133 }
134 lg->regs = (void *)lg->regs_page + PAGE_SIZE - sizeof(*lg->regs);
135
136 err = init_guest_pagetable(lg, args[1]);
137 if (err)
138 goto free_regs;
139
140 setup_regs(lg->regs, args[2]);
141 setup_guest_gdt(lg);
142 init_clockdev(lg);
143 lg->tsk = current;
144 lg->mm = get_task_mm(lg->tsk);
145 init_waitqueue_head(&lg->break_wq);
146 lg->last_pages = NULL;
147 file->private_data = lg;
148
149 mutex_unlock(&lguest_lock);
150
151 return sizeof(args);
152
153free_regs:
154 free_page(lg->regs_page);
155release_guest:
156 memset(lg, 0, sizeof(*lg));
157unlock:
158 mutex_unlock(&lguest_lock);
159 return err;
160}
161
162static ssize_t write(struct file *file, const char __user *input,
163 size_t size, loff_t *off)
164{
165 struct lguest *lg = file->private_data;
166 u32 req;
167
168 if (get_user(req, input) != 0)
169 return -EFAULT;
170 input += sizeof(req);
171
172 if (req != LHREQ_INITIALIZE && !lg)
173 return -EINVAL;
174 if (lg && lg->dead)
175 return -ENOENT;
176
177 /* If you're not the task which owns the Guest, you can only break */
178 if (lg && current != lg->tsk && req != LHREQ_BREAK)
179 return -EPERM;
180
181 switch (req) {
182 case LHREQ_INITIALIZE:
183 return initialize(file, (const u32 __user *)input);
184 case LHREQ_GETDMA:
185 return user_get_dma(lg, (const u32 __user *)input);
186 case LHREQ_IRQ:
187 return user_send_irq(lg, (const u32 __user *)input);
188 case LHREQ_BREAK:
189 return break_guest_out(lg, (const u32 __user *)input);
190 default:
191 return -EINVAL;
192 }
193}
194
195static int close(struct inode *inode, struct file *file)
196{
197 struct lguest *lg = file->private_data;
198
199 if (!lg)
200 return 0;
201
202 mutex_lock(&lguest_lock);
203 /* Cancels the hrtimer set via LHCALL_SET_CLOCKEVENT. */
204 hrtimer_cancel(&lg->hrt);
205 release_all_dma(lg);
206 free_guest_pagetable(lg);
207 mmput(lg->mm);
208 if (!IS_ERR(lg->dead))
209 kfree(lg->dead);
210 free_page(lg->regs_page);
211 memset(lg, 0, sizeof(*lg));
212 mutex_unlock(&lguest_lock);
213 return 0;
214}
215
216static struct file_operations lguest_fops = {
217 .owner = THIS_MODULE,
218 .release = close,
219 .write = write,
220 .read = read,
221};
222static struct miscdevice lguest_dev = {
223 .minor = MISC_DYNAMIC_MINOR,
224 .name = "lguest",
225 .fops = &lguest_fops,
226};
227
228int __init lguest_device_init(void)
229{
230 return misc_register(&lguest_dev);
231}
232
233void __exit lguest_device_remove(void)
234{
235 misc_deregister(&lguest_dev);
236}
diff --git a/drivers/lguest/page_tables.c b/drivers/lguest/page_tables.c
new file mode 100644
index 0000000000..1b0ba09b12
--- /dev/null
+++ b/drivers/lguest/page_tables.c
@@ -0,0 +1,411 @@
1/* Shadow page table operations.
2 * Copyright (C) Rusty Russell IBM Corporation 2006.
3 * GPL v2 and any later version */
4#include <linux/mm.h>
5#include <linux/types.h>
6#include <linux/spinlock.h>
7#include <linux/random.h>
8#include <linux/percpu.h>
9#include <asm/tlbflush.h>
10#include "lg.h"
11
12#define PTES_PER_PAGE_SHIFT 10
13#define PTES_PER_PAGE (1 << PTES_PER_PAGE_SHIFT)
14#define SWITCHER_PGD_INDEX (PTES_PER_PAGE - 1)
15
16static DEFINE_PER_CPU(spte_t *, switcher_pte_pages);
17#define switcher_pte_page(cpu) per_cpu(switcher_pte_pages, cpu)
18
19static unsigned vaddr_to_pgd_index(unsigned long vaddr)
20{
21 return vaddr >> (PAGE_SHIFT + PTES_PER_PAGE_SHIFT);
22}
23
24/* These access the shadow versions (ie. the ones used by the CPU). */
25static spgd_t *spgd_addr(struct lguest *lg, u32 i, unsigned long vaddr)
26{
27 unsigned int index = vaddr_to_pgd_index(vaddr);
28
29 if (index >= SWITCHER_PGD_INDEX) {
30 kill_guest(lg, "attempt to access switcher pages");
31 index = 0;
32 }
33 return &lg->pgdirs[i].pgdir[index];
34}
35
36static spte_t *spte_addr(struct lguest *lg, spgd_t spgd, unsigned long vaddr)
37{
38 spte_t *page = __va(spgd.pfn << PAGE_SHIFT);
39 BUG_ON(!(spgd.flags & _PAGE_PRESENT));
40 return &page[(vaddr >> PAGE_SHIFT) % PTES_PER_PAGE];
41}
42
43/* These access the guest versions. */
44static unsigned long gpgd_addr(struct lguest *lg, unsigned long vaddr)
45{
46 unsigned int index = vaddr >> (PAGE_SHIFT + PTES_PER_PAGE_SHIFT);
47 return lg->pgdirs[lg->pgdidx].cr3 + index * sizeof(gpgd_t);
48}
49
50static unsigned long gpte_addr(struct lguest *lg,
51 gpgd_t gpgd, unsigned long vaddr)
52{
53 unsigned long gpage = gpgd.pfn << PAGE_SHIFT;
54 BUG_ON(!(gpgd.flags & _PAGE_PRESENT));
55 return gpage + ((vaddr>>PAGE_SHIFT) % PTES_PER_PAGE) * sizeof(gpte_t);
56}
57
58/* Do a virtual -> physical mapping on a user page. */
59static unsigned long get_pfn(unsigned long virtpfn, int write)
60{
61 struct page *page;
62 unsigned long ret = -1UL;
63
64 down_read(&current->mm->mmap_sem);
65 if (get_user_pages(current, current->mm, virtpfn << PAGE_SHIFT,
66 1, write, 1, &page, NULL) == 1)
67 ret = page_to_pfn(page);
68 up_read(&current->mm->mmap_sem);
69 return ret;
70}
71
72static spte_t gpte_to_spte(struct lguest *lg, gpte_t gpte, int write)
73{
74 spte_t spte;
75 unsigned long pfn;
76
77 /* We ignore the global flag. */
78 spte.flags = (gpte.flags & ~_PAGE_GLOBAL);
79 pfn = get_pfn(gpte.pfn, write);
80 if (pfn == -1UL) {
81 kill_guest(lg, "failed to get page %u", gpte.pfn);
82 /* Must not put_page() bogus page on cleanup. */
83 spte.flags = 0;
84 }
85 spte.pfn = pfn;
86 return spte;
87}
88
89static void release_pte(spte_t pte)
90{
91 if (pte.flags & _PAGE_PRESENT)
92 put_page(pfn_to_page(pte.pfn));
93}
94
95static void check_gpte(struct lguest *lg, gpte_t gpte)
96{
97 if ((gpte.flags & (_PAGE_PWT|_PAGE_PSE)) || gpte.pfn >= lg->pfn_limit)
98 kill_guest(lg, "bad page table entry");
99}
100
101static void check_gpgd(struct lguest *lg, gpgd_t gpgd)
102{
103 if ((gpgd.flags & ~_PAGE_TABLE) || gpgd.pfn >= lg->pfn_limit)
104 kill_guest(lg, "bad page directory entry");
105}
106
107/* FIXME: We hold reference to pages, which prevents them from being
108 swapped. It'd be nice to have a callback when Linux wants to swap out. */
109
110/* We fault pages in, which allows us to update accessed/dirty bits.
111 * Return true if we got page. */
112int demand_page(struct lguest *lg, unsigned long vaddr, int errcode)
113{
114 gpgd_t gpgd;
115 spgd_t *spgd;
116 unsigned long gpte_ptr;
117 gpte_t gpte;
118 spte_t *spte;
119
120 gpgd = mkgpgd(lgread_u32(lg, gpgd_addr(lg, vaddr)));
121 if (!(gpgd.flags & _PAGE_PRESENT))
122 return 0;
123
124 spgd = spgd_addr(lg, lg->pgdidx, vaddr);
125 if (!(spgd->flags & _PAGE_PRESENT)) {
126 /* Get a page of PTEs for them. */
127 unsigned long ptepage = get_zeroed_page(GFP_KERNEL);
128 /* FIXME: Steal from self in this case? */
129 if (!ptepage) {
130 kill_guest(lg, "out of memory allocating pte page");
131 return 0;
132 }
133 check_gpgd(lg, gpgd);
134 spgd->raw.val = (__pa(ptepage) | gpgd.flags);
135 }
136
137 gpte_ptr = gpte_addr(lg, gpgd, vaddr);
138 gpte = mkgpte(lgread_u32(lg, gpte_ptr));
139
140 /* No page? */
141 if (!(gpte.flags & _PAGE_PRESENT))
142 return 0;
143
144 /* Write to read-only page? */
145 if ((errcode & 2) && !(gpte.flags & _PAGE_RW))
146 return 0;
147
148 /* User access to a non-user page? */
149 if ((errcode & 4) && !(gpte.flags & _PAGE_USER))
150 return 0;
151
152 check_gpte(lg, gpte);
153 gpte.flags |= _PAGE_ACCESSED;
154 if (errcode & 2)
155 gpte.flags |= _PAGE_DIRTY;
156
157 /* We're done with the old pte. */
158 spte = spte_addr(lg, *spgd, vaddr);
159 release_pte(*spte);
160
161 /* We don't make it writable if this isn't a write: later
162 * write will fault so we can set dirty bit in guest. */
163 if (gpte.flags & _PAGE_DIRTY)
164 *spte = gpte_to_spte(lg, gpte, 1);
165 else {
166 gpte_t ro_gpte = gpte;
167 ro_gpte.flags &= ~_PAGE_RW;
168 *spte = gpte_to_spte(lg, ro_gpte, 0);
169 }
170
171 /* Now we update dirty/accessed on guest. */
172 lgwrite_u32(lg, gpte_ptr, gpte.raw.val);
173 return 1;
174}
175
176/* This is much faster than the full demand_page logic. */
177static int page_writable(struct lguest *lg, unsigned long vaddr)
178{
179 spgd_t *spgd;
180 unsigned long flags;
181
182 spgd = spgd_addr(lg, lg->pgdidx, vaddr);
183 if (!(spgd->flags & _PAGE_PRESENT))
184 return 0;
185
186 flags = spte_addr(lg, *spgd, vaddr)->flags;
187 return (flags & (_PAGE_PRESENT|_PAGE_RW)) == (_PAGE_PRESENT|_PAGE_RW);
188}
189
190void pin_page(struct lguest *lg, unsigned long vaddr)
191{
192 if (!page_writable(lg, vaddr) && !demand_page(lg, vaddr, 2))
193 kill_guest(lg, "bad stack page %#lx", vaddr);
194}
195
196static void release_pgd(struct lguest *lg, spgd_t *spgd)
197{
198 if (spgd->flags & _PAGE_PRESENT) {
199 unsigned int i;
200 spte_t *ptepage = __va(spgd->pfn << PAGE_SHIFT);
201 for (i = 0; i < PTES_PER_PAGE; i++)
202 release_pte(ptepage[i]);
203 free_page((long)ptepage);
204 spgd->raw.val = 0;
205 }
206}
207
208static void flush_user_mappings(struct lguest *lg, int idx)
209{
210 unsigned int i;
211 for (i = 0; i < vaddr_to_pgd_index(lg->page_offset); i++)
212 release_pgd(lg, lg->pgdirs[idx].pgdir + i);
213}
214
215void guest_pagetable_flush_user(struct lguest *lg)
216{
217 flush_user_mappings(lg, lg->pgdidx);
218}
219
220static unsigned int find_pgdir(struct lguest *lg, unsigned long pgtable)
221{
222 unsigned int i;
223 for (i = 0; i < ARRAY_SIZE(lg->pgdirs); i++)
224 if (lg->pgdirs[i].cr3 == pgtable)
225 break;
226 return i;
227}
228
229static unsigned int new_pgdir(struct lguest *lg,
230 unsigned long cr3,
231 int *blank_pgdir)
232{
233 unsigned int next;
234
235 next = random32() % ARRAY_SIZE(lg->pgdirs);
236 if (!lg->pgdirs[next].pgdir) {
237 lg->pgdirs[next].pgdir = (spgd_t *)get_zeroed_page(GFP_KERNEL);
238 if (!lg->pgdirs[next].pgdir)
239 next = lg->pgdidx;
240 else
241 /* There are no mappings: you'll need to re-pin */
242 *blank_pgdir = 1;
243 }
244 lg->pgdirs[next].cr3 = cr3;
245 /* Release all the non-kernel mappings. */
246 flush_user_mappings(lg, next);
247
248 return next;
249}
250
251void guest_new_pagetable(struct lguest *lg, unsigned long pgtable)
252{
253 int newpgdir, repin = 0;
254
255 newpgdir = find_pgdir(lg, pgtable);
256 if (newpgdir == ARRAY_SIZE(lg->pgdirs))
257 newpgdir = new_pgdir(lg, pgtable, &repin);
258 lg->pgdidx = newpgdir;
259 if (repin)
260 pin_stack_pages(lg);
261}
262
263static void release_all_pagetables(struct lguest *lg)
264{
265 unsigned int i, j;
266
267 for (i = 0; i < ARRAY_SIZE(lg->pgdirs); i++)
268 if (lg->pgdirs[i].pgdir)
269 for (j = 0; j < SWITCHER_PGD_INDEX; j++)
270 release_pgd(lg, lg->pgdirs[i].pgdir + j);
271}
272
273void guest_pagetable_clear_all(struct lguest *lg)
274{
275 release_all_pagetables(lg);
276 pin_stack_pages(lg);
277}
278
279static void do_set_pte(struct lguest *lg, int idx,
280 unsigned long vaddr, gpte_t gpte)
281{
282 spgd_t *spgd = spgd_addr(lg, idx, vaddr);
283 if (spgd->flags & _PAGE_PRESENT) {
284 spte_t *spte = spte_addr(lg, *spgd, vaddr);
285 release_pte(*spte);
286 if (gpte.flags & (_PAGE_DIRTY | _PAGE_ACCESSED)) {
287 check_gpte(lg, gpte);
288 *spte = gpte_to_spte(lg, gpte, gpte.flags&_PAGE_DIRTY);
289 } else
290 spte->raw.val = 0;
291 }
292}
293
294void guest_set_pte(struct lguest *lg,
295 unsigned long cr3, unsigned long vaddr, gpte_t gpte)
296{
297 /* Kernel mappings must be changed on all top levels. */
298 if (vaddr >= lg->page_offset) {
299 unsigned int i;
300 for (i = 0; i < ARRAY_SIZE(lg->pgdirs); i++)
301 if (lg->pgdirs[i].pgdir)
302 do_set_pte(lg, i, vaddr, gpte);
303 } else {
304 int pgdir = find_pgdir(lg, cr3);
305 if (pgdir != ARRAY_SIZE(lg->pgdirs))
306 do_set_pte(lg, pgdir, vaddr, gpte);
307 }
308}
309
310void guest_set_pmd(struct lguest *lg, unsigned long cr3, u32 idx)
311{
312 int pgdir;
313
314 if (idx >= SWITCHER_PGD_INDEX)
315 return;
316
317 pgdir = find_pgdir(lg, cr3);
318 if (pgdir < ARRAY_SIZE(lg->pgdirs))
319 release_pgd(lg, lg->pgdirs[pgdir].pgdir + idx);
320}
321
322int init_guest_pagetable(struct lguest *lg, unsigned long pgtable)
323{
324 /* We assume this in flush_user_mappings, so check now */
325 if (vaddr_to_pgd_index(lg->page_offset) >= SWITCHER_PGD_INDEX)
326 return -EINVAL;
327 lg->pgdidx = 0;
328 lg->pgdirs[lg->pgdidx].cr3 = pgtable;
329 lg->pgdirs[lg->pgdidx].pgdir = (spgd_t*)get_zeroed_page(GFP_KERNEL);
330 if (!lg->pgdirs[lg->pgdidx].pgdir)
331 return -ENOMEM;
332 return 0;
333}
334
335void free_guest_pagetable(struct lguest *lg)
336{
337 unsigned int i;
338
339 release_all_pagetables(lg);
340 for (i = 0; i < ARRAY_SIZE(lg->pgdirs); i++)
341 free_page((long)lg->pgdirs[i].pgdir);
342}
343
344/* Caller must be preempt-safe */
345void map_switcher_in_guest(struct lguest *lg, struct lguest_pages *pages)
346{
347 spte_t *switcher_pte_page = __get_cpu_var(switcher_pte_pages);
348 spgd_t switcher_pgd;
349 spte_t regs_pte;
350
351 /* Since switcher less that 4MB, we simply mug top pte page. */
352 switcher_pgd.pfn = __pa(switcher_pte_page) >> PAGE_SHIFT;
353 switcher_pgd.flags = _PAGE_KERNEL;
354 lg->pgdirs[lg->pgdidx].pgdir[SWITCHER_PGD_INDEX] = switcher_pgd;
355
356 /* Map our regs page over stack page. */
357 regs_pte.pfn = __pa(lg->regs_page) >> PAGE_SHIFT;
358 regs_pte.flags = _PAGE_KERNEL;
359 switcher_pte_page[(unsigned long)pages/PAGE_SIZE%PTES_PER_PAGE]
360 = regs_pte;
361}
362
363static void free_switcher_pte_pages(void)
364{
365 unsigned int i;
366
367 for_each_possible_cpu(i)
368 free_page((long)switcher_pte_page(i));
369}
370
371static __init void populate_switcher_pte_page(unsigned int cpu,
372 struct page *switcher_page[],
373 unsigned int pages)
374{
375 unsigned int i;
376 spte_t *pte = switcher_pte_page(cpu);
377
378 for (i = 0; i < pages; i++) {
379 pte[i].pfn = page_to_pfn(switcher_page[i]);
380 pte[i].flags = _PAGE_PRESENT|_PAGE_ACCESSED;
381 }
382
383 /* We only map this CPU's pages, so guest can't see others. */
384 i = pages + cpu*2;
385
386 /* First page (regs) is rw, second (state) is ro. */
387 pte[i].pfn = page_to_pfn(switcher_page[i]);
388 pte[i].flags = _PAGE_PRESENT|_PAGE_ACCESSED|_PAGE_RW;
389 pte[i+1].pfn = page_to_pfn(switcher_page[i+1]);
390 pte[i+1].flags = _PAGE_PRESENT|_PAGE_ACCESSED;
391}
392
393__init int init_pagetables(struct page **switcher_page, unsigned int pages)
394{
395 unsigned int i;
396
397 for_each_possible_cpu(i) {
398 switcher_pte_page(i) = (spte_t *)get_zeroed_page(GFP_KERNEL);
399 if (!switcher_pte_page(i)) {
400 free_switcher_pte_pages();
401 return -ENOMEM;
402 }
403 populate_switcher_pte_page(i, switcher_page, pages);
404 }
405 return 0;
406}
407
408void free_pagetables(void)
409{
410 free_switcher_pte_pages();
411}
diff --git a/drivers/lguest/segments.c b/drivers/lguest/segments.c
new file mode 100644
index 0000000000..1b2cfe89dc
--- /dev/null
+++ b/drivers/lguest/segments.c
@@ -0,0 +1,125 @@
1#include "lg.h"
2
3static int desc_ok(const struct desc_struct *gdt)
4{
5 /* MBZ=0, P=1, DT=1 */
6 return ((gdt->b & 0x00209000) == 0x00009000);
7}
8
9static int segment_present(const struct desc_struct *gdt)
10{
11 return gdt->b & 0x8000;
12}
13
14static int ignored_gdt(unsigned int num)
15{
16 return (num == GDT_ENTRY_TSS
17 || num == GDT_ENTRY_LGUEST_CS
18 || num == GDT_ENTRY_LGUEST_DS
19 || num == GDT_ENTRY_DOUBLEFAULT_TSS);
20}
21
22/* We don't allow removal of CS, DS or SS; it doesn't make sense. */
23static void check_segment_use(struct lguest *lg, unsigned int desc)
24{
25 if (lg->regs->gs / 8 == desc)
26 lg->regs->gs = 0;
27 if (lg->regs->fs / 8 == desc)
28 lg->regs->fs = 0;
29 if (lg->regs->es / 8 == desc)
30 lg->regs->es = 0;
31 if (lg->regs->ds / 8 == desc
32 || lg->regs->cs / 8 == desc
33 || lg->regs->ss / 8 == desc)
34 kill_guest(lg, "Removed live GDT entry %u", desc);
35}
36
37static void fixup_gdt_table(struct lguest *lg, unsigned start, unsigned end)
38{
39 unsigned int i;
40
41 for (i = start; i < end; i++) {
42 /* We never copy these ones to real gdt */
43 if (ignored_gdt(i))
44 continue;
45
46 /* We could fault in switch_to_guest if they are using
47 * a removed segment. */
48 if (!segment_present(&lg->gdt[i])) {
49 check_segment_use(lg, i);
50 continue;
51 }
52
53 if (!desc_ok(&lg->gdt[i]))
54 kill_guest(lg, "Bad GDT descriptor %i", i);
55
56 /* DPL 0 presumably means "for use by guest". */
57 if ((lg->gdt[i].b & 0x00006000) == 0)
58 lg->gdt[i].b |= (GUEST_PL << 13);
59
60 /* Set accessed bit, since gdt isn't writable. */
61 lg->gdt[i].b |= 0x00000100;
62 }
63}
64
65void setup_default_gdt_entries(struct lguest_ro_state *state)
66{
67 struct desc_struct *gdt = state->guest_gdt;
68 unsigned long tss = (unsigned long)&state->guest_tss;
69
70 /* Hypervisor segments. */
71 gdt[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
72 gdt[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
73
74 /* This is the one which we *cannot* copy from guest, since tss
75 is depended on this lguest_ro_state, ie. this cpu. */
76 gdt[GDT_ENTRY_TSS].a = 0x00000067 | (tss << 16);
77 gdt[GDT_ENTRY_TSS].b = 0x00008900 | (tss & 0xFF000000)
78 | ((tss >> 16) & 0x000000FF);
79}
80
81void setup_guest_gdt(struct lguest *lg)
82{
83 lg->gdt[GDT_ENTRY_KERNEL_CS] = FULL_EXEC_SEGMENT;
84 lg->gdt[GDT_ENTRY_KERNEL_DS] = FULL_SEGMENT;
85 lg->gdt[GDT_ENTRY_KERNEL_CS].b |= (GUEST_PL << 13);
86 lg->gdt[GDT_ENTRY_KERNEL_DS].b |= (GUEST_PL << 13);
87}
88
89/* This is a fast version for the common case where only the three TLS entries
90 * have changed. */
91void copy_gdt_tls(const struct lguest *lg, struct desc_struct *gdt)
92{
93 unsigned int i;
94
95 for (i = GDT_ENTRY_TLS_MIN; i <= GDT_ENTRY_TLS_MAX; i++)
96 gdt[i] = lg->gdt[i];
97}
98
99void copy_gdt(const struct lguest *lg, struct desc_struct *gdt)
100{
101 unsigned int i;
102
103 for (i = 0; i < GDT_ENTRIES; i++)
104 if (!ignored_gdt(i))
105 gdt[i] = lg->gdt[i];
106}
107
108void load_guest_gdt(struct lguest *lg, unsigned long table, u32 num)
109{
110 if (num > ARRAY_SIZE(lg->gdt))
111 kill_guest(lg, "too many gdt entries %i", num);
112
113 lgread(lg, lg->gdt, table, num * sizeof(lg->gdt[0]));
114 fixup_gdt_table(lg, 0, ARRAY_SIZE(lg->gdt));
115 lg->changed |= CHANGED_GDT;
116}
117
118void guest_load_tls(struct lguest *lg, unsigned long gtls)
119{
120 struct desc_struct *tls = &lg->gdt[GDT_ENTRY_TLS_MIN];
121
122 lgread(lg, tls, gtls, sizeof(*tls)*GDT_ENTRY_TLS_ENTRIES);
123 fixup_gdt_table(lg, GDT_ENTRY_TLS_MIN, GDT_ENTRY_TLS_MAX+1);
124 lg->changed |= CHANGED_GDT_TLS;
125}
diff --git a/drivers/lguest/switcher.S b/drivers/lguest/switcher.S
new file mode 100644
index 0000000000..eadd4cc299
--- /dev/null
+++ b/drivers/lguest/switcher.S
@@ -0,0 +1,159 @@
1/* This code sits at 0xFFC00000 to do the low-level guest<->host switch.
2
3 There is are two pages above us for this CPU (struct lguest_pages).
4 The second page (struct lguest_ro_state) becomes read-only after the
5 context switch. The first page (the stack for traps) remains writable,
6 but while we're in here, the guest cannot be running.
7*/
8#include <linux/linkage.h>
9#include <asm/asm-offsets.h>
10#include "lg.h"
11
12.text
13ENTRY(start_switcher_text)
14
15/* %eax points to lguest pages for this CPU. %ebx contains cr3 value.
16 All normal registers can be clobbered! */
17ENTRY(switch_to_guest)
18 /* Save host segments on host stack. */
19 pushl %es
20 pushl %ds
21 pushl %gs
22 pushl %fs
23 /* With CONFIG_FRAME_POINTER, gcc doesn't let us clobber this! */
24 pushl %ebp
25 /* Save host stack. */
26 movl %esp, LGUEST_PAGES_host_sp(%eax)
27 /* Switch to guest stack: if we get NMI we expect to be there. */
28 movl %eax, %edx
29 addl $LGUEST_PAGES_regs, %edx
30 movl %edx, %esp
31 /* Switch to guest's GDT, IDT. */
32 lgdt LGUEST_PAGES_guest_gdt_desc(%eax)
33 lidt LGUEST_PAGES_guest_idt_desc(%eax)
34 /* Switch to guest's TSS while GDT still writable. */
35 movl $(GDT_ENTRY_TSS*8), %edx
36 ltr %dx
37 /* Set host's TSS GDT entry to available (clear byte 5 bit 2). */
38 movl (LGUEST_PAGES_host_gdt_desc+2)(%eax), %edx
39 andb $0xFD, (GDT_ENTRY_TSS*8 + 5)(%edx)
40 /* Switch to guest page tables: lguest_pages->state now read-only. */
41 movl %ebx, %cr3
42 /* Restore guest regs */
43 popl %ebx
44 popl %ecx
45 popl %edx
46 popl %esi
47 popl %edi
48 popl %ebp
49 popl %gs
50 popl %eax
51 popl %fs
52 popl %ds
53 popl %es
54 /* Skip error code and trap number */
55 addl $8, %esp
56 iret
57
58#define SWITCH_TO_HOST \
59 /* Save guest state */ \
60 pushl %es; \
61 pushl %ds; \
62 pushl %fs; \
63 pushl %eax; \
64 pushl %gs; \
65 pushl %ebp; \
66 pushl %edi; \
67 pushl %esi; \
68 pushl %edx; \
69 pushl %ecx; \
70 pushl %ebx; \
71 /* Load lguest ds segment for convenience. */ \
72 movl $(LGUEST_DS), %eax; \
73 movl %eax, %ds; \
74 /* Figure out where we are, based on stack (at top of regs). */ \
75 movl %esp, %eax; \
76 subl $LGUEST_PAGES_regs, %eax; \
77 /* Put trap number in %ebx before we switch cr3 and lose it. */ \
78 movl LGUEST_PAGES_regs_trapnum(%eax), %ebx; \
79 /* Switch to host page tables (host GDT, IDT and stack are in host \
80 mem, so need this first) */ \
81 movl LGUEST_PAGES_host_cr3(%eax), %edx; \
82 movl %edx, %cr3; \
83 /* Set guest's TSS to available (clear byte 5 bit 2). */ \
84 andb $0xFD, (LGUEST_PAGES_guest_gdt+GDT_ENTRY_TSS*8+5)(%eax); \
85 /* Switch to host's GDT & IDT. */ \
86 lgdt LGUEST_PAGES_host_gdt_desc(%eax); \
87 lidt LGUEST_PAGES_host_idt_desc(%eax); \
88 /* Switch to host's stack. */ \
89 movl LGUEST_PAGES_host_sp(%eax), %esp; \
90 /* Switch to host's TSS */ \
91 movl $(GDT_ENTRY_TSS*8), %edx; \
92 ltr %dx; \
93 popl %ebp; \
94 popl %fs; \
95 popl %gs; \
96 popl %ds; \
97 popl %es
98
99/* Return to run_guest_once. */
100return_to_host:
101 SWITCH_TO_HOST
102 iret
103
104deliver_to_host:
105 SWITCH_TO_HOST
106 /* Decode IDT and jump to hosts' irq handler. When that does iret, it
107 * will return to run_guest_once. This is a feature. */
108 movl (LGUEST_PAGES_host_idt_desc+2)(%eax), %edx
109 leal (%edx,%ebx,8), %eax
110 movzwl (%eax),%edx
111 movl 4(%eax), %eax
112 xorw %ax, %ax
113 orl %eax, %edx
114 jmp *%edx
115
116/* Real hardware interrupts are delivered straight to the host. Others
117 cause us to return to run_guest_once so it can decide what to do. Note
118 that some of these are overridden by the guest to deliver directly, and
119 never enter here (see load_guest_idt_entry). */
120.macro IRQ_STUB N TARGET
121 .data; .long 1f; .text; 1:
122 /* Make an error number for most traps, which don't have one. */
123 .if (\N <> 8) && (\N < 10 || \N > 14) && (\N <> 17)
124 pushl $0
125 .endif
126 pushl $\N
127 jmp \TARGET
128 ALIGN
129.endm
130
131.macro IRQ_STUBS FIRST LAST TARGET
132 irq=\FIRST
133 .rept \LAST-\FIRST+1
134 IRQ_STUB irq \TARGET
135 irq=irq+1
136 .endr
137.endm
138
139/* We intercept every interrupt, because we may need to switch back to
140 * host. Unfortunately we can't tell them apart except by entry
141 * point, so we need 256 entry points.
142 */
143.data
144.global default_idt_entries
145default_idt_entries:
146.text
147 IRQ_STUBS 0 1 return_to_host /* First two traps */
148 IRQ_STUB 2 handle_nmi /* NMI */
149 IRQ_STUBS 3 31 return_to_host /* Rest of traps */
150 IRQ_STUBS 32 127 deliver_to_host /* Real interrupts */
151 IRQ_STUB 128 return_to_host /* System call (overridden) */
152 IRQ_STUBS 129 255 deliver_to_host /* Other real interrupts */
153
154/* We ignore NMI and return. */
155handle_nmi:
156 addl $8, %esp
157 iret
158
159ENTRY(end_switcher_text)
diff --git a/drivers/macintosh/macio_asic.c b/drivers/macintosh/macio_asic.c
index c96b7fe882..ec9e5f32f0 100644
--- a/drivers/macintosh/macio_asic.c
+++ b/drivers/macintosh/macio_asic.c
@@ -365,10 +365,9 @@ static struct macio_dev * macio_add_one_device(struct macio_chip *chip,
365 if (np == NULL) 365 if (np == NULL)
366 return NULL; 366 return NULL;
367 367
368 dev = kmalloc(sizeof(*dev), GFP_KERNEL); 368 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
369 if (!dev) 369 if (!dev)
370 return NULL; 370 return NULL;
371 memset(dev, 0, sizeof(*dev));
372 371
373 dev->bus = &chip->lbus; 372 dev->bus = &chip->lbus;
374 dev->media_bay = in_bay; 373 dev->media_bay = in_bay;
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index f8e1a135bf..d409f67594 100644
--- a/drivers/macintosh/smu.c
+++ b/drivers/macintosh/smu.c
@@ -1053,10 +1053,9 @@ static int smu_open(struct inode *inode, struct file *file)
1053 struct smu_private *pp; 1053 struct smu_private *pp;
1054 unsigned long flags; 1054 unsigned long flags;
1055 1055
1056 pp = kmalloc(sizeof(struct smu_private), GFP_KERNEL); 1056 pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
1057 if (pp == 0) 1057 if (pp == 0)
1058 return -ENOMEM; 1058 return -ENOMEM;
1059 memset(pp, 0, sizeof(struct smu_private));
1060 spin_lock_init(&pp->lock); 1059 spin_lock_init(&pp->lock);
1061 pp->mode = smu_file_commands; 1060 pp->mode = smu_file_commands;
1062 init_waitqueue_head(&pp->wait); 1061 init_waitqueue_head(&pp->wait);
diff --git a/drivers/macintosh/therm_pm72.c b/drivers/macintosh/therm_pm72.c
index 3d90fc0020..e43554e754 100644
--- a/drivers/macintosh/therm_pm72.c
+++ b/drivers/macintosh/therm_pm72.c
@@ -318,10 +318,9 @@ static struct i2c_client *attach_i2c_chip(int id, const char *name)
318 if (adap == NULL) 318 if (adap == NULL)
319 return NULL; 319 return NULL;
320 320
321 clt = kmalloc(sizeof(struct i2c_client), GFP_KERNEL); 321 clt = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
322 if (clt == NULL) 322 if (clt == NULL)
323 return NULL; 323 return NULL;
324 memset(clt, 0, sizeof(struct i2c_client));
325 324
326 clt->addr = (id >> 1) & 0x7f; 325 clt->addr = (id >> 1) & 0x7f;
327 clt->adapter = adap; 326 clt->adapter = adap;
diff --git a/drivers/macintosh/therm_windtunnel.c b/drivers/macintosh/therm_windtunnel.c
index 3d0354e96a..5452da1bb1 100644
--- a/drivers/macintosh/therm_windtunnel.c
+++ b/drivers/macintosh/therm_windtunnel.c
@@ -431,9 +431,8 @@ do_probe( struct i2c_adapter *adapter, int addr, int kind )
431 | I2C_FUNC_SMBUS_WRITE_BYTE) ) 431 | I2C_FUNC_SMBUS_WRITE_BYTE) )
432 return 0; 432 return 0;
433 433
434 if( !(cl=kmalloc(sizeof(*cl), GFP_KERNEL)) ) 434 if( !(cl=kzalloc(sizeof(*cl), GFP_KERNEL)) )
435 return -ENOMEM; 435 return -ENOMEM;
436 memset( cl, 0, sizeof(struct i2c_client) );
437 436
438 cl->addr = addr; 437 cl->addr = addr;
439 cl->adapter = adapter; 438 cl->adapter = adapter;
diff --git a/drivers/macintosh/windfarm_lm75_sensor.c b/drivers/macintosh/windfarm_lm75_sensor.c
index a0fabf3c20..7e10c3ab4d 100644
--- a/drivers/macintosh/windfarm_lm75_sensor.c
+++ b/drivers/macintosh/windfarm_lm75_sensor.c
@@ -117,10 +117,9 @@ static struct wf_lm75_sensor *wf_lm75_create(struct i2c_adapter *adapter,
117 DBG("wf_lm75: creating %s device at address 0x%02x\n", 117 DBG("wf_lm75: creating %s device at address 0x%02x\n",
118 ds1775 ? "ds1775" : "lm75", addr); 118 ds1775 ? "ds1775" : "lm75", addr);
119 119
120 lm = kmalloc(sizeof(struct wf_lm75_sensor), GFP_KERNEL); 120 lm = kzalloc(sizeof(struct wf_lm75_sensor), GFP_KERNEL);
121 if (lm == NULL) 121 if (lm == NULL)
122 return NULL; 122 return NULL;
123 memset(lm, 0, sizeof(struct wf_lm75_sensor));
124 123
125 /* Usual rant about sensor names not beeing very consistent in 124 /* Usual rant about sensor names not beeing very consistent in
126 * the device-tree, oh well ... 125 * the device-tree, oh well ...
diff --git a/drivers/md/dm-raid1.c b/drivers/md/dm-raid1.c
index 1a876f9965..144071e70a 100644
--- a/drivers/md/dm-raid1.c
+++ b/drivers/md/dm-raid1.c
@@ -951,13 +951,12 @@ static struct mirror_set *alloc_context(unsigned int nr_mirrors,
951 951
952 len = sizeof(*ms) + (sizeof(ms->mirror[0]) * nr_mirrors); 952 len = sizeof(*ms) + (sizeof(ms->mirror[0]) * nr_mirrors);
953 953
954 ms = kmalloc(len, GFP_KERNEL); 954 ms = kzalloc(len, GFP_KERNEL);
955 if (!ms) { 955 if (!ms) {
956 ti->error = "Cannot allocate mirror context"; 956 ti->error = "Cannot allocate mirror context";
957 return NULL; 957 return NULL;
958 } 958 }
959 959
960 memset(ms, 0, len);
961 spin_lock_init(&ms->lock); 960 spin_lock_init(&ms->lock);
962 961
963 ms->ti = ti; 962 ms->ti = ti;
diff --git a/drivers/media/dvb/cinergyT2/cinergyT2.c b/drivers/media/dvb/cinergyT2/cinergyT2.c
index 5a1449f485..28929b618e 100644
--- a/drivers/media/dvb/cinergyT2/cinergyT2.c
+++ b/drivers/media/dvb/cinergyT2/cinergyT2.c
@@ -905,12 +905,11 @@ static int cinergyt2_probe (struct usb_interface *intf,
905 struct cinergyt2 *cinergyt2; 905 struct cinergyt2 *cinergyt2;
906 int err; 906 int err;
907 907
908 if (!(cinergyt2 = kmalloc (sizeof(struct cinergyt2), GFP_KERNEL))) { 908 if (!(cinergyt2 = kzalloc (sizeof(struct cinergyt2), GFP_KERNEL))) {
909 dprintk(1, "out of memory?!?\n"); 909 dprintk(1, "out of memory?!?\n");
910 return -ENOMEM; 910 return -ENOMEM;
911 } 911 }
912 912
913 memset (cinergyt2, 0, sizeof (struct cinergyt2));
914 usb_set_intfdata (intf, (void *) cinergyt2); 913 usb_set_intfdata (intf, (void *) cinergyt2);
915 914
916 mutex_init(&cinergyt2->sem); 915 mutex_init(&cinergyt2->sem);
diff --git a/drivers/media/video/cpia2/cpia2_core.c b/drivers/media/video/cpia2/cpia2_core.c
index 55aab8d388..a76bd786cf 100644
--- a/drivers/media/video/cpia2/cpia2_core.c
+++ b/drivers/media/video/cpia2/cpia2_core.c
@@ -2224,15 +2224,13 @@ struct camera_data *cpia2_init_camera_struct(void)
2224{ 2224{
2225 struct camera_data *cam; 2225 struct camera_data *cam;
2226 2226
2227 cam = kmalloc(sizeof(*cam), GFP_KERNEL); 2227 cam = kzalloc(sizeof(*cam), GFP_KERNEL);
2228 2228
2229 if (!cam) { 2229 if (!cam) {
2230 ERR("couldn't kmalloc cpia2 struct\n"); 2230 ERR("couldn't kmalloc cpia2 struct\n");
2231 return NULL; 2231 return NULL;
2232 } 2232 }
2233 2233
2234 /* Default everything to 0 */
2235 memset(cam, 0, sizeof(struct camera_data));
2236 2234
2237 cam->present = 1; 2235 cam->present = 1;
2238 mutex_init(&cam->busy_lock); 2236 mutex_init(&cam->busy_lock);
diff --git a/drivers/media/video/msp3400-driver.c b/drivers/media/video/msp3400-driver.c
index 507b1d4260..11cfcf18ec 100644
--- a/drivers/media/video/msp3400-driver.c
+++ b/drivers/media/video/msp3400-driver.c
@@ -812,10 +812,9 @@ static int msp_attach(struct i2c_adapter *adapter, int address, int kind)
812 int msp_product, msp_prod_hi, msp_prod_lo; 812 int msp_product, msp_prod_hi, msp_prod_lo;
813 int msp_rom; 813 int msp_rom;
814 814
815 client = kmalloc(sizeof(*client), GFP_KERNEL); 815 client = kzalloc(sizeof(*client), GFP_KERNEL);
816 if (client == NULL) 816 if (client == NULL)
817 return -ENOMEM; 817 return -ENOMEM;
818 memset(client, 0, sizeof(*client));
819 client->addr = address; 818 client->addr = address;
820 client->adapter = adapter; 819 client->adapter = adapter;
821 client->driver = &i2c_driver; 820 client->driver = &i2c_driver;
diff --git a/drivers/media/video/planb.c b/drivers/media/video/planb.c
index 1455a8f4e9..4ab1af74a9 100644
--- a/drivers/media/video/planb.c
+++ b/drivers/media/video/planb.c
@@ -353,9 +353,8 @@ static int planb_prepare_open(struct planb *pb)
353 * PLANB_DUMMY)*sizeof(struct dbdma_cmd) 353 * PLANB_DUMMY)*sizeof(struct dbdma_cmd)
354 +(PLANB_MAXLINES*((PLANB_MAXPIXELS+7)& ~7))/8 354 +(PLANB_MAXLINES*((PLANB_MAXPIXELS+7)& ~7))/8
355 +MAX_GBUFFERS*sizeof(unsigned int); 355 +MAX_GBUFFERS*sizeof(unsigned int);
356 if ((pb->priv_space = kmalloc (size, GFP_KERNEL)) == 0) 356 if ((pb->priv_space = kzalloc (size, GFP_KERNEL)) == 0)
357 return -ENOMEM; 357 return -ENOMEM;
358 memset ((void *) pb->priv_space, 0, size);
359 pb->overlay_last1 = pb->ch1_cmd = (volatile struct dbdma_cmd *) 358 pb->overlay_last1 = pb->ch1_cmd = (volatile struct dbdma_cmd *)
360 DBDMA_ALIGN (pb->priv_space); 359 DBDMA_ALIGN (pb->priv_space);
361 pb->overlay_last2 = pb->ch2_cmd = pb->ch1_cmd + pb->tab_size; 360 pb->overlay_last2 = pb->ch2_cmd = pb->ch1_cmd + pb->tab_size;
diff --git a/drivers/media/video/usbvideo/vicam.c b/drivers/media/video/usbvideo/vicam.c
index 2d9c0dd3b7..ff555129c8 100644
--- a/drivers/media/video/usbvideo/vicam.c
+++ b/drivers/media/video/usbvideo/vicam.c
@@ -1130,13 +1130,12 @@ vicam_probe( struct usb_interface *intf, const struct usb_device_id *id)
1130 } 1130 }
1131 1131
1132 if ((cam = 1132 if ((cam =
1133 kmalloc(sizeof (struct vicam_camera), GFP_KERNEL)) == NULL) { 1133 kzalloc(sizeof (struct vicam_camera), GFP_KERNEL)) == NULL) {
1134 printk(KERN_WARNING 1134 printk(KERN_WARNING
1135 "could not allocate kernel memory for vicam_camera struct\n"); 1135 "could not allocate kernel memory for vicam_camera struct\n");
1136 return -ENOMEM; 1136 return -ENOMEM;
1137 } 1137 }
1138 1138
1139 memset(cam, 0, sizeof (struct vicam_camera));
1140 1139
1141 cam->shutter_speed = 15; 1140 cam->shutter_speed = 15;
1142 1141
diff --git a/drivers/mfd/mcp-core.c b/drivers/mfd/mcp-core.c
index 75f401d52f..b4ed57e027 100644
--- a/drivers/mfd/mcp-core.c
+++ b/drivers/mfd/mcp-core.c
@@ -200,9 +200,8 @@ struct mcp *mcp_host_alloc(struct device *parent, size_t size)
200{ 200{
201 struct mcp *mcp; 201 struct mcp *mcp;
202 202
203 mcp = kmalloc(sizeof(struct mcp) + size, GFP_KERNEL); 203 mcp = kzalloc(sizeof(struct mcp) + size, GFP_KERNEL);
204 if (mcp) { 204 if (mcp) {
205 memset(mcp, 0, sizeof(struct mcp) + size);
206 spin_lock_init(&mcp->lock); 205 spin_lock_init(&mcp->lock);
207 mcp->attached_device.parent = parent; 206 mcp->attached_device.parent = parent;
208 mcp->attached_device.bus = &mcp_bus_type; 207 mcp->attached_device.bus = &mcp_bus_type;
diff --git a/drivers/mfd/ucb1x00-core.c b/drivers/mfd/ucb1x00-core.c
index 149810a084..e03f1bcd4f 100644
--- a/drivers/mfd/ucb1x00-core.c
+++ b/drivers/mfd/ucb1x00-core.c
@@ -484,12 +484,11 @@ static int ucb1x00_probe(struct mcp *mcp)
484 goto err_disable; 484 goto err_disable;
485 } 485 }
486 486
487 ucb = kmalloc(sizeof(struct ucb1x00), GFP_KERNEL); 487 ucb = kzalloc(sizeof(struct ucb1x00), GFP_KERNEL);
488 ret = -ENOMEM; 488 ret = -ENOMEM;
489 if (!ucb) 489 if (!ucb)
490 goto err_disable; 490 goto err_disable;
491 491
492 memset(ucb, 0, sizeof(struct ucb1x00));
493 492
494 ucb->cdev.class = &ucb1x00_class; 493 ucb->cdev.class = &ucb1x00_class;
495 ucb->cdev.dev = &mcp->attached_device; 494 ucb->cdev.dev = &mcp->attached_device;
diff --git a/drivers/misc/asus-laptop.c b/drivers/misc/asus-laptop.c
index 7798f590e5..f753060599 100644
--- a/drivers/misc/asus-laptop.c
+++ b/drivers/misc/asus-laptop.c
@@ -979,10 +979,9 @@ static int asus_hotk_add(struct acpi_device *device)
979 printk(ASUS_NOTICE "Asus Laptop Support version %s\n", 979 printk(ASUS_NOTICE "Asus Laptop Support version %s\n",
980 ASUS_LAPTOP_VERSION); 980 ASUS_LAPTOP_VERSION);
981 981
982 hotk = kmalloc(sizeof(struct asus_hotk), GFP_KERNEL); 982 hotk = kzalloc(sizeof(struct asus_hotk), GFP_KERNEL);
983 if (!hotk) 983 if (!hotk)
984 return -ENOMEM; 984 return -ENOMEM;
985 memset(hotk, 0, sizeof(struct asus_hotk));
986 985
987 hotk->handle = device->handle; 986 hotk->handle = device->handle;
988 strcpy(acpi_device_name(device), ASUS_HOTK_DEVICE_NAME); 987 strcpy(acpi_device_name(device), ASUS_HOTK_DEVICE_NAME);
diff --git a/drivers/misc/ibmasm/command.c b/drivers/misc/ibmasm/command.c
index b5df347c81..6497872df5 100644
--- a/drivers/misc/ibmasm/command.c
+++ b/drivers/misc/ibmasm/command.c
@@ -41,18 +41,16 @@ struct command *ibmasm_new_command(struct service_processor *sp, size_t buffer_s
41 if (buffer_size > IBMASM_CMD_MAX_BUFFER_SIZE) 41 if (buffer_size > IBMASM_CMD_MAX_BUFFER_SIZE)
42 return NULL; 42 return NULL;
43 43
44 cmd = kmalloc(sizeof(struct command), GFP_KERNEL); 44 cmd = kzalloc(sizeof(struct command), GFP_KERNEL);
45 if (cmd == NULL) 45 if (cmd == NULL)
46 return NULL; 46 return NULL;
47 47
48 memset(cmd, 0, sizeof(*cmd));
49 48
50 cmd->buffer = kmalloc(buffer_size, GFP_KERNEL); 49 cmd->buffer = kzalloc(buffer_size, GFP_KERNEL);
51 if (cmd->buffer == NULL) { 50 if (cmd->buffer == NULL) {
52 kfree(cmd); 51 kfree(cmd);
53 return NULL; 52 return NULL;
54 } 53 }
55 memset(cmd->buffer, 0, buffer_size);
56 cmd->buffer_size = buffer_size; 54 cmd->buffer_size = buffer_size;
57 55
58 kobject_init(&cmd->kobj); 56 kobject_init(&cmd->kobj);
diff --git a/drivers/misc/ibmasm/ibmasmfs.c b/drivers/misc/ibmasm/ibmasmfs.c
index eb7b073734..22a7e8ba21 100644
--- a/drivers/misc/ibmasm/ibmasmfs.c
+++ b/drivers/misc/ibmasm/ibmasmfs.c
@@ -563,11 +563,10 @@ static ssize_t remote_settings_file_write(struct file *file, const char __user *
563 if (*offset != 0) 563 if (*offset != 0)
564 return 0; 564 return 0;
565 565
566 buff = kmalloc (count + 1, GFP_KERNEL); 566 buff = kzalloc (count + 1, GFP_KERNEL);
567 if (!buff) 567 if (!buff)
568 return -ENOMEM; 568 return -ENOMEM;
569 569
570 memset(buff, 0x0, count + 1);
571 570
572 if (copy_from_user(buff, ubuff, count)) { 571 if (copy_from_user(buff, ubuff, count)) {
573 kfree(buff); 572 kfree(buff);
diff --git a/drivers/misc/ibmasm/module.c b/drivers/misc/ibmasm/module.c
index fb03a853fa..4f9d4a9da9 100644
--- a/drivers/misc/ibmasm/module.c
+++ b/drivers/misc/ibmasm/module.c
@@ -77,13 +77,12 @@ static int __devinit ibmasm_init_one(struct pci_dev *pdev, const struct pci_devi
77 /* vnc client won't work without bus-mastering */ 77 /* vnc client won't work without bus-mastering */
78 pci_set_master(pdev); 78 pci_set_master(pdev);
79 79
80 sp = kmalloc(sizeof(struct service_processor), GFP_KERNEL); 80 sp = kzalloc(sizeof(struct service_processor), GFP_KERNEL);
81 if (sp == NULL) { 81 if (sp == NULL) {
82 dev_err(&pdev->dev, "Failed to allocate memory\n"); 82 dev_err(&pdev->dev, "Failed to allocate memory\n");
83 result = -ENOMEM; 83 result = -ENOMEM;
84 goto error_kmalloc; 84 goto error_kmalloc;
85 } 85 }
86 memset(sp, 0, sizeof(struct service_processor));
87 86
88 spin_lock_init(&sp->lock); 87 spin_lock_init(&sp->lock);
89 INIT_LIST_HEAD(&sp->command_queue); 88 INIT_LIST_HEAD(&sp->command_queue);
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index cbd4b6e3e1..93fe2e5dd6 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -414,13 +414,12 @@ static struct mmc_blk_data *mmc_blk_alloc(struct mmc_card *card)
414 return ERR_PTR(-ENOSPC); 414 return ERR_PTR(-ENOSPC);
415 __set_bit(devidx, dev_use); 415 __set_bit(devidx, dev_use);
416 416
417 md = kmalloc(sizeof(struct mmc_blk_data), GFP_KERNEL); 417 md = kzalloc(sizeof(struct mmc_blk_data), GFP_KERNEL);
418 if (!md) { 418 if (!md) {
419 ret = -ENOMEM; 419 ret = -ENOMEM;
420 goto out; 420 goto out;
421 } 421 }
422 422
423 memset(md, 0, sizeof(struct mmc_blk_data));
424 423
425 /* 424 /*
426 * Set the read-only status based on the supported commands 425 * Set the read-only status based on the supported commands
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index aaaa0a04bb..336af0635d 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -177,6 +177,7 @@ obj-$(CONFIG_ZORRO8390) += zorro8390.o
177obj-$(CONFIG_HPLANCE) += hplance.o 7990.o 177obj-$(CONFIG_HPLANCE) += hplance.o 7990.o
178obj-$(CONFIG_MVME147_NET) += mvme147.o 7990.o 178obj-$(CONFIG_MVME147_NET) += mvme147.o 7990.o
179obj-$(CONFIG_EQUALIZER) += eql.o 179obj-$(CONFIG_EQUALIZER) += eql.o
180obj-$(CONFIG_LGUEST_GUEST) += lguest_net.o
180obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o 181obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o
181obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o 182obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o
182obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o 183obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o
diff --git a/drivers/net/b44.c b/drivers/net/b44.c
index 96fb0ec905..37f1b6ff5c 100644
--- a/drivers/net/b44.c
+++ b/drivers/net/b44.c
@@ -1519,14 +1519,13 @@ static void b44_setup_pseudo_magicp(struct b44 *bp)
1519 u8 *pwol_pattern; 1519 u8 *pwol_pattern;
1520 u8 pwol_mask[B44_PMASK_SIZE]; 1520 u8 pwol_mask[B44_PMASK_SIZE];
1521 1521
1522 pwol_pattern = kmalloc(B44_PATTERN_SIZE, GFP_KERNEL); 1522 pwol_pattern = kzalloc(B44_PATTERN_SIZE, GFP_KERNEL);
1523 if (!pwol_pattern) { 1523 if (!pwol_pattern) {
1524 printk(KERN_ERR PFX "Memory not available for WOL\n"); 1524 printk(KERN_ERR PFX "Memory not available for WOL\n");
1525 return; 1525 return;
1526 } 1526 }
1527 1527
1528 /* Ipv4 magic packet pattern - pattern 0.*/ 1528 /* Ipv4 magic packet pattern - pattern 0.*/
1529 memset(pwol_pattern, 0, B44_PATTERN_SIZE);
1530 memset(pwol_mask, 0, B44_PMASK_SIZE); 1529 memset(pwol_mask, 0, B44_PMASK_SIZE);
1531 plen0 = b44_magic_pattern(bp->dev->dev_addr, pwol_pattern, pwol_mask, 1530 plen0 = b44_magic_pattern(bp->dev->dev_addr, pwol_pattern, pwol_mask,
1532 B44_ETHIPV4UDP_HLEN); 1531 B44_ETHIPV4UDP_HLEN);
diff --git a/drivers/net/bsd_comp.c b/drivers/net/bsd_comp.c
index 7845eaf6f2..202d4a4ef7 100644
--- a/drivers/net/bsd_comp.c
+++ b/drivers/net/bsd_comp.c
@@ -395,14 +395,13 @@ static void *bsd_alloc (unsigned char *options, int opt_len, int decomp)
395 * Allocate the main control structure for this instance. 395 * Allocate the main control structure for this instance.
396 */ 396 */
397 maxmaxcode = MAXCODE(bits); 397 maxmaxcode = MAXCODE(bits);
398 db = kmalloc(sizeof (struct bsd_db), 398 db = kzalloc(sizeof (struct bsd_db),
399 GFP_KERNEL); 399 GFP_KERNEL);
400 if (!db) 400 if (!db)
401 { 401 {
402 return NULL; 402 return NULL;
403 } 403 }
404 404
405 memset (db, 0, sizeof(struct bsd_db));
406/* 405/*
407 * Allocate space for the dictionary. This may be more than one page in 406 * Allocate space for the dictionary. This may be more than one page in
408 * length. 407 * length.
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 136827f8dc..6d1d50a197 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -5137,12 +5137,10 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
5137 goto out_unmap; 5137 goto out_unmap;
5138 np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size]; 5138 np->tx_ring.ex = &np->rx_ring.ex[np->rx_ring_size];
5139 } 5139 }
5140 np->rx_skb = kmalloc(sizeof(struct nv_skb_map) * np->rx_ring_size, GFP_KERNEL); 5140 np->rx_skb = kcalloc(np->rx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL);
5141 np->tx_skb = kmalloc(sizeof(struct nv_skb_map) * np->tx_ring_size, GFP_KERNEL); 5141 np->tx_skb = kcalloc(np->tx_ring_size, sizeof(struct nv_skb_map), GFP_KERNEL);
5142 if (!np->rx_skb || !np->tx_skb) 5142 if (!np->rx_skb || !np->tx_skb)
5143 goto out_freering; 5143 goto out_freering;
5144 memset(np->rx_skb, 0, sizeof(struct nv_skb_map) * np->rx_ring_size);
5145 memset(np->tx_skb, 0, sizeof(struct nv_skb_map) * np->tx_ring_size);
5146 5144
5147 dev->open = nv_open; 5145 dev->open = nv_open;
5148 dev->stop = nv_close; 5146 dev->stop = nv_close;
diff --git a/drivers/net/hamradio/dmascc.c b/drivers/net/hamradio/dmascc.c
index 3be8c50475..205f096724 100644
--- a/drivers/net/hamradio/dmascc.c
+++ b/drivers/net/hamradio/dmascc.c
@@ -453,8 +453,8 @@ static int __init setup_adapter(int card_base, int type, int n)
453 int scc_base = card_base + hw[type].scc_offset; 453 int scc_base = card_base + hw[type].scc_offset;
454 char *chipnames[] = CHIPNAMES; 454 char *chipnames[] = CHIPNAMES;
455 455
456 /* Allocate memory */ 456 /* Initialize what is necessary for write_scc and write_scc_data */
457 info = kmalloc(sizeof(struct scc_info), GFP_KERNEL | GFP_DMA); 457 info = kzalloc(sizeof(struct scc_info), GFP_KERNEL | GFP_DMA);
458 if (!info) { 458 if (!info) {
459 printk(KERN_ERR "dmascc: " 459 printk(KERN_ERR "dmascc: "
460 "could not allocate memory for %s at %#3x\n", 460 "could not allocate memory for %s at %#3x\n",
@@ -462,8 +462,6 @@ static int __init setup_adapter(int card_base, int type, int n)
462 goto out; 462 goto out;
463 } 463 }
464 464
465 /* Initialize what is necessary for write_scc and write_scc_data */
466 memset(info, 0, sizeof(struct scc_info));
467 465
468 info->dev[0] = alloc_netdev(0, "", dev_setup); 466 info->dev[0] = alloc_netdev(0, "", dev_setup);
469 if (!info->dev[0]) { 467 if (!info->dev[0]) {
diff --git a/drivers/net/irda/irport.c b/drivers/net/irda/irport.c
index 3078c419cb..20732458f5 100644
--- a/drivers/net/irda/irport.c
+++ b/drivers/net/irda/irport.c
@@ -164,14 +164,13 @@ irport_open(int i, unsigned int iobase, unsigned int irq)
164 164
165 /* Allocate memory if needed */ 165 /* Allocate memory if needed */
166 if (self->tx_buff.truesize > 0) { 166 if (self->tx_buff.truesize > 0) {
167 self->tx_buff.head = kmalloc(self->tx_buff.truesize, 167 self->tx_buff.head = kzalloc(self->tx_buff.truesize,
168 GFP_KERNEL); 168 GFP_KERNEL);
169 if (self->tx_buff.head == NULL) { 169 if (self->tx_buff.head == NULL) {
170 IRDA_ERROR("%s(), can't allocate memory for " 170 IRDA_ERROR("%s(), can't allocate memory for "
171 "transmit buffer!\n", __FUNCTION__); 171 "transmit buffer!\n", __FUNCTION__);
172 goto err_out4; 172 goto err_out4;
173 } 173 }
174 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
175 } 174 }
176 self->tx_buff.data = self->tx_buff.head; 175 self->tx_buff.data = self->tx_buff.head;
177 176
diff --git a/drivers/net/irda/irtty-sir.c b/drivers/net/irda/irtty-sir.c
index ad1857364d..6f5f697ec9 100644
--- a/drivers/net/irda/irtty-sir.c
+++ b/drivers/net/irda/irtty-sir.c
@@ -505,10 +505,9 @@ static int irtty_open(struct tty_struct *tty)
505 } 505 }
506 506
507 /* allocate private device info block */ 507 /* allocate private device info block */
508 priv = kmalloc(sizeof(*priv), GFP_KERNEL); 508 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
509 if (!priv) 509 if (!priv)
510 goto out_put; 510 goto out_put;
511 memset(priv, 0, sizeof(*priv));
512 511
513 priv->magic = IRTTY_MAGIC; 512 priv->magic = IRTTY_MAGIC;
514 priv->tty = tty; 513 priv->tty = tty;
diff --git a/drivers/net/iseries_veth.c b/drivers/net/iseries_veth.c
index 347d50cd77..0433c41f90 100644
--- a/drivers/net/iseries_veth.c
+++ b/drivers/net/iseries_veth.c
@@ -822,10 +822,9 @@ static int veth_init_connection(u8 rlp)
822 || ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) ) 822 || ! HvLpConfig_doLpsCommunicateOnVirtualLan(this_lp, rlp) )
823 return 0; 823 return 0;
824 824
825 cnx = kmalloc(sizeof(*cnx), GFP_KERNEL); 825 cnx = kzalloc(sizeof(*cnx), GFP_KERNEL);
826 if (! cnx) 826 if (! cnx)
827 return -ENOMEM; 827 return -ENOMEM;
828 memset(cnx, 0, sizeof(*cnx));
829 828
830 cnx->remote_lp = rlp; 829 cnx->remote_lp = rlp;
831 spin_lock_init(&cnx->lock); 830 spin_lock_init(&cnx->lock);
@@ -852,14 +851,13 @@ static int veth_init_connection(u8 rlp)
852 if (rc != 0) 851 if (rc != 0)
853 return rc; 852 return rc;
854 853
855 msgs = kmalloc(VETH_NUMBUFFERS * sizeof(struct veth_msg), GFP_KERNEL); 854 msgs = kcalloc(VETH_NUMBUFFERS, sizeof(struct veth_msg), GFP_KERNEL);
856 if (! msgs) { 855 if (! msgs) {
857 veth_error("Can't allocate buffers for LPAR %d.\n", rlp); 856 veth_error("Can't allocate buffers for LPAR %d.\n", rlp);
858 return -ENOMEM; 857 return -ENOMEM;
859 } 858 }
860 859
861 cnx->msgs = msgs; 860 cnx->msgs = msgs;
862 memset(msgs, 0, VETH_NUMBUFFERS * sizeof(struct veth_msg));
863 861
864 for (i = 0; i < VETH_NUMBUFFERS; i++) { 862 for (i = 0; i < VETH_NUMBUFFERS; i++) {
865 msgs[i].token = i; 863 msgs[i].token = i;
diff --git a/drivers/net/lance.c b/drivers/net/lance.c
index a2f37e52b9..a4e5fab126 100644
--- a/drivers/net/lance.c
+++ b/drivers/net/lance.c
@@ -533,11 +533,10 @@ static int __init lance_probe1(struct net_device *dev, int ioaddr, int irq, int
533 dev->base_addr = ioaddr; 533 dev->base_addr = ioaddr;
534 /* Make certain the data structures used by the LANCE are aligned and DMAble. */ 534 /* Make certain the data structures used by the LANCE are aligned and DMAble. */
535 535
536 lp = kmalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL); 536 lp = kzalloc(sizeof(*lp), GFP_DMA | GFP_KERNEL);
537 if(lp==NULL) 537 if(lp==NULL)
538 return -ENODEV; 538 return -ENODEV;
539 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp); 539 if (lance_debug > 6) printk(" (#0x%05lx)", (unsigned long)lp);
540 memset(lp, 0, sizeof(*lp));
541 dev->priv = lp; 540 dev->priv = lp;
542 lp->name = chipname; 541 lp->name = chipname;
543 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE, 542 lp->rx_buffs = (unsigned long)kmalloc(PKT_BUF_SZ*RX_RING_SIZE,
diff --git a/drivers/net/lguest_net.c b/drivers/net/lguest_net.c
new file mode 100644
index 0000000000..112778652f
--- /dev/null
+++ b/drivers/net/lguest_net.c
@@ -0,0 +1,354 @@
1/* A simple network driver for lguest.
2 *
3 * Copyright 2006 Rusty Russell <rusty@rustcorp.com.au> IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19//#define DEBUG
20#include <linux/netdevice.h>
21#include <linux/etherdevice.h>
22#include <linux/module.h>
23#include <linux/mm_types.h>
24#include <linux/io.h>
25#include <linux/lguest_bus.h>
26
27#define SHARED_SIZE PAGE_SIZE
28#define MAX_LANS 4
29#define NUM_SKBS 8
30
31struct lguestnet_info
32{
33 /* The shared page(s). */
34 struct lguest_net *peer;
35 unsigned long peer_phys;
36 unsigned long mapsize;
37
38 /* The lguest_device I come from */
39 struct lguest_device *lgdev;
40
41 /* My peerid. */
42 unsigned int me;
43
44 /* Receive queue. */
45 struct sk_buff *skb[NUM_SKBS];
46 struct lguest_dma dma[NUM_SKBS];
47};
48
49/* How many bytes left in this page. */
50static unsigned int rest_of_page(void *data)
51{
52 return PAGE_SIZE - ((unsigned long)data % PAGE_SIZE);
53}
54
55/* Simple convention: offset 4 * peernum. */
56static unsigned long peer_key(struct lguestnet_info *info, unsigned peernum)
57{
58 return info->peer_phys + 4 * peernum;
59}
60
61static void skb_to_dma(const struct sk_buff *skb, unsigned int headlen,
62 struct lguest_dma *dma)
63{
64 unsigned int i, seg;
65
66 for (i = seg = 0; i < headlen; seg++, i += rest_of_page(skb->data+i)) {
67 dma->addr[seg] = virt_to_phys(skb->data + i);
68 dma->len[seg] = min((unsigned)(headlen - i),
69 rest_of_page(skb->data + i));
70 }
71 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, seg++) {
72 const skb_frag_t *f = &skb_shinfo(skb)->frags[i];
73 /* Should not happen with MTU less than 64k - 2 * PAGE_SIZE. */
74 if (seg == LGUEST_MAX_DMA_SECTIONS) {
75 printk("Woah dude! Megapacket!\n");
76 break;
77 }
78 dma->addr[seg] = page_to_phys(f->page) + f->page_offset;
79 dma->len[seg] = f->size;
80 }
81 if (seg < LGUEST_MAX_DMA_SECTIONS)
82 dma->len[seg] = 0;
83}
84
85/* We overload multicast bit to show promiscuous mode. */
86#define PROMISC_BIT 0x01
87
88static void lguestnet_set_multicast(struct net_device *dev)
89{
90 struct lguestnet_info *info = netdev_priv(dev);
91
92 if ((dev->flags & (IFF_PROMISC|IFF_ALLMULTI)) || dev->mc_count)
93 info->peer[info->me].mac[0] |= PROMISC_BIT;
94 else
95 info->peer[info->me].mac[0] &= ~PROMISC_BIT;
96}
97
98static int promisc(struct lguestnet_info *info, unsigned int peer)
99{
100 return info->peer[peer].mac[0] & PROMISC_BIT;
101}
102
103static int mac_eq(const unsigned char mac[ETH_ALEN],
104 struct lguestnet_info *info, unsigned int peer)
105{
106 /* Ignore multicast bit, which peer turns on to mean promisc. */
107 if ((info->peer[peer].mac[0] & (~PROMISC_BIT)) != mac[0])
108 return 0;
109 return memcmp(mac+1, info->peer[peer].mac+1, ETH_ALEN-1) == 0;
110}
111
112static void transfer_packet(struct net_device *dev,
113 struct sk_buff *skb,
114 unsigned int peernum)
115{
116 struct lguestnet_info *info = netdev_priv(dev);
117 struct lguest_dma dma;
118
119 skb_to_dma(skb, skb_headlen(skb), &dma);
120 pr_debug("xfer length %04x (%u)\n", htons(skb->len), skb->len);
121
122 lguest_send_dma(peer_key(info, peernum), &dma);
123 if (dma.used_len != skb->len) {
124 dev->stats.tx_carrier_errors++;
125 pr_debug("Bad xfer to peer %i: %i of %i (dma %p/%i)\n",
126 peernum, dma.used_len, skb->len,
127 (void *)dma.addr[0], dma.len[0]);
128 } else {
129 dev->stats.tx_bytes += skb->len;
130 dev->stats.tx_packets++;
131 }
132}
133
134static int unused_peer(const struct lguest_net peer[], unsigned int num)
135{
136 return peer[num].mac[0] == 0;
137}
138
139static int lguestnet_start_xmit(struct sk_buff *skb, struct net_device *dev)
140{
141 unsigned int i;
142 int broadcast;
143 struct lguestnet_info *info = netdev_priv(dev);
144 const unsigned char *dest = ((struct ethhdr *)skb->data)->h_dest;
145
146 pr_debug("%s: xmit %02x:%02x:%02x:%02x:%02x:%02x\n",
147 dev->name, dest[0],dest[1],dest[2],dest[3],dest[4],dest[5]);
148
149 broadcast = is_multicast_ether_addr(dest);
150 for (i = 0; i < info->mapsize/sizeof(struct lguest_net); i++) {
151 if (i == info->me || unused_peer(info->peer, i))
152 continue;
153
154 if (!broadcast && !promisc(info, i) && !mac_eq(dest, info, i))
155 continue;
156
157 pr_debug("lguestnet %s: sending from %i to %i\n",
158 dev->name, info->me, i);
159 transfer_packet(dev, skb, i);
160 }
161 dev_kfree_skb(skb);
162 return 0;
163}
164
165/* Find a new skb to put in this slot in shared mem. */
166static int fill_slot(struct net_device *dev, unsigned int slot)
167{
168 struct lguestnet_info *info = netdev_priv(dev);
169 /* Try to create and register a new one. */
170 info->skb[slot] = netdev_alloc_skb(dev, ETH_HLEN + ETH_DATA_LEN);
171 if (!info->skb[slot]) {
172 printk("%s: could not fill slot %i\n", dev->name, slot);
173 return -ENOMEM;
174 }
175
176 skb_to_dma(info->skb[slot], ETH_HLEN + ETH_DATA_LEN, &info->dma[slot]);
177 wmb();
178 /* Now we tell hypervisor it can use the slot. */
179 info->dma[slot].used_len = 0;
180 return 0;
181}
182
183static irqreturn_t lguestnet_rcv(int irq, void *dev_id)
184{
185 struct net_device *dev = dev_id;
186 struct lguestnet_info *info = netdev_priv(dev);
187 unsigned int i, done = 0;
188
189 for (i = 0; i < ARRAY_SIZE(info->dma); i++) {
190 unsigned int length;
191 struct sk_buff *skb;
192
193 length = info->dma[i].used_len;
194 if (length == 0)
195 continue;
196
197 done++;
198 skb = info->skb[i];
199 fill_slot(dev, i);
200
201 if (length < ETH_HLEN || length > ETH_HLEN + ETH_DATA_LEN) {
202 pr_debug(KERN_WARNING "%s: unbelievable skb len: %i\n",
203 dev->name, length);
204 dev_kfree_skb(skb);
205 continue;
206 }
207
208 skb_put(skb, length);
209 skb->protocol = eth_type_trans(skb, dev);
210 /* This is a reliable transport. */
211 if (dev->features & NETIF_F_NO_CSUM)
212 skb->ip_summed = CHECKSUM_UNNECESSARY;
213 pr_debug("Receiving skb proto 0x%04x len %i type %i\n",
214 ntohs(skb->protocol), skb->len, skb->pkt_type);
215
216 dev->stats.rx_bytes += skb->len;
217 dev->stats.rx_packets++;
218 netif_rx(skb);
219 }
220 return done ? IRQ_HANDLED : IRQ_NONE;
221}
222
223static int lguestnet_open(struct net_device *dev)
224{
225 int i;
226 struct lguestnet_info *info = netdev_priv(dev);
227
228 /* Set up our MAC address */
229 memcpy(info->peer[info->me].mac, dev->dev_addr, ETH_ALEN);
230
231 /* Turn on promisc mode if needed */
232 lguestnet_set_multicast(dev);
233
234 for (i = 0; i < ARRAY_SIZE(info->dma); i++) {
235 if (fill_slot(dev, i) != 0)
236 goto cleanup;
237 }
238 if (lguest_bind_dma(peer_key(info,info->me), info->dma,
239 NUM_SKBS, lgdev_irq(info->lgdev)) != 0)
240 goto cleanup;
241 return 0;
242
243cleanup:
244 while (--i >= 0)
245 dev_kfree_skb(info->skb[i]);
246 return -ENOMEM;
247}
248
249static int lguestnet_close(struct net_device *dev)
250{
251 unsigned int i;
252 struct lguestnet_info *info = netdev_priv(dev);
253
254 /* Clear all trace: others might deliver packets, we'll ignore it. */
255 memset(&info->peer[info->me], 0, sizeof(info->peer[info->me]));
256
257 /* Deregister sg lists. */
258 lguest_unbind_dma(peer_key(info, info->me), info->dma);
259 for (i = 0; i < ARRAY_SIZE(info->dma); i++)
260 dev_kfree_skb(info->skb[i]);
261 return 0;
262}
263
264static int lguestnet_probe(struct lguest_device *lgdev)
265{
266 int err, irqf = IRQF_SHARED;
267 struct net_device *dev;
268 struct lguestnet_info *info;
269 struct lguest_device_desc *desc = &lguest_devices[lgdev->index];
270
271 pr_debug("lguest_net: probing for device %i\n", lgdev->index);
272
273 dev = alloc_etherdev(sizeof(struct lguestnet_info));
274 if (!dev)
275 return -ENOMEM;
276
277 SET_MODULE_OWNER(dev);
278
279 /* Ethernet defaults with some changes */
280 ether_setup(dev);
281 dev->set_mac_address = NULL;
282
283 dev->dev_addr[0] = 0x02; /* set local assignment bit (IEEE802) */
284 dev->dev_addr[1] = 0x00;
285 memcpy(&dev->dev_addr[2], &lguest_data.guestid, 2);
286 dev->dev_addr[4] = 0x00;
287 dev->dev_addr[5] = 0x00;
288
289 dev->open = lguestnet_open;
290 dev->stop = lguestnet_close;
291 dev->hard_start_xmit = lguestnet_start_xmit;
292
293 /* Turning on/off promisc will call dev->set_multicast_list.
294 * We don't actually support multicast yet */
295 dev->set_multicast_list = lguestnet_set_multicast;
296 SET_NETDEV_DEV(dev, &lgdev->dev);
297 if (desc->features & LGUEST_NET_F_NOCSUM)
298 dev->features = NETIF_F_SG|NETIF_F_NO_CSUM;
299
300 info = netdev_priv(dev);
301 info->mapsize = PAGE_SIZE * desc->num_pages;
302 info->peer_phys = ((unsigned long)desc->pfn << PAGE_SHIFT);
303 info->lgdev = lgdev;
304 info->peer = lguest_map(info->peer_phys, desc->num_pages);
305 if (!info->peer) {
306 err = -ENOMEM;
307 goto free;
308 }
309
310 /* This stores our peerid (upper bits reserved for future). */
311 info->me = (desc->features & (info->mapsize-1));
312
313 err = register_netdev(dev);
314 if (err) {
315 pr_debug("lguestnet: registering device failed\n");
316 goto unmap;
317 }
318
319 if (lguest_devices[lgdev->index].features & LGUEST_DEVICE_F_RANDOMNESS)
320 irqf |= IRQF_SAMPLE_RANDOM;
321 if (request_irq(lgdev_irq(lgdev), lguestnet_rcv, irqf, "lguestnet",
322 dev) != 0) {
323 pr_debug("lguestnet: cannot get irq %i\n", lgdev_irq(lgdev));
324 goto unregister;
325 }
326
327 pr_debug("lguestnet: registered device %s\n", dev->name);
328 lgdev->private = dev;
329 return 0;
330
331unregister:
332 unregister_netdev(dev);
333unmap:
334 lguest_unmap(info->peer);
335free:
336 free_netdev(dev);
337 return err;
338}
339
340static struct lguest_driver lguestnet_drv = {
341 .name = "lguestnet",
342 .owner = THIS_MODULE,
343 .device_type = LGUEST_DEVICE_T_NET,
344 .probe = lguestnet_probe,
345};
346
347static __init int lguestnet_init(void)
348{
349 return register_lguest_driver(&lguestnet_drv);
350}
351module_init(lguestnet_init);
352
353MODULE_DESCRIPTION("Lguest network driver");
354MODULE_LICENSE("GPL");
diff --git a/drivers/net/pcmcia/com20020_cs.c b/drivers/net/pcmcia/com20020_cs.c
index 0d1c7a41c9..ea9414c4d9 100644
--- a/drivers/net/pcmcia/com20020_cs.c
+++ b/drivers/net/pcmcia/com20020_cs.c
@@ -147,7 +147,7 @@ static int com20020_probe(struct pcmcia_device *p_dev)
147 DEBUG(0, "com20020_attach()\n"); 147 DEBUG(0, "com20020_attach()\n");
148 148
149 /* Create new network device */ 149 /* Create new network device */
150 info = kmalloc(sizeof(struct com20020_dev_t), GFP_KERNEL); 150 info = kzalloc(sizeof(struct com20020_dev_t), GFP_KERNEL);
151 if (!info) 151 if (!info)
152 goto fail_alloc_info; 152 goto fail_alloc_info;
153 153
@@ -155,7 +155,6 @@ static int com20020_probe(struct pcmcia_device *p_dev)
155 if (!dev) 155 if (!dev)
156 goto fail_alloc_dev; 156 goto fail_alloc_dev;
157 157
158 memset(info, 0, sizeof(struct com20020_dev_t));
159 lp = dev->priv; 158 lp = dev->priv;
160 lp->timeout = timeout; 159 lp->timeout = timeout;
161 lp->backplane = backplane; 160 lp->backplane = backplane;
diff --git a/drivers/net/pcmcia/ibmtr_cs.c b/drivers/net/pcmcia/ibmtr_cs.c
index 4ecb8ca5a9..4eafa4f42c 100644
--- a/drivers/net/pcmcia/ibmtr_cs.c
+++ b/drivers/net/pcmcia/ibmtr_cs.c
@@ -146,9 +146,8 @@ static int __devinit ibmtr_attach(struct pcmcia_device *link)
146 DEBUG(0, "ibmtr_attach()\n"); 146 DEBUG(0, "ibmtr_attach()\n");
147 147
148 /* Create new token-ring device */ 148 /* Create new token-ring device */
149 info = kmalloc(sizeof(*info), GFP_KERNEL); 149 info = kzalloc(sizeof(*info), GFP_KERNEL);
150 if (!info) return -ENOMEM; 150 if (!info) return -ENOMEM;
151 memset(info,0,sizeof(*info));
152 dev = alloc_trdev(sizeof(struct tok_info)); 151 dev = alloc_trdev(sizeof(struct tok_info));
153 if (!dev) { 152 if (!dev) {
154 kfree(info); 153 kfree(info);
diff --git a/drivers/net/ppp_async.c b/drivers/net/ppp_async.c
index caabbc408c..27f5b904f4 100644
--- a/drivers/net/ppp_async.c
+++ b/drivers/net/ppp_async.c
@@ -159,12 +159,11 @@ ppp_asynctty_open(struct tty_struct *tty)
159 int err; 159 int err;
160 160
161 err = -ENOMEM; 161 err = -ENOMEM;
162 ap = kmalloc(sizeof(*ap), GFP_KERNEL); 162 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
163 if (ap == 0) 163 if (ap == 0)
164 goto out; 164 goto out;
165 165
166 /* initialize the asyncppp structure */ 166 /* initialize the asyncppp structure */
167 memset(ap, 0, sizeof(*ap));
168 ap->tty = tty; 167 ap->tty = tty;
169 ap->mru = PPP_MRU; 168 ap->mru = PPP_MRU;
170 spin_lock_init(&ap->xmit_lock); 169 spin_lock_init(&ap->xmit_lock);
diff --git a/drivers/net/ppp_deflate.c b/drivers/net/ppp_deflate.c
index 72c8d6628f..eb98b661ef 100644
--- a/drivers/net/ppp_deflate.c
+++ b/drivers/net/ppp_deflate.c
@@ -121,12 +121,11 @@ static void *z_comp_alloc(unsigned char *options, int opt_len)
121 if (w_size < DEFLATE_MIN_SIZE || w_size > DEFLATE_MAX_SIZE) 121 if (w_size < DEFLATE_MIN_SIZE || w_size > DEFLATE_MAX_SIZE)
122 return NULL; 122 return NULL;
123 123
124 state = kmalloc(sizeof(*state), 124 state = kzalloc(sizeof(*state),
125 GFP_KERNEL); 125 GFP_KERNEL);
126 if (state == NULL) 126 if (state == NULL)
127 return NULL; 127 return NULL;
128 128
129 memset (state, 0, sizeof (struct ppp_deflate_state));
130 state->strm.next_in = NULL; 129 state->strm.next_in = NULL;
131 state->w_size = w_size; 130 state->w_size = w_size;
132 state->strm.workspace = vmalloc(zlib_deflate_workspacesize()); 131 state->strm.workspace = vmalloc(zlib_deflate_workspacesize());
@@ -341,11 +340,10 @@ static void *z_decomp_alloc(unsigned char *options, int opt_len)
341 if (w_size < DEFLATE_MIN_SIZE || w_size > DEFLATE_MAX_SIZE) 340 if (w_size < DEFLATE_MIN_SIZE || w_size > DEFLATE_MAX_SIZE)
342 return NULL; 341 return NULL;
343 342
344 state = kmalloc(sizeof(*state), GFP_KERNEL); 343 state = kzalloc(sizeof(*state), GFP_KERNEL);
345 if (state == NULL) 344 if (state == NULL)
346 return NULL; 345 return NULL;
347 346
348 memset (state, 0, sizeof (struct ppp_deflate_state));
349 state->w_size = w_size; 347 state->w_size = w_size;
350 state->strm.next_out = NULL; 348 state->strm.next_out = NULL;
351 state->strm.workspace = kmalloc(zlib_inflate_workspacesize(), 349 state->strm.workspace = kmalloc(zlib_inflate_workspacesize(),
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index 3ef0092dc0..ef3325b692 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -2684,8 +2684,7 @@ static void __exit ppp_cleanup(void)
2684 if (atomic_read(&ppp_unit_count) || atomic_read(&channel_count)) 2684 if (atomic_read(&ppp_unit_count) || atomic_read(&channel_count))
2685 printk(KERN_ERR "PPP: removing module but units remain!\n"); 2685 printk(KERN_ERR "PPP: removing module but units remain!\n");
2686 cardmap_destroy(&all_ppp_units); 2686 cardmap_destroy(&all_ppp_units);
2687 if (unregister_chrdev(PPP_MAJOR, "ppp") != 0) 2687 unregister_chrdev(PPP_MAJOR, "ppp");
2688 printk(KERN_ERR "PPP: failed to unregister PPP device\n");
2689 device_destroy(ppp_class, MKDEV(PPP_MAJOR, 0)); 2688 device_destroy(ppp_class, MKDEV(PPP_MAJOR, 0));
2690 class_destroy(ppp_class); 2689 class_destroy(ppp_class);
2691} 2690}
diff --git a/drivers/net/ppp_mppe.c b/drivers/net/ppp_mppe.c
index d5bdd25746..f79cf87a2b 100644
--- a/drivers/net/ppp_mppe.c
+++ b/drivers/net/ppp_mppe.c
@@ -200,11 +200,10 @@ static void *mppe_alloc(unsigned char *options, int optlen)
200 || options[0] != CI_MPPE || options[1] != CILEN_MPPE) 200 || options[0] != CI_MPPE || options[1] != CILEN_MPPE)
201 goto out; 201 goto out;
202 202
203 state = kmalloc(sizeof(*state), GFP_KERNEL); 203 state = kzalloc(sizeof(*state), GFP_KERNEL);
204 if (state == NULL) 204 if (state == NULL)
205 goto out; 205 goto out;
206 206
207 memset(state, 0, sizeof(*state));
208 207
209 state->arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC); 208 state->arc4 = crypto_alloc_blkcipher("ecb(arc4)", 0, CRYPTO_ALG_ASYNC);
210 if (IS_ERR(state->arc4)) { 209 if (IS_ERR(state->arc4)) {
diff --git a/drivers/net/ppp_synctty.c b/drivers/net/ppp_synctty.c
index 5918fab383..ce64032a46 100644
--- a/drivers/net/ppp_synctty.c
+++ b/drivers/net/ppp_synctty.c
@@ -207,13 +207,12 @@ ppp_sync_open(struct tty_struct *tty)
207 struct syncppp *ap; 207 struct syncppp *ap;
208 int err; 208 int err;
209 209
210 ap = kmalloc(sizeof(*ap), GFP_KERNEL); 210 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
211 err = -ENOMEM; 211 err = -ENOMEM;
212 if (ap == 0) 212 if (ap == 0)
213 goto out; 213 goto out;
214 214
215 /* initialize the syncppp structure */ 215 /* initialize the syncppp structure */
216 memset(ap, 0, sizeof(*ap));
217 ap->tty = tty; 216 ap->tty = tty;
218 ap->mru = PPP_MRU; 217 ap->mru = PPP_MRU;
219 spin_lock_init(&ap->xmit_lock); 218 spin_lock_init(&ap->xmit_lock);
diff --git a/drivers/net/shaper.c b/drivers/net/shaper.c
index e886e8d7cf..4c3d98ff4c 100644
--- a/drivers/net/shaper.c
+++ b/drivers/net/shaper.c
@@ -600,10 +600,9 @@ static int __init shaper_init(void)
600 return -ENODEV; 600 return -ENODEV;
601 601
602 alloc_size = sizeof(*dev) * shapers; 602 alloc_size = sizeof(*dev) * shapers;
603 devs = kmalloc(alloc_size, GFP_KERNEL); 603 devs = kzalloc(alloc_size, GFP_KERNEL);
604 if (!devs) 604 if (!devs)
605 return -ENOMEM; 605 return -ENOMEM;
606 memset(devs, 0, alloc_size);
607 606
608 for (i = 0; i < shapers; i++) { 607 for (i = 0; i < shapers; i++) {
609 608
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 5ee14764fd..887b9a5cfe 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -64,8 +64,8 @@
64 64
65#define DRV_MODULE_NAME "tg3" 65#define DRV_MODULE_NAME "tg3"
66#define PFX DRV_MODULE_NAME ": " 66#define PFX DRV_MODULE_NAME ": "
67#define DRV_MODULE_VERSION "3.78" 67#define DRV_MODULE_VERSION "3.79"
68#define DRV_MODULE_RELDATE "July 11, 2007" 68#define DRV_MODULE_RELDATE "July 18, 2007"
69 69
70#define TG3_DEF_MAC_MODE 0 70#define TG3_DEF_MAC_MODE 0
71#define TG3_DEF_RX_MODE 0 71#define TG3_DEF_RX_MODE 0
@@ -4847,6 +4847,59 @@ static int tg3_poll_fw(struct tg3 *tp)
4847 return 0; 4847 return 0;
4848} 4848}
4849 4849
4850/* Save PCI command register before chip reset */
4851static void tg3_save_pci_state(struct tg3 *tp)
4852{
4853 u32 val;
4854
4855 pci_read_config_dword(tp->pdev, TG3PCI_COMMAND, &val);
4856 tp->pci_cmd = val;
4857}
4858
4859/* Restore PCI state after chip reset */
4860static void tg3_restore_pci_state(struct tg3 *tp)
4861{
4862 u32 val;
4863
4864 /* Re-enable indirect register accesses. */
4865 pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
4866 tp->misc_host_ctrl);
4867
4868 /* Set MAX PCI retry to zero. */
4869 val = (PCISTATE_ROM_ENABLE | PCISTATE_ROM_RETRY_ENABLE);
4870 if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0 &&
4871 (tp->tg3_flags & TG3_FLAG_PCIX_MODE))
4872 val |= PCISTATE_RETRY_SAME_DMA;
4873 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
4874
4875 pci_write_config_dword(tp->pdev, TG3PCI_COMMAND, tp->pci_cmd);
4876
4877 /* Make sure PCI-X relaxed ordering bit is clear. */
4878 pci_read_config_dword(tp->pdev, TG3PCI_X_CAPS, &val);
4879 val &= ~PCIX_CAPS_RELAXED_ORDERING;
4880 pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
4881
4882 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
4883 u32 val;
4884
4885 /* Chip reset on 5780 will reset MSI enable bit,
4886 * so need to restore it.
4887 */
4888 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
4889 u16 ctrl;
4890
4891 pci_read_config_word(tp->pdev,
4892 tp->msi_cap + PCI_MSI_FLAGS,
4893 &ctrl);
4894 pci_write_config_word(tp->pdev,
4895 tp->msi_cap + PCI_MSI_FLAGS,
4896 ctrl | PCI_MSI_FLAGS_ENABLE);
4897 val = tr32(MSGINT_MODE);
4898 tw32(MSGINT_MODE, val | MSGINT_MODE_ENABLE);
4899 }
4900 }
4901}
4902
4850static void tg3_stop_fw(struct tg3 *); 4903static void tg3_stop_fw(struct tg3 *);
4851 4904
4852/* tp->lock is held. */ 4905/* tp->lock is held. */
@@ -4863,6 +4916,12 @@ static int tg3_chip_reset(struct tg3 *tp)
4863 */ 4916 */
4864 tp->nvram_lock_cnt = 0; 4917 tp->nvram_lock_cnt = 0;
4865 4918
4919 /* GRC_MISC_CFG core clock reset will clear the memory
4920 * enable bit in PCI register 4 and the MSI enable bit
4921 * on some chips, so we save relevant registers here.
4922 */
4923 tg3_save_pci_state(tp);
4924
4866 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || 4925 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
4867 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 4926 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
4868 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 4927 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
@@ -4961,50 +5020,14 @@ static int tg3_chip_reset(struct tg3 *tp)
4961 pci_write_config_dword(tp->pdev, 0xd8, 0xf5000); 5020 pci_write_config_dword(tp->pdev, 0xd8, 0xf5000);
4962 } 5021 }
4963 5022
4964 /* Re-enable indirect register accesses. */ 5023 tg3_restore_pci_state(tp);
4965 pci_write_config_dword(tp->pdev, TG3PCI_MISC_HOST_CTRL,
4966 tp->misc_host_ctrl);
4967
4968 /* Set MAX PCI retry to zero. */
4969 val = (PCISTATE_ROM_ENABLE | PCISTATE_ROM_RETRY_ENABLE);
4970 if (tp->pci_chip_rev_id == CHIPREV_ID_5704_A0 &&
4971 (tp->tg3_flags & TG3_FLAG_PCIX_MODE))
4972 val |= PCISTATE_RETRY_SAME_DMA;
4973 pci_write_config_dword(tp->pdev, TG3PCI_PCISTATE, val);
4974
4975 pci_restore_state(tp->pdev);
4976 5024
4977 tp->tg3_flags &= ~TG3_FLAG_CHIP_RESETTING; 5025 tp->tg3_flags &= ~TG3_FLAG_CHIP_RESETTING;
4978 5026
4979 /* Make sure PCI-X relaxed ordering bit is clear. */ 5027 val = 0;
4980 pci_read_config_dword(tp->pdev, TG3PCI_X_CAPS, &val); 5028 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)
4981 val &= ~PCIX_CAPS_RELAXED_ORDERING;
4982 pci_write_config_dword(tp->pdev, TG3PCI_X_CAPS, val);
4983
4984 if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) {
4985 u32 val;
4986
4987 /* Chip reset on 5780 will reset MSI enable bit,
4988 * so need to restore it.
4989 */
4990 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
4991 u16 ctrl;
4992
4993 pci_read_config_word(tp->pdev,
4994 tp->msi_cap + PCI_MSI_FLAGS,
4995 &ctrl);
4996 pci_write_config_word(tp->pdev,
4997 tp->msi_cap + PCI_MSI_FLAGS,
4998 ctrl | PCI_MSI_FLAGS_ENABLE);
4999 val = tr32(MSGINT_MODE);
5000 tw32(MSGINT_MODE, val | MSGINT_MODE_ENABLE);
5001 }
5002
5003 val = tr32(MEMARB_MODE); 5029 val = tr32(MEMARB_MODE);
5004 tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE); 5030 tw32(MEMARB_MODE, val | MEMARB_MODE_ENABLE);
5005
5006 } else
5007 tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
5008 5031
5009 if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A3) { 5032 if (tp->pci_chip_rev_id == CHIPREV_ID_5750_A3) {
5010 tg3_stop_fw(tp); 5033 tg3_stop_fw(tp);
@@ -11978,7 +12001,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
11978 */ 12001 */
11979 if ((tr32(HOSTCC_MODE) & HOSTCC_MODE_ENABLE) || 12002 if ((tr32(HOSTCC_MODE) & HOSTCC_MODE_ENABLE) ||
11980 (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) { 12003 (tr32(WDMAC_MODE) & WDMAC_MODE_ENABLE)) {
11981 pci_save_state(tp->pdev);
11982 tw32(MEMARB_MODE, MEMARB_MODE_ENABLE); 12004 tw32(MEMARB_MODE, MEMARB_MODE_ENABLE);
11983 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1); 12005 tg3_halt(tp, RESET_KIND_SHUTDOWN, 1);
11984 } 12006 }
@@ -12007,12 +12029,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
12007 12029
12008 tg3_init_coal(tp); 12030 tg3_init_coal(tp);
12009 12031
12010 /* Now that we have fully setup the chip, save away a snapshot
12011 * of the PCI config space. We need to restore this after
12012 * GRC_MISC_CFG core clock resets and some resume events.
12013 */
12014 pci_save_state(tp->pdev);
12015
12016 pci_set_drvdata(pdev, dev); 12032 pci_set_drvdata(pdev, dev);
12017 12033
12018 err = register_netdev(dev); 12034 err = register_netdev(dev);
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index d84e75e736..5c21f49026 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -2345,6 +2345,7 @@ struct tg3 {
2345#define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */ 2345#define PHY_REV_BCM5411_X0 0x1 /* Found on Netgear GA302T */
2346 2346
2347 u32 led_ctrl; 2347 u32 led_ctrl;
2348 u32 pci_cmd;
2348 2349
2349 char board_part_number[24]; 2350 char board_part_number[24];
2350 char fw_ver[16]; 2351 char fw_ver[16];
diff --git a/drivers/net/wan/c101.c b/drivers/net/wan/c101.c
index 6b63b350cd..8ead774d14 100644
--- a/drivers/net/wan/c101.c
+++ b/drivers/net/wan/c101.c
@@ -315,12 +315,11 @@ static int __init c101_run(unsigned long irq, unsigned long winbase)
315 return -ENODEV; 315 return -ENODEV;
316 } 316 }
317 317
318 card = kmalloc(sizeof(card_t), GFP_KERNEL); 318 card = kzalloc(sizeof(card_t), GFP_KERNEL);
319 if (card == NULL) { 319 if (card == NULL) {
320 printk(KERN_ERR "c101: unable to allocate memory\n"); 320 printk(KERN_ERR "c101: unable to allocate memory\n");
321 return -ENOBUFS; 321 return -ENOBUFS;
322 } 322 }
323 memset(card, 0, sizeof(card_t));
324 323
325 card->dev = alloc_hdlcdev(card); 324 card->dev = alloc_hdlcdev(card);
326 if (!card->dev) { 325 if (!card->dev) {
diff --git a/drivers/net/wan/cosa.c b/drivers/net/wan/cosa.c
index 9ef49ce148..26058b4f8f 100644
--- a/drivers/net/wan/cosa.c
+++ b/drivers/net/wan/cosa.c
@@ -572,13 +572,11 @@ static int cosa_probe(int base, int irq, int dma)
572 sprintf(cosa->name, "cosa%d", cosa->num); 572 sprintf(cosa->name, "cosa%d", cosa->num);
573 573
574 /* Initialize the per-channel data */ 574 /* Initialize the per-channel data */
575 cosa->chan = kmalloc(sizeof(struct channel_data)*cosa->nchannels, 575 cosa->chan = kcalloc(cosa->nchannels, sizeof(struct channel_data), GFP_KERNEL);
576 GFP_KERNEL);
577 if (!cosa->chan) { 576 if (!cosa->chan) {
578 err = -ENOMEM; 577 err = -ENOMEM;
579 goto err_out3; 578 goto err_out3;
580 } 579 }
581 memset(cosa->chan, 0, sizeof(struct channel_data)*cosa->nchannels);
582 for (i=0; i<cosa->nchannels; i++) { 580 for (i=0; i<cosa->nchannels; i++) {
583 cosa->chan[i].cosa = cosa; 581 cosa->chan[i].cosa = cosa;
584 cosa->chan[i].num = i; 582 cosa->chan[i].num = i;
diff --git a/drivers/net/wan/cycx_main.c b/drivers/net/wan/cycx_main.c
index 6e5f1c8985..a0e8611ad8 100644
--- a/drivers/net/wan/cycx_main.c
+++ b/drivers/net/wan/cycx_main.c
@@ -113,12 +113,10 @@ static int __init cycx_init(void)
113 /* Verify number of cards and allocate adapter data space */ 113 /* Verify number of cards and allocate adapter data space */
114 cycx_ncards = min_t(int, cycx_ncards, CYCX_MAX_CARDS); 114 cycx_ncards = min_t(int, cycx_ncards, CYCX_MAX_CARDS);
115 cycx_ncards = max_t(int, cycx_ncards, 1); 115 cycx_ncards = max_t(int, cycx_ncards, 1);
116 cycx_card_array = kmalloc(sizeof(struct cycx_device) * cycx_ncards, 116 cycx_card_array = kcalloc(cycx_ncards, sizeof(struct cycx_device), GFP_KERNEL);
117 GFP_KERNEL);
118 if (!cycx_card_array) 117 if (!cycx_card_array)
119 goto out; 118 goto out;
120 119
121 memset(cycx_card_array, 0, sizeof(struct cycx_device) * cycx_ncards);
122 120
123 /* Register adapters with WAN router */ 121 /* Register adapters with WAN router */
124 for (cnt = 0; cnt < cycx_ncards; ++cnt) { 122 for (cnt = 0; cnt < cycx_ncards; ++cnt) {
diff --git a/drivers/net/wan/cycx_x25.c b/drivers/net/wan/cycx_x25.c
index 016b3ff3ea..a8af28b273 100644
--- a/drivers/net/wan/cycx_x25.c
+++ b/drivers/net/wan/cycx_x25.c
@@ -376,11 +376,10 @@ static int cycx_wan_new_if(struct wan_device *wandev, struct net_device *dev,
376 } 376 }
377 377
378 /* allocate and initialize private data */ 378 /* allocate and initialize private data */
379 chan = kmalloc(sizeof(struct cycx_x25_channel), GFP_KERNEL); 379 chan = kzalloc(sizeof(struct cycx_x25_channel), GFP_KERNEL);
380 if (!chan) 380 if (!chan)
381 return -ENOMEM; 381 return -ENOMEM;
382 382
383 memset(chan, 0, sizeof(*chan));
384 strcpy(chan->name, conf->name); 383 strcpy(chan->name, conf->name);
385 chan->card = card; 384 chan->card = card;
386 chan->link = conf->port; 385 chan->link = conf->port;
diff --git a/drivers/net/wan/dscc4.c b/drivers/net/wan/dscc4.c
index dca0244714..50d2f9108d 100644
--- a/drivers/net/wan/dscc4.c
+++ b/drivers/net/wan/dscc4.c
@@ -890,12 +890,11 @@ static int dscc4_found1(struct pci_dev *pdev, void __iomem *ioaddr)
890 struct dscc4_dev_priv *root; 890 struct dscc4_dev_priv *root;
891 int i, ret = -ENOMEM; 891 int i, ret = -ENOMEM;
892 892
893 root = kmalloc(dev_per_card*sizeof(*root), GFP_KERNEL); 893 root = kcalloc(dev_per_card, sizeof(*root), GFP_KERNEL);
894 if (!root) { 894 if (!root) {
895 printk(KERN_ERR "%s: can't allocate data\n", DRV_NAME); 895 printk(KERN_ERR "%s: can't allocate data\n", DRV_NAME);
896 goto err_out; 896 goto err_out;
897 } 897 }
898 memset(root, 0, dev_per_card*sizeof(*root));
899 898
900 for (i = 0; i < dev_per_card; i++) { 899 for (i = 0; i < dev_per_card; i++) {
901 root[i].dev = alloc_hdlcdev(root + i); 900 root[i].dev = alloc_hdlcdev(root + i);
@@ -903,12 +902,11 @@ static int dscc4_found1(struct pci_dev *pdev, void __iomem *ioaddr)
903 goto err_free_dev; 902 goto err_free_dev;
904 } 903 }
905 904
906 ppriv = kmalloc(sizeof(*ppriv), GFP_KERNEL); 905 ppriv = kzalloc(sizeof(*ppriv), GFP_KERNEL);
907 if (!ppriv) { 906 if (!ppriv) {
908 printk(KERN_ERR "%s: can't allocate private data\n", DRV_NAME); 907 printk(KERN_ERR "%s: can't allocate private data\n", DRV_NAME);
909 goto err_free_dev; 908 goto err_free_dev;
910 } 909 }
911 memset(ppriv, 0, sizeof(struct dscc4_pci_priv));
912 910
913 ppriv->root = root; 911 ppriv->root = root;
914 spin_lock_init(&ppriv->lock); 912 spin_lock_init(&ppriv->lock);
diff --git a/drivers/net/wan/farsync.c b/drivers/net/wan/farsync.c
index 58a53b6d9b..12dae8e248 100644
--- a/drivers/net/wan/farsync.c
+++ b/drivers/net/wan/farsync.c
@@ -2476,13 +2476,12 @@ fst_add_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2476 } 2476 }
2477 2477
2478 /* Allocate driver private data */ 2478 /* Allocate driver private data */
2479 card = kmalloc(sizeof (struct fst_card_info), GFP_KERNEL); 2479 card = kzalloc(sizeof (struct fst_card_info), GFP_KERNEL);
2480 if (card == NULL) { 2480 if (card == NULL) {
2481 printk_err("FarSync card found but insufficient memory for" 2481 printk_err("FarSync card found but insufficient memory for"
2482 " driver storage\n"); 2482 " driver storage\n");
2483 return -ENOMEM; 2483 return -ENOMEM;
2484 } 2484 }
2485 memset(card, 0, sizeof (struct fst_card_info));
2486 2485
2487 /* Try to enable the device */ 2486 /* Try to enable the device */
2488 if ((err = pci_enable_device(pdev)) != 0) { 2487 if ((err = pci_enable_device(pdev)) != 0) {
diff --git a/drivers/net/wan/hostess_sv11.c b/drivers/net/wan/hostess_sv11.c
index 9ba3e4ee6e..bf5f8d9b5c 100644
--- a/drivers/net/wan/hostess_sv11.c
+++ b/drivers/net/wan/hostess_sv11.c
@@ -231,11 +231,10 @@ static struct sv11_device *sv11_init(int iobase, int irq)
231 return NULL; 231 return NULL;
232 } 232 }
233 233
234 sv = kmalloc(sizeof(struct sv11_device), GFP_KERNEL); 234 sv = kzalloc(sizeof(struct sv11_device), GFP_KERNEL);
235 if(!sv) 235 if(!sv)
236 goto fail3; 236 goto fail3;
237 237
238 memset(sv, 0, sizeof(*sv));
239 sv->if_ptr=&sv->netdev; 238 sv->if_ptr=&sv->netdev;
240 239
241 sv->netdev.dev = alloc_netdev(0, "hdlc%d", sv11_setup); 240 sv->netdev.dev = alloc_netdev(0, "hdlc%d", sv11_setup);
diff --git a/drivers/net/wan/n2.c b/drivers/net/wan/n2.c
index 5c322dfb79..cbdf0b748b 100644
--- a/drivers/net/wan/n2.c
+++ b/drivers/net/wan/n2.c
@@ -351,12 +351,11 @@ static int __init n2_run(unsigned long io, unsigned long irq,
351 return -ENODEV; 351 return -ENODEV;
352 } 352 }
353 353
354 card = kmalloc(sizeof(card_t), GFP_KERNEL); 354 card = kzalloc(sizeof(card_t), GFP_KERNEL);
355 if (card == NULL) { 355 if (card == NULL) {
356 printk(KERN_ERR "n2: unable to allocate memory\n"); 356 printk(KERN_ERR "n2: unable to allocate memory\n");
357 return -ENOBUFS; 357 return -ENOBUFS;
358 } 358 }
359 memset(card, 0, sizeof(card_t));
360 359
361 card->ports[0].dev = alloc_hdlcdev(&card->ports[0]); 360 card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
362 card->ports[1].dev = alloc_hdlcdev(&card->ports[1]); 361 card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
diff --git a/drivers/net/wan/pc300_drv.c b/drivers/net/wan/pc300_drv.c
index 5d8c78ee2c..99fee2f1d0 100644
--- a/drivers/net/wan/pc300_drv.c
+++ b/drivers/net/wan/pc300_drv.c
@@ -3456,7 +3456,7 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3456 if ((err = pci_enable_device(pdev)) < 0) 3456 if ((err = pci_enable_device(pdev)) < 0)
3457 return err; 3457 return err;
3458 3458
3459 card = kmalloc(sizeof(pc300_t), GFP_KERNEL); 3459 card = kzalloc(sizeof(pc300_t), GFP_KERNEL);
3460 if (card == NULL) { 3460 if (card == NULL) {
3461 printk("PC300 found at RAM 0x%016llx, " 3461 printk("PC300 found at RAM 0x%016llx, "
3462 "but could not allocate card structure.\n", 3462 "but could not allocate card structure.\n",
@@ -3464,7 +3464,6 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
3464 err = -ENOMEM; 3464 err = -ENOMEM;
3465 goto err_disable_dev; 3465 goto err_disable_dev;
3466 } 3466 }
3467 memset(card, 0, sizeof(pc300_t));
3468 3467
3469 err = -ENODEV; 3468 err = -ENODEV;
3470 3469
diff --git a/drivers/net/wan/pc300too.c b/drivers/net/wan/pc300too.c
index dfbd3b00f0..6353cb5c65 100644
--- a/drivers/net/wan/pc300too.c
+++ b/drivers/net/wan/pc300too.c
@@ -334,14 +334,13 @@ static int __devinit pc300_pci_init_one(struct pci_dev *pdev,
334 return i; 334 return i;
335 } 335 }
336 336
337 card = kmalloc(sizeof(card_t), GFP_KERNEL); 337 card = kzalloc(sizeof(card_t), GFP_KERNEL);
338 if (card == NULL) { 338 if (card == NULL) {
339 printk(KERN_ERR "pc300: unable to allocate memory\n"); 339 printk(KERN_ERR "pc300: unable to allocate memory\n");
340 pci_release_regions(pdev); 340 pci_release_regions(pdev);
341 pci_disable_device(pdev); 341 pci_disable_device(pdev);
342 return -ENOBUFS; 342 return -ENOBUFS;
343 } 343 }
344 memset(card, 0, sizeof(card_t));
345 pci_set_drvdata(pdev, card); 344 pci_set_drvdata(pdev, card);
346 345
347 if (pdev->device == PCI_DEVICE_ID_PC300_TE_1 || 346 if (pdev->device == PCI_DEVICE_ID_PC300_TE_1 ||
diff --git a/drivers/net/wan/pci200syn.c b/drivers/net/wan/pci200syn.c
index 7f720de2e9..092e51d890 100644
--- a/drivers/net/wan/pci200syn.c
+++ b/drivers/net/wan/pci200syn.c
@@ -312,14 +312,13 @@ static int __devinit pci200_pci_init_one(struct pci_dev *pdev,
312 return i; 312 return i;
313 } 313 }
314 314
315 card = kmalloc(sizeof(card_t), GFP_KERNEL); 315 card = kzalloc(sizeof(card_t), GFP_KERNEL);
316 if (card == NULL) { 316 if (card == NULL) {
317 printk(KERN_ERR "pci200syn: unable to allocate memory\n"); 317 printk(KERN_ERR "pci200syn: unable to allocate memory\n");
318 pci_release_regions(pdev); 318 pci_release_regions(pdev);
319 pci_disable_device(pdev); 319 pci_disable_device(pdev);
320 return -ENOBUFS; 320 return -ENOBUFS;
321 } 321 }
322 memset(card, 0, sizeof(card_t));
323 pci_set_drvdata(pdev, card); 322 pci_set_drvdata(pdev, card);
324 card->ports[0].dev = alloc_hdlcdev(&card->ports[0]); 323 card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
325 card->ports[1].dev = alloc_hdlcdev(&card->ports[1]); 324 card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
diff --git a/drivers/net/wan/sdla.c b/drivers/net/wan/sdla.c
index 6a485f0556..792e588d7d 100644
--- a/drivers/net/wan/sdla.c
+++ b/drivers/net/wan/sdla.c
@@ -1196,10 +1196,9 @@ static int sdla_xfer(struct net_device *dev, struct sdla_mem __user *info, int r
1196 1196
1197 if (read) 1197 if (read)
1198 { 1198 {
1199 temp = kmalloc(mem.len, GFP_KERNEL); 1199 temp = kzalloc(mem.len, GFP_KERNEL);
1200 if (!temp) 1200 if (!temp)
1201 return(-ENOMEM); 1201 return(-ENOMEM);
1202 memset(temp, 0, mem.len);
1203 sdla_read(dev, mem.addr, temp, mem.len); 1202 sdla_read(dev, mem.addr, temp, mem.len);
1204 if(copy_to_user(mem.data, temp, mem.len)) 1203 if(copy_to_user(mem.data, temp, mem.len))
1205 { 1204 {
diff --git a/drivers/net/wan/sealevel.c b/drivers/net/wan/sealevel.c
index 131358108c..11276bf314 100644
--- a/drivers/net/wan/sealevel.c
+++ b/drivers/net/wan/sealevel.c
@@ -270,11 +270,10 @@ static __init struct slvl_board *slvl_init(int iobase, int irq,
270 return NULL; 270 return NULL;
271 } 271 }
272 272
273 b = kmalloc(sizeof(struct slvl_board), GFP_KERNEL); 273 b = kzalloc(sizeof(struct slvl_board), GFP_KERNEL);
274 if(!b) 274 if(!b)
275 goto fail3; 275 goto fail3;
276 276
277 memset(b, 0, sizeof(*b));
278 if (!(b->dev[0]= slvl_alloc(iobase, irq))) 277 if (!(b->dev[0]= slvl_alloc(iobase, irq)))
279 goto fail2; 278 goto fail2;
280 279
diff --git a/drivers/net/wan/wanxl.c b/drivers/net/wan/wanxl.c
index c736015743..3c78f98563 100644
--- a/drivers/net/wan/wanxl.c
+++ b/drivers/net/wan/wanxl.c
@@ -599,7 +599,7 @@ static int __devinit wanxl_pci_init_one(struct pci_dev *pdev,
599 } 599 }
600 600
601 alloc_size = sizeof(card_t) + ports * sizeof(port_t); 601 alloc_size = sizeof(card_t) + ports * sizeof(port_t);
602 card = kmalloc(alloc_size, GFP_KERNEL); 602 card = kzalloc(alloc_size, GFP_KERNEL);
603 if (card == NULL) { 603 if (card == NULL) {
604 printk(KERN_ERR "wanXL %s: unable to allocate memory\n", 604 printk(KERN_ERR "wanXL %s: unable to allocate memory\n",
605 pci_name(pdev)); 605 pci_name(pdev));
@@ -607,7 +607,6 @@ static int __devinit wanxl_pci_init_one(struct pci_dev *pdev,
607 pci_disable_device(pdev); 607 pci_disable_device(pdev);
608 return -ENOBUFS; 608 return -ENOBUFS;
609 } 609 }
610 memset(card, 0, alloc_size);
611 610
612 pci_set_drvdata(pdev, card); 611 pci_set_drvdata(pdev, card);
613 card->pdev = pdev; 612 card->pdev = pdev;
diff --git a/drivers/net/wan/x25_asy.c b/drivers/net/wan/x25_asy.c
index 1c9edd97ac..c48b1cc63f 100644
--- a/drivers/net/wan/x25_asy.c
+++ b/drivers/net/wan/x25_asy.c
@@ -786,14 +786,12 @@ static int __init init_x25_asy(void)
786 printk(KERN_INFO "X.25 async: version 0.00 ALPHA " 786 printk(KERN_INFO "X.25 async: version 0.00 ALPHA "
787 "(dynamic channels, max=%d).\n", x25_asy_maxdev ); 787 "(dynamic channels, max=%d).\n", x25_asy_maxdev );
788 788
789 x25_asy_devs = kmalloc(sizeof(struct net_device *)*x25_asy_maxdev, 789 x25_asy_devs = kcalloc(x25_asy_maxdev, sizeof(struct net_device*), GFP_KERNEL);
790 GFP_KERNEL);
791 if (!x25_asy_devs) { 790 if (!x25_asy_devs) {
792 printk(KERN_WARNING "X25 async: Can't allocate x25_asy_ctrls[] " 791 printk(KERN_WARNING "X25 async: Can't allocate x25_asy_ctrls[] "
793 "array! Uaargh! (-> No X.25 available)\n"); 792 "array! Uaargh! (-> No X.25 available)\n");
794 return -ENOMEM; 793 return -ENOMEM;
795 } 794 }
796 memset(x25_asy_devs, 0, sizeof(struct net_device *)*x25_asy_maxdev);
797 795
798 return tty_register_ldisc(N_X25, &x25_ldisc); 796 return tty_register_ldisc(N_X25, &x25_ldisc);
799} 797}
diff --git a/drivers/nubus/nubus.c b/drivers/nubus/nubus.c
index 3a0a3a7349..e503c9c980 100644
--- a/drivers/nubus/nubus.c
+++ b/drivers/nubus/nubus.c
@@ -466,9 +466,8 @@ static struct nubus_dev* __init
466 parent->base, dir.base); 466 parent->base, dir.base);
467 467
468 /* Actually we should probably panic if this fails */ 468 /* Actually we should probably panic if this fails */
469 if ((dev = kmalloc(sizeof(*dev), GFP_ATOMIC)) == NULL) 469 if ((dev = kzalloc(sizeof(*dev), GFP_ATOMIC)) == NULL)
470 return NULL; 470 return NULL;
471 memset(dev, 0, sizeof(*dev));
472 dev->resid = parent->type; 471 dev->resid = parent->type;
473 dev->directory = dir.base; 472 dev->directory = dir.base;
474 dev->board = board; 473 dev->board = board;
@@ -800,9 +799,8 @@ static struct nubus_board* __init nubus_add_board(int slot, int bytelanes)
800 nubus_rewind(&rp, FORMAT_BLOCK_SIZE, bytelanes); 799 nubus_rewind(&rp, FORMAT_BLOCK_SIZE, bytelanes);
801 800
802 /* Actually we should probably panic if this fails */ 801 /* Actually we should probably panic if this fails */
803 if ((board = kmalloc(sizeof(*board), GFP_ATOMIC)) == NULL) 802 if ((board = kzalloc(sizeof(*board), GFP_ATOMIC)) == NULL)
804 return NULL; 803 return NULL;
805 memset(board, 0, sizeof(*board));
806 board->fblock = rp; 804 board->fblock = rp;
807 805
808 /* Dump the format block for debugging purposes */ 806 /* Dump the format block for debugging purposes */
diff --git a/drivers/parport/parport_cs.c b/drivers/parport/parport_cs.c
index 8b7d84eca0..802a81d473 100644
--- a/drivers/parport/parport_cs.c
+++ b/drivers/parport/parport_cs.c
@@ -105,9 +105,8 @@ static int parport_probe(struct pcmcia_device *link)
105 DEBUG(0, "parport_attach()\n"); 105 DEBUG(0, "parport_attach()\n");
106 106
107 /* Create new parport device */ 107 /* Create new parport device */
108 info = kmalloc(sizeof(*info), GFP_KERNEL); 108 info = kzalloc(sizeof(*info), GFP_KERNEL);
109 if (!info) return -ENOMEM; 109 if (!info) return -ENOMEM;
110 memset(info, 0, sizeof(*info));
111 link->priv = info; 110 link->priv = info;
112 info->p_dev = link; 111 info->p_dev = link;
113 112
diff --git a/drivers/parport/parport_serial.c b/drivers/parport/parport_serial.c
index 90ea3b8b99..bd6ad8b381 100644
--- a/drivers/parport/parport_serial.c
+++ b/drivers/parport/parport_serial.c
@@ -324,10 +324,9 @@ static int __devinit parport_serial_pci_probe (struct pci_dev *dev,
324 struct parport_serial_private *priv; 324 struct parport_serial_private *priv;
325 int err; 325 int err;
326 326
327 priv = kmalloc (sizeof *priv, GFP_KERNEL); 327 priv = kzalloc (sizeof *priv, GFP_KERNEL);
328 if (!priv) 328 if (!priv)
329 return -ENOMEM; 329 return -ENOMEM;
330 memset(priv, 0, sizeof(struct parport_serial_private));
331 pci_set_drvdata (dev, priv); 330 pci_set_drvdata (dev, priv);
332 331
333 err = pci_enable_device (dev); 332 err = pci_enable_device (dev);
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 6846fb42b3..ad90a01b0d 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -148,11 +148,10 @@ static struct aer_rpc* aer_alloc_rpc(struct pcie_device *dev)
148{ 148{
149 struct aer_rpc *rpc; 149 struct aer_rpc *rpc;
150 150
151 if (!(rpc = kmalloc(sizeof(struct aer_rpc), 151 if (!(rpc = kzalloc(sizeof(struct aer_rpc),
152 GFP_KERNEL))) 152 GFP_KERNEL)))
153 return NULL; 153 return NULL;
154 154
155 memset(rpc, 0, sizeof(struct aer_rpc));
156 /* 155 /*
157 * Initialize Root lock access, e_lock, to Root Error Status Reg, 156 * Initialize Root lock access, e_lock, to Root Error Status Reg,
158 * Root Error ID Reg, and Root error producer/consumer index. 157 * Root Error ID Reg, and Root error producer/consumer index.
diff --git a/drivers/pnp/core.c b/drivers/pnp/core.c
index 3e20b1cc77..8e7b2dd388 100644
--- a/drivers/pnp/core.c
+++ b/drivers/pnp/core.c
@@ -35,12 +35,11 @@ void *pnp_alloc(long size)
35{ 35{
36 void *result; 36 void *result;
37 37
38 result = kmalloc(size, GFP_KERNEL); 38 result = kzalloc(size, GFP_KERNEL);
39 if (!result){ 39 if (!result){
40 printk(KERN_ERR "pnp: Out of Memory\n"); 40 printk(KERN_ERR "pnp: Out of Memory\n");
41 return NULL; 41 return NULL;
42 } 42 }
43 memset(result, 0, size);
44 return result; 43 return result;
45} 44}
46 45
diff --git a/drivers/rapidio/rio-scan.c b/drivers/rapidio/rio-scan.c
index f935c1f71a..44420723a3 100644
--- a/drivers/rapidio/rio-scan.c
+++ b/drivers/rapidio/rio-scan.c
@@ -297,11 +297,10 @@ static struct rio_dev *rio_setup_device(struct rio_net *net,
297 struct rio_switch *rswitch; 297 struct rio_switch *rswitch;
298 int result, rdid; 298 int result, rdid;
299 299
300 rdev = kmalloc(sizeof(struct rio_dev), GFP_KERNEL); 300 rdev = kzalloc(sizeof(struct rio_dev), GFP_KERNEL);
301 if (!rdev) 301 if (!rdev)
302 goto out; 302 goto out;
303 303
304 memset(rdev, 0, sizeof(struct rio_dev));
305 rdev->net = net; 304 rdev->net = net;
306 rio_mport_read_config_32(port, destid, hopcount, RIO_DEV_ID_CAR, 305 rio_mport_read_config_32(port, destid, hopcount, RIO_DEV_ID_CAR,
307 &result); 306 &result);
@@ -801,9 +800,8 @@ static struct rio_net __devinit *rio_alloc_net(struct rio_mport *port)
801{ 800{
802 struct rio_net *net; 801 struct rio_net *net;
803 802
804 net = kmalloc(sizeof(struct rio_net), GFP_KERNEL); 803 net = kzalloc(sizeof(struct rio_net), GFP_KERNEL);
805 if (net) { 804 if (net) {
806 memset(net, 0, sizeof(struct rio_net));
807 INIT_LIST_HEAD(&net->node); 805 INIT_LIST_HEAD(&net->node);
808 INIT_LIST_HEAD(&net->devices); 806 INIT_LIST_HEAD(&net->devices);
809 INIT_LIST_HEAD(&net->mports); 807 INIT_LIST_HEAD(&net->mports);
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index e24ea82dc3..5d760bb6c2 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -235,7 +235,7 @@ static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
235 return 0; 235 return 0;
236} 236}
237 237
238static int cmos_set_freq(struct device *dev, int freq) 238static int cmos_irq_set_freq(struct device *dev, int freq)
239{ 239{
240 struct cmos_rtc *cmos = dev_get_drvdata(dev); 240 struct cmos_rtc *cmos = dev_get_drvdata(dev);
241 int f; 241 int f;
@@ -259,6 +259,34 @@ static int cmos_set_freq(struct device *dev, int freq)
259 return 0; 259 return 0;
260} 260}
261 261
262static int cmos_irq_set_state(struct device *dev, int enabled)
263{
264 struct cmos_rtc *cmos = dev_get_drvdata(dev);
265 unsigned char rtc_control, rtc_intr;
266 unsigned long flags;
267
268 if (!is_valid_irq(cmos->irq))
269 return -ENXIO;
270
271 spin_lock_irqsave(&rtc_lock, flags);
272 rtc_control = CMOS_READ(RTC_CONTROL);
273
274 if (enabled)
275 rtc_control |= RTC_PIE;
276 else
277 rtc_control &= ~RTC_PIE;
278
279 CMOS_WRITE(rtc_control, RTC_CONTROL);
280
281 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
282 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
283 if (is_intr(rtc_intr))
284 rtc_update_irq(cmos->rtc, 1, rtc_intr);
285
286 spin_unlock_irqrestore(&rtc_lock, flags);
287 return 0;
288}
289
262#if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) 290#if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
263 291
264static int 292static int
@@ -360,7 +388,8 @@ static const struct rtc_class_ops cmos_rtc_ops = {
360 .read_alarm = cmos_read_alarm, 388 .read_alarm = cmos_read_alarm,
361 .set_alarm = cmos_set_alarm, 389 .set_alarm = cmos_set_alarm,
362 .proc = cmos_procfs, 390 .proc = cmos_procfs,
363 .irq_set_freq = cmos_set_freq, 391 .irq_set_freq = cmos_irq_set_freq,
392 .irq_set_state = cmos_irq_set_state,
364}; 393};
365 394
366/*----------------------------------------------------------------*/ 395/*----------------------------------------------------------------*/
diff --git a/drivers/s390/char/tape_34xx.c b/drivers/s390/char/tape_34xx.c
index e765875e8d..80e7a537e7 100644
--- a/drivers/s390/char/tape_34xx.c
+++ b/drivers/s390/char/tape_34xx.c
@@ -131,10 +131,9 @@ tape_34xx_schedule_work(struct tape_device *device, enum tape_op op)
131{ 131{
132 struct tape_34xx_work *p; 132 struct tape_34xx_work *p;
133 133
134 if ((p = kmalloc(sizeof(*p), GFP_ATOMIC)) == NULL) 134 if ((p = kzalloc(sizeof(*p), GFP_ATOMIC)) == NULL)
135 return -ENOMEM; 135 return -ENOMEM;
136 136
137 memset(p, 0, sizeof(*p));
138 INIT_WORK(&p->work, tape_34xx_work_handler); 137 INIT_WORK(&p->work, tape_34xx_work_handler);
139 138
140 p->device = tape_get_device_reference(device); 139 p->device = tape_get_device_reference(device);
diff --git a/drivers/s390/net/claw.c b/drivers/s390/net/claw.c
index 348bb7b827..023455a0b3 100644
--- a/drivers/s390/net/claw.c
+++ b/drivers/s390/net/claw.c
@@ -317,8 +317,8 @@ claw_probe(struct ccwgroup_device *cgdev)
317 CLAW_DBF_TEXT_(2,setup,"probex%d",-ENOMEM); 317 CLAW_DBF_TEXT_(2,setup,"probex%d",-ENOMEM);
318 return -ENOMEM; 318 return -ENOMEM;
319 } 319 }
320 privptr->p_mtc_envelope= kmalloc( MAX_ENVELOPE_SIZE, GFP_KERNEL); 320 privptr->p_mtc_envelope= kzalloc( MAX_ENVELOPE_SIZE, GFP_KERNEL);
321 privptr->p_env = kmalloc(sizeof(struct claw_env), GFP_KERNEL); 321 privptr->p_env = kzalloc(sizeof(struct claw_env), GFP_KERNEL);
322 if ((privptr->p_mtc_envelope==NULL) || (privptr->p_env==NULL)) { 322 if ((privptr->p_mtc_envelope==NULL) || (privptr->p_env==NULL)) {
323 probe_error(cgdev); 323 probe_error(cgdev);
324 put_device(&cgdev->dev); 324 put_device(&cgdev->dev);
@@ -327,8 +327,6 @@ claw_probe(struct ccwgroup_device *cgdev)
327 CLAW_DBF_TEXT_(2,setup,"probex%d",-ENOMEM); 327 CLAW_DBF_TEXT_(2,setup,"probex%d",-ENOMEM);
328 return -ENOMEM; 328 return -ENOMEM;
329 } 329 }
330 memset(privptr->p_mtc_envelope, 0x00, MAX_ENVELOPE_SIZE);
331 memset(privptr->p_env, 0x00, sizeof(struct claw_env));
332 memcpy(privptr->p_env->adapter_name,WS_NAME_NOT_DEF,8); 330 memcpy(privptr->p_env->adapter_name,WS_NAME_NOT_DEF,8);
333 memcpy(privptr->p_env->host_name,WS_NAME_NOT_DEF,8); 331 memcpy(privptr->p_env->host_name,WS_NAME_NOT_DEF,8);
334 memcpy(privptr->p_env->api_type,WS_NAME_NOT_DEF,8); 332 memcpy(privptr->p_env->api_type,WS_NAME_NOT_DEF,8);
@@ -3924,7 +3922,7 @@ add_channel(struct ccw_device *cdev,int i,struct claw_privbk *privptr)
3924 snprintf(p_ch->id, CLAW_ID_SIZE, "cl-%s", cdev->dev.bus_id); 3922 snprintf(p_ch->id, CLAW_ID_SIZE, "cl-%s", cdev->dev.bus_id);
3925 ccw_device_get_id(cdev, &dev_id); 3923 ccw_device_get_id(cdev, &dev_id);
3926 p_ch->devno = dev_id.devno; 3924 p_ch->devno = dev_id.devno;
3927 if ((p_ch->irb = kmalloc(sizeof (struct irb),GFP_KERNEL)) == NULL) { 3925 if ((p_ch->irb = kzalloc(sizeof (struct irb),GFP_KERNEL)) == NULL) {
3928 printk(KERN_WARNING "%s Out of memory in %s for irb\n", 3926 printk(KERN_WARNING "%s Out of memory in %s for irb\n",
3929 p_ch->id,__FUNCTION__); 3927 p_ch->id,__FUNCTION__);
3930#ifdef FUNCTRACE 3928#ifdef FUNCTRACE
@@ -3933,7 +3931,6 @@ add_channel(struct ccw_device *cdev,int i,struct claw_privbk *privptr)
3933#endif 3931#endif
3934 return -ENOMEM; 3932 return -ENOMEM;
3935 } 3933 }
3936 memset(p_ch->irb, 0, sizeof (struct irb));
3937#ifdef FUNCTRACE 3934#ifdef FUNCTRACE
3938 printk(KERN_INFO "%s:%s Exit on line %d\n", 3935 printk(KERN_INFO "%s:%s Exit on line %d\n",
3939 cdev->dev.bus_id,__FUNCTION__,__LINE__); 3936 cdev->dev.bus_id,__FUNCTION__,__LINE__);
diff --git a/drivers/sbus/char/bbc_i2c.c b/drivers/sbus/char/bbc_i2c.c
index 178155bf9d..fbadd4d761 100644
--- a/drivers/sbus/char/bbc_i2c.c
+++ b/drivers/sbus/char/bbc_i2c.c
@@ -156,10 +156,9 @@ struct bbc_i2c_client *bbc_i2c_attach(struct linux_ebus_child *echild)
156 156
157 if (!bp) 157 if (!bp)
158 return NULL; 158 return NULL;
159 client = kmalloc(sizeof(*client), GFP_KERNEL); 159 client = kzalloc(sizeof(*client), GFP_KERNEL);
160 if (!client) 160 if (!client)
161 return NULL; 161 return NULL;
162 memset(client, 0, sizeof(*client));
163 client->bp = bp; 162 client->bp = bp;
164 client->echild = echild; 163 client->echild = echild;
165 client->bus = echild->resource[0].start; 164 client->bus = echild->resource[0].start;
diff --git a/drivers/sbus/char/vfc_dev.c b/drivers/sbus/char/vfc_dev.c
index 6afc7e5df0..26b1d2a17e 100644
--- a/drivers/sbus/char/vfc_dev.c
+++ b/drivers/sbus/char/vfc_dev.c
@@ -656,12 +656,9 @@ static int vfc_probe(void)
656 if (!cards) 656 if (!cards)
657 return -ENODEV; 657 return -ENODEV;
658 658
659 vfc_dev_lst = kmalloc(sizeof(struct vfc_dev *) * 659 vfc_dev_lst = kcalloc(cards + 1, sizeof(struct vfc_dev*), GFP_KERNEL);
660 (cards+1),
661 GFP_KERNEL);
662 if (vfc_dev_lst == NULL) 660 if (vfc_dev_lst == NULL)
663 return -ENOMEM; 661 return -ENOMEM;
664 memset(vfc_dev_lst, 0, sizeof(struct vfc_dev *) * (cards + 1));
665 vfc_dev_lst[cards] = NULL; 662 vfc_dev_lst[cards] = NULL;
666 663
667 ret = register_chrdev(VFC_MAJOR, vfcstr, &vfc_fops); 664 ret = register_chrdev(VFC_MAJOR, vfcstr, &vfc_fops);
diff --git a/drivers/scsi/3w-9xxx.c b/drivers/scsi/3w-9xxx.c
index 76c0909717..6b49f6a252 100644
--- a/drivers/scsi/3w-9xxx.c
+++ b/drivers/scsi/3w-9xxx.c
@@ -1160,13 +1160,12 @@ static int twa_initialize_device_extension(TW_Device_Extension *tw_dev)
1160 } 1160 }
1161 1161
1162 /* Allocate event info space */ 1162 /* Allocate event info space */
1163 tw_dev->event_queue[0] = kmalloc(sizeof(TW_Event) * TW_Q_LENGTH, GFP_KERNEL); 1163 tw_dev->event_queue[0] = kcalloc(TW_Q_LENGTH, sizeof(TW_Event), GFP_KERNEL);
1164 if (!tw_dev->event_queue[0]) { 1164 if (!tw_dev->event_queue[0]) {
1165 TW_PRINTK(tw_dev->host, TW_DRIVER, 0x18, "Event info memory allocation failed"); 1165 TW_PRINTK(tw_dev->host, TW_DRIVER, 0x18, "Event info memory allocation failed");
1166 goto out; 1166 goto out;
1167 } 1167 }
1168 1168
1169 memset(tw_dev->event_queue[0], 0, sizeof(TW_Event) * TW_Q_LENGTH);
1170 1169
1171 for (i = 0; i < TW_Q_LENGTH; i++) { 1170 for (i = 0; i < TW_Q_LENGTH; i++) {
1172 tw_dev->event_queue[i] = (TW_Event *)((unsigned char *)tw_dev->event_queue[0] + (i * sizeof(TW_Event))); 1171 tw_dev->event_queue[i] = (TW_Event *)((unsigned char *)tw_dev->event_queue[0] + (i * sizeof(TW_Event)));
diff --git a/drivers/scsi/NCR53C9x.c b/drivers/scsi/NCR53C9x.c
index 8b5334c56f..773d11dd99 100644
--- a/drivers/scsi/NCR53C9x.c
+++ b/drivers/scsi/NCR53C9x.c
@@ -3606,11 +3606,10 @@ out:
3606int esp_slave_alloc(struct scsi_device *SDptr) 3606int esp_slave_alloc(struct scsi_device *SDptr)
3607{ 3607{
3608 struct esp_device *esp_dev = 3608 struct esp_device *esp_dev =
3609 kmalloc(sizeof(struct esp_device), GFP_ATOMIC); 3609 kzalloc(sizeof(struct esp_device), GFP_ATOMIC);
3610 3610
3611 if (!esp_dev) 3611 if (!esp_dev)
3612 return -ENOMEM; 3612 return -ENOMEM;
3613 memset(esp_dev, 0, sizeof(struct esp_device));
3614 SDptr->hostdata = esp_dev; 3613 SDptr->hostdata = esp_dev;
3615 return 0; 3614 return 0;
3616} 3615}
diff --git a/drivers/scsi/NCR_D700.c b/drivers/scsi/NCR_D700.c
index f12864abed..3a8089705f 100644
--- a/drivers/scsi/NCR_D700.c
+++ b/drivers/scsi/NCR_D700.c
@@ -181,13 +181,12 @@ NCR_D700_probe_one(struct NCR_D700_private *p, int siop, int irq,
181 struct Scsi_Host *host; 181 struct Scsi_Host *host;
182 int ret; 182 int ret;
183 183
184 hostdata = kmalloc(sizeof(*hostdata), GFP_KERNEL); 184 hostdata = kzalloc(sizeof(*hostdata), GFP_KERNEL);
185 if (!hostdata) { 185 if (!hostdata) {
186 printk(KERN_ERR "NCR D700: SIOP%d: Failed to allocate host" 186 printk(KERN_ERR "NCR D700: SIOP%d: Failed to allocate host"
187 "data, detatching\n", siop); 187 "data, detatching\n", siop);
188 return -ENOMEM; 188 return -ENOMEM;
189 } 189 }
190 memset(hostdata, 0, sizeof(*hostdata));
191 190
192 if (!request_region(region, 64, "NCR_D700")) { 191 if (!request_region(region, 64, "NCR_D700")) {
193 printk(KERN_ERR "NCR D700: Failed to reserve IO region 0x%x\n", 192 printk(KERN_ERR "NCR D700: Failed to reserve IO region 0x%x\n",
diff --git a/drivers/scsi/NCR_Q720.c b/drivers/scsi/NCR_Q720.c
index 778844c354..a8bbdc2273 100644
--- a/drivers/scsi/NCR_Q720.c
+++ b/drivers/scsi/NCR_Q720.c
@@ -148,11 +148,10 @@ NCR_Q720_probe(struct device *dev)
148 __u32 base_addr, mem_size; 148 __u32 base_addr, mem_size;
149 void __iomem *mem_base; 149 void __iomem *mem_base;
150 150
151 p = kmalloc(sizeof(*p), GFP_KERNEL); 151 p = kzalloc(sizeof(*p), GFP_KERNEL);
152 if (!p) 152 if (!p)
153 return -ENOMEM; 153 return -ENOMEM;
154 154
155 memset(p, 0, sizeof(*p));
156 pos2 = mca_device_read_pos(mca_dev, 2); 155 pos2 = mca_device_read_pos(mca_dev, 2);
157 /* enable device */ 156 /* enable device */
158 pos2 |= NCR_Q720_POS2_BOARD_ENABLE | NCR_Q720_POS2_INTERRUPT_ENABLE; 157 pos2 |= NCR_Q720_POS2_BOARD_ENABLE | NCR_Q720_POS2_INTERRUPT_ENABLE;
diff --git a/drivers/scsi/imm.c b/drivers/scsi/imm.c
index 0464c182c5..005d2b05f3 100644
--- a/drivers/scsi/imm.c
+++ b/drivers/scsi/imm.c
@@ -1159,11 +1159,10 @@ static int __imm_attach(struct parport *pb)
1159 1159
1160 init_waitqueue_head(&waiting); 1160 init_waitqueue_head(&waiting);
1161 1161
1162 dev = kmalloc(sizeof(imm_struct), GFP_KERNEL); 1162 dev = kzalloc(sizeof(imm_struct), GFP_KERNEL);
1163 if (!dev) 1163 if (!dev)
1164 return -ENOMEM; 1164 return -ENOMEM;
1165 1165
1166 memset(dev, 0, sizeof(imm_struct));
1167 1166
1168 dev->base = -1; 1167 dev->base = -1;
1169 dev->mode = IMM_AUTODETECT; 1168 dev->mode = IMM_AUTODETECT;
diff --git a/drivers/scsi/ips.c b/drivers/scsi/ips.c
index 9f8ed6b815..492a51bd6a 100644
--- a/drivers/scsi/ips.c
+++ b/drivers/scsi/ips.c
@@ -7068,14 +7068,13 @@ ips_init_phase1(struct pci_dev *pci_dev, int *indexPtr)
7068 subdevice_id = pci_dev->subsystem_device; 7068 subdevice_id = pci_dev->subsystem_device;
7069 7069
7070 /* found a controller */ 7070 /* found a controller */
7071 ha = kmalloc(sizeof (ips_ha_t), GFP_KERNEL); 7071 ha = kzalloc(sizeof (ips_ha_t), GFP_KERNEL);
7072 if (ha == NULL) { 7072 if (ha == NULL) {
7073 IPS_PRINTK(KERN_WARNING, pci_dev, 7073 IPS_PRINTK(KERN_WARNING, pci_dev,
7074 "Unable to allocate temporary ha struct\n"); 7074 "Unable to allocate temporary ha struct\n");
7075 return -1; 7075 return -1;
7076 } 7076 }
7077 7077
7078 memset(ha, 0, sizeof (ips_ha_t));
7079 7078
7080 ips_sh[index] = NULL; 7079 ips_sh[index] = NULL;
7081 ips_ha[index] = ha; 7080 ips_ha[index] = ha;
diff --git a/drivers/scsi/lasi700.c b/drivers/scsi/lasi700.c
index 5c32a69e41..3126824da3 100644
--- a/drivers/scsi/lasi700.c
+++ b/drivers/scsi/lasi700.c
@@ -101,13 +101,12 @@ lasi700_probe(struct parisc_device *dev)
101 struct NCR_700_Host_Parameters *hostdata; 101 struct NCR_700_Host_Parameters *hostdata;
102 struct Scsi_Host *host; 102 struct Scsi_Host *host;
103 103
104 hostdata = kmalloc(sizeof(*hostdata), GFP_KERNEL); 104 hostdata = kzalloc(sizeof(*hostdata), GFP_KERNEL);
105 if (!hostdata) { 105 if (!hostdata) {
106 printk(KERN_ERR "%s: Failed to allocate host data\n", 106 printk(KERN_ERR "%s: Failed to allocate host data\n",
107 dev->dev.bus_id); 107 dev->dev.bus_id);
108 return -ENOMEM; 108 return -ENOMEM;
109 } 109 }
110 memset(hostdata, 0, sizeof(struct NCR_700_Host_Parameters));
111 110
112 hostdata->dev = &dev->dev; 111 hostdata->dev = &dev->dev;
113 dma_set_mask(&dev->dev, DMA_32BIT_MASK); 112 dma_set_mask(&dev->dev, DMA_32BIT_MASK);
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index f81f85ee19..07bd0dcdf0 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -1830,7 +1830,7 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1830 /* Initialize and populate the iocb list per host. */ 1830 /* Initialize and populate the iocb list per host. */
1831 INIT_LIST_HEAD(&phba->lpfc_iocb_list); 1831 INIT_LIST_HEAD(&phba->lpfc_iocb_list);
1832 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) { 1832 for (i = 0; i < LPFC_IOCB_LIST_CNT; i++) {
1833 iocbq_entry = kmalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL); 1833 iocbq_entry = kzalloc(sizeof(struct lpfc_iocbq), GFP_KERNEL);
1834 if (iocbq_entry == NULL) { 1834 if (iocbq_entry == NULL) {
1835 printk(KERN_ERR "%s: only allocated %d iocbs of " 1835 printk(KERN_ERR "%s: only allocated %d iocbs of "
1836 "expected %d count. Unloading driver.\n", 1836 "expected %d count. Unloading driver.\n",
@@ -1839,7 +1839,6 @@ lpfc_pci_probe_one(struct pci_dev *pdev, const struct pci_device_id *pid)
1839 goto out_free_iocbq; 1839 goto out_free_iocbq;
1840 } 1840 }
1841 1841
1842 memset(iocbq_entry, 0, sizeof(struct lpfc_iocbq));
1843 iotag = lpfc_sli_next_iotag(phba, iocbq_entry); 1842 iotag = lpfc_sli_next_iotag(phba, iocbq_entry);
1844 if (iotag == 0) { 1843 if (iotag == 0) {
1845 kfree (iocbq_entry); 1844 kfree (iocbq_entry);
diff --git a/drivers/scsi/megaraid/megaraid_mbox.c b/drivers/scsi/megaraid/megaraid_mbox.c
index c46685a03a..c6a53dccc1 100644
--- a/drivers/scsi/megaraid/megaraid_mbox.c
+++ b/drivers/scsi/megaraid/megaraid_mbox.c
@@ -454,7 +454,7 @@ megaraid_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
454 pci_set_master(pdev); 454 pci_set_master(pdev);
455 455
456 // Allocate the per driver initialization structure 456 // Allocate the per driver initialization structure
457 adapter = kmalloc(sizeof(adapter_t), GFP_KERNEL); 457 adapter = kzalloc(sizeof(adapter_t), GFP_KERNEL);
458 458
459 if (adapter == NULL) { 459 if (adapter == NULL) {
460 con_log(CL_ANN, (KERN_WARNING 460 con_log(CL_ANN, (KERN_WARNING
@@ -462,7 +462,6 @@ megaraid_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
462 462
463 goto out_probe_one; 463 goto out_probe_one;
464 } 464 }
465 memset(adapter, 0, sizeof(adapter_t));
466 465
467 466
468 // set up PCI related soft state and other pre-known parameters 467 // set up PCI related soft state and other pre-known parameters
@@ -746,10 +745,9 @@ megaraid_init_mbox(adapter_t *adapter)
746 * Allocate and initialize the init data structure for mailbox 745 * Allocate and initialize the init data structure for mailbox
747 * controllers 746 * controllers
748 */ 747 */
749 raid_dev = kmalloc(sizeof(mraid_device_t), GFP_KERNEL); 748 raid_dev = kzalloc(sizeof(mraid_device_t), GFP_KERNEL);
750 if (raid_dev == NULL) return -1; 749 if (raid_dev == NULL) return -1;
751 750
752 memset(raid_dev, 0, sizeof(mraid_device_t));
753 751
754 /* 752 /*
755 * Attach the adapter soft state to raid device soft state 753 * Attach the adapter soft state to raid device soft state
@@ -1050,8 +1048,7 @@ megaraid_alloc_cmd_packets(adapter_t *adapter)
1050 * since the calling routine does not yet know the number of available 1048 * since the calling routine does not yet know the number of available
1051 * commands. 1049 * commands.
1052 */ 1050 */
1053 adapter->kscb_list = kmalloc(sizeof(scb_t) * MBOX_MAX_SCSI_CMDS, 1051 adapter->kscb_list = kcalloc(MBOX_MAX_SCSI_CMDS, sizeof(scb_t), GFP_KERNEL);
1054 GFP_KERNEL);
1055 1052
1056 if (adapter->kscb_list == NULL) { 1053 if (adapter->kscb_list == NULL) {
1057 con_log(CL_ANN, (KERN_WARNING 1054 con_log(CL_ANN, (KERN_WARNING
@@ -1059,7 +1056,6 @@ megaraid_alloc_cmd_packets(adapter_t *adapter)
1059 __LINE__)); 1056 __LINE__));
1060 goto out_free_ibuf; 1057 goto out_free_ibuf;
1061 } 1058 }
1062 memset(adapter->kscb_list, 0, sizeof(scb_t) * MBOX_MAX_SCSI_CMDS);
1063 1059
1064 // memory allocation for our command packets 1060 // memory allocation for our command packets
1065 if (megaraid_mbox_setup_dma_pools(adapter) != 0) { 1061 if (megaraid_mbox_setup_dma_pools(adapter) != 0) {
@@ -3495,8 +3491,7 @@ megaraid_cmm_register(adapter_t *adapter)
3495 int i; 3491 int i;
3496 3492
3497 // Allocate memory for the base list of scb for management module. 3493 // Allocate memory for the base list of scb for management module.
3498 adapter->uscb_list = kmalloc(sizeof(scb_t) * MBOX_MAX_USER_CMDS, 3494 adapter->uscb_list = kcalloc(MBOX_MAX_USER_CMDS, sizeof(scb_t), GFP_KERNEL);
3499 GFP_KERNEL);
3500 3495
3501 if (adapter->uscb_list == NULL) { 3496 if (adapter->uscb_list == NULL) {
3502 con_log(CL_ANN, (KERN_WARNING 3497 con_log(CL_ANN, (KERN_WARNING
@@ -3504,7 +3499,6 @@ megaraid_cmm_register(adapter_t *adapter)
3504 __LINE__)); 3499 __LINE__));
3505 return -1; 3500 return -1;
3506 } 3501 }
3507 memset(adapter->uscb_list, 0, sizeof(scb_t) * MBOX_MAX_USER_CMDS);
3508 3502
3509 3503
3510 // Initialize the synchronization parameters for resources for 3504 // Initialize the synchronization parameters for resources for
diff --git a/drivers/scsi/megaraid/megaraid_mm.c b/drivers/scsi/megaraid/megaraid_mm.c
index 84d9c27133..b6587a6d84 100644
--- a/drivers/scsi/megaraid/megaraid_mm.c
+++ b/drivers/scsi/megaraid/megaraid_mm.c
@@ -890,12 +890,11 @@ mraid_mm_register_adp(mraid_mmadp_t *lld_adp)
890 if (lld_adp->drvr_type != DRVRTYPE_MBOX) 890 if (lld_adp->drvr_type != DRVRTYPE_MBOX)
891 return (-EINVAL); 891 return (-EINVAL);
892 892
893 adapter = kmalloc(sizeof(mraid_mmadp_t), GFP_KERNEL); 893 adapter = kzalloc(sizeof(mraid_mmadp_t), GFP_KERNEL);
894 894
895 if (!adapter) 895 if (!adapter)
896 return -ENOMEM; 896 return -ENOMEM;
897 897
898 memset(adapter, 0, sizeof(mraid_mmadp_t));
899 898
900 adapter->unique_id = lld_adp->unique_id; 899 adapter->unique_id = lld_adp->unique_id;
901 adapter->drvr_type = lld_adp->drvr_type; 900 adapter->drvr_type = lld_adp->drvr_type;
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
index b7f2e613c9..ebb948c016 100644
--- a/drivers/scsi/megaraid/megaraid_sas.c
+++ b/drivers/scsi/megaraid/megaraid_sas.c
@@ -1636,15 +1636,13 @@ static int megasas_alloc_cmds(struct megasas_instance *instance)
1636 * Allocate the dynamic array first and then allocate individual 1636 * Allocate the dynamic array first and then allocate individual
1637 * commands. 1637 * commands.
1638 */ 1638 */
1639 instance->cmd_list = kmalloc(sizeof(struct megasas_cmd *) * max_cmd, 1639 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
1640 GFP_KERNEL);
1641 1640
1642 if (!instance->cmd_list) { 1641 if (!instance->cmd_list) {
1643 printk(KERN_DEBUG "megasas: out of memory\n"); 1642 printk(KERN_DEBUG "megasas: out of memory\n");
1644 return -ENOMEM; 1643 return -ENOMEM;
1645 } 1644 }
1646 1645
1647 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) * max_cmd);
1648 1646
1649 for (i = 0; i < max_cmd; i++) { 1647 for (i = 0; i < max_cmd; i++) {
1650 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd), 1648 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
diff --git a/drivers/scsi/pcmcia/aha152x_stub.c b/drivers/scsi/pcmcia/aha152x_stub.c
index 370802d24a..2dd0dc9a9a 100644
--- a/drivers/scsi/pcmcia/aha152x_stub.c
+++ b/drivers/scsi/pcmcia/aha152x_stub.c
@@ -106,9 +106,8 @@ static int aha152x_probe(struct pcmcia_device *link)
106 DEBUG(0, "aha152x_attach()\n"); 106 DEBUG(0, "aha152x_attach()\n");
107 107
108 /* Create new SCSI device */ 108 /* Create new SCSI device */
109 info = kmalloc(sizeof(*info), GFP_KERNEL); 109 info = kzalloc(sizeof(*info), GFP_KERNEL);
110 if (!info) return -ENOMEM; 110 if (!info) return -ENOMEM;
111 memset(info, 0, sizeof(*info));
112 info->p_dev = link; 111 info->p_dev = link;
113 link->priv = info; 112 link->priv = info;
114 113
diff --git a/drivers/scsi/pcmcia/nsp_cs.c b/drivers/scsi/pcmcia/nsp_cs.c
index c6f8c6e65e..445cfbbca9 100644
--- a/drivers/scsi/pcmcia/nsp_cs.c
+++ b/drivers/scsi/pcmcia/nsp_cs.c
@@ -1602,9 +1602,8 @@ static int nsp_cs_probe(struct pcmcia_device *link)
1602 nsp_dbg(NSP_DEBUG_INIT, "in"); 1602 nsp_dbg(NSP_DEBUG_INIT, "in");
1603 1603
1604 /* Create new SCSI device */ 1604 /* Create new SCSI device */
1605 info = kmalloc(sizeof(*info), GFP_KERNEL); 1605 info = kzalloc(sizeof(*info), GFP_KERNEL);
1606 if (info == NULL) { return -ENOMEM; } 1606 if (info == NULL) { return -ENOMEM; }
1607 memset(info, 0, sizeof(*info));
1608 info->p_dev = link; 1607 info->p_dev = link;
1609 link->priv = info; 1608 link->priv = info;
1610 data->ScsiInfo = info; 1609 data->ScsiInfo = info;
diff --git a/drivers/scsi/pcmcia/qlogic_stub.c b/drivers/scsi/pcmcia/qlogic_stub.c
index 697cfb76c3..67c5a58d17 100644
--- a/drivers/scsi/pcmcia/qlogic_stub.c
+++ b/drivers/scsi/pcmcia/qlogic_stub.c
@@ -162,10 +162,9 @@ static int qlogic_probe(struct pcmcia_device *link)
162 DEBUG(0, "qlogic_attach()\n"); 162 DEBUG(0, "qlogic_attach()\n");
163 163
164 /* Create new SCSI device */ 164 /* Create new SCSI device */
165 info = kmalloc(sizeof(*info), GFP_KERNEL); 165 info = kzalloc(sizeof(*info), GFP_KERNEL);
166 if (!info) 166 if (!info)
167 return -ENOMEM; 167 return -ENOMEM;
168 memset(info, 0, sizeof(*info));
169 info->p_dev = link; 168 info->p_dev = link;
170 link->priv = info; 169 link->priv = info;
171 link->io.NumPorts1 = 16; 170 link->io.NumPorts1 = 16;
diff --git a/drivers/scsi/pcmcia/sym53c500_cs.c b/drivers/scsi/pcmcia/sym53c500_cs.c
index 2695b7187b..961839ecfe 100644
--- a/drivers/scsi/pcmcia/sym53c500_cs.c
+++ b/drivers/scsi/pcmcia/sym53c500_cs.c
@@ -875,10 +875,9 @@ SYM53C500_probe(struct pcmcia_device *link)
875 DEBUG(0, "SYM53C500_attach()\n"); 875 DEBUG(0, "SYM53C500_attach()\n");
876 876
877 /* Create new SCSI device */ 877 /* Create new SCSI device */
878 info = kmalloc(sizeof(*info), GFP_KERNEL); 878 info = kzalloc(sizeof(*info), GFP_KERNEL);
879 if (!info) 879 if (!info)
880 return -ENOMEM; 880 return -ENOMEM;
881 memset(info, 0, sizeof(*info));
882 info->p_dev = link; 881 info->p_dev = link;
883 link->priv = info; 882 link->priv = info;
884 link->io.NumPorts1 = 16; 883 link->io.NumPorts1 = 16;
diff --git a/drivers/scsi/ppa.c b/drivers/scsi/ppa.c
index 2f1fa1eb7e..67b6d76a6c 100644
--- a/drivers/scsi/ppa.c
+++ b/drivers/scsi/ppa.c
@@ -1014,10 +1014,9 @@ static int __ppa_attach(struct parport *pb)
1014 int modes, ppb, ppb_hi; 1014 int modes, ppb, ppb_hi;
1015 int err = -ENOMEM; 1015 int err = -ENOMEM;
1016 1016
1017 dev = kmalloc(sizeof(ppa_struct), GFP_KERNEL); 1017 dev = kzalloc(sizeof(ppa_struct), GFP_KERNEL);
1018 if (!dev) 1018 if (!dev)
1019 return -ENOMEM; 1019 return -ENOMEM;
1020 memset(dev, 0, sizeof(ppa_struct));
1021 dev->base = -1; 1020 dev->base = -1;
1022 dev->mode = PPA_AUTODETECT; 1021 dev->mode = PPA_AUTODETECT;
1023 dev->recon_tmo = PPA_RECON_TMO; 1022 dev->recon_tmo = PPA_RECON_TMO;
diff --git a/drivers/scsi/sim710.c b/drivers/scsi/sim710.c
index 018c65f73a..710f19de3d 100644
--- a/drivers/scsi/sim710.c
+++ b/drivers/scsi/sim710.c
@@ -100,7 +100,7 @@ sim710_probe_common(struct device *dev, unsigned long base_addr,
100{ 100{
101 struct Scsi_Host * host = NULL; 101 struct Scsi_Host * host = NULL;
102 struct NCR_700_Host_Parameters *hostdata = 102 struct NCR_700_Host_Parameters *hostdata =
103 kmalloc(sizeof(struct NCR_700_Host_Parameters), GFP_KERNEL); 103 kzalloc(sizeof(struct NCR_700_Host_Parameters), GFP_KERNEL);
104 104
105 printk(KERN_NOTICE "sim710: %s\n", dev->bus_id); 105 printk(KERN_NOTICE "sim710: %s\n", dev->bus_id);
106 printk(KERN_NOTICE "sim710: irq = %d, clock = %d, base = 0x%lx, scsi_id = %d\n", 106 printk(KERN_NOTICE "sim710: irq = %d, clock = %d, base = 0x%lx, scsi_id = %d\n",
@@ -110,7 +110,6 @@ sim710_probe_common(struct device *dev, unsigned long base_addr,
110 printk(KERN_ERR "sim710: Failed to allocate host data\n"); 110 printk(KERN_ERR "sim710: Failed to allocate host data\n");
111 goto out; 111 goto out;
112 } 112 }
113 memset(hostdata, 0, sizeof(struct NCR_700_Host_Parameters));
114 113
115 if(request_region(base_addr, 64, "sim710") == NULL) { 114 if(request_region(base_addr, 64, "sim710") == NULL) {
116 printk(KERN_ERR "sim710: Failed to reserve IO region 0x%lx\n", 115 printk(KERN_ERR "sim710: Failed to reserve IO region 0x%lx\n",
diff --git a/drivers/scsi/tmscsim.c b/drivers/scsi/tmscsim.c
index 14cba1ca38..5db1520f8b 100644
--- a/drivers/scsi/tmscsim.c
+++ b/drivers/scsi/tmscsim.c
@@ -2082,10 +2082,9 @@ static int dc390_slave_alloc(struct scsi_device *scsi_device)
2082 uint id = scsi_device->id; 2082 uint id = scsi_device->id;
2083 uint lun = scsi_device->lun; 2083 uint lun = scsi_device->lun;
2084 2084
2085 pDCB = kmalloc(sizeof(struct dc390_dcb), GFP_KERNEL); 2085 pDCB = kzalloc(sizeof(struct dc390_dcb), GFP_KERNEL);
2086 if (!pDCB) 2086 if (!pDCB)
2087 return -ENOMEM; 2087 return -ENOMEM;
2088 memset(pDCB, 0, sizeof(struct dc390_dcb));
2089 2088
2090 if (!pACB->DCBCnt++) { 2089 if (!pACB->DCBCnt++) {
2091 pACB->pLinkDCB = pDCB; 2090 pACB->pLinkDCB = pDCB;
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c
index 954073c6ce..72229df9dc 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/serial/amba-pl011.c
@@ -716,7 +716,7 @@ static int pl011_probe(struct amba_device *dev, void *id)
716 goto out; 716 goto out;
717 } 717 }
718 718
719 uap = kmalloc(sizeof(struct uart_amba_port), GFP_KERNEL); 719 uap = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
720 if (uap == NULL) { 720 if (uap == NULL) {
721 ret = -ENOMEM; 721 ret = -ENOMEM;
722 goto out; 722 goto out;
@@ -728,7 +728,6 @@ static int pl011_probe(struct amba_device *dev, void *id)
728 goto free; 728 goto free;
729 } 729 }
730 730
731 memset(uap, 0, sizeof(struct uart_amba_port));
732 uap->clk = clk_get(&dev->dev, "UARTCLK"); 731 uap->clk = clk_get(&dev->dev, "UARTCLK");
733 if (IS_ERR(uap->clk)) { 732 if (IS_ERR(uap->clk)) {
734 ret = PTR_ERR(uap->clk); 733 ret = PTR_ERR(uap->clk);
diff --git a/drivers/sh/superhyway/superhyway.c b/drivers/sh/superhyway/superhyway.c
index 94b2290311..7d873b3b05 100644
--- a/drivers/sh/superhyway/superhyway.c
+++ b/drivers/sh/superhyway/superhyway.c
@@ -56,11 +56,10 @@ int superhyway_add_device(unsigned long base, struct superhyway_device *sdev,
56 struct superhyway_device *dev = sdev; 56 struct superhyway_device *dev = sdev;
57 57
58 if (!dev) { 58 if (!dev) {
59 dev = kmalloc(sizeof(struct superhyway_device), GFP_KERNEL); 59 dev = kzalloc(sizeof(struct superhyway_device), GFP_KERNEL);
60 if (!dev) 60 if (!dev)
61 return -ENOMEM; 61 return -ENOMEM;
62 62
63 memset(dev, 0, sizeof(struct superhyway_device));
64 } 63 }
65 64
66 dev->bus = bus; 65 dev->bus = bus;
diff --git a/drivers/sn/ioc3.c b/drivers/sn/ioc3.c
index 2dd6eed50a..29fcd6d030 100644
--- a/drivers/sn/ioc3.c
+++ b/drivers/sn/ioc3.c
@@ -629,7 +629,7 @@ static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
629#endif 629#endif
630 630
631 /* Set up per-IOC3 data */ 631 /* Set up per-IOC3 data */
632 idd = kmalloc(sizeof(struct ioc3_driver_data), GFP_KERNEL); 632 idd = kzalloc(sizeof(struct ioc3_driver_data), GFP_KERNEL);
633 if (!idd) { 633 if (!idd) {
634 printk(KERN_WARNING 634 printk(KERN_WARNING
635 "%s: Failed to allocate IOC3 data for pci_dev %s.\n", 635 "%s: Failed to allocate IOC3 data for pci_dev %s.\n",
@@ -637,7 +637,6 @@ static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
637 ret = -ENODEV; 637 ret = -ENODEV;
638 goto out_idd; 638 goto out_idd;
639 } 639 }
640 memset(idd, 0, sizeof(struct ioc3_driver_data));
641 spin_lock_init(&idd->ir_lock); 640 spin_lock_init(&idd->ir_lock);
642 spin_lock_init(&idd->gpio_lock); 641 spin_lock_init(&idd->gpio_lock);
643 idd->pdev = pdev; 642 idd->pdev = pdev;
diff --git a/drivers/telephony/ixj_pcmcia.c b/drivers/telephony/ixj_pcmcia.c
index 3e658dc7c2..ff9a29b763 100644
--- a/drivers/telephony/ixj_pcmcia.c
+++ b/drivers/telephony/ixj_pcmcia.c
@@ -45,11 +45,10 @@ static int ixj_probe(struct pcmcia_device *p_dev)
45 p_dev->io.Attributes2 = IO_DATA_PATH_WIDTH_8; 45 p_dev->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
46 p_dev->io.IOAddrLines = 3; 46 p_dev->io.IOAddrLines = 3;
47 p_dev->conf.IntType = INT_MEMORY_AND_IO; 47 p_dev->conf.IntType = INT_MEMORY_AND_IO;
48 p_dev->priv = kmalloc(sizeof(struct ixj_info_t), GFP_KERNEL); 48 p_dev->priv = kzalloc(sizeof(struct ixj_info_t), GFP_KERNEL);
49 if (!p_dev->priv) { 49 if (!p_dev->priv) {
50 return -ENOMEM; 50 return -ENOMEM;
51 } 51 }
52 memset(p_dev->priv, 0, sizeof(struct ixj_info_t));
53 52
54 return ixj_config(p_dev); 53 return ixj_config(p_dev);
55} 54}
diff --git a/drivers/usb/gadget/goku_udc.c b/drivers/usb/gadget/goku_udc.c
index d6c5f1150a..349b8166f3 100644
--- a/drivers/usb/gadget/goku_udc.c
+++ b/drivers/usb/gadget/goku_udc.c
@@ -1777,14 +1777,13 @@ static int goku_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1777 } 1777 }
1778 1778
1779 /* alloc, and start init */ 1779 /* alloc, and start init */
1780 dev = kmalloc (sizeof *dev, GFP_KERNEL); 1780 dev = kzalloc (sizeof *dev, GFP_KERNEL);
1781 if (dev == NULL){ 1781 if (dev == NULL){
1782 pr_debug("enomem %s\n", pci_name(pdev)); 1782 pr_debug("enomem %s\n", pci_name(pdev));
1783 retval = -ENOMEM; 1783 retval = -ENOMEM;
1784 goto done; 1784 goto done;
1785 } 1785 }
1786 1786
1787 memset(dev, 0, sizeof *dev);
1788 spin_lock_init(&dev->lock); 1787 spin_lock_init(&dev->lock);
1789 dev->pdev = pdev; 1788 dev->pdev = pdev;
1790 dev->gadget.ops = &goku_ops; 1789 dev->gadget.ops = &goku_ops;
diff --git a/drivers/usb/gadget/serial.c b/drivers/usb/gadget/serial.c
index dd33ff0ae4..38138bb9dd 100644
--- a/drivers/usb/gadget/serial.c
+++ b/drivers/usb/gadget/serial.c
@@ -1427,7 +1427,7 @@ static int __init gs_bind(struct usb_gadget *gadget)
1427 gs_acm_config_desc.bmAttributes |= USB_CONFIG_ATT_WAKEUP; 1427 gs_acm_config_desc.bmAttributes |= USB_CONFIG_ATT_WAKEUP;
1428 } 1428 }
1429 1429
1430 gs_device = dev = kmalloc(sizeof(struct gs_dev), GFP_KERNEL); 1430 gs_device = dev = kzalloc(sizeof(struct gs_dev), GFP_KERNEL);
1431 if (dev == NULL) 1431 if (dev == NULL)
1432 return -ENOMEM; 1432 return -ENOMEM;
1433 1433
@@ -1435,7 +1435,6 @@ static int __init gs_bind(struct usb_gadget *gadget)
1435 init_utsname()->sysname, init_utsname()->release, 1435 init_utsname()->sysname, init_utsname()->release,
1436 gadget->name); 1436 gadget->name);
1437 1437
1438 memset(dev, 0, sizeof(struct gs_dev));
1439 dev->dev_gadget = gadget; 1438 dev->dev_gadget = gadget;
1440 spin_lock_init(&dev->dev_lock); 1439 spin_lock_init(&dev->dev_lock);
1441 INIT_LIST_HEAD(&dev->dev_req_list); 1440 INIT_LIST_HEAD(&dev->dev_req_list);
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 2038125b7f..6edf4097d2 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -171,11 +171,10 @@ static int ohci_urb_enqueue (
171 } 171 }
172 172
173 /* allocate the private part of the URB */ 173 /* allocate the private part of the URB */
174 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *), 174 urb_priv = kzalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
175 mem_flags); 175 mem_flags);
176 if (!urb_priv) 176 if (!urb_priv)
177 return -ENOMEM; 177 return -ENOMEM;
178 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
179 INIT_LIST_HEAD (&urb_priv->pending); 178 INIT_LIST_HEAD (&urb_priv->pending);
180 urb_priv->length = size; 179 urb_priv->length = size;
181 urb_priv->ed = ed; 180 urb_priv->ed = ed;
diff --git a/drivers/usb/host/sl811_cs.c b/drivers/usb/host/sl811_cs.c
index 2d0e73b200..5da63f5350 100644
--- a/drivers/usb/host/sl811_cs.c
+++ b/drivers/usb/host/sl811_cs.c
@@ -278,10 +278,9 @@ static int sl811_cs_probe(struct pcmcia_device *link)
278{ 278{
279 local_info_t *local; 279 local_info_t *local;
280 280
281 local = kmalloc(sizeof(local_info_t), GFP_KERNEL); 281 local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
282 if (!local) 282 if (!local)
283 return -ENOMEM; 283 return -ENOMEM;
284 memset(local, 0, sizeof(local_info_t));
285 local->p_dev = link; 284 local->p_dev = link;
286 link->priv = local; 285 link->priv = local;
287 286
diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c
index 6c9dc2e69c..a7a1c891bf 100644
--- a/drivers/video/amba-clcd.c
+++ b/drivers/video/amba-clcd.c
@@ -447,13 +447,12 @@ static int clcdfb_probe(struct amba_device *dev, void *id)
447 goto out; 447 goto out;
448 } 448 }
449 449
450 fb = kmalloc(sizeof(struct clcd_fb), GFP_KERNEL); 450 fb = kzalloc(sizeof(struct clcd_fb), GFP_KERNEL);
451 if (!fb) { 451 if (!fb) {
452 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n"); 452 printk(KERN_INFO "CLCD: could not allocate new clcd_fb struct\n");
453 ret = -ENOMEM; 453 ret = -ENOMEM;
454 goto free_region; 454 goto free_region;
455 } 455 }
456 memset(fb, 0, sizeof(struct clcd_fb));
457 456
458 fb->dev = dev; 457 fb->dev = dev;
459 fb->board = board; 458 fb->board = board;
diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c
index ef330e34d0..0c7bf75732 100644
--- a/drivers/video/aty/atyfb_base.c
+++ b/drivers/video/aty/atyfb_base.c
@@ -2937,12 +2937,11 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev,
2937 /* nothing */ ; 2937 /* nothing */ ;
2938 j = i + 4; 2938 j = i + 4;
2939 2939
2940 par->mmap_map = kmalloc(j * sizeof(*par->mmap_map), GFP_ATOMIC); 2940 par->mmap_map = kcalloc(j, sizeof(*par->mmap_map), GFP_ATOMIC);
2941 if (!par->mmap_map) { 2941 if (!par->mmap_map) {
2942 PRINTKE("atyfb_setup_sparc() can't alloc mmap_map\n"); 2942 PRINTKE("atyfb_setup_sparc() can't alloc mmap_map\n");
2943 return -ENOMEM; 2943 return -ENOMEM;
2944 } 2944 }
2945 memset(par->mmap_map, 0, j * sizeof(*par->mmap_map));
2946 2945
2947 for (i = 0, j = 2; i < 6 && pdev->resource[i].start; i++) { 2946 for (i = 0, j = 2; i < 6 && pdev->resource[i].start; i++) {
2948 struct resource *rp = &pdev->resource[i]; 2947 struct resource *rp = &pdev->resource[i];
diff --git a/drivers/video/au1200fb.c b/drivers/video/au1200fb.c
index dbf4ec3f6d..03e57ef883 100644
--- a/drivers/video/au1200fb.c
+++ b/drivers/video/au1200fb.c
@@ -1589,11 +1589,10 @@ static int au1200fb_init_fbinfo(struct au1200fb_device *fbdev)
1589 return -EFAULT; 1589 return -EFAULT;
1590 } 1590 }
1591 1591
1592 fbi->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); 1592 fbi->pseudo_palette = kcalloc(16, sizeof(u32), GFP_KERNEL);
1593 if (!fbi->pseudo_palette) { 1593 if (!fbi->pseudo_palette) {
1594 return -ENOMEM; 1594 return -ENOMEM;
1595 } 1595 }
1596 memset(fbi->pseudo_palette, 0, sizeof(u32) * 16);
1597 1596
1598 if (fb_alloc_cmap(&fbi->cmap, AU1200_LCD_NBR_PALETTE_ENTRIES, 0) < 0) { 1597 if (fb_alloc_cmap(&fbi->cmap, AU1200_LCD_NBR_PALETTE_ENTRIES, 0) < 0) {
1599 print_err("Fail to allocate colormap (%d entries)", 1598 print_err("Fail to allocate colormap (%d entries)",
diff --git a/drivers/video/clps711xfb.c b/drivers/video/clps711xfb.c
index 50b78af0fa..dea6579941 100644
--- a/drivers/video/clps711xfb.c
+++ b/drivers/video/clps711xfb.c
@@ -366,11 +366,10 @@ int __init clps711xfb_init(void)
366 if (fb_get_options("clps711xfb", NULL)) 366 if (fb_get_options("clps711xfb", NULL))
367 return -ENODEV; 367 return -ENODEV;
368 368
369 cfb = kmalloc(sizeof(*cfb), GFP_KERNEL); 369 cfb = kzalloc(sizeof(*cfb), GFP_KERNEL);
370 if (!cfb) 370 if (!cfb)
371 goto out; 371 goto out;
372 372
373 memset(cfb, 0, sizeof(*cfb));
374 strcpy(cfb->fix.id, "clps711x"); 373 strcpy(cfb->fix.id, "clps711x");
375 374
376 cfb->fbops = &clps7111fb_ops; 375 cfb->fbops = &clps7111fb_ops;
diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c
index 7a6eeda5ae..30ede6e883 100644
--- a/drivers/video/cyber2000fb.c
+++ b/drivers/video/cyber2000fb.c
@@ -1221,11 +1221,10 @@ cyberpro_alloc_fb_info(unsigned int id, char *name)
1221{ 1221{
1222 struct cfb_info *cfb; 1222 struct cfb_info *cfb;
1223 1223
1224 cfb = kmalloc(sizeof(struct cfb_info), GFP_KERNEL); 1224 cfb = kzalloc(sizeof(struct cfb_info), GFP_KERNEL);
1225 if (!cfb) 1225 if (!cfb)
1226 return NULL; 1226 return NULL;
1227 1227
1228 memset(cfb, 0, sizeof(struct cfb_info));
1229 1228
1230 cfb->id = id; 1229 cfb->id = id;
1231 1230
diff --git a/drivers/video/logo/logo.c b/drivers/video/logo/logo.c
index 80c03618eb..2b0f799aa8 100644
--- a/drivers/video/logo/logo.c
+++ b/drivers/video/logo/logo.c
@@ -34,8 +34,11 @@ extern const struct linux_logo logo_superh_vga16;
34extern const struct linux_logo logo_superh_clut224; 34extern const struct linux_logo logo_superh_clut224;
35extern const struct linux_logo logo_m32r_clut224; 35extern const struct linux_logo logo_m32r_clut224;
36 36
37 37/* logo's are marked __initdata. Use __init_refok to tell
38const struct linux_logo *fb_find_logo(int depth) 38 * modpost that it is intended that this function uses data
39 * marked __initdata.
40 */
41const struct linux_logo * __init_refok fb_find_logo(int depth)
39{ 42{
40 const struct linux_logo *logo = NULL; 43 const struct linux_logo *logo = NULL;
41 44
diff --git a/drivers/video/pvr2fb.c b/drivers/video/pvr2fb.c
index 0f88c30f94..f930026604 100644
--- a/drivers/video/pvr2fb.c
+++ b/drivers/video/pvr2fb.c
@@ -1082,13 +1082,12 @@ static int __init pvr2fb_init(void)
1082#endif 1082#endif
1083 size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32); 1083 size = sizeof(struct fb_info) + sizeof(struct pvr2fb_par) + 16 * sizeof(u32);
1084 1084
1085 fb_info = kmalloc(size, GFP_KERNEL); 1085 fb_info = kzalloc(size, GFP_KERNEL);
1086 if (!fb_info) { 1086 if (!fb_info) {
1087 printk(KERN_ERR "Failed to allocate memory for fb_info\n"); 1087 printk(KERN_ERR "Failed to allocate memory for fb_info\n");
1088 return -ENOMEM; 1088 return -ENOMEM;
1089 } 1089 }
1090 1090
1091 memset(fb_info, 0, size);
1092 1091
1093 currentpar = (struct pvr2fb_par *)(fb_info + 1); 1092 currentpar = (struct pvr2fb_par *)(fb_info + 1);
1094 1093
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c
index 3d7507ad55..b855f4a34a 100644
--- a/drivers/video/savage/savagefb_driver.c
+++ b/drivers/video/savage/savagefb_driver.c
@@ -2174,11 +2174,10 @@ static int __devinit savage_init_fb_info(struct fb_info *info,
2174 2174
2175#if defined(CONFIG_FB_SAVAGE_ACCEL) 2175#if defined(CONFIG_FB_SAVAGE_ACCEL)
2176 /* FIFO size + padding for commands */ 2176 /* FIFO size + padding for commands */
2177 info->pixmap.addr = kmalloc(8*1024, GFP_KERNEL); 2177 info->pixmap.addr = kcalloc(8, 1024, GFP_KERNEL);
2178 2178
2179 err = -ENOMEM; 2179 err = -ENOMEM;
2180 if (info->pixmap.addr) { 2180 if (info->pixmap.addr) {
2181 memset(info->pixmap.addr, 0, 8*1024);
2182 info->pixmap.size = 8*1024; 2181 info->pixmap.size = 8*1024;
2183 info->pixmap.scan_align = 4; 2182 info->pixmap.scan_align = 4;
2184 info->pixmap.buf_align = 4; 2183 info->pixmap.buf_align = 4;
diff --git a/drivers/video/valkyriefb.c b/drivers/video/valkyriefb.c
index ad66f070ac..7b0cef9ca8 100644
--- a/drivers/video/valkyriefb.c
+++ b/drivers/video/valkyriefb.c
@@ -356,10 +356,9 @@ int __init valkyriefb_init(void)
356 } 356 }
357#endif /* ppc (!CONFIG_MAC) */ 357#endif /* ppc (!CONFIG_MAC) */
358 358
359 p = kmalloc(sizeof(*p), GFP_ATOMIC); 359 p = kzalloc(sizeof(*p), GFP_ATOMIC);
360 if (p == 0) 360 if (p == 0)
361 return -ENOMEM; 361 return -ENOMEM;
362 memset(p, 0, sizeof(*p));
363 362
364 /* Map in frame buffer and registers */ 363 /* Map in frame buffer and registers */
365 if (!request_mem_region(frame_buffer_phys, 0x100000, "valkyriefb")) { 364 if (!request_mem_region(frame_buffer_phys, 0x100000, "valkyriefb")) {
diff --git a/drivers/w1/masters/matrox_w1.c b/drivers/w1/masters/matrox_w1.c
index 6f9d880ab2..d356da5709 100644
--- a/drivers/w1/masters/matrox_w1.c
+++ b/drivers/w1/masters/matrox_w1.c
@@ -164,7 +164,7 @@ static int __devinit matrox_w1_probe(struct pci_dev *pdev, const struct pci_devi
164 if (pdev->vendor != PCI_VENDOR_ID_MATROX || pdev->device != PCI_DEVICE_ID_MATROX_G400) 164 if (pdev->vendor != PCI_VENDOR_ID_MATROX || pdev->device != PCI_DEVICE_ID_MATROX_G400)
165 return -ENODEV; 165 return -ENODEV;
166 166
167 dev = kmalloc(sizeof(struct matrox_device) + 167 dev = kzalloc(sizeof(struct matrox_device) +
168 sizeof(struct w1_bus_master), GFP_KERNEL); 168 sizeof(struct w1_bus_master), GFP_KERNEL);
169 if (!dev) { 169 if (!dev) {
170 dev_err(&pdev->dev, 170 dev_err(&pdev->dev,
@@ -173,7 +173,6 @@ static int __devinit matrox_w1_probe(struct pci_dev *pdev, const struct pci_devi
173 return -ENOMEM; 173 return -ENOMEM;
174 } 174 }
175 175
176 memset(dev, 0, sizeof(struct matrox_device) + sizeof(struct w1_bus_master));
177 176
178 dev->bus_master = (struct w1_bus_master *)(dev + 1); 177 dev->bus_master = (struct w1_bus_master *)(dev + 1);
179 178
diff --git a/drivers/w1/slaves/w1_ds2433.c b/drivers/w1/slaves/w1_ds2433.c
index cab56005dd..858c16a544 100644
--- a/drivers/w1/slaves/w1_ds2433.c
+++ b/drivers/w1/slaves/w1_ds2433.c
@@ -266,10 +266,9 @@ static int w1_f23_add_slave(struct w1_slave *sl)
266#ifdef CONFIG_W1_SLAVE_DS2433_CRC 266#ifdef CONFIG_W1_SLAVE_DS2433_CRC
267 struct w1_f23_data *data; 267 struct w1_f23_data *data;
268 268
269 data = kmalloc(sizeof(struct w1_f23_data), GFP_KERNEL); 269 data = kzalloc(sizeof(struct w1_f23_data), GFP_KERNEL);
270 if (!data) 270 if (!data)
271 return -ENOMEM; 271 return -ENOMEM;
272 memset(data, 0, sizeof(struct w1_f23_data));
273 sl->family_data = data; 272 sl->family_data = data;
274 273
275#endif /* CONFIG_W1_SLAVE_DS2433_CRC */ 274#endif /* CONFIG_W1_SLAVE_DS2433_CRC */
diff --git a/drivers/w1/w1.c b/drivers/w1/w1.c
index c6332108f1..8d7ab74170 100644
--- a/drivers/w1/w1.c
+++ b/drivers/w1/w1.c
@@ -520,7 +520,7 @@ static int w1_attach_slave_device(struct w1_master *dev, struct w1_reg_num *rn)
520 int err; 520 int err;
521 struct w1_netlink_msg msg; 521 struct w1_netlink_msg msg;
522 522
523 sl = kmalloc(sizeof(struct w1_slave), GFP_KERNEL); 523 sl = kzalloc(sizeof(struct w1_slave), GFP_KERNEL);
524 if (!sl) { 524 if (!sl) {
525 dev_err(&dev->dev, 525 dev_err(&dev->dev,
526 "%s: failed to allocate new slave device.\n", 526 "%s: failed to allocate new slave device.\n",
@@ -528,7 +528,6 @@ static int w1_attach_slave_device(struct w1_master *dev, struct w1_reg_num *rn)
528 return -ENOMEM; 528 return -ENOMEM;
529 } 529 }
530 530
531 memset(sl, 0, sizeof(*sl));
532 531
533 sl->owner = THIS_MODULE; 532 sl->owner = THIS_MODULE;
534 sl->master = dev; 533 sl->master = dev;
diff --git a/drivers/w1/w1_int.c b/drivers/w1/w1_int.c
index 258defdb2e..2fbd8dd16d 100644
--- a/drivers/w1/w1_int.c
+++ b/drivers/w1/w1_int.c
@@ -41,7 +41,7 @@ static struct w1_master * w1_alloc_dev(u32 id, int slave_count, int slave_ttl,
41 /* 41 /*
42 * We are in process context(kernel thread), so can sleep. 42 * We are in process context(kernel thread), so can sleep.
43 */ 43 */
44 dev = kmalloc(sizeof(struct w1_master) + sizeof(struct w1_bus_master), GFP_KERNEL); 44 dev = kzalloc(sizeof(struct w1_master) + sizeof(struct w1_bus_master), GFP_KERNEL);
45 if (!dev) { 45 if (!dev) {
46 printk(KERN_ERR 46 printk(KERN_ERR
47 "Failed to allocate %zd bytes for new w1 device.\n", 47 "Failed to allocate %zd bytes for new w1 device.\n",
@@ -49,7 +49,6 @@ static struct w1_master * w1_alloc_dev(u32 id, int slave_count, int slave_ttl,
49 return NULL; 49 return NULL;
50 } 50 }
51 51
52 memset(dev, 0, sizeof(struct w1_master) + sizeof(struct w1_bus_master));
53 52
54 dev->bus_master = (struct w1_bus_master *)(dev + 1); 53 dev->bus_master = (struct w1_bus_master *)(dev + 1);
55 54