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-rw-r--r--drivers/acorn/block/Kconfig2
-rw-r--r--drivers/atm/he.c2
-rw-r--r--drivers/atm/idt77105.c2
-rw-r--r--drivers/atm/idt77105.h2
-rw-r--r--drivers/atm/iphase.c4
-rw-r--r--drivers/atm/suni.c2
-rw-r--r--drivers/base/node.c63
-rw-r--r--drivers/cdrom/cm206.c9
-rw-r--r--drivers/char/istallion.c17
-rw-r--r--drivers/char/pc8736x_gpio.c5
-rw-r--r--drivers/char/scx200_gpio.c6
-rw-r--r--drivers/edac/amd76x_edac.c98
-rw-r--r--drivers/edac/e752x_edac.c344
-rw-r--r--drivers/edac/e7xxx_edac.c175
-rw-r--r--drivers/edac/edac_mc.c589
-rw-r--r--drivers/edac/edac_mc.h18
-rw-r--r--drivers/edac/i82860_edac.c131
-rw-r--r--drivers/edac/i82875p_edac.c219
-rw-r--r--drivers/edac/r82600_edac.c142
-rw-r--r--drivers/i2c/busses/i2c-i801.c4
-rw-r--r--drivers/infiniband/ulp/iser/iscsi_iser.c1
-rw-r--r--drivers/input/serio/i8042-sparcio.h108
-rw-r--r--drivers/net/bnx2.c32
-rw-r--r--drivers/net/bnx2.h1
-rw-r--r--drivers/net/irda/Kconfig2
-rw-r--r--drivers/net/irda/mcs7780.c2
-rw-r--r--drivers/net/sunhme.c10
-rw-r--r--drivers/parisc/led.c11
-rw-r--r--drivers/serial/sunsab.c299
-rw-r--r--drivers/serial/sunsu.c497
-rw-r--r--drivers/serial/sunzilog.c793
-rw-r--r--drivers/usb/core/devio.c6
-rw-r--r--drivers/usb/core/inode.c2
-rw-r--r--drivers/usb/core/usb.h1
-rw-r--r--drivers/video/bw2.c213
-rw-r--r--drivers/video/cg14.c326
-rw-r--r--drivers/video/cg3.c217
-rw-r--r--drivers/video/cg6.c337
-rw-r--r--drivers/video/ffb.c466
-rw-r--r--drivers/video/imacfb.c4
-rw-r--r--drivers/video/leo.c294
-rw-r--r--drivers/video/p9100.c251
-rw-r--r--drivers/video/tcx.c224
43 files changed, 2835 insertions, 3096 deletions
diff --git a/drivers/acorn/block/Kconfig b/drivers/acorn/block/Kconfig
index 073add35e6..a0ff25ea43 100644
--- a/drivers/acorn/block/Kconfig
+++ b/drivers/acorn/block/Kconfig
@@ -3,7 +3,7 @@
3# 3#
4 4
5menu "Acorn-specific block devices" 5menu "Acorn-specific block devices"
6 depends on ARCH_ACORN 6 depends on ARCH_ARC || ARCH_A5K
7 7
8config BLK_DEV_FD1772 8config BLK_DEV_FD1772
9 tristate "Old Archimedes floppy (1772) support" 9 tristate "Old Archimedes floppy (1772) support"
diff --git a/drivers/atm/he.c b/drivers/atm/he.c
index fde9334059..a486eb1f16 100644
--- a/drivers/atm/he.c
+++ b/drivers/atm/he.c
@@ -1018,7 +1018,7 @@ he_init_irq(struct he_dev *he_dev)
1018 return 0; 1018 return 0;
1019} 1019}
1020 1020
1021static int __init 1021static int __devinit
1022he_start(struct atm_dev *dev) 1022he_start(struct atm_dev *dev)
1023{ 1023{
1024 struct he_dev *he_dev; 1024 struct he_dev *he_dev;
diff --git a/drivers/atm/idt77105.c b/drivers/atm/idt77105.c
index 0aabfc2a59..325325afab 100644
--- a/drivers/atm/idt77105.c
+++ b/drivers/atm/idt77105.c
@@ -358,7 +358,7 @@ static const struct atmphy_ops idt77105_ops = {
358}; 358};
359 359
360 360
361int idt77105_init(struct atm_dev *dev) 361int __devinit idt77105_init(struct atm_dev *dev)
362{ 362{
363 dev->phy = &idt77105_ops; 363 dev->phy = &idt77105_ops;
364 return 0; 364 return 0;
diff --git a/drivers/atm/idt77105.h b/drivers/atm/idt77105.h
index 8ba8218aae..3fd2bc8997 100644
--- a/drivers/atm/idt77105.h
+++ b/drivers/atm/idt77105.h
@@ -76,7 +76,7 @@
76#define IDT77105_CTRSEL_RHEC 0x01 /* W, Rx HEC Error Counter */ 76#define IDT77105_CTRSEL_RHEC 0x01 /* W, Rx HEC Error Counter */
77 77
78#ifdef __KERNEL__ 78#ifdef __KERNEL__
79int idt77105_init(struct atm_dev *dev) __init; 79int idt77105_init(struct atm_dev *dev);
80#endif 80#endif
81 81
82/* 82/*
diff --git a/drivers/atm/iphase.c b/drivers/atm/iphase.c
index 2e2e50e116..333a7bc609 100644
--- a/drivers/atm/iphase.c
+++ b/drivers/atm/iphase.c
@@ -2284,7 +2284,7 @@ static int reset_sar(struct atm_dev *dev)
2284} 2284}
2285 2285
2286 2286
2287static int __init ia_init(struct atm_dev *dev) 2287static int __devinit ia_init(struct atm_dev *dev)
2288{ 2288{
2289 IADEV *iadev; 2289 IADEV *iadev;
2290 unsigned long real_base; 2290 unsigned long real_base;
@@ -2480,7 +2480,7 @@ static void ia_free_rx(IADEV *iadev)
2480 iadev->rx_dle_dma); 2480 iadev->rx_dle_dma);
2481} 2481}
2482 2482
2483static int __init ia_start(struct atm_dev *dev) 2483static int __devinit ia_start(struct atm_dev *dev)
2484{ 2484{
2485 IADEV *iadev; 2485 IADEV *iadev;
2486 int error; 2486 int error;
diff --git a/drivers/atm/suni.c b/drivers/atm/suni.c
index b1d063cc4f..f04f39c008 100644
--- a/drivers/atm/suni.c
+++ b/drivers/atm/suni.c
@@ -289,7 +289,7 @@ static const struct atmphy_ops suni_ops = {
289}; 289};
290 290
291 291
292int suni_init(struct atm_dev *dev) 292int __devinit suni_init(struct atm_dev *dev)
293{ 293{
294 unsigned char mri; 294 unsigned char mri;
295 295
diff --git a/drivers/base/node.c b/drivers/base/node.c
index eae2bdc183..d7de1753e0 100644
--- a/drivers/base/node.c
+++ b/drivers/base/node.c
@@ -40,24 +40,13 @@ static ssize_t node_read_meminfo(struct sys_device * dev, char * buf)
40 int n; 40 int n;
41 int nid = dev->id; 41 int nid = dev->id;
42 struct sysinfo i; 42 struct sysinfo i;
43 struct page_state ps;
44 unsigned long inactive; 43 unsigned long inactive;
45 unsigned long active; 44 unsigned long active;
46 unsigned long free; 45 unsigned long free;
47 46
48 si_meminfo_node(&i, nid); 47 si_meminfo_node(&i, nid);
49 get_page_state_node(&ps, nid);
50 __get_zone_counts(&active, &inactive, &free, NODE_DATA(nid)); 48 __get_zone_counts(&active, &inactive, &free, NODE_DATA(nid));
51 49
52 /* Check for negative values in these approximate counters */
53 if ((long)ps.nr_dirty < 0)
54 ps.nr_dirty = 0;
55 if ((long)ps.nr_writeback < 0)
56 ps.nr_writeback = 0;
57 if ((long)ps.nr_mapped < 0)
58 ps.nr_mapped = 0;
59 if ((long)ps.nr_slab < 0)
60 ps.nr_slab = 0;
61 50
62 n = sprintf(buf, "\n" 51 n = sprintf(buf, "\n"
63 "Node %d MemTotal: %8lu kB\n" 52 "Node %d MemTotal: %8lu kB\n"
@@ -71,7 +60,12 @@ static ssize_t node_read_meminfo(struct sys_device * dev, char * buf)
71 "Node %d LowFree: %8lu kB\n" 60 "Node %d LowFree: %8lu kB\n"
72 "Node %d Dirty: %8lu kB\n" 61 "Node %d Dirty: %8lu kB\n"
73 "Node %d Writeback: %8lu kB\n" 62 "Node %d Writeback: %8lu kB\n"
63 "Node %d FilePages: %8lu kB\n"
74 "Node %d Mapped: %8lu kB\n" 64 "Node %d Mapped: %8lu kB\n"
65 "Node %d AnonPages: %8lu kB\n"
66 "Node %d PageTables: %8lu kB\n"
67 "Node %d NFS Unstable: %8lu kB\n"
68 "Node %d Bounce: %8lu kB\n"
75 "Node %d Slab: %8lu kB\n", 69 "Node %d Slab: %8lu kB\n",
76 nid, K(i.totalram), 70 nid, K(i.totalram),
77 nid, K(i.freeram), 71 nid, K(i.freeram),
@@ -82,10 +76,15 @@ static ssize_t node_read_meminfo(struct sys_device * dev, char * buf)
82 nid, K(i.freehigh), 76 nid, K(i.freehigh),
83 nid, K(i.totalram - i.totalhigh), 77 nid, K(i.totalram - i.totalhigh),
84 nid, K(i.freeram - i.freehigh), 78 nid, K(i.freeram - i.freehigh),
85 nid, K(ps.nr_dirty), 79 nid, K(node_page_state(nid, NR_FILE_DIRTY)),
86 nid, K(ps.nr_writeback), 80 nid, K(node_page_state(nid, NR_WRITEBACK)),
87 nid, K(ps.nr_mapped), 81 nid, K(node_page_state(nid, NR_FILE_PAGES)),
88 nid, K(ps.nr_slab)); 82 nid, K(node_page_state(nid, NR_FILE_MAPPED)),
83 nid, K(node_page_state(nid, NR_ANON_PAGES)),
84 nid, K(node_page_state(nid, NR_PAGETABLE)),
85 nid, K(node_page_state(nid, NR_UNSTABLE_NFS)),
86 nid, K(node_page_state(nid, NR_BOUNCE)),
87 nid, K(node_page_state(nid, NR_SLAB)));
89 n += hugetlb_report_node_meminfo(nid, buf + n); 88 n += hugetlb_report_node_meminfo(nid, buf + n);
90 return n; 89 return n;
91} 90}
@@ -95,28 +94,6 @@ static SYSDEV_ATTR(meminfo, S_IRUGO, node_read_meminfo, NULL);
95 94
96static ssize_t node_read_numastat(struct sys_device * dev, char * buf) 95static ssize_t node_read_numastat(struct sys_device * dev, char * buf)
97{ 96{
98 unsigned long numa_hit, numa_miss, interleave_hit, numa_foreign;
99 unsigned long local_node, other_node;
100 int i, cpu;
101 pg_data_t *pg = NODE_DATA(dev->id);
102 numa_hit = 0;
103 numa_miss = 0;
104 interleave_hit = 0;
105 numa_foreign = 0;
106 local_node = 0;
107 other_node = 0;
108 for (i = 0; i < MAX_NR_ZONES; i++) {
109 struct zone *z = &pg->node_zones[i];
110 for_each_online_cpu(cpu) {
111 struct per_cpu_pageset *ps = zone_pcp(z,cpu);
112 numa_hit += ps->numa_hit;
113 numa_miss += ps->numa_miss;
114 numa_foreign += ps->numa_foreign;
115 interleave_hit += ps->interleave_hit;
116 local_node += ps->local_node;
117 other_node += ps->other_node;
118 }
119 }
120 return sprintf(buf, 97 return sprintf(buf,
121 "numa_hit %lu\n" 98 "numa_hit %lu\n"
122 "numa_miss %lu\n" 99 "numa_miss %lu\n"
@@ -124,12 +101,12 @@ static ssize_t node_read_numastat(struct sys_device * dev, char * buf)
124 "interleave_hit %lu\n" 101 "interleave_hit %lu\n"
125 "local_node %lu\n" 102 "local_node %lu\n"
126 "other_node %lu\n", 103 "other_node %lu\n",
127 numa_hit, 104 node_page_state(dev->id, NUMA_HIT),
128 numa_miss, 105 node_page_state(dev->id, NUMA_MISS),
129 numa_foreign, 106 node_page_state(dev->id, NUMA_FOREIGN),
130 interleave_hit, 107 node_page_state(dev->id, NUMA_INTERLEAVE_HIT),
131 local_node, 108 node_page_state(dev->id, NUMA_LOCAL),
132 other_node); 109 node_page_state(dev->id, NUMA_OTHER));
133} 110}
134static SYSDEV_ATTR(numastat, S_IRUGO, node_read_numastat, NULL); 111static SYSDEV_ATTR(numastat, S_IRUGO, node_read_numastat, NULL);
135 112
diff --git a/drivers/cdrom/cm206.c b/drivers/cdrom/cm206.c
index 4ee288688f..9b05ddd231 100644
--- a/drivers/cdrom/cm206.c
+++ b/drivers/cdrom/cm206.c
@@ -914,7 +914,7 @@ static void seek(int lba)
914 cd->dsb = wait_dsb(); 914 cd->dsb = wait_dsb();
915} 915}
916 916
917uch bcdbin(unsigned char bcd) 917static uch bcdbin(unsigned char bcd)
918{ /* stolen from mcd.c! */ 918{ /* stolen from mcd.c! */
919 return (bcd >> 4) * 10 + (bcd & 0xf); 919 return (bcd >> 4) * 10 + (bcd & 0xf);
920} 920}
@@ -1532,7 +1532,7 @@ static void __init parse_options(void)
1532 } 1532 }
1533} 1533}
1534 1534
1535static int __cm206_init(void) 1535static int __init __cm206_init(void)
1536{ 1536{
1537 parse_options(); 1537 parse_options();
1538#if !defined(AUTO_PROBE_MODULE) 1538#if !defined(AUTO_PROBE_MODULE)
@@ -1593,8 +1593,3 @@ __setup("cm206=", cm206_setup);
1593#endif /* !MODULE */ 1593#endif /* !MODULE */
1594MODULE_ALIAS_BLOCKDEV_MAJOR(CM206_CDROM_MAJOR); 1594MODULE_ALIAS_BLOCKDEV_MAJOR(CM206_CDROM_MAJOR);
1595 1595
1596/*
1597 * Local variables:
1598 * compile-command: "gcc -D__KERNEL__ -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer -pipe -fno-strength-reduce -m486 -DMODULE -DMODVERSIONS -include /usr/src/linux/include/linux/modversions.h -c -o cm206.o cm206.c"
1599 * End:
1600 */
diff --git a/drivers/char/istallion.c b/drivers/char/istallion.c
index c74e5660a9..18c0dcf894 100644
--- a/drivers/char/istallion.c
+++ b/drivers/char/istallion.c
@@ -282,7 +282,6 @@ static char *stli_brdnames[] = {
282 282
283/*****************************************************************************/ 283/*****************************************************************************/
284 284
285#ifdef MODULE
286/* 285/*
287 * Define some string labels for arguments passed from the module 286 * Define some string labels for arguments passed from the module
288 * load line. These allow for easy board definitions, and easy 287 * load line. These allow for easy board definitions, and easy
@@ -381,8 +380,6 @@ MODULE_PARM_DESC(board2, "Board 2 config -> name[,ioaddr[,memaddr]");
381module_param_array(board3, charp, NULL, 0); 380module_param_array(board3, charp, NULL, 0);
382MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,memaddr]"); 381MODULE_PARM_DESC(board3, "Board 3 config -> name[,ioaddr[,memaddr]");
383 382
384#endif
385
386/* 383/*
387 * Set up a default memory address table for EISA board probing. 384 * Set up a default memory address table for EISA board probing.
388 * The default addresses are all bellow 1Mbyte, which has to be the 385 * The default addresses are all bellow 1Mbyte, which has to be the
@@ -643,14 +640,8 @@ static unsigned int stli_baudrates[] = {
643 * Prototype all functions in this driver! 640 * Prototype all functions in this driver!
644 */ 641 */
645 642
646#ifdef MODULE
647static void stli_argbrds(void);
648static int stli_parsebrd(stlconf_t *confp, char **argp); 643static int stli_parsebrd(stlconf_t *confp, char **argp);
649 644static int stli_init(void);
650static unsigned long stli_atol(char *str);
651#endif
652
653int stli_init(void);
654static int stli_open(struct tty_struct *tty, struct file *filp); 645static int stli_open(struct tty_struct *tty, struct file *filp);
655static void stli_close(struct tty_struct *tty, struct file *filp); 646static void stli_close(struct tty_struct *tty, struct file *filp);
656static int stli_write(struct tty_struct *tty, const unsigned char *buf, int count); 647static int stli_write(struct tty_struct *tty, const unsigned char *buf, int count);
@@ -786,8 +777,6 @@ static int stli_timeron;
786 777
787static struct class *istallion_class; 778static struct class *istallion_class;
788 779
789#ifdef MODULE
790
791/* 780/*
792 * Loadable module initialization stuff. 781 * Loadable module initialization stuff.
793 */ 782 */
@@ -954,8 +943,6 @@ static int stli_parsebrd(stlconf_t *confp, char **argp)
954 return(1); 943 return(1);
955} 944}
956 945
957#endif
958
959/*****************************************************************************/ 946/*****************************************************************************/
960 947
961static int stli_open(struct tty_struct *tty, struct file *filp) 948static int stli_open(struct tty_struct *tty, struct file *filp)
@@ -4694,7 +4681,7 @@ static struct tty_operations stli_ops = {
4694 4681
4695/*****************************************************************************/ 4682/*****************************************************************************/
4696 4683
4697int __init stli_init(void) 4684static int __init stli_init(void)
4698{ 4685{
4699 int i; 4686 int i;
4700 printk(KERN_INFO "%s: version %s\n", stli_drvtitle, stli_drvversion); 4687 printk(KERN_INFO "%s: version %s\n", stli_drvtitle, stli_drvversion);
diff --git a/drivers/char/pc8736x_gpio.c b/drivers/char/pc8736x_gpio.c
index 1c706ccfdb..c860de6a6f 100644
--- a/drivers/char/pc8736x_gpio.c
+++ b/drivers/char/pc8736x_gpio.c
@@ -319,9 +319,10 @@ static int __init pc8736x_gpio_init(void)
319 return 0; 319 return 0;
320 320
321undo_platform_dev_add: 321undo_platform_dev_add:
322 platform_device_put(pdev); 322 platform_device_del(pdev);
323undo_platform_dev_alloc: 323undo_platform_dev_alloc:
324 kfree(pdev); 324 platform_device_put(pdev);
325
325 return rc; 326 return rc;
326} 327}
327 328
diff --git a/drivers/char/scx200_gpio.c b/drivers/char/scx200_gpio.c
index 5a280a3304..45083e5dd2 100644
--- a/drivers/char/scx200_gpio.c
+++ b/drivers/char/scx200_gpio.c
@@ -126,9 +126,10 @@ static int __init scx200_gpio_init(void)
126undo_chrdev_region: 126undo_chrdev_region:
127 unregister_chrdev_region(dev, num_pins); 127 unregister_chrdev_region(dev, num_pins);
128undo_platform_device_add: 128undo_platform_device_add:
129 platform_device_put(pdev); 129 platform_device_del(pdev);
130undo_malloc: 130undo_malloc:
131 kfree(pdev); 131 platform_device_put(pdev);
132
132 return rc; 133 return rc;
133} 134}
134 135
@@ -136,7 +137,6 @@ static void __exit scx200_gpio_cleanup(void)
136{ 137{
137 kfree(scx200_devices); 138 kfree(scx200_devices);
138 unregister_chrdev_region(MKDEV(major, 0), num_pins); 139 unregister_chrdev_region(MKDEV(major, 0), num_pins);
139 platform_device_put(pdev);
140 platform_device_unregister(pdev); 140 platform_device_unregister(pdev);
141 /* kfree(pdev); */ 141 /* kfree(pdev); */
142} 142}
diff --git a/drivers/edac/amd76x_edac.c b/drivers/edac/amd76x_edac.c
index 53423ad6d4..702141c550 100644
--- a/drivers/edac/amd76x_edac.c
+++ b/drivers/edac/amd76x_edac.c
@@ -20,6 +20,9 @@
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include "edac_mc.h" 21#include "edac_mc.h"
22 22
23#define AMD76X_REVISION " Ver: 2.0.0 " __DATE__
24
25
23#define amd76x_printk(level, fmt, arg...) \ 26#define amd76x_printk(level, fmt, arg...) \
24 edac_printk(level, "amd76x", fmt, ##arg) 27 edac_printk(level, "amd76x", fmt, ##arg)
25 28
@@ -102,15 +105,18 @@ static const struct amd76x_dev_info amd76x_devs[] = {
102static void amd76x_get_error_info(struct mem_ctl_info *mci, 105static void amd76x_get_error_info(struct mem_ctl_info *mci,
103 struct amd76x_error_info *info) 106 struct amd76x_error_info *info)
104{ 107{
105 pci_read_config_dword(mci->pdev, AMD76X_ECC_MODE_STATUS, 108 struct pci_dev *pdev;
109
110 pdev = to_pci_dev(mci->dev);
111 pci_read_config_dword(pdev, AMD76X_ECC_MODE_STATUS,
106 &info->ecc_mode_status); 112 &info->ecc_mode_status);
107 113
108 if (info->ecc_mode_status & BIT(8)) 114 if (info->ecc_mode_status & BIT(8))
109 pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS, 115 pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS,
110 (u32) BIT(8), (u32) BIT(8)); 116 (u32) BIT(8), (u32) BIT(8));
111 117
112 if (info->ecc_mode_status & BIT(9)) 118 if (info->ecc_mode_status & BIT(9))
113 pci_write_bits32(mci->pdev, AMD76X_ECC_MODE_STATUS, 119 pci_write_bits32(pdev, AMD76X_ECC_MODE_STATUS,
114 (u32) BIT(9), (u32) BIT(9)); 120 (u32) BIT(9), (u32) BIT(9));
115} 121}
116 122
@@ -176,6 +182,38 @@ static void amd76x_check(struct mem_ctl_info *mci)
176 amd76x_process_error_info(mci, &info, 1); 182 amd76x_process_error_info(mci, &info, 1);
177} 183}
178 184
185static void amd76x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
186 enum edac_type edac_mode)
187{
188 struct csrow_info *csrow;
189 u32 mba, mba_base, mba_mask, dms;
190 int index;
191
192 for (index = 0; index < mci->nr_csrows; index++) {
193 csrow = &mci->csrows[index];
194
195 /* find the DRAM Chip Select Base address and mask */
196 pci_read_config_dword(pdev,
197 AMD76X_MEM_BASE_ADDR + (index * 4),
198 &mba);
199
200 if (!(mba & BIT(0)))
201 continue;
202
203 mba_base = mba & 0xff800000UL;
204 mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
205 pci_read_config_dword(pdev, AMD76X_DRAM_MODE_STATUS, &dms);
206 csrow->first_page = mba_base >> PAGE_SHIFT;
207 csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
208 csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
209 csrow->page_mask = mba_mask >> PAGE_SHIFT;
210 csrow->grain = csrow->nr_pages << PAGE_SHIFT;
211 csrow->mtype = MEM_RDDR;
212 csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
213 csrow->edac_mode = edac_mode;
214 }
215}
216
179/** 217/**
180 * amd76x_probe1 - Perform set up for detected device 218 * amd76x_probe1 - Perform set up for detected device
181 * @pdev; PCI device detected 219 * @pdev; PCI device detected
@@ -187,15 +225,13 @@ static void amd76x_check(struct mem_ctl_info *mci)
187 */ 225 */
188static int amd76x_probe1(struct pci_dev *pdev, int dev_idx) 226static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
189{ 227{
190 int rc = -ENODEV; 228 static const enum edac_type ems_modes[] = {
191 int index;
192 struct mem_ctl_info *mci = NULL;
193 enum edac_type ems_modes[] = {
194 EDAC_NONE, 229 EDAC_NONE,
195 EDAC_EC, 230 EDAC_EC,
196 EDAC_SECDED, 231 EDAC_SECDED,
197 EDAC_SECDED 232 EDAC_SECDED
198 }; 233 };
234 struct mem_ctl_info *mci = NULL;
199 u32 ems; 235 u32 ems;
200 u32 ems_mode; 236 u32 ems_mode;
201 struct amd76x_error_info discard; 237 struct amd76x_error_info discard;
@@ -206,53 +242,28 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
206 mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS); 242 mci = edac_mc_alloc(0, AMD76X_NR_CSROWS, AMD76X_NR_CHANS);
207 243
208 if (mci == NULL) { 244 if (mci == NULL) {
209 rc = -ENOMEM; 245 return -ENOMEM;
210 goto fail;
211 } 246 }
212 247
213 debugf0("%s(): mci = %p\n", __func__, mci); 248 debugf0("%s(): mci = %p\n", __func__, mci);
214 mci->pdev = pdev; 249 mci->dev = &pdev->dev;
215 mci->mtype_cap = MEM_FLAG_RDDR; 250 mci->mtype_cap = MEM_FLAG_RDDR;
216 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; 251 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
217 mci->edac_cap = ems_mode ? 252 mci->edac_cap = ems_mode ?
218 (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE; 253 (EDAC_FLAG_EC | EDAC_FLAG_SECDED) : EDAC_FLAG_NONE;
219 mci->mod_name = EDAC_MOD_STR; 254 mci->mod_name = EDAC_MOD_STR;
220 mci->mod_ver = "$Revision: 1.4.2.5 $"; 255 mci->mod_ver = AMD76X_REVISION;
221 mci->ctl_name = amd76x_devs[dev_idx].ctl_name; 256 mci->ctl_name = amd76x_devs[dev_idx].ctl_name;
222 mci->edac_check = amd76x_check; 257 mci->edac_check = amd76x_check;
223 mci->ctl_page_to_phys = NULL; 258 mci->ctl_page_to_phys = NULL;
224 259
225 for (index = 0; index < mci->nr_csrows; index++) { 260 amd76x_init_csrows(mci, pdev, ems_modes[ems_mode]);
226 struct csrow_info *csrow = &mci->csrows[index];
227 u32 mba;
228 u32 mba_base;
229 u32 mba_mask;
230 u32 dms;
231
232 /* find the DRAM Chip Select Base address and mask */
233 pci_read_config_dword(mci->pdev,
234 AMD76X_MEM_BASE_ADDR + (index * 4), &mba);
235
236 if (!(mba & BIT(0)))
237 continue;
238
239 mba_base = mba & 0xff800000UL;
240 mba_mask = ((mba & 0xff80) << 16) | 0x7fffffUL;
241 pci_read_config_dword(mci->pdev, AMD76X_DRAM_MODE_STATUS,
242 &dms);
243 csrow->first_page = mba_base >> PAGE_SHIFT;
244 csrow->nr_pages = (mba_mask + 1) >> PAGE_SHIFT;
245 csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
246 csrow->page_mask = mba_mask >> PAGE_SHIFT;
247 csrow->grain = csrow->nr_pages << PAGE_SHIFT;
248 csrow->mtype = MEM_RDDR;
249 csrow->dtype = ((dms >> index) & 0x1) ? DEV_X4 : DEV_UNKNOWN;
250 csrow->edac_mode = ems_modes[ems_mode];
251 }
252
253 amd76x_get_error_info(mci, &discard); /* clear counters */ 261 amd76x_get_error_info(mci, &discard); /* clear counters */
254 262
255 if (edac_mc_add_mc(mci)) { 263 /* Here we assume that we will never see multiple instances of this
264 * type of memory controller. The ID is therefore hardcoded to 0.
265 */
266 if (edac_mc_add_mc(mci,0)) {
256 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 267 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
257 goto fail; 268 goto fail;
258 } 269 }
@@ -262,9 +273,8 @@ static int amd76x_probe1(struct pci_dev *pdev, int dev_idx)
262 return 0; 273 return 0;
263 274
264fail: 275fail:
265 if (mci != NULL) 276 edac_mc_free(mci);
266 edac_mc_free(mci); 277 return -ENODEV;
267 return rc;
268} 278}
269 279
270/* returns count (>= 0), or negative on error */ 280/* returns count (>= 0), or negative on error */
@@ -291,7 +301,7 @@ static void __devexit amd76x_remove_one(struct pci_dev *pdev)
291 301
292 debugf0("%s()\n", __func__); 302 debugf0("%s()\n", __func__);
293 303
294 if ((mci = edac_mc_del_mc(pdev)) == NULL) 304 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
295 return; 305 return;
296 306
297 edac_mc_free(mci); 307 edac_mc_free(mci);
diff --git a/drivers/edac/e752x_edac.c b/drivers/edac/e752x_edac.c
index fce31936e6..5351a76739 100644
--- a/drivers/edac/e752x_edac.c
+++ b/drivers/edac/e752x_edac.c
@@ -25,6 +25,8 @@
25#include <linux/slab.h> 25#include <linux/slab.h>
26#include "edac_mc.h" 26#include "edac_mc.h"
27 27
28#define E752X_REVISION " Ver: 2.0.0 " __DATE__
29
28static int force_function_unhide; 30static int force_function_unhide;
29 31
30#define e752x_printk(level, fmt, arg...) \ 32#define e752x_printk(level, fmt, arg...) \
@@ -763,22 +765,174 @@ static void e752x_check(struct mem_ctl_info *mci)
763 e752x_process_error_info(mci, &info, 1); 765 e752x_process_error_info(mci, &info, 1);
764} 766}
765 767
766static int e752x_probe1(struct pci_dev *pdev, int dev_idx) 768/* Return 1 if dual channel mode is active. Else return 0. */
769static inline int dual_channel_active(u16 ddrcsr)
770{
771 return (((ddrcsr >> 12) & 3) == 3);
772}
773
774static void e752x_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
775 u16 ddrcsr)
776{
777 struct csrow_info *csrow;
778 unsigned long last_cumul_size;
779 int index, mem_dev, drc_chan;
780 int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */
781 int drc_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
782 u8 value;
783 u32 dra, drc, cumul_size;
784
785 pci_read_config_dword(pdev, E752X_DRA, &dra);
786 pci_read_config_dword(pdev, E752X_DRC, &drc);
787 drc_chan = dual_channel_active(ddrcsr);
788 drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
789 drc_ddim = (drc >> 20) & 0x3;
790
791 /* The dram row boundary (DRB) reg values are boundary address for
792 * each DRAM row with a granularity of 64 or 128MB (single/dual
793 * channel operation). DRB regs are cumulative; therefore DRB7 will
794 * contain the total memory contained in all eight rows.
795 */
796 for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
797 /* mem_dev 0=x8, 1=x4 */
798 mem_dev = (dra >> (index * 4 + 2)) & 0x3;
799 csrow = &mci->csrows[index];
800
801 mem_dev = (mem_dev == 2);
802 pci_read_config_byte(pdev, E752X_DRB + index, &value);
803 /* convert a 128 or 64 MiB DRB to a page size. */
804 cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
805 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
806 cumul_size);
807 if (cumul_size == last_cumul_size)
808 continue; /* not populated */
809
810 csrow->first_page = last_cumul_size;
811 csrow->last_page = cumul_size - 1;
812 csrow->nr_pages = cumul_size - last_cumul_size;
813 last_cumul_size = cumul_size;
814 csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
815 csrow->mtype = MEM_RDDR; /* only one type supported */
816 csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
817
818 /*
819 * if single channel or x8 devices then SECDED
820 * if dual channel and x4 then S4ECD4ED
821 */
822 if (drc_ddim) {
823 if (drc_chan && mem_dev) {
824 csrow->edac_mode = EDAC_S4ECD4ED;
825 mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
826 } else {
827 csrow->edac_mode = EDAC_SECDED;
828 mci->edac_cap |= EDAC_FLAG_SECDED;
829 }
830 } else
831 csrow->edac_mode = EDAC_NONE;
832 }
833}
834
835static void e752x_init_mem_map_table(struct pci_dev *pdev,
836 struct e752x_pvt *pvt)
767{ 837{
768 int rc = -ENODEV;
769 int index; 838 int index;
839 u8 value, last, row, stat8;
840
841 last = 0;
842 row = 0;
843
844 for (index = 0; index < 8; index += 2) {
845 pci_read_config_byte(pdev, E752X_DRB + index, &value);
846 /* test if there is a dimm in this slot */
847 if (value == last) {
848 /* no dimm in the slot, so flag it as empty */
849 pvt->map[index] = 0xff;
850 pvt->map[index + 1] = 0xff;
851 } else { /* there is a dimm in the slot */
852 pvt->map[index] = row;
853 row++;
854 last = value;
855 /* test the next value to see if the dimm is double
856 * sided
857 */
858 pci_read_config_byte(pdev, E752X_DRB + index + 1,
859 &value);
860 pvt->map[index + 1] = (value == last) ?
861 0xff : /* the dimm is single sided,
862 so flag as empty */
863 row; /* this is a double sided dimm
864 to save the next row # */
865 row++;
866 last = value;
867 }
868 }
869
870 /* set the map type. 1 = normal, 0 = reversed */
871 pci_read_config_byte(pdev, E752X_DRM, &stat8);
872 pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
873}
874
875/* Return 0 on success or 1 on failure. */
876static int e752x_get_devs(struct pci_dev *pdev, int dev_idx,
877 struct e752x_pvt *pvt)
878{
879 struct pci_dev *dev;
880
881 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
882 pvt->dev_info->err_dev,
883 pvt->bridge_ck);
884
885 if (pvt->bridge_ck == NULL)
886 pvt->bridge_ck = pci_scan_single_device(pdev->bus,
887 PCI_DEVFN(0, 1));
888
889 if (pvt->bridge_ck == NULL) {
890 e752x_printk(KERN_ERR, "error reporting device not found:"
891 "vendor %x device 0x%x (broken BIOS?)\n",
892 PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
893 return 1;
894 }
895
896 dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev,
897 NULL);
898
899 if (dev == NULL)
900 goto fail;
901
902 pvt->dev_d0f0 = dev;
903 pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
904
905 return 0;
906
907fail:
908 pci_dev_put(pvt->bridge_ck);
909 return 1;
910}
911
912static void e752x_init_error_reporting_regs(struct e752x_pvt *pvt)
913{
914 struct pci_dev *dev;
915
916 dev = pvt->dev_d0f1;
917 /* Turn off error disable & SMI in case the BIOS turned it on */
918 pci_write_config_byte(dev, E752X_HI_ERRMASK, 0x00);
919 pci_write_config_byte(dev, E752X_HI_SMICMD, 0x00);
920 pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x00);
921 pci_write_config_word(dev, E752X_SYSBUS_SMICMD, 0x00);
922 pci_write_config_byte(dev, E752X_BUF_ERRMASK, 0x00);
923 pci_write_config_byte(dev, E752X_BUF_SMICMD, 0x00);
924 pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00);
925 pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00);
926}
927
928static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
929{
770 u16 pci_data; 930 u16 pci_data;
771 u8 stat8; 931 u8 stat8;
772 struct mem_ctl_info *mci = NULL; 932 struct mem_ctl_info *mci;
773 struct e752x_pvt *pvt = NULL; 933 struct e752x_pvt *pvt;
774 u16 ddrcsr; 934 u16 ddrcsr;
775 u32 drc;
776 int drc_chan; /* Number of channels 0=1chan,1=2chan */ 935 int drc_chan; /* Number of channels 0=1chan,1=2chan */
777 int drc_drbg; /* DRB granularity 0=64mb, 1=128mb */
778 int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
779 u32 dra;
780 unsigned long last_cumul_size;
781 struct pci_dev *dev = NULL;
782 struct e752x_error_info discard; 936 struct e752x_error_info discard;
783 937
784 debugf0("%s(): mci\n", __func__); 938 debugf0("%s(): mci\n", __func__);
@@ -792,25 +946,20 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
792 if (!force_function_unhide && !(stat8 & (1 << 5))) { 946 if (!force_function_unhide && !(stat8 & (1 << 5))) {
793 printk(KERN_INFO "Contact your BIOS vendor to see if the " 947 printk(KERN_INFO "Contact your BIOS vendor to see if the "
794 "E752x error registers can be safely un-hidden\n"); 948 "E752x error registers can be safely un-hidden\n");
795 goto fail; 949 return -ENOMEM;
796 } 950 }
797 stat8 |= (1 << 5); 951 stat8 |= (1 << 5);
798 pci_write_config_byte(pdev, E752X_DEVPRES1, stat8); 952 pci_write_config_byte(pdev, E752X_DEVPRES1, stat8);
799 953
800 /* need to find out the number of channels */
801 pci_read_config_dword(pdev, E752X_DRC, &drc);
802 pci_read_config_word(pdev, E752X_DDRCSR, &ddrcsr); 954 pci_read_config_word(pdev, E752X_DDRCSR, &ddrcsr);
803 /* FIXME: should check >>12 or 0xf, true for all? */ 955 /* FIXME: should check >>12 or 0xf, true for all? */
804 /* Dual channel = 1, Single channel = 0 */ 956 /* Dual channel = 1, Single channel = 0 */
805 drc_chan = (((ddrcsr >> 12) & 3) == 3); 957 drc_chan = dual_channel_active(ddrcsr);
806 drc_drbg = drc_chan + 1; /* 128 in dual mode, 64 in single */
807 drc_ddim = (drc >> 20) & 0x3;
808 958
809 mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1); 959 mci = edac_mc_alloc(sizeof(*pvt), E752X_NR_CSROWS, drc_chan + 1);
810 960
811 if (mci == NULL) { 961 if (mci == NULL) {
812 rc = -ENOMEM; 962 return -ENOMEM;
813 goto fail;
814 } 963 }
815 964
816 debugf3("%s(): init mci\n", __func__); 965 debugf3("%s(): init mci\n", __func__);
@@ -819,159 +968,54 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
819 EDAC_FLAG_S4ECD4ED; 968 EDAC_FLAG_S4ECD4ED;
820 /* FIXME - what if different memory types are in different csrows? */ 969 /* FIXME - what if different memory types are in different csrows? */
821 mci->mod_name = EDAC_MOD_STR; 970 mci->mod_name = EDAC_MOD_STR;
822 mci->mod_ver = "$Revision: 1.5.2.11 $"; 971 mci->mod_ver = E752X_REVISION;
823 mci->pdev = pdev; 972 mci->dev = &pdev->dev;
824 973
825 debugf3("%s(): init pvt\n", __func__); 974 debugf3("%s(): init pvt\n", __func__);
826 pvt = (struct e752x_pvt *) mci->pvt_info; 975 pvt = (struct e752x_pvt *) mci->pvt_info;
827 pvt->dev_info = &e752x_devs[dev_idx]; 976 pvt->dev_info = &e752x_devs[dev_idx];
828 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL, 977 pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
829 pvt->dev_info->err_dev,
830 pvt->bridge_ck);
831
832 if (pvt->bridge_ck == NULL)
833 pvt->bridge_ck = pci_scan_single_device(pdev->bus,
834 PCI_DEVFN(0, 1));
835 978
836 if (pvt->bridge_ck == NULL) { 979 if (e752x_get_devs(pdev, dev_idx, pvt)) {
837 e752x_printk(KERN_ERR, "error reporting device not found:" 980 edac_mc_free(mci);
838 "vendor %x device 0x%x (broken BIOS?)\n", 981 return -ENODEV;
839 PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].err_dev);
840 goto fail;
841 } 982 }
842 983
843 pvt->mc_symmetric = ((ddrcsr & 0x10) != 0);
844 debugf3("%s(): more mci init\n", __func__); 984 debugf3("%s(): more mci init\n", __func__);
845 mci->ctl_name = pvt->dev_info->ctl_name; 985 mci->ctl_name = pvt->dev_info->ctl_name;
846 mci->edac_check = e752x_check; 986 mci->edac_check = e752x_check;
847 mci->ctl_page_to_phys = ctl_page_to_phys; 987 mci->ctl_page_to_phys = ctl_page_to_phys;
848 988
849 /* find out the device types */ 989 e752x_init_csrows(mci, pdev, ddrcsr);
850 pci_read_config_dword(pdev, E752X_DRA, &dra); 990 e752x_init_mem_map_table(pdev, pvt);
851
852 /*
853 * The dram row boundary (DRB) reg values are boundary address for
854 * each DRAM row with a granularity of 64 or 128MB (single/dual
855 * channel operation). DRB regs are cumulative; therefore DRB7 will
856 * contain the total memory contained in all eight rows.
857 */
858 for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
859 u8 value;
860 u32 cumul_size;
861
862 /* mem_dev 0=x8, 1=x4 */
863 int mem_dev = (dra >> (index * 4 + 2)) & 0x3;
864 struct csrow_info *csrow = &mci->csrows[index];
865
866 mem_dev = (mem_dev == 2);
867 pci_read_config_byte(mci->pdev, E752X_DRB + index, &value);
868 /* convert a 128 or 64 MiB DRB to a page size. */
869 cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
870 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
871 cumul_size);
872
873 if (cumul_size == last_cumul_size)
874 continue; /* not populated */
875
876 csrow->first_page = last_cumul_size;
877 csrow->last_page = cumul_size - 1;
878 csrow->nr_pages = cumul_size - last_cumul_size;
879 last_cumul_size = cumul_size;
880 csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
881 csrow->mtype = MEM_RDDR; /* only one type supported */
882 csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
883
884 /*
885 * if single channel or x8 devices then SECDED
886 * if dual channel and x4 then S4ECD4ED
887 */
888 if (drc_ddim) {
889 if (drc_chan && mem_dev) {
890 csrow->edac_mode = EDAC_S4ECD4ED;
891 mci->edac_cap |= EDAC_FLAG_S4ECD4ED;
892 } else {
893 csrow->edac_mode = EDAC_SECDED;
894 mci->edac_cap |= EDAC_FLAG_SECDED;
895 }
896 } else
897 csrow->edac_mode = EDAC_NONE;
898 }
899
900 /* Fill in the memory map table */
901 {
902 u8 value;
903 u8 last = 0;
904 u8 row = 0;
905
906 for (index = 0; index < 8; index += 2) {
907 pci_read_config_byte(mci->pdev, E752X_DRB + index,
908 &value);
909
910 /* test if there is a dimm in this slot */
911 if (value == last) {
912 /* no dimm in the slot, so flag it as empty */
913 pvt->map[index] = 0xff;
914 pvt->map[index + 1] = 0xff;
915 } else { /* there is a dimm in the slot */
916 pvt->map[index] = row;
917 row++;
918 last = value;
919 /* test the next value to see if the dimm is
920 double sided */
921 pci_read_config_byte(mci->pdev,
922 E752X_DRB + index + 1,
923 &value);
924 pvt->map[index + 1] = (value == last) ?
925 0xff : /* the dimm is single sided,
926 * so flag as empty
927 */
928 row; /* this is a double sided dimm
929 * to save the next row #
930 */
931 row++;
932 last = value;
933 }
934 }
935 }
936 991
937 /* set the map type. 1 = normal, 0 = reversed */ 992 /* set the map type. 1 = normal, 0 = reversed */
938 pci_read_config_byte(mci->pdev, E752X_DRM, &stat8); 993 pci_read_config_byte(pdev, E752X_DRM, &stat8);
939 pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f)); 994 pvt->map_type = ((stat8 & 0x0f) > ((stat8 >> 4) & 0x0f));
940 995
941 mci->edac_cap |= EDAC_FLAG_NONE; 996 mci->edac_cap |= EDAC_FLAG_NONE;
942 debugf3("%s(): tolm, remapbase, remaplimit\n", __func__); 997 debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
943 998
944 /* load the top of low memory, remap base, and remap limit vars */ 999 /* load the top of low memory, remap base, and remap limit vars */
945 pci_read_config_word(mci->pdev, E752X_TOLM, &pci_data); 1000 pci_read_config_word(pdev, E752X_TOLM, &pci_data);
946 pvt->tolm = ((u32) pci_data) << 4; 1001 pvt->tolm = ((u32) pci_data) << 4;
947 pci_read_config_word(mci->pdev, E752X_REMAPBASE, &pci_data); 1002 pci_read_config_word(pdev, E752X_REMAPBASE, &pci_data);
948 pvt->remapbase = ((u32) pci_data) << 14; 1003 pvt->remapbase = ((u32) pci_data) << 14;
949 pci_read_config_word(mci->pdev, E752X_REMAPLIMIT, &pci_data); 1004 pci_read_config_word(pdev, E752X_REMAPLIMIT, &pci_data);
950 pvt->remaplimit = ((u32) pci_data) << 14; 1005 pvt->remaplimit = ((u32) pci_data) << 14;
951 e752x_printk(KERN_INFO, 1006 e752x_printk(KERN_INFO,
952 "tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm, 1007 "tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
953 pvt->remapbase, pvt->remaplimit); 1008 pvt->remapbase, pvt->remaplimit);
954 1009
955 if (edac_mc_add_mc(mci)) { 1010 /* Here we assume that we will never see multiple instances of this
1011 * type of memory controller. The ID is therefore hardcoded to 0.
1012 */
1013 if (edac_mc_add_mc(mci,0)) {
956 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 1014 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
957 goto fail; 1015 goto fail;
958 } 1016 }
959 1017
960 dev = pci_get_device(PCI_VENDOR_ID_INTEL, e752x_devs[dev_idx].ctl_dev, 1018 e752x_init_error_reporting_regs(pvt);
961 NULL);
962 pvt->dev_d0f0 = dev;
963 /* find the error reporting device and clear errors */
964 dev = pvt->dev_d0f1 = pci_dev_get(pvt->bridge_ck);
965 /* Turn off error disable & SMI in case the BIOS turned it on */
966 pci_write_config_byte(dev, E752X_HI_ERRMASK, 0x00);
967 pci_write_config_byte(dev, E752X_HI_SMICMD, 0x00);
968 pci_write_config_word(dev, E752X_SYSBUS_ERRMASK, 0x00);
969 pci_write_config_word(dev, E752X_SYSBUS_SMICMD, 0x00);
970 pci_write_config_byte(dev, E752X_BUF_ERRMASK, 0x00);
971 pci_write_config_byte(dev, E752X_BUF_SMICMD, 0x00);
972 pci_write_config_byte(dev, E752X_DRAM_ERRMASK, 0x00);
973 pci_write_config_byte(dev, E752X_DRAM_SMICMD, 0x00);
974
975 e752x_get_error_info(mci, &discard); /* clear other MCH errors */ 1019 e752x_get_error_info(mci, &discard); /* clear other MCH errors */
976 1020
977 /* get this far and it's successful */ 1021 /* get this far and it's successful */
@@ -979,20 +1023,12 @@ static int e752x_probe1(struct pci_dev *pdev, int dev_idx)
979 return 0; 1023 return 0;
980 1024
981fail: 1025fail:
982 if (mci) { 1026 pci_dev_put(pvt->dev_d0f0);
983 if (pvt->dev_d0f0) 1027 pci_dev_put(pvt->dev_d0f1);
984 pci_dev_put(pvt->dev_d0f0); 1028 pci_dev_put(pvt->bridge_ck);
985 1029 edac_mc_free(mci);
986 if (pvt->dev_d0f1)
987 pci_dev_put(pvt->dev_d0f1);
988
989 if (pvt->bridge_ck)
990 pci_dev_put(pvt->bridge_ck);
991
992 edac_mc_free(mci);
993 }
994 1030
995 return rc; 1031 return -ENODEV;
996} 1032}
997 1033
998/* returns count (>= 0), or negative on error */ 1034/* returns count (>= 0), or negative on error */
@@ -1015,7 +1051,7 @@ static void __devexit e752x_remove_one(struct pci_dev *pdev)
1015 1051
1016 debugf0("%s()\n", __func__); 1052 debugf0("%s()\n", __func__);
1017 1053
1018 if ((mci = edac_mc_del_mc(pdev)) == NULL) 1054 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
1019 return; 1055 return;
1020 1056
1021 pvt = (struct e752x_pvt *) mci->pvt_info; 1057 pvt = (struct e752x_pvt *) mci->pvt_info;
diff --git a/drivers/edac/e7xxx_edac.c b/drivers/edac/e7xxx_edac.c
index a9518d3e4b..9878379b49 100644
--- a/drivers/edac/e7xxx_edac.c
+++ b/drivers/edac/e7xxx_edac.c
@@ -30,6 +30,8 @@
30#include <linux/slab.h> 30#include <linux/slab.h>
31#include "edac_mc.h" 31#include "edac_mc.h"
32 32
33#define E7XXX_REVISION " Ver: 2.0.0 " __DATE__
34
33#define e7xxx_printk(level, fmt, arg...) \ 35#define e7xxx_printk(level, fmt, arg...) \
34 edac_printk(level, "e7xxx", fmt, ##arg) 36 edac_printk(level, "e7xxx", fmt, ##arg)
35 37
@@ -333,99 +335,61 @@ static void e7xxx_check(struct mem_ctl_info *mci)
333 e7xxx_process_error_info(mci, &info, 1); 335 e7xxx_process_error_info(mci, &info, 1);
334} 336}
335 337
336static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx) 338/* Return 1 if dual channel mode is active. Else return 0. */
339static inline int dual_channel_active(u32 drc, int dev_idx)
337{ 340{
338 int rc = -ENODEV; 341 return (dev_idx == E7501) ? ((drc >> 22) & 0x1) : 1;
339 int index; 342}
340 u16 pci_data;
341 struct mem_ctl_info *mci = NULL;
342 struct e7xxx_pvt *pvt = NULL;
343 u32 drc;
344 int drc_chan = 1; /* Number of channels 0=1chan,1=2chan */
345 int drc_drbg = 1; /* DRB granularity 0=32mb,1=64mb */
346 int drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
347 u32 dra;
348 unsigned long last_cumul_size;
349 struct e7xxx_error_info discard;
350
351 debugf0("%s(): mci\n", __func__);
352 343
353 /* need to find out the number of channels */
354 pci_read_config_dword(pdev, E7XXX_DRC, &drc);
355 344
345/* Return DRB granularity (0=32mb, 1=64mb). */
346static inline int drb_granularity(u32 drc, int dev_idx)
347{
356 /* only e7501 can be single channel */ 348 /* only e7501 can be single channel */
357 if (dev_idx == E7501) { 349 return (dev_idx == E7501) ? ((drc >> 18) & 0x3) : 1;
358 drc_chan = ((drc >> 22) & 0x1); 350}
359 drc_drbg = (drc >> 18) & 0x3;
360 }
361
362 drc_ddim = (drc >> 20) & 0x3;
363 mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
364
365 if (mci == NULL) {
366 rc = -ENOMEM;
367 goto fail;
368 }
369
370 debugf3("%s(): init mci\n", __func__);
371 mci->mtype_cap = MEM_FLAG_RDDR;
372 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
373 EDAC_FLAG_S4ECD4ED;
374 /* FIXME - what if different memory types are in different csrows? */
375 mci->mod_name = EDAC_MOD_STR;
376 mci->mod_ver = "$Revision: 1.5.2.9 $";
377 mci->pdev = pdev;
378 351
379 debugf3("%s(): init pvt\n", __func__);
380 pvt = (struct e7xxx_pvt *) mci->pvt_info;
381 pvt->dev_info = &e7xxx_devs[dev_idx];
382 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
383 pvt->dev_info->err_dev,
384 pvt->bridge_ck);
385 352
386 if (!pvt->bridge_ck) { 353static void e7xxx_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
387 e7xxx_printk(KERN_ERR, "error reporting device not found:" 354 int dev_idx, u32 drc)
388 "vendor %x device 0x%x (broken BIOS?)\n", 355{
389 PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev); 356 unsigned long last_cumul_size;
390 goto fail; 357 int index;
391 } 358 u8 value;
392 359 u32 dra, cumul_size;
393 debugf3("%s(): more mci init\n", __func__); 360 int drc_chan, drc_drbg, drc_ddim, mem_dev;
394 mci->ctl_name = pvt->dev_info->ctl_name; 361 struct csrow_info *csrow;
395 mci->edac_check = e7xxx_check;
396 mci->ctl_page_to_phys = ctl_page_to_phys;
397 362
398 /* find out the device types */
399 pci_read_config_dword(pdev, E7XXX_DRA, &dra); 363 pci_read_config_dword(pdev, E7XXX_DRA, &dra);
364 drc_chan = dual_channel_active(drc, dev_idx);
365 drc_drbg = drb_granularity(drc, dev_idx);
366 drc_ddim = (drc >> 20) & 0x3;
367 last_cumul_size = 0;
400 368
401 /* 369 /* The dram row boundary (DRB) reg values are boundary address
402 * The dram row boundary (DRB) reg values are boundary address
403 * for each DRAM row with a granularity of 32 or 64MB (single/dual 370 * for each DRAM row with a granularity of 32 or 64MB (single/dual
404 * channel operation). DRB regs are cumulative; therefore DRB7 will 371 * channel operation). DRB regs are cumulative; therefore DRB7 will
405 * contain the total memory contained in all eight rows. 372 * contain the total memory contained in all eight rows.
406 */ 373 */
407 for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) { 374 for (index = 0; index < mci->nr_csrows; index++) {
408 u8 value;
409 u32 cumul_size;
410 /* mem_dev 0=x8, 1=x4 */ 375 /* mem_dev 0=x8, 1=x4 */
411 int mem_dev = (dra >> (index * 4 + 3)) & 0x1; 376 mem_dev = (dra >> (index * 4 + 3)) & 0x1;
412 struct csrow_info *csrow = &mci->csrows[index]; 377 csrow = &mci->csrows[index];
413 378
414 pci_read_config_byte(mci->pdev, E7XXX_DRB + index, &value); 379 pci_read_config_byte(pdev, E7XXX_DRB + index, &value);
415 /* convert a 64 or 32 MiB DRB to a page size. */ 380 /* convert a 64 or 32 MiB DRB to a page size. */
416 cumul_size = value << (25 + drc_drbg - PAGE_SHIFT); 381 cumul_size = value << (25 + drc_drbg - PAGE_SHIFT);
417 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index, 382 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
418 cumul_size); 383 cumul_size);
419
420 if (cumul_size == last_cumul_size) 384 if (cumul_size == last_cumul_size)
421 continue; /* not populated */ 385 continue; /* not populated */
422 386
423 csrow->first_page = last_cumul_size; 387 csrow->first_page = last_cumul_size;
424 csrow->last_page = cumul_size - 1; 388 csrow->last_page = cumul_size - 1;
425 csrow->nr_pages = cumul_size - last_cumul_size; 389 csrow->nr_pages = cumul_size - last_cumul_size;
426 last_cumul_size = cumul_size; 390 last_cumul_size = cumul_size;
427 csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */ 391 csrow->grain = 1 << 12; /* 4KiB - resolution of CELOG */
428 csrow->mtype = MEM_RDDR; /* only one type supported */ 392 csrow->mtype = MEM_RDDR; /* only one type supported */
429 csrow->dtype = mem_dev ? DEV_X4 : DEV_X8; 393 csrow->dtype = mem_dev ? DEV_X4 : DEV_X8;
430 394
431 /* 395 /*
@@ -443,16 +407,61 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
443 } else 407 } else
444 csrow->edac_mode = EDAC_NONE; 408 csrow->edac_mode = EDAC_NONE;
445 } 409 }
410}
446 411
447 mci->edac_cap |= EDAC_FLAG_NONE; 412static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
413{
414 u16 pci_data;
415 struct mem_ctl_info *mci = NULL;
416 struct e7xxx_pvt *pvt = NULL;
417 u32 drc;
418 int drc_chan;
419 struct e7xxx_error_info discard;
420
421 debugf0("%s(): mci\n", __func__);
422 pci_read_config_dword(pdev, E7XXX_DRC, &drc);
423
424 drc_chan = dual_channel_active(drc, dev_idx);
425 mci = edac_mc_alloc(sizeof(*pvt), E7XXX_NR_CSROWS, drc_chan + 1);
426
427 if (mci == NULL)
428 return -ENOMEM;
429
430 debugf3("%s(): init mci\n", __func__);
431 mci->mtype_cap = MEM_FLAG_RDDR;
432 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED |
433 EDAC_FLAG_S4ECD4ED;
434 /* FIXME - what if different memory types are in different csrows? */
435 mci->mod_name = EDAC_MOD_STR;
436 mci->mod_ver = E7XXX_REVISION;
437 mci->dev = &pdev->dev;
438 debugf3("%s(): init pvt\n", __func__);
439 pvt = (struct e7xxx_pvt *) mci->pvt_info;
440 pvt->dev_info = &e7xxx_devs[dev_idx];
441 pvt->bridge_ck = pci_get_device(PCI_VENDOR_ID_INTEL,
442 pvt->dev_info->err_dev,
443 pvt->bridge_ck);
448 444
445 if (!pvt->bridge_ck) {
446 e7xxx_printk(KERN_ERR, "error reporting device not found:"
447 "vendor %x device 0x%x (broken BIOS?)\n",
448 PCI_VENDOR_ID_INTEL, e7xxx_devs[dev_idx].err_dev);
449 goto fail0;
450 }
451
452 debugf3("%s(): more mci init\n", __func__);
453 mci->ctl_name = pvt->dev_info->ctl_name;
454 mci->edac_check = e7xxx_check;
455 mci->ctl_page_to_phys = ctl_page_to_phys;
456 e7xxx_init_csrows(mci, pdev, dev_idx, drc);
457 mci->edac_cap |= EDAC_FLAG_NONE;
449 debugf3("%s(): tolm, remapbase, remaplimit\n", __func__); 458 debugf3("%s(): tolm, remapbase, remaplimit\n", __func__);
450 /* load the top of low memory, remap base, and remap limit vars */ 459 /* load the top of low memory, remap base, and remap limit vars */
451 pci_read_config_word(mci->pdev, E7XXX_TOLM, &pci_data); 460 pci_read_config_word(pdev, E7XXX_TOLM, &pci_data);
452 pvt->tolm = ((u32) pci_data) << 4; 461 pvt->tolm = ((u32) pci_data) << 4;
453 pci_read_config_word(mci->pdev, E7XXX_REMAPBASE, &pci_data); 462 pci_read_config_word(pdev, E7XXX_REMAPBASE, &pci_data);
454 pvt->remapbase = ((u32) pci_data) << 14; 463 pvt->remapbase = ((u32) pci_data) << 14;
455 pci_read_config_word(mci->pdev, E7XXX_REMAPLIMIT, &pci_data); 464 pci_read_config_word(pdev, E7XXX_REMAPLIMIT, &pci_data);
456 pvt->remaplimit = ((u32) pci_data) << 14; 465 pvt->remaplimit = ((u32) pci_data) << 14;
457 e7xxx_printk(KERN_INFO, 466 e7xxx_printk(KERN_INFO,
458 "tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm, 467 "tolm = %x, remapbase = %x, remaplimit = %x\n", pvt->tolm,
@@ -461,23 +470,25 @@ static int e7xxx_probe1(struct pci_dev *pdev, int dev_idx)
461 /* clear any pending errors, or initial state bits */ 470 /* clear any pending errors, or initial state bits */
462 e7xxx_get_error_info(mci, &discard); 471 e7xxx_get_error_info(mci, &discard);
463 472
464 if (edac_mc_add_mc(mci) != 0) { 473 /* Here we assume that we will never see multiple instances of this
474 * type of memory controller. The ID is therefore hardcoded to 0.
475 */
476 if (edac_mc_add_mc(mci,0)) {
465 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 477 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
466 goto fail; 478 goto fail1;
467 } 479 }
468 480
469 /* get this far and it's successful */ 481 /* get this far and it's successful */
470 debugf3("%s(): success\n", __func__); 482 debugf3("%s(): success\n", __func__);
471 return 0; 483 return 0;
472 484
473fail: 485fail1:
474 if (mci != NULL) { 486 pci_dev_put(pvt->bridge_ck);
475 if(pvt != NULL && pvt->bridge_ck) 487
476 pci_dev_put(pvt->bridge_ck); 488fail0:
477 edac_mc_free(mci); 489 edac_mc_free(mci);
478 }
479 490
480 return rc; 491 return -ENODEV;
481} 492}
482 493
483/* returns count (>= 0), or negative on error */ 494/* returns count (>= 0), or negative on error */
@@ -498,7 +509,7 @@ static void __devexit e7xxx_remove_one(struct pci_dev *pdev)
498 509
499 debugf0("%s()\n", __func__); 510 debugf0("%s()\n", __func__);
500 511
501 if ((mci = edac_mc_del_mc(pdev)) == NULL) 512 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
502 return; 513 return;
503 514
504 pvt = (struct e7xxx_pvt *) mci->pvt_info; 515 pvt = (struct e7xxx_pvt *) mci->pvt_info;
diff --git a/drivers/edac/edac_mc.c b/drivers/edac/edac_mc.c
index ea06e3a4dc..357c95f30f 100644
--- a/drivers/edac/edac_mc.c
+++ b/drivers/edac/edac_mc.c
@@ -54,16 +54,17 @@ static int log_ce = 1;
54static int panic_on_ue; 54static int panic_on_ue;
55static int poll_msec = 1000; 55static int poll_msec = 1000;
56 56
57static int check_pci_parity = 0; /* default YES check PCI parity */
58static int panic_on_pci_parity; /* default no panic on PCI Parity */
59static atomic_t pci_parity_count = ATOMIC_INIT(0);
60
61/* lock to memory controller's control array */ 57/* lock to memory controller's control array */
62static DECLARE_MUTEX(mem_ctls_mutex); 58static DECLARE_MUTEX(mem_ctls_mutex);
63static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices); 59static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
64 60
65static struct task_struct *edac_thread; 61static struct task_struct *edac_thread;
66 62
63#ifdef CONFIG_PCI
64static int check_pci_parity = 0; /* default YES check PCI parity */
65static int panic_on_pci_parity; /* default no panic on PCI Parity */
66static atomic_t pci_parity_count = ATOMIC_INIT(0);
67
67/* Structure of the whitelist and blacklist arrays */ 68/* Structure of the whitelist and blacklist arrays */
68struct edac_pci_device_list { 69struct edac_pci_device_list {
69 unsigned int vendor; /* Vendor ID */ 70 unsigned int vendor; /* Vendor ID */
@@ -80,6 +81,12 @@ static int pci_blacklist_count;
80static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES]; 81static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES];
81static int pci_whitelist_count ; 82static int pci_whitelist_count ;
82 83
84#ifndef DISABLE_EDAC_SYSFS
85static struct kobject edac_pci_kobj; /* /sys/devices/system/edac/pci */
86static struct completion edac_pci_kobj_complete;
87#endif /* DISABLE_EDAC_SYSFS */
88#endif /* CONFIG_PCI */
89
83/* START sysfs data and methods */ 90/* START sysfs data and methods */
84 91
85#ifndef DISABLE_EDAC_SYSFS 92#ifndef DISABLE_EDAC_SYSFS
@@ -127,18 +134,15 @@ static struct sysdev_class edac_class = {
127 set_kset_name("edac"), 134 set_kset_name("edac"),
128}; 135};
129 136
130/* sysfs objects: 137/* sysfs object:
131 * /sys/devices/system/edac/mc 138 * /sys/devices/system/edac/mc
132 * /sys/devices/system/edac/pci
133 */ 139 */
134static struct kobject edac_memctrl_kobj; 140static struct kobject edac_memctrl_kobj;
135static struct kobject edac_pci_kobj;
136 141
137/* We use these to wait for the reference counts on edac_memctrl_kobj and 142/* We use these to wait for the reference counts on edac_memctrl_kobj and
138 * edac_pci_kobj to reach 0. 143 * edac_pci_kobj to reach 0.
139 */ 144 */
140static struct completion edac_memctrl_kobj_complete; 145static struct completion edac_memctrl_kobj_complete;
141static struct completion edac_pci_kobj_complete;
142 146
143/* 147/*
144 * /sys/devices/system/edac/mc; 148 * /sys/devices/system/edac/mc;
@@ -324,6 +328,8 @@ static void edac_sysfs_memctrl_teardown(void)
324#endif /* DISABLE_EDAC_SYSFS */ 328#endif /* DISABLE_EDAC_SYSFS */
325} 329}
326 330
331#ifdef CONFIG_PCI
332
327#ifndef DISABLE_EDAC_SYSFS 333#ifndef DISABLE_EDAC_SYSFS
328 334
329/* 335/*
@@ -624,6 +630,252 @@ static void edac_sysfs_pci_teardown(void)
624#endif 630#endif
625} 631}
626 632
633
634static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
635{
636 int where;
637 u16 status;
638
639 where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
640 pci_read_config_word(dev, where, &status);
641
642 /* If we get back 0xFFFF then we must suspect that the card has been
643 * pulled but the Linux PCI layer has not yet finished cleaning up.
644 * We don't want to report on such devices
645 */
646
647 if (status == 0xFFFF) {
648 u32 sanity;
649
650 pci_read_config_dword(dev, 0, &sanity);
651
652 if (sanity == 0xFFFFFFFF)
653 return 0;
654 }
655
656 status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
657 PCI_STATUS_PARITY;
658
659 if (status)
660 /* reset only the bits we are interested in */
661 pci_write_config_word(dev, where, status);
662
663 return status;
664}
665
666typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
667
668/* Clear any PCI parity errors logged by this device. */
669static void edac_pci_dev_parity_clear(struct pci_dev *dev)
670{
671 u8 header_type;
672
673 get_pci_parity_status(dev, 0);
674
675 /* read the device TYPE, looking for bridges */
676 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
677
678 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
679 get_pci_parity_status(dev, 1);
680}
681
682/*
683 * PCI Parity polling
684 *
685 */
686static void edac_pci_dev_parity_test(struct pci_dev *dev)
687{
688 u16 status;
689 u8 header_type;
690
691 /* read the STATUS register on this device
692 */
693 status = get_pci_parity_status(dev, 0);
694
695 debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
696
697 /* check the status reg for errors */
698 if (status) {
699 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
700 edac_printk(KERN_CRIT, EDAC_PCI,
701 "Signaled System Error on %s\n",
702 pci_name(dev));
703
704 if (status & (PCI_STATUS_PARITY)) {
705 edac_printk(KERN_CRIT, EDAC_PCI,
706 "Master Data Parity Error on %s\n",
707 pci_name(dev));
708
709 atomic_inc(&pci_parity_count);
710 }
711
712 if (status & (PCI_STATUS_DETECTED_PARITY)) {
713 edac_printk(KERN_CRIT, EDAC_PCI,
714 "Detected Parity Error on %s\n",
715 pci_name(dev));
716
717 atomic_inc(&pci_parity_count);
718 }
719 }
720
721 /* read the device TYPE, looking for bridges */
722 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
723
724 debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
725
726 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
727 /* On bridges, need to examine secondary status register */
728 status = get_pci_parity_status(dev, 1);
729
730 debugf2("PCI SEC_STATUS= 0x%04x %s\n",
731 status, dev->dev.bus_id );
732
733 /* check the secondary status reg for errors */
734 if (status) {
735 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
736 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
737 "Signaled System Error on %s\n",
738 pci_name(dev));
739
740 if (status & (PCI_STATUS_PARITY)) {
741 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
742 "Master Data Parity Error on "
743 "%s\n", pci_name(dev));
744
745 atomic_inc(&pci_parity_count);
746 }
747
748 if (status & (PCI_STATUS_DETECTED_PARITY)) {
749 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
750 "Detected Parity Error on %s\n",
751 pci_name(dev));
752
753 atomic_inc(&pci_parity_count);
754 }
755 }
756 }
757}
758
759/*
760 * check_dev_on_list: Scan for a PCI device on a white/black list
761 * @list: an EDAC &edac_pci_device_list white/black list pointer
762 * @free_index: index of next free entry on the list
763 * @pci_dev: PCI Device pointer
764 *
765 * see if list contains the device.
766 *
767 * Returns: 0 not found
768 * 1 found on list
769 */
770static int check_dev_on_list(struct edac_pci_device_list *list,
771 int free_index, struct pci_dev *dev)
772{
773 int i;
774 int rc = 0; /* Assume not found */
775 unsigned short vendor=dev->vendor;
776 unsigned short device=dev->device;
777
778 /* Scan the list, looking for a vendor/device match */
779 for (i = 0; i < free_index; i++, list++ ) {
780 if ((list->vendor == vendor ) && (list->device == device )) {
781 rc = 1;
782 break;
783 }
784 }
785
786 return rc;
787}
788
789/*
790 * pci_dev parity list iterator
791 * Scan the PCI device list for one iteration, looking for SERRORs
792 * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
793 */
794static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
795{
796 struct pci_dev *dev = NULL;
797
798 /* request for kernel access to the next PCI device, if any,
799 * and while we are looking at it have its reference count
800 * bumped until we are done with it
801 */
802 while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
803 /* if whitelist exists then it has priority, so only scan
804 * those devices on the whitelist
805 */
806 if (pci_whitelist_count > 0 ) {
807 if (check_dev_on_list(pci_whitelist,
808 pci_whitelist_count, dev))
809 fn(dev);
810 } else {
811 /*
812 * if no whitelist, then check if this devices is
813 * blacklisted
814 */
815 if (!check_dev_on_list(pci_blacklist,
816 pci_blacklist_count, dev))
817 fn(dev);
818 }
819 }
820}
821
822static void do_pci_parity_check(void)
823{
824 unsigned long flags;
825 int before_count;
826
827 debugf3("%s()\n", __func__);
828
829 if (!check_pci_parity)
830 return;
831
832 before_count = atomic_read(&pci_parity_count);
833
834 /* scan all PCI devices looking for a Parity Error on devices and
835 * bridges
836 */
837 local_irq_save(flags);
838 edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
839 local_irq_restore(flags);
840
841 /* Only if operator has selected panic on PCI Error */
842 if (panic_on_pci_parity) {
843 /* If the count is different 'after' from 'before' */
844 if (before_count != atomic_read(&pci_parity_count))
845 panic("EDAC: PCI Parity Error");
846 }
847}
848
849static inline void clear_pci_parity_errors(void)
850{
851 /* Clear any PCI bus parity errors that devices initially have logged
852 * in their registers.
853 */
854 edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
855}
856
857#else /* CONFIG_PCI */
858
859static inline void do_pci_parity_check(void)
860{
861 /* no-op */
862}
863
864static inline void clear_pci_parity_errors(void)
865{
866 /* no-op */
867}
868
869static void edac_sysfs_pci_teardown(void)
870{
871}
872
873static int edac_sysfs_pci_setup(void)
874{
875 return 0;
876}
877#endif /* CONFIG_PCI */
878
627#ifndef DISABLE_EDAC_SYSFS 879#ifndef DISABLE_EDAC_SYSFS
628 880
629/* EDAC sysfs CSROW data structures and methods */ 881/* EDAC sysfs CSROW data structures and methods */
@@ -1132,7 +1384,7 @@ static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
1132 return err; 1384 return err;
1133 1385
1134 /* create a symlink for the device */ 1386 /* create a symlink for the device */
1135 err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj, 1387 err = sysfs_create_link(edac_mci_kobj, &mci->dev->kobj,
1136 EDAC_DEVICE_SYMLINK); 1388 EDAC_DEVICE_SYMLINK);
1137 1389
1138 if (err) 1390 if (err)
@@ -1238,7 +1490,7 @@ void edac_mc_dump_mci(struct mem_ctl_info *mci)
1238 debugf4("\tmci->edac_check = %p\n", mci->edac_check); 1490 debugf4("\tmci->edac_check = %p\n", mci->edac_check);
1239 debugf3("\tmci->nr_csrows = %d, csrows = %p\n", 1491 debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
1240 mci->nr_csrows, mci->csrows); 1492 mci->nr_csrows, mci->csrows);
1241 debugf3("\tpdev = %p\n", mci->pdev); 1493 debugf3("\tdev = %p\n", mci->dev);
1242 debugf3("\tmod_name:ctl_name = %s:%s\n", 1494 debugf3("\tmod_name:ctl_name = %s:%s\n",
1243 mci->mod_name, mci->ctl_name); 1495 mci->mod_name, mci->ctl_name);
1244 debugf3("\tpvt_info = %p\n\n", mci->pvt_info); 1496 debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
@@ -1363,7 +1615,7 @@ void edac_mc_free(struct mem_ctl_info *mci)
1363} 1615}
1364EXPORT_SYMBOL_GPL(edac_mc_free); 1616EXPORT_SYMBOL_GPL(edac_mc_free);
1365 1617
1366static struct mem_ctl_info *find_mci_by_pdev(struct pci_dev *pdev) 1618static struct mem_ctl_info *find_mci_by_dev(struct device *dev)
1367{ 1619{
1368 struct mem_ctl_info *mci; 1620 struct mem_ctl_info *mci;
1369 struct list_head *item; 1621 struct list_head *item;
@@ -1373,54 +1625,53 @@ static struct mem_ctl_info *find_mci_by_pdev(struct pci_dev *pdev)
1373 list_for_each(item, &mc_devices) { 1625 list_for_each(item, &mc_devices) {
1374 mci = list_entry(item, struct mem_ctl_info, link); 1626 mci = list_entry(item, struct mem_ctl_info, link);
1375 1627
1376 if (mci->pdev == pdev) 1628 if (mci->dev == dev)
1377 return mci; 1629 return mci;
1378 } 1630 }
1379 1631
1380 return NULL; 1632 return NULL;
1381} 1633}
1382 1634
1383static int add_mc_to_global_list(struct mem_ctl_info *mci) 1635/* Return 0 on success, 1 on failure.
1636 * Before calling this function, caller must
1637 * assign a unique value to mci->mc_idx.
1638 */
1639static int add_mc_to_global_list (struct mem_ctl_info *mci)
1384{ 1640{
1385 struct list_head *item, *insert_before; 1641 struct list_head *item, *insert_before;
1386 struct mem_ctl_info *p; 1642 struct mem_ctl_info *p;
1387 int i;
1388 1643
1389 if (list_empty(&mc_devices)) { 1644 insert_before = &mc_devices;
1390 mci->mc_idx = 0;
1391 insert_before = &mc_devices;
1392 } else {
1393 if (find_mci_by_pdev(mci->pdev)) {
1394 edac_printk(KERN_WARNING, EDAC_MC,
1395 "%s (%s) %s %s already assigned %d\n",
1396 mci->pdev->dev.bus_id,
1397 pci_name(mci->pdev), mci->mod_name,
1398 mci->ctl_name, mci->mc_idx);
1399 return 1;
1400 }
1401 1645
1402 insert_before = NULL; 1646 if (unlikely((p = find_mci_by_dev(mci->dev)) != NULL))
1403 i = 0; 1647 goto fail0;
1404 1648
1405 list_for_each(item, &mc_devices) { 1649 list_for_each(item, &mc_devices) {
1406 p = list_entry(item, struct mem_ctl_info, link); 1650 p = list_entry(item, struct mem_ctl_info, link);
1407 1651
1408 if (p->mc_idx != i) { 1652 if (p->mc_idx >= mci->mc_idx) {
1409 insert_before = item; 1653 if (unlikely(p->mc_idx == mci->mc_idx))
1410 break; 1654 goto fail1;
1411 }
1412 1655
1413 i++; 1656 insert_before = item;
1657 break;
1414 } 1658 }
1415
1416 mci->mc_idx = i;
1417
1418 if (insert_before == NULL)
1419 insert_before = &mc_devices;
1420 } 1659 }
1421 1660
1422 list_add_tail_rcu(&mci->link, insert_before); 1661 list_add_tail_rcu(&mci->link, insert_before);
1423 return 0; 1662 return 0;
1663
1664fail0:
1665 edac_printk(KERN_WARNING, EDAC_MC,
1666 "%s (%s) %s %s already assigned %d\n", p->dev->bus_id,
1667 dev_name(p->dev), p->mod_name, p->ctl_name, p->mc_idx);
1668 return 1;
1669
1670fail1:
1671 edac_printk(KERN_WARNING, EDAC_MC,
1672 "bug in low-level driver: attempt to assign\n"
1673 " duplicate mc_idx %d in %s()\n", p->mc_idx, __func__);
1674 return 1;
1424} 1675}
1425 1676
1426static void complete_mc_list_del(struct rcu_head *head) 1677static void complete_mc_list_del(struct rcu_head *head)
@@ -1444,6 +1695,7 @@ static void del_mc_from_global_list(struct mem_ctl_info *mci)
1444 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and 1695 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
1445 * create sysfs entries associated with mci structure 1696 * create sysfs entries associated with mci structure
1446 * @mci: pointer to the mci structure to be added to the list 1697 * @mci: pointer to the mci structure to be added to the list
1698 * @mc_idx: A unique numeric identifier to be assigned to the 'mci' structure.
1447 * 1699 *
1448 * Return: 1700 * Return:
1449 * 0 Success 1701 * 0 Success
@@ -1451,9 +1703,10 @@ static void del_mc_from_global_list(struct mem_ctl_info *mci)
1451 */ 1703 */
1452 1704
1453/* FIXME - should a warning be printed if no error detection? correction? */ 1705/* FIXME - should a warning be printed if no error detection? correction? */
1454int edac_mc_add_mc(struct mem_ctl_info *mci) 1706int edac_mc_add_mc(struct mem_ctl_info *mci, int mc_idx)
1455{ 1707{
1456 debugf0("%s()\n", __func__); 1708 debugf0("%s()\n", __func__);
1709 mci->mc_idx = mc_idx;
1457#ifdef CONFIG_EDAC_DEBUG 1710#ifdef CONFIG_EDAC_DEBUG
1458 if (edac_debug_level >= 3) 1711 if (edac_debug_level >= 3)
1459 edac_mc_dump_mci(mci); 1712 edac_mc_dump_mci(mci);
@@ -1486,8 +1739,8 @@ int edac_mc_add_mc(struct mem_ctl_info *mci)
1486 } 1739 }
1487 1740
1488 /* Report action taken */ 1741 /* Report action taken */
1489 edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: PCI %s\n", 1742 edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: DEV %s\n",
1490 mci->mod_name, mci->ctl_name, pci_name(mci->pdev)); 1743 mci->mod_name, mci->ctl_name, dev_name(mci->dev));
1491 1744
1492 up(&mem_ctls_mutex); 1745 up(&mem_ctls_mutex);
1493 return 0; 1746 return 0;
@@ -1504,18 +1757,18 @@ EXPORT_SYMBOL_GPL(edac_mc_add_mc);
1504/** 1757/**
1505 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and 1758 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
1506 * remove mci structure from global list 1759 * remove mci structure from global list
1507 * @pdev: Pointer to 'struct pci_dev' representing mci structure to remove. 1760 * @pdev: Pointer to 'struct device' representing mci structure to remove.
1508 * 1761 *
1509 * Return pointer to removed mci structure, or NULL if device not found. 1762 * Return pointer to removed mci structure, or NULL if device not found.
1510 */ 1763 */
1511struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev) 1764struct mem_ctl_info * edac_mc_del_mc(struct device *dev)
1512{ 1765{
1513 struct mem_ctl_info *mci; 1766 struct mem_ctl_info *mci;
1514 1767
1515 debugf0("MC: %s()\n", __func__); 1768 debugf0("MC: %s()\n", __func__);
1516 down(&mem_ctls_mutex); 1769 down(&mem_ctls_mutex);
1517 1770
1518 if ((mci = find_mci_by_pdev(pdev)) == NULL) { 1771 if ((mci = find_mci_by_dev(dev)) == NULL) {
1519 up(&mem_ctls_mutex); 1772 up(&mem_ctls_mutex);
1520 return NULL; 1773 return NULL;
1521 } 1774 }
@@ -1524,8 +1777,8 @@ struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev)
1524 del_mc_from_global_list(mci); 1777 del_mc_from_global_list(mci);
1525 up(&mem_ctls_mutex); 1778 up(&mem_ctls_mutex);
1526 edac_printk(KERN_INFO, EDAC_MC, 1779 edac_printk(KERN_INFO, EDAC_MC,
1527 "Removed device %d for %s %s: PCI %s\n", mci->mc_idx, 1780 "Removed device %d for %s %s: DEV %s\n", mci->mc_idx,
1528 mci->mod_name, mci->ctl_name, pci_name(mci->pdev)); 1781 mci->mod_name, mci->ctl_name, dev_name(mci->dev));
1529 return mci; 1782 return mci;
1530} 1783}
1531EXPORT_SYMBOL_GPL(edac_mc_del_mc); 1784EXPORT_SYMBOL_GPL(edac_mc_del_mc);
@@ -1739,244 +1992,6 @@ void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
1739} 1992}
1740EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info); 1993EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
1741 1994
1742#ifdef CONFIG_PCI
1743
1744static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
1745{
1746 int where;
1747 u16 status;
1748
1749 where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
1750 pci_read_config_word(dev, where, &status);
1751
1752 /* If we get back 0xFFFF then we must suspect that the card has been
1753 * pulled but the Linux PCI layer has not yet finished cleaning up.
1754 * We don't want to report on such devices
1755 */
1756
1757 if (status == 0xFFFF) {
1758 u32 sanity;
1759
1760 pci_read_config_dword(dev, 0, &sanity);
1761
1762 if (sanity == 0xFFFFFFFF)
1763 return 0;
1764 }
1765
1766 status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
1767 PCI_STATUS_PARITY;
1768
1769 if (status)
1770 /* reset only the bits we are interested in */
1771 pci_write_config_word(dev, where, status);
1772
1773 return status;
1774}
1775
1776typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
1777
1778/* Clear any PCI parity errors logged by this device. */
1779static void edac_pci_dev_parity_clear(struct pci_dev *dev)
1780{
1781 u8 header_type;
1782
1783 get_pci_parity_status(dev, 0);
1784
1785 /* read the device TYPE, looking for bridges */
1786 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
1787
1788 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
1789 get_pci_parity_status(dev, 1);
1790}
1791
1792/*
1793 * PCI Parity polling
1794 *
1795 */
1796static void edac_pci_dev_parity_test(struct pci_dev *dev)
1797{
1798 u16 status;
1799 u8 header_type;
1800
1801 /* read the STATUS register on this device
1802 */
1803 status = get_pci_parity_status(dev, 0);
1804
1805 debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
1806
1807 /* check the status reg for errors */
1808 if (status) {
1809 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
1810 edac_printk(KERN_CRIT, EDAC_PCI,
1811 "Signaled System Error on %s\n",
1812 pci_name(dev));
1813
1814 if (status & (PCI_STATUS_PARITY)) {
1815 edac_printk(KERN_CRIT, EDAC_PCI,
1816 "Master Data Parity Error on %s\n",
1817 pci_name(dev));
1818
1819 atomic_inc(&pci_parity_count);
1820 }
1821
1822 if (status & (PCI_STATUS_DETECTED_PARITY)) {
1823 edac_printk(KERN_CRIT, EDAC_PCI,
1824 "Detected Parity Error on %s\n",
1825 pci_name(dev));
1826
1827 atomic_inc(&pci_parity_count);
1828 }
1829 }
1830
1831 /* read the device TYPE, looking for bridges */
1832 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
1833
1834 debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
1835
1836 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1837 /* On bridges, need to examine secondary status register */
1838 status = get_pci_parity_status(dev, 1);
1839
1840 debugf2("PCI SEC_STATUS= 0x%04x %s\n",
1841 status, dev->dev.bus_id );
1842
1843 /* check the secondary status reg for errors */
1844 if (status) {
1845 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
1846 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
1847 "Signaled System Error on %s\n",
1848 pci_name(dev));
1849
1850 if (status & (PCI_STATUS_PARITY)) {
1851 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
1852 "Master Data Parity Error on "
1853 "%s\n", pci_name(dev));
1854
1855 atomic_inc(&pci_parity_count);
1856 }
1857
1858 if (status & (PCI_STATUS_DETECTED_PARITY)) {
1859 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
1860 "Detected Parity Error on %s\n",
1861 pci_name(dev));
1862
1863 atomic_inc(&pci_parity_count);
1864 }
1865 }
1866 }
1867}
1868
1869/*
1870 * check_dev_on_list: Scan for a PCI device on a white/black list
1871 * @list: an EDAC &edac_pci_device_list white/black list pointer
1872 * @free_index: index of next free entry on the list
1873 * @pci_dev: PCI Device pointer
1874 *
1875 * see if list contains the device.
1876 *
1877 * Returns: 0 not found
1878 * 1 found on list
1879 */
1880static int check_dev_on_list(struct edac_pci_device_list *list,
1881 int free_index, struct pci_dev *dev)
1882{
1883 int i;
1884 int rc = 0; /* Assume not found */
1885 unsigned short vendor=dev->vendor;
1886 unsigned short device=dev->device;
1887
1888 /* Scan the list, looking for a vendor/device match */
1889 for (i = 0; i < free_index; i++, list++ ) {
1890 if ((list->vendor == vendor ) && (list->device == device )) {
1891 rc = 1;
1892 break;
1893 }
1894 }
1895
1896 return rc;
1897}
1898
1899/*
1900 * pci_dev parity list iterator
1901 * Scan the PCI device list for one iteration, looking for SERRORs
1902 * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
1903 */
1904static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
1905{
1906 struct pci_dev *dev = NULL;
1907
1908 /* request for kernel access to the next PCI device, if any,
1909 * and while we are looking at it have its reference count
1910 * bumped until we are done with it
1911 */
1912 while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
1913 /* if whitelist exists then it has priority, so only scan
1914 * those devices on the whitelist
1915 */
1916 if (pci_whitelist_count > 0 ) {
1917 if (check_dev_on_list(pci_whitelist,
1918 pci_whitelist_count, dev))
1919 fn(dev);
1920 } else {
1921 /*
1922 * if no whitelist, then check if this devices is
1923 * blacklisted
1924 */
1925 if (!check_dev_on_list(pci_blacklist,
1926 pci_blacklist_count, dev))
1927 fn(dev);
1928 }
1929 }
1930}
1931
1932static void do_pci_parity_check(void)
1933{
1934 unsigned long flags;
1935 int before_count;
1936
1937 debugf3("%s()\n", __func__);
1938
1939 if (!check_pci_parity)
1940 return;
1941
1942 before_count = atomic_read(&pci_parity_count);
1943
1944 /* scan all PCI devices looking for a Parity Error on devices and
1945 * bridges
1946 */
1947 local_irq_save(flags);
1948 edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
1949 local_irq_restore(flags);
1950
1951 /* Only if operator has selected panic on PCI Error */
1952 if (panic_on_pci_parity) {
1953 /* If the count is different 'after' from 'before' */
1954 if (before_count != atomic_read(&pci_parity_count))
1955 panic("EDAC: PCI Parity Error");
1956 }
1957}
1958
1959static inline void clear_pci_parity_errors(void)
1960{
1961 /* Clear any PCI bus parity errors that devices initially have logged
1962 * in their registers.
1963 */
1964 edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
1965}
1966
1967#else /* CONFIG_PCI */
1968
1969static inline void do_pci_parity_check(void)
1970{
1971 /* no-op */
1972}
1973
1974static inline void clear_pci_parity_errors(void)
1975{
1976 /* no-op */
1977}
1978
1979#endif /* CONFIG_PCI */
1980 1995
1981/* 1996/*
1982 * Iterate over all MC instances and check for ECC, et al, errors 1997 * Iterate over all MC instances and check for ECC, et al, errors
@@ -2096,10 +2111,12 @@ MODULE_DESCRIPTION("Core library routines for MC reporting");
2096 2111
2097module_param(panic_on_ue, int, 0644); 2112module_param(panic_on_ue, int, 0644);
2098MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on"); 2113MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
2114#ifdef CONFIG_PCI
2099module_param(check_pci_parity, int, 0644); 2115module_param(check_pci_parity, int, 0644);
2100MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on"); 2116MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
2101module_param(panic_on_pci_parity, int, 0644); 2117module_param(panic_on_pci_parity, int, 0644);
2102MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on"); 2118MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
2119#endif
2103module_param(log_ue, int, 0644); 2120module_param(log_ue, int, 0644);
2104MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on"); 2121MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
2105module_param(log_ce, int, 0644); 2122module_param(log_ce, int, 0644);
diff --git a/drivers/edac/edac_mc.h b/drivers/edac/edac_mc.h
index 8d9e83909b..342979677d 100644
--- a/drivers/edac/edac_mc.h
+++ b/drivers/edac/edac_mc.h
@@ -88,6 +88,12 @@ extern int edac_debug_level;
88#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \ 88#define PCI_VEND_DEV(vend, dev) PCI_VENDOR_ID_ ## vend, \
89 PCI_DEVICE_ID_ ## vend ## _ ## dev 89 PCI_DEVICE_ID_ ## vend ## _ ## dev
90 90
91#if defined(CONFIG_X86) && defined(CONFIG_PCI)
92#define dev_name(dev) pci_name(to_pci_dev(dev))
93#else
94#define dev_name(dev) to_platform_device(dev)->name
95#endif
96
91/* memory devices */ 97/* memory devices */
92enum dev_type { 98enum dev_type {
93 DEV_UNKNOWN = 0, 99 DEV_UNKNOWN = 0,
@@ -327,10 +333,10 @@ struct mem_ctl_info {
327 struct csrow_info *csrows; 333 struct csrow_info *csrows;
328 /* 334 /*
329 * FIXME - what about controllers on other busses? - IDs must be 335 * FIXME - what about controllers on other busses? - IDs must be
330 * unique. pdev pointer should be sufficiently unique, but 336 * unique. dev pointer should be sufficiently unique, but
331 * BUS:SLOT.FUNC numbers may not be unique. 337 * BUS:SLOT.FUNC numbers may not be unique.
332 */ 338 */
333 struct pci_dev *pdev; 339 struct device *dev;
334 const char *mod_name; 340 const char *mod_name;
335 const char *mod_ver; 341 const char *mod_ver;
336 const char *ctl_name; 342 const char *ctl_name;
@@ -353,6 +359,8 @@ struct mem_ctl_info {
353 struct completion kobj_complete; 359 struct completion kobj_complete;
354}; 360};
355 361
362#ifdef CONFIG_PCI
363
356/* write all or some bits in a byte-register*/ 364/* write all or some bits in a byte-register*/
357static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value, 365static inline void pci_write_bits8(struct pci_dev *pdev, int offset, u8 value,
358 u8 mask) 366 u8 mask)
@@ -401,14 +409,16 @@ static inline void pci_write_bits32(struct pci_dev *pdev, int offset,
401 pci_write_config_dword(pdev, offset, value); 409 pci_write_config_dword(pdev, offset, value);
402} 410}
403 411
412#endif /* CONFIG_PCI */
413
404#ifdef CONFIG_EDAC_DEBUG 414#ifdef CONFIG_EDAC_DEBUG
405void edac_mc_dump_channel(struct channel_info *chan); 415void edac_mc_dump_channel(struct channel_info *chan);
406void edac_mc_dump_mci(struct mem_ctl_info *mci); 416void edac_mc_dump_mci(struct mem_ctl_info *mci);
407void edac_mc_dump_csrow(struct csrow_info *csrow); 417void edac_mc_dump_csrow(struct csrow_info *csrow);
408#endif /* CONFIG_EDAC_DEBUG */ 418#endif /* CONFIG_EDAC_DEBUG */
409 419
410extern int edac_mc_add_mc(struct mem_ctl_info *mci); 420extern int edac_mc_add_mc(struct mem_ctl_info *mci,int mc_idx);
411extern struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev); 421extern struct mem_ctl_info * edac_mc_del_mc(struct device *dev);
412extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, 422extern int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci,
413 unsigned long page); 423 unsigned long page);
414extern void edac_mc_scrub_block(unsigned long page, unsigned long offset, 424extern void edac_mc_scrub_block(unsigned long page, unsigned long offset,
diff --git a/drivers/edac/i82860_edac.c b/drivers/edac/i82860_edac.c
index fd342163cf..d196dcc850 100644
--- a/drivers/edac/i82860_edac.c
+++ b/drivers/edac/i82860_edac.c
@@ -17,6 +17,8 @@
17#include <linux/slab.h> 17#include <linux/slab.h>
18#include "edac_mc.h" 18#include "edac_mc.h"
19 19
20#define I82860_REVISION " Ver: 2.0.0 " __DATE__
21
20#define i82860_printk(level, fmt, arg...) \ 22#define i82860_printk(level, fmt, arg...) \
21 edac_printk(level, "i82860", fmt, ##arg) 23 edac_printk(level, "i82860", fmt, ##arg)
22 24
@@ -63,17 +65,21 @@ static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code
63static void i82860_get_error_info(struct mem_ctl_info *mci, 65static void i82860_get_error_info(struct mem_ctl_info *mci,
64 struct i82860_error_info *info) 66 struct i82860_error_info *info)
65{ 67{
68 struct pci_dev *pdev;
69
70 pdev = to_pci_dev(mci->dev);
71
66 /* 72 /*
67 * This is a mess because there is no atomic way to read all the 73 * This is a mess because there is no atomic way to read all the
68 * registers at once and the registers can transition from CE being 74 * registers at once and the registers can transition from CE being
69 * overwritten by UE. 75 * overwritten by UE.
70 */ 76 */
71 pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts); 77 pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts);
72 pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap); 78 pci_read_config_dword(pdev, I82860_EAP, &info->eap);
73 pci_read_config_word(mci->pdev, I82860_DERRCTL_STS, &info->derrsyn); 79 pci_read_config_word(pdev, I82860_DERRCTL_STS, &info->derrsyn);
74 pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts2); 80 pci_read_config_word(pdev, I82860_ERRSTS, &info->errsts2);
75 81
76 pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003); 82 pci_write_bits16(pdev, I82860_ERRSTS, 0x0003, 0x0003);
77 83
78 /* 84 /*
79 * If the error is the same for both reads then the first set of reads 85 * If the error is the same for both reads then the first set of reads
@@ -84,8 +90,8 @@ static void i82860_get_error_info(struct mem_ctl_info *mci,
84 return; 90 return;
85 91
86 if ((info->errsts ^ info->errsts2) & 0x0003) { 92 if ((info->errsts ^ info->errsts2) & 0x0003) {
87 pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap); 93 pci_read_config_dword(pdev, I82860_EAP, &info->eap);
88 pci_read_config_word(mci->pdev, I82860_DERRCTL_STS, 94 pci_read_config_word(pdev, I82860_DERRCTL_STS,
89 &info->derrsyn); 95 &info->derrsyn);
90 } 96 }
91} 97}
@@ -127,15 +133,50 @@ static void i82860_check(struct mem_ctl_info *mci)
127 i82860_process_error_info(mci, &info, 1); 133 i82860_process_error_info(mci, &info, 1);
128} 134}
129 135
130static int i82860_probe1(struct pci_dev *pdev, int dev_idx) 136static void i82860_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev)
131{ 137{
132 int rc = -ENODEV;
133 int index;
134 struct mem_ctl_info *mci = NULL;
135 unsigned long last_cumul_size; 138 unsigned long last_cumul_size;
136 struct i82860_error_info discard; 139 u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none, 2=edac */
140 u16 value;
141 u32 cumul_size;
142 struct csrow_info *csrow;
143 int index;
144
145 pci_read_config_word(pdev, I82860_MCHCFG, &mchcfg_ddim);
146 mchcfg_ddim = mchcfg_ddim & 0x180;
147 last_cumul_size = 0;
148
149 /* The group row boundary (GRA) reg values are boundary address
150 * for each DRAM row with a granularity of 16MB. GRA regs are
151 * cumulative; therefore GRA15 will contain the total memory contained
152 * in all eight rows.
153 */
154 for (index = 0; index < mci->nr_csrows; index++) {
155 csrow = &mci->csrows[index];
156 pci_read_config_word(pdev, I82860_GBA + index * 2, &value);
157 cumul_size = (value & I82860_GBA_MASK) <<
158 (I82860_GBA_SHIFT - PAGE_SHIFT);
159 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
160 cumul_size);
137 161
138 u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */ 162 if (cumul_size == last_cumul_size)
163 continue; /* not populated */
164
165 csrow->first_page = last_cumul_size;
166 csrow->last_page = cumul_size - 1;
167 csrow->nr_pages = cumul_size - last_cumul_size;
168 last_cumul_size = cumul_size;
169 csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
170 csrow->mtype = MEM_RMBS;
171 csrow->dtype = DEV_UNKNOWN;
172 csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
173 }
174}
175
176static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
177{
178 struct mem_ctl_info *mci;
179 struct i82860_error_info discard;
139 180
140 /* RDRAM has channels but these don't map onto the abstractions that 181 /* RDRAM has channels but these don't map onto the abstractions that
141 edac uses. 182 edac uses.
@@ -151,67 +192,35 @@ static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
151 return -ENOMEM; 192 return -ENOMEM;
152 193
153 debugf3("%s(): init mci\n", __func__); 194 debugf3("%s(): init mci\n", __func__);
154 mci->pdev = pdev; 195 mci->dev = &pdev->dev;
155 mci->mtype_cap = MEM_FLAG_DDR; 196 mci->mtype_cap = MEM_FLAG_DDR;
156
157 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED; 197 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
158 /* I"m not sure about this but I think that all RDRAM is SECDED */ 198 /* I"m not sure about this but I think that all RDRAM is SECDED */
159 mci->edac_cap = EDAC_FLAG_SECDED; 199 mci->edac_cap = EDAC_FLAG_SECDED;
160 /* adjust FLAGS */
161
162 mci->mod_name = EDAC_MOD_STR; 200 mci->mod_name = EDAC_MOD_STR;
163 mci->mod_ver = "$Revision: 1.1.2.6 $"; 201 mci->mod_ver = I82860_REVISION;
164 mci->ctl_name = i82860_devs[dev_idx].ctl_name; 202 mci->ctl_name = i82860_devs[dev_idx].ctl_name;
165 mci->edac_check = i82860_check; 203 mci->edac_check = i82860_check;
166 mci->ctl_page_to_phys = NULL; 204 mci->ctl_page_to_phys = NULL;
205 i82860_init_csrows(mci, pdev);
206 i82860_get_error_info(mci, &discard); /* clear counters */
167 207
168 pci_read_config_word(mci->pdev, I82860_MCHCFG, &mchcfg_ddim); 208 /* Here we assume that we will never see multiple instances of this
169 mchcfg_ddim = mchcfg_ddim & 0x180; 209 * type of memory controller. The ID is therefore hardcoded to 0.
170
171 /*
172 * The group row boundary (GRA) reg values are boundary address
173 * for each DRAM row with a granularity of 16MB. GRA regs are
174 * cumulative; therefore GRA15 will contain the total memory contained
175 * in all eight rows.
176 */ 210 */
177 for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) { 211 if (edac_mc_add_mc(mci,0)) {
178 u16 value; 212 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
179 u32 cumul_size; 213 goto fail;
180 struct csrow_info *csrow = &mci->csrows[index];
181
182 pci_read_config_word(mci->pdev, I82860_GBA + index * 2,
183 &value);
184
185 cumul_size = (value & I82860_GBA_MASK) <<
186 (I82860_GBA_SHIFT - PAGE_SHIFT);
187 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
188 cumul_size);
189
190 if (cumul_size == last_cumul_size)
191 continue; /* not populated */
192
193 csrow->first_page = last_cumul_size;
194 csrow->last_page = cumul_size - 1;
195 csrow->nr_pages = cumul_size - last_cumul_size;
196 last_cumul_size = cumul_size;
197 csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
198 csrow->mtype = MEM_RMBS;
199 csrow->dtype = DEV_UNKNOWN;
200 csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
201 } 214 }
202 215
203 i82860_get_error_info(mci, &discard); /* clear counters */ 216 /* get this far and it's successful */
217 debugf3("%s(): success\n", __func__);
204 218
205 if (edac_mc_add_mc(mci)) { 219 return 0;
206 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
207 edac_mc_free(mci);
208 } else {
209 /* get this far and it's successful */
210 debugf3("%s(): success\n", __func__);
211 rc = 0;
212 }
213 220
214 return rc; 221fail:
222 edac_mc_free(mci);
223 return -ENODEV;
215} 224}
216 225
217/* returns count (>= 0), or negative on error */ 226/* returns count (>= 0), or negative on error */
@@ -240,7 +249,7 @@ static void __devexit i82860_remove_one(struct pci_dev *pdev)
240 249
241 debugf0("%s()\n", __func__); 250 debugf0("%s()\n", __func__);
242 251
243 if ((mci = edac_mc_del_mc(pdev)) == NULL) 252 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
244 return; 253 return;
245 254
246 edac_mc_free(mci); 255 edac_mc_free(mci);
diff --git a/drivers/edac/i82875p_edac.c b/drivers/edac/i82875p_edac.c
index 0aec92698f..6787403463 100644
--- a/drivers/edac/i82875p_edac.c
+++ b/drivers/edac/i82875p_edac.c
@@ -21,6 +21,8 @@
21#include <linux/slab.h> 21#include <linux/slab.h>
22#include "edac_mc.h" 22#include "edac_mc.h"
23 23
24#define I82875P_REVISION " Ver: 2.0.0 " __DATE__
25
24#define i82875p_printk(level, fmt, arg...) \ 26#define i82875p_printk(level, fmt, arg...) \
25 edac_printk(level, "i82875p", fmt, ##arg) 27 edac_printk(level, "i82875p", fmt, ##arg)
26 28
@@ -185,18 +187,22 @@ static int i82875p_registered = 1;
185static void i82875p_get_error_info(struct mem_ctl_info *mci, 187static void i82875p_get_error_info(struct mem_ctl_info *mci,
186 struct i82875p_error_info *info) 188 struct i82875p_error_info *info)
187{ 189{
190 struct pci_dev *pdev;
191
192 pdev = to_pci_dev(mci->dev);
193
188 /* 194 /*
189 * This is a mess because there is no atomic way to read all the 195 * This is a mess because there is no atomic way to read all the
190 * registers at once and the registers can transition from CE being 196 * registers at once and the registers can transition from CE being
191 * overwritten by UE. 197 * overwritten by UE.
192 */ 198 */
193 pci_read_config_word(mci->pdev, I82875P_ERRSTS, &info->errsts); 199 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts);
194 pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap); 200 pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
195 pci_read_config_byte(mci->pdev, I82875P_DES, &info->des); 201 pci_read_config_byte(pdev, I82875P_DES, &info->des);
196 pci_read_config_byte(mci->pdev, I82875P_DERRSYN, &info->derrsyn); 202 pci_read_config_byte(pdev, I82875P_DERRSYN, &info->derrsyn);
197 pci_read_config_word(mci->pdev, I82875P_ERRSTS, &info->errsts2); 203 pci_read_config_word(pdev, I82875P_ERRSTS, &info->errsts2);
198 204
199 pci_write_bits16(mci->pdev, I82875P_ERRSTS, 0x0081, 0x0081); 205 pci_write_bits16(pdev, I82875P_ERRSTS, 0x0081, 0x0081);
200 206
201 /* 207 /*
202 * If the error is the same then we can for both reads then 208 * If the error is the same then we can for both reads then
@@ -208,9 +214,9 @@ static void i82875p_get_error_info(struct mem_ctl_info *mci,
208 return; 214 return;
209 215
210 if ((info->errsts ^ info->errsts2) & 0x0081) { 216 if ((info->errsts ^ info->errsts2) & 0x0081) {
211 pci_read_config_dword(mci->pdev, I82875P_EAP, &info->eap); 217 pci_read_config_dword(pdev, I82875P_EAP, &info->eap);
212 pci_read_config_byte(mci->pdev, I82875P_DES, &info->des); 218 pci_read_config_byte(pdev, I82875P_DES, &info->des);
213 pci_read_config_byte(mci->pdev, I82875P_DERRSYN, 219 pci_read_config_byte(pdev, I82875P_DERRSYN,
214 &info->derrsyn); 220 &info->derrsyn);
215 } 221 }
216} 222}
@@ -259,116 +265,109 @@ static void i82875p_check(struct mem_ctl_info *mci)
259extern int pci_proc_attach_device(struct pci_dev *); 265extern int pci_proc_attach_device(struct pci_dev *);
260#endif 266#endif
261 267
262static int i82875p_probe1(struct pci_dev *pdev, int dev_idx) 268/* Return 0 on success or 1 on failure. */
269static int i82875p_setup_overfl_dev(struct pci_dev *pdev,
270 struct pci_dev **ovrfl_pdev, void __iomem **ovrfl_window)
263{ 271{
264 int rc = -ENODEV; 272 struct pci_dev *dev;
265 int index; 273 void __iomem *window;
266 struct mem_ctl_info *mci = NULL;
267 struct i82875p_pvt *pvt = NULL;
268 unsigned long last_cumul_size;
269 struct pci_dev *ovrfl_pdev;
270 void __iomem *ovrfl_window = NULL;
271 u32 drc;
272 u32 drc_chan; /* Number of channels 0=1chan,1=2chan */
273 u32 nr_chans;
274 u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
275 struct i82875p_error_info discard;
276 274
277 debugf0("%s()\n", __func__); 275 *ovrfl_pdev = NULL;
278 ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL); 276 *ovrfl_window = NULL;
277 dev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
279 278
280 if (!ovrfl_pdev) { 279 if (dev == NULL) {
281 /* 280 /* Intel tells BIOS developers to hide device 6 which
282 * Intel tells BIOS developers to hide device 6 which
283 * configures the overflow device access containing 281 * configures the overflow device access containing
284 * the DRBs - this is where we expose device 6. 282 * the DRBs - this is where we expose device 6.
285 * http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm 283 * http://www.x86-secret.com/articles/tweak/pat/patsecrets-2.htm
286 */ 284 */
287 pci_write_bits8(pdev, 0xf4, 0x2, 0x2); 285 pci_write_bits8(pdev, 0xf4, 0x2, 0x2);
288 ovrfl_pdev = 286 dev = pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
289 pci_scan_single_device(pdev->bus, PCI_DEVFN(6, 0));
290 287
291 if (!ovrfl_pdev) 288 if (dev == NULL)
292 return -ENODEV; 289 return 1;
293 } 290 }
294 291
292 *ovrfl_pdev = dev;
293
295#ifdef CONFIG_PROC_FS 294#ifdef CONFIG_PROC_FS
296 if (!ovrfl_pdev->procent && pci_proc_attach_device(ovrfl_pdev)) { 295 if ((dev->procent == NULL) && pci_proc_attach_device(dev)) {
297 i82875p_printk(KERN_ERR, 296 i82875p_printk(KERN_ERR, "%s(): Failed to attach overflow "
298 "%s(): Failed to attach overflow device\n", __func__); 297 "device\n", __func__);
299 return -ENODEV; 298 return 1;
300 } 299 }
301#endif 300#endif /* CONFIG_PROC_FS */
302 /* CONFIG_PROC_FS */ 301 if (pci_enable_device(dev)) {
303 if (pci_enable_device(ovrfl_pdev)) { 302 i82875p_printk(KERN_ERR, "%s(): Failed to enable overflow "
304 i82875p_printk(KERN_ERR, 303 "device\n", __func__);
305 "%s(): Failed to enable overflow device\n", __func__); 304 return 1;
306 return -ENODEV;
307 } 305 }
308 306
309 if (pci_request_regions(ovrfl_pdev, pci_name(ovrfl_pdev))) { 307 if (pci_request_regions(dev, pci_name(dev))) {
310#ifdef CORRECT_BIOS 308#ifdef CORRECT_BIOS
311 goto fail0; 309 goto fail0;
312#endif 310#endif
313 } 311 }
314 312
315 /* cache is irrelevant for PCI bus reads/writes */ 313 /* cache is irrelevant for PCI bus reads/writes */
316 ovrfl_window = ioremap_nocache(pci_resource_start(ovrfl_pdev, 0), 314 window = ioremap_nocache(pci_resource_start(dev, 0),
317 pci_resource_len(ovrfl_pdev, 0)); 315 pci_resource_len(dev, 0));
318 316
319 if (!ovrfl_window) { 317 if (window == NULL) {
320 i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n", 318 i82875p_printk(KERN_ERR, "%s(): Failed to ioremap bar6\n",
321 __func__); 319 __func__);
322 goto fail1; 320 goto fail1;
323 } 321 }
324 322
325 /* need to find out the number of channels */ 323 *ovrfl_window = window;
326 drc = readl(ovrfl_window + I82875P_DRC); 324 return 0;
327 drc_chan = ((drc >> 21) & 0x1);
328 nr_chans = drc_chan + 1;
329 325
330 drc_ddim = (drc >> 18) & 0x1; 326fail1:
331 mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans), 327 pci_release_regions(dev);
332 nr_chans);
333 328
334 if (!mci) { 329#ifdef CORRECT_BIOS
335 rc = -ENOMEM; 330fail0:
336 goto fail2; 331 pci_disable_device(dev);
337 } 332#endif
333 /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
334 return 1;
335}
338 336
339 debugf3("%s(): init mci\n", __func__);
340 mci->pdev = pdev;
341 mci->mtype_cap = MEM_FLAG_DDR;
342 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
343 mci->edac_cap = EDAC_FLAG_UNKNOWN;
344 /* adjust FLAGS */
345 337
346 mci->mod_name = EDAC_MOD_STR; 338/* Return 1 if dual channel mode is active. Else return 0. */
347 mci->mod_ver = "$Revision: 1.5.2.11 $"; 339static inline int dual_channel_active(u32 drc)
348 mci->ctl_name = i82875p_devs[dev_idx].ctl_name; 340{
349 mci->edac_check = i82875p_check; 341 return (drc >> 21) & 0x1;
350 mci->ctl_page_to_phys = NULL; 342}
351 debugf3("%s(): init pvt\n", __func__);
352 pvt = (struct i82875p_pvt *) mci->pvt_info;
353 pvt->ovrfl_pdev = ovrfl_pdev;
354 pvt->ovrfl_window = ovrfl_window;
355 343
356 /* 344
357 * The dram row boundary (DRB) reg values are boundary address 345static void i82875p_init_csrows(struct mem_ctl_info *mci,
346 struct pci_dev *pdev, void __iomem *ovrfl_window, u32 drc)
347{
348 struct csrow_info *csrow;
349 unsigned long last_cumul_size;
350 u8 value;
351 u32 drc_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
352 u32 cumul_size;
353 int index;
354
355 drc_ddim = (drc >> 18) & 0x1;
356 last_cumul_size = 0;
357
358 /* The dram row boundary (DRB) reg values are boundary address
358 * for each DRAM row with a granularity of 32 or 64MB (single/dual 359 * for each DRAM row with a granularity of 32 or 64MB (single/dual
359 * channel operation). DRB regs are cumulative; therefore DRB7 will 360 * channel operation). DRB regs are cumulative; therefore DRB7 will
360 * contain the total memory contained in all eight rows. 361 * contain the total memory contained in all eight rows.
361 */ 362 */
362 for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) { 363
363 u8 value; 364 for (index = 0; index < mci->nr_csrows; index++) {
364 u32 cumul_size; 365 csrow = &mci->csrows[index];
365 struct csrow_info *csrow = &mci->csrows[index];
366 366
367 value = readb(ovrfl_window + I82875P_DRB + index); 367 value = readb(ovrfl_window + I82875P_DRB + index);
368 cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT); 368 cumul_size = value << (I82875P_DRB_SHIFT - PAGE_SHIFT);
369 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index, 369 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
370 cumul_size); 370 cumul_size);
371
372 if (cumul_size == last_cumul_size) 371 if (cumul_size == last_cumul_size)
373 continue; /* not populated */ 372 continue; /* not populated */
374 373
@@ -376,35 +375,75 @@ static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
376 csrow->last_page = cumul_size - 1; 375 csrow->last_page = cumul_size - 1;
377 csrow->nr_pages = cumul_size - last_cumul_size; 376 csrow->nr_pages = cumul_size - last_cumul_size;
378 last_cumul_size = cumul_size; 377 last_cumul_size = cumul_size;
379 csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */ 378 csrow->grain = 1 << 12; /* I82875P_EAP has 4KiB reolution */
380 csrow->mtype = MEM_DDR; 379 csrow->mtype = MEM_DDR;
381 csrow->dtype = DEV_UNKNOWN; 380 csrow->dtype = DEV_UNKNOWN;
382 csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE; 381 csrow->edac_mode = drc_ddim ? EDAC_SECDED : EDAC_NONE;
383 } 382 }
383}
384
385static int i82875p_probe1(struct pci_dev *pdev, int dev_idx)
386{
387 int rc = -ENODEV;
388 struct mem_ctl_info *mci;
389 struct i82875p_pvt *pvt;
390 struct pci_dev *ovrfl_pdev;
391 void __iomem *ovrfl_window;
392 u32 drc;
393 u32 nr_chans;
394 struct i82875p_error_info discard;
395
396 debugf0("%s()\n", __func__);
397 ovrfl_pdev = pci_get_device(PCI_VEND_DEV(INTEL, 82875_6), NULL);
398
399 if (i82875p_setup_overfl_dev(pdev, &ovrfl_pdev, &ovrfl_window))
400 return -ENODEV;
401 drc = readl(ovrfl_window + I82875P_DRC);
402 nr_chans = dual_channel_active(drc) + 1;
403 mci = edac_mc_alloc(sizeof(*pvt), I82875P_NR_CSROWS(nr_chans),
404 nr_chans);
405
406 if (!mci) {
407 rc = -ENOMEM;
408 goto fail0;
409 }
384 410
411 debugf3("%s(): init mci\n", __func__);
412 mci->dev = &pdev->dev;
413 mci->mtype_cap = MEM_FLAG_DDR;
414 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
415 mci->edac_cap = EDAC_FLAG_UNKNOWN;
416 mci->mod_name = EDAC_MOD_STR;
417 mci->mod_ver = I82875P_REVISION;
418 mci->ctl_name = i82875p_devs[dev_idx].ctl_name;
419 mci->edac_check = i82875p_check;
420 mci->ctl_page_to_phys = NULL;
421 debugf3("%s(): init pvt\n", __func__);
422 pvt = (struct i82875p_pvt *) mci->pvt_info;
423 pvt->ovrfl_pdev = ovrfl_pdev;
424 pvt->ovrfl_window = ovrfl_window;
425 i82875p_init_csrows(mci, pdev, ovrfl_window, drc);
385 i82875p_get_error_info(mci, &discard); /* clear counters */ 426 i82875p_get_error_info(mci, &discard); /* clear counters */
386 427
387 if (edac_mc_add_mc(mci)) { 428 /* Here we assume that we will never see multiple instances of this
429 * type of memory controller. The ID is therefore hardcoded to 0.
430 */
431 if (edac_mc_add_mc(mci,0)) {
388 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 432 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
389 goto fail3; 433 goto fail1;
390 } 434 }
391 435
392 /* get this far and it's successful */ 436 /* get this far and it's successful */
393 debugf3("%s(): success\n", __func__); 437 debugf3("%s(): success\n", __func__);
394 return 0; 438 return 0;
395 439
396fail3: 440fail1:
397 edac_mc_free(mci); 441 edac_mc_free(mci);
398 442
399fail2: 443fail0:
400 iounmap(ovrfl_window); 444 iounmap(ovrfl_window);
401
402fail1:
403 pci_release_regions(ovrfl_pdev); 445 pci_release_regions(ovrfl_pdev);
404 446
405#ifdef CORRECT_BIOS
406fail0:
407#endif
408 pci_disable_device(ovrfl_pdev); 447 pci_disable_device(ovrfl_pdev);
409 /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */ 448 /* NOTE: the ovrfl proc entry and pci_dev are intentionally left */
410 return rc; 449 return rc;
@@ -437,7 +476,7 @@ static void __devexit i82875p_remove_one(struct pci_dev *pdev)
437 476
438 debugf0("%s()\n", __func__); 477 debugf0("%s()\n", __func__);
439 478
440 if ((mci = edac_mc_del_mc(pdev)) == NULL) 479 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
441 return; 480 return;
442 481
443 pvt = (struct i82875p_pvt *) mci->pvt_info; 482 pvt = (struct i82875p_pvt *) mci->pvt_info;
diff --git a/drivers/edac/r82600_edac.c b/drivers/edac/r82600_edac.c
index 2c29fafe67..fecdb2c9ee 100644
--- a/drivers/edac/r82600_edac.c
+++ b/drivers/edac/r82600_edac.c
@@ -23,6 +23,8 @@
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include "edac_mc.h" 24#include "edac_mc.h"
25 25
26#define R82600_REVISION " Ver: 2.0.0 " __DATE__
27
26#define r82600_printk(level, fmt, arg...) \ 28#define r82600_printk(level, fmt, arg...) \
27 edac_printk(level, "r82600", fmt, ##arg) 29 edac_printk(level, "r82600", fmt, ##arg)
28 30
@@ -134,17 +136,20 @@ static unsigned int disable_hardware_scrub = 0;
134static void r82600_get_error_info (struct mem_ctl_info *mci, 136static void r82600_get_error_info (struct mem_ctl_info *mci,
135 struct r82600_error_info *info) 137 struct r82600_error_info *info)
136{ 138{
137 pci_read_config_dword(mci->pdev, R82600_EAP, &info->eapr); 139 struct pci_dev *pdev;
140
141 pdev = to_pci_dev(mci->dev);
142 pci_read_config_dword(pdev, R82600_EAP, &info->eapr);
138 143
139 if (info->eapr & BIT(0)) 144 if (info->eapr & BIT(0))
140 /* Clear error to allow next error to be reported [p.62] */ 145 /* Clear error to allow next error to be reported [p.62] */
141 pci_write_bits32(mci->pdev, R82600_EAP, 146 pci_write_bits32(pdev, R82600_EAP,
142 ((u32) BIT(0) & (u32) BIT(1)), 147 ((u32) BIT(0) & (u32) BIT(1)),
143 ((u32) BIT(0) & (u32) BIT(1))); 148 ((u32) BIT(0) & (u32) BIT(1)));
144 149
145 if (info->eapr & BIT(1)) 150 if (info->eapr & BIT(1))
146 /* Clear error to allow next error to be reported [p.62] */ 151 /* Clear error to allow next error to be reported [p.62] */
147 pci_write_bits32(mci->pdev, R82600_EAP, 152 pci_write_bits32(pdev, R82600_EAP,
148 ((u32) BIT(0) & (u32) BIT(1)), 153 ((u32) BIT(0) & (u32) BIT(1)),
149 ((u32) BIT(0) & (u32) BIT(1))); 154 ((u32) BIT(0) & (u32) BIT(1)));
150} 155}
@@ -200,25 +205,72 @@ static void r82600_check(struct mem_ctl_info *mci)
200 r82600_process_error_info(mci, &info, 1); 205 r82600_process_error_info(mci, &info, 1);
201} 206}
202 207
203static int r82600_probe1(struct pci_dev *pdev, int dev_idx) 208static inline int ecc_enabled(u8 dramcr)
209{
210 return dramcr & BIT(5);
211}
212
213static void r82600_init_csrows(struct mem_ctl_info *mci, struct pci_dev *pdev,
214 u8 dramcr)
204{ 215{
205 int rc = -ENODEV; 216 struct csrow_info *csrow;
206 int index; 217 int index;
207 struct mem_ctl_info *mci = NULL; 218 u8 drbar; /* SDRAM Row Boundry Address Register */
219 u32 row_high_limit, row_high_limit_last;
220 u32 reg_sdram, ecc_on, row_base;
221
222 ecc_on = ecc_enabled(dramcr);
223 reg_sdram = dramcr & BIT(4);
224 row_high_limit_last = 0;
225
226 for (index = 0; index < mci->nr_csrows; index++) {
227 csrow = &mci->csrows[index];
228
229 /* find the DRAM Chip Select Base address and mask */
230 pci_read_config_byte(pdev, R82600_DRBA + index, &drbar);
231
232 debugf1("%s() Row=%d DRBA = %#0x\n", __func__, index, drbar);
233
234 row_high_limit = ((u32) drbar << 24);
235/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
236
237 debugf1("%s() Row=%d, Boundry Address=%#0x, Last = %#0x\n",
238 __func__, index, row_high_limit, row_high_limit_last);
239
240 /* Empty row [p.57] */
241 if (row_high_limit == row_high_limit_last)
242 continue;
243
244 row_base = row_high_limit_last;
245
246 csrow->first_page = row_base >> PAGE_SHIFT;
247 csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
248 csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
249 /* Error address is top 19 bits - so granularity is *
250 * 14 bits */
251 csrow->grain = 1 << 14;
252 csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
253 /* FIXME - check that this is unknowable with this chipset */
254 csrow->dtype = DEV_UNKNOWN;
255
256 /* Mode is global on 82600 */
257 csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
258 row_high_limit_last = row_high_limit;
259 }
260}
261
262static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
263{
264 struct mem_ctl_info *mci;
208 u8 dramcr; 265 u8 dramcr;
209 u32 ecc_on;
210 u32 reg_sdram;
211 u32 eapr; 266 u32 eapr;
212 u32 scrub_disabled; 267 u32 scrub_disabled;
213 u32 sdram_refresh_rate; 268 u32 sdram_refresh_rate;
214 u32 row_high_limit_last = 0;
215 struct r82600_error_info discard; 269 struct r82600_error_info discard;
216 270
217 debugf0("%s()\n", __func__); 271 debugf0("%s()\n", __func__);
218 pci_read_config_byte(pdev, R82600_DRAMC, &dramcr); 272 pci_read_config_byte(pdev, R82600_DRAMC, &dramcr);
219 pci_read_config_dword(pdev, R82600_EAP, &eapr); 273 pci_read_config_dword(pdev, R82600_EAP, &eapr);
220 ecc_on = dramcr & BIT(5);
221 reg_sdram = dramcr & BIT(4);
222 scrub_disabled = eapr & BIT(31); 274 scrub_disabled = eapr & BIT(31);
223 sdram_refresh_rate = dramcr & (BIT(0) | BIT(1)); 275 sdram_refresh_rate = dramcr & (BIT(0) | BIT(1));
224 debugf2("%s(): sdram refresh rate = %#0x\n", __func__, 276 debugf2("%s(): sdram refresh rate = %#0x\n", __func__,
@@ -226,13 +278,11 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
226 debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr); 278 debugf2("%s(): DRAMC register = %#0x\n", __func__, dramcr);
227 mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS); 279 mci = edac_mc_alloc(0, R82600_NR_CSROWS, R82600_NR_CHANS);
228 280
229 if (mci == NULL) { 281 if (mci == NULL)
230 rc = -ENOMEM; 282 return -ENOMEM;
231 goto fail;
232 }
233 283
234 debugf0("%s(): mci = %p\n", __func__, mci); 284 debugf0("%s(): mci = %p\n", __func__, mci);
235 mci->pdev = pdev; 285 mci->dev = &pdev->dev;
236 mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR; 286 mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
237 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; 287 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
238 /* FIXME try to work out if the chip leads have been used for COM2 288 /* FIXME try to work out if the chip leads have been used for COM2
@@ -245,7 +295,7 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
245 * is possible. */ 295 * is possible. */
246 mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED; 296 mci->edac_cap = EDAC_FLAG_NONE | EDAC_FLAG_EC | EDAC_FLAG_SECDED;
247 297
248 if (ecc_on) { 298 if (ecc_enabled(dramcr)) {
249 if (scrub_disabled) 299 if (scrub_disabled)
250 debugf3("%s(): mci = %p - Scrubbing disabled! EAP: " 300 debugf3("%s(): mci = %p - Scrubbing disabled! EAP: "
251 "%#0x\n", __func__, mci, eapr); 301 "%#0x\n", __func__, mci, eapr);
@@ -253,53 +303,17 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
253 mci->edac_cap = EDAC_FLAG_NONE; 303 mci->edac_cap = EDAC_FLAG_NONE;
254 304
255 mci->mod_name = EDAC_MOD_STR; 305 mci->mod_name = EDAC_MOD_STR;
256 mci->mod_ver = "$Revision: 1.1.2.6 $"; 306 mci->mod_ver = R82600_REVISION;
257 mci->ctl_name = "R82600"; 307 mci->ctl_name = "R82600";
258 mci->edac_check = r82600_check; 308 mci->edac_check = r82600_check;
259 mci->ctl_page_to_phys = NULL; 309 mci->ctl_page_to_phys = NULL;
260 310 r82600_init_csrows(mci, pdev, dramcr);
261 for (index = 0; index < mci->nr_csrows; index++) {
262 struct csrow_info *csrow = &mci->csrows[index];
263 u8 drbar; /* sDram Row Boundry Address Register */
264 u32 row_high_limit;
265 u32 row_base;
266
267 /* find the DRAM Chip Select Base address and mask */
268 pci_read_config_byte(mci->pdev, R82600_DRBA + index, &drbar);
269
270 debugf1("MC%d: %s() Row=%d DRBA = %#0x\n", mci->mc_idx,
271 __func__, index, drbar);
272
273 row_high_limit = ((u32) drbar << 24);
274/* row_high_limit = ((u32)drbar << 24) | 0xffffffUL; */
275
276 debugf1("MC%d: %s() Row=%d, Boundry Address=%#0x, Last = "
277 "%#0x \n", mci->mc_idx, __func__, index,
278 row_high_limit, row_high_limit_last);
279
280 /* Empty row [p.57] */
281 if (row_high_limit == row_high_limit_last)
282 continue;
283
284 row_base = row_high_limit_last;
285 csrow->first_page = row_base >> PAGE_SHIFT;
286 csrow->last_page = (row_high_limit >> PAGE_SHIFT) - 1;
287 csrow->nr_pages = csrow->last_page - csrow->first_page + 1;
288 /* Error address is top 19 bits - so granularity is *
289 * 14 bits */
290 csrow->grain = 1 << 14;
291 csrow->mtype = reg_sdram ? MEM_RDDR : MEM_DDR;
292 /* FIXME - check that this is unknowable with this chipset */
293 csrow->dtype = DEV_UNKNOWN;
294
295 /* Mode is global on 82600 */
296 csrow->edac_mode = ecc_on ? EDAC_SECDED : EDAC_NONE;
297 row_high_limit_last = row_high_limit;
298 }
299
300 r82600_get_error_info(mci, &discard); /* clear counters */ 311 r82600_get_error_info(mci, &discard); /* clear counters */
301 312
302 if (edac_mc_add_mc(mci)) { 313 /* Here we assume that we will never see multiple instances of this
314 * type of memory controller. The ID is therefore hardcoded to 0.
315 */
316 if (edac_mc_add_mc(mci,0)) {
303 debugf3("%s(): failed edac_mc_add_mc()\n", __func__); 317 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
304 goto fail; 318 goto fail;
305 } 319 }
@@ -309,17 +323,15 @@ static int r82600_probe1(struct pci_dev *pdev, int dev_idx)
309 if (disable_hardware_scrub) { 323 if (disable_hardware_scrub) {
310 debugf3("%s(): Disabling Hardware Scrub (scrub on error)\n", 324 debugf3("%s(): Disabling Hardware Scrub (scrub on error)\n",
311 __func__); 325 __func__);
312 pci_write_bits32(mci->pdev, R82600_EAP, BIT(31), BIT(31)); 326 pci_write_bits32(pdev, R82600_EAP, BIT(31), BIT(31));
313 } 327 }
314 328
315 debugf3("%s(): success\n", __func__); 329 debugf3("%s(): success\n", __func__);
316 return 0; 330 return 0;
317 331
318fail: 332fail:
319 if (mci) 333 edac_mc_free(mci);
320 edac_mc_free(mci); 334 return -ENODEV;
321
322 return rc;
323} 335}
324 336
325/* returns count (>= 0), or negative on error */ 337/* returns count (>= 0), or negative on error */
@@ -338,7 +350,7 @@ static void __devexit r82600_remove_one(struct pci_dev *pdev)
338 350
339 debugf0("%s()\n", __func__); 351 debugf0("%s()\n", __func__);
340 352
341 if ((mci = edac_mc_del_mc(pdev)) == NULL) 353 if ((mci = edac_mc_del_mc(&pdev->dev)) == NULL)
342 return; 354 return;
343 355
344 edac_mc_free(mci); 356 edac_mc_free(mci);
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 8b46ef7d9f..7be1d0a3e8 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -494,8 +494,8 @@ static int __devinit i801_probe(struct pci_dev *dev, const struct pci_device_id
494 err = pci_request_region(dev, SMBBAR, i801_driver.name); 494 err = pci_request_region(dev, SMBBAR, i801_driver.name);
495 if (err) { 495 if (err) {
496 dev_err(&dev->dev, "Failed to request SMBus region " 496 dev_err(&dev->dev, "Failed to request SMBus region "
497 "0x%lx-0x%lx\n", i801_smba, 497 "0x%lx-0x%Lx\n", i801_smba,
498 pci_resource_end(dev, SMBBAR)); 498 (unsigned long long)pci_resource_end(dev, SMBBAR));
499 goto exit; 499 goto exit;
500 } 500 }
501 501
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.c b/drivers/infiniband/ulp/iser/iscsi_iser.c
index 4c3f2de2a0..b2c033edb0 100644
--- a/drivers/infiniband/ulp/iser/iscsi_iser.c
+++ b/drivers/infiniband/ulp/iser/iscsi_iser.c
@@ -54,7 +54,6 @@
54#include <linux/blkdev.h> 54#include <linux/blkdev.h>
55#include <linux/init.h> 55#include <linux/init.h>
56#include <linux/ioctl.h> 56#include <linux/ioctl.h>
57#include <linux/devfs_fs_kernel.h>
58#include <linux/cdev.h> 57#include <linux/cdev.h>
59#include <linux/in.h> 58#include <linux/in.h>
60#include <linux/net.h> 59#include <linux/net.h>
diff --git a/drivers/input/serio/i8042-sparcio.h b/drivers/input/serio/i8042-sparcio.h
index 6d66351805..9cad197a4e 100644
--- a/drivers/input/serio/i8042-sparcio.h
+++ b/drivers/input/serio/i8042-sparcio.h
@@ -3,11 +3,9 @@
3 3
4#include <linux/config.h> 4#include <linux/config.h>
5#include <asm/io.h> 5#include <asm/io.h>
6
7#ifdef CONFIG_PCI
8#include <asm/oplib.h> 6#include <asm/oplib.h>
9#include <asm/ebus.h> 7#include <asm/prom.h>
10#endif 8#include <asm/of_device.h>
11 9
12static int i8042_kbd_irq = -1; 10static int i8042_kbd_irq = -1;
13static int i8042_aux_irq = -1; 11static int i8042_aux_irq = -1;
@@ -48,54 +46,83 @@ static inline void i8042_write_command(int val)
48#define OBP_PS2MS_NAME1 "kdmouse" 46#define OBP_PS2MS_NAME1 "kdmouse"
49#define OBP_PS2MS_NAME2 "mouse" 47#define OBP_PS2MS_NAME2 "mouse"
50 48
49static int __devinit sparc_i8042_probe(struct of_device *op, const struct of_device_id *match)
50{
51 struct device_node *dp = op->node;
52
53 dp = dp->child;
54 while (dp) {
55 if (!strcmp(dp->name, OBP_PS2KBD_NAME1) ||
56 !strcmp(dp->name, OBP_PS2KBD_NAME2)) {
57 struct of_device *kbd = of_find_device_by_node(dp);
58 unsigned int irq = kbd->irqs[0];
59 if (irq == 0xffffffff)
60 irq = op->irqs[0];
61 i8042_kbd_irq = irq;
62 kbd_iobase = of_ioremap(&kbd->resource[0],
63 0, 8, "kbd");
64 } else if (!strcmp(dp->name, OBP_PS2MS_NAME1) ||
65 !strcmp(dp->name, OBP_PS2MS_NAME2)) {
66 struct of_device *ms = of_find_device_by_node(dp);
67 unsigned int irq = ms->irqs[0];
68 if (irq == 0xffffffff)
69 irq = op->irqs[0];
70 i8042_aux_irq = irq;
71 }
72
73 dp = dp->sibling;
74 }
75
76 return 0;
77}
78
79static int __devexit sparc_i8042_remove(struct of_device *op)
80{
81 of_iounmap(kbd_iobase, 8);
82
83 return 0;
84}
85
86static struct of_device_id sparc_i8042_match[] = {
87 {
88 .name = "8042",
89 },
90 {},
91};
92MODULE_DEVICE_TABLE(of, i8042_match);
93
94static struct of_platform_driver sparc_i8042_driver = {
95 .name = "i8042",
96 .match_table = sparc_i8042_match,
97 .probe = sparc_i8042_probe,
98 .remove = __devexit_p(sparc_i8042_remove),
99};
100
51static int __init i8042_platform_init(void) 101static int __init i8042_platform_init(void)
52{ 102{
53#ifndef CONFIG_PCI 103#ifndef CONFIG_PCI
54 return -ENODEV; 104 return -ENODEV;
55#else 105#else
56 char prop[128]; 106 struct device_node *root = of_find_node_by_path("/");
57 int len;
58 107
59 len = prom_getproperty(prom_root_node, "name", prop, sizeof(prop)); 108 if (!strcmp(root->name, "SUNW,JavaStation-1")) {
60 if (len < 0) {
61 printk("i8042: Cannot get name property of root OBP node.\n");
62 return -ENODEV;
63 }
64 if (strncmp(prop, "SUNW,JavaStation-1", len) == 0) {
65 /* Hardcoded values for MrCoffee. */ 109 /* Hardcoded values for MrCoffee. */
66 i8042_kbd_irq = i8042_aux_irq = 13 | 0x20; 110 i8042_kbd_irq = i8042_aux_irq = 13 | 0x20;
67 kbd_iobase = ioremap(0x71300060, 8); 111 kbd_iobase = ioremap(0x71300060, 8);
68 if (!kbd_iobase) 112 if (!kbd_iobase)
69 return -ENODEV; 113 return -ENODEV;
70 } else { 114 } else {
71 struct linux_ebus *ebus; 115 int err = of_register_driver(&sparc_i8042_driver,
72 struct linux_ebus_device *edev; 116 &of_bus_type);
73 struct linux_ebus_child *child; 117 if (err)
74 118 return err;
75 for_each_ebus(ebus) { 119
76 for_each_ebusdev(edev, ebus) {
77 if (!strcmp(edev->prom_node->name, "8042"))
78 goto edev_found;
79 }
80 }
81 return -ENODEV;
82
83 edev_found:
84 for_each_edevchild(edev, child) {
85 if (!strcmp(child->prom_node->name, OBP_PS2KBD_NAME1) ||
86 !strcmp(child->prom_node->name, OBP_PS2KBD_NAME2)) {
87 i8042_kbd_irq = child->irqs[0];
88 kbd_iobase =
89 ioremap(child->resource[0].start, 8);
90 }
91 if (!strcmp(child->prom_node->name, OBP_PS2MS_NAME1) ||
92 !strcmp(child->prom_node->name, OBP_PS2MS_NAME2))
93 i8042_aux_irq = child->irqs[0];
94 }
95 if (i8042_kbd_irq == -1 || 120 if (i8042_kbd_irq == -1 ||
96 i8042_aux_irq == -1) { 121 i8042_aux_irq == -1) {
97 printk("i8042: Error, 8042 device lacks both kbd and " 122 if (kbd_iobase) {
98 "mouse nodes.\n"); 123 of_iounmap(kbd_iobase, 8);
124 kbd_iobase = (void __iomem *) NULL;
125 }
99 return -ENODEV; 126 return -ENODEV;
100 } 127 }
101 } 128 }
@@ -109,7 +136,10 @@ static int __init i8042_platform_init(void)
109static inline void i8042_platform_exit(void) 136static inline void i8042_platform_exit(void)
110{ 137{
111#ifdef CONFIG_PCI 138#ifdef CONFIG_PCI
112 iounmap(kbd_iobase); 139 struct device_node *root = of_find_node_by_path("/");
140
141 if (strcmp(root->name, "SUNW,JavaStation-1"))
142 of_unregister_driver(&sparc_i8042_driver);
113#endif 143#endif
114} 144}
115 145
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index 7635736cc7..d55b0f7939 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -57,8 +57,8 @@
57 57
58#define DRV_MODULE_NAME "bnx2" 58#define DRV_MODULE_NAME "bnx2"
59#define PFX DRV_MODULE_NAME ": " 59#define PFX DRV_MODULE_NAME ": "
60#define DRV_MODULE_VERSION "1.4.42" 60#define DRV_MODULE_VERSION "1.4.43"
61#define DRV_MODULE_RELDATE "June 12, 2006" 61#define DRV_MODULE_RELDATE "June 28, 2006"
62 62
63#define RUN_AT(x) (jiffies + (x)) 63#define RUN_AT(x) (jiffies + (x))
64 64
@@ -1676,7 +1676,7 @@ bnx2_tx_int(struct bnx2 *bp)
1676 1676
1677 tx_free_bd += last + 1; 1677 tx_free_bd += last + 1;
1678 1678
1679 dev_kfree_skb_irq(skb); 1679 dev_kfree_skb(skb);
1680 1680
1681 hw_cons = bp->hw_tx_cons = 1681 hw_cons = bp->hw_tx_cons =
1682 sblk->status_tx_quick_consumer_index0; 1682 sblk->status_tx_quick_consumer_index0;
@@ -1824,7 +1824,7 @@ reuse_rx:
1824 if ((len > (bp->dev->mtu + ETH_HLEN)) && 1824 if ((len > (bp->dev->mtu + ETH_HLEN)) &&
1825 (ntohs(skb->protocol) != 0x8100)) { 1825 (ntohs(skb->protocol) != 0x8100)) {
1826 1826
1827 dev_kfree_skb_irq(skb); 1827 dev_kfree_skb(skb);
1828 goto next_rx; 1828 goto next_rx;
1829 1829
1830 } 1830 }
@@ -3643,7 +3643,7 @@ bnx2_free_tx_skbs(struct bnx2 *bp)
3643 skb_shinfo(skb)->frags[j].size, 3643 skb_shinfo(skb)->frags[j].size,
3644 PCI_DMA_TODEVICE); 3644 PCI_DMA_TODEVICE);
3645 } 3645 }
3646 dev_kfree_skb_any(skb); 3646 dev_kfree_skb(skb);
3647 i += j + 1; 3647 i += j + 1;
3648 } 3648 }
3649 3649
@@ -3669,7 +3669,7 @@ bnx2_free_rx_skbs(struct bnx2 *bp)
3669 3669
3670 rx_buf->skb = NULL; 3670 rx_buf->skb = NULL;
3671 3671
3672 dev_kfree_skb_any(skb); 3672 dev_kfree_skb(skb);
3673 } 3673 }
3674} 3674}
3675 3675
@@ -3999,7 +3999,7 @@ bnx2_run_loopback(struct bnx2 *bp, int loopback_mode)
3999 udelay(5); 3999 udelay(5);
4000 4000
4001 pci_unmap_single(bp->pdev, map, pkt_size, PCI_DMA_TODEVICE); 4001 pci_unmap_single(bp->pdev, map, pkt_size, PCI_DMA_TODEVICE);
4002 dev_kfree_skb_irq(skb); 4002 dev_kfree_skb(skb);
4003 4003
4004 if (bp->status_blk->status_tx_quick_consumer_index0 != bp->tx_prod) { 4004 if (bp->status_blk->status_tx_quick_consumer_index0 != bp->tx_prod) {
4005 goto loopback_test_done; 4005 goto loopback_test_done;
@@ -4541,7 +4541,7 @@ bnx2_close(struct net_device *dev)
4541 bnx2_netif_stop(bp); 4541 bnx2_netif_stop(bp);
4542 del_timer_sync(&bp->timer); 4542 del_timer_sync(&bp->timer);
4543 if (bp->flags & NO_WOL_FLAG) 4543 if (bp->flags & NO_WOL_FLAG)
4544 reset_code = BNX2_DRV_MSG_CODE_UNLOAD; 4544 reset_code = BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN;
4545 else if (bp->wol) 4545 else if (bp->wol)
4546 reset_code = BNX2_DRV_MSG_CODE_SUSPEND_WOL; 4546 reset_code = BNX2_DRV_MSG_CODE_SUSPEND_WOL;
4547 else 4547 else
@@ -5128,6 +5128,16 @@ bnx2_set_rx_csum(struct net_device *dev, u32 data)
5128 return 0; 5128 return 0;
5129} 5129}
5130 5130
5131static int
5132bnx2_set_tso(struct net_device *dev, u32 data)
5133{
5134 if (data)
5135 dev->features |= NETIF_F_TSO | NETIF_F_TSO_ECN;
5136 else
5137 dev->features &= ~(NETIF_F_TSO | NETIF_F_TSO_ECN);
5138 return 0;
5139}
5140
5131#define BNX2_NUM_STATS 46 5141#define BNX2_NUM_STATS 46
5132 5142
5133static struct { 5143static struct {
@@ -5445,7 +5455,7 @@ static struct ethtool_ops bnx2_ethtool_ops = {
5445 .set_sg = ethtool_op_set_sg, 5455 .set_sg = ethtool_op_set_sg,
5446#ifdef BCM_TSO 5456#ifdef BCM_TSO
5447 .get_tso = ethtool_op_get_tso, 5457 .get_tso = ethtool_op_get_tso,
5448 .set_tso = ethtool_op_set_tso, 5458 .set_tso = bnx2_set_tso,
5449#endif 5459#endif
5450 .self_test_count = bnx2_self_test_count, 5460 .self_test_count = bnx2_self_test_count,
5451 .self_test = bnx2_self_test, 5461 .self_test = bnx2_self_test,
@@ -5926,7 +5936,7 @@ bnx2_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
5926 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; 5936 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
5927#endif 5937#endif
5928#ifdef BCM_TSO 5938#ifdef BCM_TSO
5929 dev->features |= NETIF_F_TSO; 5939 dev->features |= NETIF_F_TSO | NETIF_F_TSO_ECN;
5930#endif 5940#endif
5931 5941
5932 netif_carrier_off(bp->dev); 5942 netif_carrier_off(bp->dev);
@@ -5968,7 +5978,7 @@ bnx2_suspend(struct pci_dev *pdev, pm_message_t state)
5968 netif_device_detach(dev); 5978 netif_device_detach(dev);
5969 del_timer_sync(&bp->timer); 5979 del_timer_sync(&bp->timer);
5970 if (bp->flags & NO_WOL_FLAG) 5980 if (bp->flags & NO_WOL_FLAG)
5971 reset_code = BNX2_DRV_MSG_CODE_UNLOAD; 5981 reset_code = BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN;
5972 else if (bp->wol) 5982 else if (bp->wol)
5973 reset_code = BNX2_DRV_MSG_CODE_SUSPEND_WOL; 5983 reset_code = BNX2_DRV_MSG_CODE_SUSPEND_WOL;
5974 else 5984 else
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 5845e33494..658c5ee95c 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -4174,6 +4174,7 @@ struct fw_info {
4174#define BNX2_DRV_MSG_CODE_PULSE 0x06000000 4174#define BNX2_DRV_MSG_CODE_PULSE 0x06000000
4175#define BNX2_DRV_MSG_CODE_DIAG 0x07000000 4175#define BNX2_DRV_MSG_CODE_DIAG 0x07000000
4176#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL 0x09000000 4176#define BNX2_DRV_MSG_CODE_SUSPEND_NO_WOL 0x09000000
4177#define BNX2_DRV_MSG_CODE_UNLOAD_LNK_DN 0x0b000000
4177 4178
4178#define BNX2_DRV_MSG_DATA 0x00ff0000 4179#define BNX2_DRV_MSG_DATA 0x00ff0000
4179#define BNX2_DRV_MSG_DATA_WAIT0 0x00010000 4180#define BNX2_DRV_MSG_DATA_WAIT0 0x00010000
diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig
index d2ce4896ab..e9e6d99a9a 100644
--- a/drivers/net/irda/Kconfig
+++ b/drivers/net/irda/Kconfig
@@ -350,7 +350,7 @@ config TOSHIBA_FIR
350 350
351config AU1000_FIR 351config AU1000_FIR
352 tristate "Alchemy Au1000 SIR/FIR" 352 tristate "Alchemy Au1000 SIR/FIR"
353 depends on MIPS_AU1000 && IRDA 353 depends on SOC_AU1000 && IRDA
354 354
355config SMC_IRCC_FIR 355config SMC_IRCC_FIR
356 tristate "SMSC IrCC (EXPERIMENTAL)" 356 tristate "SMSC IrCC (EXPERIMENTAL)"
diff --git a/drivers/net/irda/mcs7780.c b/drivers/net/irda/mcs7780.c
index 754297fc8f..47f6f64d60 100644
--- a/drivers/net/irda/mcs7780.c
+++ b/drivers/net/irda/mcs7780.c
@@ -101,7 +101,7 @@ static int transceiver_type = MCS_TSC_VISHAY;
101module_param(transceiver_type, int, 0444); 101module_param(transceiver_type, int, 0444);
102MODULE_PARM_DESC(transceiver_type, "IR transceiver type, see mcs7780.h."); 102MODULE_PARM_DESC(transceiver_type, "IR transceiver type, see mcs7780.h.");
103 103
104struct usb_driver mcs_driver = { 104static struct usb_driver mcs_driver = {
105 .name = "mcs7780", 105 .name = "mcs7780",
106 .probe = mcs_probe, 106 .probe = mcs_probe,
107 .disconnect = mcs_disconnect, 107 .disconnect = mcs_disconnect,
diff --git a/drivers/net/sunhme.c b/drivers/net/sunhme.c
index c33ead3470..9b246e44f7 100644
--- a/drivers/net/sunhme.c
+++ b/drivers/net/sunhme.c
@@ -2523,7 +2523,7 @@ static struct ethtool_ops hme_ethtool_ops = {
2523static int hme_version_printed; 2523static int hme_version_printed;
2524 2524
2525#ifdef CONFIG_SBUS 2525#ifdef CONFIG_SBUS
2526void __init quattro_get_ranges(struct quattro *qp) 2526void __devinit quattro_get_ranges(struct quattro *qp)
2527{ 2527{
2528 struct sbus_dev *sdev = qp->quattro_dev; 2528 struct sbus_dev *sdev = qp->quattro_dev;
2529 int err; 2529 int err;
@@ -2539,7 +2539,7 @@ void __init quattro_get_ranges(struct quattro *qp)
2539 qp->nranges = (err / sizeof(struct linux_prom_ranges)); 2539 qp->nranges = (err / sizeof(struct linux_prom_ranges));
2540} 2540}
2541 2541
2542static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp) 2542static void __devinit quattro_apply_ranges(struct quattro *qp, struct happy_meal *hp)
2543{ 2543{
2544 struct sbus_dev *sdev = hp->happy_dev; 2544 struct sbus_dev *sdev = hp->happy_dev;
2545 int rng; 2545 int rng;
@@ -2566,7 +2566,7 @@ static void __init quattro_apply_ranges(struct quattro *qp, struct happy_meal *h
2566 * 2566 *
2567 * Return NULL on failure. 2567 * Return NULL on failure.
2568 */ 2568 */
2569static struct quattro * __init quattro_sbus_find(struct sbus_dev *goal_sdev) 2569static struct quattro * __devinit quattro_sbus_find(struct sbus_dev *goal_sdev)
2570{ 2570{
2571 struct sbus_dev *sdev; 2571 struct sbus_dev *sdev;
2572 struct quattro *qp; 2572 struct quattro *qp;
@@ -2618,7 +2618,7 @@ static void __init quattro_sbus_register_irqs(void)
2618 } 2618 }
2619} 2619}
2620 2620
2621static void __devexit quattro_sbus_free_irqs(void) 2621static void quattro_sbus_free_irqs(void)
2622{ 2622{
2623 struct quattro *qp; 2623 struct quattro *qp;
2624 2624
@@ -2662,7 +2662,7 @@ static struct quattro * __init quattro_pci_find(struct pci_dev *pdev)
2662#endif /* CONFIG_PCI */ 2662#endif /* CONFIG_PCI */
2663 2663
2664#ifdef CONFIG_SBUS 2664#ifdef CONFIG_SBUS
2665static int __init happy_meal_sbus_probe_one(struct sbus_dev *sdev, int is_qfe) 2665static int __devinit happy_meal_sbus_probe_one(struct sbus_dev *sdev, int is_qfe)
2666{ 2666{
2667 struct device_node *dp = sdev->ofdev.node; 2667 struct device_node *dp = sdev->ofdev.node;
2668 struct quattro *qp = NULL; 2668 struct quattro *qp = NULL;
diff --git a/drivers/parisc/led.c b/drivers/parisc/led.c
index 298f2ddb2c..d7024c7483 100644
--- a/drivers/parisc/led.c
+++ b/drivers/parisc/led.c
@@ -411,16 +411,17 @@ static __inline__ int led_get_net_activity(void)
411static __inline__ int led_get_diskio_activity(void) 411static __inline__ int led_get_diskio_activity(void)
412{ 412{
413 static unsigned long last_pgpgin, last_pgpgout; 413 static unsigned long last_pgpgin, last_pgpgout;
414 struct page_state pgstat; 414 unsigned long events[NR_VM_EVENT_ITEMS];
415 int changed; 415 int changed;
416 416
417 get_full_page_state(&pgstat); /* get no of sectors in & out */ 417 all_vm_events(events);
418 418
419 /* Just use a very simple calculation here. Do not care about overflow, 419 /* Just use a very simple calculation here. Do not care about overflow,
420 since we only want to know if there was activity or not. */ 420 since we only want to know if there was activity or not. */
421 changed = (pgstat.pgpgin != last_pgpgin) || (pgstat.pgpgout != last_pgpgout); 421 changed = (events[PGPGIN] != last_pgpgin) ||
422 last_pgpgin = pgstat.pgpgin; 422 (events[PGPGOUT] != last_pgpgout);
423 last_pgpgout = pgstat.pgpgout; 423 last_pgpgin = events[PGPGIN];
424 last_pgpgout = events[PGPGOUT];
424 425
425 return (changed ? LED_DISK_IO : 0); 426 return (changed ? LED_DISK_IO : 0);
426} 427}
diff --git a/drivers/serial/sunsab.c b/drivers/serial/sunsab.c
index 7da02d11c3..141fedbefb 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/serial/sunsab.c
@@ -1,7 +1,7 @@
1/* sunsab.c: ASYNC Driver for the SIEMENS SAB82532 DUSCC. 1/* sunsab.c: ASYNC Driver for the SIEMENS SAB82532 DUSCC.
2 * 2 *
3 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 3 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
4 * Copyright (C) 2002 David S. Miller (davem@redhat.com) 4 * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net)
5 * 5 *
6 * Rewrote buffer handling to use CIRC(Circular Buffer) macros. 6 * Rewrote buffer handling to use CIRC(Circular Buffer) macros.
7 * Maxim Krasnyanskiy <maxk@qualcomm.com> 7 * Maxim Krasnyanskiy <maxk@qualcomm.com>
@@ -12,7 +12,7 @@
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12 12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 * 13 *
14 * Ported to new 2.5.x UART layer. 14 * Ported to new 2.5.x UART layer.
15 * David S. Miller <davem@redhat.com> 15 * David S. Miller <davem@davemloft.net>
16 */ 16 */
17 17
18#include <linux/config.h> 18#include <linux/config.h>
@@ -37,8 +37,8 @@
37 37
38#include <asm/io.h> 38#include <asm/io.h>
39#include <asm/irq.h> 39#include <asm/irq.h>
40#include <asm/oplib.h> 40#include <asm/prom.h>
41#include <asm/ebus.h> 41#include <asm/of_device.h>
42 42
43#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 43#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
44#define SUPPORT_SYSRQ 44#define SUPPORT_SYSRQ
@@ -976,199 +976,188 @@ static inline struct console *SUNSAB_CONSOLE(void)
976#define sunsab_console_init() do { } while (0) 976#define sunsab_console_init() do { } while (0)
977#endif 977#endif
978 978
979static void __init for_each_sab_edev(void (*callback)(struct linux_ebus_device *, void *), void *arg) 979static int __devinit sunsab_init_one(struct uart_sunsab_port *up,
980 struct of_device *op,
981 unsigned long offset,
982 int line)
980{ 983{
981 struct linux_ebus *ebus; 984 up->port.line = line;
982 struct linux_ebus_device *edev = NULL; 985 up->port.dev = &op->dev;
983 986
984 for_each_ebus(ebus) { 987 up->port.mapbase = op->resource[0].start + offset;
985 for_each_ebusdev(edev, ebus) { 988 up->port.membase = of_ioremap(&op->resource[0], offset,
986 if (!strcmp(edev->prom_node->name, "se")) { 989 sizeof(union sab82532_async_regs),
987 callback(edev, arg); 990 "sab");
988 continue; 991 if (!up->port.membase)
989 } else if (!strcmp(edev->prom_node->name, "serial")) { 992 return -ENOMEM;
990 char *compat; 993 up->regs = (union sab82532_async_regs __iomem *) up->port.membase;
991 int clen;
992
993 /* On RIO this can be an SE, check it. We could
994 * just check ebus->is_rio, but this is more portable.
995 */
996 compat = of_get_property(edev->prom_node,
997 "compatible", &clen);
998 if (compat && clen > 0) {
999 if (strncmp(compat, "sab82532", 8) == 0) {
1000 callback(edev, arg);
1001 continue;
1002 }
1003 }
1004 }
1005 }
1006 }
1007}
1008 994
1009static void __init sab_count_callback(struct linux_ebus_device *edev, void *arg) 995 up->port.irq = op->irqs[0];
1010{
1011 int *count_p = arg;
1012 996
1013 (*count_p)++; 997 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE;
1014} 998 up->port.iotype = UPIO_MEM;
1015 999
1016static void __init sab_attach_callback(struct linux_ebus_device *edev, void *arg) 1000 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc);
1017{
1018 int *instance_p = arg;
1019 struct uart_sunsab_port *up;
1020 unsigned long regs, offset;
1021 int i;
1022 1001
1023 /* Note: ports are located in reverse order */ 1002 up->port.ops = &sunsab_pops;
1024 regs = edev->resource[0].start; 1003 up->port.type = PORT_SUNSAB;
1025 offset = sizeof(union sab82532_async_regs); 1004 up->port.uartclk = SAB_BASE_BAUD;
1026 for (i = 0; i < 2; i++) {
1027 up = &sunsab_ports[(*instance_p * 2) + 1 - i];
1028 1005
1029 memset(up, 0, sizeof(*up)); 1006 up->type = readb(&up->regs->r.vstr) & 0x0f;
1030 up->regs = ioremap(regs + offset, sizeof(union sab82532_async_regs)); 1007 writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr);
1031 up->port.irq = edev->irqs[0]; 1008 writeb(0xff, &up->regs->w.pim);
1032 up->port.fifosize = SAB82532_XMIT_FIFO_SIZE; 1009 if ((up->port.line & 0x1) == 0) {
1033 up->port.mapbase = (unsigned long)up->regs; 1010 up->pvr_dsr_bit = (1 << 0);
1034 up->port.iotype = UPIO_MEM; 1011 up->pvr_dtr_bit = (1 << 1);
1012 } else {
1013 up->pvr_dsr_bit = (1 << 3);
1014 up->pvr_dtr_bit = (1 << 2);
1015 }
1016 up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4);
1017 writeb(up->cached_pvr, &up->regs->w.pvr);
1018 up->cached_mode = readb(&up->regs->rw.mode);
1019 up->cached_mode |= SAB82532_MODE_FRTS;
1020 writeb(up->cached_mode, &up->regs->rw.mode);
1021 up->cached_mode |= SAB82532_MODE_RTS;
1022 writeb(up->cached_mode, &up->regs->rw.mode);
1035 1023
1036 writeb(SAB82532_IPC_IC_ACT_LOW, &up->regs->w.ipc); 1024 up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT;
1025 up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT;
1037 1026
1038 offset -= sizeof(union sab82532_async_regs); 1027 if (!(up->port.line & 0x01)) {
1028 int err;
1029
1030 err = request_irq(up->port.irq, sunsab_interrupt,
1031 SA_SHIRQ, "sab", up);
1032 if (err) {
1033 of_iounmap(up->port.membase,
1034 sizeof(union sab82532_async_regs));
1035 return err;
1036 }
1039 } 1037 }
1040 1038
1041 (*instance_p)++; 1039 return 0;
1042} 1040}
1043 1041
1044static int __init probe_for_sabs(void) 1042static int __devinit sab_probe(struct of_device *op, const struct of_device_id *match)
1045{ 1043{
1046 int this_sab = 0; 1044 static int inst;
1045 struct uart_sunsab_port *up;
1046 int err;
1047
1048 up = &sunsab_ports[inst * 2];
1049
1050 err = sunsab_init_one(&up[0], op,
1051 sizeof(union sab82532_async_regs),
1052 (inst * 2) + 0);
1053 if (err)
1054 return err;
1055
1056 err = sunsab_init_one(&up[0], op, 0,
1057 (inst * 2) + 1);
1058 if (err) {
1059 of_iounmap(up[0].port.membase,
1060 sizeof(union sab82532_async_regs));
1061 free_irq(up[0].port.irq, &up[0]);
1062 return err;
1063 }
1047 1064
1048 /* Find device instances. */ 1065 uart_add_one_port(&sunsab_reg, &up[0].port);
1049 for_each_sab_edev(&sab_count_callback, &this_sab); 1066 uart_add_one_port(&sunsab_reg, &up[1].port);
1050 if (!this_sab)
1051 return -ENODEV;
1052 1067
1053 /* Allocate tables. */ 1068 dev_set_drvdata(&op->dev, &up[0]);
1054 sunsab_ports = kmalloc(sizeof(struct uart_sunsab_port) * this_sab * 2,
1055 GFP_KERNEL);
1056 if (!sunsab_ports)
1057 return -ENOMEM;
1058 1069
1059 num_channels = this_sab * 2; 1070 inst++;
1060 1071
1061 this_sab = 0;
1062 for_each_sab_edev(&sab_attach_callback, &this_sab);
1063 return 0; 1072 return 0;
1064} 1073}
1065 1074
1066static void __init sunsab_init_hw(void) 1075static void __devexit sab_remove_one(struct uart_sunsab_port *up)
1067{ 1076{
1068 int i; 1077 uart_remove_one_port(&sunsab_reg, &up->port);
1069 1078 if (!(up->port.line & 1))
1070 for (i = 0; i < num_channels; i++) { 1079 free_irq(up->port.irq, up);
1071 struct uart_sunsab_port *up = &sunsab_ports[i]; 1080 of_iounmap(up->port.membase,
1072 1081 sizeof(union sab82532_async_regs));
1073 up->port.line = i;
1074 up->port.ops = &sunsab_pops;
1075 up->port.type = PORT_SUNSAB;
1076 up->port.uartclk = SAB_BASE_BAUD;
1077
1078 up->type = readb(&up->regs->r.vstr) & 0x0f;
1079 writeb(~((1 << 1) | (1 << 2) | (1 << 4)), &up->regs->w.pcr);
1080 writeb(0xff, &up->regs->w.pim);
1081 if (up->port.line == 0) {
1082 up->pvr_dsr_bit = (1 << 0);
1083 up->pvr_dtr_bit = (1 << 1);
1084 } else {
1085 up->pvr_dsr_bit = (1 << 3);
1086 up->pvr_dtr_bit = (1 << 2);
1087 }
1088 up->cached_pvr = (1 << 1) | (1 << 2) | (1 << 4);
1089 writeb(up->cached_pvr, &up->regs->w.pvr);
1090 up->cached_mode = readb(&up->regs->rw.mode);
1091 up->cached_mode |= SAB82532_MODE_FRTS;
1092 writeb(up->cached_mode, &up->regs->rw.mode);
1093 up->cached_mode |= SAB82532_MODE_RTS;
1094 writeb(up->cached_mode, &up->regs->rw.mode);
1095
1096 up->tec_timeout = SAB82532_MAX_TEC_TIMEOUT;
1097 up->cec_timeout = SAB82532_MAX_CEC_TIMEOUT;
1098
1099 if (!(up->port.line & 0x01)) {
1100 if (request_irq(up->port.irq, sunsab_interrupt,
1101 SA_SHIRQ, "serial(sab82532)", up)) {
1102 printk("sunsab%d: can't get IRQ %x\n",
1103 i, up->port.irq);
1104 continue;
1105 }
1106 }
1107 }
1108} 1082}
1109 1083
1110static int __init sunsab_init(void) 1084static int __devexit sab_remove(struct of_device *op)
1111{ 1085{
1112 int ret = probe_for_sabs(); 1086 struct uart_sunsab_port *up = dev_get_drvdata(&op->dev);
1113 int i;
1114
1115 if (ret < 0)
1116 return ret;
1117 1087
1118 sunsab_init_hw(); 1088 sab_remove_one(&up[0]);
1089 sab_remove_one(&up[1]);
1119 1090
1120 sunsab_reg.minor = sunserial_current_minor; 1091 dev_set_drvdata(&op->dev, NULL);
1121 sunsab_reg.nr = num_channels;
1122 1092
1123 ret = uart_register_driver(&sunsab_reg); 1093 return 0;
1124 if (ret < 0) { 1094}
1125 int i;
1126 1095
1127 for (i = 0; i < num_channels; i++) { 1096static struct of_device_id sab_match[] = {
1128 struct uart_sunsab_port *up = &sunsab_ports[i]; 1097 {
1098 .name = "se",
1099 },
1100 {
1101 .name = "serial",
1102 .compatible = "sab82532",
1103 },
1104 {},
1105};
1106MODULE_DEVICE_TABLE(of, sab_match);
1129 1107
1130 if (!(up->port.line & 0x01)) 1108static struct of_platform_driver sab_driver = {
1131 free_irq(up->port.irq, up); 1109 .name = "sab",
1132 iounmap(up->regs); 1110 .match_table = sab_match,
1133 } 1111 .probe = sab_probe,
1134 kfree(sunsab_ports); 1112 .remove = __devexit_p(sab_remove),
1135 sunsab_ports = NULL; 1113};
1136 1114
1137 return ret; 1115static int __init sunsab_init(void)
1116{
1117 struct device_node *dp;
1118 int err;
1119
1120 num_channels = 0;
1121 for_each_node_by_name(dp, "su")
1122 num_channels += 2;
1123 for_each_node_by_name(dp, "serial") {
1124 if (of_device_is_compatible(dp, "sab82532"))
1125 num_channels += 2;
1138 } 1126 }
1139 1127
1140 sunsab_reg.tty_driver->name_base = sunsab_reg.minor - 64; 1128 if (num_channels) {
1129 sunsab_ports = kzalloc(sizeof(struct uart_sunsab_port) *
1130 num_channels, GFP_KERNEL);
1131 if (!sunsab_ports)
1132 return -ENOMEM;
1141 1133
1142 sunsab_reg.cons = SUNSAB_CONSOLE(); 1134 sunsab_reg.minor = sunserial_current_minor;
1135 sunsab_reg.nr = num_channels;
1143 1136
1144 sunserial_current_minor += num_channels; 1137 err = uart_register_driver(&sunsab_reg);
1145 1138 if (err) {
1146 for (i = 0; i < num_channels; i++) { 1139 kfree(sunsab_ports);
1147 struct uart_sunsab_port *up = &sunsab_ports[i]; 1140 sunsab_ports = NULL;
1148 1141
1149 uart_add_one_port(&sunsab_reg, &up->port); 1142 return err;
1143 }
1144
1145 sunsab_reg.tty_driver->name_base = sunsab_reg.minor - 64;
1146 sunsab_reg.cons = SUNSAB_CONSOLE();
1147 sunserial_current_minor += num_channels;
1150 } 1148 }
1151 1149
1152 return 0; 1150 return of_register_driver(&sab_driver, &of_bus_type);
1153} 1151}
1154 1152
1155static void __exit sunsab_exit(void) 1153static void __exit sunsab_exit(void)
1156{ 1154{
1157 int i; 1155 of_unregister_driver(&sab_driver);
1158 1156 if (num_channels) {
1159 for (i = 0; i < num_channels; i++) { 1157 sunserial_current_minor -= num_channels;
1160 struct uart_sunsab_port *up = &sunsab_ports[i]; 1158 uart_unregister_driver(&sunsab_reg);
1161
1162 uart_remove_one_port(&sunsab_reg, &up->port);
1163
1164 if (!(up->port.line & 0x01))
1165 free_irq(up->port.irq, up);
1166 iounmap(up->regs);
1167 } 1159 }
1168 1160
1169 sunserial_current_minor -= num_channels;
1170 uart_unregister_driver(&sunsab_reg);
1171
1172 kfree(sunsab_ports); 1161 kfree(sunsab_ports);
1173 sunsab_ports = NULL; 1162 sunsab_ports = NULL;
1174} 1163}
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index 6e28c25138..73a043b914 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -12,7 +12,7 @@
12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12 12 * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
13 * 13 *
14 * Converted to new 2.5.x UART layer. 14 * Converted to new 2.5.x UART layer.
15 * David S. Miller (davem@redhat.com), 2002-Jul-29 15 * David S. Miller (davem@davemloft.net), 2002-Jul-29
16 */ 16 */
17 17
18#include <linux/config.h> 18#include <linux/config.h>
@@ -40,11 +40,8 @@
40 40
41#include <asm/io.h> 41#include <asm/io.h>
42#include <asm/irq.h> 42#include <asm/irq.h>
43#include <asm/oplib.h> 43#include <asm/prom.h>
44#include <asm/ebus.h> 44#include <asm/of_device.h>
45#ifdef CONFIG_SPARC64
46#include <asm/isa.h>
47#endif
48 45
49#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 46#if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
50#define SUPPORT_SYSRQ 47#define SUPPORT_SYSRQ
@@ -94,10 +91,10 @@ struct uart_sunsu_port {
94 /* Probing information. */ 91 /* Probing information. */
95 enum su_type su_type; 92 enum su_type su_type;
96 unsigned int type_probed; /* XXX Stupid */ 93 unsigned int type_probed; /* XXX Stupid */
97 int port_node; 94 unsigned long reg_size;
98 95
99#ifdef CONFIG_SERIO 96#ifdef CONFIG_SERIO
100 struct serio *serio; 97 struct serio serio;
101 int serio_open; 98 int serio_open;
102#endif 99#endif
103}; 100};
@@ -509,7 +506,7 @@ static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *reg
509 /* Stop-A is handled by drivers/char/keyboard.c now. */ 506 /* Stop-A is handled by drivers/char/keyboard.c now. */
510 if (up->su_type == SU_PORT_KBD) { 507 if (up->su_type == SU_PORT_KBD) {
511#ifdef CONFIG_SERIO 508#ifdef CONFIG_SERIO
512 serio_interrupt(up->serio, ch, 0, regs); 509 serio_interrupt(&up->serio, ch, 0, regs);
513#endif 510#endif
514 } else if (up->su_type == SU_PORT_MS) { 511 } else if (up->su_type == SU_PORT_MS) {
515 int ret = suncore_mouse_baud_detection(ch, is_break); 512 int ret = suncore_mouse_baud_detection(ch, is_break);
@@ -523,7 +520,7 @@ static void receive_kbd_ms_chars(struct uart_sunsu_port *up, struct pt_regs *reg
523 520
524 case 0: 521 case 0:
525#ifdef CONFIG_SERIO 522#ifdef CONFIG_SERIO
526 serio_interrupt(up->serio, ch, 0, regs); 523 serio_interrupt(&up->serio, ch, 0, regs);
527#endif 524#endif
528 break; 525 break;
529 }; 526 };
@@ -1031,99 +1028,14 @@ static void sunsu_autoconfig(struct uart_sunsu_port *up)
1031{ 1028{
1032 unsigned char status1, status2, scratch, scratch2, scratch3; 1029 unsigned char status1, status2, scratch, scratch2, scratch3;
1033 unsigned char save_lcr, save_mcr; 1030 unsigned char save_lcr, save_mcr;
1034 struct linux_ebus_device *dev = NULL;
1035 struct linux_ebus *ebus;
1036#ifdef CONFIG_SPARC64
1037 struct sparc_isa_bridge *isa_br;
1038 struct sparc_isa_device *isa_dev;
1039#endif
1040#ifndef CONFIG_SPARC64
1041 struct linux_prom_registers reg0;
1042#endif
1043 unsigned long flags; 1031 unsigned long flags;
1044 1032
1045 if (!up->port_node || !up->su_type) 1033 if (up->su_type == SU_PORT_NONE)
1046 return; 1034 return;
1047 1035
1048 up->type_probed = PORT_UNKNOWN; 1036 up->type_probed = PORT_UNKNOWN;
1049 up->port.iotype = UPIO_MEM; 1037 up->port.iotype = UPIO_MEM;
1050 1038
1051 /*
1052 * First we look for Ebus-bases su's
1053 */
1054 for_each_ebus(ebus) {
1055 for_each_ebusdev(dev, ebus) {
1056 if (dev->prom_node->node == up->port_node) {
1057 /*
1058 * The EBus is broken on sparc; it delivers
1059 * virtual addresses in resources. Oh well...
1060 * This is correct on sparc64, though.
1061 */
1062 up->port.membase = (char *) dev->resource[0].start;
1063 /*
1064 * This is correct on both architectures.
1065 */
1066 up->port.mapbase = dev->resource[0].start;
1067 up->port.irq = dev->irqs[0];
1068 goto ebus_done;
1069 }
1070 }
1071 }
1072
1073#ifdef CONFIG_SPARC64
1074 for_each_isa(isa_br) {
1075 for_each_isadev(isa_dev, isa_br) {
1076 if (isa_dev->prom_node->node == up->port_node) {
1077 /* Same on sparc64. Cool architecure... */
1078 up->port.membase = (char *) isa_dev->resource.start;
1079 up->port.mapbase = isa_dev->resource.start;
1080 up->port.irq = isa_dev->irq;
1081 goto ebus_done;
1082 }
1083 }
1084 }
1085#endif
1086
1087#ifdef CONFIG_SPARC64
1088 /*
1089 * Not on Ebus, bailing.
1090 */
1091 return;
1092#else
1093 /*
1094 * Not on Ebus, must be OBIO.
1095 */
1096 if (prom_getproperty(up->port_node, "reg",
1097 (char *)&reg0, sizeof(reg0)) == -1) {
1098 prom_printf("sunsu: no \"reg\" property\n");
1099 return;
1100 }
1101 prom_apply_obio_ranges(&reg0, 1);
1102 if (reg0.which_io != 0) { /* Just in case... */
1103 prom_printf("sunsu: bus number nonzero: 0x%x:%x\n",
1104 reg0.which_io, reg0.phys_addr);
1105 return;
1106 }
1107 up->port.mapbase = reg0.phys_addr;
1108 if ((up->port.membase = ioremap(reg0.phys_addr, reg0.reg_size)) == 0) {
1109 prom_printf("sunsu: Cannot map registers.\n");
1110 return;
1111 }
1112
1113 /*
1114 * 0x20 is sun4m thing, Dave Redman heritage.
1115 * See arch/sparc/kernel/irq.c.
1116 */
1117#define IRQ_4M(n) ((n)|0x20)
1118
1119 /*
1120 * There is no intr property on MrCoffee, so hardwire it.
1121 */
1122 up->port.irq = IRQ_4M(13);
1123#endif
1124
1125ebus_done:
1126
1127 spin_lock_irqsave(&up->port.lock, flags); 1039 spin_lock_irqsave(&up->port.lock, flags);
1128 1040
1129 if (!(up->port.flags & UPF_BUGGY_UART)) { 1041 if (!(up->port.flags & UPF_BUGGY_UART)) {
@@ -1269,18 +1181,13 @@ static struct uart_driver sunsu_reg = {
1269 .major = TTY_MAJOR, 1181 .major = TTY_MAJOR,
1270}; 1182};
1271 1183
1272static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel) 1184static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1273{ 1185{
1274 int quot, baud; 1186 int quot, baud;
1275#ifdef CONFIG_SERIO 1187#ifdef CONFIG_SERIO
1276 struct serio *serio; 1188 struct serio *serio;
1277#endif 1189#endif
1278 1190
1279 spin_lock_init(&up->port.lock);
1280 up->port.line = channel;
1281 up->port.type = PORT_UNKNOWN;
1282 up->port.uartclk = (SU_BASE_BAUD * 16);
1283
1284 if (up->su_type == SU_PORT_KBD) { 1191 if (up->su_type == SU_PORT_KBD) {
1285 up->cflag = B1200 | CS8 | CLOCAL | CREAD; 1192 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1286 baud = 1200; 1193 baud = 1200;
@@ -1292,41 +1199,31 @@ static int __init sunsu_kbd_ms_init(struct uart_sunsu_port *up, int channel)
1292 1199
1293 sunsu_autoconfig(up); 1200 sunsu_autoconfig(up);
1294 if (up->port.type == PORT_UNKNOWN) 1201 if (up->port.type == PORT_UNKNOWN)
1295 return -1; 1202 return -ENODEV;
1296
1297 printk(KERN_INFO "su%d at 0x%p (irq = %d) is a %s\n",
1298 channel,
1299 up->port.membase, up->port.irq,
1300 sunsu_type(&up->port));
1301 1203
1302#ifdef CONFIG_SERIO 1204#ifdef CONFIG_SERIO
1303 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL); 1205 serio = &up->serio;
1304 if (serio) { 1206 serio->port_data = up;
1305 memset(serio, 0, sizeof(*serio));
1306
1307 serio->port_data = up;
1308
1309 serio->id.type = SERIO_RS232;
1310 if (up->su_type == SU_PORT_KBD) {
1311 serio->id.proto = SERIO_SUNKBD;
1312 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1313 } else {
1314 serio->id.proto = SERIO_SUN;
1315 serio->id.extra = 1;
1316 strlcpy(serio->name, "sums", sizeof(serio->name));
1317 }
1318 strlcpy(serio->phys, (channel == 0 ? "su/serio0" : "su/serio1"),
1319 sizeof(serio->phys));
1320
1321 serio->write = sunsu_serio_write;
1322 serio->open = sunsu_serio_open;
1323 serio->close = sunsu_serio_close;
1324 1207
1325 serio_register_port(serio); 1208 serio->id.type = SERIO_RS232;
1209 if (up->su_type == SU_PORT_KBD) {
1210 serio->id.proto = SERIO_SUNKBD;
1211 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1326 } else { 1212 } else {
1327 printk(KERN_WARNING "su%d: not enough memory for serio port\n", 1213 serio->id.proto = SERIO_SUN;
1328 channel); 1214 serio->id.extra = 1;
1215 strlcpy(serio->name, "sums", sizeof(serio->name));
1329 } 1216 }
1217 strlcpy(serio->phys,
1218 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1219 sizeof(serio->phys));
1220
1221 serio->write = sunsu_serio_write;
1222 serio->open = sunsu_serio_open;
1223 serio->close = sunsu_serio_close;
1224 serio->dev.parent = up->port.dev;
1225
1226 serio_register_port(serio);
1330#endif 1227#endif
1331 1228
1332 sunsu_change_speed(&up->port, up->cflag, 0, quot); 1229 sunsu_change_speed(&up->port, up->cflag, 0, quot);
@@ -1458,22 +1355,20 @@ static struct console sunsu_cons = {
1458 * Register console. 1355 * Register console.
1459 */ 1356 */
1460 1357
1461static inline struct console *SUNSU_CONSOLE(void) 1358static inline struct console *SUNSU_CONSOLE(int num_uart)
1462{ 1359{
1463 int i; 1360 int i;
1464 1361
1465 if (con_is_present()) 1362 if (con_is_present())
1466 return NULL; 1363 return NULL;
1467 1364
1468 for (i = 0; i < UART_NR; i++) { 1365 for (i = 0; i < num_uart; i++) {
1469 int this_minor = sunsu_reg.minor + i; 1366 int this_minor = sunsu_reg.minor + i;
1470 1367
1471 if ((this_minor - 64) == (serial_console - 1)) 1368 if ((this_minor - 64) == (serial_console - 1))
1472 break; 1369 break;
1473 } 1370 }
1474 if (i == UART_NR) 1371 if (i == num_uart)
1475 return NULL;
1476 if (sunsu_ports[i].port_node == 0)
1477 return NULL; 1372 return NULL;
1478 1373
1479 sunsu_cons.index = i; 1374 sunsu_cons.index = i;
@@ -1481,252 +1376,184 @@ static inline struct console *SUNSU_CONSOLE(void)
1481 return &sunsu_cons; 1376 return &sunsu_cons;
1482} 1377}
1483#else 1378#else
1484#define SUNSU_CONSOLE() (NULL) 1379#define SUNSU_CONSOLE(num_uart) (NULL)
1485#define sunsu_serial_console_init() do { } while (0) 1380#define sunsu_serial_console_init() do { } while (0)
1486#endif 1381#endif
1487 1382
1488static int __init sunsu_serial_init(void) 1383static enum su_type __devinit su_get_type(struct device_node *dp)
1489{ 1384{
1490 int instance, ret, i; 1385 struct device_node *ap = of_find_node_by_path("/aliases");
1491 1386
1492 /* How many instances do we need? */ 1387 if (ap) {
1493 instance = 0; 1388 char *keyb = of_get_property(ap, "keyboard", NULL);
1494 for (i = 0; i < UART_NR; i++) { 1389 char *ms = of_get_property(ap, "mouse", NULL);
1495 struct uart_sunsu_port *up = &sunsu_ports[i];
1496 1390
1497 if (up->su_type == SU_PORT_MS || 1391 if (keyb) {
1498 up->su_type == SU_PORT_KBD) 1392 if (dp == of_find_node_by_path(keyb))
1499 continue; 1393 return SU_PORT_KBD;
1500 1394 }
1501 spin_lock_init(&up->port.lock); 1395 if (ms) {
1502 up->port.flags |= UPF_BOOT_AUTOCONF; 1396 if (dp == of_find_node_by_path(ms))
1503 up->port.type = PORT_UNKNOWN; 1397 return SU_PORT_MS;
1504 up->port.uartclk = (SU_BASE_BAUD * 16); 1398 }
1399 }
1505 1400
1506 sunsu_autoconfig(up); 1401 return SU_PORT_PORT;
1507 if (up->port.type == PORT_UNKNOWN) 1402}
1508 continue;
1509 1403
1510 up->port.line = instance++; 1404static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)
1511 up->port.ops = &sunsu_pops; 1405{
1512 } 1406 static int inst;
1407 struct device_node *dp = op->node;
1408 struct uart_sunsu_port *up;
1409 struct resource *rp;
1410 int err;
1513 1411
1514 sunsu_reg.minor = sunserial_current_minor; 1412 if (inst >= UART_NR)
1413 return -EINVAL;
1515 1414
1516 sunsu_reg.nr = instance; 1415 up = &sunsu_ports[inst];
1416 up->port.line = inst;
1517 1417
1518 ret = uart_register_driver(&sunsu_reg); 1418 spin_lock_init(&up->port.lock);
1519 if (ret < 0)
1520 return ret;
1521 1419
1522 sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64; 1420 up->su_type = su_get_type(dp);
1523 1421
1524 sunserial_current_minor += instance; 1422 rp = &op->resource[0];
1423 up->port.mapbase = op->resource[0].start;
1525 1424
1526 sunsu_reg.cons = SUNSU_CONSOLE(); 1425 up->reg_size = (rp->end - rp->start) + 1;
1426 up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1427 if (!up->port.membase)
1428 return -ENOMEM;
1527 1429
1528 for (i = 0; i < UART_NR; i++) { 1430 up->port.irq = op->irqs[0];
1529 struct uart_sunsu_port *up = &sunsu_ports[i];
1530 1431
1531 /* Do not register Keyboard/Mouse lines with UART 1432 up->port.dev = &op->dev;
1532 * layer.
1533 */
1534 if (up->su_type == SU_PORT_MS ||
1535 up->su_type == SU_PORT_KBD)
1536 continue;
1537 1433
1538 if (up->port.type == PORT_UNKNOWN) 1434 up->port.type = PORT_UNKNOWN;
1539 continue; 1435 up->port.uartclk = (SU_BASE_BAUD * 16);
1540 1436
1541 uart_add_one_port(&sunsu_reg, &up->port); 1437 err = 0;
1438 if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1439 err = sunsu_kbd_ms_init(up);
1440 if (err)
1441 goto out_unmap;
1542 } 1442 }
1543 1443
1544 return 0; 1444 up->port.flags |= UPF_BOOT_AUTOCONF;
1545}
1546 1445
1547static int su_node_ok(int node, char *name, int namelen) 1446 sunsu_autoconfig(up);
1548{
1549 if (strncmp(name, "su", namelen) == 0 ||
1550 strncmp(name, "su_pnp", namelen) == 0)
1551 return 1;
1552
1553 if (strncmp(name, "serial", namelen) == 0) {
1554 char compat[32];
1555 int clen;
1556
1557 /* Is it _really_ a 'su' device? */
1558 clen = prom_getproperty(node, "compatible", compat, sizeof(compat));
1559 if (clen > 0) {
1560 if (strncmp(compat, "sab82532", 8) == 0) {
1561 /* Nope, Siemens serial, not for us. */
1562 return 0;
1563 }
1564 }
1565 return 1;
1566 }
1567 1447
1568 return 0; 1448 err = -ENODEV;
1569} 1449 if (up->port.type == PORT_UNKNOWN)
1450 goto out_unmap;
1570 1451
1571#define SU_PROPSIZE 128 1452 up->port.ops = &sunsu_pops;
1572 1453
1573/* 1454 err = uart_add_one_port(&sunsu_reg, &up->port);
1574 * Scan status structure. 1455 if (err)
1575 * "prop" is a local variable but it eats stack to keep it in each 1456 goto out_unmap;
1576 * stack frame of a recursive procedure.
1577 */
1578struct su_probe_scan {
1579 int msnode, kbnode; /* PROM nodes for mouse and keyboard */
1580 int msx, kbx; /* minors for mouse and keyboard */
1581 int devices; /* scan index */
1582 char prop[SU_PROPSIZE];
1583};
1584 1457
1585/* 1458 dev_set_drvdata(&op->dev, up);
1586 * We have several platforms which present 'su' in different parts
1587 * of the device tree. 'su' may be found under obio, ebus, isa and pci.
1588 * We walk over the tree and find them wherever PROM hides them.
1589 */
1590static void __init su_probe_any(struct su_probe_scan *t, int sunode)
1591{
1592 struct uart_sunsu_port *up;
1593 int len;
1594 1459
1595 if (t->devices >= UART_NR) 1460 inst++;
1596 return;
1597 1461
1598 for (; sunode != 0; sunode = prom_getsibling(sunode)) { 1462 return 0;
1599 len = prom_getproperty(sunode, "name", t->prop, SU_PROPSIZE); 1463
1600 if (len <= 1) 1464out_unmap:
1601 continue; /* Broken PROM node */ 1465 of_iounmap(up->port.membase, up->reg_size);
1602 1466 return err;
1603 if (su_node_ok(sunode, t->prop, len)) {
1604 up = &sunsu_ports[t->devices];
1605 if (t->kbnode != 0 && sunode == t->kbnode) {
1606 t->kbx = t->devices;
1607 up->su_type = SU_PORT_KBD;
1608 } else if (t->msnode != 0 && sunode == t->msnode) {
1609 t->msx = t->devices;
1610 up->su_type = SU_PORT_MS;
1611 } else {
1612#ifdef CONFIG_SPARC64
1613 /*
1614 * Do not attempt to use the truncated
1615 * keyboard/mouse ports as serial ports
1616 * on Ultras with PC keyboard attached.
1617 */
1618 if (prom_getbool(sunode, "mouse"))
1619 continue;
1620 if (prom_getbool(sunode, "keyboard"))
1621 continue;
1622#endif
1623 up->su_type = SU_PORT_PORT;
1624 }
1625 up->port_node = sunode;
1626 ++t->devices;
1627 } else {
1628 su_probe_any(t, prom_getchild(sunode));
1629 }
1630 }
1631} 1467}
1632 1468
1633static int __init sunsu_probe(void) 1469static int __devexit su_remove(struct of_device *dev)
1634{ 1470{
1635 int node; 1471 struct uart_sunsu_port *up = dev_get_drvdata(&dev->dev);;
1636 int len;
1637 struct su_probe_scan scan;
1638 1472
1639 /* 1473 if (up->su_type == SU_PORT_MS ||
1640 * First, we scan the tree. 1474 up->su_type == SU_PORT_KBD) {
1641 */ 1475#ifdef CONFIG_SERIO
1642 scan.devices = 0; 1476 serio_unregister_port(&up->serio);
1643 scan.msx = -1; 1477#endif
1644 scan.kbx = -1; 1478 } else if (up->port.type != PORT_UNKNOWN)
1645 scan.kbnode = 0; 1479 uart_remove_one_port(&sunsu_reg, &up->port);
1646 scan.msnode = 0;
1647 1480
1648 /* 1481 return 0;
1649 * Get the nodes for keyboard and mouse from 'aliases'... 1482}
1650 */
1651 node = prom_getchild(prom_root_node);
1652 node = prom_searchsiblings(node, "aliases");
1653 if (node != 0) {
1654 len = prom_getproperty(node, "keyboard", scan.prop, SU_PROPSIZE);
1655 if (len > 0) {
1656 scan.prop[len] = 0;
1657 scan.kbnode = prom_finddevice(scan.prop);
1658 }
1659 1483
1660 len = prom_getproperty(node, "mouse", scan.prop, SU_PROPSIZE); 1484static struct of_device_id su_match[] = {
1661 if (len > 0) { 1485 {
1662 scan.prop[len] = 0; 1486 .name = "su",
1663 scan.msnode = prom_finddevice(scan.prop); 1487 },
1664 } 1488 {
1665 } 1489 .name = "su_pnp",
1490 },
1491 {
1492 .name = "serial",
1493 .compatible = "su",
1494 },
1495 {},
1496};
1497MODULE_DEVICE_TABLE(of, su_match);
1666 1498
1667 su_probe_any(&scan, prom_getchild(prom_root_node)); 1499static struct of_platform_driver su_driver = {
1500 .name = "su",
1501 .match_table = su_match,
1502 .probe = su_probe,
1503 .remove = __devexit_p(su_remove),
1504};
1668 1505
1669 /* 1506static int num_uart;
1670 * Second, we process the special case of keyboard and mouse.
1671 *
1672 * Currently if we got keyboard and mouse hooked to "su" ports
1673 * we do not use any possible remaining "su" as a serial port.
1674 * Thus, we ignore values of .msx and .kbx, then compact ports.
1675 */
1676 if (scan.msx != -1 && scan.kbx != -1) {
1677 sunsu_ports[0].su_type = SU_PORT_MS;
1678 sunsu_ports[0].port_node = scan.msnode;
1679 sunsu_kbd_ms_init(&sunsu_ports[0], 0);
1680 1507
1681 sunsu_ports[1].su_type = SU_PORT_KBD; 1508static int __init sunsu_init(void)
1682 sunsu_ports[1].port_node = scan.kbnode; 1509{
1683 sunsu_kbd_ms_init(&sunsu_ports[1], 1); 1510 struct device_node *dp;
1511 int err;
1684 1512
1685 return 0; 1513 num_uart = 0;
1514 for_each_node_by_name(dp, "su") {
1515 if (su_get_type(dp) == SU_PORT_PORT)
1516 num_uart++;
1686 } 1517 }
1687 1518 for_each_node_by_name(dp, "su_pnp") {
1688 if (scan.msx != -1 || scan.kbx != -1) { 1519 if (su_get_type(dp) == SU_PORT_PORT)
1689 printk("sunsu_probe: cannot match keyboard and mouse, confused\n"); 1520 num_uart++;
1690 return -ENODEV; 1521 }
1522 for_each_node_by_name(dp, "serial") {
1523 if (of_device_is_compatible(dp, "su")) {
1524 if (su_get_type(dp) == SU_PORT_PORT)
1525 num_uart++;
1526 }
1691 } 1527 }
1692 1528
1693 if (scan.devices == 0) 1529 if (num_uart) {
1694 return -ENODEV; 1530 sunsu_reg.minor = sunserial_current_minor;
1531 sunsu_reg.nr = num_uart;
1532 err = uart_register_driver(&sunsu_reg);
1533 if (err)
1534 return err;
1535 sunsu_reg.tty_driver->name_base = sunsu_reg.minor - 64;
1536 sunserial_current_minor += num_uart;
1537 sunsu_reg.cons = SUNSU_CONSOLE(num_uart);
1538 }
1695 1539
1696 /* 1540 err = of_register_driver(&su_driver, &of_bus_type);
1697 * Console must be initiated after the generic initialization. 1541 if (err && num_uart)
1698 */ 1542 uart_unregister_driver(&sunsu_reg);
1699 sunsu_serial_init();
1700 1543
1701 return 0; 1544 return err;
1702} 1545}
1703 1546
1704static void __exit sunsu_exit(void) 1547static void __exit sunsu_exit(void)
1705{ 1548{
1706 int i, saw_uart; 1549 if (num_uart)
1707
1708 saw_uart = 0;
1709 for (i = 0; i < UART_NR; i++) {
1710 struct uart_sunsu_port *up = &sunsu_ports[i];
1711
1712 if (up->su_type == SU_PORT_MS ||
1713 up->su_type == SU_PORT_KBD) {
1714#ifdef CONFIG_SERIO
1715 if (up->serio) {
1716 serio_unregister_port(up->serio);
1717 up->serio = NULL;
1718 }
1719#endif
1720 } else if (up->port.type != PORT_UNKNOWN) {
1721 uart_remove_one_port(&sunsu_reg, &up->port);
1722 saw_uart++;
1723 }
1724 }
1725
1726 if (saw_uart)
1727 uart_unregister_driver(&sunsu_reg); 1550 uart_unregister_driver(&sunsu_reg);
1728} 1551}
1729 1552
1730module_init(sunsu_probe); 1553module_init(sunsu_init);
1731module_exit(sunsu_exit); 1554module_exit(sunsu_exit);
1555
1556MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1557MODULE_DESCRIPTION("Sun SU serial port driver");
1558MODULE_VERSION("2.0");
1732MODULE_LICENSE("GPL"); 1559MODULE_LICENSE("GPL");
diff --git a/drivers/serial/sunzilog.c b/drivers/serial/sunzilog.c
index 9f42677287..1caa286a6b 100644
--- a/drivers/serial/sunzilog.c
+++ b/drivers/serial/sunzilog.c
@@ -1,5 +1,4 @@
1/* 1/* sunzilog.c: Zilog serial driver for Sparc systems.
2 * sunzilog.c
3 * 2 *
4 * Driver for Zilog serial chips found on Sun workstations and 3 * Driver for Zilog serial chips found on Sun workstations and
5 * servers. This driver could actually be made more generic. 4 * servers. This driver could actually be made more generic.
@@ -10,7 +9,7 @@
10 * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their 9 * C. Dost, Pete Zaitcev, Ted Ts'o and Alex Buell for their
11 * work there. 10 * work there.
12 * 11 *
13 * Copyright (C) 2002 David S. Miller (davem@redhat.com) 12 * Copyright (C) 2002, 2006 David S. Miller (davem@davemloft.net)
14 */ 13 */
15 14
16#include <linux/config.h> 15#include <linux/config.h>
@@ -38,10 +37,8 @@
38 37
39#include <asm/io.h> 38#include <asm/io.h>
40#include <asm/irq.h> 39#include <asm/irq.h>
41#ifdef CONFIG_SPARC64 40#include <asm/prom.h>
42#include <asm/fhc.h> 41#include <asm/of_device.h>
43#endif
44#include <asm/sbus.h>
45 42
46#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 43#if defined(CONFIG_SERIAL_SUNZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
47#define SUPPORT_SYSRQ 44#define SUPPORT_SYSRQ
@@ -65,7 +62,7 @@
65#define ZSDELAY() 62#define ZSDELAY()
66#define ZSDELAY_LONG() 63#define ZSDELAY_LONG()
67#define ZS_WSYNC(__channel) \ 64#define ZS_WSYNC(__channel) \
68 sbus_readb(&((__channel)->control)) 65 readb(&((__channel)->control))
69#endif 66#endif
70 67
71static int num_sunzilog; 68static int num_sunzilog;
@@ -107,7 +104,7 @@ struct uart_sunzilog_port {
107 unsigned char prev_status; 104 unsigned char prev_status;
108 105
109#ifdef CONFIG_SERIO 106#ifdef CONFIG_SERIO
110 struct serio *serio; 107 struct serio serio;
111 int serio_open; 108 int serio_open;
112#endif 109#endif
113}; 110};
@@ -138,9 +135,9 @@ static unsigned char read_zsreg(struct zilog_channel __iomem *channel,
138{ 135{
139 unsigned char retval; 136 unsigned char retval;
140 137
141 sbus_writeb(reg, &channel->control); 138 writeb(reg, &channel->control);
142 ZSDELAY(); 139 ZSDELAY();
143 retval = sbus_readb(&channel->control); 140 retval = readb(&channel->control);
144 ZSDELAY(); 141 ZSDELAY();
145 142
146 return retval; 143 return retval;
@@ -149,9 +146,9 @@ static unsigned char read_zsreg(struct zilog_channel __iomem *channel,
149static void write_zsreg(struct zilog_channel __iomem *channel, 146static void write_zsreg(struct zilog_channel __iomem *channel,
150 unsigned char reg, unsigned char value) 147 unsigned char reg, unsigned char value)
151{ 148{
152 sbus_writeb(reg, &channel->control); 149 writeb(reg, &channel->control);
153 ZSDELAY(); 150 ZSDELAY();
154 sbus_writeb(value, &channel->control); 151 writeb(value, &channel->control);
155 ZSDELAY(); 152 ZSDELAY();
156} 153}
157 154
@@ -162,17 +159,17 @@ static void sunzilog_clear_fifo(struct zilog_channel __iomem *channel)
162 for (i = 0; i < 32; i++) { 159 for (i = 0; i < 32; i++) {
163 unsigned char regval; 160 unsigned char regval;
164 161
165 regval = sbus_readb(&channel->control); 162 regval = readb(&channel->control);
166 ZSDELAY(); 163 ZSDELAY();
167 if (regval & Rx_CH_AV) 164 if (regval & Rx_CH_AV)
168 break; 165 break;
169 166
170 regval = read_zsreg(channel, R1); 167 regval = read_zsreg(channel, R1);
171 sbus_readb(&channel->data); 168 readb(&channel->data);
172 ZSDELAY(); 169 ZSDELAY();
173 170
174 if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) { 171 if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) {
175 sbus_writeb(ERR_RES, &channel->control); 172 writeb(ERR_RES, &channel->control);
176 ZSDELAY(); 173 ZSDELAY();
177 ZS_WSYNC(channel); 174 ZS_WSYNC(channel);
178 } 175 }
@@ -194,7 +191,7 @@ static void __load_zsregs(struct zilog_channel __iomem *channel, unsigned char *
194 udelay(100); 191 udelay(100);
195 } 192 }
196 193
197 sbus_writeb(ERR_RES, &channel->control); 194 writeb(ERR_RES, &channel->control);
198 ZSDELAY(); 195 ZSDELAY();
199 ZS_WSYNC(channel); 196 ZS_WSYNC(channel);
200 197
@@ -291,7 +288,7 @@ static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up,
291 /* Stop-A is handled by drivers/char/keyboard.c now. */ 288 /* Stop-A is handled by drivers/char/keyboard.c now. */
292#ifdef CONFIG_SERIO 289#ifdef CONFIG_SERIO
293 if (up->serio_open) 290 if (up->serio_open)
294 serio_interrupt(up->serio, ch, 0, regs); 291 serio_interrupt(&up->serio, ch, 0, regs);
295#endif 292#endif
296 } else if (ZS_IS_MOUSE(up)) { 293 } else if (ZS_IS_MOUSE(up)) {
297 int ret = suncore_mouse_baud_detection(ch, is_break); 294 int ret = suncore_mouse_baud_detection(ch, is_break);
@@ -306,7 +303,7 @@ static void sunzilog_kbdms_receive_chars(struct uart_sunzilog_port *up,
306 case 0: 303 case 0:
307#ifdef CONFIG_SERIO 304#ifdef CONFIG_SERIO
308 if (up->serio_open) 305 if (up->serio_open)
309 serio_interrupt(up->serio, ch, 0, regs); 306 serio_interrupt(&up->serio, ch, 0, regs);
310#endif 307#endif
311 break; 308 break;
312 }; 309 };
@@ -330,12 +327,12 @@ sunzilog_receive_chars(struct uart_sunzilog_port *up,
330 327
331 r1 = read_zsreg(channel, R1); 328 r1 = read_zsreg(channel, R1);
332 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) { 329 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
333 sbus_writeb(ERR_RES, &channel->control); 330 writeb(ERR_RES, &channel->control);
334 ZSDELAY(); 331 ZSDELAY();
335 ZS_WSYNC(channel); 332 ZS_WSYNC(channel);
336 } 333 }
337 334
338 ch = sbus_readb(&channel->control); 335 ch = readb(&channel->control);
339 ZSDELAY(); 336 ZSDELAY();
340 337
341 /* This funny hack depends upon BRK_ABRT not interfering 338 /* This funny hack depends upon BRK_ABRT not interfering
@@ -347,7 +344,7 @@ sunzilog_receive_chars(struct uart_sunzilog_port *up,
347 if (!(ch & Rx_CH_AV)) 344 if (!(ch & Rx_CH_AV))
348 break; 345 break;
349 346
350 ch = sbus_readb(&channel->data); 347 ch = readb(&channel->data);
351 ZSDELAY(); 348 ZSDELAY();
352 349
353 ch &= up->parity_mask; 350 ch &= up->parity_mask;
@@ -406,10 +403,10 @@ static void sunzilog_status_handle(struct uart_sunzilog_port *up,
406{ 403{
407 unsigned char status; 404 unsigned char status;
408 405
409 status = sbus_readb(&channel->control); 406 status = readb(&channel->control);
410 ZSDELAY(); 407 ZSDELAY();
411 408
412 sbus_writeb(RES_EXT_INT, &channel->control); 409 writeb(RES_EXT_INT, &channel->control);
413 ZSDELAY(); 410 ZSDELAY();
414 ZS_WSYNC(channel); 411 ZS_WSYNC(channel);
415 412
@@ -421,7 +418,7 @@ static void sunzilog_status_handle(struct uart_sunzilog_port *up,
421 * confusing the PROM. 418 * confusing the PROM.
422 */ 419 */
423 while (1) { 420 while (1) {
424 status = sbus_readb(&channel->control); 421 status = readb(&channel->control);
425 ZSDELAY(); 422 ZSDELAY();
426 if (!(status & BRK_ABRT)) 423 if (!(status & BRK_ABRT))
427 break; 424 break;
@@ -458,7 +455,7 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
458 struct circ_buf *xmit; 455 struct circ_buf *xmit;
459 456
460 if (ZS_IS_CONS(up)) { 457 if (ZS_IS_CONS(up)) {
461 unsigned char status = sbus_readb(&channel->control); 458 unsigned char status = readb(&channel->control);
462 ZSDELAY(); 459 ZSDELAY();
463 460
464 /* TX still busy? Just wait for the next TX done interrupt. 461 /* TX still busy? Just wait for the next TX done interrupt.
@@ -487,7 +484,7 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
487 484
488 if (up->port.x_char) { 485 if (up->port.x_char) {
489 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; 486 up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
490 sbus_writeb(up->port.x_char, &channel->data); 487 writeb(up->port.x_char, &channel->data);
491 ZSDELAY(); 488 ZSDELAY();
492 ZS_WSYNC(channel); 489 ZS_WSYNC(channel);
493 490
@@ -506,7 +503,7 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
506 goto ack_tx_int; 503 goto ack_tx_int;
507 504
508 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; 505 up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
509 sbus_writeb(xmit->buf[xmit->tail], &channel->data); 506 writeb(xmit->buf[xmit->tail], &channel->data);
510 ZSDELAY(); 507 ZSDELAY();
511 ZS_WSYNC(channel); 508 ZS_WSYNC(channel);
512 509
@@ -519,7 +516,7 @@ static void sunzilog_transmit_chars(struct uart_sunzilog_port *up,
519 return; 516 return;
520 517
521ack_tx_int: 518ack_tx_int:
522 sbus_writeb(RES_Tx_P, &channel->control); 519 writeb(RES_Tx_P, &channel->control);
523 ZSDELAY(); 520 ZSDELAY();
524 ZS_WSYNC(channel); 521 ZS_WSYNC(channel);
525} 522}
@@ -540,7 +537,7 @@ static irqreturn_t sunzilog_interrupt(int irq, void *dev_id, struct pt_regs *reg
540 /* Channel A */ 537 /* Channel A */
541 tty = NULL; 538 tty = NULL;
542 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) { 539 if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
543 sbus_writeb(RES_H_IUS, &channel->control); 540 writeb(RES_H_IUS, &channel->control);
544 ZSDELAY(); 541 ZSDELAY();
545 ZS_WSYNC(channel); 542 ZS_WSYNC(channel);
546 543
@@ -563,7 +560,7 @@ static irqreturn_t sunzilog_interrupt(int irq, void *dev_id, struct pt_regs *reg
563 spin_lock(&up->port.lock); 560 spin_lock(&up->port.lock);
564 tty = NULL; 561 tty = NULL;
565 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) { 562 if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
566 sbus_writeb(RES_H_IUS, &channel->control); 563 writeb(RES_H_IUS, &channel->control);
567 ZSDELAY(); 564 ZSDELAY();
568 ZS_WSYNC(channel); 565 ZS_WSYNC(channel);
569 566
@@ -594,7 +591,7 @@ static __inline__ unsigned char sunzilog_read_channel_status(struct uart_port *p
594 unsigned char status; 591 unsigned char status;
595 592
596 channel = ZILOG_CHANNEL_FROM_PORT(port); 593 channel = ZILOG_CHANNEL_FROM_PORT(port);
597 status = sbus_readb(&channel->control); 594 status = readb(&channel->control);
598 ZSDELAY(); 595 ZSDELAY();
599 596
600 return status; 597 return status;
@@ -682,7 +679,7 @@ static void sunzilog_start_tx(struct uart_port *port)
682 up->flags |= SUNZILOG_FLAG_TX_ACTIVE; 679 up->flags |= SUNZILOG_FLAG_TX_ACTIVE;
683 up->flags &= ~SUNZILOG_FLAG_TX_STOPPED; 680 up->flags &= ~SUNZILOG_FLAG_TX_STOPPED;
684 681
685 status = sbus_readb(&channel->control); 682 status = readb(&channel->control);
686 ZSDELAY(); 683 ZSDELAY();
687 684
688 /* TX busy? Just wait for the TX done interrupt. */ 685 /* TX busy? Just wait for the TX done interrupt. */
@@ -693,7 +690,7 @@ static void sunzilog_start_tx(struct uart_port *port)
693 * IRQ sending engine. 690 * IRQ sending engine.
694 */ 691 */
695 if (port->x_char) { 692 if (port->x_char) {
696 sbus_writeb(port->x_char, &channel->data); 693 writeb(port->x_char, &channel->data);
697 ZSDELAY(); 694 ZSDELAY();
698 ZS_WSYNC(channel); 695 ZS_WSYNC(channel);
699 696
@@ -702,7 +699,7 @@ static void sunzilog_start_tx(struct uart_port *port)
702 } else { 699 } else {
703 struct circ_buf *xmit = &port->info->xmit; 700 struct circ_buf *xmit = &port->info->xmit;
704 701
705 sbus_writeb(xmit->buf[xmit->tail], &channel->data); 702 writeb(xmit->buf[xmit->tail], &channel->data);
706 ZSDELAY(); 703 ZSDELAY();
707 ZS_WSYNC(channel); 704 ZS_WSYNC(channel);
708 705
@@ -779,7 +776,7 @@ static void __sunzilog_startup(struct uart_sunzilog_port *up)
779 struct zilog_channel __iomem *channel; 776 struct zilog_channel __iomem *channel;
780 777
781 channel = ZILOG_CHANNEL_FROM_PORT(&up->port); 778 channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
782 up->prev_status = sbus_readb(&channel->control); 779 up->prev_status = readb(&channel->control);
783 780
784 /* Enable receiver and transmitter. */ 781 /* Enable receiver and transmitter. */
785 up->curregs[R3] |= RxENAB; 782 up->curregs[R3] |= RxENAB;
@@ -963,7 +960,7 @@ sunzilog_set_termios(struct uart_port *port, struct termios *termios,
963 960
964static const char *sunzilog_type(struct uart_port *port) 961static const char *sunzilog_type(struct uart_port *port)
965{ 962{
966 return "SunZilog"; 963 return "zs";
967} 964}
968 965
969/* We do not request/release mappings of the registers here, this 966/* We do not request/release mappings of the registers here, this
@@ -1012,7 +1009,6 @@ static struct uart_sunzilog_port *sunzilog_port_table;
1012static struct zilog_layout __iomem **sunzilog_chip_regs; 1009static struct zilog_layout __iomem **sunzilog_chip_regs;
1013 1010
1014static struct uart_sunzilog_port *sunzilog_irq_chain; 1011static struct uart_sunzilog_port *sunzilog_irq_chain;
1015static int zilog_irq = -1;
1016 1012
1017static struct uart_driver sunzilog_reg = { 1013static struct uart_driver sunzilog_reg = {
1018 .owner = THIS_MODULE, 1014 .owner = THIS_MODULE,
@@ -1021,232 +1017,47 @@ static struct uart_driver sunzilog_reg = {
1021 .major = TTY_MAJOR, 1017 .major = TTY_MAJOR,
1022}; 1018};
1023 1019
1024static void * __init alloc_one_table(unsigned long size) 1020static int __init sunzilog_alloc_tables(void)
1025{
1026 void *ret;
1027
1028 ret = kmalloc(size, GFP_KERNEL);
1029 if (ret != NULL)
1030 memset(ret, 0, size);
1031
1032 return ret;
1033}
1034
1035static void __init sunzilog_alloc_tables(void)
1036{
1037 sunzilog_port_table =
1038 alloc_one_table(NUM_CHANNELS * sizeof(struct uart_sunzilog_port));
1039 sunzilog_chip_regs =
1040 alloc_one_table(NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *));
1041
1042 if (sunzilog_port_table == NULL || sunzilog_chip_regs == NULL) {
1043 prom_printf("SunZilog: Cannot allocate tables.\n");
1044 prom_halt();
1045 }
1046}
1047
1048#ifdef CONFIG_SPARC64
1049
1050/* We used to attempt to use the address property of the Zilog device node
1051 * but that totally is not necessary on sparc64.
1052 */
1053static struct zilog_layout __iomem * __init get_zs_sun4u(int chip, int zsnode)
1054{ 1021{
1055 void __iomem *mapped_addr; 1022 struct uart_sunzilog_port *up;
1056 unsigned int sun4u_ino; 1023 unsigned long size;
1057 struct sbus_bus *sbus = NULL; 1024 int i;
1058 struct sbus_dev *sdev = NULL;
1059 int err;
1060
1061 if (central_bus == NULL) {
1062 for_each_sbus(sbus) {
1063 for_each_sbusdev(sdev, sbus) {
1064 if (sdev->prom_node == zsnode)
1065 goto found;
1066 }
1067 }
1068 }
1069 found:
1070 if (sdev == NULL && central_bus == NULL) {
1071 prom_printf("SunZilog: sdev&&central == NULL for "
1072 "Zilog %d in get_zs_sun4u.\n", chip);
1073 prom_halt();
1074 }
1075 if (central_bus == NULL) {
1076 mapped_addr =
1077 sbus_ioremap(&sdev->resource[0], 0,
1078 PAGE_SIZE,
1079 "Zilog Registers");
1080 } else {
1081 struct linux_prom_registers zsregs[1];
1082
1083 err = prom_getproperty(zsnode, "reg",
1084 (char *) &zsregs[0],
1085 sizeof(zsregs));
1086 if (err == -1) {
1087 prom_printf("SunZilog: Cannot map "
1088 "Zilog %d regs on "
1089 "central bus.\n", chip);
1090 prom_halt();
1091 }
1092 apply_fhc_ranges(central_bus->child,
1093 &zsregs[0], 1);
1094 apply_central_ranges(central_bus, &zsregs[0], 1);
1095 mapped_addr = (void __iomem *)
1096 ((((u64)zsregs[0].which_io)<<32UL) |
1097 ((u64)zsregs[0].phys_addr));
1098 }
1099
1100 if (zilog_irq == -1) {
1101 if (central_bus) {
1102 unsigned long iclr, imap;
1103
1104 iclr = central_bus->child->fhc_regs.uregs
1105 + FHC_UREGS_ICLR;
1106 imap = central_bus->child->fhc_regs.uregs
1107 + FHC_UREGS_IMAP;
1108 zilog_irq = build_irq(0, iclr, imap);
1109 } else {
1110 err = prom_getproperty(zsnode, "interrupts",
1111 (char *) &sun4u_ino,
1112 sizeof(sun4u_ino));
1113 zilog_irq = sbus_build_irq(sbus_root, sun4u_ino);
1114 }
1115 }
1116
1117 return (struct zilog_layout __iomem *) mapped_addr;
1118}
1119#else /* CONFIG_SPARC64 */
1120
1121/*
1122 * XXX The sun4d case is utterly screwed: it tries to re-walk the tree
1123 * (for the 3rd time) in order to find bootbus and cpu. Streamline it.
1124 */
1125static struct zilog_layout __iomem * __init get_zs_sun4cmd(int chip, int node)
1126{
1127 struct linux_prom_irqs irq_info[2];
1128 void __iomem *mapped_addr = NULL;
1129 int zsnode, cpunode, bbnode;
1130 struct linux_prom_registers zsreg[4];
1131 struct resource res;
1132
1133 if (sparc_cpu_model == sun4d) {
1134 int walk;
1135
1136 zsnode = 0;
1137 bbnode = 0;
1138 cpunode = 0;
1139 for (walk = prom_getchild(prom_root_node);
1140 (walk = prom_searchsiblings(walk, "cpu-unit")) != 0;
1141 walk = prom_getsibling(walk)) {
1142 bbnode = prom_getchild(walk);
1143 if (bbnode &&
1144 (bbnode = prom_searchsiblings(bbnode, "bootbus"))) {
1145 if ((zsnode = prom_getchild(bbnode)) == node) {
1146 cpunode = walk;
1147 break;
1148 }
1149 }
1150 }
1151 if (!walk) {
1152 prom_printf("SunZilog: Cannot find the %d'th bootbus on sun4d.\n",
1153 (chip / 2));
1154 prom_halt();
1155 }
1156 1025
1157 if (prom_getproperty(zsnode, "reg", 1026 size = NUM_CHANNELS * sizeof(struct uart_sunzilog_port);
1158 (char *) zsreg, sizeof(zsreg)) == -1) { 1027 sunzilog_port_table = kzalloc(size, GFP_KERNEL);
1159 prom_printf("SunZilog: Cannot map Zilog %d\n", chip); 1028 if (!sunzilog_port_table)
1160 prom_halt(); 1029 return -ENOMEM;
1161 }
1162 /* XXX Looks like an off by one? */
1163 prom_apply_generic_ranges(bbnode, cpunode, zsreg, 1);
1164 res.start = zsreg[0].phys_addr;
1165 res.end = res.start + (8 - 1);
1166 res.flags = zsreg[0].which_io | IORESOURCE_IO;
1167 mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial");
1168 1030
1169 } else { 1031 for (i = 0; i < NUM_CHANNELS; i++) {
1170 zsnode = node; 1032 up = &sunzilog_port_table[i];
1171 1033
1172#if 0 /* XXX When was this used? */ 1034 spin_lock_init(&up->port.lock);
1173 if (prom_getintdefault(zsnode, "slave", -1) != chipid) {
1174 zsnode = prom_getsibling(zsnode);
1175 continue;
1176 }
1177#endif
1178 1035
1179 /* 1036 if (i == 0)
1180 * "address" is only present on ports that OBP opened 1037 sunzilog_irq_chain = up;
1181 * (from Mitch Bradley's "Hitchhiker's Guide to OBP").
1182 * We do not use it.
1183 */
1184 1038
1185 if (prom_getproperty(zsnode, "reg", 1039 if (i < NUM_CHANNELS - 1)
1186 (char *) zsreg, sizeof(zsreg)) == -1) { 1040 up->next = up + 1;
1187 prom_printf("SunZilog: Cannot map Zilog %d\n", chip); 1041 else
1188 prom_halt(); 1042 up->next = NULL;
1189 }
1190 if (sparc_cpu_model == sun4m) /* Crude. Pass parent. XXX */
1191 prom_apply_obio_ranges(zsreg, 1);
1192 res.start = zsreg[0].phys_addr;
1193 res.end = res.start + (8 - 1);
1194 res.flags = zsreg[0].which_io | IORESOURCE_IO;
1195 mapped_addr = sbus_ioremap(&res, 0, 8, "Zilog Serial");
1196 } 1043 }
1197 1044
1198 if (prom_getproperty(zsnode, "intr", 1045 size = NUM_SUNZILOG * sizeof(struct zilog_layout __iomem *);
1199 (char *) irq_info, sizeof(irq_info)) 1046 sunzilog_chip_regs = kzalloc(size, GFP_KERNEL);
1200 % sizeof(struct linux_prom_irqs)) { 1047 if (!sunzilog_chip_regs) {
1201 prom_printf("SunZilog: Cannot get IRQ property for Zilog %d.\n", 1048 kfree(sunzilog_port_table);
1202 chip); 1049 sunzilog_irq_chain = NULL;
1203 prom_halt(); 1050 return -ENOMEM;
1204 }
1205 if (zilog_irq == -1) {
1206 zilog_irq = irq_info[0].pri;
1207 } else if (zilog_irq != irq_info[0].pri) {
1208 /* XXX. Dumb. Should handle per-chip IRQ, for add-ons. */
1209 prom_printf("SunZilog: Inconsistent IRQ layout for Zilog %d.\n",
1210 chip);
1211 prom_halt();
1212 } 1051 }
1213 1052
1214 return (struct zilog_layout __iomem *) mapped_addr; 1053 return 0;
1215} 1054}
1216#endif /* !(CONFIG_SPARC64) */
1217 1055
1218/* Get the address of the registers for SunZilog instance CHIP. */ 1056static void sunzilog_free_tables(void)
1219static struct zilog_layout __iomem * __init get_zs(int chip, int node)
1220{ 1057{
1221 if (chip < 0 || chip >= NUM_SUNZILOG) { 1058 kfree(sunzilog_port_table);
1222 prom_printf("SunZilog: Illegal chip number %d in get_zs.\n", chip); 1059 sunzilog_irq_chain = NULL;
1223 prom_halt(); 1060 kfree(sunzilog_chip_regs);
1224 }
1225
1226#ifdef CONFIG_SPARC64
1227 return get_zs_sun4u(chip, node);
1228#else
1229
1230 if (sparc_cpu_model == sun4) {
1231 struct resource res;
1232
1233 /* Not probe-able, hard code it. */
1234 switch (chip) {
1235 case 0:
1236 res.start = 0xf1000000;
1237 break;
1238 case 1:
1239 res.start = 0xf0000000;
1240 break;
1241 };
1242 zilog_irq = 12;
1243 res.end = (res.start + (8 - 1));
1244 res.flags = IORESOURCE_IO;
1245 return sbus_ioremap(&res, 0, 8, "SunZilog");
1246 }
1247
1248 return get_zs_sun4cmd(chip, node);
1249#endif
1250} 1061}
1251 1062
1252#define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */ 1063#define ZS_PUT_CHAR_MAX_DELAY 2000 /* 10 ms */
@@ -1260,7 +1071,7 @@ static void sunzilog_putchar(struct uart_port *port, int ch)
1260 * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM 1071 * udelay with ZSDELAY as that is a NOP on some platforms. -DaveM
1261 */ 1072 */
1262 do { 1073 do {
1263 unsigned char val = sbus_readb(&channel->control); 1074 unsigned char val = readb(&channel->control);
1264 if (val & Tx_BUF_EMP) { 1075 if (val & Tx_BUF_EMP) {
1265 ZSDELAY(); 1076 ZSDELAY();
1266 break; 1077 break;
@@ -1268,7 +1079,7 @@ static void sunzilog_putchar(struct uart_port *port, int ch)
1268 udelay(5); 1079 udelay(5);
1269 } while (--loops); 1080 } while (--loops);
1270 1081
1271 sbus_writeb(ch, &channel->data); 1082 writeb(ch, &channel->data);
1272 ZSDELAY(); 1083 ZSDELAY();
1273 ZS_WSYNC(channel); 1084 ZS_WSYNC(channel);
1274} 1085}
@@ -1385,28 +1196,6 @@ static struct console sunzilog_console = {
1385 .data = &sunzilog_reg, 1196 .data = &sunzilog_reg,
1386}; 1197};
1387 1198
1388static int __init sunzilog_console_init(void)
1389{
1390 int i;
1391
1392 if (con_is_present())
1393 return 0;
1394
1395 for (i = 0; i < NUM_CHANNELS; i++) {
1396 int this_minor = sunzilog_reg.minor + i;
1397
1398 if ((this_minor - 64) == (serial_console - 1))
1399 break;
1400 }
1401 if (i == NUM_CHANNELS)
1402 return 0;
1403
1404 sunzilog_console.index = i;
1405 sunzilog_port_table[i].flags |= SUNZILOG_FLAG_IS_CONS;
1406 register_console(&sunzilog_console);
1407 return 0;
1408}
1409
1410static inline struct console *SUNZILOG_CONSOLE(void) 1199static inline struct console *SUNZILOG_CONSOLE(void)
1411{ 1200{
1412 int i; 1201 int i;
@@ -1431,101 +1220,8 @@ static inline struct console *SUNZILOG_CONSOLE(void)
1431 1220
1432#else 1221#else
1433#define SUNZILOG_CONSOLE() (NULL) 1222#define SUNZILOG_CONSOLE() (NULL)
1434#define sunzilog_console_init() do { } while (0)
1435#endif 1223#endif
1436 1224
1437/*
1438 * We scan the PROM tree recursively. This is the most reliable way
1439 * to find Zilog nodes on various platforms. However, we face an extreme
1440 * shortage of kernel stack, so we must be very careful. To that end,
1441 * we scan only to a certain depth, and we use a common property buffer
1442 * in the scan structure.
1443 */
1444#define ZS_PROPSIZE 128
1445#define ZS_SCAN_DEPTH 5
1446
1447struct zs_probe_scan {
1448 int depth;
1449 void (*scanner)(struct zs_probe_scan *t, int node);
1450
1451 int devices;
1452 char prop[ZS_PROPSIZE];
1453};
1454
1455static int __inline__ sunzilog_node_ok(int node, const char *name, int len)
1456{
1457 if (strncmp(name, "zs", len) == 0)
1458 return 1;
1459 /* Don't fold this procedure just yet. Compare to su_node_ok(). */
1460 return 0;
1461}
1462
1463static void __init sunzilog_scan(struct zs_probe_scan *t, int node)
1464{
1465 int len;
1466
1467 for (; node != 0; node = prom_getsibling(node)) {
1468 len = prom_getproperty(node, "name", t->prop, ZS_PROPSIZE);
1469 if (len <= 1)
1470 continue; /* Broken PROM node */
1471 if (sunzilog_node_ok(node, t->prop, len)) {
1472 (*t->scanner)(t, node);
1473 } else {
1474 if (t->depth < ZS_SCAN_DEPTH) {
1475 t->depth++;
1476 sunzilog_scan(t, prom_getchild(node));
1477 --t->depth;
1478 }
1479 }
1480 }
1481}
1482
1483static void __init sunzilog_prepare(void)
1484{
1485 struct uart_sunzilog_port *up;
1486 struct zilog_layout __iomem *rp;
1487 int channel, chip;
1488
1489 /*
1490 * Temporary fix.
1491 */
1492 for (channel = 0; channel < NUM_CHANNELS; channel++)
1493 spin_lock_init(&sunzilog_port_table[channel].port.lock);
1494
1495 sunzilog_irq_chain = up = &sunzilog_port_table[0];
1496 for (channel = 0; channel < NUM_CHANNELS - 1; channel++)
1497 up[channel].next = &up[channel + 1];
1498 up[channel].next = NULL;
1499
1500 for (chip = 0; chip < NUM_SUNZILOG; chip++) {
1501 rp = sunzilog_chip_regs[chip];
1502 up[(chip * 2) + 0].port.membase = (void __iomem *)&rp->channelA;
1503 up[(chip * 2) + 1].port.membase = (void __iomem *)&rp->channelB;
1504
1505 /* Channel A */
1506 up[(chip * 2) + 0].port.iotype = UPIO_MEM;
1507 up[(chip * 2) + 0].port.irq = zilog_irq;
1508 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK;
1509 up[(chip * 2) + 0].port.fifosize = 1;
1510 up[(chip * 2) + 0].port.ops = &sunzilog_pops;
1511 up[(chip * 2) + 0].port.type = PORT_SUNZILOG;
1512 up[(chip * 2) + 0].port.flags = 0;
1513 up[(chip * 2) + 0].port.line = (chip * 2) + 0;
1514 up[(chip * 2) + 0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
1515
1516 /* Channel B */
1517 up[(chip * 2) + 1].port.iotype = UPIO_MEM;
1518 up[(chip * 2) + 1].port.irq = zilog_irq;
1519 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK;
1520 up[(chip * 2) + 1].port.fifosize = 1;
1521 up[(chip * 2) + 1].port.ops = &sunzilog_pops;
1522 up[(chip * 2) + 1].port.type = PORT_SUNZILOG;
1523 up[(chip * 2) + 1].port.flags = 0;
1524 up[(chip * 2) + 1].port.line = (chip * 2) + 1;
1525 up[(chip * 2) + 1].flags |= 0;
1526 }
1527}
1528
1529static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel) 1225static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channel)
1530{ 1226{
1531 int baud, brg; 1227 int baud, brg;
@@ -1539,8 +1235,6 @@ static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channe
1539 up->cflag = B4800 | CS8 | CLOCAL | CREAD; 1235 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1540 baud = 4800; 1236 baud = 4800;
1541 } 1237 }
1542 printk(KERN_INFO "zs%d at 0x%p (irq = %d) is a SunZilog\n",
1543 channel, up->port.membase, zilog_irq);
1544 1238
1545 up->curregs[R15] = BRKIE; 1239 up->curregs[R15] = BRKIE;
1546 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); 1240 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
@@ -1552,216 +1246,268 @@ static void __init sunzilog_init_kbdms(struct uart_sunzilog_port *up, int channe
1552#ifdef CONFIG_SERIO 1246#ifdef CONFIG_SERIO
1553static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel) 1247static void __init sunzilog_register_serio(struct uart_sunzilog_port *up, int channel)
1554{ 1248{
1555 struct serio *serio; 1249 struct serio *serio = &up->serio;
1556
1557 up->serio = serio = kmalloc(sizeof(struct serio), GFP_KERNEL);
1558 if (serio) {
1559 memset(serio, 0, sizeof(*serio));
1560
1561 serio->port_data = up;
1562
1563 serio->id.type = SERIO_RS232;
1564 if (channel == KEYBOARD_LINE) {
1565 serio->id.proto = SERIO_SUNKBD;
1566 strlcpy(serio->name, "zskbd", sizeof(serio->name));
1567 } else {
1568 serio->id.proto = SERIO_SUN;
1569 serio->id.extra = 1;
1570 strlcpy(serio->name, "zsms", sizeof(serio->name));
1571 }
1572 strlcpy(serio->phys,
1573 (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"),
1574 sizeof(serio->phys));
1575 1250
1576 serio->write = sunzilog_serio_write; 1251 serio->port_data = up;
1577 serio->open = sunzilog_serio_open;
1578 serio->close = sunzilog_serio_close;
1579 1252
1580 serio_register_port(serio); 1253 serio->id.type = SERIO_RS232;
1254 if (channel == KEYBOARD_LINE) {
1255 serio->id.proto = SERIO_SUNKBD;
1256 strlcpy(serio->name, "zskbd", sizeof(serio->name));
1581 } else { 1257 } else {
1582 printk(KERN_WARNING "zs%d: not enough memory for serio port\n", 1258 serio->id.proto = SERIO_SUN;
1583 channel); 1259 serio->id.extra = 1;
1260 strlcpy(serio->name, "zsms", sizeof(serio->name));
1584 } 1261 }
1262 strlcpy(serio->phys,
1263 (channel == KEYBOARD_LINE ? "zs/serio0" : "zs/serio1"),
1264 sizeof(serio->phys));
1265
1266 serio->write = sunzilog_serio_write;
1267 serio->open = sunzilog_serio_open;
1268 serio->close = sunzilog_serio_close;
1269 serio->dev.parent = up->port.dev;
1270
1271 serio_register_port(serio);
1585} 1272}
1586#endif 1273#endif
1587 1274
1588static void __init sunzilog_init_hw(void) 1275static void __init sunzilog_init_hw(struct uart_sunzilog_port *up)
1589{ 1276{
1590 int i; 1277 struct zilog_channel __iomem *channel;
1591 1278 unsigned long flags;
1592 for (i = 0; i < NUM_CHANNELS; i++) { 1279 int baud, brg;
1593 struct uart_sunzilog_port *up = &sunzilog_port_table[i];
1594 struct zilog_channel __iomem *channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
1595 unsigned long flags;
1596 int baud, brg;
1597 1280
1598 spin_lock_irqsave(&up->port.lock, flags); 1281 channel = ZILOG_CHANNEL_FROM_PORT(&up->port);
1599 1282
1600 if (ZS_IS_CHANNEL_A(up)) { 1283 spin_lock_irqsave(&up->port.lock, flags);
1601 write_zsreg(channel, R9, FHWRES); 1284 if (ZS_IS_CHANNEL_A(up)) {
1602 ZSDELAY_LONG(); 1285 write_zsreg(channel, R9, FHWRES);
1603 (void) read_zsreg(channel, R0); 1286 ZSDELAY_LONG();
1604 } 1287 (void) read_zsreg(channel, R0);
1288 }
1605 1289
1606 if (i == KEYBOARD_LINE || i == MOUSE_LINE) { 1290 if (up->port.line == KEYBOARD_LINE ||
1607 sunzilog_init_kbdms(up, i); 1291 up->port.line == MOUSE_LINE) {
1608 up->curregs[R9] |= (NV | MIE); 1292 sunzilog_init_kbdms(up, up->port.line);
1609 write_zsreg(channel, R9, up->curregs[R9]); 1293 up->curregs[R9] |= (NV | MIE);
1610 } else { 1294 write_zsreg(channel, R9, up->curregs[R9]);
1611 /* Normal serial TTY. */ 1295 } else {
1612 up->parity_mask = 0xff; 1296 /* Normal serial TTY. */
1613 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB; 1297 up->parity_mask = 0xff;
1614 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; 1298 up->curregs[R1] = EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB;
1615 up->curregs[R3] = RxENAB | Rx8; 1299 up->curregs[R4] = PAR_EVEN | X16CLK | SB1;
1616 up->curregs[R5] = TxENAB | Tx8; 1300 up->curregs[R3] = RxENAB | Rx8;
1617 up->curregs[R9] = NV | MIE; 1301 up->curregs[R5] = TxENAB | Tx8;
1618 up->curregs[R10] = NRZ; 1302 up->curregs[R9] = NV | MIE;
1619 up->curregs[R11] = TCBR | RCBR; 1303 up->curregs[R10] = NRZ;
1620 baud = 9600; 1304 up->curregs[R11] = TCBR | RCBR;
1621 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); 1305 baud = 9600;
1622 up->curregs[R12] = (brg & 0xff); 1306 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR);
1623 up->curregs[R13] = (brg >> 8) & 0xff; 1307 up->curregs[R12] = (brg & 0xff);
1624 up->curregs[R14] = BRSRC | BRENAB; 1308 up->curregs[R13] = (brg >> 8) & 0xff;
1625 __load_zsregs(channel, up->curregs); 1309 up->curregs[R14] = BRSRC | BRENAB;
1626 write_zsreg(channel, R9, up->curregs[R9]); 1310 __load_zsregs(channel, up->curregs);
1627 } 1311 write_zsreg(channel, R9, up->curregs[R9]);
1312 }
1628 1313
1629 spin_unlock_irqrestore(&up->port.lock, flags); 1314 spin_unlock_irqrestore(&up->port.lock, flags);
1630 1315
1631#ifdef CONFIG_SERIO 1316#ifdef CONFIG_SERIO
1632 if (i == KEYBOARD_LINE || i == MOUSE_LINE) 1317 if (up->port.line == KEYBOARD_LINE || up->port.line == MOUSE_LINE)
1633 sunzilog_register_serio(up, i); 1318 sunzilog_register_serio(up, up->port.line);
1634#endif 1319#endif
1635 }
1636}
1637
1638static struct zilog_layout __iomem * __init get_zs(int chip, int node);
1639
1640static void __init sunzilog_scan_probe(struct zs_probe_scan *t, int node)
1641{
1642 sunzilog_chip_regs[t->devices] = get_zs(t->devices, node);
1643 t->devices++;
1644} 1320}
1645 1321
1646static int __init sunzilog_ports_init(void) 1322static int __devinit zs_get_instance(struct device_node *dp)
1647{ 1323{
1648 struct zs_probe_scan scan;
1649 int ret; 1324 int ret;
1650 int uart_count;
1651 int i;
1652
1653 printk(KERN_DEBUG "SunZilog: %d chips.\n", NUM_SUNZILOG);
1654
1655 scan.scanner = sunzilog_scan_probe;
1656 scan.depth = 0;
1657 scan.devices = 0;
1658 sunzilog_scan(&scan, prom_getchild(prom_root_node));
1659
1660 sunzilog_prepare();
1661 1325
1662 if (request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ, 1326 ret = of_getintprop_default(dp, "slave", -1);
1663 "SunZilog", sunzilog_irq_chain)) { 1327 if (ret != -1)
1664 prom_printf("SunZilog: Unable to register zs interrupt handler.\n"); 1328 return ret;
1665 prom_halt();
1666 }
1667 1329
1668 sunzilog_init_hw(); 1330 if (of_find_property(dp, "keyboard", NULL))
1331 ret = 1;
1332 else
1333 ret = 0;
1669 1334
1670 /* We can only init this once we have probed the Zilogs 1335 return ret;
1671 * in the system. Do not count channels assigned to keyboards 1336}
1672 * or mice when we are deciding how many ports to register.
1673 */
1674 uart_count = 0;
1675 for (i = 0; i < NUM_CHANNELS; i++) {
1676 struct uart_sunzilog_port *up = &sunzilog_port_table[i];
1677 1337
1678 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) 1338static int zilog_irq = -1;
1679 continue;
1680 1339
1681 uart_count++; 1340static int __devinit zs_probe(struct of_device *dev, const struct of_device_id *match)
1682 } 1341{
1683 1342 struct of_device *op = to_of_device(&dev->dev);
1684 sunzilog_reg.nr = uart_count; 1343 struct uart_sunzilog_port *up;
1685 sunzilog_reg.minor = sunserial_current_minor; 1344 struct zilog_layout __iomem *rp;
1345 int inst = zs_get_instance(dev->node);
1346 int err;
1686 1347
1687 ret = uart_register_driver(&sunzilog_reg); 1348 sunzilog_chip_regs[inst] = of_ioremap(&op->resource[0], 0,
1688 if (ret == 0) { 1349 sizeof(struct zilog_layout),
1689 sunzilog_reg.tty_driver->name_base = sunzilog_reg.minor - 64; 1350 "zs");
1690 sunzilog_reg.cons = SUNZILOG_CONSOLE(); 1351 if (!sunzilog_chip_regs[inst])
1352 return -ENOMEM;
1691 1353
1692 sunserial_current_minor += uart_count; 1354 rp = sunzilog_chip_regs[inst];
1693 1355
1694 for (i = 0; i < NUM_CHANNELS; i++) { 1356 if (zilog_irq == -1) {
1695 struct uart_sunzilog_port *up = &sunzilog_port_table[i]; 1357 zilog_irq = op->irqs[0];
1358 err = request_irq(zilog_irq, sunzilog_interrupt, SA_SHIRQ,
1359 "zs", sunzilog_irq_chain);
1360 if (err) {
1361 of_iounmap(rp, sizeof(struct zilog_layout));
1696 1362
1697 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) 1363 return err;
1698 continue; 1364 }
1365 }
1699 1366
1700 if (uart_add_one_port(&sunzilog_reg, &up->port)) { 1367 up = &sunzilog_port_table[inst * 2];
1701 printk(KERN_ERR 1368
1702 "SunZilog: failed to add port zs%d\n", i); 1369 /* Channel A */
1703 } 1370 up[0].port.mapbase = op->resource[0].start + 0x00;
1371 up[0].port.membase = (void __iomem *) &rp->channelA;
1372 up[0].port.iotype = UPIO_MEM;
1373 up[0].port.irq = op->irqs[0];
1374 up[0].port.uartclk = ZS_CLOCK;
1375 up[0].port.fifosize = 1;
1376 up[0].port.ops = &sunzilog_pops;
1377 up[0].port.type = PORT_SUNZILOG;
1378 up[0].port.flags = 0;
1379 up[0].port.line = (inst * 2) + 0;
1380 up[0].port.dev = &op->dev;
1381 up[0].flags |= SUNZILOG_FLAG_IS_CHANNEL_A;
1382 if (inst == 1)
1383 up[0].flags |= SUNZILOG_FLAG_CONS_KEYB;
1384 sunzilog_init_hw(&up[0]);
1385
1386 /* Channel B */
1387 up[1].port.mapbase = op->resource[0].start + 0x04;
1388 up[1].port.membase = (void __iomem *) &rp->channelB;
1389 up[1].port.iotype = UPIO_MEM;
1390 up[1].port.irq = op->irqs[0];
1391 up[1].port.uartclk = ZS_CLOCK;
1392 up[1].port.fifosize = 1;
1393 up[1].port.ops = &sunzilog_pops;
1394 up[1].port.type = PORT_SUNZILOG;
1395 up[1].port.flags = 0;
1396 up[1].port.line = (inst * 2) + 1;
1397 up[1].port.dev = &op->dev;
1398 up[1].flags |= 0;
1399 if (inst == 1)
1400 up[1].flags |= SUNZILOG_FLAG_CONS_MOUSE;
1401 sunzilog_init_hw(&up[1]);
1402
1403 if (inst != 1) {
1404 err = uart_add_one_port(&sunzilog_reg, &up[0].port);
1405 if (err) {
1406 of_iounmap(rp, sizeof(struct zilog_layout));
1407 return err;
1408 }
1409 err = uart_add_one_port(&sunzilog_reg, &up[1].port);
1410 if (err) {
1411 uart_remove_one_port(&sunzilog_reg, &up[0].port);
1412 of_iounmap(rp, sizeof(struct zilog_layout));
1413 return err;
1704 } 1414 }
1705 } 1415 }
1706 1416
1707 return ret; 1417 dev_set_drvdata(&dev->dev, &up[0]);
1418
1419 return 0;
1708} 1420}
1709 1421
1710static void __init sunzilog_scan_count(struct zs_probe_scan *t, int node) 1422static void __devexit zs_remove_one(struct uart_sunzilog_port *up)
1711{ 1423{
1712 t->devices++; 1424 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) {
1425#ifdef CONFIG_SERIO
1426 serio_unregister_port(&up->serio);
1427#endif
1428 } else
1429 uart_remove_one_port(&sunzilog_reg, &up->port);
1713} 1430}
1714 1431
1715static int __init sunzilog_ports_count(void) 1432static int __devexit zs_remove(struct of_device *dev)
1716{ 1433{
1717 struct zs_probe_scan scan; 1434 struct uart_sunzilog_port *up = dev_get_drvdata(&dev->dev);
1435 struct zilog_layout __iomem *regs;
1718 1436
1719 /* Sun4 Zilog setup is hard coded, no probing to do. */ 1437 zs_remove_one(&up[0]);
1720 if (sparc_cpu_model == sun4) 1438 zs_remove_one(&up[1]);
1721 return 2;
1722 1439
1723 scan.scanner = sunzilog_scan_count; 1440 regs = sunzilog_chip_regs[up[0].port.line / 2];
1724 scan.depth = 0; 1441 of_iounmap(regs, sizeof(struct zilog_layout));
1725 scan.devices = 0;
1726 1442
1727 sunzilog_scan(&scan, prom_getchild(prom_root_node)); 1443 dev_set_drvdata(&dev->dev, NULL);
1728 1444
1729 return scan.devices; 1445 return 0;
1730} 1446}
1731 1447
1448static struct of_device_id zs_match[] = {
1449 {
1450 .name = "zs",
1451 },
1452 {},
1453};
1454MODULE_DEVICE_TABLE(of, zs_match);
1455
1456static struct of_platform_driver zs_driver = {
1457 .name = "zs",
1458 .match_table = zs_match,
1459 .probe = zs_probe,
1460 .remove = __devexit_p(zs_remove),
1461};
1462
1732static int __init sunzilog_init(void) 1463static int __init sunzilog_init(void)
1733{ 1464{
1465 struct device_node *dp;
1466 int err;
1734 1467
1735 NUM_SUNZILOG = sunzilog_ports_count(); 1468 NUM_SUNZILOG = 0;
1736 if (NUM_SUNZILOG == 0) 1469 for_each_node_by_name(dp, "zs")
1737 return -ENODEV; 1470 NUM_SUNZILOG++;
1738 1471
1739 sunzilog_alloc_tables(); 1472 if (NUM_SUNZILOG) {
1473 int uart_count;
1740 1474
1741 sunzilog_ports_init(); 1475 err = sunzilog_alloc_tables();
1476 if (err)
1477 return err;
1742 1478
1743 return 0; 1479 /* Subtract 1 for keyboard, 1 for mouse. */
1480 uart_count = (NUM_SUNZILOG * 2) - 2;
1481
1482 sunzilog_reg.nr = uart_count;
1483 sunzilog_reg.minor = sunserial_current_minor;
1484 err = uart_register_driver(&sunzilog_reg);
1485 if (err) {
1486 sunzilog_free_tables();
1487 return err;
1488 }
1489 sunzilog_reg.tty_driver->name_base = sunzilog_reg.minor - 64;
1490 sunzilog_reg.cons = SUNZILOG_CONSOLE();
1491
1492 sunserial_current_minor += uart_count;
1493 }
1494
1495 return of_register_driver(&zs_driver, &of_bus_type);
1744} 1496}
1745 1497
1746static void __exit sunzilog_exit(void) 1498static void __exit sunzilog_exit(void)
1747{ 1499{
1748 int i; 1500 of_unregister_driver(&zs_driver);
1749 1501
1750 for (i = 0; i < NUM_CHANNELS; i++) { 1502 if (zilog_irq != -1) {
1751 struct uart_sunzilog_port *up = &sunzilog_port_table[i]; 1503 free_irq(zilog_irq, sunzilog_irq_chain);
1752 1504 zilog_irq = -1;
1753 if (ZS_IS_KEYB(up) || ZS_IS_MOUSE(up)) {
1754#ifdef CONFIG_SERIO
1755 if (up->serio) {
1756 serio_unregister_port(up->serio);
1757 up->serio = NULL;
1758 }
1759#endif
1760 } else
1761 uart_remove_one_port(&sunzilog_reg, &up->port);
1762 } 1505 }
1763 1506
1764 uart_unregister_driver(&sunzilog_reg); 1507 if (NUM_SUNZILOG) {
1508 uart_unregister_driver(&sunzilog_reg);
1509 sunzilog_free_tables();
1510 }
1765} 1511}
1766 1512
1767module_init(sunzilog_init); 1513module_init(sunzilog_init);
@@ -1769,4 +1515,5 @@ module_exit(sunzilog_exit);
1769 1515
1770MODULE_AUTHOR("David S. Miller"); 1516MODULE_AUTHOR("David S. Miller");
1771MODULE_DESCRIPTION("Sun Zilog serial port driver"); 1517MODULE_DESCRIPTION("Sun Zilog serial port driver");
1518MODULE_VERSION("2.0");
1772MODULE_LICENSE("GPL"); 1519MODULE_LICENSE("GPL");
diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
index bcbeaf7101..f7bdd94b3a 100644
--- a/drivers/usb/core/devio.c
+++ b/drivers/usb/core/devio.c
@@ -47,6 +47,7 @@
47#include <linux/usbdevice_fs.h> 47#include <linux/usbdevice_fs.h>
48#include <linux/cdev.h> 48#include <linux/cdev.h>
49#include <linux/notifier.h> 49#include <linux/notifier.h>
50#include <linux/security.h>
50#include <asm/uaccess.h> 51#include <asm/uaccess.h>
51#include <asm/byteorder.h> 52#include <asm/byteorder.h>
52#include <linux/moduleparam.h> 53#include <linux/moduleparam.h>
@@ -68,6 +69,7 @@ struct async {
68 void __user *userbuffer; 69 void __user *userbuffer;
69 void __user *userurb; 70 void __user *userurb;
70 struct urb *urb; 71 struct urb *urb;
72 u32 secid;
71}; 73};
72 74
73static int usbfs_snoop = 0; 75static int usbfs_snoop = 0;
@@ -312,7 +314,7 @@ static void async_completed(struct urb *urb, struct pt_regs *regs)
312 sinfo.si_code = SI_ASYNCIO; 314 sinfo.si_code = SI_ASYNCIO;
313 sinfo.si_addr = as->userurb; 315 sinfo.si_addr = as->userurb;
314 kill_proc_info_as_uid(as->signr, &sinfo, as->pid, as->uid, 316 kill_proc_info_as_uid(as->signr, &sinfo, as->pid, as->uid,
315 as->euid); 317 as->euid, as->secid);
316 } 318 }
317 snoop(&urb->dev->dev, "urb complete\n"); 319 snoop(&urb->dev->dev, "urb complete\n");
318 snoop_urb(urb, as->userurb); 320 snoop_urb(urb, as->userurb);
@@ -572,6 +574,7 @@ static int usbdev_open(struct inode *inode, struct file *file)
572 ps->disc_euid = current->euid; 574 ps->disc_euid = current->euid;
573 ps->disccontext = NULL; 575 ps->disccontext = NULL;
574 ps->ifclaimed = 0; 576 ps->ifclaimed = 0;
577 security_task_getsecid(current, &ps->secid);
575 wmb(); 578 wmb();
576 list_add_tail(&ps->list, &dev->filelist); 579 list_add_tail(&ps->list, &dev->filelist);
577 file->private_data = ps; 580 file->private_data = ps;
@@ -1053,6 +1056,7 @@ static int proc_do_submiturb(struct dev_state *ps, struct usbdevfs_urb *uurb,
1053 as->pid = current->pid; 1056 as->pid = current->pid;
1054 as->uid = current->uid; 1057 as->uid = current->uid;
1055 as->euid = current->euid; 1058 as->euid = current->euid;
1059 security_task_getsecid(current, &as->secid);
1056 if (!(uurb->endpoint & USB_DIR_IN)) { 1060 if (!(uurb->endpoint & USB_DIR_IN)) {
1057 if (copy_from_user(as->urb->transfer_buffer, uurb->buffer, as->urb->transfer_buffer_length)) { 1061 if (copy_from_user(as->urb->transfer_buffer, uurb->buffer, as->urb->transfer_buffer_length)) {
1058 free_async(as); 1062 free_async(as);
diff --git a/drivers/usb/core/inode.c b/drivers/usb/core/inode.c
index bfc9b28a72..d0a208de32 100644
--- a/drivers/usb/core/inode.c
+++ b/drivers/usb/core/inode.c
@@ -700,7 +700,7 @@ static void usbfs_remove_device(struct usb_device *dev)
700 sinfo.si_errno = EPIPE; 700 sinfo.si_errno = EPIPE;
701 sinfo.si_code = SI_ASYNCIO; 701 sinfo.si_code = SI_ASYNCIO;
702 sinfo.si_addr = ds->disccontext; 702 sinfo.si_addr = ds->disccontext;
703 kill_proc_info_as_uid(ds->discsignr, &sinfo, ds->disc_pid, ds->disc_uid, ds->disc_euid); 703 kill_proc_info_as_uid(ds->discsignr, &sinfo, ds->disc_pid, ds->disc_uid, ds->disc_euid, ds->secid);
704 } 704 }
705 } 705 }
706} 706}
diff --git a/drivers/usb/core/usb.h b/drivers/usb/core/usb.h
index 7a650c763a..49f69236b4 100644
--- a/drivers/usb/core/usb.h
+++ b/drivers/usb/core/usb.h
@@ -80,6 +80,7 @@ struct dev_state {
80 uid_t disc_uid, disc_euid; 80 uid_t disc_uid, disc_euid;
81 void __user *disccontext; 81 void __user *disccontext;
82 unsigned long ifclaimed; 82 unsigned long ifclaimed;
83 u32 secid;
83}; 84};
84 85
85/* internal notify stuff */ 86/* internal notify stuff */
diff --git a/drivers/video/bw2.c b/drivers/video/bw2.c
index 6577fdfdfc..c66e3d52cb 100644
--- a/drivers/video/bw2.c
+++ b/drivers/video/bw2.c
@@ -1,6 +1,6 @@
1/* bw2.c: BWTWO frame buffer driver 1/* bw2.c: BWTWO frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
@@ -19,14 +19,11 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sbus.h>
23#include <asm/oplib.h> 22#include <asm/oplib.h>
23#include <asm/prom.h>
24#include <asm/of_device.h>
24#include <asm/fbio.h> 25#include <asm/fbio.h>
25 26
26#ifdef CONFIG_SPARC32
27#include <asm/sun4paddr.h>
28#endif
29
30#include "sbuslib.h" 27#include "sbuslib.h"
31 28
32/* 29/*
@@ -59,30 +56,30 @@ static struct fb_ops bw2_ops = {
59#define BWTWO_REGISTER_OFFSET 0x400000 56#define BWTWO_REGISTER_OFFSET 0x400000
60 57
61struct bt_regs { 58struct bt_regs {
62 volatile u32 addr; 59 u32 addr;
63 volatile u32 color_map; 60 u32 color_map;
64 volatile u32 control; 61 u32 control;
65 volatile u32 cursor; 62 u32 cursor;
66}; 63};
67 64
68struct bw2_regs { 65struct bw2_regs {
69 struct bt_regs cmap; 66 struct bt_regs cmap;
70 volatile u8 control; 67 u8 control;
71 volatile u8 status; 68 u8 status;
72 volatile u8 cursor_start; 69 u8 cursor_start;
73 volatile u8 cursor_end; 70 u8 cursor_end;
74 volatile u8 h_blank_start; 71 u8 h_blank_start;
75 volatile u8 h_blank_end; 72 u8 h_blank_end;
76 volatile u8 h_sync_start; 73 u8 h_sync_start;
77 volatile u8 h_sync_end; 74 u8 h_sync_end;
78 volatile u8 comp_sync_end; 75 u8 comp_sync_end;
79 volatile u8 v_blank_start_high; 76 u8 v_blank_start_high;
80 volatile u8 v_blank_start_low; 77 u8 v_blank_start_low;
81 volatile u8 v_blank_end; 78 u8 v_blank_end;
82 volatile u8 v_sync_start; 79 u8 v_sync_start;
83 volatile u8 v_sync_end; 80 u8 v_sync_end;
84 volatile u8 xfer_holdoff_start; 81 u8 xfer_holdoff_start;
85 volatile u8 xfer_holdoff_end; 82 u8 xfer_holdoff_end;
86}; 83};
87 84
88/* Status Register Constants */ 85/* Status Register Constants */
@@ -117,9 +114,8 @@ struct bw2_par {
117#define BW2_FLAG_BLANKED 0x00000001 114#define BW2_FLAG_BLANKED 0x00000001
118 115
119 unsigned long physbase; 116 unsigned long physbase;
117 unsigned long which_io;
120 unsigned long fbsize; 118 unsigned long fbsize;
121
122 struct sbus_dev *sdev;
123}; 119};
124 120
125/** 121/**
@@ -174,9 +170,7 @@ static int bw2_mmap(struct fb_info *info, struct vm_area_struct *vma)
174 170
175 return sbusfb_mmap_helper(bw2_mmap_map, 171 return sbusfb_mmap_helper(bw2_mmap_map,
176 par->physbase, par->fbsize, 172 par->physbase, par->fbsize,
177 (par->sdev ? 173 par->which_io,
178 par->sdev->reg_addrs[0].which_io :
179 0),
180 vma); 174 vma);
181} 175}
182 176
@@ -288,139 +282,124 @@ static void bw2_do_default_mode(struct bw2_par *par, struct fb_info *info,
288struct all_info { 282struct all_info {
289 struct fb_info info; 283 struct fb_info info;
290 struct bw2_par par; 284 struct bw2_par par;
291 struct list_head list;
292}; 285};
293static LIST_HEAD(bw2_list);
294 286
295static void bw2_init_one(struct sbus_dev *sdev) 287static int __devinit bw2_init_one(struct of_device *op)
296{ 288{
289 struct device_node *dp = op->node;
297 struct all_info *all; 290 struct all_info *all;
298 struct resource *resp; 291 int linebytes, err;
299#ifdef CONFIG_SUN4
300 struct resource res;
301#endif
302 int linebytes;
303 292
304 all = kmalloc(sizeof(*all), GFP_KERNEL); 293 all = kzalloc(sizeof(*all), GFP_KERNEL);
305 if (!all) { 294 if (!all)
306 printk(KERN_ERR "bw2: Cannot allocate memory.\n"); 295 return -ENOMEM;
307 return;
308 }
309 memset(all, 0, sizeof(*all));
310
311 INIT_LIST_HEAD(&all->list);
312 296
313 spin_lock_init(&all->par.lock); 297 spin_lock_init(&all->par.lock);
314 all->par.sdev = sdev; 298
315 299 all->par.physbase = op->resource[0].start;
316#ifdef CONFIG_SUN4 300 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
317 if (!sdev) { 301
318 all->par.physbase = sun4_bwtwo_physaddr; 302 sbusfb_fill_var(&all->info.var, dp->node, 1);
319 res.start = sun4_bwtwo_physaddr; 303 linebytes = of_getintprop_default(dp, "linebytes",
320 res.end = res.start + BWTWO_REGISTER_OFFSET + sizeof(struct bw2_regs) - 1; 304 all->info.var.xres);
321 res.flags = IORESOURCE_IO; 305
322 resp = &res;
323 all->info.var.xres = all->info.var.xres_virtual = 1152;
324 all->info.var.yres = all->info.var.yres_virtual = 900;
325 all->info.var.bits_per_pixel = 1;
326 linebytes = 1152 / 8;
327 } else
328#else
329 {
330 BUG_ON(!sdev);
331 all->par.physbase = sdev->reg_addrs[0].phys_addr;
332 resp = &sdev->resource[0];
333 sbusfb_fill_var(&all->info.var, (sdev ? sdev->prom_node : 0), 1);
334 linebytes = prom_getintdefault(sdev->prom_node, "linebytes",
335 all->info.var.xres);
336 }
337#endif
338 all->info.var.red.length = all->info.var.green.length = 306 all->info.var.red.length = all->info.var.green.length =
339 all->info.var.blue.length = all->info.var.bits_per_pixel; 307 all->info.var.blue.length = all->info.var.bits_per_pixel;
340 all->info.var.red.offset = all->info.var.green.offset = 308 all->info.var.red.offset = all->info.var.green.offset =
341 all->info.var.blue.offset = 0; 309 all->info.var.blue.offset = 0;
342 310
343 all->par.regs = sbus_ioremap(resp, BWTWO_REGISTER_OFFSET, 311 all->par.regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET,
344 sizeof(struct bw2_regs), "bw2 regs"); 312 sizeof(struct bw2_regs), "bw2 regs");
345 313
346 if (sdev && !prom_getbool(sdev->prom_node, "width")) 314 if (!of_find_property(dp, "width", NULL))
347 bw2_do_default_mode(&all->par, &all->info, &linebytes); 315 bw2_do_default_mode(&all->par, &all->info, &linebytes);
348 316
349 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 317 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
350 318
351 all->info.flags = FBINFO_DEFAULT; 319 all->info.flags = FBINFO_DEFAULT;
352 all->info.fbops = &bw2_ops; 320 all->info.fbops = &bw2_ops;
353#if defined(CONFIG_SPARC32) 321
354 if (sdev) 322 all->info.screen_base =
355 all->info.screen_base = (char __iomem *) 323 sbus_ioremap(&op->resource[0], 0, all->par.fbsize, "bw2 ram");
356 prom_getintdefault(sdev->prom_node, "address", 0);
357#endif
358 if (!all->info.screen_base)
359 all->info.screen_base =
360 sbus_ioremap(resp, 0, all->par.fbsize, "bw2 ram");
361 all->info.par = &all->par; 324 all->info.par = &all->par;
362 325
363 bw2_blank(0, &all->info); 326 bw2_blank(0, &all->info);
364 327
365 bw2_init_fix(&all->info, linebytes); 328 bw2_init_fix(&all->info, linebytes);
366 329
367 if (register_framebuffer(&all->info) < 0) { 330 err= register_framebuffer(&all->info);
368 printk(KERN_ERR "bw2: Could not register framebuffer.\n"); 331 if (err < 0) {
332 of_iounmap(all->par.regs, sizeof(struct bw2_regs));
333 of_iounmap(all->info.screen_base, all->par.fbsize);
369 kfree(all); 334 kfree(all);
370 return; 335 return err;
371 } 336 }
372 337
373 list_add(&all->list, &bw2_list); 338 dev_set_drvdata(&op->dev, all);
339
340 printk("%s: bwtwo at %lx:%lx\n",
341 dp->full_name,
342 all->par.which_io, all->par.physbase);
374 343
375 printk("bw2: bwtwo at %lx:%lx\n", 344 return 0;
376 (long) (sdev ? sdev->reg_addrs[0].which_io : 0),
377 (long) all->par.physbase);
378} 345}
379 346
380int __init bw2_init(void) 347static int __devinit bw2_probe(struct of_device *dev, const struct of_device_id *match)
381{ 348{
382 struct sbus_bus *sbus; 349 struct of_device *op = to_of_device(&dev->dev);
383 struct sbus_dev *sdev;
384 350
385 if (fb_get_options("bw2fb", NULL)) 351 return bw2_init_one(op);
386 return -ENODEV; 352}
387 353
388#ifdef CONFIG_SUN4 354static int __devexit bw2_remove(struct of_device *dev)
389 bw2_init_one(NULL); 355{
390#endif 356 struct all_info *all = dev_get_drvdata(&dev->dev);
391 for_all_sbusdev(sdev, sbus) { 357
392 if (!strcmp(sdev->prom_name, "bwtwo")) 358 unregister_framebuffer(&all->info);
393 bw2_init_one(sdev); 359
394 } 360 of_iounmap(all->par.regs, sizeof(struct bw2_regs));
361 of_iounmap(all->info.screen_base, all->par.fbsize);
362
363 kfree(all);
364
365 dev_set_drvdata(&dev->dev, NULL);
395 366
396 return 0; 367 return 0;
397} 368}
398 369
399void __exit bw2_exit(void) 370static struct of_device_id bw2_match[] = {
400{ 371 {
401 struct list_head *pos, *tmp; 372 .name = "bwtwo",
373 },
374 {},
375};
376MODULE_DEVICE_TABLE(of, bw2_match);
402 377
403 list_for_each_safe(pos, tmp, &bw2_list) { 378static struct of_platform_driver bw2_driver = {
404 struct all_info *all = list_entry(pos, typeof(*all), list); 379 .name = "bw2",
380 .match_table = bw2_match,
381 .probe = bw2_probe,
382 .remove = __devexit_p(bw2_remove),
383};
405 384
406 unregister_framebuffer(&all->info); 385static int __init bw2_init(void)
407 kfree(all); 386{
408 } 387 if (fb_get_options("bw2fb", NULL))
388 return -ENODEV;
389
390 return of_register_driver(&bw2_driver, &of_bus_type);
409} 391}
410 392
411int __init 393static void __exit bw2_exit(void)
412bw2_setup(char *arg)
413{ 394{
414 /* No cmdline options yet... */ 395 return of_unregister_driver(&bw2_driver);
415 return 0;
416} 396}
417 397
418module_init(bw2_init);
419 398
420#ifdef MODULE 399module_init(bw2_init);
421module_exit(bw2_exit); 400module_exit(bw2_exit);
422#endif
423 401
424MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets"); 402MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets");
425MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 403MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
404MODULE_VERSION("2.0");
426MODULE_LICENSE("GPL"); 405MODULE_LICENSE("GPL");
diff --git a/drivers/video/cg14.c b/drivers/video/cg14.c
index 63b6c79c8a..7f926c619b 100644
--- a/drivers/video/cg14.c
+++ b/drivers/video/cg14.c
@@ -1,6 +1,6 @@
1/* cg14.c: CGFOURTEEN frame buffer driver 1/* cg14.c: CGFOURTEEN frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * 6 *
@@ -18,8 +18,8 @@
18#include <linux/mm.h> 18#include <linux/mm.h>
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/sbus.h> 21#include <asm/prom.h>
22#include <asm/oplib.h> 22#include <asm/of_device.h>
23#include <asm/fbio.h> 23#include <asm/fbio.h>
24 24
25#include "sbuslib.h" 25#include "sbuslib.h"
@@ -99,73 +99,73 @@ static struct fb_ops cg14_ops = {
99#define CG14_MCR_PIXMODE_32 3 99#define CG14_MCR_PIXMODE_32 3
100 100
101struct cg14_regs{ 101struct cg14_regs{
102 volatile u8 mcr; /* Master Control Reg */ 102 u8 mcr; /* Master Control Reg */
103 volatile u8 ppr; /* Packed Pixel Reg */ 103 u8 ppr; /* Packed Pixel Reg */
104 volatile u8 tms[2]; /* Test Mode Status Regs */ 104 u8 tms[2]; /* Test Mode Status Regs */
105 volatile u8 msr; /* Master Status Reg */ 105 u8 msr; /* Master Status Reg */
106 volatile u8 fsr; /* Fault Status Reg */ 106 u8 fsr; /* Fault Status Reg */
107 volatile u8 rev; /* Revision & Impl */ 107 u8 rev; /* Revision & Impl */
108 volatile u8 ccr; /* Clock Control Reg */ 108 u8 ccr; /* Clock Control Reg */
109 volatile u32 tmr; /* Test Mode Read Back */ 109 u32 tmr; /* Test Mode Read Back */
110 volatile u8 mod; /* Monitor Operation Data Reg */ 110 u8 mod; /* Monitor Operation Data Reg */
111 volatile u8 acr; /* Aux Control */ 111 u8 acr; /* Aux Control */
112 u8 xxx0[6]; 112 u8 xxx0[6];
113 volatile u16 hct; /* Hor Counter */ 113 u16 hct; /* Hor Counter */
114 volatile u16 vct; /* Vert Counter */ 114 u16 vct; /* Vert Counter */
115 volatile u16 hbs; /* Hor Blank Start */ 115 u16 hbs; /* Hor Blank Start */
116 volatile u16 hbc; /* Hor Blank Clear */ 116 u16 hbc; /* Hor Blank Clear */
117 volatile u16 hss; /* Hor Sync Start */ 117 u16 hss; /* Hor Sync Start */
118 volatile u16 hsc; /* Hor Sync Clear */ 118 u16 hsc; /* Hor Sync Clear */
119 volatile u16 csc; /* Composite Sync Clear */ 119 u16 csc; /* Composite Sync Clear */
120 volatile u16 vbs; /* Vert Blank Start */ 120 u16 vbs; /* Vert Blank Start */
121 volatile u16 vbc; /* Vert Blank Clear */ 121 u16 vbc; /* Vert Blank Clear */
122 volatile u16 vss; /* Vert Sync Start */ 122 u16 vss; /* Vert Sync Start */
123 volatile u16 vsc; /* Vert Sync Clear */ 123 u16 vsc; /* Vert Sync Clear */
124 volatile u16 xcs; 124 u16 xcs;
125 volatile u16 xcc; 125 u16 xcc;
126 volatile u16 fsa; /* Fault Status Address */ 126 u16 fsa; /* Fault Status Address */
127 volatile u16 adr; /* Address Registers */ 127 u16 adr; /* Address Registers */
128 u8 xxx1[0xce]; 128 u8 xxx1[0xce];
129 volatile u8 pcg[0x100]; /* Pixel Clock Generator */ 129 u8 pcg[0x100]; /* Pixel Clock Generator */
130 volatile u32 vbr; /* Frame Base Row */ 130 u32 vbr; /* Frame Base Row */
131 volatile u32 vmcr; /* VBC Master Control */ 131 u32 vmcr; /* VBC Master Control */
132 volatile u32 vcr; /* VBC refresh */ 132 u32 vcr; /* VBC refresh */
133 volatile u32 vca; /* VBC Config */ 133 u32 vca; /* VBC Config */
134}; 134};
135 135
136#define CG14_CCR_ENABLE 0x04 136#define CG14_CCR_ENABLE 0x04
137#define CG14_CCR_SELECT 0x02 /* HW/Full screen */ 137#define CG14_CCR_SELECT 0x02 /* HW/Full screen */
138 138
139struct cg14_cursor { 139struct cg14_cursor {
140 volatile u32 cpl0[32]; /* Enable plane 0 */ 140 u32 cpl0[32]; /* Enable plane 0 */
141 volatile u32 cpl1[32]; /* Color selection plane */ 141 u32 cpl1[32]; /* Color selection plane */
142 volatile u8 ccr; /* Cursor Control Reg */ 142 u8 ccr; /* Cursor Control Reg */
143 u8 xxx0[3]; 143 u8 xxx0[3];
144 volatile u16 cursx; /* Cursor x,y position */ 144 u16 cursx; /* Cursor x,y position */
145 volatile u16 cursy; /* Cursor x,y position */ 145 u16 cursy; /* Cursor x,y position */
146 volatile u32 color0; 146 u32 color0;
147 volatile u32 color1; 147 u32 color1;
148 u32 xxx1[0x1bc]; 148 u32 xxx1[0x1bc];
149 volatile u32 cpl0i[32]; /* Enable plane 0 autoinc */ 149 u32 cpl0i[32]; /* Enable plane 0 autoinc */
150 volatile u32 cpl1i[32]; /* Color selection autoinc */ 150 u32 cpl1i[32]; /* Color selection autoinc */
151}; 151};
152 152
153struct cg14_dac { 153struct cg14_dac {
154 volatile u8 addr; /* Address Register */ 154 u8 addr; /* Address Register */
155 u8 xxx0[255]; 155 u8 xxx0[255];
156 volatile u8 glut; /* Gamma table */ 156 u8 glut; /* Gamma table */
157 u8 xxx1[255]; 157 u8 xxx1[255];
158 volatile u8 select; /* Register Select */ 158 u8 select; /* Register Select */
159 u8 xxx2[255]; 159 u8 xxx2[255];
160 volatile u8 mode; /* Mode Register */ 160 u8 mode; /* Mode Register */
161}; 161};
162 162
163struct cg14_xlut{ 163struct cg14_xlut{
164 volatile u8 x_xlut [256]; 164 u8 x_xlut [256];
165 volatile u8 x_xlutd [256]; 165 u8 x_xlutd [256];
166 u8 xxx0[0x600]; 166 u8 xxx0[0x600];
167 volatile u8 x_xlut_inc [256]; 167 u8 x_xlut_inc [256];
168 volatile u8 x_xlutd_inc [256]; 168 u8 x_xlutd_inc [256];
169}; 169};
170 170
171/* Color look up table (clut) */ 171/* Color look up table (clut) */
@@ -204,7 +204,6 @@ struct cg14_par {
204 204
205 int mode; 205 int mode;
206 int ramsize; 206 int ramsize;
207 struct sbus_dev *sdev;
208}; 207};
209 208
210static void __cg14_reset(struct cg14_par *par) 209static void __cg14_reset(struct cg14_par *par)
@@ -355,14 +354,9 @@ static int cg14_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
355 * Initialisation 354 * Initialisation
356 */ 355 */
357 356
358static void cg14_init_fix(struct fb_info *info, int linebytes) 357static void cg14_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
359{ 358{
360 struct cg14_par *par = (struct cg14_par *)info->par; 359 const char *name = dp->name;
361 const char *name;
362
363 name = "cgfourteen";
364 if (par->sdev)
365 name = par->sdev->prom_name;
366 360
367 strlcpy(info->fix.id, name, sizeof(info->fix.id)); 361 strlcpy(info->fix.id, name, sizeof(info->fix.id));
368 362
@@ -456,98 +450,81 @@ static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __initdata = {
456struct all_info { 450struct all_info {
457 struct fb_info info; 451 struct fb_info info;
458 struct cg14_par par; 452 struct cg14_par par;
459 struct list_head list;
460}; 453};
461static LIST_HEAD(cg14_list);
462 454
463static void cg14_init_one(struct sbus_dev *sdev, int node, int parent_node) 455static void cg14_unmap_regs(struct all_info *all)
464{ 456{
465 struct all_info *all; 457 if (all->par.regs)
466 unsigned long phys, rphys; 458 of_iounmap(all->par.regs, sizeof(struct cg14_regs));
467 u32 bases[6]; 459 if (all->par.clut)
468 int is_8mb, linebytes, i; 460 of_iounmap(all->par.clut, sizeof(struct cg14_clut));
469 461 if (all->par.cursor)
470 if (!sdev) { 462 of_iounmap(all->par.cursor, sizeof(struct cg14_cursor));
471 if (prom_getproperty(node, "address", 463 if (all->info.screen_base)
472 (char *) &bases[0], sizeof(bases)) <= 0 464 of_iounmap(all->info.screen_base, all->par.fbsize);
473 || !bases[0]) { 465}
474 printk(KERN_ERR "cg14: Device is not mapped.\n");
475 return;
476 }
477 if (__get_iospace(bases[0]) != __get_iospace(bases[1])) {
478 printk(KERN_ERR "cg14: I/O spaces don't match.\n");
479 return;
480 }
481 }
482 466
483 all = kmalloc(sizeof(*all), GFP_KERNEL); 467static int __devinit cg14_init_one(struct of_device *op)
484 if (!all) { 468{
485 printk(KERN_ERR "cg14: Cannot allocate memory.\n"); 469 struct device_node *dp = op->node;
486 return; 470 struct all_info *all;
487 } 471 int is_8mb, linebytes, i, err;
488 memset(all, 0, sizeof(*all));
489 472
490 INIT_LIST_HEAD(&all->list); 473 all = kzalloc(sizeof(*all), GFP_KERNEL);
474 if (!all)
475 return -ENOMEM;
491 476
492 spin_lock_init(&all->par.lock); 477 spin_lock_init(&all->par.lock);
493 478
494 sbusfb_fill_var(&all->info.var, node, 8); 479 sbusfb_fill_var(&all->info.var, dp->node, 8);
495 all->info.var.red.length = 8; 480 all->info.var.red.length = 8;
496 all->info.var.green.length = 8; 481 all->info.var.green.length = 8;
497 all->info.var.blue.length = 8; 482 all->info.var.blue.length = 8;
498 483
499 linebytes = prom_getintdefault(node, "linebytes", 484 linebytes = of_getintprop_default(dp, "linebytes",
500 all->info.var.xres); 485 all->info.var.xres);
501 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 486 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
502 487
503 all->par.sdev = sdev; 488 if (!strcmp(dp->parent->name, "sbus") ||
504 if (sdev) { 489 !strcmp(dp->parent->name, "sbi")) {
505 rphys = sdev->reg_addrs[0].phys_addr; 490 all->par.physbase = op->resource[0].start;
506 all->par.physbase = phys = sdev->reg_addrs[1].phys_addr; 491 all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
507 all->par.iospace = sdev->reg_addrs[0].which_io;
508
509 all->par.regs = sbus_ioremap(&sdev->resource[0], 0,
510 sizeof(struct cg14_regs),
511 "cg14 regs");
512 all->par.clut = sbus_ioremap(&sdev->resource[0], CG14_CLUT1,
513 sizeof(struct cg14_clut),
514 "cg14 clut");
515 all->par.cursor = sbus_ioremap(&sdev->resource[0], CG14_CURSORREGS,
516 sizeof(struct cg14_cursor),
517 "cg14 cursor");
518 all->info.screen_base = sbus_ioremap(&sdev->resource[1], 0,
519 all->par.fbsize, "cg14 ram");
520 } else { 492 } else {
521 rphys = __get_phys(bases[0]); 493 all->par.physbase = op->resource[1].start;
522 all->par.physbase = phys = __get_phys(bases[1]); 494 all->par.iospace = op->resource[0].flags & IORESOURCE_BITS;
523 all->par.iospace = __get_iospace(bases[0]);
524 all->par.regs = (struct cg14_regs __iomem *)(unsigned long)bases[0];
525 all->par.clut = (struct cg14_clut __iomem *)((unsigned long)bases[0] +
526 CG14_CLUT1);
527 all->par.cursor =
528 (struct cg14_cursor __iomem *)((unsigned long)bases[0] +
529 CG14_CURSORREGS);
530
531 all->info.screen_base = (char __iomem *)(unsigned long)bases[1];
532 } 495 }
533 496
534 prom_getproperty(node, "reg", (char *) &bases[0], sizeof(bases)); 497 all->par.regs = of_ioremap(&op->resource[0], 0,
535 is_8mb = (bases[5] == 0x800000); 498 sizeof(struct cg14_regs), "cg14 regs");
499 all->par.clut = of_ioremap(&op->resource[0], CG14_CLUT1,
500 sizeof(struct cg14_clut), "cg14 clut");
501 all->par.cursor = of_ioremap(&op->resource[0], CG14_CURSORREGS,
502 sizeof(struct cg14_cursor), "cg14 cursor");
536 503
537 if (sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map)) { 504 all->info.screen_base = of_ioremap(&op->resource[1], 0,
538 extern void __cg14_mmap_sized_wrongly(void); 505 all->par.fbsize, "cg14 ram");
539 506
540 __cg14_mmap_sized_wrongly(); 507 if (!all->par.regs || !all->par.clut || !all->par.cursor ||
541 } 508 !all->info.screen_base)
509 cg14_unmap_regs(all);
510
511 is_8mb = (((op->resource[1].end - op->resource[1].start) + 1) ==
512 (8 * 1024 * 1024));
513
514 BUILD_BUG_ON(sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map));
542 515
543 memcpy(&all->par.mmap_map, &__cg14_mmap_map, sizeof(all->par.mmap_map)); 516 memcpy(&all->par.mmap_map, &__cg14_mmap_map,
517 sizeof(all->par.mmap_map));
518
544 for (i = 0; i < CG14_MMAP_ENTRIES; i++) { 519 for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
545 struct sbus_mmap_map *map = &all->par.mmap_map[i]; 520 struct sbus_mmap_map *map = &all->par.mmap_map[i];
546 521
547 if (!map->size) 522 if (!map->size)
548 break; 523 break;
549 if (map->poff & 0x80000000) 524 if (map->poff & 0x80000000)
550 map->poff = (map->poff & 0x7fffffff) + rphys - phys; 525 map->poff = (map->poff & 0x7fffffff) +
526 (op->resource[0].start -
527 op->resource[1].start);
551 if (is_8mb && 528 if (is_8mb &&
552 map->size >= 0x100000 && 529 map->size >= 0x100000 &&
553 map->size <= 0x400000) 530 map->size <= 0x400000)
@@ -564,84 +541,87 @@ static void cg14_init_one(struct sbus_dev *sdev, int node, int parent_node)
564 __cg14_reset(&all->par); 541 __cg14_reset(&all->par);
565 542
566 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 543 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
567 printk(KERN_ERR "cg14: Could not allocate color map.\n"); 544 cg14_unmap_regs(all);
568 kfree(all); 545 kfree(all);
569 return; 546 return -ENOMEM;
570 } 547 }
571 fb_set_cmap(&all->info.cmap, &all->info); 548 fb_set_cmap(&all->info.cmap, &all->info);
572 549
573 cg14_init_fix(&all->info, linebytes); 550 cg14_init_fix(&all->info, linebytes, dp);
574 551
575 if (register_framebuffer(&all->info) < 0) { 552 err = register_framebuffer(&all->info);
576 printk(KERN_ERR "cg14: Could not register framebuffer.\n"); 553 if (err < 0) {
577 fb_dealloc_cmap(&all->info.cmap); 554 fb_dealloc_cmap(&all->info.cmap);
555 cg14_unmap_regs(all);
578 kfree(all); 556 kfree(all);
579 return; 557 return err;
580 } 558 }
581 559
582 list_add(&all->list, &cg14_list); 560 dev_set_drvdata(&op->dev, all);
583 561
584 printk("cg14: cgfourteen at %lx:%lx, %dMB\n", 562 printk("%s: cgfourteen at %lx:%lx, %dMB\n",
585 all->par.iospace, all->par.physbase, all->par.ramsize >> 20); 563 dp->full_name,
564 all->par.iospace, all->par.physbase,
565 all->par.ramsize >> 20);
586 566
567 return 0;
587} 568}
588 569
589int __init cg14_init(void) 570static int __devinit cg14_probe(struct of_device *dev, const struct of_device_id *match)
590{ 571{
591 struct sbus_bus *sbus; 572 struct of_device *op = to_of_device(&dev->dev);
592 struct sbus_dev *sdev;
593 573
594 if (fb_get_options("cg14fb", NULL)) 574 return cg14_init_one(op);
595 return -ENODEV; 575}
596 576
597#ifdef CONFIG_SPARC32 577static int __devexit cg14_remove(struct of_device *dev)
598 { 578{
599 int root, node; 579 struct all_info *all = dev_get_drvdata(&dev->dev);
600 580
601 root = prom_getchild(prom_root_node); 581 unregister_framebuffer(&all->info);
602 root = prom_searchsiblings(root, "obio"); 582 fb_dealloc_cmap(&all->info.cmap);
603 if (root) { 583
604 node = prom_searchsiblings(prom_getchild(root), 584 cg14_unmap_regs(all);
605 "cgfourteen"); 585
606 if (node) 586 kfree(all);
607 cg14_init_one(NULL, node, root); 587
608 } 588 dev_set_drvdata(&dev->dev, NULL);
609 }
610#endif
611 for_all_sbusdev(sdev, sbus) {
612 if (!strcmp(sdev->prom_name, "cgfourteen"))
613 cg14_init_one(sdev, sdev->prom_node, sbus->prom_node);
614 }
615 589
616 return 0; 590 return 0;
617} 591}
618 592
619void __exit cg14_exit(void) 593static struct of_device_id cg14_match[] = {
620{ 594 {
621 struct list_head *pos, *tmp; 595 .name = "cgfourteen",
596 },
597 {},
598};
599MODULE_DEVICE_TABLE(of, cg14_match);
622 600
623 list_for_each_safe(pos, tmp, &cg14_list) { 601static struct of_platform_driver cg14_driver = {
624 struct all_info *all = list_entry(pos, typeof(*all), list); 602 .name = "cg14",
603 .match_table = cg14_match,
604 .probe = cg14_probe,
605 .remove = __devexit_p(cg14_remove),
606};
625 607
626 unregister_framebuffer(&all->info); 608int __init cg14_init(void)
627 fb_dealloc_cmap(&all->info.cmap); 609{
628 kfree(all); 610 if (fb_get_options("cg14fb", NULL))
629 } 611 return -ENODEV;
612
613 return of_register_driver(&cg14_driver, &of_bus_type);
630} 614}
631 615
632int __init 616void __exit cg14_exit(void)
633cg14_setup(char *arg)
634{ 617{
635 /* No cmdline options yet... */ 618 of_unregister_driver(&cg14_driver);
636 return 0;
637} 619}
638 620
639module_init(cg14_init); 621module_init(cg14_init);
640
641#ifdef MODULE
642module_exit(cg14_exit); 622module_exit(cg14_exit);
643#endif
644 623
645MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets"); 624MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
646MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 625MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
626MODULE_VERSION("2.0");
647MODULE_LICENSE("GPL"); 627MODULE_LICENSE("GPL");
diff --git a/drivers/video/cg3.c b/drivers/video/cg3.c
index 3de6e1b5ab..9c8c753ef4 100644
--- a/drivers/video/cg3.c
+++ b/drivers/video/cg3.c
@@ -1,6 +1,6 @@
1/* cg3.c: CGTHREE frame buffer driver 1/* cg3.c: CGTHREE frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
@@ -19,8 +19,9 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sbus.h>
23#include <asm/oplib.h> 22#include <asm/oplib.h>
23#include <asm/prom.h>
24#include <asm/of_device.h>
24#include <asm/fbio.h> 25#include <asm/fbio.h>
25 26
26#include "sbuslib.h" 27#include "sbuslib.h"
@@ -80,30 +81,30 @@ enum cg3_type {
80}; 81};
81 82
82struct bt_regs { 83struct bt_regs {
83 volatile u32 addr; 84 u32 addr;
84 volatile u32 color_map; 85 u32 color_map;
85 volatile u32 control; 86 u32 control;
86 volatile u32 cursor; 87 u32 cursor;
87}; 88};
88 89
89struct cg3_regs { 90struct cg3_regs {
90 struct bt_regs cmap; 91 struct bt_regs cmap;
91 volatile u8 control; 92 u8 control;
92 volatile u8 status; 93 u8 status;
93 volatile u8 cursor_start; 94 u8 cursor_start;
94 volatile u8 cursor_end; 95 u8 cursor_end;
95 volatile u8 h_blank_start; 96 u8 h_blank_start;
96 volatile u8 h_blank_end; 97 u8 h_blank_end;
97 volatile u8 h_sync_start; 98 u8 h_sync_start;
98 volatile u8 h_sync_end; 99 u8 h_sync_end;
99 volatile u8 comp_sync_end; 100 u8 comp_sync_end;
100 volatile u8 v_blank_start_high; 101 u8 v_blank_start_high;
101 volatile u8 v_blank_start_low; 102 u8 v_blank_start_low;
102 volatile u8 v_blank_end; 103 u8 v_blank_end;
103 volatile u8 v_sync_start; 104 u8 v_sync_start;
104 volatile u8 v_sync_end; 105 u8 v_sync_end;
105 volatile u8 xfer_holdoff_start; 106 u8 xfer_holdoff_start;
106 volatile u8 xfer_holdoff_end; 107 u8 xfer_holdoff_end;
107}; 108};
108 109
109/* Offset of interesting structures in the OBIO space */ 110/* Offset of interesting structures in the OBIO space */
@@ -120,9 +121,8 @@ struct cg3_par {
120#define CG3_FLAG_RDI 0x00000002 121#define CG3_FLAG_RDI 0x00000002
121 122
122 unsigned long physbase; 123 unsigned long physbase;
124 unsigned long which_io;
123 unsigned long fbsize; 125 unsigned long fbsize;
124
125 struct sbus_dev *sdev;
126}; 126};
127 127
128/** 128/**
@@ -235,7 +235,7 @@ static int cg3_mmap(struct fb_info *info, struct vm_area_struct *vma)
235 235
236 return sbusfb_mmap_helper(cg3_mmap_map, 236 return sbusfb_mmap_helper(cg3_mmap_map,
237 par->physbase, par->fbsize, 237 par->physbase, par->fbsize,
238 par->sdev->reg_addrs[0].which_io, 238 par->which_io,
239 vma); 239 vma);
240} 240}
241 241
@@ -252,11 +252,9 @@ static int cg3_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
252 */ 252 */
253 253
254static void 254static void
255cg3_init_fix(struct fb_info *info, int linebytes) 255cg3_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
256{ 256{
257 struct cg3_par *par = (struct cg3_par *)info->par; 257 strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
258
259 strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
260 258
261 info->fix.type = FB_TYPE_PACKED_PIXELS; 259 info->fix.type = FB_TYPE_PACKED_PIXELS;
262 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 260 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -267,16 +265,15 @@ cg3_init_fix(struct fb_info *info, int linebytes)
267} 265}
268 266
269static void cg3_rdi_maybe_fixup_var(struct fb_var_screeninfo *var, 267static void cg3_rdi_maybe_fixup_var(struct fb_var_screeninfo *var,
270 struct sbus_dev *sdev) 268 struct device_node *dp)
271{ 269{
272 char buffer[40]; 270 char *params;
273 char *p; 271 char *p;
274 int ww, hh; 272 int ww, hh;
275 273
276 *buffer = 0; 274 params = of_get_property(dp, "params", NULL);
277 prom_getstring(sdev->prom_node, "params", buffer, sizeof(buffer)); 275 if (params) {
278 if (*buffer) { 276 ww = simple_strtoul(params, &p, 10);
279 ww = simple_strtoul(buffer, &p, 10);
280 if (ww && *p == 'x') { 277 if (ww && *p == 'x') {
281 hh = simple_strtoul(p + 1, &p, 10); 278 hh = simple_strtoul(p + 1, &p, 10);
282 if (hh && *p == '-') { 279 if (hh && *p == '-') {
@@ -348,11 +345,11 @@ static void cg3_do_default_mode(struct cg3_par *par)
348 sbus_writeb(p[1], regp); 345 sbus_writeb(p[1], regp);
349 } 346 }
350 for (p = cg3_dacvals; *p; p += 2) { 347 for (p = cg3_dacvals; *p; p += 2) {
351 volatile u8 __iomem *regp; 348 u8 __iomem *regp;
352 349
353 regp = (volatile u8 __iomem *)&par->regs->cmap.addr; 350 regp = (u8 __iomem *)&par->regs->cmap.addr;
354 sbus_writeb(p[0], regp); 351 sbus_writeb(p[0], regp);
355 regp = (volatile u8 __iomem *)&par->regs->cmap.control; 352 regp = (u8 __iomem *)&par->regs->cmap.control;
356 sbus_writeb(p[1], regp); 353 sbus_writeb(p[1], regp);
357 } 354 }
358} 355}
@@ -360,129 +357,137 @@ static void cg3_do_default_mode(struct cg3_par *par)
360struct all_info { 357struct all_info {
361 struct fb_info info; 358 struct fb_info info;
362 struct cg3_par par; 359 struct cg3_par par;
363 struct list_head list;
364}; 360};
365static LIST_HEAD(cg3_list);
366 361
367static void cg3_init_one(struct sbus_dev *sdev) 362static int __devinit cg3_init_one(struct of_device *op)
368{ 363{
364 struct device_node *dp = op->node;
369 struct all_info *all; 365 struct all_info *all;
370 int linebytes; 366 int linebytes, err;
371
372 all = kmalloc(sizeof(*all), GFP_KERNEL);
373 if (!all) {
374 printk(KERN_ERR "cg3: Cannot allocate memory.\n");
375 return;
376 }
377 memset(all, 0, sizeof(*all));
378 367
379 INIT_LIST_HEAD(&all->list); 368 all = kzalloc(sizeof(*all), GFP_KERNEL);
369 if (!all)
370 return -ENOMEM;
380 371
381 spin_lock_init(&all->par.lock); 372 spin_lock_init(&all->par.lock);
382 all->par.sdev = sdev;
383 373
384 all->par.physbase = sdev->reg_addrs[0].phys_addr; 374 all->par.physbase = op->resource[0].start;
375 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
385 376
386 sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); 377 sbusfb_fill_var(&all->info.var, dp->node, 8);
387 all->info.var.red.length = 8; 378 all->info.var.red.length = 8;
388 all->info.var.green.length = 8; 379 all->info.var.green.length = 8;
389 all->info.var.blue.length = 8; 380 all->info.var.blue.length = 8;
390 if (!strcmp(sdev->prom_name, "cgRDI")) 381 if (!strcmp(dp->name, "cgRDI"))
391 all->par.flags |= CG3_FLAG_RDI; 382 all->par.flags |= CG3_FLAG_RDI;
392 if (all->par.flags & CG3_FLAG_RDI) 383 if (all->par.flags & CG3_FLAG_RDI)
393 cg3_rdi_maybe_fixup_var(&all->info.var, sdev); 384 cg3_rdi_maybe_fixup_var(&all->info.var, dp);
394 385
395 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 386 linebytes = of_getintprop_default(dp, "linebytes",
396 all->info.var.xres); 387 all->info.var.xres);
397 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 388 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
398 389
399 all->par.regs = sbus_ioremap(&sdev->resource[0], CG3_REGS_OFFSET, 390 all->par.regs = of_ioremap(&op->resource[0], CG3_REGS_OFFSET,
400 sizeof(struct cg3_regs), "cg3 regs"); 391 sizeof(struct cg3_regs), "cg3 regs");
401 392
402 all->info.flags = FBINFO_DEFAULT; 393 all->info.flags = FBINFO_DEFAULT;
403 all->info.fbops = &cg3_ops; 394 all->info.fbops = &cg3_ops;
404#ifdef CONFIG_SPARC32 395 all->info.screen_base =
405 all->info.screen_base = (char __iomem *) 396 of_ioremap(&op->resource[0], CG3_RAM_OFFSET,
406 prom_getintdefault(sdev->prom_node, "address", 0); 397 all->par.fbsize, "cg3 ram");
407#endif
408 if (!all->info.screen_base)
409 all->info.screen_base =
410 sbus_ioremap(&sdev->resource[0], CG3_RAM_OFFSET,
411 all->par.fbsize, "cg3 ram");
412 all->info.par = &all->par; 398 all->info.par = &all->par;
413 399
414 cg3_blank(0, &all->info); 400 cg3_blank(0, &all->info);
415 401
416 if (!prom_getbool(sdev->prom_node, "width")) 402 if (!of_find_property(dp, "width", NULL))
417 cg3_do_default_mode(&all->par); 403 cg3_do_default_mode(&all->par);
418 404
419 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 405 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
420 printk(KERN_ERR "cg3: Could not allocate color map.\n"); 406 of_iounmap(all->par.regs, sizeof(struct cg3_regs));
407 of_iounmap(all->info.screen_base, all->par.fbsize);
421 kfree(all); 408 kfree(all);
422 return; 409 return -ENOMEM;
423 } 410 }
424 fb_set_cmap(&all->info.cmap, &all->info); 411 fb_set_cmap(&all->info.cmap, &all->info);
425 412
426 cg3_init_fix(&all->info, linebytes); 413 cg3_init_fix(&all->info, linebytes, dp);
427 414
428 if (register_framebuffer(&all->info) < 0) { 415 err = register_framebuffer(&all->info);
429 printk(KERN_ERR "cg3: Could not register framebuffer.\n"); 416 if (err < 0) {
430 fb_dealloc_cmap(&all->info.cmap); 417 fb_dealloc_cmap(&all->info.cmap);
418 of_iounmap(all->par.regs, sizeof(struct cg3_regs));
419 of_iounmap(all->info.screen_base, all->par.fbsize);
431 kfree(all); 420 kfree(all);
432 return; 421 return err;
433 } 422 }
434 423
435 list_add(&all->list, &cg3_list); 424 dev_set_drvdata(&op->dev, all);
425
426 printk("%s: cg3 at %lx:%lx\n",
427 dp->full_name, all->par.which_io, all->par.physbase);
436 428
437 printk("cg3: %s at %lx:%lx\n", 429 return 0;
438 sdev->prom_name,
439 (long) sdev->reg_addrs[0].which_io,
440 (long) sdev->reg_addrs[0].phys_addr);
441} 430}
442 431
443int __init cg3_init(void) 432static int __devinit cg3_probe(struct of_device *dev, const struct of_device_id *match)
444{ 433{
445 struct sbus_bus *sbus; 434 struct of_device *op = to_of_device(&dev->dev);
446 struct sbus_dev *sdev;
447 435
448 if (fb_get_options("cg3fb", NULL)) 436 return cg3_init_one(op);
449 return -ENODEV; 437}
450 438
451 for_all_sbusdev(sdev, sbus) { 439static int __devexit cg3_remove(struct of_device *dev)
452 if (!strcmp(sdev->prom_name, "cgthree") || 440{
453 !strcmp(sdev->prom_name, "cgRDI")) 441 struct all_info *all = dev_get_drvdata(&dev->dev);
454 cg3_init_one(sdev); 442
455 } 443 unregister_framebuffer(&all->info);
444 fb_dealloc_cmap(&all->info.cmap);
445
446 of_iounmap(all->par.regs, sizeof(struct cg3_regs));
447 of_iounmap(all->info.screen_base, all->par.fbsize);
448
449 kfree(all);
450
451 dev_set_drvdata(&dev->dev, NULL);
456 452
457 return 0; 453 return 0;
458} 454}
459 455
460void __exit cg3_exit(void) 456static struct of_device_id cg3_match[] = {
461{ 457 {
462 struct list_head *pos, *tmp; 458 .name = "cgthree",
459 },
460 {
461 .name = "cgRDI",
462 },
463 {},
464};
465MODULE_DEVICE_TABLE(of, cg3_match);
463 466
464 list_for_each_safe(pos, tmp, &cg3_list) { 467static struct of_platform_driver cg3_driver = {
465 struct all_info *all = list_entry(pos, typeof(*all), list); 468 .name = "cg3",
469 .match_table = cg3_match,
470 .probe = cg3_probe,
471 .remove = __devexit_p(cg3_remove),
472};
466 473
467 unregister_framebuffer(&all->info); 474static int __init cg3_init(void)
468 fb_dealloc_cmap(&all->info.cmap); 475{
469 kfree(all); 476 if (fb_get_options("cg3fb", NULL))
470 } 477 return -ENODEV;
478
479 return of_register_driver(&cg3_driver, &of_bus_type);
471} 480}
472 481
473int __init 482static void __exit cg3_exit(void)
474cg3_setup(char *arg)
475{ 483{
476 /* No cmdline options yet... */ 484 of_unregister_driver(&cg3_driver);
477 return 0;
478} 485}
479 486
480module_init(cg3_init); 487module_init(cg3_init);
481
482#ifdef MODULE
483module_exit(cg3_exit); 488module_exit(cg3_exit);
484#endif
485 489
486MODULE_DESCRIPTION("framebuffer driver for CGthree chipsets"); 490MODULE_DESCRIPTION("framebuffer driver for CGthree chipsets");
487MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 491MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
492MODULE_VERSION("2.0");
488MODULE_LICENSE("GPL"); 493MODULE_LICENSE("GPL");
diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c
index 7aab91ead6..64146be2ee 100644
--- a/drivers/video/cg6.c
+++ b/drivers/video/cg6.c
@@ -1,6 +1,6 @@
1/* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver 1/* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
@@ -19,8 +19,8 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sbus.h> 22#include <asm/prom.h>
23#include <asm/oplib.h> 23#include <asm/of_device.h>
24#include <asm/fbio.h> 24#include <asm/fbio.h>
25 25
26#include "sbuslib.h" 26#include "sbuslib.h"
@@ -164,89 +164,89 @@ static struct fb_ops cg6_ops = {
164 164
165/* The contents are unknown */ 165/* The contents are unknown */
166struct cg6_tec { 166struct cg6_tec {
167 volatile int tec_matrix; 167 int tec_matrix;
168 volatile int tec_clip; 168 int tec_clip;
169 volatile int tec_vdc; 169 int tec_vdc;
170}; 170};
171 171
172struct cg6_thc { 172struct cg6_thc {
173 uint thc_pad0[512]; 173 u32 thc_pad0[512];
174 volatile uint thc_hs; /* hsync timing */ 174 u32 thc_hs; /* hsync timing */
175 volatile uint thc_hsdvs; 175 u32 thc_hsdvs;
176 volatile uint thc_hd; 176 u32 thc_hd;
177 volatile uint thc_vs; /* vsync timing */ 177 u32 thc_vs; /* vsync timing */
178 volatile uint thc_vd; 178 u32 thc_vd;
179 volatile uint thc_refresh; 179 u32 thc_refresh;
180 volatile uint thc_misc; 180 u32 thc_misc;
181 uint thc_pad1[56]; 181 u32 thc_pad1[56];
182 volatile uint thc_cursxy; /* cursor x,y position (16 bits each) */ 182 u32 thc_cursxy; /* cursor x,y position (16 bits each) */
183 volatile uint thc_cursmask[32]; /* cursor mask bits */ 183 u32 thc_cursmask[32]; /* cursor mask bits */
184 volatile uint thc_cursbits[32]; /* what to show where mask enabled */ 184 u32 thc_cursbits[32]; /* what to show where mask enabled */
185}; 185};
186 186
187struct cg6_fbc { 187struct cg6_fbc {
188 u32 xxx0[1]; 188 u32 xxx0[1];
189 volatile u32 mode; 189 u32 mode;
190 volatile u32 clip; 190 u32 clip;
191 u32 xxx1[1]; 191 u32 xxx1[1];
192 volatile u32 s; 192 u32 s;
193 volatile u32 draw; 193 u32 draw;
194 volatile u32 blit; 194 u32 blit;
195 volatile u32 font; 195 u32 font;
196 u32 xxx2[24]; 196 u32 xxx2[24];
197 volatile u32 x0, y0, z0, color0; 197 u32 x0, y0, z0, color0;
198 volatile u32 x1, y1, z1, color1; 198 u32 x1, y1, z1, color1;
199 volatile u32 x2, y2, z2, color2; 199 u32 x2, y2, z2, color2;
200 volatile u32 x3, y3, z3, color3; 200 u32 x3, y3, z3, color3;
201 volatile u32 offx, offy; 201 u32 offx, offy;
202 u32 xxx3[2]; 202 u32 xxx3[2];
203 volatile u32 incx, incy; 203 u32 incx, incy;
204 u32 xxx4[2]; 204 u32 xxx4[2];
205 volatile u32 clipminx, clipminy; 205 u32 clipminx, clipminy;
206 u32 xxx5[2]; 206 u32 xxx5[2];
207 volatile u32 clipmaxx, clipmaxy; 207 u32 clipmaxx, clipmaxy;
208 u32 xxx6[2]; 208 u32 xxx6[2];
209 volatile u32 fg; 209 u32 fg;
210 volatile u32 bg; 210 u32 bg;
211 volatile u32 alu; 211 u32 alu;
212 volatile u32 pm; 212 u32 pm;
213 volatile u32 pixelm; 213 u32 pixelm;
214 u32 xxx7[2]; 214 u32 xxx7[2];
215 volatile u32 patalign; 215 u32 patalign;
216 volatile u32 pattern[8]; 216 u32 pattern[8];
217 u32 xxx8[432]; 217 u32 xxx8[432];
218 volatile u32 apointx, apointy, apointz; 218 u32 apointx, apointy, apointz;
219 u32 xxx9[1]; 219 u32 xxx9[1];
220 volatile u32 rpointx, rpointy, rpointz; 220 u32 rpointx, rpointy, rpointz;
221 u32 xxx10[5]; 221 u32 xxx10[5];
222 volatile u32 pointr, pointg, pointb, pointa; 222 u32 pointr, pointg, pointb, pointa;
223 volatile u32 alinex, aliney, alinez; 223 u32 alinex, aliney, alinez;
224 u32 xxx11[1]; 224 u32 xxx11[1];
225 volatile u32 rlinex, rliney, rlinez; 225 u32 rlinex, rliney, rlinez;
226 u32 xxx12[5]; 226 u32 xxx12[5];
227 volatile u32 liner, lineg, lineb, linea; 227 u32 liner, lineg, lineb, linea;
228 volatile u32 atrix, atriy, atriz; 228 u32 atrix, atriy, atriz;
229 u32 xxx13[1]; 229 u32 xxx13[1];
230 volatile u32 rtrix, rtriy, rtriz; 230 u32 rtrix, rtriy, rtriz;
231 u32 xxx14[5]; 231 u32 xxx14[5];
232 volatile u32 trir, trig, trib, tria; 232 u32 trir, trig, trib, tria;
233 volatile u32 aquadx, aquady, aquadz; 233 u32 aquadx, aquady, aquadz;
234 u32 xxx15[1]; 234 u32 xxx15[1];
235 volatile u32 rquadx, rquady, rquadz; 235 u32 rquadx, rquady, rquadz;
236 u32 xxx16[5]; 236 u32 xxx16[5];
237 volatile u32 quadr, quadg, quadb, quada; 237 u32 quadr, quadg, quadb, quada;
238 volatile u32 arectx, arecty, arectz; 238 u32 arectx, arecty, arectz;
239 u32 xxx17[1]; 239 u32 xxx17[1];
240 volatile u32 rrectx, rrecty, rrectz; 240 u32 rrectx, rrecty, rrectz;
241 u32 xxx18[5]; 241 u32 xxx18[5];
242 volatile u32 rectr, rectg, rectb, recta; 242 u32 rectr, rectg, rectb, recta;
243}; 243};
244 244
245struct bt_regs { 245struct bt_regs {
246 volatile u32 addr; 246 u32 addr;
247 volatile u32 color_map; 247 u32 color_map;
248 volatile u32 control; 248 u32 control;
249 volatile u32 cursor; 249 u32 cursor;
250}; 250};
251 251
252struct cg6_par { 252struct cg6_par {
@@ -255,15 +255,14 @@ struct cg6_par {
255 struct cg6_fbc __iomem *fbc; 255 struct cg6_fbc __iomem *fbc;
256 struct cg6_thc __iomem *thc; 256 struct cg6_thc __iomem *thc;
257 struct cg6_tec __iomem *tec; 257 struct cg6_tec __iomem *tec;
258 volatile u32 __iomem *fhc; 258 u32 __iomem *fhc;
259 259
260 u32 flags; 260 u32 flags;
261#define CG6_FLAG_BLANKED 0x00000001 261#define CG6_FLAG_BLANKED 0x00000001
262 262
263 unsigned long physbase; 263 unsigned long physbase;
264 unsigned long which_io;
264 unsigned long fbsize; 265 unsigned long fbsize;
265
266 struct sbus_dev *sdev;
267}; 266};
268 267
269static int cg6_sync(struct fb_info *info) 268static int cg6_sync(struct fb_info *info)
@@ -529,8 +528,7 @@ static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma)
529 528
530 return sbusfb_mmap_helper(cg6_mmap_map, 529 return sbusfb_mmap_helper(cg6_mmap_map,
531 par->physbase, par->fbsize, 530 par->physbase, par->fbsize,
532 par->sdev->reg_addrs[0].which_io, 531 par->which_io, vma);
533 vma);
534} 532}
535 533
536static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) 534static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
@@ -658,62 +656,75 @@ static void cg6_chip_init(struct fb_info *info)
658struct all_info { 656struct all_info {
659 struct fb_info info; 657 struct fb_info info;
660 struct cg6_par par; 658 struct cg6_par par;
661 struct list_head list;
662}; 659};
663static LIST_HEAD(cg6_list);
664 660
665static void cg6_init_one(struct sbus_dev *sdev) 661static void cg6_unmap_regs(struct all_info *all)
666{ 662{
667 struct all_info *all; 663 if (all->par.fbc)
668 int linebytes; 664 of_iounmap(all->par.fbc, 4096);
665 if (all->par.tec)
666 of_iounmap(all->par.tec, sizeof(struct cg6_tec));
667 if (all->par.thc)
668 of_iounmap(all->par.thc, sizeof(struct cg6_thc));
669 if (all->par.bt)
670 of_iounmap(all->par.bt, sizeof(struct bt_regs));
671 if (all->par.fhc)
672 of_iounmap(all->par.fhc, sizeof(u32));
673
674 if (all->info.screen_base)
675 of_iounmap(all->info.screen_base, all->par.fbsize);
676}
669 677
670 all = kmalloc(sizeof(*all), GFP_KERNEL); 678static int __devinit cg6_init_one(struct of_device *op)
671 if (!all) { 679{
672 printk(KERN_ERR "cg6: Cannot allocate memory.\n"); 680 struct device_node *dp = op->node;
673 return; 681 struct all_info *all;
674 } 682 int linebytes, err;
675 memset(all, 0, sizeof(*all));
676 683
677 INIT_LIST_HEAD(&all->list); 684 all = kzalloc(sizeof(*all), GFP_KERNEL);
685 if (!all)
686 return -ENOMEM;
678 687
679 spin_lock_init(&all->par.lock); 688 spin_lock_init(&all->par.lock);
680 all->par.sdev = sdev;
681 689
682 all->par.physbase = sdev->reg_addrs[0].phys_addr; 690 all->par.physbase = op->resource[0].start;
691 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
683 692
684 sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); 693 sbusfb_fill_var(&all->info.var, dp->node, 8);
685 all->info.var.red.length = 8; 694 all->info.var.red.length = 8;
686 all->info.var.green.length = 8; 695 all->info.var.green.length = 8;
687 all->info.var.blue.length = 8; 696 all->info.var.blue.length = 8;
688 697
689 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 698 linebytes = of_getintprop_default(dp, "linebytes",
690 all->info.var.xres); 699 all->info.var.xres);
691 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 700 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
692 if (prom_getbool(sdev->prom_node, "dblbuf")) 701 if (of_find_property(dp, "dblbuf", NULL))
693 all->par.fbsize *= 4; 702 all->par.fbsize *= 4;
694 703
695 all->par.fbc = sbus_ioremap(&sdev->resource[0], CG6_FBC_OFFSET, 704 all->par.fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
696 4096, "cgsix fbc"); 705 4096, "cgsix fbc");
697 all->par.tec = sbus_ioremap(&sdev->resource[0], CG6_TEC_OFFSET, 706 all->par.tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET,
698 sizeof(struct cg6_tec), "cgsix tec"); 707 sizeof(struct cg6_tec), "cgsix tec");
699 all->par.thc = sbus_ioremap(&sdev->resource[0], CG6_THC_OFFSET, 708 all->par.thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET,
700 sizeof(struct cg6_thc), "cgsix thc"); 709 sizeof(struct cg6_thc), "cgsix thc");
701 all->par.bt = sbus_ioremap(&sdev->resource[0], CG6_BROOKTREE_OFFSET, 710 all->par.bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET,
702 sizeof(struct bt_regs), "cgsix dac"); 711 sizeof(struct bt_regs), "cgsix dac");
703 all->par.fhc = sbus_ioremap(&sdev->resource[0], CG6_FHC_OFFSET, 712 all->par.fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET,
704 sizeof(u32), "cgsix fhc"); 713 sizeof(u32), "cgsix fhc");
705 714
706 all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT | 715 all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
707 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT; 716 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT;
708 all->info.fbops = &cg6_ops; 717 all->info.fbops = &cg6_ops;
709#ifdef CONFIG_SPARC32 718
710 all->info.screen_base = (char __iomem *) 719 all->info.screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
711 prom_getintdefault(sdev->prom_node, "address", 0); 720 all->par.fbsize, "cgsix ram");
712#endif 721 if (!all->par.fbc || !all->par.tec || !all->par.thc ||
713 if (!all->info.screen_base) 722 !all->par.bt || !all->par.fhc || !all->info.screen_base) {
714 all->info.screen_base = 723 cg6_unmap_regs(all);
715 sbus_ioremap(&sdev->resource[0], CG6_RAM_OFFSET, 724 kfree(all);
716 all->par.fbsize, "cgsix ram"); 725 return -ENOMEM;
726 }
727
717 all->info.par = &all->par; 728 all->info.par = &all->par;
718 729
719 all->info.var.accel_flags = FB_ACCELF_TEXT; 730 all->info.var.accel_flags = FB_ACCELF_TEXT;
@@ -723,72 +734,90 @@ static void cg6_init_one(struct sbus_dev *sdev)
723 cg6_blank(0, &all->info); 734 cg6_blank(0, &all->info);
724 735
725 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 736 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
726 printk(KERN_ERR "cg6: Could not allocate color map.\n"); 737 cg6_unmap_regs(all);
727 kfree(all); 738 kfree(all);
728 return; 739 return -ENOMEM;
729 } 740 }
730 741
731 fb_set_cmap(&all->info.cmap, &all->info); 742 fb_set_cmap(&all->info.cmap, &all->info);
732 cg6_init_fix(&all->info, linebytes); 743 cg6_init_fix(&all->info, linebytes);
733 744
734 if (register_framebuffer(&all->info) < 0) { 745 err = register_framebuffer(&all->info);
735 printk(KERN_ERR "cg6: Could not register framebuffer.\n"); 746 if (err < 0) {
747 cg6_unmap_regs(all);
736 fb_dealloc_cmap(&all->info.cmap); 748 fb_dealloc_cmap(&all->info.cmap);
737 kfree(all); 749 kfree(all);
738 return; 750 return err;
739 } 751 }
740 752
741 list_add(&all->list, &cg6_list); 753 dev_set_drvdata(&op->dev, all);
742 754
743 printk("cg6: CGsix [%s] at %lx:%lx\n", 755 printk("%s: CGsix [%s] at %lx:%lx\n",
756 dp->full_name,
744 all->info.fix.id, 757 all->info.fix.id,
745 (long) sdev->reg_addrs[0].which_io, 758 all->par.which_io, all->par.physbase);
746 (long) sdev->reg_addrs[0].phys_addr); 759
760 return 0;
747} 761}
748 762
749int __init cg6_init(void) 763static int __devinit cg6_probe(struct of_device *dev, const struct of_device_id *match)
750{ 764{
751 struct sbus_bus *sbus; 765 struct of_device *op = to_of_device(&dev->dev);
752 struct sbus_dev *sdev;
753 766
754 if (fb_get_options("cg6fb", NULL)) 767 return cg6_init_one(op);
755 return -ENODEV; 768}
756 769
757 for_all_sbusdev(sdev, sbus) { 770static int __devexit cg6_remove(struct of_device *dev)
758 if (!strcmp(sdev->prom_name, "cgsix") || 771{
759 !strcmp(sdev->prom_name, "cgthree+")) 772 struct all_info *all = dev_get_drvdata(&dev->dev);
760 cg6_init_one(sdev); 773
761 } 774 unregister_framebuffer(&all->info);
775 fb_dealloc_cmap(&all->info.cmap);
776
777 cg6_unmap_regs(all);
778
779 kfree(all);
780
781 dev_set_drvdata(&dev->dev, NULL);
762 782
763 return 0; 783 return 0;
764} 784}
765 785
766void __exit cg6_exit(void) 786static struct of_device_id cg6_match[] = {
767{ 787 {
768 struct list_head *pos, *tmp; 788 .name = "cgsix",
789 },
790 {
791 .name = "cgthree+",
792 },
793 {},
794};
795MODULE_DEVICE_TABLE(of, cg6_match);
769 796
770 list_for_each_safe(pos, tmp, &cg6_list) { 797static struct of_platform_driver cg6_driver = {
771 struct all_info *all = list_entry(pos, typeof(*all), list); 798 .name = "cg6",
799 .match_table = cg6_match,
800 .probe = cg6_probe,
801 .remove = __devexit_p(cg6_remove),
802};
772 803
773 unregister_framebuffer(&all->info); 804static int __init cg6_init(void)
774 fb_dealloc_cmap(&all->info.cmap); 805{
775 kfree(all); 806 if (fb_get_options("cg6fb", NULL))
776 } 807 return -ENODEV;
808
809 return of_register_driver(&cg6_driver, &of_bus_type);
777} 810}
778 811
779int __init 812static void __exit cg6_exit(void)
780cg6_setup(char *arg)
781{ 813{
782 /* No cmdline options yet... */ 814 of_unregister_driver(&cg6_driver);
783 return 0;
784} 815}
785 816
786module_init(cg6_init); 817module_init(cg6_init);
787
788#ifdef MODULE
789module_exit(cg6_exit); 818module_exit(cg6_exit);
790#endif
791 819
792MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets"); 820MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets");
793MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 821MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
822MODULE_VERSION("2.0");
794MODULE_LICENSE("GPL"); 823MODULE_LICENSE("GPL");
diff --git a/drivers/video/ffb.c b/drivers/video/ffb.c
index 7633e41add..2a0e8210d3 100644
--- a/drivers/video/ffb.c
+++ b/drivers/video/ffb.c
@@ -1,6 +1,6 @@
1/* ffb.c: Creator/Elite3D frame buffer driver 1/* ffb.c: Creator/Elite3D frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz)
5 * 5 *
6 * Driver layout based loosely on tgafb.c, see that file for credits. 6 * Driver layout based loosely on tgafb.c, see that file for credits.
@@ -19,7 +19,8 @@
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/upa.h> 21#include <asm/upa.h>
22#include <asm/oplib.h> 22#include <asm/prom.h>
23#include <asm/of_device.h>
23#include <asm/fbio.h> 24#include <asm/fbio.h>
24 25
25#include "sbuslib.h" 26#include "sbuslib.h"
@@ -184,161 +185,161 @@ static struct fb_ops ffb_ops = {
184 185
185struct ffb_fbc { 186struct ffb_fbc {
186 /* Next vertex registers */ 187 /* Next vertex registers */
187 u32 xxx1[3]; 188 u32 xxx1[3];
188 volatile u32 alpha; 189 u32 alpha;
189 volatile u32 red; 190 u32 red;
190 volatile u32 green; 191 u32 green;
191 volatile u32 blue; 192 u32 blue;
192 volatile u32 depth; 193 u32 depth;
193 volatile u32 y; 194 u32 y;
194 volatile u32 x; 195 u32 x;
195 u32 xxx2[2]; 196 u32 xxx2[2];
196 volatile u32 ryf; 197 u32 ryf;
197 volatile u32 rxf; 198 u32 rxf;
198 u32 xxx3[2]; 199 u32 xxx3[2];
199 200
200 volatile u32 dmyf; 201 u32 dmyf;
201 volatile u32 dmxf; 202 u32 dmxf;
202 u32 xxx4[2]; 203 u32 xxx4[2];
203 volatile u32 ebyi; 204 u32 ebyi;
204 volatile u32 ebxi; 205 u32 ebxi;
205 u32 xxx5[2]; 206 u32 xxx5[2];
206 volatile u32 by; 207 u32 by;
207 volatile u32 bx; 208 u32 bx;
208 u32 dy; 209 u32 dy;
209 u32 dx; 210 u32 dx;
210 volatile u32 bh; 211 u32 bh;
211 volatile u32 bw; 212 u32 bw;
212 u32 xxx6[2]; 213 u32 xxx6[2];
213 214
214 u32 xxx7[32]; 215 u32 xxx7[32];
215 216
216 /* Setup unit vertex state register */ 217 /* Setup unit vertex state register */
217 volatile u32 suvtx; 218 u32 suvtx;
218 u32 xxx8[63]; 219 u32 xxx8[63];
219 220
220 /* Control registers */ 221 /* Control registers */
221 volatile u32 ppc; 222 u32 ppc;
222 volatile u32 wid; 223 u32 wid;
223 volatile u32 fg; 224 u32 fg;
224 volatile u32 bg; 225 u32 bg;
225 volatile u32 consty; 226 u32 consty;
226 volatile u32 constz; 227 u32 constz;
227 volatile u32 xclip; 228 u32 xclip;
228 volatile u32 dcss; 229 u32 dcss;
229 volatile u32 vclipmin; 230 u32 vclipmin;
230 volatile u32 vclipmax; 231 u32 vclipmax;
231 volatile u32 vclipzmin; 232 u32 vclipzmin;
232 volatile u32 vclipzmax; 233 u32 vclipzmax;
233 volatile u32 dcsf; 234 u32 dcsf;
234 volatile u32 dcsb; 235 u32 dcsb;
235 volatile u32 dczf; 236 u32 dczf;
236 volatile u32 dczb; 237 u32 dczb;
237 238
238 u32 xxx9; 239 u32 xxx9;
239 volatile u32 blendc; 240 u32 blendc;
240 volatile u32 blendc1; 241 u32 blendc1;
241 volatile u32 blendc2; 242 u32 blendc2;
242 volatile u32 fbramitc; 243 u32 fbramitc;
243 volatile u32 fbc; 244 u32 fbc;
244 volatile u32 rop; 245 u32 rop;
245 volatile u32 cmp; 246 u32 cmp;
246 volatile u32 matchab; 247 u32 matchab;
247 volatile u32 matchc; 248 u32 matchc;
248 volatile u32 magnab; 249 u32 magnab;
249 volatile u32 magnc; 250 u32 magnc;
250 volatile u32 fbcfg0; 251 u32 fbcfg0;
251 volatile u32 fbcfg1; 252 u32 fbcfg1;
252 volatile u32 fbcfg2; 253 u32 fbcfg2;
253 volatile u32 fbcfg3; 254 u32 fbcfg3;
254 255
255 u32 ppcfg; 256 u32 ppcfg;
256 volatile u32 pick; 257 u32 pick;
257 volatile u32 fillmode; 258 u32 fillmode;
258 volatile u32 fbramwac; 259 u32 fbramwac;
259 volatile u32 pmask; 260 u32 pmask;
260 volatile u32 xpmask; 261 u32 xpmask;
261 volatile u32 ypmask; 262 u32 ypmask;
262 volatile u32 zpmask; 263 u32 zpmask;
263 volatile u32 clip0min; 264 u32 clip0min;
264 volatile u32 clip0max; 265 u32 clip0max;
265 volatile u32 clip1min; 266 u32 clip1min;
266 volatile u32 clip1max; 267 u32 clip1max;
267 volatile u32 clip2min; 268 u32 clip2min;
268 volatile u32 clip2max; 269 u32 clip2max;
269 volatile u32 clip3min; 270 u32 clip3min;
270 volatile u32 clip3max; 271 u32 clip3max;
271 272
272 /* New 3dRAM III support regs */ 273 /* New 3dRAM III support regs */
273 volatile u32 rawblend2; 274 u32 rawblend2;
274 volatile u32 rawpreblend; 275 u32 rawpreblend;
275 volatile u32 rawstencil; 276 u32 rawstencil;
276 volatile u32 rawstencilctl; 277 u32 rawstencilctl;
277 volatile u32 threedram1; 278 u32 threedram1;
278 volatile u32 threedram2; 279 u32 threedram2;
279 volatile u32 passin; 280 u32 passin;
280 volatile u32 rawclrdepth; 281 u32 rawclrdepth;
281 volatile u32 rawpmask; 282 u32 rawpmask;
282 volatile u32 rawcsrc; 283 u32 rawcsrc;
283 volatile u32 rawmatch; 284 u32 rawmatch;
284 volatile u32 rawmagn; 285 u32 rawmagn;
285 volatile u32 rawropblend; 286 u32 rawropblend;
286 volatile u32 rawcmp; 287 u32 rawcmp;
287 volatile u32 rawwac; 288 u32 rawwac;
288 volatile u32 fbramid; 289 u32 fbramid;
289 290
290 volatile u32 drawop; 291 u32 drawop;
291 u32 xxx10[2]; 292 u32 xxx10[2];
292 volatile u32 fontlpat; 293 u32 fontlpat;
293 u32 xxx11; 294 u32 xxx11;
294 volatile u32 fontxy; 295 u32 fontxy;
295 volatile u32 fontw; 296 u32 fontw;
296 volatile u32 fontinc; 297 u32 fontinc;
297 volatile u32 font; 298 u32 font;
298 u32 xxx12[3]; 299 u32 xxx12[3];
299 volatile u32 blend2; 300 u32 blend2;
300 volatile u32 preblend; 301 u32 preblend;
301 volatile u32 stencil; 302 u32 stencil;
302 volatile u32 stencilctl; 303 u32 stencilctl;
303 304
304 u32 xxx13[4]; 305 u32 xxx13[4];
305 volatile u32 dcss1; 306 u32 dcss1;
306 volatile u32 dcss2; 307 u32 dcss2;
307 volatile u32 dcss3; 308 u32 dcss3;
308 volatile u32 widpmask; 309 u32 widpmask;
309 volatile u32 dcs2; 310 u32 dcs2;
310 volatile u32 dcs3; 311 u32 dcs3;
311 volatile u32 dcs4; 312 u32 dcs4;
312 u32 xxx14; 313 u32 xxx14;
313 volatile u32 dcd2; 314 u32 dcd2;
314 volatile u32 dcd3; 315 u32 dcd3;
315 volatile u32 dcd4; 316 u32 dcd4;
316 u32 xxx15; 317 u32 xxx15;
317 318
318 volatile u32 pattern[32]; 319 u32 pattern[32];
319 320
320 u32 xxx16[256]; 321 u32 xxx16[256];
321 322
322 volatile u32 devid; 323 u32 devid;
323 u32 xxx17[63]; 324 u32 xxx17[63];
324 325
325 volatile u32 ucsr; 326 u32 ucsr;
326 u32 xxx18[31]; 327 u32 xxx18[31];
327 328
328 volatile u32 mer; 329 u32 mer;
329}; 330};
330 331
331struct ffb_dac { 332struct ffb_dac {
332 volatile u32 type; 333 u32 type;
333 volatile u32 value; 334 u32 value;
334 volatile u32 type2; 335 u32 type2;
335 volatile u32 value2; 336 u32 value2;
336}; 337};
337 338
338struct ffb_par { 339struct ffb_par {
339 spinlock_t lock; 340 spinlock_t lock;
340 struct ffb_fbc *fbc; 341 struct ffb_fbc __iomem *fbc;
341 struct ffb_dac *dac; 342 struct ffb_dac __iomem *dac;
342 343
343 u32 flags; 344 u32 flags;
344#define FFB_FLAG_AFB 0x00000001 345#define FFB_FLAG_AFB 0x00000001
@@ -353,16 +354,13 @@ struct ffb_par {
353 unsigned long physbase; 354 unsigned long physbase;
354 unsigned long fbsize; 355 unsigned long fbsize;
355 356
356 char name[64];
357 int prom_node;
358 int prom_parent_node;
359 int dac_rev; 357 int dac_rev;
360 int board_type; 358 int board_type;
361}; 359};
362 360
363static void FFBFifo(struct ffb_par *par, int n) 361static void FFBFifo(struct ffb_par *par, int n)
364{ 362{
365 struct ffb_fbc *fbc; 363 struct ffb_fbc __iomem *fbc;
366 int cache = par->fifo_cache; 364 int cache = par->fifo_cache;
367 365
368 if (cache - n < 0) { 366 if (cache - n < 0) {
@@ -375,7 +373,7 @@ static void FFBFifo(struct ffb_par *par, int n)
375 373
376static void FFBWait(struct ffb_par *par) 374static void FFBWait(struct ffb_par *par)
377{ 375{
378 struct ffb_fbc *fbc; 376 struct ffb_fbc __iomem *fbc;
379 int limit = 10000; 377 int limit = 10000;
380 378
381 fbc = par->fbc; 379 fbc = par->fbc;
@@ -408,8 +406,8 @@ static __inline__ void ffb_rop(struct ffb_par *par, u32 rop)
408 406
409static void ffb_switch_from_graph(struct ffb_par *par) 407static void ffb_switch_from_graph(struct ffb_par *par)
410{ 408{
411 struct ffb_fbc *fbc = par->fbc; 409 struct ffb_fbc __iomem *fbc = par->fbc;
412 struct ffb_dac *dac = par->dac; 410 struct ffb_dac __iomem *dac = par->dac;
413 unsigned long flags; 411 unsigned long flags;
414 412
415 spin_lock_irqsave(&par->lock, flags); 413 spin_lock_irqsave(&par->lock, flags);
@@ -462,7 +460,7 @@ static int ffb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
462static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 460static void ffb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
463{ 461{
464 struct ffb_par *par = (struct ffb_par *) info->par; 462 struct ffb_par *par = (struct ffb_par *) info->par;
465 struct ffb_fbc *fbc = par->fbc; 463 struct ffb_fbc __iomem *fbc = par->fbc;
466 unsigned long flags; 464 unsigned long flags;
467 u32 fg; 465 u32 fg;
468 466
@@ -505,7 +503,7 @@ static void
505ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area) 503ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
506{ 504{
507 struct ffb_par *par = (struct ffb_par *) info->par; 505 struct ffb_par *par = (struct ffb_par *) info->par;
508 struct ffb_fbc *fbc = par->fbc; 506 struct ffb_fbc __iomem *fbc = par->fbc;
509 unsigned long flags; 507 unsigned long flags;
510 508
511 if (area->dx != area->sx || 509 if (area->dx != area->sx ||
@@ -541,7 +539,7 @@ ffb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
541static void ffb_imageblit(struct fb_info *info, const struct fb_image *image) 539static void ffb_imageblit(struct fb_info *info, const struct fb_image *image)
542{ 540{
543 struct ffb_par *par = (struct ffb_par *) info->par; 541 struct ffb_par *par = (struct ffb_par *) info->par;
544 struct ffb_fbc *fbc = par->fbc; 542 struct ffb_fbc __iomem *fbc = par->fbc;
545 const u8 *data = image->data; 543 const u8 *data = image->data;
546 unsigned long flags; 544 unsigned long flags;
547 u32 fg, bg, xy; 545 u32 fg, bg, xy;
@@ -664,7 +662,7 @@ static int
664ffb_blank(int blank, struct fb_info *info) 662ffb_blank(int blank, struct fb_info *info)
665{ 663{
666 struct ffb_par *par = (struct ffb_par *) info->par; 664 struct ffb_par *par = (struct ffb_par *) info->par;
667 struct ffb_dac *dac = par->dac; 665 struct ffb_dac __iomem *dac = par->dac;
668 unsigned long flags; 666 unsigned long flags;
669 u32 tmp; 667 u32 tmp;
670 668
@@ -883,78 +881,42 @@ ffb_init_fix(struct fb_info *info)
883 info->fix.accel = FB_ACCEL_SUN_CREATOR; 881 info->fix.accel = FB_ACCEL_SUN_CREATOR;
884} 882}
885 883
886static int ffb_apply_upa_parent_ranges(int parent,
887 struct linux_prom64_registers *regs)
888{
889 struct linux_prom64_ranges ranges[PROMREG_MAX];
890 char name[128];
891 int len, i;
892
893 prom_getproperty(parent, "name", name, sizeof(name));
894 if (strcmp(name, "upa") != 0)
895 return 0;
896
897 len = prom_getproperty(parent, "ranges", (void *) ranges, sizeof(ranges));
898 if (len <= 0)
899 return 1;
900
901 len /= sizeof(struct linux_prom64_ranges);
902 for (i = 0; i < len; i++) {
903 struct linux_prom64_ranges *rng = &ranges[i];
904 u64 phys_addr = regs->phys_addr;
905
906 if (phys_addr >= rng->ot_child_base &&
907 phys_addr < (rng->ot_child_base + rng->or_size)) {
908 regs->phys_addr -= rng->ot_child_base;
909 regs->phys_addr += rng->ot_parent_base;
910 return 0;
911 }
912 }
913
914 return 1;
915}
916
917struct all_info { 884struct all_info {
918 struct fb_info info; 885 struct fb_info info;
919 struct ffb_par par; 886 struct ffb_par par;
920 u32 pseudo_palette[256]; 887 u32 pseudo_palette[256];
921 struct list_head list;
922}; 888};
923static LIST_HEAD(ffb_list);
924 889
925static void ffb_init_one(int node, int parent) 890static int ffb_init_one(struct of_device *op)
926{ 891{
927 struct linux_prom64_registers regs[2*PROMREG_MAX]; 892 struct device_node *dp = op->node;
928 struct ffb_fbc *fbc; 893 struct ffb_fbc __iomem *fbc;
929 struct ffb_dac *dac; 894 struct ffb_dac __iomem *dac;
930 struct all_info *all; 895 struct all_info *all;
896 int err;
931 897
932 if (prom_getproperty(node, "reg", (void *) regs, sizeof(regs)) <= 0) { 898 all = kzalloc(sizeof(*all), GFP_KERNEL);
933 printk("ffb: Cannot get reg device node property.\n"); 899 if (!all)
934 return; 900 return -ENOMEM;
935 }
936 901
937 if (ffb_apply_upa_parent_ranges(parent, &regs[0])) { 902 spin_lock_init(&all->par.lock);
938 printk("ffb: Cannot apply parent ranges to regs.\n"); 903 all->par.fbc = of_ioremap(&op->resource[2], 0,
939 return; 904 sizeof(struct ffb_fbc), "ffb fbc");
905 if (!all->par.fbc) {
906 kfree(all);
907 return -ENOMEM;
940 } 908 }
941 909
942 all = kmalloc(sizeof(*all), GFP_KERNEL); 910 all->par.dac = of_ioremap(&op->resource[1], 0,
943 if (!all) { 911 sizeof(struct ffb_dac), "ffb dac");
944 printk(KERN_ERR "ffb: Cannot allocate memory.\n"); 912 if (!all->par.dac) {
945 return; 913 of_iounmap(all->par.fbc, sizeof(struct ffb_fbc));
914 kfree(all);
915 return -ENOMEM;
946 } 916 }
947 memset(all, 0, sizeof(*all));
948
949 INIT_LIST_HEAD(&all->list);
950 917
951 spin_lock_init(&all->par.lock);
952 all->par.fbc = (struct ffb_fbc *)(regs[0].phys_addr + FFB_FBC_REGS_POFF);
953 all->par.dac = (struct ffb_dac *)(regs[0].phys_addr + FFB_DAC_POFF);
954 all->par.rop_cache = FFB_ROP_NEW; 918 all->par.rop_cache = FFB_ROP_NEW;
955 all->par.physbase = regs[0].phys_addr; 919 all->par.physbase = op->resource[0].start;
956 all->par.prom_node = node;
957 all->par.prom_parent_node = parent;
958 920
959 /* Don't mention copyarea, so SCROLL_REDRAW is always 921 /* Don't mention copyarea, so SCROLL_REDRAW is always
960 * used. It is the fastest on this chip. 922 * used. It is the fastest on this chip.
@@ -968,7 +930,7 @@ static void ffb_init_one(int node, int parent)
968 all->info.par = &all->par; 930 all->info.par = &all->par;
969 all->info.pseudo_palette = all->pseudo_palette; 931 all->info.pseudo_palette = all->pseudo_palette;
970 932
971 sbusfb_fill_var(&all->info.var, all->par.prom_node, 32); 933 sbusfb_fill_var(&all->info.var, dp->node, 32);
972 all->par.fbsize = PAGE_ALIGN(all->info.var.xres * 934 all->par.fbsize = PAGE_ALIGN(all->info.var.xres *
973 all->info.var.yres * 935 all->info.var.yres *
974 4); 936 4);
@@ -976,14 +938,13 @@ static void ffb_init_one(int node, int parent)
976 938
977 all->info.var.accel_flags = FB_ACCELF_TEXT; 939 all->info.var.accel_flags = FB_ACCELF_TEXT;
978 940
979 prom_getstring(node, "name", all->par.name, sizeof(all->par.name)); 941 if (!strcmp(dp->name, "SUNW,afb"))
980 if (!strcmp(all->par.name, "SUNW,afb"))
981 all->par.flags |= FFB_FLAG_AFB; 942 all->par.flags |= FFB_FLAG_AFB;
982 943
983 all->par.board_type = prom_getintdefault(node, "board_type", 0); 944 all->par.board_type = of_getintprop_default(dp, "board_type", 0);
984 945
985 fbc = all->par.fbc; 946 fbc = all->par.fbc;
986 if((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0) 947 if ((upa_readl(&fbc->ucsr) & FFB_UCSR_ALL_ERRORS) != 0)
987 upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr); 948 upa_writel(FFB_UCSR_ALL_ERRORS, &fbc->ucsr);
988 949
989 ffb_switch_from_graph(&all->par); 950 ffb_switch_from_graph(&all->par);
@@ -1008,81 +969,88 @@ static void ffb_init_one(int node, int parent)
1008 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 969 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
1009 printk(KERN_ERR "ffb: Could not allocate color map.\n"); 970 printk(KERN_ERR "ffb: Could not allocate color map.\n");
1010 kfree(all); 971 kfree(all);
1011 return; 972 return -ENOMEM;
1012 } 973 }
1013 974
1014 ffb_init_fix(&all->info); 975 ffb_init_fix(&all->info);
1015 976
1016 if (register_framebuffer(&all->info) < 0) { 977 err = register_framebuffer(&all->info);
978 if (err < 0) {
1017 printk(KERN_ERR "ffb: Could not register framebuffer.\n"); 979 printk(KERN_ERR "ffb: Could not register framebuffer.\n");
1018 fb_dealloc_cmap(&all->info.cmap); 980 fb_dealloc_cmap(&all->info.cmap);
1019 kfree(all); 981 kfree(all);
1020 return; 982 return err;
1021 } 983 }
1022 984
1023 list_add(&all->list, &ffb_list); 985 dev_set_drvdata(&op->dev, all);
1024 986
1025 printk("ffb: %s at %016lx type %d DAC %d\n", 987 printk("%s: %s at %016lx, type %d, DAC revision %d\n",
988 dp->full_name,
1026 ((all->par.flags & FFB_FLAG_AFB) ? "AFB" : "FFB"), 989 ((all->par.flags & FFB_FLAG_AFB) ? "AFB" : "FFB"),
1027 regs[0].phys_addr, all->par.board_type, all->par.dac_rev); 990 all->par.physbase, all->par.board_type, all->par.dac_rev);
991
992 return 0;
1028} 993}
1029 994
1030static void ffb_scan_siblings(int root) 995static int __devinit ffb_probe(struct of_device *dev, const struct of_device_id *match)
1031{ 996{
1032 int node, child; 997 struct of_device *op = to_of_device(&dev->dev);
1033 998
1034 child = prom_getchild(root); 999 return ffb_init_one(op);
1035 for (node = prom_searchsiblings(child, "SUNW,ffb"); node;
1036 node = prom_searchsiblings(prom_getsibling(node), "SUNW,ffb"))
1037 ffb_init_one(node, root);
1038 for (node = prom_searchsiblings(child, "SUNW,afb"); node;
1039 node = prom_searchsiblings(prom_getsibling(node), "SUNW,afb"))
1040 ffb_init_one(node, root);
1041} 1000}
1042 1001
1043int __init ffb_init(void) 1002static int __devexit ffb_remove(struct of_device *dev)
1044{ 1003{
1045 int root; 1004 struct all_info *all = dev_get_drvdata(&dev->dev);
1046 1005
1047 if (fb_get_options("ffb", NULL)) 1006 unregister_framebuffer(&all->info);
1048 return -ENODEV; 1007 fb_dealloc_cmap(&all->info.cmap);
1049 1008
1050 ffb_scan_siblings(prom_root_node); 1009 of_iounmap(all->par.fbc, sizeof(struct ffb_fbc));
1010 of_iounmap(all->par.dac, sizeof(struct ffb_dac));
1051 1011
1052 root = prom_getchild(prom_root_node); 1012 kfree(all);
1053 for (root = prom_searchsiblings(root, "upa"); root; 1013
1054 root = prom_searchsiblings(prom_getsibling(root), "upa")) 1014 dev_set_drvdata(&dev->dev, NULL);
1055 ffb_scan_siblings(root);
1056 1015
1057 return 0; 1016 return 0;
1058} 1017}
1059 1018
1060void __exit ffb_exit(void) 1019static struct of_device_id ffb_match[] = {
1061{ 1020 {
1062 struct list_head *pos, *tmp; 1021 .name = "SUNW,ffb",
1022 },
1023 {
1024 .name = "SUNW,afb",
1025 },
1026 {},
1027};
1028MODULE_DEVICE_TABLE(of, ffb_match);
1029
1030static struct of_platform_driver ffb_driver = {
1031 .name = "ffb",
1032 .match_table = ffb_match,
1033 .probe = ffb_probe,
1034 .remove = __devexit_p(ffb_remove),
1035};
1063 1036
1064 list_for_each_safe(pos, tmp, &ffb_list) { 1037int __init ffb_init(void)
1065 struct all_info *all = list_entry(pos, typeof(*all), list); 1038{
1039 if (fb_get_options("ffb", NULL))
1040 return -ENODEV;
1066 1041
1067 unregister_framebuffer(&all->info); 1042 return of_register_driver(&ffb_driver, &of_bus_type);
1068 fb_dealloc_cmap(&all->info.cmap);
1069 kfree(all);
1070 }
1071} 1043}
1072 1044
1073int __init 1045void __exit ffb_exit(void)
1074ffb_setup(char *arg)
1075{ 1046{
1076 /* No cmdline options yet... */ 1047 of_unregister_driver(&ffb_driver);
1077 return 0;
1078} 1048}
1079 1049
1080module_init(ffb_init); 1050module_init(ffb_init);
1081
1082#ifdef MODULE
1083module_exit(ffb_exit); 1051module_exit(ffb_exit);
1084#endif
1085 1052
1086MODULE_DESCRIPTION("framebuffer driver for Creator/Elite3D chipsets"); 1053MODULE_DESCRIPTION("framebuffer driver for Creator/Elite3D chipsets");
1087MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 1054MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
1055MODULE_VERSION("2.0");
1088MODULE_LICENSE("GPL"); 1056MODULE_LICENSE("GPL");
diff --git a/drivers/video/imacfb.c b/drivers/video/imacfb.c
index 7b1c168c83..cdbae173d6 100644
--- a/drivers/video/imacfb.c
+++ b/drivers/video/imacfb.c
@@ -207,10 +207,6 @@ static int __init imacfb_probe(struct platform_device *dev)
207 size_remap = size_total; 207 size_remap = size_total;
208 imacfb_fix.smem_len = size_remap; 208 imacfb_fix.smem_len = size_remap;
209 209
210#ifndef __i386__
211 screen_info.imacpm_seg = 0;
212#endif
213
214 if (!request_mem_region(imacfb_fix.smem_start, size_total, "imacfb")) { 210 if (!request_mem_region(imacfb_fix.smem_start, size_total, "imacfb")) {
215 printk(KERN_WARNING 211 printk(KERN_WARNING
216 "imacfb: cannot reserve video memory at 0x%lx\n", 212 "imacfb: cannot reserve video memory at 0x%lx\n",
diff --git a/drivers/video/leo.c b/drivers/video/leo.c
index a23cfdb9d8..f3a24338d9 100644
--- a/drivers/video/leo.c
+++ b/drivers/video/leo.c
@@ -1,6 +1,6 @@
1/* leo.c: LEO frame buffer driver 1/* leo.c: LEO frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996-1999 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996-1999 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1997 Michal Rehacek (Michal.Rehacek@st.mff.cuni.cz) 5 * Copyright (C) 1997 Michal Rehacek (Michal.Rehacek@st.mff.cuni.cz)
6 * 6 *
@@ -18,8 +18,8 @@
18#include <linux/mm.h> 18#include <linux/mm.h>
19 19
20#include <asm/io.h> 20#include <asm/io.h>
21#include <asm/sbus.h> 21#include <asm/prom.h>
22#include <asm/oplib.h> 22#include <asm/of_device.h>
23#include <asm/fbio.h> 23#include <asm/fbio.h>
24 24
25#include "sbuslib.h" 25#include "sbuslib.h"
@@ -80,10 +80,10 @@ static struct fb_ops leo_ops = {
80 80
81struct leo_cursor { 81struct leo_cursor {
82 u8 xxx0[16]; 82 u8 xxx0[16];
83 volatile u32 cur_type; 83 u32 cur_type;
84 volatile u32 cur_misc; 84 u32 cur_misc;
85 volatile u32 cur_cursxy; 85 u32 cur_cursxy;
86 volatile u32 cur_data; 86 u32 cur_data;
87}; 87};
88 88
89#define LEO_KRN_TYPE_CLUT0 0x00001000 89#define LEO_KRN_TYPE_CLUT0 0x00001000
@@ -99,27 +99,27 @@ struct leo_cursor {
99#define LEO_KRN_CSR_UNK2 0x00000001 99#define LEO_KRN_CSR_UNK2 0x00000001
100 100
101struct leo_lx_krn { 101struct leo_lx_krn {
102 volatile u32 krn_type; 102 u32 krn_type;
103 volatile u32 krn_csr; 103 u32 krn_csr;
104 volatile u32 krn_value; 104 u32 krn_value;
105}; 105};
106 106
107struct leo_lc_ss0_krn { 107struct leo_lc_ss0_krn {
108 volatile u32 misc; 108 u32 misc;
109 u8 xxx0[0x800-4]; 109 u8 xxx0[0x800-4];
110 volatile u32 rev; 110 u32 rev;
111}; 111};
112 112
113struct leo_lc_ss0_usr { 113struct leo_lc_ss0_usr {
114 volatile u32 csr; 114 u32 csr;
115 volatile u32 addrspace; 115 u32 addrspace;
116 volatile u32 fontmsk; 116 u32 fontmsk;
117 volatile u32 fontt; 117 u32 fontt;
118 volatile u32 extent; 118 u32 extent;
119 volatile u32 src; 119 u32 src;
120 u32 dst; 120 u32 dst;
121 volatile u32 copy; 121 u32 copy;
122 volatile u32 fill; 122 u32 fill;
123}; 123};
124 124
125struct leo_lc_ss1_krn { 125struct leo_lc_ss1_krn {
@@ -132,47 +132,47 @@ struct leo_lc_ss1_usr {
132 132
133struct leo_ld { 133struct leo_ld {
134 u8 xxx0[0xe00]; 134 u8 xxx0[0xe00];
135 volatile u32 csr; 135 u32 csr;
136 volatile u32 wid; 136 u32 wid;
137 volatile u32 wmask; 137 u32 wmask;
138 volatile u32 widclip; 138 u32 widclip;
139 volatile u32 vclipmin; 139 u32 vclipmin;
140 volatile u32 vclipmax; 140 u32 vclipmax;
141 volatile u32 pickmin; /* SS1 only */ 141 u32 pickmin; /* SS1 only */
142 volatile u32 pickmax; /* SS1 only */ 142 u32 pickmax; /* SS1 only */
143 volatile u32 fg; 143 u32 fg;
144 volatile u32 bg; 144 u32 bg;
145 volatile u32 src; /* Copy/Scroll (SS0 only) */ 145 u32 src; /* Copy/Scroll (SS0 only) */
146 volatile u32 dst; /* Copy/Scroll/Fill (SS0 only) */ 146 u32 dst; /* Copy/Scroll/Fill (SS0 only) */
147 volatile u32 extent; /* Copy/Scroll/Fill size (SS0 only) */ 147 u32 extent; /* Copy/Scroll/Fill size (SS0 only) */
148 u32 xxx1[3]; 148 u32 xxx1[3];
149 volatile u32 setsem; /* SS1 only */ 149 u32 setsem; /* SS1 only */
150 volatile u32 clrsem; /* SS1 only */ 150 u32 clrsem; /* SS1 only */
151 volatile u32 clrpick; /* SS1 only */ 151 u32 clrpick; /* SS1 only */
152 volatile u32 clrdat; /* SS1 only */ 152 u32 clrdat; /* SS1 only */
153 volatile u32 alpha; /* SS1 only */ 153 u32 alpha; /* SS1 only */
154 u8 xxx2[0x2c]; 154 u8 xxx2[0x2c];
155 volatile u32 winbg; 155 u32 winbg;
156 volatile u32 planemask; 156 u32 planemask;
157 volatile u32 rop; 157 u32 rop;
158 volatile u32 z; 158 u32 z;
159 volatile u32 dczf; /* SS1 only */ 159 u32 dczf; /* SS1 only */
160 volatile u32 dczb; /* SS1 only */ 160 u32 dczb; /* SS1 only */
161 volatile u32 dcs; /* SS1 only */ 161 u32 dcs; /* SS1 only */
162 volatile u32 dczs; /* SS1 only */ 162 u32 dczs; /* SS1 only */
163 volatile u32 pickfb; /* SS1 only */ 163 u32 pickfb; /* SS1 only */
164 volatile u32 pickbb; /* SS1 only */ 164 u32 pickbb; /* SS1 only */
165 volatile u32 dcfc; /* SS1 only */ 165 u32 dcfc; /* SS1 only */
166 volatile u32 forcecol; /* SS1 only */ 166 u32 forcecol; /* SS1 only */
167 volatile u32 door[8]; /* SS1 only */ 167 u32 door[8]; /* SS1 only */
168 volatile u32 pick[5]; /* SS1 only */ 168 u32 pick[5]; /* SS1 only */
169}; 169};
170 170
171#define LEO_SS1_MISC_ENABLE 0x00000001 171#define LEO_SS1_MISC_ENABLE 0x00000001
172#define LEO_SS1_MISC_STEREO 0x00000002 172#define LEO_SS1_MISC_STEREO 0x00000002
173struct leo_ld_ss1 { 173struct leo_ld_ss1 {
174 u8 xxx0[0xef4]; 174 u8 xxx0[0xef4];
175 volatile u32 ss1_misc; 175 u32 ss1_misc;
176}; 176};
177 177
178struct leo_ld_gbl { 178struct leo_ld_gbl {
@@ -193,9 +193,8 @@ struct leo_par {
193#define LEO_FLAG_BLANKED 0x00000001 193#define LEO_FLAG_BLANKED 0x00000001
194 194
195 unsigned long physbase; 195 unsigned long physbase;
196 unsigned long which_io;
196 unsigned long fbsize; 197 unsigned long fbsize;
197
198 struct sbus_dev *sdev;
199}; 198};
200 199
201static void leo_wait(struct leo_lx_krn __iomem *lx_krn) 200static void leo_wait(struct leo_lx_krn __iomem *lx_krn)
@@ -368,8 +367,7 @@ static int leo_mmap(struct fb_info *info, struct vm_area_struct *vma)
368 367
369 return sbusfb_mmap_helper(leo_mmap_map, 368 return sbusfb_mmap_helper(leo_mmap_map,
370 par->physbase, par->fbsize, 369 par->physbase, par->fbsize,
371 par->sdev->reg_addrs[0].which_io, 370 par->which_io, vma);
372 vma);
373} 371}
374 372
375static int leo_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) 373static int leo_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
@@ -385,11 +383,9 @@ static int leo_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
385 */ 383 */
386 384
387static void 385static void
388leo_init_fix(struct fb_info *info) 386leo_init_fix(struct fb_info *info, struct device_node *dp)
389{ 387{
390 struct leo_par *par = (struct leo_par *)info->par; 388 strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
391
392 strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
393 389
394 info->fix.type = FB_TYPE_PACKED_PIXELS; 390 info->fix.type = FB_TYPE_PACKED_PIXELS;
395 info->fix.visual = FB_VISUAL_TRUECOLOR; 391 info->fix.visual = FB_VISUAL_TRUECOLOR;
@@ -532,60 +528,74 @@ static void leo_fixup_var_rgb(struct fb_var_screeninfo *var)
532struct all_info { 528struct all_info {
533 struct fb_info info; 529 struct fb_info info;
534 struct leo_par par; 530 struct leo_par par;
535 struct list_head list;
536}; 531};
537static LIST_HEAD(leo_list);
538 532
539static void leo_init_one(struct sbus_dev *sdev) 533static void leo_unmap_regs(struct all_info *all)
540{ 534{
541 struct all_info *all; 535 if (all->par.lc_ss0_usr)
542 int linebytes; 536 of_iounmap(all->par.lc_ss0_usr, 0x1000);
537 if (all->par.ld_ss0)
538 of_iounmap(all->par.ld_ss0, 0x1000);
539 if (all->par.ld_ss1)
540 of_iounmap(all->par.ld_ss1, 0x1000);
541 if (all->par.lx_krn)
542 of_iounmap(all->par.lx_krn, 0x1000);
543 if (all->par.cursor)
544 of_iounmap(all->par.cursor, sizeof(struct leo_cursor));
545 if (all->info.screen_base)
546 of_iounmap(all->info.screen_base, 0x800000);
547}
543 548
544 all = kmalloc(sizeof(*all), GFP_KERNEL); 549static int __devinit leo_init_one(struct of_device *op)
545 if (!all) { 550{
546 printk(KERN_ERR "leo: Cannot allocate memory.\n"); 551 struct device_node *dp = op->node;
547 return; 552 struct all_info *all;
548 } 553 int linebytes, err;
549 memset(all, 0, sizeof(*all));
550 554
551 INIT_LIST_HEAD(&all->list); 555 all = kzalloc(sizeof(*all), GFP_KERNEL);
556 if (!all)
557 return -ENOMEM;
552 558
553 spin_lock_init(&all->par.lock); 559 spin_lock_init(&all->par.lock);
554 all->par.sdev = sdev;
555 560
556 all->par.physbase = sdev->reg_addrs[0].phys_addr; 561 all->par.physbase = op->resource[0].start;
562 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
557 563
558 sbusfb_fill_var(&all->info.var, sdev->prom_node, 32); 564 sbusfb_fill_var(&all->info.var, dp->node, 32);
559 leo_fixup_var_rgb(&all->info.var); 565 leo_fixup_var_rgb(&all->info.var);
560 566
561 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 567 linebytes = of_getintprop_default(dp, "linebytes",
562 all->info.var.xres); 568 all->info.var.xres);
563 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 569 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
564 570
565#ifdef CONFIG_SPARC32
566 all->info.screen_base = (char __iomem *)
567 prom_getintdefault(sdev->prom_node, "address", 0);
568#endif
569 if (!all->info.screen_base)
570 all->info.screen_base =
571 sbus_ioremap(&sdev->resource[0], LEO_OFF_SS0,
572 0x800000, "leo ram");
573
574 all->par.lc_ss0_usr = 571 all->par.lc_ss0_usr =
575 sbus_ioremap(&sdev->resource[0], LEO_OFF_LC_SS0_USR, 572 of_ioremap(&op->resource[0], LEO_OFF_LC_SS0_USR,
576 0x1000, "leolc ss0usr"); 573 0x1000, "leolc ss0usr");
577 all->par.ld_ss0 = 574 all->par.ld_ss0 =
578 sbus_ioremap(&sdev->resource[0], LEO_OFF_LD_SS0, 575 of_ioremap(&op->resource[0], LEO_OFF_LD_SS0,
579 0x1000, "leold ss0"); 576 0x1000, "leold ss0");
580 all->par.ld_ss1 = 577 all->par.ld_ss1 =
581 sbus_ioremap(&sdev->resource[0], LEO_OFF_LD_SS1, 578 of_ioremap(&op->resource[0], LEO_OFF_LD_SS1,
582 0x1000, "leold ss1"); 579 0x1000, "leold ss1");
583 all->par.lx_krn = 580 all->par.lx_krn =
584 sbus_ioremap(&sdev->resource[0], LEO_OFF_LX_KRN, 581 of_ioremap(&op->resource[0], LEO_OFF_LX_KRN,
585 0x1000, "leolx krn"); 582 0x1000, "leolx krn");
586 all->par.cursor = 583 all->par.cursor =
587 sbus_ioremap(&sdev->resource[0], LEO_OFF_LX_CURSOR, 584 of_ioremap(&op->resource[0], LEO_OFF_LX_CURSOR,
588 sizeof(struct leo_cursor), "leolx cursor"); 585 sizeof(struct leo_cursor), "leolx cursor");
586 all->info.screen_base =
587 of_ioremap(&op->resource[0], LEO_OFF_SS0,
588 0x800000, "leo ram");
589 if (!all->par.lc_ss0_usr ||
590 !all->par.ld_ss0 ||
591 !all->par.ld_ss1 ||
592 !all->par.lx_krn ||
593 !all->par.cursor ||
594 !all->info.screen_base) {
595 leo_unmap_regs(all);
596 kfree(all);
597 return -ENOMEM;
598 }
589 599
590 all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; 600 all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
591 all->info.fbops = &leo_ops; 601 all->info.fbops = &leo_ops;
@@ -597,69 +607,85 @@ static void leo_init_one(struct sbus_dev *sdev)
597 leo_blank(0, &all->info); 607 leo_blank(0, &all->info);
598 608
599 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 609 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
600 printk(KERN_ERR "leo: Could not allocate color map.\n"); 610 leo_unmap_regs(all);
601 kfree(all); 611 kfree(all);
602 return; 612 return -ENOMEM;;
603 } 613 }
604 614
605 leo_init_fix(&all->info); 615 leo_init_fix(&all->info, dp);
606 616
607 if (register_framebuffer(&all->info) < 0) { 617 err = register_framebuffer(&all->info);
608 printk(KERN_ERR "leo: Could not register framebuffer.\n"); 618 if (err < 0) {
609 fb_dealloc_cmap(&all->info.cmap); 619 fb_dealloc_cmap(&all->info.cmap);
620 leo_unmap_regs(all);
610 kfree(all); 621 kfree(all);
611 return; 622 return err;
612 } 623 }
613 624
614 list_add(&all->list, &leo_list); 625 dev_set_drvdata(&op->dev, all);
626
627 printk("%s: leo at %lx:%lx\n",
628 dp->full_name,
629 all->par.which_io, all->par.physbase);
615 630
616 printk("leo: %s at %lx:%lx\n", 631 return 0;
617 sdev->prom_name,
618 (long) sdev->reg_addrs[0].which_io,
619 (long) sdev->reg_addrs[0].phys_addr);
620} 632}
621 633
622int __init leo_init(void) 634static int __devinit leo_probe(struct of_device *dev, const struct of_device_id *match)
623{ 635{
624 struct sbus_bus *sbus; 636 struct of_device *op = to_of_device(&dev->dev);
625 struct sbus_dev *sdev;
626 637
627 if (fb_get_options("leofb", NULL)) 638 return leo_init_one(op);
628 return -ENODEV; 639}
629 640
630 for_all_sbusdev(sdev, sbus) { 641static int __devexit leo_remove(struct of_device *dev)
631 if (!strcmp(sdev->prom_name, "leo")) 642{
632 leo_init_one(sdev); 643 struct all_info *all = dev_get_drvdata(&dev->dev);
633 } 644
645 unregister_framebuffer(&all->info);
646 fb_dealloc_cmap(&all->info.cmap);
647
648 leo_unmap_regs(all);
649
650 kfree(all);
651
652 dev_set_drvdata(&dev->dev, NULL);
634 653
635 return 0; 654 return 0;
636} 655}
637 656
638void __exit leo_exit(void) 657static struct of_device_id leo_match[] = {
639{ 658 {
640 struct list_head *pos, *tmp; 659 .name = "leo",
660 },
661 {},
662};
663MODULE_DEVICE_TABLE(of, leo_match);
664
665static struct of_platform_driver leo_driver = {
666 .name = "leo",
667 .match_table = leo_match,
668 .probe = leo_probe,
669 .remove = __devexit_p(leo_remove),
670};
641 671
642 list_for_each_safe(pos, tmp, &leo_list) { 672static int __init leo_init(void)
643 struct all_info *all = list_entry(pos, typeof(*all), list); 673{
674 if (fb_get_options("leofb", NULL))
675 return -ENODEV;
644 676
645 unregister_framebuffer(&all->info); 677 return of_register_driver(&leo_driver, &of_bus_type);
646 fb_dealloc_cmap(&all->info.cmap);
647 kfree(all);
648 }
649} 678}
650 679
651int __init 680static void __exit leo_exit(void)
652leo_setup(char *arg)
653{ 681{
654 /* No cmdline options yet... */ 682 of_unregister_driver(&leo_driver);
655 return 0;
656} 683}
657 684
658module_init(leo_init); 685module_init(leo_init);
659#ifdef MODULE
660module_exit(leo_exit); 686module_exit(leo_exit);
661#endif
662 687
663MODULE_DESCRIPTION("framebuffer driver for LEO chipsets"); 688MODULE_DESCRIPTION("framebuffer driver for LEO chipsets");
664MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 689MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
690MODULE_VERSION("2.0");
665MODULE_LICENSE("GPL"); 691MODULE_LICENSE("GPL");
diff --git a/drivers/video/p9100.c b/drivers/video/p9100.c
index 0d19575053..56ac51d6a7 100644
--- a/drivers/video/p9100.c
+++ b/drivers/video/p9100.c
@@ -1,6 +1,6 @@
1/* p9100.c: P9100 frame buffer driver 1/* p9100.c: P9100 frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright 1999 Derrick J Brashear (shadow@dementia.org) 4 * Copyright 1999 Derrick J Brashear (shadow@dementia.org)
5 * 5 *
6 * Driver layout based loosely on tgafb.c, see that file for credits. 6 * Driver layout based loosely on tgafb.c, see that file for credits.
@@ -17,8 +17,8 @@
17#include <linux/mm.h> 17#include <linux/mm.h>
18 18
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/sbus.h> 20#include <asm/prom.h>
21#include <asm/oplib.h> 21#include <asm/of_device.h>
22#include <asm/fbio.h> 22#include <asm/fbio.h>
23 23
24#include "sbuslib.h" 24#include "sbuslib.h"
@@ -72,60 +72,60 @@ static struct fb_ops p9100_ops = {
72 72
73struct p9100_regs { 73struct p9100_regs {
74 /* Registers for the system control */ 74 /* Registers for the system control */
75 volatile u32 sys_base; 75 u32 sys_base;
76 volatile u32 sys_config; 76 u32 sys_config;
77 volatile u32 sys_intr; 77 u32 sys_intr;
78 volatile u32 sys_int_ena; 78 u32 sys_int_ena;
79 volatile u32 sys_alt_rd; 79 u32 sys_alt_rd;
80 volatile u32 sys_alt_wr; 80 u32 sys_alt_wr;
81 volatile u32 sys_xxx[58]; 81 u32 sys_xxx[58];
82 82
83 /* Registers for the video control */ 83 /* Registers for the video control */
84 volatile u32 vid_base; 84 u32 vid_base;
85 volatile u32 vid_hcnt; 85 u32 vid_hcnt;
86 volatile u32 vid_htotal; 86 u32 vid_htotal;
87 volatile u32 vid_hsync_rise; 87 u32 vid_hsync_rise;
88 volatile u32 vid_hblank_rise; 88 u32 vid_hblank_rise;
89 volatile u32 vid_hblank_fall; 89 u32 vid_hblank_fall;
90 volatile u32 vid_hcnt_preload; 90 u32 vid_hcnt_preload;
91 volatile u32 vid_vcnt; 91 u32 vid_vcnt;
92 volatile u32 vid_vlen; 92 u32 vid_vlen;
93 volatile u32 vid_vsync_rise; 93 u32 vid_vsync_rise;
94 volatile u32 vid_vblank_rise; 94 u32 vid_vblank_rise;
95 volatile u32 vid_vblank_fall; 95 u32 vid_vblank_fall;
96 volatile u32 vid_vcnt_preload; 96 u32 vid_vcnt_preload;
97 volatile u32 vid_screenpaint_addr; 97 u32 vid_screenpaint_addr;
98 volatile u32 vid_screenpaint_timectl1; 98 u32 vid_screenpaint_timectl1;
99 volatile u32 vid_screenpaint_qsfcnt; 99 u32 vid_screenpaint_qsfcnt;
100 volatile u32 vid_screenpaint_timectl2; 100 u32 vid_screenpaint_timectl2;
101 volatile u32 vid_xxx[15]; 101 u32 vid_xxx[15];
102 102
103 /* Registers for the video control */ 103 /* Registers for the video control */
104 volatile u32 vram_base; 104 u32 vram_base;
105 volatile u32 vram_memcfg; 105 u32 vram_memcfg;
106 volatile u32 vram_refresh_pd; 106 u32 vram_refresh_pd;
107 volatile u32 vram_refresh_cnt; 107 u32 vram_refresh_cnt;
108 volatile u32 vram_raslo_max; 108 u32 vram_raslo_max;
109 volatile u32 vram_raslo_cur; 109 u32 vram_raslo_cur;
110 volatile u32 pwrup_cfg; 110 u32 pwrup_cfg;
111 volatile u32 vram_xxx[25]; 111 u32 vram_xxx[25];
112 112
113 /* Registers for IBM RGB528 Palette */ 113 /* Registers for IBM RGB528 Palette */
114 volatile u32 ramdac_cmap_wridx; 114 u32 ramdac_cmap_wridx;
115 volatile u32 ramdac_palette_data; 115 u32 ramdac_palette_data;
116 volatile u32 ramdac_pixel_mask; 116 u32 ramdac_pixel_mask;
117 volatile u32 ramdac_palette_rdaddr; 117 u32 ramdac_palette_rdaddr;
118 volatile u32 ramdac_idx_lo; 118 u32 ramdac_idx_lo;
119 volatile u32 ramdac_idx_hi; 119 u32 ramdac_idx_hi;
120 volatile u32 ramdac_idx_data; 120 u32 ramdac_idx_data;
121 volatile u32 ramdac_idx_ctl; 121 u32 ramdac_idx_ctl;
122 volatile u32 ramdac_xxx[1784]; 122 u32 ramdac_xxx[1784];
123}; 123};
124 124
125struct p9100_cmd_parameng { 125struct p9100_cmd_parameng {
126 volatile u32 parameng_status; 126 u32 parameng_status;
127 volatile u32 parameng_bltcmd; 127 u32 parameng_bltcmd;
128 volatile u32 parameng_quadcmd; 128 u32 parameng_quadcmd;
129}; 129};
130 130
131struct p9100_par { 131struct p9100_par {
@@ -136,9 +136,8 @@ struct p9100_par {
136#define P9100_FLAG_BLANKED 0x00000001 136#define P9100_FLAG_BLANKED 0x00000001
137 137
138 unsigned long physbase; 138 unsigned long physbase;
139 unsigned long which_io;
139 unsigned long fbsize; 140 unsigned long fbsize;
140
141 struct sbus_dev *sdev;
142}; 141};
143 142
144/** 143/**
@@ -227,8 +226,7 @@ static int p9100_mmap(struct fb_info *info, struct vm_area_struct *vma)
227 226
228 return sbusfb_mmap_helper(p9100_mmap_map, 227 return sbusfb_mmap_helper(p9100_mmap_map,
229 par->physbase, par->fbsize, 228 par->physbase, par->fbsize,
230 par->sdev->reg_addrs[0].which_io, 229 par->which_io, vma);
231 vma);
232} 230}
233 231
234static int p9100_ioctl(struct fb_info *info, unsigned int cmd, 232static int p9100_ioctl(struct fb_info *info, unsigned int cmd,
@@ -245,12 +243,9 @@ static int p9100_ioctl(struct fb_info *info, unsigned int cmd,
245 * Initialisation 243 * Initialisation
246 */ 244 */
247 245
248static void 246static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_node *dp)
249p9100_init_fix(struct fb_info *info, int linebytes)
250{ 247{
251 struct p9100_par *par = (struct p9100_par *)info->par; 248 strlcpy(info->fix.id, dp->name, sizeof(info->fix.id));
252
253 strlcpy(info->fix.id, par->sdev->prom_name, sizeof(info->fix.id));
254 249
255 info->fix.type = FB_TYPE_PACKED_PIXELS; 250 info->fix.type = FB_TYPE_PACKED_PIXELS;
256 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 251 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
@@ -263,121 +258,137 @@ p9100_init_fix(struct fb_info *info, int linebytes)
263struct all_info { 258struct all_info {
264 struct fb_info info; 259 struct fb_info info;
265 struct p9100_par par; 260 struct p9100_par par;
266 struct list_head list;
267}; 261};
268static LIST_HEAD(p9100_list);
269 262
270static void p9100_init_one(struct sbus_dev *sdev) 263static int __devinit p9100_init_one(struct of_device *op)
271{ 264{
265 struct device_node *dp = op->node;
272 struct all_info *all; 266 struct all_info *all;
273 int linebytes; 267 int linebytes, err;
274
275 all = kmalloc(sizeof(*all), GFP_KERNEL);
276 if (!all) {
277 printk(KERN_ERR "p9100: Cannot allocate memory.\n");
278 return;
279 }
280 memset(all, 0, sizeof(*all));
281 268
282 INIT_LIST_HEAD(&all->list); 269 all = kzalloc(sizeof(*all), GFP_KERNEL);
270 if (!all)
271 return -ENOMEM;
283 272
284 spin_lock_init(&all->par.lock); 273 spin_lock_init(&all->par.lock);
285 all->par.sdev = sdev;
286 274
287 /* This is the framebuffer and the only resource apps can mmap. */ 275 /* This is the framebuffer and the only resource apps can mmap. */
288 all->par.physbase = sdev->reg_addrs[2].phys_addr; 276 all->par.physbase = op->resource[2].start;
277 all->par.which_io = op->resource[2].flags & IORESOURCE_BITS;
289 278
290 sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); 279 sbusfb_fill_var(&all->info.var, dp->node, 8);
291 all->info.var.red.length = 8; 280 all->info.var.red.length = 8;
292 all->info.var.green.length = 8; 281 all->info.var.green.length = 8;
293 all->info.var.blue.length = 8; 282 all->info.var.blue.length = 8;
294 283
295 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 284 linebytes = of_getintprop_default(dp, "linebytes",
296 all->info.var.xres); 285 all->info.var.xres);
297 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 286 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
298 287
299 all->par.regs = sbus_ioremap(&sdev->resource[0], 0, 288 all->par.regs = of_ioremap(&op->resource[0], 0,
300 sizeof(struct p9100_regs), "p9100 regs"); 289 sizeof(struct p9100_regs), "p9100 regs");
290 if (!all->par.regs) {
291 kfree(all);
292 return -ENOMEM;
293 }
301 294
302 all->info.flags = FBINFO_DEFAULT; 295 all->info.flags = FBINFO_DEFAULT;
303 all->info.fbops = &p9100_ops; 296 all->info.fbops = &p9100_ops;
304#ifdef CONFIG_SPARC32 297 all->info.screen_base = of_ioremap(&op->resource[2], 0,
305 all->info.screen_base = (char __iomem *) 298 all->par.fbsize, "p9100 ram");
306 prom_getintdefault(sdev->prom_node, "address", 0); 299 if (!all->info.screen_base) {
307#endif 300 of_iounmap(all->par.regs, sizeof(struct p9100_regs));
308 if (!all->info.screen_base) 301 kfree(all);
309 all->info.screen_base = sbus_ioremap(&sdev->resource[2], 0, 302 return -ENOMEM;
310 all->par.fbsize, "p9100 ram"); 303 }
311 all->info.par = &all->par; 304 all->info.par = &all->par;
312 305
313 p9100_blank(0, &all->info); 306 p9100_blank(0, &all->info);
314 307
315 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 308 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
316 printk(KERN_ERR "p9100: Could not allocate color map.\n"); 309 of_iounmap(all->par.regs, sizeof(struct p9100_regs));
310 of_iounmap(all->info.screen_base, all->par.fbsize);
317 kfree(all); 311 kfree(all);
318 return; 312 return -ENOMEM;
319 } 313 }
320 314
321 p9100_init_fix(&all->info, linebytes); 315 p9100_init_fix(&all->info, linebytes, dp);
322 316
323 if (register_framebuffer(&all->info) < 0) { 317 err = register_framebuffer(&all->info);
324 printk(KERN_ERR "p9100: Could not register framebuffer.\n"); 318 if (err < 0) {
325 fb_dealloc_cmap(&all->info.cmap); 319 fb_dealloc_cmap(&all->info.cmap);
320 of_iounmap(all->par.regs, sizeof(struct p9100_regs));
321 of_iounmap(all->info.screen_base, all->par.fbsize);
326 kfree(all); 322 kfree(all);
327 return; 323 return err;
328 } 324 }
329 fb_set_cmap(&all->info.cmap, &all->info); 325 fb_set_cmap(&all->info.cmap, &all->info);
330 326
331 list_add(&all->list, &p9100_list); 327 dev_set_drvdata(&op->dev, all);
328
329 printk("%s: p9100 at %lx:%lx\n",
330 dp->full_name,
331 all->par.which_io, all->par.physbase);
332 332
333 printk("p9100: %s at %lx:%lx\n", 333 return 0;
334 sdev->prom_name,
335 (long) sdev->reg_addrs[0].which_io,
336 (long) sdev->reg_addrs[0].phys_addr);
337} 334}
338 335
339int __init p9100_init(void) 336static int __devinit p9100_probe(struct of_device *dev, const struct of_device_id *match)
340{ 337{
341 struct sbus_bus *sbus; 338 struct of_device *op = to_of_device(&dev->dev);
342 struct sbus_dev *sdev;
343 339
344 if (fb_get_options("p9100fb", NULL)) 340 return p9100_init_one(op);
345 return -ENODEV; 341}
346 342
347 for_all_sbusdev(sdev, sbus) { 343static int __devexit p9100_remove(struct of_device *dev)
348 if (!strcmp(sdev->prom_name, "p9100")) 344{
349 p9100_init_one(sdev); 345 struct all_info *all = dev_get_drvdata(&dev->dev);
350 } 346
347 unregister_framebuffer(&all->info);
348 fb_dealloc_cmap(&all->info.cmap);
349
350 of_iounmap(all->par.regs, sizeof(struct p9100_regs));
351 of_iounmap(all->info.screen_base, all->par.fbsize);
352
353 kfree(all);
354
355 dev_set_drvdata(&dev->dev, NULL);
351 356
352 return 0; 357 return 0;
353} 358}
354 359
355void __exit p9100_exit(void) 360static struct of_device_id p9100_match[] = {
356{ 361 {
357 struct list_head *pos, *tmp; 362 .name = "p9100",
363 },
364 {},
365};
366MODULE_DEVICE_TABLE(of, p9100_match);
358 367
359 list_for_each_safe(pos, tmp, &p9100_list) { 368static struct of_platform_driver p9100_driver = {
360 struct all_info *all = list_entry(pos, typeof(*all), list); 369 .name = "p9100",
370 .match_table = p9100_match,
371 .probe = p9100_probe,
372 .remove = __devexit_p(p9100_remove),
373};
361 374
362 unregister_framebuffer(&all->info); 375static int __init p9100_init(void)
363 fb_dealloc_cmap(&all->info.cmap); 376{
364 kfree(all); 377 if (fb_get_options("p9100fb", NULL))
365 } 378 return -ENODEV;
379
380 return of_register_driver(&p9100_driver, &of_bus_type);
366} 381}
367 382
368int __init 383static void __exit p9100_exit(void)
369p9100_setup(char *arg)
370{ 384{
371 /* No cmdline options yet... */ 385 of_unregister_driver(&p9100_driver);
372 return 0;
373} 386}
374 387
375module_init(p9100_init); 388module_init(p9100_init);
376
377#ifdef MODULE
378module_exit(p9100_exit); 389module_exit(p9100_exit);
379#endif
380 390
381MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets"); 391MODULE_DESCRIPTION("framebuffer driver for P9100 chipsets");
382MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 392MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
393MODULE_VERSION("2.0");
383MODULE_LICENSE("GPL"); 394MODULE_LICENSE("GPL");
diff --git a/drivers/video/tcx.c b/drivers/video/tcx.c
index 95b918229d..6990ab11cd 100644
--- a/drivers/video/tcx.c
+++ b/drivers/video/tcx.c
@@ -1,6 +1,6 @@
1/* tcx.c: TCX frame buffer driver 1/* tcx.c: TCX frame buffer driver
2 * 2 *
3 * Copyright (C) 2003 David S. Miller (davem@redhat.com) 3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be) 6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
@@ -19,8 +19,8 @@
19#include <linux/mm.h> 19#include <linux/mm.h>
20 20
21#include <asm/io.h> 21#include <asm/io.h>
22#include <asm/sbus.h> 22#include <asm/prom.h>
23#include <asm/oplib.h> 23#include <asm/of_device.h>
24#include <asm/fbio.h> 24#include <asm/fbio.h>
25 25
26#include "sbuslib.h" 26#include "sbuslib.h"
@@ -77,32 +77,32 @@ static struct fb_ops tcx_ops = {
77 77
78/* The contents are unknown */ 78/* The contents are unknown */
79struct tcx_tec { 79struct tcx_tec {
80 volatile u32 tec_matrix; 80 u32 tec_matrix;
81 volatile u32 tec_clip; 81 u32 tec_clip;
82 volatile u32 tec_vdc; 82 u32 tec_vdc;
83}; 83};
84 84
85struct tcx_thc { 85struct tcx_thc {
86 volatile u32 thc_rev; 86 u32 thc_rev;
87 u32 thc_pad0[511]; 87 u32 thc_pad0[511];
88 volatile u32 thc_hs; /* hsync timing */ 88 u32 thc_hs; /* hsync timing */
89 volatile u32 thc_hsdvs; 89 u32 thc_hsdvs;
90 volatile u32 thc_hd; 90 u32 thc_hd;
91 volatile u32 thc_vs; /* vsync timing */ 91 u32 thc_vs; /* vsync timing */
92 volatile u32 thc_vd; 92 u32 thc_vd;
93 volatile u32 thc_refresh; 93 u32 thc_refresh;
94 volatile u32 thc_misc; 94 u32 thc_misc;
95 u32 thc_pad1[56]; 95 u32 thc_pad1[56];
96 volatile u32 thc_cursxy; /* cursor x,y position (16 bits each) */ 96 u32 thc_cursxy; /* cursor x,y position (16 bits each) */
97 volatile u32 thc_cursmask[32]; /* cursor mask bits */ 97 u32 thc_cursmask[32]; /* cursor mask bits */
98 volatile u32 thc_cursbits[32]; /* what to show where mask enabled */ 98 u32 thc_cursbits[32]; /* what to show where mask enabled */
99}; 99};
100 100
101struct bt_regs { 101struct bt_regs {
102 volatile u32 addr; 102 u32 addr;
103 volatile u32 color_map; 103 u32 color_map;
104 volatile u32 control; 104 u32 control;
105 volatile u32 cursor; 105 u32 cursor;
106}; 106};
107 107
108#define TCX_MMAP_ENTRIES 14 108#define TCX_MMAP_ENTRIES 14
@@ -112,24 +112,23 @@ struct tcx_par {
112 struct bt_regs __iomem *bt; 112 struct bt_regs __iomem *bt;
113 struct tcx_thc __iomem *thc; 113 struct tcx_thc __iomem *thc;
114 struct tcx_tec __iomem *tec; 114 struct tcx_tec __iomem *tec;
115 volatile u32 __iomem *cplane; 115 u32 __iomem *cplane;
116 116
117 u32 flags; 117 u32 flags;
118#define TCX_FLAG_BLANKED 0x00000001 118#define TCX_FLAG_BLANKED 0x00000001
119 119
120 unsigned long physbase; 120 unsigned long physbase;
121 unsigned long which_io;
121 unsigned long fbsize; 122 unsigned long fbsize;
122 123
123 struct sbus_mmap_map mmap_map[TCX_MMAP_ENTRIES]; 124 struct sbus_mmap_map mmap_map[TCX_MMAP_ENTRIES];
124 int lowdepth; 125 int lowdepth;
125
126 struct sbus_dev *sdev;
127}; 126};
128 127
129/* Reset control plane so that WID is 8-bit plane. */ 128/* Reset control plane so that WID is 8-bit plane. */
130static void __tcx_set_control_plane (struct tcx_par *par) 129static void __tcx_set_control_plane (struct tcx_par *par)
131{ 130{
132 volatile u32 __iomem *p, *pend; 131 u32 __iomem *p, *pend;
133 132
134 if (par->lowdepth) 133 if (par->lowdepth)
135 return; 134 return;
@@ -307,8 +306,7 @@ static int tcx_mmap(struct fb_info *info, struct vm_area_struct *vma)
307 306
308 return sbusfb_mmap_helper(par->mmap_map, 307 return sbusfb_mmap_helper(par->mmap_map,
309 par->physbase, par->fbsize, 308 par->physbase, par->fbsize,
310 par->sdev->reg_addrs[0].which_io, 309 par->which_io, vma);
311 vma);
312} 310}
313 311
314static int tcx_ioctl(struct fb_info *info, unsigned int cmd, 312static int tcx_ioctl(struct fb_info *info, unsigned int cmd,
@@ -350,48 +348,71 @@ tcx_init_fix(struct fb_info *info, int linebytes)
350struct all_info { 348struct all_info {
351 struct fb_info info; 349 struct fb_info info;
352 struct tcx_par par; 350 struct tcx_par par;
353 struct list_head list;
354}; 351};
355static LIST_HEAD(tcx_list);
356 352
357static void tcx_init_one(struct sbus_dev *sdev) 353static void tcx_unmap_regs(struct all_info *all)
358{ 354{
359 struct all_info *all; 355 if (all->par.tec)
360 int linebytes, i; 356 of_iounmap(all->par.tec, sizeof(struct tcx_tec));
357 if (all->par.thc)
358 of_iounmap(all->par.thc, sizeof(struct tcx_thc));
359 if (all->par.bt)
360 of_iounmap(all->par.bt, sizeof(struct bt_regs));
361 if (all->par.cplane)
362 of_iounmap(all->par.cplane, all->par.fbsize * sizeof(u32));
363 if (all->info.screen_base)
364 of_iounmap(all->info.screen_base, all->par.fbsize);
365}
361 366
362 all = kmalloc(sizeof(*all), GFP_KERNEL); 367static int __devinit tcx_init_one(struct of_device *op)
363 if (!all) { 368{
364 printk(KERN_ERR "tcx: Cannot allocate memory.\n"); 369 struct device_node *dp = op->node;
365 return; 370 struct all_info *all;
366 } 371 int linebytes, i, err;
367 memset(all, 0, sizeof(*all));
368 372
369 INIT_LIST_HEAD(&all->list); 373 all = kzalloc(sizeof(*all), GFP_KERNEL);
374 if (!all)
375 return -ENOMEM;
370 376
371 spin_lock_init(&all->par.lock); 377 spin_lock_init(&all->par.lock);
372 all->par.sdev = sdev;
373 378
374 all->par.lowdepth = prom_getbool(sdev->prom_node, "tcx-8-bit"); 379 all->par.lowdepth =
380 (of_find_property(dp, "tcx-8-bit", NULL) != NULL);
375 381
376 sbusfb_fill_var(&all->info.var, sdev->prom_node, 8); 382 sbusfb_fill_var(&all->info.var, dp->node, 8);
377 all->info.var.red.length = 8; 383 all->info.var.red.length = 8;
378 all->info.var.green.length = 8; 384 all->info.var.green.length = 8;
379 all->info.var.blue.length = 8; 385 all->info.var.blue.length = 8;
380 386
381 linebytes = prom_getintdefault(sdev->prom_node, "linebytes", 387 linebytes = of_getintprop_default(dp, "linebytes",
382 all->info.var.xres); 388 all->info.var.xres);
383 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres); 389 all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
384 390
385 all->par.tec = sbus_ioremap(&sdev->resource[7], 0, 391 all->par.tec = of_ioremap(&op->resource[7], 0,
386 sizeof(struct tcx_tec), "tcx tec"); 392 sizeof(struct tcx_tec), "tcx tec");
387 all->par.thc = sbus_ioremap(&sdev->resource[9], 0, 393 all->par.thc = of_ioremap(&op->resource[9], 0,
388 sizeof(struct tcx_thc), "tcx thc"); 394 sizeof(struct tcx_thc), "tcx thc");
389 all->par.bt = sbus_ioremap(&sdev->resource[8], 0, 395 all->par.bt = of_ioremap(&op->resource[8], 0,
390 sizeof(struct bt_regs), "tcx dac"); 396 sizeof(struct bt_regs), "tcx dac");
397 all->info.screen_base = of_ioremap(&op->resource[0], 0,
398 all->par.fbsize, "tcx ram");
399 if (!all->par.tec || !all->par.thc ||
400 !all->par.bt || !all->info.screen_base) {
401 tcx_unmap_regs(all);
402 kfree(all);
403 return -ENOMEM;
404 }
405
391 memcpy(&all->par.mmap_map, &__tcx_mmap_map, sizeof(all->par.mmap_map)); 406 memcpy(&all->par.mmap_map, &__tcx_mmap_map, sizeof(all->par.mmap_map));
392 if (!all->par.lowdepth) { 407 if (!all->par.lowdepth) {
393 all->par.cplane = sbus_ioremap(&sdev->resource[4], 0, 408 all->par.cplane = of_ioremap(&op->resource[4], 0,
394 all->par.fbsize * sizeof(u32), "tcx cplane"); 409 all->par.fbsize * sizeof(u32),
410 "tcx cplane");
411 if (!all->par.cplane) {
412 tcx_unmap_regs(all);
413 kfree(all);
414 return -ENOMEM;
415 }
395 } else { 416 } else {
396 all->par.mmap_map[1].size = SBUS_MMAP_EMPTY; 417 all->par.mmap_map[1].size = SBUS_MMAP_EMPTY;
397 all->par.mmap_map[4].size = SBUS_MMAP_EMPTY; 418 all->par.mmap_map[4].size = SBUS_MMAP_EMPTY;
@@ -400,6 +421,8 @@ static void tcx_init_one(struct sbus_dev *sdev)
400 } 421 }
401 422
402 all->par.physbase = 0; 423 all->par.physbase = 0;
424 all->par.which_io = op->resource[0].flags & IORESOURCE_BITS;
425
403 for (i = 0; i < TCX_MMAP_ENTRIES; i++) { 426 for (i = 0; i < TCX_MMAP_ENTRIES; i++) {
404 int j; 427 int j;
405 428
@@ -416,18 +439,11 @@ static void tcx_init_one(struct sbus_dev *sdev)
416 j = i; 439 j = i;
417 break; 440 break;
418 }; 441 };
419 all->par.mmap_map[i].poff = sdev->reg_addrs[j].phys_addr; 442 all->par.mmap_map[i].poff = op->resource[j].start;
420 } 443 }
421 444
422 all->info.flags = FBINFO_DEFAULT; 445 all->info.flags = FBINFO_DEFAULT;
423 all->info.fbops = &tcx_ops; 446 all->info.fbops = &tcx_ops;
424#ifdef CONFIG_SPARC32
425 all->info.screen_base = (char __iomem *)
426 prom_getintdefault(sdev->prom_node, "address", 0);
427#endif
428 if (!all->info.screen_base)
429 all->info.screen_base = sbus_ioremap(&sdev->resource[0], 0,
430 all->par.fbsize, "tcx ram");
431 all->info.par = &all->par; 447 all->info.par = &all->par;
432 448
433 /* Initialize brooktree DAC. */ 449 /* Initialize brooktree DAC. */
@@ -445,72 +461,88 @@ static void tcx_init_one(struct sbus_dev *sdev)
445 tcx_blank(FB_BLANK_UNBLANK, &all->info); 461 tcx_blank(FB_BLANK_UNBLANK, &all->info);
446 462
447 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) { 463 if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
448 printk(KERN_ERR "tcx: Could not allocate color map.\n"); 464 tcx_unmap_regs(all);
449 kfree(all); 465 kfree(all);
450 return; 466 return -ENOMEM;
451 } 467 }
452 468
453 fb_set_cmap(&all->info.cmap, &all->info); 469 fb_set_cmap(&all->info.cmap, &all->info);
454 tcx_init_fix(&all->info, linebytes); 470 tcx_init_fix(&all->info, linebytes);
455 471
456 if (register_framebuffer(&all->info) < 0) { 472 err = register_framebuffer(&all->info);
457 printk(KERN_ERR "tcx: Could not register framebuffer.\n"); 473 if (err < 0) {
458 fb_dealloc_cmap(&all->info.cmap); 474 fb_dealloc_cmap(&all->info.cmap);
475 tcx_unmap_regs(all);
459 kfree(all); 476 kfree(all);
460 return; 477 return err;
461 } 478 }
462 479
463 list_add(&all->list, &tcx_list); 480 dev_set_drvdata(&op->dev, all);
464 481
465 printk("tcx: %s at %lx:%lx, %s\n", 482 printk("%s: TCX at %lx:%lx, %s\n",
466 sdev->prom_name, 483 dp->full_name,
467 (long) sdev->reg_addrs[0].which_io, 484 all->par.which_io,
468 (long) sdev->reg_addrs[0].phys_addr, 485 op->resource[0].start,
469 all->par.lowdepth ? "8-bit only" : "24-bit depth"); 486 all->par.lowdepth ? "8-bit only" : "24-bit depth");
487
488 return 0;
470} 489}
471 490
472int __init tcx_init(void) 491static int __devinit tcx_probe(struct of_device *dev, const struct of_device_id *match)
473{ 492{
474 struct sbus_bus *sbus; 493 struct of_device *op = to_of_device(&dev->dev);
475 struct sbus_dev *sdev;
476 494
477 if (fb_get_options("tcxfb", NULL)) 495 return tcx_init_one(op);
478 return -ENODEV; 496}
479 497
480 for_all_sbusdev(sdev, sbus) { 498static int __devexit tcx_remove(struct of_device *dev)
481 if (!strcmp(sdev->prom_name, "SUNW,tcx")) 499{
482 tcx_init_one(sdev); 500 struct all_info *all = dev_get_drvdata(&dev->dev);
483 } 501
502 unregister_framebuffer(&all->info);
503 fb_dealloc_cmap(&all->info.cmap);
504
505 tcx_unmap_regs(all);
506
507 kfree(all);
508
509 dev_set_drvdata(&dev->dev, NULL);
484 510
485 return 0; 511 return 0;
486} 512}
487 513
488void __exit tcx_exit(void) 514static struct of_device_id tcx_match[] = {
489{ 515 {
490 struct list_head *pos, *tmp; 516 .name = "SUNW,tcx",
517 },
518 {},
519};
520MODULE_DEVICE_TABLE(of, tcx_match);
491 521
492 list_for_each_safe(pos, tmp, &tcx_list) { 522static struct of_platform_driver tcx_driver = {
493 struct all_info *all = list_entry(pos, typeof(*all), list); 523 .name = "tcx",
524 .match_table = tcx_match,
525 .probe = tcx_probe,
526 .remove = __devexit_p(tcx_remove),
527};
494 528
495 unregister_framebuffer(&all->info); 529int __init tcx_init(void)
496 fb_dealloc_cmap(&all->info.cmap); 530{
497 kfree(all); 531 if (fb_get_options("tcxfb", NULL))
498 } 532 return -ENODEV;
533
534 return of_register_driver(&tcx_driver, &of_bus_type);
499} 535}
500 536
501int __init 537void __exit tcx_exit(void)
502tcx_setup(char *arg)
503{ 538{
504 /* No cmdline options yet... */ 539 of_unregister_driver(&tcx_driver);
505 return 0;
506} 540}
507 541
508module_init(tcx_init); 542module_init(tcx_init);
509
510#ifdef MODULE
511module_exit(tcx_exit); 543module_exit(tcx_exit);
512#endif
513 544
514MODULE_DESCRIPTION("framebuffer driver for TCX chipsets"); 545MODULE_DESCRIPTION("framebuffer driver for TCX chipsets");
515MODULE_AUTHOR("David S. Miller <davem@redhat.com>"); 546MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
547MODULE_VERSION("2.0");
516MODULE_LICENSE("GPL"); 548MODULE_LICENSE("GPL");
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-05 15:36:06 -0400