diff options
| author | Hirokazu Takata <takata@linux-m32r.org> | 2006-12-08 05:35:54 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-08 11:28:37 -0500 |
| commit | 8b03a632ef673bf1069ac9c96c97ff2830289312 (patch) | |
| tree | f1258c921c032699de8a2000e03af4bb5aba217a /arch/m32r | |
| parent | b8b50b6519afa9891b753c4fffa89d89e04df66a (diff) | |
[PATCH] m32r: make userspace headers platform-independent
The m32r kernel 2.6.18-rc1 or after cause build errors of "unknown isa
configuration" for userspace application programs, such as glibc, gdb, etc.
This is because the recent kernel do not include linux/config.h not to expose
kernel headers for userspace.
To fix the above compile errors, this patch fixes two headers ptrace.h and
sigcontext.h for m32r and makes them platform-independent.
Signed-off-by: Hirokazu Takata <takata@linux-m32r.org>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/m32r')
| -rw-r--r-- | arch/m32r/kernel/entry.S | 65 |
1 files changed, 29 insertions, 36 deletions
diff --git a/arch/m32r/kernel/entry.S b/arch/m32r/kernel/entry.S index ac6d840b38..5b01fd2096 100644 --- a/arch/m32r/kernel/entry.S +++ b/arch/m32r/kernel/entry.S | |||
| @@ -23,35 +23,35 @@ | |||
| 23 | * updated in fork.c:copy_thread, signal.c:do_signal, | 23 | * updated in fork.c:copy_thread, signal.c:do_signal, |
| 24 | * ptrace.c and ptrace.h | 24 | * ptrace.c and ptrace.h |
| 25 | * | 25 | * |
| 26 | * M32Rx/M32R2 M32R | 26 | * M32R/M32Rx/M32R2 |
| 27 | * @(sp) - r4 ditto | 27 | * @(sp) - r4 |
| 28 | * @(0x04,sp) - r5 ditto | 28 | * @(0x04,sp) - r5 |
| 29 | * @(0x08,sp) - r6 ditto | 29 | * @(0x08,sp) - r6 |
| 30 | * @(0x0c,sp) - *pt_regs ditto | 30 | * @(0x0c,sp) - *pt_regs |
| 31 | * @(0x10,sp) - r0 ditto | 31 | * @(0x10,sp) - r0 |
| 32 | * @(0x14,sp) - r1 ditto | 32 | * @(0x14,sp) - r1 |
| 33 | * @(0x18,sp) - r2 ditto | 33 | * @(0x18,sp) - r2 |
| 34 | * @(0x1c,sp) - r3 ditto | 34 | * @(0x1c,sp) - r3 |
| 35 | * @(0x20,sp) - r7 ditto | 35 | * @(0x20,sp) - r7 |
| 36 | * @(0x24,sp) - r8 ditto | 36 | * @(0x24,sp) - r8 |
| 37 | * @(0x28,sp) - r9 ditto | 37 | * @(0x28,sp) - r9 |
| 38 | * @(0x2c,sp) - r10 ditto | 38 | * @(0x2c,sp) - r10 |
| 39 | * @(0x30,sp) - r11 ditto | 39 | * @(0x30,sp) - r11 |
| 40 | * @(0x34,sp) - r12 ditto | 40 | * @(0x34,sp) - r12 |
| 41 | * @(0x38,sp) - syscall_nr ditto | 41 | * @(0x38,sp) - syscall_nr |
| 42 | * @(0x3c,sp) - acc0h @(0x3c,sp) - acch | 42 | * @(0x3c,sp) - acc0h |
| 43 | * @(0x40,sp) - acc0l @(0x40,sp) - accl | 43 | * @(0x40,sp) - acc0l |
| 44 | * @(0x44,sp) - acc1h @(0x44,sp) - dummy_acc1h | 44 | * @(0x44,sp) - acc1h ; ISA_DSP_LEVEL2 only |
| 45 | * @(0x48,sp) - acc1l @(0x48,sp) - dummy_acc1l | 45 | * @(0x48,sp) - acc1l ; ISA_DSP_LEVEL2 only |
| 46 | * @(0x4c,sp) - psw ditto | 46 | * @(0x4c,sp) - psw |
| 47 | * @(0x50,sp) - bpc ditto | 47 | * @(0x50,sp) - bpc |
| 48 | * @(0x54,sp) - bbpsw ditto | 48 | * @(0x54,sp) - bbpsw |
| 49 | * @(0x58,sp) - bbpc ditto | 49 | * @(0x58,sp) - bbpc |
| 50 | * @(0x5c,sp) - spu (cr3) ditto | 50 | * @(0x5c,sp) - spu (cr3) |
| 51 | * @(0x60,sp) - fp (r13) ditto | 51 | * @(0x60,sp) - fp (r13) |
| 52 | * @(0x64,sp) - lr (r14) ditto | 52 | * @(0x64,sp) - lr (r14) |
| 53 | * @(0x68,sp) - spi (cr2) ditto | 53 | * @(0x68,sp) - spi (cr2) |
| 54 | * @(0x6c,sp) - orig_r0 ditto | 54 | * @(0x6c,sp) - orig_r0 |
| 55 | */ | 55 | */ |
| 56 | 56 | ||
| 57 | #include <linux/linkage.h> | 57 | #include <linux/linkage.h> |
| @@ -95,17 +95,10 @@ | |||
| 95 | #define R11(reg) @(0x30,reg) | 95 | #define R11(reg) @(0x30,reg) |
| 96 | #define R12(reg) @(0x34,reg) | 96 | #define R12(reg) @(0x34,reg) |
| 97 | #define SYSCALL_NR(reg) @(0x38,reg) | 97 | #define SYSCALL_NR(reg) @(0x38,reg) |
| 98 | #if defined(CONFIG_ISA_M32R2) && defined(CONFIG_ISA_DSP_LEVEL2) | ||
| 99 | #define ACC0H(reg) @(0x3C,reg) | 98 | #define ACC0H(reg) @(0x3C,reg) |
| 100 | #define ACC0L(reg) @(0x40,reg) | 99 | #define ACC0L(reg) @(0x40,reg) |
| 101 | #define ACC1H(reg) @(0x44,reg) | 100 | #define ACC1H(reg) @(0x44,reg) |
| 102 | #define ACC1L(reg) @(0x48,reg) | 101 | #define ACC1L(reg) @(0x48,reg) |
| 103 | #elif defined(CONFIG_ISA_M32R2) || defined(CONFIG_ISA_M32R) | ||
| 104 | #define ACCH(reg) @(0x3C,reg) | ||
| 105 | #define ACCL(reg) @(0x40,reg) | ||
| 106 | #else | ||
| 107 | #error unknown isa configuration | ||
| 108 | #endif | ||
| 109 | #define PSW(reg) @(0x4C,reg) | 102 | #define PSW(reg) @(0x4C,reg) |
| 110 | #define BPC(reg) @(0x50,reg) | 103 | #define BPC(reg) @(0x50,reg) |
| 111 | #define BBPSW(reg) @(0x54,reg) | 104 | #define BBPSW(reg) @(0x54,reg) |
