Modified apic.c to fix barrier-related issues with timer sync, now

use global timer (jiffies) to determine when sync occurs. Still broken
though, this is just a local checkpoint.

1 files changed, 40 insertions, 11 deletions

diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index 268a32870c..13a08e8198 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -1198,13 +1198,20 @@ EXPORT_SYMBOL(switch_ipi_to_APIC_timer);
 #undef APIC_DIVISOR
 
 /* JOHN: Begin added code, starting with quantum sync function. */
-#define STAGGER 0
-#define WARM_UP_INTRS 10000
-        // later, define per-cpu variable and re-synch when intr_count % WARM_UP_INTRS == 0
-static atomic_t quantum_sync_barrier = ATOMIC_INIT(0); // used to implement simple barrier
+#define STAGGER 1
+#define WAIT_TO_SYNC 30000 // 30s after boot (later: between syncs?)
+#define QSYNC_TIME (INITIAL_JIFFIES+msecs_to_jiffies(WAIT_TO_SYNC))
+        // later: re-synch when intr_count % WARM_UP_INTRS == 0
+static atomic_t quantum_sync_barrier = ATOMIC_INIT(0);
+        // used to implement simple barrier
 static DEFINE_PER_CPU(int, synched) = 0;
+static DEFINE_PER_CPU(int, intr_count) = 0;
 
-/* This function is called to align all quanta, and to stagger quanta if necessary. */
+/*
+ * This function is called to align all quanta, and to stagger quanta if
+ * necessary. It relies on a barrier to synchronize all processors, so
+ * that they all reset their APIC timers at the same time.
+ */
 void synchronize_quanta(void)
 {
         int cpu = smp_processor_id();
@@ -1217,7 +1224,13 @@ void synchronize_quanta(void)
          */
         disable_APIC_timer();
         atomic_inc(&quantum_sync_barrier);
-        while (atomic_read(&quantum_sync_barrier) < total_cpus);
+        
+        //debugging this...
+        while (atomic_read(&quantum_sync_barrier) < total_cpus)//;
+        {
+//              printk("cpu %d, barrier = %d\n", cpu, atomic_read(&quantum_sync_barrier));
+        }
+
         __setup_APIC_LVTT(calibration_result);
         enable_APIC_timer();
 
@@ -1258,13 +1271,29 @@ inline void smp_local_timer_interrupt(void)
 
         // JOHN: begin added code.
         /*
-         * Time to synchronize quanta, if it hasn't been done already. To avoid
-         * placing a lot of code in an inline function, the actual sync code is
-         * placed in its own (non-inline) function - the majority of the time
-         * we won't even call it.
+         * Synchronize quanta, if it hasn't been done already.
+         * To keep the interrupt handler code as efficient as possible
+         * in the common case, we check a flag and only check the
+         * jiffy count (indicating the approximate system uptime after
+         * which all processors should synch interrupts -- this jiffy count
+         * needs to be high enough to ensure that all local APIC timers are
+         * up and running) if the flag has not yet been set
+         * (indicating that timers have not yet been synchronized).
+         * An additional comparison is performed to see if the jiffy
+         * count has exceeded QSYNC_TIME, at which point
+         * the synchronization occurs, and the flag is set so we never enter
+         * this code again (unless this is changed so that quanta are
+         * periodically re-synchronized).
+         * The synchronization code itself is placed in its own
+         * (non-inline) function, to avoid issues with creating an inline
+         * function that is too large.
          */
         if (unlikely(!per_cpu(synched, cpu))) {
-                synchronize_quanta();
+//              per_cpu(intr_count, cpu)++;
+//              if (unlikely(per_cpu(intr_count, cpu) > WARM_UP_INTRS)) {
+                if (jiffies > QSYNC_TIME) {
+                        synchronize_quanta();
+                }
         }
         // JOHN: end added code.