Added support for periodic resynchronization of aligned quanta.

Support added with some small modifications. Staggered quanta are still
synchronized only once, it might not be necessary to re-stagger quanta
at all. This seems to be running okay but is not guaranteed to be bug-free,
and still needs to be checked for alignment accuracy.

1 files changed, 38 insertions, 31 deletions

diff --git a/arch/i386/kernel/apic.c b/arch/i386/kernel/apic.c
index 7ffc2fb9a3..1df9229e20 100644
--- a/arch/i386/kernel/apic.c
+++ b/arch/i386/kernel/apic.c
@@ -1198,24 +1198,29 @@ EXPORT_SYMBOL(switch_ipi_to_APIC_timer);
 #undef APIC_DIVISOR
 
 /* JOHN: Begin added code, starting with quantum sync function. */
-#define STAGGER 1
-#define WAIT_TO_SYNC 30000 /* 30s after boot (later: between syncs?) */
-#define QSYNC_TIME (INITIAL_JIFFIES+msecs_to_jiffies(WAIT_TO_SYNC))
-        /* later: change from define to variable, update? */
+#define STAGGER 0
+#define WAIT_TO_SYNC 30000 /* time between syncs and before 1st sync */
+static atomic_t qsync_time = ATOMIC_INIT(INITIAL_JIFFIES);
 static atomic_t quantum_sync_barrier = ATOMIC_INIT(0);
-        /* used to implement simple barrier */
-static DEFINE_PER_CPU(int, synched) = 0;
+static atomic_t barrier_use_count = ATOMIC_INIT(1);
+static atomic_t sync_done = ATOMIC_INIT(0);
 
 /*
  * This function is called to align all quanta, and to stagger quanta if
  * necessary. It relies on a barrier to synchronize all processors, so
- * that they all reset their APIC timers at the same time.
+ * that they all reset their APIC timers at the same time. If quanta
+ * should be staggered, the appropriate stagger delay is then added at
+ * each processor. Staggered quanta are synchronized only once (it is
+ * only important that quanta remain relatively misaligned, not that they
+ * remain equally spaced forever). Aligned quanta, however, are
+ * periodically realigned, which in most cases should not result
+ * in substantial timing issues after the first alignment.
  */
 void synchronize_quanta(void)
 {
         int cpu = smp_processor_id();
         int total_cpus = num_online_cpus();
-        int stagger_interval = jiffies_to_usecs(1)/total_cpus;
+        int stagger_interval = jiffies_to_usecs(1) / total_cpus;
 
         /*
          * Disable APIC timer, wait for all other processors to reach barrier,
@@ -1223,7 +1228,8 @@ void synchronize_quanta(void)
          */
         disable_APIC_timer();
         atomic_inc(&quantum_sync_barrier);
-        while (atomic_read(&quantum_sync_barrier) < total_cpus)
+        while (atomic_read(&quantum_sync_barrier) <
+               atomic_read(&barrier_use_count) * total_cpus)
         {
                 /* Delay, otherwise atomic_inc's cannot occur. */
                 udelay(1);
@@ -1231,17 +1237,26 @@ void synchronize_quanta(void)
         __setup_APIC_LVTT(calibration_result);
         enable_APIC_timer();
 
-        /* Add necessary stagger for this CPU, if required. */
+        /*
+         * Add necessary stagger for this CPU, if required. Do _not_
+         * update qsync_time. Otherwise, we update the qsync_time
+         * and increment the barrier count, which allows the barrier to
+         * be "reused" (at least, until overflow occurs in roughly X*2^29
+         * seconds, or roughly X*17 years -- for a 30 second wait interval,
+         * this means 510 years until overflow, which seems safe).
+         */
         if (STAGGER) {
-                int stagger_us = cpu*stagger_interval;
+                int stagger_us = cpu * stagger_interval;
                 disable_APIC_timer();
                 udelay(stagger_us);
                 __setup_APIC_LVTT(calibration_result);
                 enable_APIC_timer();
+                atomic_inc(&sync_done);
+        } else if (cpu == 0) { 
+                /* The first CPU updates qsync_time and "resets" barrier */
+                atomic_add(msecs_to_jiffies(WAIT_TO_SYNC), &qsync_time);
+                atomic_inc(&barrier_use_count);
         }
-
-        /* Set "synched" flag so this code is not executed again. */
-        per_cpu(synched, cpu) = 1;
 }
 /* JOHN: end added code. */
 
@@ -1257,10 +1272,6 @@ void synchronize_quanta(void)
 
 inline void smp_local_timer_interrupt(void)
 {
-        /* JOHN: begin added code. */
-        int cpu = smp_processor_id();
-        /* JOHN: end added code. */
-
         profile_tick(CPU_PROFILING);
 #ifdef CONFIG_SMP
         update_process_times(user_mode_vm(get_irq_regs()));
@@ -1268,23 +1279,19 @@ inline void smp_local_timer_interrupt(void)
 
         /* JOHN: begin added code.
          *
-         * Synchronize quanta, if it hasn't been done already.
-         * To keep the interrupt handler code as efficient as possible
-         * in the common case, we check a flag and only check the
-         * jiffy count if the flag is not set. When the jiffy count is
-         * high enough to ensure that all local APIC timers are
-         * up and running, as indicated by reaching QSYNC_TIME,
-         * the synchronization occurs, and the flag is set so we never enter
-         * this code again (unless this is changed so that quanta are
-         * periodically re-synchronized?).
+         * Synchronize quanta if we have reached qsync_time plus wait
+         * interval. For staggered quanta, this only happens once,
+         * i.e., sync_done is only set in the staggered case. For aligned
+         * quanta, this value is updated so that realignments
+         * occur periodically.
          * The synchronization code itself is placed in its own
          * (non-inline) function, to avoid issues with creating an inline
          * function that is too large.
          */
-        if (unlikely(!per_cpu(synched, cpu))) {
-                if (jiffies > QSYNC_TIME) {
-                        synchronize_quanta();
-                }
+        if (unlikely(!atomic_read(&sync_done) &&
+                     jiffies > atomic_read(&qsync_time) + 
+                     msecs_to_jiffies(WAIT_TO_SYNC))) {
+                synchronize_quanta();
         }
         /* JOHN: end added code. */