<feed xmlns='http://www.w3.org/2005/Atom'>
<title>litmus2008.git/arch/sh/kernel/cpu, branch master</title>
<subtitle>[ARCHIVE] Old LITMUS^RT 2008 version (for reference).</subtitle>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/'/>
<entry>
<title>sh: Kill off the remaining ST40 cruft.</title>
<updated>2007-11-07T02:13:55+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-11-07T02:05:32+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=f96691872439ab2071171d4531c4a95b5d493ae5'/>
<id>f96691872439ab2071171d4531c4a95b5d493ae5</id>
<content type='text'>
The ST40 stuff in-tree hasn't built for some time, and hasn't been
updated for over 3 years. ST maintains their own out-of-tree changes
and rebases occasionally, and that's ultimately where all of the ST40
users go anyways.

In order for the ST40 code to be brought up to date most of the stuff
removed in this changeset would have to be rewritten anyways, so there's
very little benefit in keeping the remnants around either.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The ST40 stuff in-tree hasn't built for some time, and hasn't been
updated for over 3 years. ST maintains their own out-of-tree changes
and rebases occasionally, and that's ultimately where all of the ST40
users go anyways.

In order for the ST40 code to be brought up to date most of the stuff
removed in this changeset would have to be rewritten anyways, so there's
very little benefit in keeping the remnants around either.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Fix up kgdb-on-NMI branch target.</title>
<updated>2007-11-07T02:13:55+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-11-06T07:59:10+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=96a8a0ba128fa9e40b9d2d1220f264947e9fbc06'/>
<id>96a8a0ba128fa9e40b9d2d1220f264947e9fbc06</id>
<content type='text'>
This was all reworked some time ago, the old debug_enter was ripped
out with everything going through a debug trap jump table instead.
Kill off the debug_enter target and reference kgdb_handle_exception
directly.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This was all reworked some time ago, the old debug_enter was ripped
out with everything going through a debug trap jump table instead.
Kill off the debug_enter target and reference kgdb_handle_exception
directly.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Kill off dead ipr_irq_demux().</title>
<updated>2007-10-31T06:17:03+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-10-31T06:17:03+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=b2078fa221e31a491d0bd720e3acdf9870fe40fd'/>
<id>b2078fa221e31a491d0bd720e3acdf9870fe40fd</id>
<content type='text'>
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Add resource of USBF for SH7722.</title>
<updated>2007-10-30T04:05:31+00:00</updated>
<author>
<name>Yoshihiro Shimoda</name>
<email>shimoda.yoshihiro@renesas.com</email>
</author>
<published>2007-10-30T04:05:31+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=262feaa08eeb744853868b9aa1a8bdb18fe2257c'/>
<id>262feaa08eeb744853868b9aa1a8bdb18fe2257c</id>
<content type='text'>
Signed-off-by: Yoshihiro Shimoda &lt;shimoda.yoshihiro@renesas.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Yoshihiro Shimoda &lt;shimoda.yoshihiro@renesas.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: clkfwk: Support multi-level clock propagation.</title>
<updated>2007-09-28T02:51:52+00:00</updated>
<author>
<name>Stuart Menefy</name>
<email>stuart.menefy@st.com</email>
</author>
<published>2007-09-28T02:51:52+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=24eb17e0813490497f4d5b2fad218bdba402cece'/>
<id>24eb17e0813490497f4d5b2fad218bdba402cece</id>
<content type='text'>
Currently clock propagation only works for one level, but we have some
clocks which need to propagate multiple levels, so make this recursive.

Signed-off-by: Stuart Menefy &lt;stuart.menefy@st.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently clock propagation only works for one level, but we have some
clocks which need to propagate multiple levels, so make this recursive.

Signed-off-by: Stuart Menefy &lt;stuart.menefy@st.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Fix URAM start address on SH7785.</title>
<updated>2007-09-27T09:22:21+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-09-27T09:22:21+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=675bd7804cb53998a57f96d4133856c29213cabd'/>
<id>675bd7804cb53998a57f96d4133856c29213cabd</id>
<content type='text'>
Not all of the SH-X2 URAM blocks are mapped in the same place,
SH7785 happens to map it on the opposite end of the address space
from SH7722, correct the addresses.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Not all of the SH-X2 URAM blocks are mapped in the same place,
SH7785 happens to map it on the opposite end of the address space
from SH7722, correct the addresses.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Use boot_cpu_data for CPU probe.</title>
<updated>2007-09-27T09:18:39+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-09-27T09:18:39+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=cb7af21f7d370edb3a6a6d3e15cb17c8fd61591e'/>
<id>cb7af21f7d370edb3a6a6d3e15cb17c8fd61591e</id>
<content type='text'>
This moves off of smp_processor_id() and only sets the probe
information for the boot CPU directly. This will be copied out
for the secondaries, so there's no reason to do this each time.

This also allows for some header tidying.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This moves off of smp_processor_id() and only sets the probe
information for the boot CPU directly. This will be copied out
for the secondaries, so there's no reason to do this each time.

This also allows for some header tidying.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Fix plat_irq_setup_pins() for SH7785.</title>
<updated>2007-09-27T07:45:46+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-09-27T07:45:46+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=f72abd0a4c3298912c03befa41660d03a2e3321d'/>
<id>f72abd0a4c3298912c03befa41660d03a2e3321d</id>
<content type='text'>
There was some debug code left in here that caused the pin changes
to never be hit. Kill that off, and all is well.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There was some debug code left in here that caused the pin changes
to never be hit. Kill that off, and all is well.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Disable L2 reporting for present URAM only parts.</title>
<updated>2007-09-27T01:29:58+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-09-27T01:29:58+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=26fad19d8c3ca9abd7ffb85a63f8e25f1b4910dc'/>
<id>26fad19d8c3ca9abd7ffb85a63f8e25f1b4910dc</id>
<content type='text'>
The probing logic works for both URAM and L2, with no way to
distinguish between the two. Disable the probing for now and
let the CPU subtypes that have this in a real L2 configuration
explicitly say so.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The probing logic works for both URAM and L2, with no way to
distinguish between the two. Disable the probing for now and
let the CPU subtypes that have this in a real L2 configuration
explicitly say so.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>sh: Initial SH-X3 SMP support.</title>
<updated>2007-09-21T10:16:05+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2007-09-21T10:16:05+00:00</published>
<link rel='alternate' type='text/html' href='http://rtsrv.cs.unc.edu/cgit/cgit.cgi/litmus2008.git/commit/?id=1a442fe02d205d6980202b07f799ab9336e72ad7'/>
<id>1a442fe02d205d6980202b07f799ab9336e72ad7</id>
<content type='text'>
This adds basic support for SH-X3 SMP (4 CPUs).

More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds basic support for SH-X3 SMP (4 CPUs).

More IPI and cache debugging is necessary, mostly interfacing the
d-cache coherency and the I-cache broadcast invalidates. Only for
testing at present!

Signed-off-by: Magnus Damm &lt;damm@igel.co.jp&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
