litmus2008.git/arch/sh/kernel/cpu/irq, branch master

sh: Kill off dead ipr_irq_demux().

2007-10-31T06:17:03+00:00

Signed-off-by: Paul Mundt

sh: intc - initial SMP support.

2007-09-21T09:16:42+00:00

This implements initial support for the SMP INTC (particularly
INTC2) controllers.

These are largely implemented as conventional blocks, with
register sets grouped together at fixed strides relative to
the CPU id.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: remove CONFIG_CPU_HAS_INTC_IRQ

2007-09-21T02:57:51+00:00

All processor specific interrupt code is now converted to make use
of the new intc code. The config option CONFIG_CPU_HAS_INTC_IRQ is
because of that pointless.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: intc - primary priority masking fixes

2007-09-21T02:57:50+00:00

This patch contains various intc fixes for problems reported by
Markus Brunner on the linuxsh-dev mailing list:

http://marc.info/?l=linuxsh-dev&m=118701948224991&w=1

Apart from added comments, the fixes are:

- add intc_set_priority() function prototype to hw_irq.h
- fix off-by-one error in intc_set_priority()
- make sure _INTC_WIDTH() is set for primary priority masking

Big thanks to Markus for finding these problems. Version two fixes
a compile error and an inverted primary check.

Signed-off-by: Magnus Damm 
Acked-by: Markus Brunner 
Signed-off-by: Paul Mundt

sh: intc - rework core code

2007-09-21T02:57:50+00:00

This patch reworks the intc core, implementing the following features:

- Support dual priority registers - one set and one clear register
- All 8/16/32 bit register combinations are now supported
- Both single mask and single enable bitmap register are supported
- Add code to set interrupt priority
- Speedup sense and priority configuration code
- Allocate data using bootmem, allows intc data structures to be
  __initdata
- Save memory - allocated memory footprint is smaller than intc
  structures

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: intc - add a clear register to struct intc_prio_reg

2007-09-21T02:57:49+00:00

We need a secondary register member in struct intc_prio_reg to support
dual priority registers used by ipi on x3.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: intc: Fix sense regs oops for IRL IRQs.

2007-09-21T02:57:48+00:00

IRL doesn't always define sense registers, so don't bother trying to
iterate through the table. This ended up causing an oops on SH-X3
when using IRL mode.

Signed-off-by: Paul Mundt

sh: remove intc2 code

2007-09-21T02:57:48+00:00

There is no point in keeping around the now unused intc2 code.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: intc - add single bitmap register support

2007-09-21T02:57:47+00:00

This patch adds single bitmap register support to intc. The current
code only handles 16 and 32 bit registers where a set bit means
interrupt enabled, but this is easy to extend in the future.

The INTC_IRQ() macro is also added to provide a way to hook in
interrupt controllers for FPGAs in boards or companion chips.

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt

sh: remove support for sh7300 and solution engine 7300

2007-07-26T06:37:57+00:00

This patch removes old dead code:
- kill off sh7300 cpu support
- get rid of broken solution engine 7300 board support

Signed-off-by: Magnus Damm 
Signed-off-by: Paul Mundt