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-rw-r--r--sound/soc/codecs/da7218.c32
-rw-r--r--sound/soc/codecs/da7218.h21
2 files changed, 28 insertions, 25 deletions
diff --git a/sound/soc/codecs/da7218.c b/sound/soc/codecs/da7218.c
index 93575f251866..99ce23e113bf 100644
--- a/sound/soc/codecs/da7218.c
+++ b/sound/soc/codecs/da7218.c
@@ -1868,27 +1868,27 @@ static int da7218_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1868 1868
1869 /* Verify 32KHz, 2MHz - 54MHz MCLK provided, and set input divider */ 1869 /* Verify 32KHz, 2MHz - 54MHz MCLK provided, and set input divider */
1870 if (da7218->mclk_rate == 32768) { 1870 if (da7218->mclk_rate == 32768) {
1871 indiv_bits = DA7218_PLL_INDIV_2_5_MHZ; 1871 indiv_bits = DA7218_PLL_INDIV_9_TO_18_MHZ;
1872 indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL; 1872 indiv = DA7218_PLL_INDIV_9_TO_18_MHZ_VAL;
1873 } else if (da7218->mclk_rate < 2000000) { 1873 } else if (da7218->mclk_rate < 2000000) {
1874 dev_err(codec->dev, "PLL input clock %d below valid range\n", 1874 dev_err(codec->dev, "PLL input clock %d below valid range\n",
1875 da7218->mclk_rate); 1875 da7218->mclk_rate);
1876 return -EINVAL; 1876 return -EINVAL;
1877 } else if (da7218->mclk_rate <= 5000000) { 1877 } else if (da7218->mclk_rate <= 4500000) {
1878 indiv_bits = DA7218_PLL_INDIV_2_5_MHZ; 1878 indiv_bits = DA7218_PLL_INDIV_2_TO_4_5_MHZ;
1879 indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL; 1879 indiv = DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL;
1880 } else if (da7218->mclk_rate <= 10000000) { 1880 } else if (da7218->mclk_rate <= 9000000) {
1881 indiv_bits = DA7218_PLL_INDIV_5_10_MHZ; 1881 indiv_bits = DA7218_PLL_INDIV_4_5_TO_9_MHZ;
1882 indiv = DA7218_PLL_INDIV_2_10_MHZ_VAL;