/* * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx. * Copyright (c) 1997 Dan Malek (dmalek@jlc.net) * * This version of the driver is specific to the FADS implementation, * since the board contains control registers external to the processor * for the control of the LevelOne LXT970 transceiver. The MPC860T manual * describes connections using the internal parallel port I/O, which * is basically all of Port D. * * Right now, I am very wasteful with the buffers. I allocate memory * pages and then divide them into 2K frame buffers. This way I know I * have buffers large enough to hold one frame within one buffer descriptor. * Once I get this working, I will use 64 or 128 byte CPM buffers, which * will be much more memory efficient and will easily handle lots of * small packets. * * Much better multiple PHY support by Magnus Damm. * Copyright (c) 2000 Ericsson Radio Systems AB. * * Support for FEC controller of ColdFire processors. * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com) * * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be) * Copyright (c) 2004-2006 Macq Electronique SA. */ #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #include #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || \ defined(CONFIG_M5272) || defined(CONFIG_M528x) || \ defined(CONFIG_M520x) || defined(CONFIG_M532x) #include #include #include "fec.h" #else #include #include #include "commproc.h" #endif #if defined(CONFIG_FEC2) #define FEC_MAX_PORTS 2 #else #define FEC_MAX_PORTS 1 #endif /* * Define the fixed address of the FEC hardware. */ static unsigned int fec_hw[] = { #if defined(CONFIG_M5272) (MCF_MBAR + 0x840), #elif defined(CONFIG_M527x) (MCF_MBAR + 0x1000), (MCF_MBAR + 0x1800), #elif defined(CONFIG_M523x) || defined(CONFIG_M528x) (MCF_MBAR + 0x1000), #elif defined(CONFIG_M520x) (MCF_MBAR+0x30000), #elif defined(CONFIG_M532x) (MCF_MBAR+0xfc030000), #else &(((immap_t *)IMAP_ADDR)->im_cpm.cp_fec), #endif }; static unsigned char fec_mac_default[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; /* * Some hardware gets it MAC address out of local flash memory. * if this is non-zero then assume it is the address to get MAC from. */ #if defined(CONFIG_NETtel) #define FEC_FLASHMAC 0xf0006006 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES) #define FEC_FLASHMAC 0xf0006000 #elif defined (CONFIG_MTD_KeyTechnology) #define FEC_FLASHMAC 0xffe04000 #elif defined(CONFIG_CANCam) #define FEC_FLASHMAC 0xf0020000 #elif defined (CONFIG_M5272C3) #define FEC_FLASHMAC (0xffe04000 + 4) #elif defined(CONFIG_MOD5272) #define FEC_FLASHMAC 0xffc0406b #else #define FEC_FLASHMAC 0 #endif /* Forward declarations of some structures to support different PHYs */ typedef struct { uint mii_data; void (*funct)(uint mii_reg, struct net_device *dev); } phy_cmd_t; typedef struct { uint id; char *name; const phy_cmd_t *config; const phy_cmd_t *startup; const phy_cmd_t *ack_int; const phy_cmd_t *shutdown; } phy_info_t; /* The number of Tx and Rx buffers. These are allocated from the page * pool. The code may assume these are power of two, so it it best * to keep them that size. * We don't need to allocate pages for the transmitter. We just use * the skbuffer directly. */ #define FEC_ENET_RX_PAGES 8 #define FEC_ENET_RX_FRSIZE 2048 #define FEC_ENET_RX_FRPPG (PAGE_SIZE / FEC_ENET_RX_FRSIZE) #define RX_RING_SIZE (FEC_ENET_RX_FRPPG * FEC_ENET_RX_PAGES) #define FEC_ENET_TX_FRSIZE 2048 #define FEC_ENET_TX_FRPPG (PAGE_SIZE / FEC_ENET_TX_FRSIZE) #define TX_RING_SIZE 16 /* Must be power of two */ #define TX_RING_MOD_MASK 15 /* for this to work */ #if (((RX_RING_SIZE + TX_RING_SIZE) * 8) > PAGE_SIZE) #error "FEC: descriptor ring size constants too large" #endif /* Interrupt events/masks. */ #define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */ #define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */ #define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */ #define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */ #define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */ #define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */ #define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */ #define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */ #define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */ #define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */ /* The FEC stores dest/src/type, data, and checksum for receive packets. */ #define PKT_MAXBUF_SIZE 1518 #define PKT_MINBUF_SIZE 64 #define PKT_MAXBLR_SIZE 1520 /* * The 5270/5271/5280/5282/532x RX control register also contains maximum frame * size bits. Other FEC hardware does not, so we need to take that into * account when setting it. */ #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \ defined(CONFIG_M520x) || defined(CONFIG_M532x) #define OPT_FRAME_SIZE (PKT_MAXBUF_SIZE << 16) #else #define OPT_FRAME_SIZE 0 #endif /* The FEC buffer descriptors track the ring buffers. The rx_bd_base and * tx_bd_base always point to the base of the buffer descriptors. The * cur_rx and cur_tx point to the currently available buffer. * The dirty_tx tracks the current buffer that is being sent by the * controller. The cur_tx and dirty_tx are equal under both completely * empty and completely full conditions. The empty/ready indicator in * the buffer descriptor determines the actual condition. */ struct fec_enet_private { /* Hardware registers of the FEC device */ volatile fec_t *hwp; /* The saved address of a sent-in-place packet/buffer, for skfree(). */ unsigned char *tx_bounce[TX_RING_SIZE]; struct sk_buff* tx_skbuff[TX_RING_SIZE]; ushort skb_cur; ushort skb_dirty; /* CPM dual port RAM relative addresses. */ cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ cbd_t *tx_bd_base; cbd_t *cur_rx, *cur_tx; /* The next free ring entry */ cbd_t *dirty_tx; /* The ring entries to be free()ed. */ struct net_device_stats stats; uint tx_full; spinlock_t lock; uint phy_id; uint phy_id_done; uint phy_status; uint phy_speed; phy_info_t const *phy; struct work_struct phy_task; uint sequence_done; uint mii_phy_task_queued; uint phy_addr; int index; int opened; int link; int old_link; int full_duplex; }; static int fec_enet_open(struct net_device *dev); static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev); static void fec_enet_mii(struct net_device *dev); static irqreturn_t fec_enet_interrupt(int irq, void * dev_id); static void fec_enet_tx(struct net_device *dev); static void fec_enet_rx(struct net_device *dev); static int fec_enet_close(struct net_device *dev); static struct net_device_stats *fec_enet_get_stats(struct net_device *dev); static void set_multicast_list(struct net_device *dev); static void fec_restart(struct net_device *dev, int duplex); static void fec_stop(struct net_device *dev); static void fec_set_mac_address(struct net_device *dev); /* MII processing. We keep this as simple as possible. Requests are * placed on the list (if there is room). When the request is finished * by the MII, an optional function may be called. */ typedef struct mii_list { uint mii_regval; void (*mii_func)(uint val, struct net_device *dev); struct mii_list *mii_next; } mii_list_t; #define NMII 20 static mii_list_t mii_cmds[NMII]; static mii_list_t *mii_free; static mii_list_t *mii_head; static mii_list_t *mii_tail; static int mii_queue(struct net_device *dev, int request, void (*func)(uint, struct net_device *)); /* Make MII read/write commands for the FEC. */ #define mk_mii_read(REG) (0x60020000 | ((REG & 0x1f) << 18)) #define mk_mii_write(REG, VAL) (0x50020000 | ((REG & 0x1f) << 18) | \ (VAL & 0xffff)) #define mk_mii_end 0 /* Transmitter timeout. */ #define TX_TIMEOUT (2*HZ) /* Register definitions for the PHY. */ #define MII_REG_CR 0 /* Control Register */ #define MII_REG_SR 1 /* Status Register */ #define MII_REG_PHYIR1 2 /* PHY Identification Register 1 */ #define MII_REG_PHYIR2 3 /* PHY Identification Register 2 */ #define MII_REG_ANAR 4 /* A-N Advertisement Register */ #define MII_REG_ANLPAR 5 /* A-N Link Partner Ability Register */ #define MII_REG_ANER 6 /* A-N Expansion Register */ #define MII_REG_ANNPTR 7 /* A-N Next Page Transmit Register */ #define MII_REG_ANLPRNPR 8 /* A-N Link Partner Received Next Page Reg. */ /* values for phy_status */ #define PHY_CONF_ANE 0x0001 /* 1 auto-negotiation enabled */ #define PHY_CONF_LOOP 0x0002 /* 1 loopback mode enabled */ #define PHY_CONF_SPMASK 0x00f0 /* mask for speed */ #define PHY_CONF_10HDX 0x0010 /* 10 Mbit half duplex supported */ #define PHY_CONF_10FDX 0x0020 /* 10 Mbit full duplex supported */ #define PHY_CONF_100HDX 0x0040 /* 100 Mbit half duplex supported */ #define PHY_CONF_100FDX 0x0080 /* 100 Mbit full duplex supported */ #define PHY_STAT_LINK 0x0100 /* 1 up - 0 down */ #define PHY_STAT_FAULT 0x0200 /* 1 remote fault */ #define PHY_STAT_ANC 0x0400 /* 1 auto-negotiation complete */ #define PHY_STAT_SPMASK 0xf000 /* mask for speed */ #define PHY_STAT_10HDX 0x1000 /* 10 Mbit half duplex selected */ #define PHY_STAT_10FDX 0x2000 /* 10 Mbit full duplex selected */ #define PHY_STAT_100HDX 0x4000 /* 100 Mbit half duplex selected */ #define PHY_STAT_100FDX 0x8000 /* 100 Mbit full duplex selected */ static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) { struct fec_enet_private *fep; volatile fec_t *fecp; volatile cbd_t *bdp; unsigned short status; fep = netdev_priv(dev); fecp = (volatile fec_t*)dev->base_addr; if (!fep->link) { /* Link is down or autonegotiation is in progress. */ return 1; } /* Fill in a Tx ring entry */ bdp = fep->cur_tx; status = bdp->cbd_sc; #ifndef final_version if (status & BD_ENET_TX_READY) { /* Ooops. All transmit buffers are full. Bail out. * This should not happen, since dev->tbusy should be set. */ printk("%s: tx queue full!.\n", dev->name); return 1; } #endif /* Clear all of the status flags. */ status &= ~BD_ENET_TX_STATS; /* Set buffer length and buffer pointer. */ bdp->cbd_bufaddr = __pa(skb->data); bdp->cbd_datlen = skb->len; /* * On some FEC implementations data must be aligned on * 4-byte boundaries. Use bounce buffers to copy data * and get it aligned. Ugh. */ if (bdp->cbd_bufaddr & 0x3) { unsigned int index; index = bdp - fep->tx_bd_base; memcpy(fep->tx_bounce[index], (void *) bdp->cbd_bufaddr, bdp->cbd_datlen); bdp->cbd_bufaddr = __pa(fep->tx_bounce[index]); } /* Save skb pointer. */ fep->tx_skbuff[fep->skb_cur] = skb; fep->stats.tx_bytes += skb->len; fep->skb_cur = (fep->skb_cur+1) & TX_RING_MOD_MASK; /* Push the data cache so the CPM does not get stale memory * data. */ flush_dcache_range((unsigned long)skb->data, (unsigned long)skb->data + skb->len); spin_lock_irq(&fep->lock); /* Send it on its way. Tell FEC it's ready, interrupt when done, * it's the last BD of the frame, and to put the CRC on the end. */ status |= (BD_ENET_TX_READY | BD_ENET_TX_INTR | BD_ENET_TX_LAST | BD_ENET_TX_TC); bdp->cbd_sc = status; dev->trans_start = jiffies; /* Trigger transmission start */ fecp->fec_x_des_active = 0; /* If this was the last BD in the ring, start at the beginning again. */ if (status & BD_ENET_TX_WRAP) { bdp = fep->tx_bd_base; } else { bdp++; } if (bdp == fep->dirty_tx) { fep->tx_full = 1; netif_stop_queue(dev); } fep->cur_tx = (cbd_t *)bdp; spin_unlock_irq(&fep->lock); return 0; } static void fec_timeout(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); printk("%s: transmit timed out.\n", dev->name); fep->stats.tx_errors++; #ifndef final_version { int i; cbd_t *bdp; printk("Ring data dump: cur_tx %lx%s, dirty_tx %lx cur_rx: %lx\n", (unsigned long)fep->cur_tx, fep->tx_full ? " (full)" : "", (unsigned long)fep->dirty_tx, (unsigned long)fep->cur_rx); bdp = fep->tx_bd_base; printk(" tx: %u buffers\n", TX_RING_SIZE); for (i = 0 ; i < TX_RING_SIZE; i++) { printk(" %08x: %04x %04x %08x\n", (uint) bdp, bdp->cbd_sc, bdp->cbd_datlen, (int) bdp->cbd_bufaddr); bdp++; } bdp = fep->rx_bd_base; printk(" rx: %lu buffers\n", (unsigned long) RX_RING_SIZE); for (i = 0 ; i < RX_RING_SIZE; i++) { printk(" %08x: %04x %04x %08x\n", (uint) bdp, bdp->cbd_sc, bdp->cbd_datlen, (int) bdp->cbd_bufaddr); bdp++; } } #endif fec_restart(dev, fep->full_duplex); netif_wake_queue(dev); } /* The interrupt handler. * This is called from the MPC core interrupt. */ static irqreturn_t fec_enet_interrupt(int irq, void * dev_id) { struct net_device *dev = dev_id; volatile fec_t *fecp; uint int_events; int handled = 0; fecp = (volatile fec_t*)dev->base_addr; /* Get the interrupt events that caused us to be here. */ while ((int_events = fecp->fec_ievent) != 0) { fecp->fec_ievent = int_events; /* Handle receive event in its own function. */ if (int_events & FEC_ENET_RXF) { handled = 1; fec_enet_rx(dev); } /* Transmit OK, or non-fatal error. Update the buffer descriptors. FEC handles all errors, we just discover them as part of the transmit process. */ if (int_events & FEC_ENET_TXF) { handled = 1; fec_enet_tx(dev); } if (int_events & FEC_ENET_MII) { handled = 1; fec_enet_mii(dev); } } return IRQ_RETVAL(handled); } static void fec_enet_tx(struct net_device *dev) { struct fec_enet_private *fep; volatile cbd_t *bdp; unsigned short status; struct sk_buff *skb; fep = netdev_priv(dev); spin_lock(&fep->lock); bdp = fep->dirty_tx; while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) { if (bdp == fep->cur_tx && fep->tx_full == 0) break; skb = fep->tx_skbuff[fep->skb_dirty]; /* Check for errors. */ if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC | BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) { fep->stats.tx_errors++; if (status & BD_ENET_TX_HB) /* No heartbeat */ fep->stats.tx_heartbeat_errors++; if (status & BD_ENET_TX_LC) /* Late collision */ fep->stats.tx_window_errors++; if (status & BD_ENET_TX_RL) /* Retrans limit */ fep->stats.tx_aborted_errors++; if (status & BD_ENET_TX_UN) /* Underrun */ fep->stats.tx_fifo_errors++; if (status & BD_ENET_TX_CSL) /* Carrier lost */ fep->stats.tx_carrier_errors++; } else { fep->stats.tx_packets++; } #ifndef final_version if (status & BD_ENET_TX_READY) printk("HEY! Enet xmit interrupt and TX_READY.\n"); #endif /* Deferred means some collisions occurred during transmit, * but we eventually sent the packet OK. */ if (status & BD_ENET_TX_DEF) fep->stats.collisions++; /* Free the sk buffer associated with this last transmit. */ dev_kfree_skb_any(skb); fep->tx_skbuff[fep->skb_dirty] = NULL; fep->skb_dirty = (fep->skb_dirty + 1) & TX_RING_MOD_MASK; /* Update pointer to next buffer descriptor to be transmitted. */ if (status & BD_ENET_TX_WRAP) bdp = fep->tx_bd_base; else bdp++; /* Since we have freed up a buffer, the ring is no longer * full. */ if (fep->tx_full) { fep->tx_full = 0; if (netif_queue_stopped(dev)) netif_wake_queue(dev); } } fep->dirty_tx = (cbd_t *)bdp; spin_unlock(&fep->lock); } /* During a receive, the cur_rx points to the current incoming buffer. * When we update through the ring, if the next incoming buffer has * not been given to the system, we just set the empty indicator, * effectively tossing the packet. */ static void fec_enet_rx(struct net_device *dev) { struct fec_enet_private *fep; volatile fec_t *fecp; volatile cbd_t *bdp; unsigned short status; struct sk_buff *skb; ushort pkt_len; __u8 *data; #ifdef CONFIG_M532x flush_cache_all(); #endif fep = netdev_priv(dev); fecp = (volatile fec_t*)dev->base_addr; /* First, grab all of the stats for the incoming packet. * These get messed up if we get called due to a busy condition. */ bdp = fep->cur_rx; while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) { #ifndef final_version /* Since we have allocated space to hold a complete frame, * the last indicator should be set. */ if ((status & BD_ENET_RX_LAST) == 0) printk("FEC ENET: rcv is not +last\n"); #endif if (!fep->opened) goto rx_processing_done; /* Check for errors. */ if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) { fep->stats.rx_errors++; if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) { /* Frame too long or too short. */ fep->stats.rx_length_errors++; }#ifndef __LINUX_NETLINK_H #define __LINUX_NETLINK_H #include <linux/socket.h> /* for sa_family_t */ #include <linux/types.h> #define NETLINK_ROUTE 0 /* Routing/device hook */ #define NETLINK_UNUSED 1 /* Unused number */ #define NETLINK_USERSOCK 2 /* Reserved for user mode socket protocols */ #define NETLINK_FIREWALL 3 /* Firewalling hook */ #define NETLINK_INET_DIAG 4 /* INET socket monitoring */ #define NETLINK_NFLOG 5 /* netfilter/iptables ULOG */ #define NETLINK_XFRM 6 /* ipsec */ #define NETLINK_SELINUX 7 /* SELinux event notifications */ #define NETLINK_ISCSI 8 /* Open-iSCSI */ #define NETLINK_AUDIT 9 /* auditing */ #define NETLINK_FIB_LOOKUP 10 #define NETLINK_CONNECTOR 11 #define NETLINK_NETFILTER 12 /* netfilter subsystem */ #define NETLINK_IP6_FW 13 #define NETLINK_DNRTMSG 14 /* DECnet routing messages */ #define NETLINK_KOBJECT_UEVENT 15 /* Kernel messages to userspace */ #define NETLINK_GENERIC 16 /* leave room for NETLINK_DM (DM Events) */ #define NETLINK_SCSITRANSPORT 18 /* SCSI Transports */ #define NETLINK_ECRYPTFS 19 #define MAX_LINKS 32 struct sockaddr_nl { sa_family_t nl_family; /* AF_NETLINK */ unsigned short nl_pad; /* zero */ __u32 nl_pid; /* process pid */ __u32 nl_groups; /* multicast groups mask */ }; struct nlmsghdr { __u32 nlmsg_len; /* Length of message including header */ __u16 nlmsg_type; /* Message content */ __u16 nlmsg_flags; /* Additional flags */ __u32 nlmsg_seq; /* Sequence number */ __u32 nlmsg_pid; /* Sending process PID */ }; /* Flags values */ #define NLM_F_REQUEST 1 /* It is request message. */ #define NLM_F_MULTI 2 /* Multipart message, terminated by NLMSG_DONE */ #define NLM_F_ACK 4 /* Reply with ack, with zero or error code */ #define NLM_F_ECHO 8 /* Echo this request */ /* Modifiers to GET request */ #define NLM_F_ROOT 0x100 /* specify tree root */ #define NLM_F_MATCH 0x200 /* return all matching */ #define NLM_F_ATOMIC 0x400 /* atomic GET */ #define NLM_F_DUMP (NLM_F_ROOT|NLM_F_MATCH) /* Modifiers to NEW request */ #define NLM_F_REPLACE 0x100 /* Override existing */ #define NLM_F_EXCL 0x200 /* Do not touch, if it exists */ #define NLM_F_CREATE 0x400 /* Create, if it does not exist */ #define NLM_F_APPEND 0x800 /* Add to end of list */ /* 4.4BSD ADD NLM_F_CREATE|NLM_F_EXCL 4.4BSD CHANGE NLM_F_REPLACE True CHANGE NLM_F_CREATE|NLM_F_REPLACE Append NLM_F_CREATE Check NLM_F_EXCL */ #define NLMSG_ALIGNTO 4 #define NLMSG_ALIGN(len) ( ((len)+NLMSG_ALIGNTO-1) & ~(NLMSG_ALIGNTO-1) ) #define NLMSG_HDRLEN ((int) NLMSG_ALIGN(sizeof(struct nlmsghdr))) #define NLMSG_LENGTH(len) ((len)+NLMSG_ALIGN(NLMSG_HDRLEN)) #define NLMSG_SPACE(len) NLMSG_ALIGN(NLMSG_LENGTH(len)) #define NLMSG_DATA(nlh) ((void*)(((char*)nlh) + NLMSG_LENGTH(0))) #define NLMSG_NEXT(nlh,len) ((len) -= NLMSG_ALIGN((nlh)->nlmsg_len), \ (struct nlmsghdr*)(((char*)(nlh)) + NLMSG_ALIGN((nlh)->nlmsg_len))) #define NLMSG_OK(nlh,len) ((len) >= (int)sizeof(struct nlmsghdr) && \ (nlh)->nlmsg_len >= sizeof(struct nlmsghdr) && \ (nlh)->nlmsg_len <= (len)) #define NLMSG_PAYLOAD(nlh,len) ((nlh)->nlmsg_len - NLMSG_SPACE((len))) #define NLMSG_NOOP 0x1 /* Nothing. */ #define NLMSG_ERROR 0x2 /* Error */ #define NLMSG_DONE 0x3 /* End of a dump */ #define NLMSG_OVERRUN 0x4 /* Data lost */ #define NLMSG_MIN_TYPE 0x10 /* < 0x10: reserved control messages */ struct nlmsgerr { int error; struct nlmsghdr msg; }; #define NETLINK_ADD_MEMBERSHIP 1 #define NETLINK_DROP_MEMBERSHIP 2 #define NETLINK_PKTINFO 3 struct nl_pktinfo { __u32 group; }; #define NET_MAJOR 36 /* Major 36 is reserved for networking */ enum { NETLINK_UNCONNECTED = 0, NETLINK_CONNECTED, }; /* * <------- NLA_HDRLEN ------> <-- NLA_ALIGN(payload)--> * +---------------------+- - -+- - - - - - - - - -+- - -+ * | Header | Pad | Payload | Pad | * | (struct nlattr) | ing | | ing | * +---------------------+- - -+- - - - - - - - - -+- - -+ * <-------------- nlattr->nla_len --------------> */ struct nlattr { __u16 nla_len; __u16 nla_type; }; #define NLA_ALIGNTO 4 #define NLA_ALIGN(len) (((len) + NLA_ALIGNTO - 1) & ~(NLA_ALIGNTO - 1)) #define NLA_HDRLEN ((int) NLA_ALIGN(sizeof(struct nlattr))) #ifdef __KERNEL__ #include <linux/capability.h> #include <linux/skbuff.h> struct netlink_skb_parms { struct ucred creds; /* Skb credentials */ __u32 pid; __u32 dst_group; kernel_cap_t eff_cap; __u32 loginuid; /* Login (audit) uid */ __u32 sid; /* SELinux security id */ }; #define NETLINK_CB(skb) (*(struct netlink_skb_parms*)&((skb)->cb)) #define NETLINK_CREDS(skb) (&NETLINK_CB((skb)).creds) extern struct sock *netlink_kernel_create(int unit, unsigned int groups, void (*input)(struct sock *sk, int len), struct module *module); extern void netlink_ack(struct sk_buff *in_skb, struct nlmsghdr *nlh, int err); extern int netlink_has_listeners(struct sock *sk, unsigned int group); extern int netlink_unicast(struct sock *ssk, struct sk_buff *skb, __u32 pid, int nonblock); extern int netlink_broadcast(struct sock *ssk, struct sk_buff *skb, __u32 pid, __u32 group, gfp_t allocation); extern void netlink_set_err(struct sock *ssk, __u32 pid, __u32 group, int code); extern int netlink_register_notifier(struct notifier_block *nb); extern int netlink_unregister_notifier(struct notifier_block *nb); /* finegrained unicast helpers: */ struct sock *netlink_getsockbyfilp(struct file *filp); int netlink_attachskb(struct sock *sk, struct sk_buff *skb, int nonblock, long timeo, struct sock *ssk); void netlink_detachskb(struct sock *sk, struct sk_buff *skb); int netlink_sendskb(struct sock *sk, struct sk_buff *skb, int protocol); /* * skb should fit one page. This choice is good for headerless malloc. */ #define NLMSG_GOODORDER 0 #define NLMSG_GOODSIZE (SKB_MAX_ORDER(0, NLMSG_GOODORDER)) #define NLMSG_DEFAULT_SIZE (NLMSG_GOODSIZE - NLMSG_HDRLEN) struct netlink_callback { struct sk_buff *skb; struct nlmsghdr *nlh; int (*dump)(struct sk_buff * skb, struct netlink_callback *cb); int (*done)(struct netlink_callback *cb); int family; long args[5]; }; struct netlink_notify { int pid; int protocol; }; static __inline__ struct nlmsghdr * __nlmsg_put(struct sk_buff *skb, u32 pid, u32 seq, int type, int len, int flags) { struct nlmsghdr *nlh; int size = NLMSG_LENGTH(len); nlh = (struct nlmsghdr*)skb_put(skb, NLMSG_ALIGN(size)); nlh->nlmsg_type = type; nlh->nlmsg_len = size; nlh->nlmsg_flags = flags; nlh->nlmsg_pid = pid; nlh->nlmsg_seq = seq; memset(NLMSG_DATA(nlh) + len, 0, NLMSG_ALIGN(size) - size); return nlh; } #define NLMSG_NEW(skb, pid, seq, type, len, flags) \ ({ if (skb_tailroom(skb) < (int)NLMSG_SPACE(len)) \ goto nlmsg_failure; \ __nlmsg_put(skb, pid, seq, type, len, flags); }) #define NLMSG_PUT(skb, pid, seq, type, len) \ NLMSG_NEW(skb, pid, seq, type, len, 0) #define NLMSG_NEW_ANSWER(skb, cb, type, len, flags) \ NLMSG_NEW(skb, NETLINK_CB((cb)->skb).pid, \ (cb)->nlh->nlmsg_seq, type, len, flags) #define NLMSG_END(skb, nlh) \ ({ (nlh)->nlmsg_len = (skb)->tail - (unsigned char *) (nlh); \ (skb)->len; }) #define NLMSG_CANCEL(skb, nlh) \ ({ skb_trim(skb, (unsigned char *) (nlh) - (skb)->data); \ -1; }) extern int netlink_dump_start(struct sock *ssk, struct sk_buff *skb, struct nlmsghdr *nlh, int (*dump)(struct sk_buff *skb, struct netlink_callback*), int (*done)(struct netlink_callback*)); #define NL_NONROOT_RECV 0x1 #define NL_NONROOT_SEND 0x2 extern void netlink_set_nonroot(int protocol, unsigned flag); #endif /* __KERNEL__ */ #endif /* __LINUX_NETLINK_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-10-27 23:30:19 -0400
IPSBAR + b + MCFINTC_IMRL); *imrp &= ~0xff800001; } #if defined(CONFIG_M528x) /* Set up gpio outputs for MII lines */ { volatile u16 *gpio_paspar; volatile u8 *gpio_pehlpar; gpio_paspar = (volatile u16 *) (MCF_IPSBAR + 0x100056); gpio_pehlpar = (volatile u16 *) (MCF_IPSBAR + 0x100058); *gpio_paspar |= 0x0f00; *gpio_pehlpar = 0xc0; } #endif } static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) { volatile fec_t *fecp; fecp = fep->hwp; fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04; fecp->fec_x_cntrl = 0x00; /* * Set MII speed to 2.5 MHz * See 5282 manual section 17.5.4.7: MSCR */ fep->phy_speed = ((((MCF_CLK / 2) / (2500000 / 10)) + 5) / 10) * 2; fecp->fec_mii_speed = fep->phy_speed; fec_restart(dev, 0); } static void __inline__ fec_get_mac(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); volatile fec_t *fecp; unsigned char *iap, tmpaddr[ETH_ALEN]; fecp = fep->hwp; if (FEC_FLASHMAC) { /* * Get MAC address from FLASH. * If it is all 1's or 0's, use the default. */ iap = FEC_FLASHMAC; if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) && (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0)) iap = fec_mac_default; if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) && (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) iap = fec_mac_default; } else { *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); iap = &tmpaddr[0]; } memcpy(dev->dev_addr, iap, ETH_ALEN); /* Adjust MAC if using default MAC address */ if (iap == fec_mac_default) dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index; } static void __inline__ fec_enable_phy_intr(void) { } static void __inline__ fec_disable_phy_intr(void) { } static void __inline__ fec_phy_ack_intr(void) { } static void __inline__ fec_localhw_setup(void) { } /* * Do not need to make region uncached on 5272. */ static void __inline__ fec_uncache(unsigned long addr) { } /* ------------------------------------------------------------------------- */ #elif defined(CONFIG_M520x) /* * Code specific to Coldfire 520x */ static void __inline__ fec_request_intrs(struct net_device *dev) { struct fec_enet_private *fep; int b; static const struct idesc { char *name; unsigned short irq; } *idp, id[] = { { "fec(TXF)", 23 }, { "fec(TXB)", 24 }, { "fec(TXFIFO)", 25 }, { "fec(TXCR)", 26 }, { "fec(RXF)", 27 }, { "fec(RXB)", 28 }, { "fec(MII)", 29 }, { "fec(LC)", 30 }, { "fec(HBERR)", 31 }, { "fec(GRA)", 32 }, { "fec(EBERR)", 33 }, { "fec(BABT)", 34 }, { "fec(BABR)", 35 }, { NULL }, }; fep = netdev_priv(dev); b = 64 + 13; /* Setup interrupt handlers. */ for (idp = id; idp->name; idp++) { if (request_irq(b+idp->irq,fec_enet_interrupt,0,idp->name,dev)!=0) printk("FEC: Could not allocate %s IRQ(%d)!\n", idp->name, b+idp->irq); } /* Unmask interrupts at ColdFire interrupt controller */ { volatile unsigned char *icrp; volatile unsigned long *imrp; icrp = (volatile unsigned char *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0); for (b = 36; (b < 49); b++) icrp[b] = 0x04; imrp = (volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH); *imrp &= ~0x0001FFF0; } *(volatile unsigned char *)(MCF_IPSBAR + MCF_GPIO_PAR_FEC) |= 0xf0; *(volatile unsigned char *)(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C) |= 0x0f; } static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) { volatile fec_t *fecp; fecp = fep->hwp; fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04; fecp->fec_x_cntrl = 0x00; /* * Set MII speed to 2.5 MHz * See 5282 manual section 17.5.4.7: MSCR */ fep->phy_speed = ((((MCF_CLK / 2) / (2500000 / 10)) + 5) / 10) * 2; fecp->fec_mii_speed = fep->phy_speed; fec_restart(dev, 0); } static void __inline__ fec_get_mac(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); volatile fec_t *fecp; unsigned char *iap, tmpaddr[ETH_ALEN]; fecp = fep->hwp; if (FEC_FLASHMAC) { /* * Get MAC address from FLASH. * If it is all 1's or 0's, use the default. */ iap = FEC_FLASHMAC; if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) && (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0)) iap = fec_mac_default; if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) && (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) iap = fec_mac_default; } else { *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); iap = &tmpaddr[0]; } memcpy(dev->dev_addr, iap, ETH_ALEN); /* Adjust MAC if using default MAC address */ if (iap == fec_mac_default) dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index; } static void __inline__ fec_enable_phy_intr(void) { } static void __inline__ fec_disable_phy_intr(void) { } static void __inline__ fec_phy_ack_intr(void) { } static void __inline__ fec_localhw_setup(void) { } static void __inline__ fec_uncache(unsigned long addr) { } /* ------------------------------------------------------------------------- */ #elif defined(CONFIG_M532x) /* * Code specific for M532x */ static void __inline__ fec_request_intrs(struct net_device *dev) { struct fec_enet_private *fep; int b; static const struct idesc { char *name; unsigned short irq; } *idp, id[] = { { "fec(TXF)", 36 }, { "fec(TXB)", 37 }, { "fec(TXFIFO)", 38 }, { "fec(TXCR)", 39 }, { "fec(RXF)", 40 }, { "fec(RXB)", 41 }, { "fec(MII)", 42 }, { "fec(LC)", 43 }, { "fec(HBERR)", 44 }, { "fec(GRA)", 45 }, { "fec(EBERR)", 46 }, { "fec(BABT)", 47 }, { "fec(BABR)", 48 }, { NULL }, }; fep = netdev_priv(dev); b = (fep->index) ? 128 : 64; /* Setup interrupt handlers. */ for (idp = id; idp->name; idp++) { if (request_irq(b+idp->irq,fec_enet_interrupt,0,idp->name,dev)!=0) printk("FEC: Could not allocate %s IRQ(%d)!\n", idp->name, b+idp->irq); } /* Unmask interrupts */ MCF_INTC0_ICR36 = 0x2; MCF_INTC0_ICR37 = 0x2; MCF_INTC0_ICR38 = 0x2; MCF_INTC0_ICR39 = 0x2; MCF_INTC0_ICR40 = 0x2; MCF_INTC0_ICR41 = 0x2; MCF_INTC0_ICR42 = 0x2; MCF_INTC0_ICR43 = 0x2; MCF_INTC0_ICR44 = 0x2; MCF_INTC0_ICR45 = 0x2; MCF_INTC0_ICR46 = 0x2; MCF_INTC0_ICR47 = 0x2; MCF_INTC0_ICR48 = 0x2; MCF_INTC0_IMRH &= ~( MCF_INTC_IMRH_INT_MASK36 | MCF_INTC_IMRH_INT_MASK37 | MCF_INTC_IMRH_INT_MASK38 | MCF_INTC_IMRH_INT_MASK39 | MCF_INTC_IMRH_INT_MASK40 | MCF_INTC_IMRH_INT_MASK41 | MCF_INTC_IMRH_INT_MASK42 | MCF_INTC_IMRH_INT_MASK43 | MCF_INTC_IMRH_INT_MASK44 | MCF_INTC_IMRH_INT_MASK45 | MCF_INTC_IMRH_INT_MASK46 | MCF_INTC_IMRH_INT_MASK47 | MCF_INTC_IMRH_INT_MASK48 ); /* Set up gpio outputs for MII lines */ MCF_GPIO_PAR_FECI2C |= (0 | MCF_GPIO_PAR_FECI2C_PAR_MDC_EMDC | MCF_GPIO_PAR_FECI2C_PAR_MDIO_EMDIO); MCF_GPIO_PAR_FEC = (0 | MCF_GPIO_PAR_FEC_PAR_FEC_7W_FEC | MCF_GPIO_PAR_FEC_PAR_FEC_MII_FEC); } static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) { volatile fec_t *fecp; fecp = fep->hwp; fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04; fecp->fec_x_cntrl = 0x00; /* * Set MII speed to 2.5 MHz */ fep->phy_speed = ((((MCF_CLK / 2) / (2500000 / 10)) + 5) / 10) * 2; fecp->fec_mii_speed = fep->phy_speed; fec_restart(dev, 0); } static void __inline__ fec_get_mac(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); volatile fec_t *fecp; unsigned char *iap, tmpaddr[ETH_ALEN]; fecp = fep->hwp; if (FEC_FLASHMAC) { /* * Get MAC address from FLASH. * If it is all 1's or 0's, use the default. */ iap = FEC_FLASHMAC; if ((iap[0] == 0) && (iap[1] == 0) && (iap[2] == 0) && (iap[3] == 0) && (iap[4] == 0) && (iap[5] == 0)) iap = fec_mac_default; if ((iap[0] == 0xff) && (iap[1] == 0xff) && (iap[2] == 0xff) && (iap[3] == 0xff) && (iap[4] == 0xff) && (iap[5] == 0xff)) iap = fec_mac_default; } else { *((unsigned long *) &tmpaddr[0]) = fecp->fec_addr_low; *((unsigned short *) &tmpaddr[4]) = (fecp->fec_addr_high >> 16); iap = &tmpaddr[0]; } memcpy(dev->dev_addr, iap, ETH_ALEN); /* Adjust MAC if using default MAC address */ if (iap == fec_mac_default) dev->dev_addr[ETH_ALEN-1] = fec_mac_default[ETH_ALEN-1] + fep->index; } static void __inline__ fec_enable_phy_intr(void) { } static void __inline__ fec_disable_phy_intr(void) { } static void __inline__ fec_phy_ack_intr(void) { } static void __inline__ fec_localhw_setup(void) { } /* * Do not need to make region uncached on 532x. */ static void __inline__ fec_uncache(unsigned long addr) { } /* ------------------------------------------------------------------------- */ #else /* * Code specific to the MPC860T setup. */ static void __inline__ fec_request_intrs(struct net_device *dev) { volatile immap_t *immap; immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */ if (request_8xxirq(FEC_INTERRUPT, fec_enet_interrupt, 0, "fec", dev) != 0) panic("Could not allocate FEC IRQ!"); #ifdef CONFIG_RPXCLASSIC /* Make Port C, bit 15 an input that causes interrupts. */ immap->im_ioport.iop_pcpar &= ~0x0001; immap->im_ioport.iop_pcdir &= ~0x0001; immap->im_ioport.iop_pcso &= ~0x0001; immap->im_ioport.iop_pcint |= 0x0001; cpm_install_handler(CPMVEC_PIO_PC15, mii_link_interrupt, dev); /* Make LEDS reflect Link status. */ *((uint *) RPX_CSR_ADDR) &= ~BCSR2_FETHLEDMODE; #endif #ifdef CONFIG_FADS if (request_8xxirq(SIU_IRQ2, mii_link_interrupt, 0, "mii", dev) != 0) panic("Could not allocate MII IRQ!"); #endif } static void __inline__ fec_get_mac(struct net_device *dev) { bd_t *bd; bd = (bd_t *)__res; memcpy(dev->dev_addr, bd->bi_enetaddr, ETH_ALEN); #ifdef CONFIG_RPXCLASSIC /* The Embedded Planet boards have only one MAC address in * the EEPROM, but can have two Ethernet ports. For the * FEC port, we create another address by setting one of * the address bits above something that would have (up to * now) been allocated. */ dev->dev_adrd[3] |= 0x80; #endif } static void __inline__ fec_set_mii(struct net_device *dev, struct fec_enet_private *fep) { extern uint _get_IMMR(void); volatile immap_t *immap; volatile fec_t *fecp; fecp = fep->hwp; immap = (immap_t *)IMAP_ADDR; /* pointer to internal registers */ /* Configure all of port D for MII. */ immap->im_ioport.iop_pdpar = 0x1fff; /* Bits moved from Rev. D onward. */ if ((_get_IMMR() & 0xffff) < 0x0501) immap->im_ioport.iop_pddir = 0x1c58; /* Pre rev. D */ else immap->im_ioport.iop_pddir = 0x1fff; /* Rev. D and later */ /* Set MII speed to 2.5 MHz */ fecp->fec_mii_speed = fep->phy_speed = ((bd->bi_busfreq * 1000000) / 2500000) & 0x7e; } static void __inline__ fec_enable_phy_intr(void) { volatile fec_t *fecp; fecp = fep->hwp; /* Enable MII command finished interrupt */ fecp->fec_ivec = (FEC_INTERRUPT/2) << 29; } static void __inline__ fec_disable_phy_intr(void) { } static void __inline__ fec_phy_ack_intr(void) { } static void __inline__ fec_localhw_setup(void) { volatile fec_t *fecp; fecp = fep->hwp; fecp->fec_r_hash = PKT_MAXBUF_SIZE; /* Enable big endian and don't care about SDMA FC. */ fecp->fec_fun_code = 0x78000000; } static void __inline__ fec_uncache(unsigned long addr) { pte_t *pte; pte = va_to_pte(mem_addr); pte_val(*pte) |= _PAGE_NO_CACHE; flush_tlb_page(init_mm.mmap, mem_addr); } #endif /* ------------------------------------------------------------------------- */ static void mii_display_status(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); volatile uint *s = &(fep->phy_status); if (!fep->link && !fep->old_link) { /* Link is still down - don't print anything */ return; } printk("%s: status: ", dev->name); if (!fep->link) { printk("link down"); } else { printk("link up"); switch(*s & PHY_STAT_SPMASK) { case PHY_STAT_100FDX: printk(", 100MBit Full Duplex"); break; case PHY_STAT_100HDX: printk(", 100MBit Half Duplex"); break; case PHY_STAT_10FDX: printk(", 10MBit Full Duplex"); break; case PHY_STAT_10HDX: printk(", 10MBit Half Duplex"); break; default: printk(", Unknown speed/duplex"); } if (*s & PHY_STAT_ANC) printk(", auto-negotiation complete"); } if (*s & PHY_STAT_FAULT) printk(", remote fault"); printk(".\n"); } static void mii_display_config(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); uint status = fep->phy_status; /* ** When we get here, phy_task is already removed from ** the workqueue. It is thus safe to allow to reuse it. */ fep->mii_phy_task_queued = 0; printk("%s: config: auto-negotiation ", dev->name); if (status & PHY_CONF_ANE) printk("on"); else printk("off"); if (status & PHY_CONF_100FDX) printk(", 100FDX"); if (status & PHY_CONF_100HDX) printk(", 100HDX"); if (status & PHY_CONF_10FDX) printk(", 10FDX"); if (status & PHY_CONF_10HDX) printk(", 10HDX"); if (!(status & PHY_CONF_SPMASK)) printk(", No speed/duplex selected?"); if (status & PHY_CONF_LOOP) printk(", loopback enabled"); printk(".\n"); fep->sequence_done = 1; } static void mii_relink(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); int duplex; /* ** When we get here, phy_task is already removed from ** the workqueue. It is thus safe to allow to reuse it. */ fep->mii_phy_task_queued = 0; fep->link = (fep->phy_status & PHY_STAT_LINK) ? 1 : 0; mii_display_status(dev); fep->old_link = fep->link; if (fep->link) { duplex = 0; if (fep->phy_status & (PHY_STAT_100FDX | PHY_STAT_10FDX)) duplex = 1; fec_restart(dev, duplex); } else fec_stop(dev); #if 0 enable_irq(fep->mii_irq); #endif } /* mii_queue_relink is called in interrupt context from mii_link_interrupt */ static void mii_queue_relink(uint mii_reg, struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); /* ** We cannot queue phy_task twice in the workqueue. It ** would cause an endless loop in the workqueue. ** Fortunately, if the last mii_relink entry has not yet been ** executed now, it will do the job for the current interrupt, ** which is just what we want. */ if (fep->mii_phy_task_queued) return; fep->mii_phy_task_queued = 1; INIT_WORK(&fep->phy_task, (void*)mii_relink, dev); schedule_work(&fep->phy_task); } /* mii_queue_config is called in interrupt context from fec_enet_mii */ static void mii_queue_config(uint mii_reg, struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); if (fep->mii_phy_task_queued) return; fep->mii_phy_task_queued = 1; INIT_WORK(&fep->phy_task, (void*)mii_display_config, dev); schedule_work(&fep->phy_task); } phy_cmd_t const phy_cmd_relink[] = { { mk_mii_read(MII_REG_CR), mii_queue_relink }, { mk_mii_end, } }; phy_cmd_t const phy_cmd_config[] = { { mk_mii_read(MII_REG_CR), mii_queue_config }, { mk_mii_end, } }; /* Read remainder of PHY ID. */ static void mii_discover_phy3(uint mii_reg, struct net_device *dev) { struct fec_enet_private *fep; int i; fep = netdev_priv(dev); fep->phy_id |= (mii_reg & 0xffff); printk("fec: PHY @ 0x%x, ID 0x%08x", fep->phy_addr, fep->phy_id); for(i = 0; phy_info[i]; i++) { if(phy_info[i]->id == (fep->phy_id >> 4)) break; } if (phy_info[i]) printk(" -- %s\n", phy_info[i]->name); else printk(" -- unknown PHY!\n"); fep->phy = phy_info[i]; fep->phy_id_done = 1; } /* Scan all of the MII PHY addresses looking for someone to respond * with a valid ID. This usually happens quickly. */ static void mii_discover_phy(uint mii_reg, struct net_device *dev) { struct fec_enet_private *fep; volatile fec_t *fecp; uint phytype; fep = netdev_priv(dev); fecp = fep->hwp; if (fep->phy_addr < 32) { if ((phytype = (mii_reg & 0xffff)) != 0xffff && phytype != 0) { /* Got first part of ID, now get remainder. */ fep->phy_id = phytype << 16; mii_queue(dev, mk_mii_read(MII_REG_PHYIR2), mii_discover_phy3); } else { fep->phy_addr++; mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy); } } else { printk("FEC: No PHY device found.\n"); /* Disable external MII interface */ fecp->fec_mii_speed = fep->phy_speed = 0; fec_disable_phy_intr(); } } /* This interrupt occurs when the PHY detects a link change. */ #ifdef CONFIG_RPXCLASSIC static void mii_link_interrupt(void *dev_id) #else static irqreturn_t mii_link_interrupt(int irq, void * dev_id) #endif { struct net_device *dev = dev_id; struct fec_enet_private *fep = netdev_priv(dev); fec_phy_ack_intr(); #if 0 disable_irq(fep->mii_irq); /* disable now, enable later */ #endif mii_do_cmd(dev, fep->phy->ack_int); mii_do_cmd(dev, phy_cmd_relink); /* restart and display status */ return IRQ_HANDLED; } static int fec_enet_open(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); /* I should reset the ring buffers here, but I don't yet know * a simple way to do that. */ fec_set_mac_address(dev); fep->sequence_done = 0; fep->link = 0; if (fep->phy) { mii_do_cmd(dev, fep->phy->ack_int); mii_do_cmd(dev, fep->phy->config); mii_do_cmd(dev, phy_cmd_config); /* display configuration */ /* Poll until the PHY tells us its configuration * (not link state). * Request is initiated by mii_do_cmd above, but answer * comes by interrupt. * This should take about 25 usec per register at 2.5 MHz, * and we read approximately 5 registers. */ while(!fep->sequence_done) schedule(); mii_do_cmd(dev, fep->phy->startup); /* Set the initial link state to true. A lot of hardware * based on this device does not implement a PHY interrupt, * so we are never notified of link change. */ fep->link = 1; } else { fep->link = 1; /* lets just try it and see */ /* no phy, go full duplex, it's most likely a hub chip */ fec_restart(dev, 1); } netif_start_queue(dev); fep->opened = 1; return 0; /* Success */ } static int fec_enet_close(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); /* Don't know what to do yet. */ fep->opened = 0; netif_stop_queue(dev); fec_stop(dev); return 0; } static struct net_device_stats *fec_enet_get_stats(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); return &fep->stats; } /* Set or clear the multicast filter for this adaptor. * Skeleton taken from sunlance driver. * The CPM Ethernet implementation allows Multicast as well as individual * MAC address filtering. Some of the drivers check to make sure it is * a group multicast address, and discard those that are not. I guess I * will do the same for now, but just remove the test if you want * individual filtering as well (do the upper net layers want or support * this kind of feature?). */ #define HASH_BITS 6 /* #bits in hash */ #define CRC32_POLY 0xEDB88320 static void set_multicast_list(struct net_device *dev) { struct fec_enet_private *fep; volatile fec_t *ep; struct dev_mc_list *dmi; unsigned int i, j, bit, data, crc; unsigned char hash; fep = netdev_priv(dev); ep = fep->hwp; if (dev->flags&IFF_PROMISC) { ep->fec_r_cntrl |= 0x0008; } else { ep->fec_r_cntrl &= ~0x0008; if (dev->flags & IFF_ALLMULTI) { /* Catch all multicast addresses, so set the * filter to all 1's. */ ep->fec_hash_table_high = 0xffffffff; ep->fec_hash_table_low = 0xffffffff; } else { /* Clear filter and add the addresses in hash register. */ ep->fec_hash_table_high = 0; ep->fec_hash_table_low = 0; dmi = dev->mc_list; for (j = 0; j < dev->mc_count; j++, dmi = dmi->next) { /* Only support group multicast for now. */ if (!(dmi->dmi_addr[0] & 1)) continue; /* calculate crc32 value of mac address */ crc = 0xffffffff; for (i = 0; i < dmi->dmi_addrlen; i++) { data = dmi->dmi_addr[i]; for (bit = 0; bit < 8; bit++, data >>= 1) { crc = (crc >> 1) ^ (((crc ^ data) & 1) ? CRC32_POLY : 0); } } /* only upper 6 bits (HASH_BITS) are used which point to specific bit in he hash registers */ hash = (crc >> (32 - HASH_BITS)) & 0x3f; if (hash > 31) ep->fec_hash_table_high |= 1 << (hash - 32); else ep->fec_hash_table_low |= 1 << hash; } } } } /* Set a MAC change in hardware. */ static void fec_set_mac_address(struct net_device *dev) { volatile fec_t *fecp; fecp = ((struct fec_enet_private *)netdev_priv(dev))->hwp; /* Set station address. */ fecp->fec_addr_low = dev->dev_addr[3] | (dev->dev_addr[2] << 8) | (dev->dev_addr[1] << 16) | (dev->dev_addr[0] << 24); fecp->fec_addr_high = (dev->dev_addr[5] << 16) | (dev->dev_addr[4] << 24); } /* Initialize the FEC Ethernet on 860T (or ColdFire 5272). */ /* * XXX: We need to clean up on failure exits here. */ int __init fec_enet_init(struct net_device *dev) { struct fec_enet_private *fep = netdev_priv(dev); unsigned long mem_addr; volatile cbd_t *bdp; cbd_t *cbd_base; volatile fec_t *fecp; int i, j; static int index = 0; /* Only allow us to be probed once. */ if (index >= FEC_MAX_PORTS) return -ENXIO; /* Allocate memory for buffer descriptors. */ mem_addr = __get_free_page(GFP_KERNEL); if (mem_addr == 0) { printk("FEC: allocate descriptor memory failed?\n"); return -ENOMEM; } /* Create an Ethernet device instance. */ fecp = (volatile fec_t *) fec_hw[index]; fep->index = index; fep->hwp = fecp; /* Whack a reset. We should wait for this. */ fecp->fec_ecntrl = 1; udelay(10); /* Set the Ethernet address. If using multiple Enets on the 8xx, * this needs some work to get unique addresses. * * This is our default MAC address unless the user changes * it via eth_mac_addr (our dev->set_mac_addr handler). */ fec_get_mac(dev); cbd_base = (cbd_t *)mem_addr; /* XXX: missing check for allocation failure */ fec_uncache(mem_addr); /* Set receive and transmit descriptor base. */ fep->rx_bd_base = cbd_base; fep->tx_bd_base = cbd_base + RX_RING_SIZE; fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; fep->cur_rx = fep->rx_bd_base; fep->skb_cur = fep->skb_dirty = 0; /* Initialize the receive buffer descriptors. */ bdp = fep->rx_bd_base; for (i=0; icbd_sc = BD_ENET_RX_EMPTY; bdp->cbd_bufaddr = __pa(mem_addr); mem_addr += FEC_ENET_RX_FRSIZE; bdp++; } } /* Set the last buffer to wrap. */ bdp--; bdp->cbd_sc |= BD_SC_WRAP; /* ...and the same for transmmit. */ bdp = fep->tx_bd_base; for (i=0, j=FEC_ENET_TX_FRPPG; i= FEC_ENET_TX_FRPPG) { mem_addr = __get_free_page(GFP_KERNEL); j = 1; } else { mem_addr += FEC_ENET_TX_FRSIZE; j++; } fep->tx_bounce[i] = (unsigned char *) mem_addr; /* Initialize the BD for every fragment in the page. */ bdp->cbd_sc = 0; bdp->cbd_bufaddr = 0; bdp++; } /* Set the last buffer to wrap. */ bdp--; bdp->cbd_sc |= BD_SC_WRAP; /* Set receive and transmit descriptor base. */ fecp->fec_r_des_start = __pa((uint)(fep->rx_bd_base)); fecp->fec_x_des_start = __pa((uint)(fep->tx_bd_base)); /* Install our interrupt handlers. This varies depending on * the architecture. */ fec_request_intrs(dev); fecp->fec_hash_table_high = 0; fecp->fec_hash_table_low = 0; fecp->fec_r_buff_size = PKT_MAXBLR_SIZE; fecp->fec_ecntrl = 2; fecp->fec_r_des_active = 0; dev->base_addr = (unsigned long)fecp; /* The FEC Ethernet specific entries in the device structure. */ dev->open = fec_enet_open; dev->hard_start_xmit = fec_enet_start_xmit; dev->tx_timeout = fec_timeout; dev->watchdog_timeo = TX_TIMEOUT; dev->stop = fec_enet_close; dev->get_stats = fec_enet_get_stats; dev->set_multicast_list = set_multicast_list; for (i=0; ifec_ievent = 0xffc00000; fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_TXB | FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII); /* Queue up command to detect the PHY and initialize the * remainder of the interface. */ fep->phy_id_done = 0; fep->phy_addr = 0; mii_queue(dev, mk_mii_read(MII_REG_PHYIR1), mii_discover_phy); index++; return 0; } /* This function is called to start or restart the FEC during a link * change. This only happens when switching between half and full * duplex. */ static void fec_restart(struct net_device *dev, int duplex) { struct fec_enet_private *fep; volatile cbd_t *bdp; volatile fec_t *fecp; int i; fep = netdev_priv(dev); fecp = fep->hwp; /* Whack a reset. We should wait for this. */ fecp->fec_ecntrl = 1; udelay(10); /* Clear any outstanding interrupt. */ fecp->fec_ievent = 0xffc00000; fec_enable_phy_intr(); /* Set station address. */ fec_set_mac_address(dev); /* Reset all multicast. */ fecp->fec_hash_table_high = 0; fecp->fec_hash_table_low = 0; /* Set maximum receive buffer size. */ fecp->fec_r_buff_size = PKT_MAXBLR_SIZE; fec_localhw_setup(); /* Set receive and transmit descriptor base. */ fecp->fec_r_des_start = __pa((uint)(fep->rx_bd_base)); fecp->fec_x_des_start = __pa((uint)(fep->tx_bd_base)); fep->dirty_tx = fep->cur_tx = fep->tx_bd_base; fep->cur_rx = fep->rx_bd_base; /* Reset SKB transmit buffers. */ fep->skb_cur = fep->skb_dirty = 0; for (i=0; i<=TX_RING_MOD_MASK; i++) { if (fep->tx_skbuff[i] != NULL) { dev_kfree_skb_any(fep->tx_skbuff[i]); fep->tx_skbuff[i] = NULL; } } /* Initialize the receive buffer descriptors. */ bdp = fep->rx_bd_base; for (i=0; icbd_sc = BD_ENET_RX_EMPTY; bdp++; } /* Set the last buffer to wrap. */ bdp--; bdp->cbd_sc |= BD_SC_WRAP; /* ...and the same for transmmit. */ bdp = fep->tx_bd_base; for (i=0; icbd_sc = 0; bdp->cbd_bufaddr = 0; bdp++; } /* Set the last buffer to wrap. */ bdp--; bdp->cbd_sc |= BD_SC_WRAP; /* Enable MII mode. */ if (duplex) { fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x04;/* MII enable */ fecp->fec_x_cntrl = 0x04; /* FD enable */ } else { /* MII enable|No Rcv on Xmit */ fecp->fec_r_cntrl = OPT_FRAME_SIZE | 0x06; fecp->fec_x_cntrl = 0x00; } fep->full_duplex = duplex; /* Set MII speed. */ fecp->fec_mii_speed = fep->phy_speed; /* And last, enable the transmit and receive processing. */ fecp->fec_ecntrl = 2; fecp->fec_r_des_active = 0; /* Enable interrupts we wish to service. */ fecp->fec_imask = (FEC_ENET_TXF | FEC_ENET_TXB | FEC_ENET_RXF | FEC_ENET_RXB | FEC_ENET_MII); } static void fec_stop(struct net_device *dev) { volatile fec_t *fecp; struct fec_enet_private *fep; fep = netdev_priv(dev); fecp = fep->hwp; /* ** We cannot expect a graceful transmit stop without link !!! */ if (fep->link) { fecp->fec_x_cntrl = 0x01; /* Graceful transmit stop */ udelay(10); if (!(fecp->fec_ievent & FEC_ENET_GRA)) printk("fec_stop : Graceful transmit stop did not complete !\n"); } /* Whack a reset. We should wait for this. */ fecp->fec_ecntrl = 1; udelay(10); /* Clear outstanding MII command interrupts. */ fecp->fec_ievent = FEC_ENET_MII; fec_enable_phy_intr(); fecp->fec_imask = FEC_ENET_MII; fecp->fec_mii_speed = fep->phy_speed; } static int __init fec_enet_module_init(void) { struct net_device *dev; int i, j, err; printk("FEC ENET Version 0.2\n"); for (i = 0; (i < FEC_MAX_PORTS); i++) { dev = alloc_etherdev(sizeof(struct fec_enet_private)); if (!dev) return -ENOMEM; err = fec_enet_init(dev); if (err) { free_netdev(dev); continue; } if (register_netdev(dev) != 0) { /* XXX: missing cleanup here */ free_netdev(dev); return -EIO; } printk("%s: ethernet ", dev->name); for (j = 0; (j < 5); j++) printk("%02x:", dev->dev_addr[j]); printk("%02x\n", dev->dev_addr[5]); } return 0; } module_init(fec_enet_module_init); MODULE_LICENSE("GPL");