/****************************************************************************** * * Name: ski2c.c * Project: Gigabit Ethernet Adapters, TWSI-Module * Version: $Revision: 1.59 $ * Date: $Date: 2003/10/20 09:07:25 $ * Purpose: Functions to access Voltage and Temperature Sensor * ******************************************************************************/ /****************************************************************************** * * (C)Copyright 1998-2002 SysKonnect. * (C)Copyright 2002-2003 Marvell. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * The information in this file is provided "AS IS" without warranty. * ******************************************************************************/ /* * I2C Protocol */ #if (defined(DEBUG) || ((!defined(LINT)) && (!defined(SK_SLIM)))) static const char SysKonnectFileId[] = "@(#) $Id: ski2c.c,v 1.59 2003/10/20 09:07:25 rschmidt Exp $ (C) Marvell. "; #endif #include "h/skdrv1st.h" /* Driver Specific Definitions */ #include "h/lm80.h" #include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */ #ifdef __C2MAN__ /* I2C protocol implementation. General Description: The I2C protocol is used for the temperature sensors and for the serial EEPROM which hold the configuration. This file covers functions that allow to read write and do some bulk requests a specified I2C address. The Genesis has 2 I2C buses. One for the EEPROM which holds the VPD Data and one for temperature and voltage sensor. The following picture shows the I2C buses, I2C devices and their control registers. Note: The VPD functions are in skvpd.c . . PCI Config I2C Bus for VPD Data: . . +------------+ . | VPD EEPROM | . +------------+ . | . | <-- I2C . | . +-----------+-----------+ . | | . +-----------------+ +-----------------+ . | PCI_VPD_ADR_REG | | PCI_VPD_DAT_REG | . +-----------------+ +-----------------+ . . . I2C Bus for LM80 sensor: . . +-----------------+ . | Temperature and | . | Voltage Sensor | . | LM80 | . +-----------------+ . | . | . I2C --> | . | . +----+ . +-------------->| OR |<--+ . | +----+ | . +------+------+ | . | | | . +--------+ +--------+ +----------+ . | B2_I2C | | B2_I2C | | B2_I2C | . | _CTRL | | _DATA | | _SW | . +--------+ +--------+ +----------+ . The I2C bus may be driven by the B2_I2C_SW or by the B2_I2C_CTRL and B2_I2C_DATA registers. For driver software it is recommended to use the I2C control and data register, because I2C bus timing is done by the ASIC and an interrupt may be received when the I2C request is completed. Clock Rate Timing: MIN MAX generated by VPD EEPROM: 50 kHz 100 kHz HW LM80 over I2C Ctrl/Data reg. 50 kHz 100 kHz HW LM80 over B2_I2C_SW register 0 400 kHz SW Note: The clock generated by the hardware is dependend on the PCI clock. If the PCI bus clock is 33 MHz, the I2C/VPD clock is 50 kHz. */ intro() {} #endif #ifdef SK_DIAG /* * I2C Fast Mode timing values used by the LM80. * If new devices are added to the I2C bus the timing values have to be checked. */ #ifndef I2C_SLOW_TIMING #define T_CLK_LOW 1300L /* clock low time in ns */ #define T_CLK_HIGH 600L /* clock high time in ns */ #define T_DATA_IN_SETUP 100L /* data in Set-up Time */ #define T_START_HOLD 600L /* start condition hold time */ #define T_START_SETUP 600L /* start condition Set-up time */ #define T_STOP_SETUP 600L /* stop condition Set-up time */ #define T_BUS_IDLE 1300L /* time the bus must free after Tx */ #define T_CLK_2_DATA_OUT 900L /* max. clock low to data output valid */ #else /* I2C_SLOW_TIMING */ /* I2C Standard Mode Timing */ #define T_CLK_LOW 4700L /* clock low time in ns */ #define T_CLK_HIGH 4000L /* clock high time in ns */ #define T_DATA_IN_SETUP 250L /* data in Set-up Time */ #define T_START_HOLD 4000L /* start condition hold time */ #define T_START_SETUP 4700L /* start condition Set-up time */ #define T_STOP_SETUP 4000L /* stop condition Set-up time */ #define T_BUS_IDLE 4700L /* time the bus must free after Tx */ #endif /* !I2C_SLOW_TIMING */ #define NS2BCLK(x) (((x)*125)/10000) /* * I2C Wire Operations * * About I2C_CLK_LOW(): * * The Data Direction bit (I2C_DATA_DIR) has to be set to input when setting * clock to low, to prevent the ASIC and the I2C data client from driving the * serial data line simultaneously (ASIC: last bit of a byte = '1', I2C client * send an 'ACK'). See also Concentrator Bugreport No. 10192. */ #define I2C_DATA_HIGH(IoC) SK_I2C_SET_BIT(IoC, I2C_DATA) #define I2C_DATA_LOW(IoC) SK_I2C_CLR_BIT(IoC, I2C_DATA) #define I2C_DATA_OUT(IoC) SK_I2C_SET_BIT(IoC, I2C_DATA_DIR) #define I2C_DATA_IN(IoC) SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA) #define I2C_CLK_HIGH(IoC) SK_I2C_SET_BIT(IoC, I2C_CLK) #define I2C_CLK_LOW(IoC) SK_I2C_CLR_BIT(IoC, I2C_CLK | I2C_DATA_DIR) #define I2C_START_COND(IoC) SK_I2C_CLR_BIT(IoC, I2C_CLK) #define NS2CLKT(x) ((x*125L)/10000) /*--------------- I2C Interface Register Functions --------------- */ /* * sending one bit */ void SkI2cSndBit( SK_IOC IoC, /* I/O Context */ SK_U8 Bit) /* Bit to send */ { I2C_DATA_OUT(IoC); if (Bit) { I2C_DATA_HIGH(IoC); } else { I2C_DATA_LOW(IoC); } SkDgWaitTime(IoC, NS2BCLK(T_DATA_IN_SETUP)); I2C_CLK_HIGH(IoC); SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH)); I2C_CLK_LOW(IoC); } /* SkI2cSndBit*/ /* * Signal a start to the I2C Bus. * * A start is signaled when data goes to low in a high clock cycle. * * Ends with Clock Low. * * Status: not tested */ void SkI2cStart( SK_IOC IoC) /* I/O Context */ { /* Init data and Clock to output lines */ /* Set Data high */ I2C_DATA_OUT(IoC); I2C_DATA_HIGH(IoC); /* Set Clock high */ I2C_CLK_HIGH(IoC); SkDgWaitTime(IoC, NS2BCLK(T_START_SETUP)); /* Set Data Low */ I2C_DATA_LOW(IoC); SkDgWaitTime(IoC, NS2BCLK(T_START_HOLD)); /* Clock low without Data to Input */ I2C_START_COND(IoC); SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW)); } /* SkI2cStart */ void SkI2cStop( SK_IOC IoC) /* I/O Context */ { /* Init data and Clock to output lines */ /* Set Data low */ I2C_DATA_OUT(IoC); I2C_DATA_LOW(IoC); SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT)); /* Set Clock high */ I2C_CLK_HIGH(IoC); SkDgWaitTime(IoC, NS2BCLK(T_STOP_SETUP)); /* * Set Data High: Do it by setting the Data Line to Input. * Because of a pull up resistor the Data Line * floods to high. */ I2C_DATA_IN(IoC); /* * When I2C activity is stopped * o DATA should be set to input and * o CLOCK should be set to high! */ SkDgWaitTime(IoC, NS2BCLK(T_BUS_IDLE)); } /* SkI2cStop */ /* * Receive just one bit via the I2C bus. * * Note: Clock must be set to LOW before calling this function. * * Returns The received bit. */ int SkI2cRcvBit( SK_IOC IoC) /* I/O Context */ { int Bit; SK_U8 I2cSwCtrl; /* Init data as input line */ I2C_DATA_IN(IoC); SkDgWaitTime(IoC, NS2BCLK(T_CLK_2_DATA_OUT)); I2C_CLK_HIGH(IoC); SkDgWaitTime(IoC, NS2BCLK(T_CLK_HIGH)); SK_I2C_GET_SW(IoC, &I2cSwCtrl); Bit = (I2cSwCtrl & I2C_DATA) ? 1 : 0; I2C_CLK_LOW(IoC); SkDgWaitTime(IoC, NS2BCLK(T_CLK_LOW-T_CLK_2_DATA_OUT)); return(Bit); } /* SkI2cRcvBit */ /* * Receive an ACK. * * returns 0 If acknowledged * 1 in case of an error */ int SkI2cRcvAck( SK_IOC IoC) /* I/O Context */ { /* * Received bit must be zero. */ return(SkI2cRcvBit(IoC) != 0); } /* SkI2cRcvAck */ /* * Send an NACK. */ void SkI2cSndNAck( SK_IOC IoC) /* I/O Context */ { /* * Received bit must be zero. */ SkI2cSndBit(IoC, 1); } /* SkI2cSndNAck */ /* * Send an ACK. */ void SkI2cSndAck( SK_IOC IoC) /* I/O Context */ { /* * Received bit must be zero. */ SkI2cSndBit(IoC, 0); } /* SkI2cSndAck */ /* * Send one byte to the I2C device and wait for ACK. * * Return acknowleged status. */ int SkI2cSndByte( SK_IOC IoC, /* I/O Context */ int Byte) /* byte to send */ { int i; for (i = 0; i < 8; i++) { if (Byte & (1<<(7-i))) { SkI2cSndBit(IoC, 1); } else { SkI2cSndBit(IoC, 0); } } return(SkI2cRcvAck(IoC)); } /* SkI2cSndByte */ /* * Receive one byte and ack it. * * Return byte. */ int SkI2cRcvByte( SK_IOC IoC, /* I/O Context */ int Last) /* Last Byte Flag */ { int i; int Byte = 0; for (i = 0; i < 8; i++) { Byte <<= 1; Byte |= SkI2cRcvBit(IoC); } if (Last) { SkI2cSndNAck(IoC); } else { SkI2cSndAck(IoC); } return(Byte); } /* SkI2cRcvByte */ /* * Start dialog and send device address * * Return 0 if acknowleged, 1 in case of an error */ int SkI2cSndDev( SK_IOC IoC, /* I/O Context */ int Addr, /* Device Address */ int Rw) /* Read / Write Flag */ { SkI2cStart(IoC); Rw = ~Rw; Rw &= I2C_WRITE; return(SkI2cSndByte(IoC, (Addr<<1) | Rw)); } /* SkI2cSndDev */ #endif /* SK_DIAG */ /*----------------- I2C CTRL Register Functions ----------*/ /* * waits for a completion of an I2C transfer * * returns 0: success, transfer completes * 1: error, transfer does not complete, I2C transfer * killed, wait loop terminated. */ static int SkI2cWait( SK_AC *pAC, /* Adapter Context */ SK_IOC IoC, /* I/O Context */ int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */ { SK_U64 StartTime; SK_U64 CurrentTime; SK_U32 I2cCtrl; StartTime = SkOsGetTime(pAC); do { CurrentTime = SkOsGetTime(pAC); if (CurrentTime - StartTime > SK_TICKS_PER_SEC / 8) { SK_I2C_STOP(IoC); #ifndef SK_DIAG SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E002, SKERR_I2C_E002MSG); #endif /* !SK_DIAG */ return(1); } SK_I2C_GET_CTL(IoC, &I2cCtrl); #ifdef xYUKON_DBG printf("StartTime=%lu, CurrentTime=%lu\n", StartTime, CurrentTime); if (kbhit()) { return(1); } #endif /* YUKON_DBG */ } while ((I2cCtrl & I2C_FLAG) == (SK_U32)Event << 31); return(0); } /* SkI2cWait */ /* * waits for a completion of an I2C transfer * * Returns * Nothing */ void SkI2cWaitIrq( SK_AC *pAC, /* Adapter Context */ SK_IOC IoC) /* I/O Context */ { SK_SENSOR *pSen; SK_U64 StartTime; SK_U32 IrqSrc; pSen = &pAC->I2c.SenTable[pAC->I2c.CurrSens]; if (pSen->SenState == SK_SEN_IDLE) { return; } StartTime = SkOsGetTime(pAC); do { if (SkOsGetTime(pAC) - StartTime > SK_TICKS_PER_SEC / 8) { SK_I2C_STOP(IoC); #ifndef SK_DIAG SK_ERR_LOG(pAC, SK_ERRCL_SW, SKERR_I2C_E016, SKERR_I2C_E016MSG); #endif /* !SK_DIAG */ return; } SK_IN32(IoC, B0_ISRC, &IrqSrc); } while ((IrqSrc & IS_I2C_READY) == 0); pSen->SenState = SK_SEN_IDLE; return; } /* SkI2cWaitIrq */ /* * writes a single byte or 4 bytes into the I2C device * * returns 0: success * 1: error */ static int SkI2cWrite( SK_AC *pAC, /* Adapter Context */ SK_IOC IoC, /* I/O Context */ SK_U32 I2cData, /* I2C Data to write */ int I2cDev, /* I2C Device Address */ int I2cDevSize, /* I2C Device Size (e.g. I2C_025K_DEV or I2C_2K_DEV) */ int I2cReg, /* I2C Device Register Address */ int I2cBurst) /* I2C Burst Flag */ { SK_OUT32(IoC, B2_I2C_DATA, I2cData); SK_I2C_CTL(IoC, I2C_WRITE, I2cDev, I2cDevSize, I2cReg, I2cBurst); return(SkI2cWait(pAC, IoC, I2C_WRITE)); } /* SkI2cWrite*/ #ifdef SK_DIAG /* * reads a single byte or 4 bytes from the I2C device * * returns the word read */ SK_U32 SkI2cRead( SK_AC *pAC, /* Adapter Context */ SK_IOC IoC, /* I/O Context */ int I2cDev, /* I2C Device Address */ int I2cDevSize, /* I2C Device Size (e.g. I2C_025K_DEV or I2C_2K_DEV) */ int I2cReg, /* I2C Device Register Address */ int I2cBurst) /* I2C Burst Flag */ { SK_U32 Data; SK_OUT32(IoC, B2_I2C_DATA, 0); SK_I2C_CTL(IoC, I2C_READ, I2cDev, I2cDevSize, I2cReg, I2cBurst); if (SkI2cWait(pAC, IoC, I2C_READ) != 0) { w_print("%s\n", SKERR_I2C_E002MSG); } SK_IN32(IoC, B2_I2C_DATA, &Data); return(Data); } /* SkI2cRead */ #endif /* SK_DIAG */ /* * read a sensor's value * * This function reads a sensor's value from the I2C sensor chip. The sensor * is defined by its index into the sensors database in the struct pAC points * to. * Returns * 1 if the read is completed * 0 if the read must be continued (I2C Bus still allocated) */ static int SkI2cReadSensor( SK_AC *pAC, /* Adapter Context */ SK_IOC IoC, /* I/O Context */ SK_SENSOR *pSen) /* Sensor to be read */ { if (pSen->SenRead != NULL) { return((*pSen->SenRead)(pAC, IoC, pSen)); } else { return(0); /* no success */ } } /* SkI2cReadSensor */ /* * Do the Init state 0 initialization */ static int SkI2cInit0( SK_AC *pAC) /* Adapter Context */ { int i; /* Begin with first sensor */ pAC->I2c.CurrSens = 0; /* Begin with timeout control for state machine */ pAC->I2c.TimerMode = SK_TIMER_WATCH_SM; /* Set sensor number to zero */ pAC->I2c.MaxSens = 0; #ifndef SK_DIAG /* Initialize Number of Dummy Reads */ pAC->I2c.DummyReads = SK_MAX_SENSORS; #endif for (i = 0; i < SK_MAX_SENSORS; i++) { pAC->I2c.SenTable[i].SenDesc = "unknown"; pAC->I2c.SenTable[i].SenType = SK_SEN_UNKNOWN; pAC->I2c.SenTable[i].SenThreErrHigh = 0; pAC->I2c.SenTable[i].SenThreErrLow = 0; pAC->I2c.SenTable[i].SenThreWarnHigh = 0; pAC->I2c.SenTable[i].SenThreWarnLow = 0; pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN; pAC->I2c.SenTable[i].SenInit = SK_SEN_DYN_INIT_NONE; pAC->I2c.SenTable[i].SenValue = 0; pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_NOT_PRESENT; pAC->I2c.SenTable[i].SenErrCts = 0; pAC->I2c.SenTable[i].SenBegErrTS = 0; pAC->I2c.SenTable[i].SenState = SK_SEN_IDLE; pAC->I2c.SenTable[i].SenRead = NULL; pAC->I2c.SenTable[i].SenDev = 0; } /* Now we are "INIT data"ed */ pAC->I2c.InitLevel = SK_INIT_DATA; return(0); } /* SkI2cInit0*/ /* * Do the init state 1 initialization * * initialize the following register of the LM80: * Configuration register: * - START, noINT, activeLOW, noINT#Clear, noRESET, noCI, noGPO#, noINIT * * Interrupt Mask Register 1: * - all interrupts are Disabled (0xff) * * Interrupt Mask Register 2: * - all interrupts are Disabled (0xff) Interrupt modi doesn't matter. * * Fan Divisor/RST_OUT register: * - Divisors set to 1 (bits 00), all others 0s. * * OS# Configuration/Temperature resolution Register: * - all 0s * */ static int SkI2cInit1( SK_AC *pAC, /* Adapter Context */ SK_IOC IoC) /* I/O Context */ { int i; SK_U8 I2cSwCtrl; SK_GEPORT *pPrt; /* GIni Port struct pointer */ if (pAC->I2c.InitLevel != SK_INIT_DATA) { /* ReInit not needed in I2C module */ return(0); } /* Set the Direction of I2C-Data Pin to IN */ SK_I2C_CLR_BIT(IoC, I2C_DATA_DIR | I2C_DATA); /* Check for 32-Bit Yukon with Low at I2C-Data Pin */ SK_I2C_GET_SW(IoC, &I2cSwCtrl); if ((I2cSwCtrl & I2C_DATA) == 0) { /* this is a 32-Bit board */ pAC->GIni.GIYukon32Bit = SK_TRUE; return(0); } /* Check for 64 Bit Yukon without sensors */ if (SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_CFG, 0) != 0) { return(0); } (void)SkI2cWrite(pAC, IoC, 0xffUL, LM80_ADDR, I2C_025K_DEV, LM80_IMSK_1, 0); (void)SkI2cWrite(pAC, IoC, 0xffUL, LM80_ADDR, I2C_025K_DEV, LM80_IMSK_2, 0); (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_FAN_CTRL, 0); (void)SkI2cWrite(pAC, IoC, 0, LM80_ADDR, I2C_025K_DEV, LM80_TEMP_CTRL, 0); (void)SkI2cWrite(pAC, IoC, (SK_U32)LM80_CFG_START, LM80_ADDR, I2C_025K_DEV, LM80_CFG, 0); /* * MaxSens has to be updated here, because PhyType is not * set when performing Init Level 0 */ pAC->I2c.MaxSens = 5; pPrt = &pAC->GIni.GP[0]; if (pAC->GIni.GIGenesis) { if (pPrt->PhyType == SK_PHY_BCOM) { if (pAC->GIni.GIMacsFound == 1) { pAC->I2c.MaxSens += 1; } else { pAC->I2c.MaxSens += 3; } } } else { pAC->I2c.MaxSens += 3; } for (i = 0; i < pAC->I2c.MaxSens; i++) { switch (i) { case 0: pAC->I2c.SenTable[i].SenDesc = "Temperature"; pAC->I2c.SenTable[i].SenType = SK_SEN_TEMP; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_TEMP_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_TEMP_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_TEMP_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_TEMP_LOW_ERR; pAC->I2c.SenTable[i].SenReg = LM80_TEMP_IN; break; case 1: pAC->I2c.SenTable[i].SenDesc = "Voltage PCI"; pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PCI_5V_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PCI_5V_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PCI_5V_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PCI_5V_LOW_ERR; pAC->I2c.SenTable[i].SenReg = LM80_VT0_IN; break; case 2: pAC->I2c.SenTable[i].SenDesc = "Voltage PCI-IO"; pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PCI_IO_5V_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PCI_IO_5V_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PCI_IO_3V3_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PCI_IO_3V3_LOW_ERR; pAC->I2c.SenTable[i].SenReg = LM80_VT1_IN; pAC->I2c.SenTable[i].SenInit = SK_SEN_DYN_INIT_PCI_IO; break; case 3: pAC->I2c.SenTable[i].SenDesc = "Voltage ASIC"; pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_VDD_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_VDD_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VDD_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VDD_LOW_ERR; pAC->I2c.SenTable[i].SenReg = LM80_VT2_IN; break; case 4: if (pAC->GIni.GIGenesis) { if (pPrt->PhyType == SK_PHY_BCOM) { pAC->I2c.SenTable[i].SenDesc = "Voltage PHY A PLL"; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR; } else { pAC->I2c.SenTable[i].SenDesc = "Voltage PMA"; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR; } } else { pAC->I2c.SenTable[i].SenDesc = "Voltage VAUX"; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_VAUX_3V3_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_VAUX_3V3_HIGH_WARN; if (pAC->GIni.GIVauxAvail) { pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VAUX_3V3_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VAUX_3V3_LOW_ERR; } else { pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_VAUX_0V_WARN_ERR; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_VAUX_0V_WARN_ERR; } } pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT; pAC->I2c.SenTable[i].SenReg = LM80_VT3_IN; break; case 5: if (pAC->GIni.GIGenesis) { pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5"; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR; } else { pAC->I2c.SenTable[i].SenDesc = "Voltage Core 1V5"; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_CORE_1V5_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_CORE_1V5_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_CORE_1V5_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_CORE_1V5_LOW_ERR; } pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT; pAC->I2c.SenTable[i].SenReg = LM80_VT4_IN; break; case 6: if (pAC->GIni.GIGenesis) { pAC->I2c.SenTable[i].SenDesc = "Voltage PHY B PLL"; } else { pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 3V3"; } pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PLL_3V3_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PLL_3V3_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PLL_3V3_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PLL_3V3_LOW_ERR; pAC->I2c.SenTable[i].SenReg = LM80_VT5_IN; break; case 7: if (pAC->GIni.GIGenesis) { pAC->I2c.SenTable[i].SenDesc = "Speed Fan"; pAC->I2c.SenTable[i].SenType = SK_SEN_FAN; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_FAN_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_FAN_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_FAN_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_FAN_LOW_ERR; pAC->I2c.SenTable[i].SenReg = LM80_FAN2_IN; } else { pAC->I2c.SenTable[i].SenDesc = "Voltage PHY 2V5"; pAC->I2c.SenTable[i].SenType = SK_SEN_VOLT; pAC->I2c.SenTable[i].SenThreErrHigh = SK_SEN_PHY_2V5_HIGH_ERR; pAC->I2c.SenTable[i].SenThreWarnHigh = SK_SEN_PHY_2V5_HIGH_WARN; pAC->I2c.SenTable[i].SenThreWarnLow = SK_SEN_PHY_2V5_LOW_WARN; pAC->I2c.SenTable[i].SenThreErrLow = SK_SEN_PHY_2V5_LOW_ERR; pAC->I2c.SenTable[i].SenReg = LM80_VT6_IN; } break; default: SK_ERR_LOG(pAC, SK_ERRCL_INIT | SK_ERRCL_SW, SKERR_I2C_E001, SKERR_I2C_E001MSG); break; } pAC->I2c.SenTable[i].SenValue = 0; pAC->I2c.SenTable[i].SenErrFlag = SK_SEN_ERR_OK; pAC->I2c.SenTable[i].SenErrCts = 0; pAC->I2c.SenTable[i].SenBegErrTS = 0; pAC->I2c.SenTable[i].SenState = SK_SEN_IDLE; pAC->I2c.SenTable[i].SenRead = SkLm80ReadSensor; pAC->I2c.SenTable[i].SenDev = LM80_ADDR; } #ifndef SK_DIAG pAC->I2c.DummyReads = pAC->I2c.MaxSens; #endif /* !SK_DIAG */ /* Clear I2C IRQ */ SK_OUT32(IoC, B2_I2C_IRQ, I2C_CLR_IRQ); /* Now we are I/O initialized */ pAC->I2c.InitLevel = SK_ write_sequnlock(&zone->span_seqlock); } static inline void zone_seqlock_init(struct zone *zone) { seqlock_init(&zone->span_seqlock); } extern int zone_grow_free_lists(struct zone *zone, unsigned long new_nr_pages); extern int zone_grow_waitqueues(struct zone *zone, unsigned long nr_pages); extern int add_one_highpage(struct page *page, int pfn, int bad_ppro); /* need some defines for these for archs that don't support it */ extern void online_page(struct page *page); /* VM interface that may be used by firmware interface */ extern int online_pages(unsigned long, unsigned long); extern void __offline_isolated_pages(unsigned long, unsigned long); extern int offline_pages(unsigned long, unsigned long, unsigned long); /* reasonably generic interface to expand the physical pages in a zone */ extern int __add_pages(int nid, struct zone *zone, unsigned long start_pfn, unsigned long nr_pages); extern int __remove_pages(struct zone *zone, unsigned long start_pfn, unsigned long nr_pages); #ifdef CONFIG_NUMA extern int memory_add_physaddr_to_nid(u64 start); #else static inline int memory_add_physaddr_to_nid(u64 start) { return 0; } #endif #ifdef CONFIG_HAVE_ARCH_NODEDATA_EXTENSION /* * For supporting node-hotadd, we have to allocate a new pgdat. * * If an arch has generic style NODE_DATA(), * node_data[nid] = kzalloc() works well. But it depends on the architecture. * * In general, generic_alloc_nodedata() is used. * Now, arch_free_nodedata() is just defined for error path of node_hot_add. * */ extern pg_data_t *arch_alloc_nodedata(int nid); extern void arch_free_nodedata(pg_data_t *pgdat); extern void arch_refresh_nodedata(int nid, pg_data_t *pgdat); #else /* CONFIG_HAVE_ARCH_NODEDATA_EXTENSION */ #define arch_alloc_nodedata(nid) generic_alloc_nodedata(nid) #define arch_free_nodedata(pgdat) generic_free_nodedata(pgdat) #ifdef CONFIG_NUMA /* * If ARCH_HAS_NODEDATA_EXTENSION=n, this func is used to allocate pgdat. * XXX: kmalloc_node() can't work well to get new node's memory at this time. * Because, pgdat for the new node is not allocated/initialized yet itself. * To use new node's memory, more consideration will be necessary. */ #define generic_alloc_nodedata(nid) \ ({ \ kzalloc(sizeof(pg_data_t), GFP_KERNEL); \ }) /* * This definition is just for error path in node hotadd. * For node hotremove, we have to replace this. */ #define generic_free_nodedata(pgdat) kfree(pgdat) extern pg_data_t *node_data[]; static inline void arch_refresh_nodedata(int nid, pg_data_t *pgdat) { node_data[nid] = pgdat; } #else /* !CONFIG_NUMA */ /* never called */ static inline pg_data_t *generic_alloc_nodedata(int nid) { BUG(); return NULL; } static inline void generic_free_nodedata(pg_data_t *pgdat) { } static inline void arch_refresh_nodedata(int nid, pg_data_t *pgdat) { } #endif /* CONFIG_NUMA */ #endif /* CONFIG_HAVE_ARCH_NODEDATA_EXTENSION */ #ifdef CONFIG_SPARSEMEM_VMEMMAP static inline void register_page_bootmem_info_node(struct pglist_data *pgdat) { } static inline void put_page_bootmem(struct page *page) { } #else extern void register_page_bootmem_info_node(struct pglist_data *pgdat); extern void put_page_bootmem(struct page *page); #endif #else /* ! CONFIG_MEMORY_HOTPLUG */ /* * Stub functions for when hotplug is off */ static inline void pgdat_resize_lock(struct pglist_data *