blob: f8a89793ac8cbb865dbedb2b70181236d2a4288d (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
|
#ifndef _ASM_X86_ACPI_H
#define _ASM_X86_ACPI_H
#ifdef CONFIG_X86_32
# include "acpi_32.h"
#else
# include "acpi_64.h"
#endif
#include <asm/processor.h>
/*
* Check if the CPU can handle C2 and deeper
*/
static inline unsigned int acpi_processor_cstate_check(unsigned int max_cstate)
{
/*
* Early models (<=5) of AMD Opterons are not supposed to go into
* C2 state.
*
* Steppings 0x0A and later are good
*/
if (boot_cpu_data.x86 == 0x0F &&
boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
boot_cpu_data.x86_model <= 0x05 &&
boot_cpu_data.x86_mask < 0x0A)
return 1;
else
return max_cstate;
}
#endif
|
