blob: 727634d886cecdef1fc859e0889d23dbaf7f289b (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
|
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 1999 by Kaz Kojima
*
* Defitions for the address spaces of the SH-4 CPUs.
*/
#ifndef __ASM_CPU_SH4_ADDRSPACE_H
#define __ASM_CPU_SH4_ADDRSPACE_H
/* Detailed P4SEG */
#define P4SEG_STORE_QUE (P4SEG)
#define P4SEG_IC_ADDR 0xf0000000
#define P4SEG_IC_DATA 0xf1000000
#define P4SEG_ITLB_ADDR 0xf2000000
#define P4SEG_ITLB_DATA 0xf3000000
#define P4SEG_OC_ADDR 0xf4000000
#define P4SEG_OC_DATA 0xf5000000
#define P4SEG_TLB_ADDR 0xf6000000
#define P4SEG_TLB_DATA 0xf7000000
#define P4SEG_REG_BASE 0xff000000
#endif /* __ASM_CPU_SH4_ADDRSPACE_H */
|
