blob: 8816f7f9cee15add2e5614d281db721c374c0392 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
/* linux/include/asm-arm/arch-s3c2410/nand.h
*
* Copyright (c) 2004 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
* S3C2410 - NAND device controller platfrom_device info
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/* struct s3c2410_nand_set
*
* define an set of one or more nand chips registered with an unique mtd
*
* nr_chips = number of chips in this set
* nr_partitions = number of partitions pointed to be partitoons (or zero)
* name = name of set (optional)
* nr_map = map for low-layer logical to physical chip numbers (option)
* partitions = mtd partition list
*/
struct s3c2410_nand_set {
int nr_chips;
int nr_partitions;
char *name;
int *nr_map;
struct mtd_partition *partitions;
};
struct s3c2410_platform_nand {
/* timing information for controller, all times in nanoseconds */
int tacls; /* time for active CLE/ALE to nWE/nOE */
int twrph0; /* active time for nWE/nOE */
int twrph1; /* time for release CLE/ALE from nWE/nOE inactive */
int nr_sets;
struct s3c2410_nand_set *sets;
void (*select_chip)(struct s3c2410_nand_set *,
int chip);
};
|
