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path: root/drivers/pcmcia/hd64465_ss.c
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/*
 * $Id: hd64465_ss.c,v 1.7 2003/07/06 14:42:50 lethal Exp $
 *
 * Device driver for the PCMCIA controller module of the
 * Hitachi HD64465 handheld companion chip.
 *
 * Note that the HD64465 provides a very thin PCMCIA host bridge
 * layer, requiring a lot of the work of supporting cards to be
 * performed by the processor.  For example: mapping of card
 * interrupts to processor IRQs is done by IRQ demuxing software;
 * IO and memory mappings are fixed; setting voltages according
 * to card Voltage Select pins etc is done in software.
 *
 * Note also that this driver uses only the simple, fixed,
 * 16MB, 16-bit wide mappings to PCMCIA spaces defined by the
 * HD64465.  Larger mappings, smaller mappings, or mappings of
 * different width to the same socket, are all possible only by
 * involving the SH7750's MMU, which is considered unnecessary here.
 * The downside is that it may be possible for some drivers to
 * break because they need or expect 8-bit mappings.
 *
 * This driver currently supports only the following configuration:
 * SH7750 CPU, HD64465, TPS2206 voltage control chip.
 *
 * by Greg Banks <gbanks@pocketpenguins.com>
 * (c) 2000 PocketPenguins Inc
 */

#include <linux/types.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/kernel.h>
#include <linux/ioport.h>
#include <linux/mm.h>
#include <linux/vmalloc.h>
#include <asm/errno.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>

#include <asm/io.h>
#include <asm/hd64465/hd64465.h>
#include <asm/hd64465/io.h>

#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
#include <pcmcia/cistpl.h>
#include <pcmcia/ds.h>
#include <pcmcia/ss.h>
#include <pcmcia/bulkmem.h>
#include "cs_internal.h"

#define MODNAME "hd64465_ss"

/* #define HD64465_DEBUG 1 */

#if HD64465_DEBUG
#define DPRINTK(args...)	printk(MODNAME ": " args)
#else
#define DPRINTK(args...)
#endif

extern int hd64465_io_debug;
extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
extern void p3_iounmap(void *addr);

/*============================================================*/

#define HS_IO_MAP_SIZE 	(64*1024)

typedef struct hs_socket_t
{
    unsigned int	number;
    u_int   	    	irq;
    u_long  	    	mem_base;
    void		*io_base;
    u_long  	    	mem_length;
    u_int   	    	ctrl_base;
    socket_state_t  	state;
    pccard_io_map     	io_maps[MAX_IO_WIN];
    pccard_mem_map  	mem_maps[MAX_WIN];
    struct pcmcia_socket	socket;
} hs_socket_t;



#define HS_MAX_SOCKETS 2
static hs_socket_t hs_sockets[HS_MAX_SOCKETS];

#define hs_in(sp, r)	    inb((sp)->ctrl_base + (r))
#define hs_out(sp, v, r)    outb(v, (sp)->ctrl_base + (r))


/* translate a boolean value to a bit in a register */
#define bool_to_regbit(sp, r, bi, bo)	    	\
    do {    	    	    	    	    	\
    	unsigned short v = hs_in(sp, r);    	\
	if (bo)     	    	    	    	\
	    v |= (bi);	    	    	    	\
	else	    	    	    	    	\
	    v &= ~(bi);     	    	    	\
	hs_out(sp, v, r);   	    	    	\
    } while(0)
    
/* register offsets from HD64465_REG_PCC[01]ISR */
#define ISR 	0x0
#define GCR 	0x2
#define CSCR 	0x4
#define CSCIER 	0x6
#define SCR 	0x8


/* Mask and values for CSCIER register */
#define IER_MASK    0x80
#define IER_ON	    0x3f    	/* interrupts on */
#define IER_OFF     0x00    	/* interrupts off */

/*============================================================*/

#if HD64465_DEBUG > 10

static void cis_hex_dump(const unsigned char *x, int len)
{
    	int i;
	
    	for (i=0 ; i<len ; i++)
	{
	    if (!(i & 0xf))
	    	printk("\n%08x", (unsigned)(x + i));
	    printk(" %02x", *(volatile unsigned short*)x);
	    x += 2;
	}
	printk("\n");
}

#endif
/*============================================================*/

/*
 * This code helps create the illusion that the IREQ line from
 * the PC card is mapped to one of the CPU's IRQ lines by the
 * host bridge hardware (which is how every host bridge *except*
 * the HD64465 works).  In particular, it supports enabling
 * and disabling the IREQ line by code which knows nothing
 * about the host bridge (e.g. device drivers, IDE code) using
 * the request_irq(), free_irq(), probe_irq_on() and probe_irq_off()
 * functions.  Also, it supports sharing the mapped IRQ with
 * real hardware IRQs from the -IRL0-3 lines.
 */

#define HS_NUM_MAPPED_IRQS  16	/* Limitation of the PCMCIA code */
static struct
{
    /* index is mapped irq number */
    hs_socket_t *sock;
    hw_irq_controller *old_handler;
} hs_mapped_irq[HS_NUM_MAPPED_IRQS];

static void hs_socket_enable_ireq(hs_socket_t *sp)
{
    	unsigned short cscier;
	
    	DPRINTK("hs_socket_enable_ireq(sock=%d)\n", sp->number);

    	cscier = hs_in(sp, CSCIER);
	cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
    	cscier |= HD64465_PCCCSCIER_PIREQE_LEVEL;
	hs_out(sp, cscier, CSCIER);
}

static void hs_socket_disable_ireq(hs_socket_t *sp)
{
    	unsigned short cscier;
	
    	DPRINTK("hs_socket_disable_ireq(sock=%d)\n", sp->number);
	
    	cscier = hs_in(sp, CSCIER);
	cscier &= ~HD64465_PCCCSCIER_PIREQE_MASK;
	hs_out(sp, cscier, CSCIER);
}

static unsigned int hs_startup_irq(unsigned int irq)
{
	hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
	hs_mapped_irq[irq].old_handler->startup(irq);
	return 0;
}

static void hs_shutdown_irq(unsigned int irq)
{
	hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
	hs_mapped_irq[irq].old_handler->shutdown(irq);
}

static void hs_enable_irq(unsigned int irq)
{
	hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
	hs_mapped_irq[irq].old_handler->enable(irq);
}

static void hs_disable_irq(unsigned int irq)
{
	hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
	hs_mapped_irq[irq].old_handler->disable(irq);
}

extern struct hw_interrupt_type no_irq_type;

static void hs_mask_and_ack_irq(unsigned int irq)
{
	hs_socket_disable_ireq(hs_mapped_irq[irq].sock);
	/* ack_none() spuriously complains about an unexpected IRQ */
	if (hs_mapped_irq[irq].old_handler != &no_irq_type)
	    hs_mapped_irq[irq].old_handler->ack(irq);
}

static void hs_end_irq(unsigned int irq)
{
	hs_socket_enable_ireq(hs_mapped_irq[irq].sock);
	hs_mapped_irq[irq].old_handler->end(irq);
}


static struct hw_interrupt_type hd64465_ss_irq_type = {
	.typename	= "PCMCIA-IRQ",
	.startup	= hs_startup_irq,
	.shutdown	= hs_shutdown_irq,
	.enable		= hs_enable_irq,
	.disable	= hs_disable_irq,
	.ack		= hs_mask_and_ack_irq,
	.end		= hs_end_irq
};

/* 
 * This function should only ever be called with interrupts disabled.
 */
static void hs_map_irq(hs_socket_t *sp, unsigned int irq)
{
    	DPRINTK("hs_map_irq(sock=%d irq=%d)\n", sp->number, irq);
	
	if (irq >= HS_NUM_MAPPED_IRQS)
	    return;

    	hs_mapped_irq[irq].sock = sp;
	/* insert ourselves as the irq controller */
	hs_mapped_irq[irq].old_handler = irq_desc[irq].chip;
	irq_desc[irq].chip = &hd64465_ss_irq_type;
}


/* 
 * This function should only ever be called with interrupts disabled.
 */
static void hs_unmap_irq(hs_socket_t *sp, unsigned int irq)
{
    	DPRINTK("hs_unmap_irq(sock=%d irq=%d)\n", sp->number, irq);
	
	if (irq >= HS_NUM_MAPPED_IRQS)
	    return;
		
	/* restore the original irq controller */
	irq_desc[irq].chip = hs_mapped_irq[irq].old_handler;
}

/*============================================================*/


/*
 * Set Vpp and Vcc (in tenths of a Volt).  Does not
 * support the hi-Z state.
 *
 * Note, this assumes the board uses a TPS2206 chip to control
 * the Vcc and Vpp voltages to the hs_sockets.  If your board
 * uses the MIC2563 (also supported by the HD64465) then you
 * will have to modify this function.
 */
    	    	    	    	         /* 0V   3.3V  5.5V */
static const u_char hs_tps2206_avcc[3] = { 0x00, 0x04, 0x08 };
static const u_char hs_tps2206_bvcc[3] = { 0x00, 0x80, 0x40 };

static int hs_set_voltages(hs_socket_t *sp, int Vcc, int Vpp)
{
    	u_int psr;
	u_int vcci = 0;
	u_int sock = sp->number;
	
    	DPRINTK("hs_set_voltage(%d, %d, %d)\n", sock, Vcc, Vpp);

    	switch (Vcc)
	{
	case 0:  vcci = 0; break;
	case 33: vcci = 1; break;
	case 50: vcci = 2; break;
	default: return 0;
	}

    	/* Note: Vpp = 120 not supported -- Greg Banks */
	if (Vpp != 0 && Vpp != Vcc)
	    return 0;
	
	/* The PSR register holds 8 of the 9 bits which control
	 * the TPS2206 via its serial interface.
	 */
	psr = inw(HD64465_REG_PCCPSR);
	switch (sock)
	{
	case 0:
	    psr &= 0x0f;
	    psr |= hs_tps2206_avcc[vcci];
	    psr |= (Vpp == 0 ? 0x00 : 0x02);
	    break;
	case 1:
	    psr &= 0xf0;
	    psr |= hs_tps2206_bvcc[vcci];
	    psr |= (Vpp == 0 ? 0x00 : 0x20);
	    break;
	};
	outw(psr, HD64465_REG_PCCPSR);
	
	return 1;
}


/*============================================================*/

/*
 * Drive the RESET line to the card.
 */
static void hs_reset_socket(hs_socket_t *sp, int on)
{
    	unsigned short v;
	
	v = hs_in(sp, GCR);
	if (on)
	    v |= HD64465_PCCGCR_PCCR;
	else
	    v &= ~HD64465_PCCGCR_PCCR;
	hs_out(sp, v, GCR);
}

/*============================================================*/

static int hs_init(struct pcmcia_socket *s)
{
    	hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
	
    	DPRINTK("hs_init(%d)\n", sp->number);

	return 0;
}

/*============================================================*/


static int hs_get_status(struct pcmcia_socket *s, u_int *value)
{
    	hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
    	unsigned int isr;
	u_int status = 0;
	
	
	isr = hs_in(sp, ISR);

    	/* Card is seated and powered when *both* CD pins are low */
	if ((isr & HD64465_PCCISR_PCD_MASK) == 0)
    	{
	    status |= SS_DETECT;    /* card present */

	    switch (isr & HD64465_PCCISR_PBVD_MASK)
	    {
	    case HD64465_PCCISR_PBVD_BATGOOD:   
		break;
	    case HD64465_PCCISR_PBVD_BATWARN:
		status |= SS_BATWARN;
		break;
	    default:
		status |= SS_BATDEAD;
		break;
	    }

	    if (isr & HD64465_PCCISR_PREADY)
		status |= SS_READY;

	    if (isr & HD64465_PCCISR_PMWP)
		status |= SS_WRPROT;
		
	    /* Voltage Select pins interpreted as per Table 4-5 of the std.
	     * Assuming we have the TPS2206, the socket is a "Low Voltage
	     * key, 3.3V and 5V available, no X.XV available".
	     */
	    switch (isr & (HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1))
	    {
	    case HD64465_PCCISR_PVS1:
	    	printk(KERN_NOTICE MODNAME ": cannot handle X.XV card, ignored\n");
		status = 0;
	    	break;
	    case 0:
	    case HD64465_PCCISR_PVS2:
    	    	/* 3.3V */
    	    	status |= SS_3VCARD;
	    	break;
	    case HD64465_PCCISR_PVS2|HD64465_PCCISR_PVS1:
	    	/* 5V */
	    	break;
	    }
		
	    /* TODO: SS_POWERON */
	    /* TODO: SS_STSCHG */
    	}	
	
    	DPRINTK("hs_get_status(%d) = %x\n", sock, status);
	
	*value = status;
	return 0;
}

/*============================================================*/

static int hs_set_socket(struct pcmcia_socket *s, socket_state_t *state)
{
    	hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
    	u_long flags;
	u_int changed;
	unsigned short cscier;

    	DPRINTK("hs_set_socket(sock=%d, flags=%x, csc_mask=%x, Vcc=%d, Vpp=%d, io_irq=%d)\n",
	    sock, state->flags, state->csc_mask, state->Vcc, state->Vpp, state->io_irq);
	
	local_irq_save(flags);	/* Don't want interrupts happening here */

	if (state->Vpp != sp->state.Vpp ||
	    state->Vcc != sp->state.Vcc) {
	    if (!hs_set_voltages(sp, state->Vcc, state->Vpp)) {
	    	local_irq_restore(flags);
	    	return -EINVAL;
	    }
	}

/*    	hd64465_io_debug = 1; */
    	/*
	 * Handle changes in the Card Status Change mask,
	 * by propagating to the CSCR register
	 */	
	changed = sp->state.csc_mask ^ state->csc_mask;
	cscier = hs_in(sp, CSCIER);
	    
	if (changed & SS_DETECT) {
	    if (state->csc_mask & SS_DETECT)
		cscier |= HD64465_PCCCSCIER_PCDE;
	    else
		cscier &= ~HD64465_PCCCSCIER_PCDE;
	}

	if (changed & SS_READY) {
	    if (state->csc_mask & SS_READY)
		cscier |= HD64465_PCCCSCIER_PRE;
	    else
		cscier &= ~HD64465_PCCCSCIER_PRE;
	}

	if (changed & SS_BATDEAD) {
	    if (state->csc_mask & SS_BATDEAD)
		cscier |= HD64465_PCCCSCIER_PBDE;
	    else
		cscier &= ~HD64465_PCCCSCIER_PBDE;
	}

	if (changed & SS_BATWARN) {
	    if (state->csc_mask & SS_BATWARN)
		cscier |= HD64465_PCCCSCIER_PBWE;
	    else
		cscier &= ~HD64465_PCCCSCIER_PBWE;
	}

	if (changed & SS_STSCHG) {
	    if (state->csc_mask & SS_STSCHG)
		cscier |= HD64465_PCCCSCIER_PSCE;
	    else
		cscier &= ~HD64465_PCCCSCIER_PSCE;
	}

    	hs_out(sp, cscier, CSCIER);

	if (sp->state.io_irq && !state->io_irq)
	    hs_unmap_irq(sp, sp->state.io_irq);
	else if (!sp->state.io_irq && state->io_irq)
	    hs_map_irq(sp, state->io_irq);


    	/*
	 * Handle changes in the flags field,
	 * by propagating to config registers.
	 */	
	changed = sp->state.flags ^ state->flags;

	if (changed & SS_IOCARD) {
	    DPRINTK("card type: %s\n",
		    (state->flags & SS_IOCARD ? "i/o" : "memory" ));
	    bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCT,
		state->flags & SS_IOCARD);
	}

	if (changed & SS_RESET) {
	    DPRINTK("%s reset card\n",
		(state->flags & SS_RESET ? "start" : "stop"));
	    bool_to_regbit(sp, GCR, HD64465_PCCGCR_PCCR,
		state->flags & SS_RESET);
	}

	if (changed & SS_OUTPUT_ENA) {
	    DPRINTK("%sabling card output\n",
		(state->flags & SS_OUTPUT_ENA ? "en" : "dis"));
	    bool_to_regbit(sp, GCR, HD64465_PCCGCR_PDRV,
		state->flags & SS_OUTPUT_ENA);
	}

    	/* TODO: SS_SPKR_ENA */
	    
/*    	hd64465_io_debug = 0; */
	sp->state = *state;
	    
	local_irq_restore(flags);

#if HD64465_DEBUG > 10
	if (state->flags & SS_OUTPUT_ENA)   
	    cis_hex_dump((const unsigned char*)sp->mem_base, 0x100);
#endif
	return 0;
}

/*============================================================*/

static int hs_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
{
    	hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
	int map = io->map;
	int sock = sp->number;
	struct pccard_io_map *sio;
	pgprot_t prot;

    	DPRINTK("hs_set_io_map(sock=%d, map=%d, flags=0x%x, speed=%dns, start=%#lx, stop=%#lx)\n",
	    sock, map, io->flags, io->speed, io->start, io->stop);
	if (map >= MAX_IO_WIN)
	    return -EINVAL;
	sio = &sp->io_maps[map];

    	/* check for null changes */	
    	if (io->flags == sio->flags &&
	    io->start == sio->start &&
	    io->stop == sio->stop)
	    return 0;
	
	if (io->flags & MAP_AUTOSZ)
	    prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IODYN);
	else if (io->flags & MAP_16BIT)
	    prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO16);
	else
	    prot = PAGE_KERNEL_PCC(sock, _PAGE_PCC_IO8);

	/* TODO: handle MAP_USE_WAIT */
	if (io->flags & MAP_USE_WAIT)
	    printk(KERN_INFO MODNAME ": MAP_USE_WAIT unimplemented\n");
	/* TODO: handle MAP_PREFETCH */
	if (io->flags & MAP_PREFETCH)
	    printk(KERN_INFO MODNAME ": MAP_PREFETCH unimplemented\n");
	/* TODO: handle MAP_WRPROT */
	if (io->flags & MAP_WRPROT)
	    printk(KERN_INFO MODNAME ": MAP_WRPROT unimplemented\n");
	/* TODO: handle MAP_0WS */
	if (io->flags & MAP_0WS)
	    printk(KERN_INFO MODNAME ": MAP_0WS unimplemented\n");

	if (io->flags & MAP_ACTIVE) {
	    unsigned long pstart, psize, paddrbase;
	    
	    paddrbase = virt_to_phys((void*)(sp->mem_base + 2 * HD64465_PCC_WINDOW));
	    pstart = io->start & PAGE_MASK;
	    psize = ((io->stop + PAGE_SIZE) & PAGE_MASK) - pstart;

    	    /*
	     * Change PTEs in only that portion of the mapping requested
	     * by the caller.  This means that most of the time, most of
	     * the PTEs in the io_vma will be unmapped and only the bottom
	     * page will be mapped.  But the code allows for weird cards
	     * that might want IO ports > 4K.
	     */
	    sp->io_base = p3_ioremap(paddrbase + pstart, psize, pgprot_val(prot));
	    
	    /*
	     * Change the mapping used by inb() outb() etc
	     */
	    hd64465_port_map(io->start,
		io->stop - io->start + 1,
	    	(unsigned long)sp->io_base + io->start, 0);
	} else {
	    hd64465_port_unmap(sio->start, sio->stop - sio->start + 1);
	    p3_iounmap(sp->io_base);
	}
	
	*sio = *io;
	return 0;
}

/*============================================================*/

static int hs_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
{
    	hs_socket_t *sp = container_of(s, struct hs_socket_t, socket);
	struct pccard_mem_map *smem;
	int map = mem->map;
	unsigned long paddr;

#if 0
    	DPRINTK("hs_set_mem_map(sock=%d, map=%d, flags=0x%x, card_start=0x%08x)\n",
	    sock, map, mem->flags, mem->card_start);
#endif

	if (map >= MAX_WIN)
	    return -EINVAL;
	smem = &sp->mem_maps[map];
	
	paddr = sp->mem_base;	    	    /* base of Attribute mapping */
	if (!(mem->flags & MAP_ATTRIB))
	    paddr += HD64465_PCC_WINDOW;    /* base of Common mapping */
	paddr += mem->card_start;

    	/* Because we specified SS_CAP_STATIC_MAP, we are obliged
	 * at this time to report the system address corresponding
	 * to the card address requested.  This is how Socket Services
	 * queries our fixed mapping.  I wish this fact had been
	 * documented - Greg Banks.
	 */
    	mem->static_start = paddr;
	
	*smem = *mem;
	
    	return 0;
}

/* TODO: do we need to use the MMU to access Common memory ??? */

/*============================================================*/

/*
 * This function is registered with the HD64465 glue code to do a
 * secondary demux step on the PCMCIA interrupts.  It handles 
 * mapping the IREQ request from the card to a standard Linux
 * IRQ, as requested by SocketServices.
 */
static int hs_irq_demux(int irq, void *dev)
{
    	hs_socket_t *sp = dev;
	u_int cscr;
    	
    	DPRINTK("hs_irq_demux(irq=%d)\n", irq);

    	if (sp->state.io_irq &&
	    (cscr = hs_in(sp, CSCR)) & HD64465_PCCCSCR_PIREQ) {
	    cscr &= ~HD64465_PCCCSCR_PIREQ;
	    hs_out(sp, cscr, CSCR);
	    return sp->state.io_irq;
	}
	    
	return irq;
}

/*============================================================*/

/*
 * Interrupt handling routine.
 */
 
static irqreturn_t hs_interrupt(int irq, void *dev)
{
    	hs_socket_t *sp = dev;
	u_int events = 0;
	u_int cscr;

	cscr = hs_in(sp, CSCR);
	
	DPRINTK("hs_interrupt, cscr=%04x\n", cscr);

	/* check for bus-related changes to be reported to Socket Services */
	if (cscr & HD64465_PCCCSCR_PCDC) {
	    /* double-check for a 16-bit card, as we don't support CardBus */
	    if ((hs_in(sp, ISR) & HD64465_PCCISR_PCD_MASK) != 0) {
	    	printk(KERN_NOTICE MODNAME
		    ": socket %d, card not a supported card type or not inserted correctly\n",
		    sp->number);
		/* Don't do the rest unless a card is present */
		cscr &= ~(HD64465_PCCCSCR_PCDC|
		    	  HD64465_PCCCSCR_PRC|
			  HD64465_PCCCSCR_PBW|
		    	  HD64465_PCCCSCR_PBD|
			  HD64465_PCCCSCR_PSC);
	    } else {
	    	cscr &= ~HD64465_PCCCSCR_PCDC;
		events |= SS_DETECT;    	/* card insertion or removal */
    	    }
	}
	if (cscr & HD64465_PCCCSCR_PRC) {
	    cscr &= ~HD64465_PCCCSCR_PRC;
	    events |= SS_READY;     	/* ready signal changed */
	}
	if (cscr & HD64465_PCCCSCR_PBW) {
	    cscr &= ~HD64465_PCCCSCR_PSC;
	    events |= SS_BATWARN;     	/* battery warning */
	}
	if (cscr & HD64465_PCCCSCR_PBD) {
	    cscr &= ~HD64465_PCCCSCR_PSC;
	    events |= SS_BATDEAD;     	/* battery dead */
	}
	if (cscr & HD64465_PCCCSCR_PSC) {
	    cscr &= ~HD64465_PCCCSCR_PSC;
	    events |= SS_STSCHG;     	/* STSCHG (status changed) signal */
	}
	
	if (cscr & HD64465_PCCCSCR_PIREQ) {
	    cscr &= ~HD64465_PCCCSCR_PIREQ;

    	    /* This should have been dealt with during irq demux */	    
	    printk(KERN_NOTICE MODNAME ": unexpected IREQ from card\n");
	}

	hs_out(sp, cscr, CSCR);

	if (events)
		pcmcia_parse_events(&sp->socket, events);

	return IRQ_HANDLED;
}

/*============================================================*/

static struct pccard_operations hs_operations = {
	.init			= hs_init,
	.get_status		= hs_get_status,
	.set_socket		= hs_set_socket,
	.set_io_map		= hs_set_io_map,
	.set_mem_map		= hs_set_mem_map,
};

static int hs_init_socket(hs_socket_t *sp, int irq, unsigned long mem_base,
    	    unsigned int ctrl_base)
{
    	unsigned short v;
    	int i, err;

    	memset(sp, 0, sizeof(*sp));
	sp->irq = irq;
	sp->mem_base = mem_base;
	sp->mem_length = 4*HD64465_PCC_WINDOW;	/* 16MB */
	sp->ctrl_base = ctrl_base;
	
	for (i=0 ; i<MAX_IO_WIN ; i++)
	    sp->io_maps[i].map = i;
	for (i=0 ; i<MAX_WIN ; i++)
	    sp->mem_maps[i].map = i;
	
	hd64465_register_irq_demux(sp->irq, hs_irq_demux, sp);
	
    	if ((err = request_irq(sp->irq, hs_interrupt, IRQF_DISABLED, MODNAME, sp)) < 0)
	    return err;
    	if (request_mem_region(sp->mem_base, sp->mem_length, MODNAME) == 0) {
    	    sp->mem_base = 0;
	    return -ENOMEM;
	}


	/* According to section 3.2 of the PCMCIA standard, low-voltage
	 * capable cards must implement cold insertion, i.e. Vpp and
	 * Vcc set to 0 before card is inserted.
	 */
	/*hs_set_voltages(sp, 0, 0);*/
	
	/* hi-Z the outputs to the card and set 16MB map mode */
	v = hs_in(sp, GCR);
	v &= ~HD64465_PCCGCR_PCCT;  	/* memory-only card */
	hs_out(sp, v, GCR);

	v = hs_in(sp, GCR);
	v |= HD64465_PCCGCR_PDRV;   	/* enable outputs to card */
	hs_out(sp, v, GCR);

	v = hs_in(sp, GCR);
	v |= HD64465_PCCGCR_PMMOD; 	/* 16MB mapping mode */
	hs_out(sp, v, GCR);

	v = hs_in(sp, GCR);
	/* lowest 16MB of Common */
	v &= ~(HD64465_PCCGCR_PPA25|HD64465_PCCGCR_PPA24); 
	hs_out(sp, v, GCR);
	
	hs_reset_socket(sp, 1);

	printk(KERN_INFO "HD64465 PCMCIA bridge socket %d at 0x%08lx irq %d\n",
	    	i, sp->mem_base, sp->irq);

    	return 0;
}

static void hs_exit_socket(hs_socket_t *sp)
{
    	unsigned short cscier, gcr;
	unsigned long flags;
	
	local_irq_save(flags);

	/* turn off interrupts in hardware */
    	cscier = hs_in(sp, CSCIER);
	cscier = (cscier & IER_MASK) | IER_OFF;
    	hs_out(sp, cscier, CSCIER);
	
	/* hi-Z the outputs to the card */
    	gcr = hs_in(sp, GCR);
	gcr &= HD64465_PCCGCR_PDRV;
	hs_out(sp, gcr, GCR);

    	/* power the card down */
	hs_set_voltages(sp, 0, 0);

    	if (sp->mem_base != 0)
	    release_mem_region(sp->mem_base, sp->mem_length);
	if (sp->irq != 0) {
	    free_irq(sp->irq, hs_interrupt);
    	    hd64465_unregister_irq_demux(sp->irq);
	}

	local_irq_restore(flags);
}

static struct device_driver hd64465_driver = {
	.name = "hd64465-pcmcia",
	.bus = &platform_bus_type,
	.suspend = pcmcia_socket_dev_suspend,
	.resume = pcmcia_socket_dev_resume,
};

static struct platform_device hd64465_device = {
	.name = "hd64465-pcmcia",
	.id = 0,
};

static int __init init_hs(void)
{
	int i;
	unsigned short v;

/*	hd64465_io_debug = 1; */
	if (driver_register(&hd64465_driver))
		return -EINVAL;
	
	/* Wake both sockets out of STANDBY mode */
	/* TODO: wait 15ms */
	v = inw(HD64465_REG_SMSCR);
	v &= ~(HD64465_SMSCR_PC0ST|HD64465_SMSCR_PC1ST);
	outw(v, HD64465_REG_SMSCR);

	/* keep power controller out of shutdown mode */
	v = inb(HD64465_REG_PCC0SCR);
	v |= HD64465_PCCSCR_SHDN;
	outb(v, HD64465_REG_PCC0SCR);

    	/* use serial (TPS2206) power controller */
	v = inb(HD64465_REG_PCC0CSCR);
	v |= HD64465_PCCCSCR_PSWSEL;
	outb(v, HD64465_REG_PCC0CSCR);

	/*
	 * Setup hs_sockets[] structures and request system resources.
	 * TODO: on memory allocation failure, power down the socket
	 *       before quitting.
	 */
	for (i=0; i<HS_MAX_SOCKETS; i++) {
		hs_set_voltages(&hs_sockets[i], 0, 0);

		hs_sockets[i].socket.features |=  SS_CAP_PCCARD | SS_CAP_STATIC_MAP;      /* mappings are fixed in host memory */
		hs_sockets[i].socket.resource_ops = &pccard_static_ops;
		hs_sockets[i].socket.irq_mask =  0xffde;/*0xffff*/	    /* IRQs mapped in s/w so can do any, really */
		hs_sockets[i].socket.map_size = HD64465_PCC_WINDOW;     /* 16MB fixed window size */

		hs_sockets[i].socket.owner = THIS_MODULE;
		hs_sockets[i].socket.ss_entry = &hs_operations;
	}

	i = hs_init_socket(&hs_sockets[0],
	    HD64465_IRQ_PCMCIA0,
	    HD64465_PCC0_BASE,
	    HD64465_REG_PCC0ISR);
	if (i < 0) {
		unregister_driver(&hd64465_driver);
		return i;
	}
	i = hs_init_socket(&hs_sockets[1],
	    HD64465_IRQ_PCMCIA1,
	    HD64465_PCC1_BASE,
	    HD64465_REG_PCC1ISR);
	if (i < 0) {
		unregister_driver(&hd64465_driver);
		return i;
	}

/*	hd64465_io_debug = 0; */

	platform_device_register(&hd64465_device);

	for (i=0; i<HS_MAX_SOCKETS; i++) {
		unsigned int ret;
		hs_sockets[i].socket.dev.dev = &hd64465_device.dev;		
		hs_sockets[i].number = i;
		ret = pcmcia_register_socket(&hs_sockets[i].socket);
		if (ret && i)
			pcmcia_unregister_socket(&hs_sockets[0].socket);
	}

    	return 0;
}

static void __exit exit_hs(void)
{
	int i;

	for (i=0 ; i<HS_MAX_SOCKETS ; i++) {
		pcmcia_unregister_socket(&hs_sockets[i].socket);
		hs_exit_socket(&hs_sockets[i]);
	}

	platform_device_unregister(&hd64465_device);
	unregister_driver(&hd64465_driver);
}

module_init(init_hs);
module_exit(exit_hs);

/*============================================================*/
/*END*/
ptrace.c?h=v2.6.30-rc8&id=eee3af4a2c83a97fff107ddc445d9df6fded9ce4'>eee3af4a2c83
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/* By Ross Biro 1/23/92 */
/*
 * Pentium III FXSR, SSE support
 *	Gareth Hughes <gareth@valinux.com>, May 2000
 *
 * BTS tracing
 *	Markus Metzger <markus.t.metzger@intel.com>, Dec 2007
 */

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/smp.h>
#include <linux/errno.h>
#include <linux/ptrace.h>
#include <linux/regset.h>
#include <linux/tracehook.h>
#include <linux/user.h>
#include <linux/elf.h>
#include <linux/security.h>
#include <linux/audit.h>
#include <linux/seccomp.h>
#include <linux/signal.h>

#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/system.h>
#include <asm/processor.h>
#include <asm/i387.h>
#include <asm/debugreg.h>
#include <asm/ldt.h>
#include <asm/desc.h>
#include <asm/prctl.h>
#include <asm/proto.h>
#include <asm/ds.h>

#include "tls.h"

enum x86_regset {
	REGSET_GENERAL,
	REGSET_FP,
	REGSET_XFP,
	REGSET_IOPERM64 = REGSET_XFP,
	REGSET_TLS,
	REGSET_IOPERM32,
};

/*
 * does not yet catch signals sent when the child dies.
 * in exit.c or in signal.c.
 */

/*
 * Determines which flags the user has access to [1 = access, 0 = no access].
 */
#define FLAG_MASK_32		((unsigned long)			\
				 (X86_EFLAGS_CF | X86_EFLAGS_PF |	\
				  X86_EFLAGS_AF | X86_EFLAGS_ZF |	\
				  X86_EFLAGS_SF | X86_EFLAGS_TF |	\
				  X86_EFLAGS_DF | X86_EFLAGS_OF |	\
				  X86_EFLAGS_RF | X86_EFLAGS_AC))

/*
 * Determines whether a value may be installed in a segment register.
 */
static inline bool invalid_selector(u16 value)
{
	return unlikely(value != 0 && (value & SEGMENT_RPL_MASK) != USER_RPL);
}

#ifdef CONFIG_X86_32

#define FLAG_MASK		FLAG_MASK_32

static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno)
{
	BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0);
	regno >>= 2;
	if (regno > FS)
		--regno;
	return &regs->bx + regno;
}

static u16 get_segment_reg(struct task_struct *task, unsigned long offset)
{
	/*
	 * Returning the value truncates it to 16 bits.
	 */
	unsigned int retval;
	if (offset != offsetof(struct user_regs_struct, gs))
		retval = *pt_regs_access(task_pt_regs(task), offset);
	else {
		retval = task->thread.gs;
		if (task == current)
			savesegment(gs, retval);
	}
	return retval;
}

static int set_segment_reg(struct task_struct *task,
			   unsigned long offset, u16 value)
{
	/*
	 * The value argument was already truncated to 16 bits.
	 */
	if (invalid_selector(value))
		return -EIO;

	/*
	 * For %cs and %ss we cannot permit a null selector.
	 * We can permit a bogus selector as long as it has USER_RPL.
	 * Null selectors are fine for other segment registers, but
	 * we will never get back to user mode with invalid %cs or %ss
	 * and will take the trap in iret instead.  Much code relies
	 * on user_mode() to distinguish a user trap frame (which can
	 * safely use invalid selectors) from a kernel trap frame.
	 */
	switch (offset) {
	case offsetof(struct user_regs_struct, cs):
	case offsetof(struct user_regs_struct, ss):
		if (unlikely(value == 0))
			return -EIO;

	default:
		*pt_regs_access(task_pt_regs(task), offset) = value;
		break;

	case offsetof(struct user_regs_struct, gs):
		task->thread.gs = value;
		if (task == current)
			/*
			 * The user-mode %gs is not affected by
			 * kernel entry, so we must update the CPU.
			 */
			loadsegment(gs, value);
	}

	return 0;
}

static unsigned long debugreg_addr_limit(struct task_struct *task)
{
	return TASK_SIZE - 3;
}

#else  /* CONFIG_X86_64 */

#define FLAG_MASK		(FLAG_MASK_32 | X86_EFLAGS_NT)

static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long offset)
{
	BUILD_BUG_ON(offsetof(struct pt_regs, r15) != 0);
	return &regs->r15 + (offset / sizeof(regs->r15));
}

static u16 get_segment_reg(struct task_struct *task, unsigned long offset)
{
	/*
	 * Returning the value truncates it to 16 bits.
	 */
	unsigned int seg;

	switch (offset) {
	case offsetof(struct user_regs_struct, fs):
		if (task == current) {
			/* Older gas can't assemble movq %?s,%r?? */
			asm("movl %%fs,%0" : "=r" (seg));
			return seg;
		}
		return task->thread.fsindex;
	case offsetof(struct user_regs_struct, gs):
		if (task == current) {
			asm("movl %%gs,%0" : "=r" (seg));
			return seg;
		}
		return task->thread.gsindex;
	case offsetof(struct user_regs_struct, ds):
		if (task == current) {
			asm("movl %%ds,%0" : "=r" (seg));
			return seg;
		}
		return task->thread.ds;
	case offsetof(struct user_regs_struct, es):
		if (task == current) {
			asm("movl %%es,%0" : "=r" (seg));
			return seg;
		}
		return task->thread.es;

	case offsetof(struct user_regs_struct, cs):
	case offsetof(struct user_regs_struct, ss):
		break;
	}
	return *pt_regs_access(task_pt_regs(task), offset);
}

static int set_segment_reg(struct task_struct *task,
			   unsigned long offset, u16 value)
{
	/*
	 * The value argument was already truncated to 16 bits.
	 */
	if (invalid_selector(value))
		return -EIO;

	switch (offset) {
	case offsetof(struct user_regs_struct,fs):
		/*
		 * If this is setting fs as for normal 64-bit use but
		 * setting fs_base has implicitly changed it, leave it.
		 */
		if ((value == FS_TLS_SEL && task->thread.fsindex == 0 &&
		     task->thread.fs != 0) ||
		    (value == 0 && task->thread.fsindex == FS_TLS_SEL &&
		     task->thread.fs == 0))
			break;
		task->thread.fsindex = value;
		if (task == current)
			loadsegment(fs, task->thread.fsindex);
		break;
	case offsetof(struct user_regs_struct,gs):
		/*
		 * If this is setting gs as for normal 64-bit use but
		 * setting gs_base has implicitly changed it, leave it.
		 */
		if ((value == GS_TLS_SEL && task->thread.gsindex == 0 &&
		     task->thread.gs != 0) ||
		    (value == 0 && task->thread.gsindex == GS_TLS_SEL &&
		     task->thread.gs == 0))
			break;
		task->thread.gsindex = value;
		if (task == current)
			load_gs_index(task->thread.gsindex);
		break;
	case offsetof(struct user_regs_struct,ds):
		task->thread.ds = value;
		if (task == current)
			loadsegment(ds, task->thread.ds);
		break;
	case offsetof(struct user_regs_struct,es):
		task->thread.es = value;
		if (task == current)
			loadsegment(es, task->thread.es);
		break;

		/*
		 * Can't actually change these in 64-bit mode.
		 */
	case offsetof(struct user_regs_struct,cs):
		if (unlikely(value == 0))
			return -EIO;
#ifdef CONFIG_IA32_EMULATION
		if (test_tsk_thread_flag(task, TIF_IA32))
			task_pt_regs(task)->cs = value;
#endif
		break;
	case offsetof(struct user_regs_struct,ss):
		if (unlikely(value == 0))
			return -EIO;
#ifdef CONFIG_IA32_EMULATION
		if (test_tsk_thread_flag(task, TIF_IA32))
			task_pt_regs(task)->ss = value;
#endif
		break;
	}

	return 0;
}

static unsigned long debugreg_addr_limit(struct task_struct *task)
{
#ifdef CONFIG_IA32_EMULATION
	if (test_tsk_thread_flag(task, TIF_IA32))
		return IA32_PAGE_OFFSET - 3;
#endif
	return TASK_SIZE64 - 7;
}

#endif	/* CONFIG_X86_32 */

static unsigned long get_flags(struct task_struct *task)
{
	unsigned long retval = task_pt_regs(task)->flags;

	/*
	 * If the debugger set TF, hide it from the readout.
	 */
	if (test_tsk_thread_flag(task, TIF_FORCED_TF))
		retval &= ~X86_EFLAGS_TF;

	return retval;
}

static int set_flags(struct task_struct *task, unsigned long value)
{
	struct pt_regs *regs = task_pt_regs(task);

	/*
	 * If the user value contains TF, mark that
	 * it was not "us" (the debugger) that set it.
	 * If not, make sure it stays set if we had.
	 */
	if (value & X86_EFLAGS_TF)
		clear_tsk_thread_flag(task, TIF_FORCED_TF);
	else if (test_tsk_thread_flag(task, TIF_FORCED_TF))
		value |= X86_EFLAGS_TF;

	regs->flags = (regs->flags & ~FLAG_MASK) | (value & FLAG_MASK);

	return 0;
}

static int putreg(struct task_struct *child,
		  unsigned long offset, unsigned long value)
{
	switch (offset) {
	case offsetof(struct user_regs_struct, cs):
	case offsetof(struct user_regs_struct, ds):
	case offsetof(struct user_regs_struct, es):
	case offsetof(struct user_regs_struct, fs):
	case offsetof(struct user_regs_struct, gs):
	case offsetof(struct user_regs_struct, ss):
		return set_segment_reg(child, offset, value);

	case offsetof(struct user_regs_struct, flags):
		return set_flags(child, value);

#ifdef CONFIG_X86_64
	/*
	 * Orig_ax is really just a flag with small positive and
	 * negative values, so make sure to always sign-extend it
	 * from 32 bits so that it works correctly regardless of
	 * whether we come from a 32-bit environment or not.
	 */
	case offsetof(struct user_regs_struct, orig_ax):
		value = (long) (s32) value;
		break;

	case offsetof(struct user_regs_struct,fs_base):
		if (value >= TASK_SIZE_OF(child))
			return -EIO;
		/*
		 * When changing the segment base, use do_arch_prctl
		 * to set either thread.fs or thread.fsindex and the
		 * corresponding GDT slot.
		 */
		if (child->thread.fs != value)
			return do_arch_prctl(child, ARCH_SET_FS, value);
		return 0;
	case offsetof(struct user_regs_struct,gs_base):
		/*
		 * Exactly the same here as the %fs handling above.
		 */
		if (value >= TASK_SIZE_OF(child))
			return -EIO;
		if (child->thread.gs != value)
			return do_arch_prctl(child, ARCH_SET_GS, value);
		return 0;
#endif
	}

	*pt_regs_access(task_pt_regs(child), offset) = value;
	return 0;
}

static unsigned long getreg(struct task_struct *task, unsigned long offset)
{
	switch (offset) {
	case offsetof(struct user_regs_struct, cs):
	case offsetof(struct user_regs_struct, ds):
	case offsetof(struct user_regs_struct, es):
	case offsetof(struct user_regs_struct, fs):
	case offsetof(struct user_regs_struct, gs):
	case offsetof(struct user_regs_struct, ss):
		return get_segment_reg(task, offset);

	case offsetof(struct user_regs_struct, flags):
		return get_flags(task);

#ifdef CONFIG_X86_64
	case offsetof(struct user_regs_struct, fs_base): {
		/*
		 * do_arch_prctl may have used a GDT slot instead of
		 * the MSR.  To userland, it appears the same either
		 * way, except the %fs segment selector might not be 0.
		 */
		unsigned int seg = task->thread.fsindex;
		if (task->thread.fs != 0)
			return task->thread.fs;
		if (task == current)
			asm("movl %%fs,%0" : "=r" (seg));
		if (seg != FS_TLS_SEL)
			return 0;
		return get_desc_base(&task->thread.tls_array[FS_TLS]);
	}
	case offsetof(struct user_regs_struct, gs_base): {
		/*
		 * Exactly the same here as the %fs handling above.
		 */
		unsigned int seg = task->thread.gsindex;
		if (task->thread.gs != 0)
			return task->thread.gs;
		if (task == current)
			asm("movl %%gs,%0" : "=r" (seg));
		if (seg != GS_TLS_SEL)
			return 0;
		return get_desc_base(&task->thread.tls_array[GS_TLS]);
	}
#endif
	}

	return *pt_regs_access(task_pt_regs(task), offset);
}

static int genregs_get(struct task_struct *target,
		       const struct user_regset *regset,
		       unsigned int pos, unsigned int count,
		       void *kbuf, void __user *ubuf)
{
	if (kbuf) {
		unsigned long *k = kbuf;
		while (count > 0) {
			*k++ = getreg(target, pos);
			count -= sizeof(*k);
			pos += sizeof(*k);
		}
	} else {
		unsigned long __user *u = ubuf;
		while (count > 0) {
			if (__put_user(getreg(target, pos), u++))
				return -EFAULT;
			count -= sizeof(*u);
			pos += sizeof(*u);
		}
	}

	return 0;
}

static int genregs_set(struct task_struct *target,
		       const struct user_regset *regset,
		       unsigned int pos, unsigned int count,
		       const void *kbuf, const void __user *ubuf)
{
	int ret = 0;
	if (kbuf) {
		const unsigned long *k = kbuf;
		while (count > 0 && !ret) {
			ret = putreg(target, pos, *k++);
			count -= sizeof(*k);
			pos += sizeof(*k);
		}
	} else {
		const unsigned long  __user *u = ubuf;
		while (count > 0 && !ret) {
			unsigned long word;
			ret = __get_user(word, u++);
			if (ret)
				break;
			ret = putreg(target, pos, word);
			count -= sizeof(*u);
			pos += sizeof(*u);
		}
	}
	return ret;
}

/*
 * This function is trivial and will be inlined by the compiler.
 * Having it separates the implementation details of debug
 * registers from the interface details of ptrace.
 */
static unsigned long ptrace_get_debugreg(struct task_struct *child, int n)
{
	switch (n) {
	case 0:		return child->thread.debugreg0;
	case 1:		return child->thread.debugreg1;
	case 2:		return child->thread.debugreg2;
	case 3:		return child->thread.debugreg3;
	case 6:		return child->thread.debugreg6;
	case 7:		return child->thread.debugreg7;
	}
	return 0;
}

static int ptrace_set_debugreg(struct task_struct *child,
			       int n, unsigned long data)
{
	int i;

	if (unlikely(n == 4 || n == 5))
		return -EIO;

	if (n < 4 && unlikely(data >= debugreg_addr_limit(child)))
		return -EIO;

	switch (n) {
	case 0:		child->thread.debugreg0 = data; break;
	case 1:		child->thread.debugreg1 = data; break;
	case 2:		child->thread.debugreg2 = data; break;
	case 3:		child->thread.debugreg3 = data; break;

	case 6:
		if ((data & ~0xffffffffUL) != 0)
			return -EIO;
		child->thread.debugreg6 = data;
		break;

	case 7:
		/*
		 * Sanity-check data. Take one half-byte at once with
		 * check = (val >> (16 + 4*i)) & 0xf. It contains the
		 * R/Wi and LENi bits; bits 0 and 1 are R/Wi, and bits
		 * 2 and 3 are LENi. Given a list of invalid values,
		 * we do mask |= 1 << invalid_value, so that
		 * (mask >> check) & 1 is a correct test for invalid
		 * values.
		 *
		 * R/Wi contains the type of the breakpoint /
		 * watchpoint, LENi contains the length of the watched
		 * data in the watchpoint case.
		 *
		 * The invalid values are:
		 * - LENi == 0x10 (undefined), so mask |= 0x0f00.	[32-bit]
		 * - R/Wi == 0x10 (break on I/O reads or writes), so
		 *   mask |= 0x4444.
		 * - R/Wi == 0x00 && LENi != 0x00, so we have mask |=
		 *   0x1110.
		 *
		 * Finally, mask = 0x0f00 | 0x4444 | 0x1110 == 0x5f54.
		 *
		 * See the Intel Manual "System Programming Guide",
		 * 15.2.4
		 *
		 * Note that LENi == 0x10 is defined on x86_64 in long
		 * mode (i.e. even for 32-bit userspace software, but
		 * 64-bit kernel), so the x86_64 mask value is 0x5454.
		 * See the AMD manual no. 24593 (AMD64 System Programming)
		 */
#ifdef CONFIG_X86_32
#define	DR7_MASK	0x5f54
#else
#define	DR7_MASK	0x5554
#endif
		data &= ~DR_CONTROL_RESERVED;
		for (i = 0; i < 4; i++)
			if ((DR7_MASK >> ((data >> (16 + 4*i)) & 0xf)) & 1)
				return -EIO;
		child->thread.debugreg7 = data;
		if (data)
			set_tsk_thread_flag(child, TIF_DEBUG);
		else
			clear_tsk_thread_flag(child, TIF_DEBUG);
		break;
	}

	return 0;
}

/*
 * These access the current or another (stopped) task's io permission
 * bitmap for debugging or core dump.
 */
static int ioperm_active(struct task_struct *target,
			 const struct user_regset *regset)
{
	return target->thread.io_bitmap_max / regset->size;
}

static int ioperm_get(struct task_struct *target,
		      const struct user_regset *regset,
		      unsigned int pos, unsigned int count,
		      void *kbuf, void __user *ubuf)
{
	if (!target->thread.io_bitmap_ptr)
		return -ENXIO;

	return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
				   target->thread.io_bitmap_ptr,
				   0, IO_BITMAP_BYTES);
}

#ifdef CONFIG_X86_PTRACE_BTS
static int ptrace_bts_read_record(struct task_struct *child, size_t index,
				  struct bts_struct __user *out)
{
	const struct bts_trace *trace;
	struct bts_struct bts;
	const unsigned char *at;
	int error;

	trace = ds_read_bts(child->bts);
	if (!trace)
		return -EPERM;

	at = trace->ds.top - ((index + 1) * trace->ds.size);
	if ((void *)at < trace->ds.begin)
		at += (trace->ds.n * trace->ds.size);

	if (!trace->read)
		return -EOPNOTSUPP;

	error = trace->read(child->bts, at, &bts);
	if (error < 0)
		return error;

	if (copy_to_user(out, &bts, sizeof(bts)))
		return -EFAULT;

	return sizeof(bts);
}

static int ptrace_bts_drain(struct task_struct *child,
			    long size,
			    struct bts_struct __user *out)
{
	const struct bts_trace *trace;
	const unsigned char *at;
	int error, drained = 0;

	trace = ds_read_bts(child->bts);
	if (!trace)
		return -EPERM;

	if (!trace->read)
		return -EOPNOTSUPP;

	if (size < (trace->ds.top - trace->ds.begin))
		return -EIO;

	for (at = trace->ds.begin; (void *)at < trace->ds.top;
	     out++, drained++, at += trace->ds.size) {
		struct bts_struct bts;
		int error;

		error = trace->read(child->bts, at, &bts);
		if (error < 0)
			return error;

		if (copy_to_user(out, &bts, sizeof(bts)))
			return -EFAULT;
	}

	memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);

	error = ds_reset_bts(child->bts);
	if (error < 0)
		return error;

	return drained;
}

static int ptrace_bts_allocate_buffer(struct task_struct *child, size_t size)
{
	child->bts_buffer = alloc_locked_buffer(size);
	if (!child->bts_buffer)
		return -ENOMEM;

	child->bts_size = size;

	return 0;
}

static void ptrace_bts_free_buffer(struct task_struct *child)
{
	free_locked_buffer(child->bts_buffer, child->bts_size);
	child->bts_buffer = NULL;
	child->bts_size = 0;
}

static int ptrace_bts_config(struct task_struct *child,
			     long cfg_size,
			     const struct ptrace_bts_config __user *ucfg)
{
	struct ptrace_bts_config cfg;
	unsigned int flags = 0;

	if (cfg_size < sizeof(cfg))
		return -EIO;

	if (copy_from_user(&cfg, ucfg, sizeof(cfg)))
		return -EFAULT;

	if (child->bts) {
		ds_release_bts(child->bts);
		child->bts = NULL;
	}

	if (cfg.flags & PTRACE_BTS_O_SIGNAL) {
		if (!cfg.signal)
			return -EINVAL;

		return -EOPNOTSUPP;

		child->thread.bts_ovfl_signal = cfg.signal;
	}

	if ((cfg.flags & PTRACE_BTS_O_ALLOC) &&
	    (cfg.size != child->bts_size)) {
		int error;

		ptrace_bts_free_buffer(child);

		error = ptrace_bts_allocate_buffer(child, cfg.size);
		if (error < 0)
			return error;
	}

	if (cfg.flags & PTRACE_BTS_O_TRACE)
		flags |= BTS_USER;

	if (cfg.flags & PTRACE_BTS_O_SCHED)
		flags |= BTS_TIMESTAMPS;

	child->bts = ds_request_bts(child, child->bts_buffer, child->bts_size,
				    /* ovfl = */ NULL, /* th = */ (size_t)-1,
				    flags);
	if (IS_ERR(child->bts)) {
		int error = PTR_ERR(child->bts);

		ptrace_bts_free_buffer(child);
		child->bts = NULL;

		return error;
	}

	return sizeof(cfg);
}

static int ptrace_bts_status(struct task_struct *child,
			     long cfg_size,
			     struct ptrace_bts_config __user *ucfg)
{
	const struct bts_trace *trace;
	struct ptrace_bts_config cfg;

	if (cfg_size < sizeof(cfg))
		return -EIO;

	trace = ds_read_bts(child->bts);
	if (!trace)
		return -EPERM;

	memset(&cfg, 0, sizeof(cfg));
	cfg.size = trace->ds.end - trace->ds.begin;
	cfg.signal = child->thread.bts_ovfl_signal;
	cfg.bts_size = sizeof(struct bts_struct);

	if (cfg.signal)
		cfg.flags |= PTRACE_BTS_O_SIGNAL;

	if (trace->ds.flags & BTS_USER)
		cfg.flags |= PTRACE_BTS_O_TRACE;

	if (trace->ds.flags & BTS_TIMESTAMPS)
		cfg.flags |= PTRACE_BTS_O_SCHED;

	if (copy_to_user(ucfg, &cfg, sizeof(cfg)))
		return -EFAULT;

	return sizeof(cfg);
}

static int ptrace_bts_clear(struct task_struct *child)
{
	const struct bts_trace *trace;

	trace = ds_read_bts(child->bts);
	if (!trace)
		return -EPERM;

	memset(trace->ds.begin, 0, trace->ds.n * trace->ds.size);

	return ds_reset_bts(child->bts);
}

static int ptrace_bts_size(struct task_struct *child)
{
	const struct bts_trace *trace;

	trace = ds_read_bts(child->bts);
	if (!trace)
		return -EPERM;

	return (trace->ds.top - trace->ds.begin) / trace->ds.size;
}

static void ptrace_bts_fork(struct task_struct *tsk)
{
	tsk->bts = NULL;
	tsk->bts_buffer = NULL;
	tsk->bts_size = 0;
	tsk->thread.bts_ovfl_signal = 0;
}

static void ptrace_bts_untrace(struct task_struct *child)
{
	if (unlikely(child->bts)) {
		ds_release_bts(child->bts);
		child->bts = NULL;

		/* We cannot update total_vm and locked_vm since
		   child's mm is already gone. But we can reclaim the
		   memory. */
		kfree(child->bts_buffer);
		child->bts_buffer = NULL;
		child->bts_size = 0;
	}
}

static void ptrace_bts_detach(struct task_struct *child)
{
	if (unlikely(child->bts)) {
		ds_release_bts(child->bts);
		child->bts = NULL;

		ptrace_bts_free_buffer(child);
	}
}
#else
static inline void ptrace_bts_fork(struct task_struct *tsk) {}
static inline void ptrace_bts_detach(struct task_struct *child) {}
static inline void ptrace_bts_untrace(struct task_struct *child) {}
#endif /* CONFIG_X86_PTRACE_BTS */

void x86_ptrace_fork(struct task_struct *child, unsigned long clone_flags)
{
	ptrace_bts_fork(child);
}

void x86_ptrace_untrace(struct task_struct *child)
{
	ptrace_bts_untrace(child);
}

/*
 * Called by kernel/ptrace.c when detaching..
 *
 * Make sure the single step bit is not set.
 */
void ptrace_disable(struct task_struct *child)
{
	user_disable_single_step(child);
#ifdef TIF_SYSCALL_EMU
	clear_tsk_thread_flag(child, TIF_SYSCALL_EMU);
#endif
	ptrace_bts_detach(child);
}

#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
static const struct user_regset_view user_x86_32_view; /* Initialized below. */
#endif

long arch_ptrace(struct task_struct *child, long request, long addr, long data)
{
	int ret;
	unsigned long __user *datap = (unsigned long __user *)data;

	switch (request) {
	/* read the word at location addr in the USER area. */
	case PTRACE_PEEKUSR: {
		unsigned long tmp;

		ret = -EIO;
		if ((addr & (sizeof(data) - 1)) || addr < 0 ||
		    addr >= sizeof(struct user))
			break;

		tmp = 0;  /* Default return condition */
		if (addr < sizeof(struct user_regs_struct))
			tmp = getreg(child, addr);
		else if (addr >= offsetof(struct user, u_debugreg[0]) &&
			 addr <= offsetof(struct user, u_debugreg[7])) {
			addr -= offsetof(struct user, u_debugreg[0]);
			tmp = ptrace_get_debugreg(child, addr / sizeof(data));
		}
		ret = put_user(tmp, datap);
		break;
	}

	case PTRACE_POKEUSR: /* write the word at location addr in the USER area */
		ret = -EIO;
		if ((addr & (sizeof(data) - 1)) || addr < 0 ||
		    addr >= sizeof(struct user))
			break;

		if (addr < sizeof(struct user_regs_struct))
			ret = putreg(child, addr, data);
		else if (addr >= offsetof(struct user, u_debugreg[0]) &&
			 addr <= offsetof(struct user, u_debugreg[7])) {
			addr -= offsetof(struct user, u_debugreg[0]);
			ret = ptrace_set_debugreg(child,
						  addr / sizeof(data), data);
		}
		break;

	case PTRACE_GETREGS:	/* Get all gp regs from the child. */
		return copy_regset_to_user(child,
					   task_user_regset_view(current),
					   REGSET_GENERAL,
					   0, sizeof(struct user_regs_struct),
					   datap);

	case PTRACE_SETREGS:	/* Set all gp regs in the child. */
		return copy_regset_from_user(child,
					     task_user_regset_view(current),
					     REGSET_GENERAL,
					     0, sizeof(struct user_regs_struct),
					     datap);

	case PTRACE_GETFPREGS:	/* Get the child FPU state. */
		return copy_regset_to_user(child,
					   task_user_regset_view(current),
					   REGSET_FP,
					   0, sizeof(struct user_i387_struct),
					   datap);

	case PTRACE_SETFPREGS:	/* Set the child FPU state. */
		return copy_regset_from_user(child,
					     task_user_regset_view(current),
					     REGSET_FP,
					     0, sizeof(struct user_i387_struct),
					     datap);

#ifdef CONFIG_X86_32
	case PTRACE_GETFPXREGS:	/* Get the child extended FPU state. */
		return copy_regset_to_user(child, &user_x86_32_view,
					   REGSET_XFP,
					   0, sizeof(struct user_fxsr_struct),
					   datap) ? -EIO : 0;

	case PTRACE_SETFPXREGS:	/* Set the child extended FPU state. */
		return copy_regset_from_user(child, &user_x86_32_view,
					     REGSET_XFP,
					     0, sizeof(struct user_fxsr_struct),
					     datap) ? -EIO : 0;
#endif

#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
	case PTRACE_GET_THREAD_AREA:
		if (addr < 0)
			return -EIO;
		ret = do_get_thread_area(child, addr,
					 (struct user_desc __user *) data);
		break;

	case PTRACE_SET_THREAD_AREA:
		if (addr < 0)
			return -EIO;
		ret = do_set_thread_area(child, addr,
					 (struct user_desc __user *) data, 0);
		break;
#endif

#ifdef CONFIG_X86_64
		/* normal 64bit interface to access TLS data.
		   Works just like arch_prctl, except that the arguments
		   are reversed. */
	case PTRACE_ARCH_PRCTL:
		ret = do_arch_prctl(child, data, addr);
		break;
#endif

	/*
	 * These bits need more cooking - not enabled yet:
	 */
#ifdef CONFIG_X86_PTRACE_BTS
	case PTRACE_BTS_CONFIG:
		ret = ptrace_bts_config
			(child, data, (struct ptrace_bts_config __user *)addr);
		break;

	case PTRACE_BTS_STATUS:
		ret = ptrace_bts_status
			(child, data, (struct ptrace_bts_config __user *)addr);
		break;

	case PTRACE_BTS_SIZE:
		ret = ptrace_bts_size(child);
		break;

	case PTRACE_BTS_GET:
		ret = ptrace_bts_read_record
			(child, data, (struct bts_struct __user *) addr);
		break;

	case PTRACE_BTS_CLEAR:
		ret = ptrace_bts_clear(child);
		break;

	case PTRACE_BTS_DRAIN:
		ret = ptrace_bts_drain
			(child, data, (struct bts_struct __user *) addr);
		break;
#endif /* CONFIG_X86_PTRACE_BTS */

	default:
		ret = ptrace_request(child, request, addr, data);
		break;
	}

	return ret;
}

#ifdef CONFIG_IA32_EMULATION

#include <linux/compat.h>
#include <linux/syscalls.h>
#include <asm/ia32.h>
#include <asm/user32.h>

#define R32(l,q)							\
	case offsetof(struct user32, regs.l):				\
		regs->q = value; break

#define SEG32(rs)							\
	case offsetof(struct user32, regs.rs):				\
		return set_segment_reg(child,				\
				       offsetof(struct user_regs_struct, rs), \
				       value);				\
		break

static int putreg32(struct task_struct *child, unsigned regno, u32 value)
{
	struct pt_regs *regs = task_pt_regs(child);

	switch (regno) {

	SEG32(cs);
	SEG32(ds);
	SEG32(es);
	SEG32(fs);
	SEG32(gs);
	SEG32(ss);

	R32(ebx, bx);
	R32(ecx, cx);
	R32(edx, dx);
	R32(edi, di);
	R32(esi, si);
	R32(ebp, bp);
	R32(eax, ax);
	R32(eip, ip);
	R32(esp, sp);

	case offsetof(struct user32, regs.orig_eax):
		/*
		 * Sign-extend the value so that orig_eax = -1
		 * causes (long)orig_ax < 0 tests to fire correctly.
		 */
		regs->orig_ax = (long) (s32) value;
		break;

	case offsetof(struct user32, regs.eflags):
		return set_flags(child, value);

	case offsetof(struct user32, u_debugreg[0]) ...
		offsetof(struct user32, u_debugreg[7]):
		regno -= offsetof(struct user32, u_debugreg[0]);
		return ptrace_set_debugreg(child, regno / 4, value);

	default:
		if (regno > sizeof(struct user32) || (regno & 3))
			return -EIO;

		/*
		 * Other dummy fields in the virtual user structure
		 * are ignored
		 */
		break;
	}
	return 0;
}

#undef R32
#undef SEG32

#define R32(l,q)							\
	case offsetof(struct user32, regs.l):				\
		*val = regs->q; break

#define SEG32(rs)							\
	case offsetof(struct user32, regs.rs):				\
		*val = get_segment_reg(child,				\
				       offsetof(struct user_regs_struct, rs)); \
		break

static int getreg32(struct task_struct *child, unsigned regno, u32 *val)
{
	struct pt_regs *regs = task_pt_regs(child);

	switch (regno) {

	SEG32(ds);
	SEG32(es);
	SEG32(fs);
	SEG32(gs);

	R32(cs, cs);
	R32(ss, ss);
	R32(ebx, bx);
	R32(ecx, cx);
	R32(edx, dx);
	R32(edi, di);
	R32(esi, si);
	R32(ebp, bp);
	R32(eax, ax);
	R32(orig_eax, orig_ax);
	R32(eip, ip);
	R32(esp, sp);

	case offsetof(struct user32, regs.eflags):
		*val = get_flags(child);
		break;

	case offsetof(struct user32, u_debugreg[0]) ...
		offsetof(struct user32, u_debugreg[7]):
		regno -= offsetof(struct user32, u_debugreg[0]);
		*val = ptrace_get_debugreg(child, regno / 4);
		break;

	default:
		if (regno > sizeof(struct user32) || (regno & 3))
			return -EIO;

		/*
		 * Other dummy fields in the virtual user structure
		 * are ignored
		 */
		*val = 0;
		break;
	}
	return 0;
}

#undef R32
#undef SEG32

static int genregs32_get(struct task_struct *target,
			 const struct user_regset *regset,
			 unsigned int pos, unsigned int count,
			 void *kbuf, void __user *ubuf)
{
	if (kbuf) {
		compat_ulong_t *k = kbuf;
		while (count > 0) {
			getreg32(target, pos, k++);
			count -= sizeof(*k);
			pos += sizeof(*k);
		}
	} else {
		compat_ulong_t __user *u = ubuf;
		while (count > 0) {
			compat_ulong_t word;
			getreg32(target, pos, &word);
			if (__put_user(word, u++))
				return -EFAULT;
			count -= sizeof(*u);
			pos += sizeof(*u);
		}
	}

	return 0;
}

static int genregs32_set(struct task_struct *target,
			 const struct user_regset *regset,
			 unsigned int pos, unsigned int count,
			 const void *kbuf, const void __user *ubuf)
{
	int ret = 0;
	if (kbuf) {
		const compat_ulong_t *k = kbuf;
		while (count > 0 && !ret) {
			ret = putreg32(target, pos, *k++);
			count -= sizeof(*k);
			pos += sizeof(*k);
		}
	} else {
		const compat_ulong_t __user *u = ubuf;
		while (count > 0 && !ret) {
			compat_ulong_t word;
			ret = __get_user(word, u++);
			if (ret)
				break;
			ret = putreg32(target, pos, word);
			count -= sizeof(*u);
			pos += sizeof(*u);
		}
	}
	return ret;
}

long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
			compat_ulong_t caddr, compat_ulong_t cdata)
{
	unsigned long addr = caddr;
	unsigned long data = cdata;
	void __user *datap = compat_ptr(data);
	int ret;
	__u32 val;

	switch (request) {
	case PTRACE_PEEKUSR:
		ret = getreg32(child, addr, &val);
		if (ret == 0)
			ret = put_user(val, (__u32 __user *)datap);
		break;

	case PTRACE_POKEUSR:
		ret = putreg32(child, addr, data);
		break;

	case PTRACE_GETREGS:	/* Get all gp regs from the child. */
		return copy_regset_to_user(child, &user_x86_32_view,
					   REGSET_GENERAL,
					   0, sizeof(struct user_regs_struct32),
					   datap);

	case PTRACE_SETREGS:	/* Set all gp regs in the child. */
		return copy_regset_from_user(child, &user_x86_32_view,
					     REGSET_GENERAL, 0,
					     sizeof(struct user_regs_struct32),
					     datap);

	case PTRACE_GETFPREGS:	/* Get the child FPU state. */
		return copy_regset_to_user(child, &user_x86_32_view,
					   REGSET_FP, 0,
					   sizeof(struct user_i387_ia32_struct),
					   datap);

	case PTRACE_SETFPREGS:	/* Set the child FPU state. */
		return copy_regset_from_user(
			child, &user_x86_32_view, REGSET_FP,
			0, sizeof(struct user_i387_ia32_struct), datap);

	case PTRACE_GETFPXREGS:	/* Get the child extended FPU state. */
		return copy_regset_to_user(child, &user_x86_32_view,
					   REGSET_XFP, 0,
					   sizeof(struct user32_fxsr_struct),
					   datap);

	case PTRACE_SETFPXREGS:	/* Set the child extended FPU state. */
		return copy_regset_from_user(child, &user_x86_32_view,
					     REGSET_XFP, 0,
					     sizeof(struct user32_fxsr_struct),
					     datap);

	case PTRACE_GET_THREAD_AREA:
	case PTRACE_SET_THREAD_AREA:
#ifdef CONFIG_X86_PTRACE_BTS
	case PTRACE_BTS_CONFIG:
	case PTRACE_BTS_STATUS:
	case PTRACE_BTS_SIZE:
	case PTRACE_BTS_GET:
	case PTRACE_BTS_CLEAR:
	case PTRACE_BTS_DRAIN:
#endif /* CONFIG_X86_PTRACE_BTS */
		return arch_ptrace(child, request, addr, data);

	default:
		return compat_ptrace_request(child, request, addr, data);
	}

	return ret;
}

#endif	/* CONFIG_IA32_EMULATION */

#ifdef CONFIG_X86_64

static const struct user_regset x86_64_regsets[] = {
	[REGSET_GENERAL] = {
		.core_note_type = NT_PRSTATUS,
		.n = sizeof(struct user_regs_struct) / sizeof(long),
		.size = sizeof(long), .align = sizeof(long),
		.get = genregs_get, .set = genregs_set
	},
	[REGSET_FP] = {
		.core_note_type = NT_PRFPREG,
		.n = sizeof(struct user_i387_struct) / sizeof(long),
		.size = sizeof(long), .align = sizeof(long),
		.active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set
	},
	[REGSET_IOPERM64] = {
		.core_note_type = NT_386_IOPERM,
		.n = IO_BITMAP_LONGS,
		.size = sizeof(long), .align = sizeof(long),
		.active = ioperm_active, .get = ioperm_get
	},
};

static const struct user_regset_view user_x86_64_view = {
	.name = "x86_64", .e_machine = EM_X86_64,
	.regsets = x86_64_regsets, .n = ARRAY_SIZE(x86_64_regsets)
};

#else  /* CONFIG_X86_32 */

#define user_regs_struct32	user_regs_struct
#define genregs32_get		genregs_get
#define genregs32_set		genregs_set

#define user_i387_ia32_struct	user_i387_struct
#define user32_fxsr_struct	user_fxsr_struct

#endif	/* CONFIG_X86_64 */

#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
static const struct user_regset x86_32_regsets[] = {
	[REGSET_GENERAL] = {
		.core_note_type = NT_PRSTATUS,
		.n = sizeof(struct user_regs_struct32) / sizeof(u32),
		.size = sizeof(u32), .align = sizeof(u32),
		.get = genregs32_get, .set = genregs32_set
	},
	[REGSET_FP] = {
		.core_note_type = NT_PRFPREG,
		.n = sizeof(struct user_i387_ia32_struct) / sizeof(u32),
		.size = sizeof(u32), .align = sizeof(u32),
		.active = fpregs_active, .get = fpregs_get, .set = fpregs_set
	},
	[REGSET_XFP] = {
		.core_note_type = NT_PRXFPREG,
		.n = sizeof(struct user32_fxsr_struct) / sizeof(u32),
		.size = sizeof(u32), .align = sizeof(u32),
		.active = xfpregs_active, .get = xfpregs_get, .set = xfpregs_set
	},
	[REGSET_TLS] = {
		.core_note_type = NT_386_TLS,
		.n = GDT_ENTRY_TLS_ENTRIES, .bias = GDT_ENTRY_TLS_MIN,
		.size = sizeof(struct user_desc),
		.align = sizeof(struct user_desc),
		.active = regset_tls_active,
		.get = regset_tls_get, .set = regset_tls_set
	},
	[REGSET_IOPERM32] = {
		.core_note_type = NT_386_IOPERM,
		.n = IO_BITMAP_BYTES / sizeof(u32),
		.size = sizeof(u32), .align = sizeof(u32),
		.active = ioperm_active, .get = ioperm_get
	},
};

static const struct user_regset_view user_x86_32_view = {
	.name = "i386", .e_machine = EM_386,
	.regsets = x86_32_regsets, .n = ARRAY_SIZE(x86_32_regsets)
};
#endif

const struct user_regset_view *task_user_regset_view(struct task_struct *task)
{
#ifdef CONFIG_IA32_EMULATION
	if (test_tsk_thread_flag(task, TIF_IA32))
#endif
#if defined CONFIG_X86_32 || defined CONFIG_IA32_EMULATION
		return &user_x86_32_view;
#endif
#ifdef CONFIG_X86_64
	return &user_x86_64_view;
#endif
}

void send_sigtrap(struct task_struct *tsk, struct pt_regs *regs,
					 int error_code, int si_code)
{
	struct siginfo info;

	tsk->thread.trap_no = 1;
	tsk->thread.error_code = error_code;

	memset(&info, 0, sizeof(info));
	info.si_signo = SIGTRAP;
	info.si_code = si_code;

	/* User-mode ip? */
	info.si_addr = user_mode_vm(regs) ? (void __user *) regs->ip : NULL;

	/* Send us the fake SIGTRAP */
	force_sig_info(SIGTRAP, &info, tsk);
}


#ifdef CONFIG_X86_32
# define IS_IA32	1
#elif defined CONFIG_IA32_EMULATION
# define IS_IA32	test_thread_flag(TIF_IA32)
#else
# define IS_IA32	0
#endif

/*
 * We must return the syscall number to actually look up in the table.
 * This can be -1L to skip running any syscall at all.
 */
asmregparm long syscall_trace_enter(struct pt_regs *regs)
{
	long ret = 0;

	/*
	 * If we stepped into a sysenter/syscall insn, it trapped in
	 * kernel mode; do_debug() cleared TF and set TIF_SINGLESTEP.
	 * If user-mode had set TF itself, then it's still clear from
	 * do_debug() and we need to set it again to restore the user
	 * state.  If we entered on the slow path, TF was already set.
	 */
	if (test_thread_flag(TIF_SINGLESTEP))
		regs->flags |= X86_EFLAGS_TF;

	/* do the secure computing check first */
	secure_computing(regs->orig_ax);

	if (unlikely(test_thread_flag(TIF_SYSCALL_EMU)))
		ret = -1L;

	if ((ret || test_thread_flag(TIF_SYSCALL_TRACE)) &&
	    tracehook_report_syscall_entry(regs))
		ret = -1L;

	if (unlikely(current->audit_context)) {
		if (IS_IA32)
			audit_syscall_entry(AUDIT_ARCH_I386,
					    regs->orig_ax,
					    regs->bx, regs->cx,
					    regs->dx, regs->si);
#ifdef CONFIG_X86_64
		else
			audit_syscall_entry(AUDIT_ARCH_X86_64,
					    regs->orig_ax,
					    regs->di, regs->si,
					    regs->dx, regs->r10);
#endif
	}

	return ret ?: regs->orig_ax;
}

asmregparm void syscall_trace_leave(struct pt_regs *regs)
{
	if (unlikely(current->audit_context))
		audit_syscall_exit(AUDITSC_RESULT(regs->ax), regs->ax);

	if (test_thread_flag(TIF_SYSCALL_TRACE))
		tracehook_report_syscall_exit(regs, 0);

	/*
	 * If TIF_SYSCALL_EMU is set, we only get here because of
	 * TIF_SINGLESTEP (i.e. this is PTRACE_SYSEMU_SINGLESTEP).
	 * We already reported this syscall instruction in
	 * syscall_trace_enter(), so don't do any more now.
	 */
	if (unlikely(test_thread_flag(TIF_SYSCALL_EMU)))
		return;

	/*
	 * If we are single-stepping, synthesize a trap to follow the
	 * system call instruction.
	 */
	if (test_thread_flag(TIF_SINGLESTEP) &&
	    tracehook_consider_fatal_signal(current, SIGTRAP, SIG_DFL))
		send_sigtrap(current, regs, 0, TRAP_BRKPT);
}