drivers/net/sunbmac.h


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/* $Id: sunbmac.h,v 1.7 2000/07/11 22:35:22 davem Exp $
 * sunbmac.h: Defines for the Sun "Big MAC" 100baseT ethernet cards.
 *
 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
 */

#ifndef _SUNBMAC_H
#define _SUNBMAC_H

/* QEC global registers. */
#define GLOB_CTRL	0x00UL	/* Control                  */
#define GLOB_STAT	0x04UL	/* Status                   */
#define GLOB_PSIZE	0x08UL	/* Packet Size              */
#define GLOB_MSIZE	0x0cUL	/* Local-mem size (64K)     */
#define GLOB_RSIZE	0x10UL	/* Receive partition size   */
#define GLOB_TSIZE	0x14UL	/* Transmit partition size  */
#define GLOB_REG_SIZE	0x18UL

#define GLOB_CTRL_MMODE       0x40000000 /* MACE qec mode            */
#define GLOB_CTRL_BMODE       0x10000000 /* BigMAC qec mode          */
#define GLOB_CTRL_EPAR        0x00000020 /* Enable parity            */
#define GLOB_CTRL_ACNTRL      0x00000018 /* SBUS arbitration control */
#define GLOB_CTRL_B64         0x00000004 /* 64 byte dvma bursts      */
#define GLOB_CTRL_B32         0x00000002 /* 32 byte dvma bursts      */
#define GLOB_CTRL_B16         0x00000000 /* 16 byte dvma bursts      */
#define GLOB_CTRL_RESET       0x00000001 /* Reset the QEC            */

#define GLOB_STAT_TX          0x00000008 /* BigMAC Transmit IRQ      */
#define GLOB_STAT_RX          0x00000004 /* BigMAC Receive IRQ       */
#define GLOB_STAT_BM          0x00000002 /* BigMAC Global IRQ        */
#define GLOB_STAT_ER          0x00000001 /* BigMAC Error IRQ         */

#define GLOB_PSIZE_2048       0x00       /* 2k packet size           */
#define GLOB_PSIZE_4096       0x01       /* 4k packet size           */
#define GLOB_PSIZE_6144       0x10       /* 6k packet size           */
#define GLOB_PSIZE_8192       0x11       /* 8k packet size           */

/* QEC BigMAC channel registers. */
#define CREG_CTRL	0x00UL	/* Control                   */
#define CREG_STAT	0x04UL	/* Status                    */
#define CREG_RXDS	0x08UL	/* RX descriptor ring ptr    */
#define CREG_TXDS	0x0cUL	/* TX descriptor ring ptr    */
#define CREG_RIMASK	0x10UL	/* RX Interrupt Mask         */
#define CREG_TIMASK	0x14UL	/* TX Interrupt Mask         */
#define CREG_QMASK	0x18UL	/* QEC Error Interrupt Mask  */
#define CREG_BMASK	0x1cUL	/* BigMAC Error Interrupt Mask*/
#define CREG_RXWBUFPTR	0x20UL	/* Local memory rx write ptr */
#define CREG_RXRBUFPTR	0x24UL	/* Local memory rx read ptr  */
#define CREG_TXWBUFPTR	0x28UL	/* Local memory tx write ptr */
#define CREG_TXRBUFPTR	0x2cUL	/* Local memory tx read ptr  */
#define CREG_CCNT	0x30UL	/* Collision Counter         */
#define CREG_REG_SIZE	0x34UL

#define CREG_CTRL_TWAKEUP     0x00000001  /* Transmitter Wakeup, 'go'. */

#define CREG_STAT_BERROR      0x80000000  /* BigMAC error              */
#define CREG_STAT_TXIRQ       0x00200000  /* Transmit Interrupt        */
#define CREG_STAT_TXDERROR    0x00080000  /* TX Descriptor is bogus    */
#define CREG_STAT_TXLERR      0x00040000  /* Late Transmit Error       */
#define CREG_STAT_TXPERR      0x00020000  /* Transmit Parity Error     */
#define CREG_STAT_TXSERR      0x00010000  /* Transmit SBUS error ack   */
#define CREG_STAT_RXIRQ       0x00000020  /* Receive Interrupt         */
#define CREG_STAT_RXDROP      0x00000010  /* Dropped a RX'd packet     */
#define CREG_STAT_RXSMALL     0x00000008  /* Receive buffer too small  */
#define CREG_STAT_RXLERR      0x00000004  /* Receive Late Error        */
#define CREG_STAT_RXPERR      0x00000002  /* Receive Parity Error      */
#define CREG_STAT_RXSERR      0x00000001  /* Receive SBUS Error ACK    */

#define CREG_STAT_ERRORS      (CREG_STAT_BERROR|CREG_STAT_TXDERROR|CREG_STAT_TXLERR|   \
                               CREG_STAT_TXPERR|CREG_STAT_TXSERR|CREG_STAT_RXDROP|     \
                               CREG_STAT_RXSMALL|CREG_STAT_RXLERR|CREG_STAT_RXPERR|    \
                               CREG_STAT_RXSERR)

#define CREG_QMASK_TXDERROR   0x00080000  /* TXD error                 */
#define CREG_QMASK_TXLERR     0x00040000  /* TX late error             */
#define CREG_QMASK_TXPERR     0x00020000  /* TX parity error           */
#define CREG_QMASK_TXSERR     0x00010000  /* TX sbus error ack         */
#define CREG_QMASK_RXDROP     0x00000010  /* RX drop                   */
#define CREG_QMASK_RXBERROR   0x00000008  /* RX buffer error           */
#define CREG_QMASK_RXLEERR    0x00000004  /* RX late error             */
#define CREG_QMASK_RXPERR     0x00000002  /* RX parity error           */
#define CREG_QMASK_RXSERR     0x00000001  /* RX sbus error ack         */

/* BIGMAC core registers */
#define BMAC_XIFCFG	0x000UL	/* XIF config register                */
	/* 0x004-->0x0fc, reserved */
#define BMAC_STATUS	0x100UL	/* Status register, clear on read     */
#define BMAC_IMASK	0x104UL	/* Interrupt mask register            */
	/* 0x108-->0x204, reserved */
#define BMAC_TXSWRESET	0x208UL	/* Transmitter software reset         */
#define BMAC_TXCFG	0x20cUL	/* Transmitter config register        */
#define BMAC_IGAP1	0x210UL	/* Inter-packet gap 1                 */
#define BMAC_IGAP2	0x214UL	/* Inter-packet gap 2                 */
#define BMAC_ALIMIT	0x218UL	/* Transmit attempt limit             */
#define BMAC_STIME	0x21cUL	/* Transmit slot time                 */
#define BMAC_PLEN	0x220UL	/* Size of transmit preamble          */
#define BMAC_PPAT	0x224UL	/* Pattern for transmit preamble      */
#define BMAC_TXDELIM	0x228UL	/* Transmit delimiter                 */
#define BMAC_JSIZE	0x22cUL	/* Toe jam...                         */
#define BMAC_TXPMAX	0x230UL	/* Transmit max pkt size              */
#define BMAC_TXPMIN	0x234UL	/* Transmit min pkt size              */
#define BMAC_PATTEMPT	0x238UL	/* Count of transmit peak attempts    */
#define BMAC_DTCTR	0x23cUL	/* Transmit defer timer               */
#define BMAC_NCCTR	0x240UL	/* Transmit normal-collision counter  */
#define BMAC_FCCTR	0x244UL	/* Transmit first-collision counter   */
#define BMAC_EXCTR	0x248UL	/* Transmit excess-collision counter  */
#define BMAC_LTCTR	0x24cUL	/* Transmit late-collision counter    */
#define BMAC_RSEED	0x250UL	/* Transmit random number seed        */
#define BMAC_TXSMACHINE	0x254UL /* Transmit state machine             */
	/* 0x258-->0x304, reserved */
#define BMAC_RXSWRESET	0x308UL	/* Receiver software reset            */
#define BMAC_RXCFG	0x30cUL	/* Receiver config register           */
#define BMAC_RXPMAX	0x310UL	/* Receive max pkt size               */
#define BMAC_RXPMIN	0x314UL	/* Receive min pkt size               */
#define BMAC_MACADDR2	0x318UL	/* Ether address register 2           */
#define BMAC_MACADDR1	0x31cUL	/* Ether address register 1           */
#define BMAC_MACADDR0	0x320UL	/* Ether address register 0           */
#define BMAC_FRCTR	0x324UL	/* Receive frame receive counter      */
#define BMAC_GLECTR	0x328UL	/* Receive giant-length error counter */
#define BMAC_UNALECTR	0x32cUL	/* Receive unaligned error counter    */
#define BMAC_RCRCECTR	0x330UL	/* Receive CRC error counter          */
#define BMAC_RXSMACHINE	0x334UL	/* Receiver state machine             */
#define BMAC_RXCVALID	0x338UL	/* Receiver code violation            */
	/* 0x33c, reserved */
#define BMAC_HTABLE3	0x340UL	/* Hash table 3                       */
#define BMAC_HTABLE2	0x344UL	/* Hash table 2                       */
#define BMAC_HTABLE1	0x348UL	/* Hash table 1                       */
#define BMAC_HTABLE0	0x34cUL	/* Hash table 0                       */
#define BMAC_AFILTER2	0x350UL	/* Address filter 2                   */
#define BMAC_AFILTER1	0x354UL	/* Address filter 1                   */
#define BMAC_AFILTER0	0x358UL	/* Address filter 0                   */
#define BMAC_AFMASK	0x35cUL	/* Address filter mask                */
#define BMAC_REG_SIZE	0x360UL

/* BigMac XIF config register. */
#define BIGMAC_XCFG_ODENABLE   0x00000001 /* Output driver enable                     */
#define BIGMAC_XCFG_RESV       0x00000002 /* Reserved, write always as 1              */
#define BIGMAC_XCFG_MLBACK     0x00000004 /* Loopback-mode MII enable                 */
#define BIGMAC_XCFG_SMODE      0x00000008 /* Enable serial mode                       */

/* BigMAC status register. */
#define BIGMAC_STAT_GOTFRAME   0x00000001 /* Received a frame                         */
#define BIGMAC_STAT_RCNTEXP    0x00000002 /* Receive frame counter expired            */
#define BIGMAC_STAT_ACNTEXP    0x00000004 /* Align-error counter expired              */
#define BIGMAC_STAT_CCNTEXP    0x00000008 /* CRC-error counter expired                */
#define BIGMAC_STAT_LCNTEXP    0x00000010 /* Length-error counter expired             */
#define BIGMAC_STAT_RFIFOVF    0x00000020 /* Receive FIFO overflow                    */
#define BIGMAC_STAT_CVCNTEXP   0x00000040 /* Code-violation counter expired           */
#define BIGMAC_STAT_SENTFRAME  0x00000100 /* Transmitted a frame                      */
#define BIGMAC_STAT_TFIFO_UND  0x00000200 /* Transmit FIFO underrun                   */
#define BIGMAC_STAT_MAXPKTERR  0x00000400 /* Max-packet size error                    */
#define BIGMAC_STAT_NCNTEXP    0x00000800 /* Normal-collision counter expired         */
#define BIGMAC_STAT_ECNTEXP    0x00001000 /* Excess-collision counter expired         */
#define BIGMAC_STAT_LCCNTEXP   0x00002000 /* Late-collision counter expired           */
#define BIGMAC_STAT_FCNTEXP    0x00004000 /* First-collision counter expired          */
#define BIGMAC_STAT_DTIMEXP    0x00008000 /* Defer-timer expired                      */

/* BigMAC interrupt mask register. */
#define BIGMAC_IMASK_GOTFRAME  0x00000001 /* Received a frame                         */
#define BIGMAC_IMASK_RCNTEXP   0x00000002 /* Receive frame counter expired            */
#define BIGMAC_IMASK_ACNTEXP   0x00000004 /* Align-error counter expired              */
#define BIGMAC_IMASK_CCNTEXP   0x00000008 /* CRC-error counter expired                */
#define BIGMAC_IMASK_LCNTEXP   0x00000010 /* Length-error counter expired             */
#define BIGMAC_IMASK_RFIFOVF   0x00000020 /* Receive FIFO overflow                    */
#define BIGMAC_IMASK_CVCNTEXP  0x00000040 /* Code-violation counter expired           */
#define BIGMAC_IMASK_SENTFRAME 0x00000100 /* Transmitted a frame                      */
#define BIGMAC_IMASK_TFIFO_UND 0x00000200 /* Transmit FIFO underrun                   */
#define BIGMAC_IMASK_MAXPKTERR 0x00000400 /* Max-packet size error                    */
#define BIGMAC_IMASK_NCNTEXP   0x00000800 /* Normal-collision counter expired         */
#define BIGMAC_IMASK_ECNTEXP   0x00001000 /* Excess-collision counter expired         */
#define BIGMAC_IMASK_LCCNTEXP  0x00002000 /* Late-collision counter expired           */
#define BIGMAC_IMASK_FCNTEXP   0x00004000 /* First-collision counter expired          */
#define BIGMAC_IMASK_DTIMEXP   0x00008000 /* Defer-timer expired                      */

/* BigMac transmit config register. */
#define BIGMAC_TXCFG_ENABLE    0x00000001 /* Enable the transmitter                   */
#define BIGMAC_TXCFG_FIFO      0x00000010 /* Default tx fthresh...                    */
#define BIGMAC_TXCFG_SMODE     0x00000020 /* Enable slow transmit mode                */
#define BIGMAC_TXCFG_CIGN      0x00000040 /* Ignore transmit collisions               */
#define BIGMAC_TXCFG_FCSOFF    0x00000080 /* Do not emit FCS                          */
#define BIGMAC_TXCFG_DBACKOFF  0x00000100 /* Disable backoff                          */
#define BIGMAC_TXCFG_FULLDPLX  0x00000200 /* Enable full-duplex                       */

/* BigMac receive config register. */
#define BIGMAC_RXCFG_ENABLE    0x00000001 /* Enable the receiver                      */
#define BIGMAC_RXCFG_FIFO      0x0000000e /* Default rx fthresh...                    */
#define BIGMAC_RXCFG_PSTRIP    0x00000020 /* Pad byte strip enable                    */
#define BIGMAC_RXCFG_PMISC     0x00000040 /* Enable promiscous mode                   */
#define BIGMAC_RXCFG_DERR      0x00000080 /* Disable error checking                   */
#define BIGMAC_RXCFG_DCRCS     0x00000100 /* Disable CRC stripping                    */
#define BIGMAC_RXCFG_ME        0x00000200 /* Receive packets addressed to me          */
#define BIGMAC_RXCFG_PGRP      0x00000400 /* Enable promisc group mode                */
#define BIGMAC_RXCFG_HENABLE   0x00000800 /* Enable the hash filter                   */
#define BIGMAC_RXCFG_AENABLE   0x00001000 /* Enable the address filter                */

/* The BigMAC PHY transceiver.  Not nearly as sophisticated as the happy meal
 * one.  But it does have the "bit banger", oh baby.
 */
#define TCVR_TPAL	0x00UL
#define TCVR_MPAL	0x04UL
#define TCVR_REG_SIZE	0x08UL

/* Frame commands. */
#define FRAME_WRITE           0x50020000
#define FRAME_READ            0x60020000

/* Tranceiver registers. */
#define TCVR_PAL_SERIAL       0x00000001 /* Enable serial mode              */
#define TCVR_PAL_EXTLBACK     0x00000002 /* Enable external loopback        */
#define TCVR_PAL_MSENSE       0x00000004 /* Media sense                     */
#define TCVR_PAL_LTENABLE     0x00000008 /* Link test enable                */
#define TCVR_PAL_LTSTATUS     0x00000010 /* Link test status  (P1 only)     */

/* Management PAL. */
#define MGMT_PAL_DCLOCK       0x00000001 /* Data clock                      */
#define MGMT_PAL_OENAB        0x00000002 /* Output enabler                  */
#define MGMT_PAL_MDIO         0x00000004 /* MDIO Data/attached              */
#define MGMT_PAL_TIMEO        0x00000008 /* Transmit enable timeout error   */
#define MGMT_PAL_EXT_MDIO     MGMT_PAL_MDIO
#define MGMT_PAL_INT_MDIO     MGMT_PAL_TIMEO

/* Here are some PHY addresses. */
#define BIGMAC_PHY_EXTERNAL   0 /* External transceiver */
#define BIGMAC_PHY_INTERNAL   1 /* Internal transceiver */

/* PHY registers */
#define BIGMAC_BMCR           0x00 /* Basic mode control register	*/
#define BIGMAC_BMSR           0x01 /* Basic mode status register	*/

/* BMCR bits */
#define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
#define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
#define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
#define BMCR_SPEED100           0x2000  /* Select 100Mbps              */
#define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
#define BMCR_RESET              0x8000  /* Reset the DP83840           */

/* BMSR bits */
#define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
#define BMSR_JCD                0x0002  /* Jabber detected             */
#define BMSR_LSTATUS            0x0004  /* Link status                 */

/* Ring descriptors and such, same as Quad Ethernet. */
struct be_rxd {
	u32 rx_flags;
	u32 rx_addr;
};

#define RXD_OWN      0x80000000 /* Ownership.      */
#define RXD_UPDATE   0x10000000 /* Being Updated?  */
#define RXD_LENGTH   0x000007ff /* Packet Length.  */

struct be_txd {
	u32 tx_flags;
	u32 tx_addr;
};

#define TXD_OWN      0x80000000 /* Ownership.      */
#define TXD_SOP      0x40000000 /* Start Of Packet */
#define TXD_EOP      0x20000000 /* End Of Packet   */
#define TXD_UPDATE   0x10000000 /* Being Updated?  */
#define TXD_LENGTH   0x000007ff /* Packet Length.  */

#define TX_RING_MAXSIZE   256
#define RX_RING_MAXSIZE   256

#define TX_RING_SIZE      256
#define RX_RING_SIZE      256

#define NEXT_RX(num)       (((num) + 1) & (RX_RING_SIZE - 1))
#define NEXT_TX(num)       (((num) + 1) & (TX_RING_SIZE - 1))
#define PREV_RX(num)       (((num) - 1) & (RX_RING_SIZE - 1))
#define PREV_TX(num)       (((num) - 1) & (TX_RING_SIZE - 1))

#define TX_BUFFS_AVAIL(bp)                                    \
        (((bp)->tx_old <= (bp)->tx_new) ?                     \
	  (bp)->tx_old + (TX_RING_SIZE - 1) - (bp)->tx_new :  \
			    (bp)->tx_old - (bp)->tx_new - 1)


#define RX_COPY_THRESHOLD  256
#define RX_BUF_ALLOC_SIZE  (ETH_FRAME_LEN + (64 * 3))

struct bmac_init_block {
	struct be_rxd be_rxd[RX_RING_MAXSIZE];
	struct be_txd be_txd[TX_RING_MAXSIZE];
};

#define bib_offset(mem, elem) \
((__u32)((unsigned long)(&(((struct bmac_init_block *)0)->mem[elem]))))

/* Now software state stuff. */
enum bigmac_transceiver {
	external = 0,
	internal = 1,
	none     = 2,
};

/* Timer state engine. */
enum bigmac_timer_state {
	ltrywait = 1,  /* Forcing try of all modes, from fastest to slowest. */
	asleep   = 2,  /* Timer inactive.                                    */
};

struct bigmac {
	void __iomem	*gregs;	/* QEC Global Registers               */
	void __iomem	*creg;	/* QEC BigMAC Channel Registers       */
	void __iomem	*bregs;	/* BigMAC Registers                   */
	void __iomem	*tregs;	/* BigMAC Transceiver                 */
	struct bmac_init_block	*bmac_block;	/* RX and TX descriptors */
	__u32			 bblock_dvma;	/* RX and TX descriptors */

	spinlock_t		lock;

	struct sk_buff		*rx_skbs[RX_RING_SIZE];
	struct sk_buff		*tx_skbs[TX_RING_SIZE];

	int rx_new, tx_new, rx_old, tx_old;

	int board_rev;				/* BigMAC board revision.             */

	enum bigmac_transceiver	tcvr_type;
	unsigned int		bigmac_bursts;
	unsigned int		paddr;
	unsigned short		sw_bmsr;         /* SW copy of PHY BMSR               */
	unsigned short		sw_bmcr;         /* SW copy of PHY BMCR               */
	struct timer_list	bigmac_timer;
	enum bigmac_timer_state	timer_state;
	unsigned int		timer_ticks;

	struct net_device_stats	enet_stats;
	struct sbus_dev		*qec_sdev;
	struct sbus_dev		*bigmac_sdev;
	struct net_device	*dev;
};

/* We use this to acquire receive skb's that we can DMA directly into. */
#define ALIGNED_RX_SKB_ADDR(addr) \
        ((((unsigned long)(addr) + (64 - 1)) & ~(64 - 1)) - (unsigned long)(addr))

static inline struct sk_buff *big_mac_alloc_skb(unsigned int length, gfp_t gfp_flags)
{
	struct sk_buff *skb;

	skb = alloc_skb(length + 64, gfp_flags);
	if(skb) {
		int offset = ALIGNED_RX_SKB_ADDR(skb->data);

		if(offset)
			skb_reserve(skb, offset);
	}
	return skb;
}

#endif /* !(_SUNBMAC_H) */
/*
 * linux/drivers/video/atafb.c -- Atari builtin chipset frame buffer device
 *
 *  Copyright (C) 1994 Martin Schaller & Roman Hodek
 *  
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file COPYING in the main directory of this archive
 * for more details.
 *
 * History:
 *   - 03 Jan 95: Original version by Martin Schaller: The TT driver and
 *                all the device independent stuff
 *   - 09 Jan 95: Roman: I've added the hardware abstraction (hw_switch)
 *                and wrote the Falcon, ST(E), and External drivers
 *                based on the original TT driver.
 *   - 07 May 95: Martin: Added colormap operations for the external driver
 *   - 21 May 95: Martin: Added support for overscan
 *		  Andreas: some bug fixes for this
 *   -    Jul 95: Guenther Kelleter <guenther@pool.informatik.rwth-aachen.de>:
 *                Programmable Falcon video modes
 *                (thanks to Christian Cartus for documentation
 *                of VIDEL registers).
 *   - 27 Dec 95: Guenther: Implemented user definable video modes "user[0-7]"
 *                on minor 24...31. "user0" may be set on commandline by
 *                "R<x>;<y>;<depth>". (Makes sense only on Falcon)
 *                Video mode switch on Falcon now done at next VBL interrupt
 *                to avoid the annoying right shift of the screen.
 *   - 23 Sep 97: Juergen: added xres_virtual for cards like ProMST
 *                The external-part is legacy, therefore hardware-specific
 *                functions like panning/hardwarescrolling/blanking isn't
 *				  supported.
 *   - 29 Sep 97: Juergen: added Romans suggestion for pan_display
 *				  (var->xoffset was changed even if no set_screen_base avail.)
 *	 - 05 Oct 97: Juergen: extfb (PACKED_PIXEL) is FB_PSEUDOCOLOR 'cause
 *				  we know how to set the colors
 *				  ext_*palette: read from ext_colors (former MV300_colors)
 *							    write to ext_colors and RAMDAC
 *
 * To do:
 *   - For the Falcon it is not possible to set random video modes on
 *     SM124 and SC/TV, only the bootup resolution is supported.
 *
 */

#define ATAFB_TT
#define ATAFB_STE
#define ATAFB_EXT
#define ATAFB_FALCON

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/tty.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/interrupt.h>

#include <asm/setup.h>
#include <asm/uaccess.h>
#include <asm/pgtable.h>
#include <asm/irq.h>
#include <asm/io.h>

#include <asm/atarihw.h>
#include <asm/atariints.h>
#include <asm/atari_stram.h>

#include <linux/fb.h>
#include <asm/atarikb.h>

#include <video/fbcon.h>
#include <video/fbcon-cfb8.h>
#include <video/fbcon-cfb16.h>
#include <video/fbcon-iplan2p2.h>
#include <video/fbcon-iplan2p4.h>
#include <video/fbcon-iplan2p8.h>
#include <video/fbcon-mfb.h>


#define SWITCH_ACIA 0x01		/* modes for switch on OverScan */
#define SWITCH_SND6 0x40
#define SWITCH_SND7 0x80
#define SWITCH_NONE 0x00


#define up(x, r) (((x) + (r) - 1) & ~((r)-1))


static int default_par=0;	/* default resolution (0=none) */

static unsigned long default_mem_req=0;

static int hwscroll=-1;

static int use_hwscroll = 1;

static int sttt_xres=640,st_yres=400,tt_yres=480;
static int sttt_xres_virtual=640,sttt_yres_virtual=400;
static int ovsc_offset=0, ovsc_addlen=0;

static struct atafb_par {
	void *screen_base;
	int yres_virtual;
#if defined ATAFB_TT || defined ATAFB_STE
	union {
		struct {
			int mode;
			int sync;
		} tt, st;
#endif
#ifdef ATAFB_FALCON
		struct falcon_hw {
			/* Here are fields for storing a video mode, as direct
			 * parameters for the hardware.
			 */
			short sync;
			short line_width;
			short line_offset;
			short st_shift;
			short f_shift;
			short vid_control;
			short vid_mode;
			short xoffset;
			short hht, hbb, hbe, hdb, hde, hss;
			short vft, vbb, vbe, vdb, vde, vss;
			/* auxiliary information */
			short mono;
			short ste_mode;
			short bpp;
		} falcon;
#endif
		/* Nothing needed for external mode */
	} hw;
} current_par;

/* Don't calculate an own resolution, and thus don't change the one found when
 * booting (currently used for the Falcon to keep settings for internal video
 * hardware extensions (e.g. ScreenBlaster)  */
static int DontCalcRes = 0; 

#ifdef ATAFB_FALCON
#define HHT hw.falcon.hht
#define HBB hw.falcon.hbb
#define HBE hw.falcon.hbe
#define HDB hw.falcon.hdb
#define HDE hw.falcon.hde
#define HSS hw.falcon.hss
#define VFT hw.falcon.vft
#define VBB hw.falcon.vbb
#define VBE hw.falcon.vbe
#define VDB hw.falcon.vdb
#define VDE hw.falcon.vde
#define VSS hw.falcon.vss
#define VCO_CLOCK25		0x04
#define VCO_CSYPOS		0x10
#define VCO_VSYPOS		0x20
#define VCO_HSYPOS		0x40
#define VCO_SHORTOFFS	0x100
#define VMO_DOUBLE		0x01
#define VMO_INTER		0x02
#define VMO_PREMASK		0x0c
#endif

static struct fb_info fb_info;

static void *screen_base;	/* base address of screen */
static void *real_screen_base;	/* (only for Overscan) */

static int screen_len;

static int current_par_valid=0; 

static int mono_moni=0;

static struct display disp;


#ifdef ATAFB_EXT
/* external video handling */

static unsigned			external_xres;
static unsigned			external_xres_virtual;
static unsigned			external_yres;
/* not needed - atafb will never support panning/hardwarescroll with external
 * static unsigned		external_yres_virtual;	
*/

static unsigned			external_depth;
static int				external_pmode;
static void *external_addr = 0;
static unsigned long	external_len;
static unsigned long	external_vgaiobase = 0;
static unsigned int		external_bitspercol = 6;

/* 
JOE <joe@amber.dinoco.de>: 
added card type for external driver, is only needed for
colormap handling.
*/

enum cardtype { IS_VGA, IS_MV300 };
static enum cardtype external_card_type = IS_VGA;

/*
The MV300 mixes the color registers. So we need an array of munged
indices in order to access the correct reg.
*/
static int MV300_reg_1bit[2]={0,1};
static int MV300_reg_4bit[16]={
0, 8, 4, 12, 2, 10, 6, 14, 1, 9, 5, 13, 3, 11, 7, 15 };
static int MV300_reg_8bit[256]={
0, 128, 64, 192, 32, 160, 96, 224, 16, 144, 80, 208, 48, 176, 112, 240, 
8, 136, 72, 200, 40, 168, 104, 232, 24, 152, 88, 216, 56, 184, 120, 248, 
4, 132, 68, 196, 36, 164, 100, 228, 20, 148, 84, 212, 52, 180, 116, 244, 
12, 140, 76, 204, 44, 172, 108, 236, 28, 156, 92, 220, 60, 188, 124, 252, 
2, 130, 66, 194, 34, 162, 98, 226, 18, 146, 82, 210, 50, 178, 114, 242, 
10, 138, 74, 202, 42, 170, 106, 234, 26, 154, 90, 218, 58, 186, 122, 250, 
6, 134, 70, 198, 38, 166, 102, 230, 22, 150, 86, 214, 54, 182, 118, 246, 
14, 142, 78, 206, 46, 174, 110, 238, 30, 158, 94, 222, 62, 190, 126, 254, 
1, 129, 65, 193, 33, 161, 97, 225, 17, 145, 81, 209, 49, 177, 113, 241, 
9, 137, 73, 201, 41, 169, 105, 233, 25, 153, 89, 217, 57, 185, 121, 249, 
5, 133, 69, 197, 37, 165, 101, 229, 21, 149, 85, 213, 53, 181, 117, 245, 
13, 141, 77, 205, 45, 173, 109, 237, 29, 157, 93, 221, 61, 189, 125, 253, 
3, 131, 67, 195, 35, 163, 99, 227, 19, 147, 83, 211, 51, 179, 115, 243, 
11, 139, 75, 203, 43, 171, 107, 235, 27, 155, 91, 219, 59, 187, 123, 251, 
7, 135, 71, 199, 39, 167, 103, 231, 23, 151, 87, 215, 55, 183, 119, 247, 
15, 143, 79, 207, 47, 175, 111, 239, 31, 159, 95, 223, 63, 191, 127, 255 }; 

static int *MV300_reg = MV300_reg_8bit;

/*
And on the MV300 it's difficult to read out the hardware palette. So we
just keep track of the set colors in our own array here, and use that!
*/

static struct { unsigned char red,green,blue,pad; } ext_color[256];
#endif /* ATAFB_EXT */


static int inverse=0;

extern int fontheight_8x8;
extern int fontwidth_8x8;
extern unsigned char fontdata_8x8[];

extern int fontheight_8x16;
extern int fontwidth_8x16;
extern unsigned char fontdata_8x16[];

/* ++roman: This structure abstracts from the underlying hardware (ST(e),
 * TT, or Falcon.
 *
 * int (*detect)( void )
 *   This function should detect the current video mode settings and
 *   store them in atafb_predefined[0] for later reference by the
 *   user. Return the index+1 of an equivalent predefined mode or 0
 *   if there is no such.
 * 
 * int (*encode_fix)( struct fb_fix_screeninfo *fix,
 *                    struct atafb_par *par )
 *   This function should fill in the 'fix' structure based on the
 *   values in the 'par' structure.
 *   
 * int (*decode_var)( struct fb_var_screeninfo *var,
 *                    struct atafb_par *par )
 *   Get the video params out of 'var'. If a value doesn't fit, round
 *   it up, if it's too big, return EINVAL.
 *   Round up in the following order: bits_per_pixel, xres, yres, 
 *   xres_virtual, yres_virtual, xoffset, yoffset, grayscale, bitfields, 
 *   horizontal timing, vertical timing.
 *
 * int (*encode_var)( struct fb_var_screeninfo *var,
 *                    struct atafb_par *par );
 *   Fill the 'var' structure based on the values in 'par' and maybe
 *   other values read out of the hardware.
 *   
 * void (*get_par)( struct atafb_par *par )
 *   Fill the hardware's 'par' structure.
 *   
 * void (*set_par)( struct atafb_par *par )
 *   Set the hardware according to 'par'.
 *   
 * int (*getcolreg)( unsigned regno, unsigned *red,
 *                   unsigned *green, unsigned *blue,
 *                   unsigned *transp, struct fb_info *info )
 *   Read a single color register and split it into
 *   colors/transparent. Return != 0 for invalid regno.
 *
 * void (*set_screen_base)(void *s_base)
 *   Set the base address of the displayed frame buffer. Only called
 *   if yres_virtual > yres or xres_virtual > xres.
 *
 * int (*blank)( int blank_mode )
 *   Blank the screen if blank_mode!=0, else unblank. If blank==NULL then
 *   the caller blanks by setting the CLUT to all black. Return 0 if blanking
 *   succeeded, !=0 if un-/blanking failed due to e.g. a video mode which
 *   doesn't support it. Implements VESA suspend and powerdown modes on
 *   hardware that supports disabling hsync/vsync:
 *       blank_mode==2: suspend vsync, 3:suspend hsync, 4: powerdown.
 */

static struct fb_hwswitch {
	int  (*detect)( void );
	int  (*encode_fix)( struct fb_fix_screeninfo *fix,
						struct atafb_par *par );
	int  (*decode_var)( struct fb_var_screeninfo *var,
						struct atafb_par *par );
	int  (*encode_var)( struct fb_var_screeninfo *var,
						struct atafb_par *par );
	void (*get_par)( struct atafb_par *par );
	void (*set_par)( struct atafb_par *par );
	int  (*getcolreg)( unsigned regno, unsigned *red,
					   unsigned *green, unsigned *blue,
					   unsigned *transp, struct fb_info *info );
	void (*set_screen_base)(void *s_base);
	int  (*blank)( int blank_mode );
	int  (*pan_display)( struct fb_var_screeninfo *var,
						 struct atafb_par *par);
} *fbhw;

static char *autodetect_names[] = {"autodetect", NULL};
static char *stlow_names[] = {"stlow", NULL};
static char *stmid_names[] = {"stmid", "default5", NULL};
static char *sthigh_names[] = {"sthigh", "default4", NULL};
static char *ttlow_names[] = {"ttlow", NULL};
static char *ttmid_names[]= {"ttmid", "default1", NULL};
static char *tthigh_names[]= {"tthigh", "default2", NULL};
static char *vga2_names[] = {"vga2", NULL};
static char *vga4_names[] = {"vga4", NULL};
static char *vga16_names[] = {"vga16", "default3", NULL};
static char *vga256_names[] = {"vga256", NULL};
static char *falh2_names[] = {"falh2", NULL};
static char *falh16_names[] = {"falh16", NULL};

static char **fb_var_names[] = {
	/* Writing the name arrays directly in this array (via "(char *[]){...}")
	 * crashes gcc 2.5.8 (sigsegv) if the inner array
	 * contains more than two items. I've also seen that all elements
	 * were identical to the last (my cross-gcc) :-(*/
	autodetect_names,
	stlow_names,
	stmid_names,
	sthigh_names,
	ttlow_names,
	ttmid_names,
	tthigh_names,
	vga2_names,
	vga4_names,
	vga16_names,
	vga256_names,
	falh2_names,
	falh16_names,
	NULL
	/* ,NULL */ /* this causes a sigsegv on my gcc-2.5.8 */
};

static struct fb_var_screeninfo atafb_predefined[] = {
 	/*
 	 * yres_virtual==0 means use hw-scrolling if possible, else yres
 	 */
 	{ /* autodetect */
	  0, 0, 0, 0, 0, 0, 0, 0,   		/* xres-grayscale */
	  {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, {0, 0, 0}, 	/* red green blue tran*/
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
 	{ /* st low */
	  320, 200, 320, 0, 0, 0, 4, 0,
	  {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* st mid */
	  640, 200, 640, 0, 0, 0, 2, 0,
	  {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* st high */
	  640, 400, 640, 0, 0, 0, 1, 0,
	  {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* tt low */
	  320, 480, 320, 0, 0, 0, 8, 0,
	  {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* tt mid */
	  640, 480, 640, 0, 0, 0, 4, 0,
	  {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* tt high */
	  1280, 960, 1280, 0, 0, 0, 1, 0,
	  {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* vga2 */
	  640, 480, 640, 0, 0, 0, 1, 0,
	  {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* vga4 */
	  640, 480, 640, 0, 0, 0, 2, 0,
	  {0, 4, 0}, {0, 4, 0}, {0, 4, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* vga16 */
	  640, 480, 640, 0, 0, 0, 4, 0,
	  {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* vga256 */
	  640, 480, 640, 0, 0, 0, 8, 0,
	  {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* falh2 */
	  896, 608, 896, 0, 0, 0, 1, 0,
	  {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
	{ /* falh16 */
	  896, 608, 896, 0, 0, 0, 4, 0,
	  {0, 6, 0}, {0, 6, 0}, {0, 6, 0}, {0, 0, 0},
	  0, 0, -1, -1, 0, 0, 0, 0, 0, 0, 0, 0 },
};

static int num_atafb_predefined=ARRAY_SIZE(atafb_predefined);


static int
get_video_mode(char *vname)
{
    char ***name_list;
    char **name;
    int i;
    name_list=fb_var_names;
    for (i = 0 ; i < num_atafb_predefined ; i++) {
	name=*(name_list++);
	if (! name || ! *name)
	    break;
	while (*name) {
	    if (! strcmp(vname, *name))
		return i+1;
	    name++;
	}
    }
    return 0;
}


/* ------------------- TT specific functions ---------------------- */

#ifdef ATAFB_TT

static int tt_encode_fix( struct fb_fix_screeninfo *fix,
						  struct atafb_par *par )

{
	int mode;

	strcpy(fix->id,"Atari Builtin");
	fix->smem_start = (unsigned long)real_screen_base;
	fix->smem_len = screen_len;
	fix->type=FB_TYPE_INTERLEAVED_PLANES;
	fix->type_aux=2;
	fix->visual=FB_VISUAL_PSEUDOCOLOR;
	mode = par->hw.tt.mode & TT_SHIFTER_MODEMASK;
	if (mode == TT_SHIFTER_TTHIGH || mode == TT_SHIFTER_STHIGH) {
		fix->type=FB_TYPE_PACKED_PIXELS;
		fix->type_aux=0;
		if (mode == TT_SHIFTER_TTHIGH)
			fix->visual=FB_VISUAL_MONO01;
	}
	fix->xpanstep=0;
	fix->ypanstep=1;
	fix->ywrapstep=0;
	fix->line_length = 0;
	fix->accel = FB_ACCEL_ATARIBLITT;
	return 0;
}


static int tt_decode_var( struct fb_var_screeninfo *var,
						  struct atafb_par *par )
{
	int xres=var->xres;
	int yres=var->yres;
	int bpp=var->bits_per_pixel;
	int linelen;
	int yres_virtual = var->yres_virtual;

	if (mono_moni) {
		if (bpp > 1 || xres > sttt_xres*2 || yres >tt_yres*2)
			return -EINVAL;
		par->hw.tt.mode=TT_SHIFTER_TTHIGH;
		xres=sttt_xres*2;
		yres=tt_yres*2;
		bpp=1;
	} else {
		if (bpp > 8 || xres > sttt_xres || yres > tt_yres)
			return -EINVAL;
		if (bpp > 4) {
			if (xres > sttt_xres/2 || yres > tt_yres)
				return -EINVAL;
			par->hw.tt.mode=TT_SHIFTER_TTLOW;
			xres=sttt_xres/2;
			yres=tt_yres;
			bpp=8;
		}
		else if (bpp > 2) {
			if (xres > sttt_xres || yres > tt_yres)
				return -EINVAL;
			if (xres > sttt_xres/2 || yres > st_yres/2) {
				par->hw.tt.mode=TT_SHIFTER_TTMID;
				xres=sttt_xres;
				yres=tt_yres;
				bpp=4;
			}
			else {
				par->hw.tt.mode=TT_SHIFTER_STLOW;
				xres=sttt_xres/2;
				yres=st_yres/2;
				bpp=4;
			}
		}
		else if (bpp > 1) {
			if (xres > sttt_xres || yres > st_yres/2)
				return -EINVAL;
			par->hw.tt.mode=TT_SHIFTER_STMID;
			xres=sttt_xres;
			yres=st_yres/2;
			bpp=2;
		}
		else if (var->xres > sttt_xres || var->yres > st_yres) {
			return -EINVAL;
		}
		else {
			par->hw.tt.mode=TT_SHIFTER_STHIGH;
			xres=sttt_xres;
			yres=st_yres;
			bpp=1;
		}
	}
	if (yres_virtual <= 0)
		yres_virtual = 0;
	else if (yres_virtual < yres)
		yres_virtual = yres;
	if (var->sync & FB_SYNC_EXT)
		par->hw.tt.sync=0;
	else
		par->hw.tt.sync=1;
	linelen=xres*bpp/8;
	if (yres_virtual * linelen > screen_len && screen_len)
		return -EINVAL;
	if (yres * linelen > screen_len && screen_len)
		return -EINVAL;
	if (var->yoffset + yres > yres_virtual && yres_virtual)
		return -EINVAL;
	par->yres_virtual = yres_virtual;
	par->screen_base = screen_base + var->yoffset * linelen;
	return 0;
}

static int tt_encode_var( struct fb_var_screeninfo *var,
						  struct atafb_par *par )
{
	int linelen;
	memset(var, 0, sizeof(struct fb_var_screeninfo));
	var->red.offset=0;
	var->red.length=4;
	var->red.msb_right=0;
	var->grayscale=0;

	var->pixclock=31041;
	var->left_margin=120;		/* these may be incorrect 	*/
	var->right_margin=100;
	var->upper_margin=8;
	var->lower_margin=16;
	var->hsync_len=140;
	var->vsync_len=30;

	var->height=-1;
	var->width=-1;

	if (par->hw.tt.sync & 1)
		var->sync=0;
	else
		var->sync=FB_SYNC_EXT;

	switch (par->hw.tt.mode & TT_SHIFTER_MODEMASK) {
	case TT_SHIFTER_STLOW:
		var->xres=sttt_xres/2;
		var->xres_virtual=sttt_xres_virtual/2;
		var->yres=st_yres/2;
		var->bits_per_pixel=4;
		break;
	case TT_SHIFTER_STMID:
		var->xres=sttt_xres;
		var->xres_virtual=sttt_xres_virtual;
		var->yres=st_yres/2;
		var->bits_per_pixel=2;
		break;
	case TT_SHIFTER_STHIGH:
		var->xres=sttt_xres;
		var->xres_virtual=sttt_xres_virtual;
		var->yres=st_yres;
		var->bits_per_pixel=1;
		break;
	case TT_SHIFTER_TTLOW:
		var->xres=sttt_xres/2;
		var->xres_virtual=sttt_xres_virtual/2;
		var->yres=tt_yres;
		var->bits_per_pixel=8;
		break;
	case TT_SHIFTER_TTMID:
		var->xres=sttt_xres;
		var->xres_virtual=sttt_xres_virtual;
		var->yres=tt_yres;
		var->bits_per_pixel=4;
		break;
	case TT_SHIFTER_TTHIGH:
		var->red.length=0;
		var->xres=sttt_xres*2;
		var->xres_virtual=sttt_xres_virtual*2;
		var->yres=tt_yres*2;
		var->bits_per_pixel=1;
		break;
	}		
	var->blue=var->green=var->red;
	var->transp.offset=0;
	var->transp.length=0;
	var->transp.msb_right=0;
	linelen=var->xres_virtual * var->bits_per_pixel / 8;
	if (! use_hwscroll)
		var->yres_virtual=var->yres;
	else if (screen_len) {
		if (par->yres_virtual)
			var->yres_virtual = par->yres_virtual;
		else
			/* yres_virtual==0 means use maximum */
			var->yres_virtual = screen_len / linelen;
	} else {
		if (hwscroll < 0)
			var->yres_virtual = 2 * var->yres;
		else
			var->yres_virtual=var->yres+hwscroll * 16;
	}
	var->xoffset=0;
	if (screen_base)
		var->yoffset=(par->screen_base - screen_base)/linelen;
	else
		var->yoffset=0;
	var->nonstd=0;
	var->activate=0;
	var->vmode=FB_VMODE_NONINTERLACED;
	return 0;
}


static void tt_get_par( struct atafb_par *par )
{
	unsigned long addr;
	par->hw.tt.mode=shifter_tt.tt_shiftmode;
	par->hw.tt.sync=shifter.syncmode;
	addr = ((shifter.bas_hi & 0xff) << 16) |
	       ((shifter.bas_md & 0xff) << 8)  |
	       ((shifter.bas_lo & 0xff));
	par->screen_base = phys_to_virt(addr);
}

static void tt_set_par( struct atafb_par *par )
{
	shifter_tt.tt_shiftmode=par->hw.tt.mode;
	shifter.syncmode=par->hw.tt.sync;
	/* only set screen_base if really necessary */
	if (current_par.screen_base != par->screen_base)
		fbhw->set_screen_base(par->screen_base);
}


static int tt_getcolreg(unsigned regno, unsigned *red,
			unsigned *green, unsigned *blue,
			unsigned *transp, struct fb_info *info)
{
	int t, col;

	if ((shifter_tt.tt_shiftmode & TT_SHIFTER_MODEMASK) == TT_SHIFTER_STHIGH)
		regno += 254;
	if (regno > 255)
		return 1;
	t = tt_palette[regno];
	col = t & 15;
	col |= col << 4;
	col |= col << 8;
	*blue = col;
	col = (t >> 4) & 15;
	col |= col << 4;
	col |= col << 8;
	*green = col;
	col = (t >> 8) & 15;
	col |= col << 4;
	col |= col << 8;
	*red = col;
	*transp = 0;
	return 0;
}


static int tt_setcolreg(unsigned regno, unsigned red,
			unsigned green, unsigned blue,
			unsigned transp, struct fb_info *info)
{
	if ((shifter_tt.tt_shiftmode & TT_SHIFTER_MODEMASK) == TT_SHIFTER_STHIGH)
		regno += 254;
	if (regno > 255)
		return 1;
	tt_palette[regno] = (((red >> 12) << 8) | ((green >> 12) << 4) |
			     (blue >> 12));
	if ((shifter_tt.tt_shiftmode & TT_SHIFTER_MODEMASK) ==
		TT_SHIFTER_STHIGH && regno == 254)
		tt_palette[0] = 0;
	return 0;
}

						  
static int tt_detect( void )

{	struct atafb_par par;

	/* Determine the connected monitor: The DMA sound must be
	 * disabled before reading the MFP GPIP, because the Sound
	 * Done Signal and the Monochrome Detect are XORed together!
	 *
	 * Even on a TT, we should look if there is a DMA sound. It was
	 * announced that the Eagle is TT compatible, but only the PCM is
	 * missing...
	 */
	if (ATARIHW_PRESENT(PCM_8BIT)) { 
		tt_dmasnd.ctrl = DMASND_CTRL_OFF;
		udelay(20);	/* wait a while for things to settle down */
	}
	mono_moni = (mfp.par_dt_reg & 0x80) == 0;

	tt_get_par(&par);
	tt_encode_var(&atafb_predefined[0], &par);

	return 1;
}

#endif /* ATAFB_TT */

/* ------------------- Falcon specific functions ---------------------- */

#ifdef ATAFB_FALCON

static int mon_type;		/* Falcon connected monitor */
static int f030_bus_width;	/* Falcon ram bus width (for vid_control) */
#define F_MON_SM	0
#define F_MON_SC	1
#define F_MON_VGA	2
#define F_MON_TV	3

static struct pixel_clock {
	unsigned long f;	/* f/[Hz] */
	unsigned long t;	/* t/[ps] (=1/f) */
	int right, hsync, left;	/* standard timing in clock cycles, not pixel */
		/* hsync initialized in falcon_detect() */
	int sync_mask;		/* or-mask for hw.falcon.sync to set this clock */
	int control_mask;	/* ditto, for hw.falcon.vid_control */
}
f25  = {25175000, 39721, 18, 0, 42, 0x0, VCO_CLOCK25},
f32  = {32000000, 31250, 18, 0, 42, 0x0, 0},
fext = {       0,     0, 18, 0, 42, 0x1, 0};

/* VIDEL-prescale values [mon_type][pixel_length from VCO] */
static int vdl_prescale[4][3] = {{4,2,1}, {4,2,1}, {4,2,2}, {4,2,1}};

/* Default hsync timing [mon_type] in picoseconds */
static long h_syncs[4] = {3000000, 4875000, 4000000, 4875000};

#ifdef FBCON_HAS_CFB16
static u16 fbcon_cfb16_cmap[16];
#endif

static inline int hxx_prescale(struct falcon_hw *hw)
{
	return hw->ste_mode ? 16 :
		   vdl_prescale[mon_type][hw->vid_mode >> 2 & 0x3];
}

static int falcon_encode_fix( struct fb_fix_screeninfo *fix,
							  struct atafb_par *par )
{
	strcpy(fix->id, "Atari Builtin");
	fix->smem_start = (unsigned long)real_screen_base;
	fix->smem_len = screen_len;
	fix->type = FB_TYPE_INTERLEAVED_PLANES;
	fix->type_aux = 2;
	fix->visual = FB_VISUAL_PSEUDOCOLOR;
	fix->xpanstep = 1;
	fix->ypanstep = 1;
	fix->ywrapstep = 0;
	if (par->hw.falcon.mono) {
		fix->type = FB_TYPE_PACKED_PIXELS;
		fix->type_aux = 0;
		/* no smooth scrolling with longword aligned video mem */
		fix->xpanstep = 32;
	}
	else if (par->hw.falcon.f_shift & 0x100) {
		fix->type = FB_TYPE_PACKED_PIXELS;
		fix->type_aux = 0;
		/* Is this ok or should it be DIRECTCOLOR? */
		fix->visual = FB_VISUAL_TRUECOLOR;
		fix->xpanstep = 2;
	}
	fix->line_length = 0;
	fix->accel = FB_ACCEL_ATARIBLITT;
	return 0;
}


static int falcon_decode_var( struct fb_var_screeninfo *var,
							  struct atafb_par *par )
{
	int bpp = var->bits_per_pixel;
	int xres = var->xres;
	int yres = var->yres;
	int xres_virtual = var->xres_virtual;
	int yres_virtual = var->yres_virtual;
	int left_margin, right_margin, hsync_len;
	int upper_margin, lower_margin, vsync_len;
	int linelen;
	int interlace = 0, doubleline = 0;
	struct pixel_clock *pclock;
	int plen; /* width of pixel in clock cycles */
	int xstretch;
	int prescale;
	int longoffset = 0;
	int hfreq, vfreq;

/*
	Get the video params out of 'var'. If a value doesn't fit, round
	it up, if it's too big, return EINVAL.
	Round up in the following order: bits_per_pixel, xres, yres, 
	xres_virtual, yres_virtual, xoffset, yoffset, grayscale, bitfields, 
	horizontal timing, vertical timing.

	There is a maximum of screen resolution determined by pixelclock
	and minimum frame rate -- (X+hmarg.)*(Y+vmarg.)*vfmin <= pixelclock.
	In interlace mode this is     "     *    "     *vfmin <= pixelclock.
	Additional constraints: hfreq.
	Frequency range for multisync monitors is given via command line.
	For TV and SM124 both frequencies are fixed.

	X % 16 == 0 to fit 8x?? font (except 1 bitplane modes must use X%32==0)
	Y % 16 == 0 to fit 8x16 font
	Y % 8 == 0 if Y<400

	Currently interlace and doubleline mode in var are ignored. 
	On SM124 and TV only the standard resolutions can be used.
*/

	/* Reject uninitialized mode */
	if (!xres || !yres || !bpp)
		return -EINVAL;

	if (mon_type == F_MON_SM && bpp != 1) {
		return -EINVAL;
	}
	else if (bpp <= 1) {
		bpp = 1;
		par->hw.falcon.f_shift = 0x400;
		par->hw.falcon.st_shift = 0x200;
	}
	else if (bpp <= 2) {
		bpp = 2;
		par->hw.falcon.f_shift = 0x000;
		par->hw.falcon.st_shift = 0x100;
	}
	else if (bpp <= 4) {
		bpp = 4;
		par->hw.falcon.f_shift = 0x000;
		par->hw.falcon.st_shift = 0x000;
	}
	else if (bpp <= 8) {
		bpp = 8;
		par->hw.falcon.f_shift = 0x010;
	}
	else if (bpp <= 16) {
		bpp = 16; /* packed pixel mode */
		par->hw.falcon.f_shift = 0x100; /* hicolor, no overlay */
	}
	else
		return -EINVAL;
	par->hw.falcon.bpp = bpp;

	if (mon_type == F_MON_SM || DontCalcRes) {
		/* Skip all calculations. VGA/TV/SC1224 only supported. */
		struct fb_var_screeninfo *myvar = &atafb_predefined[0];
		
		if (bpp > myvar->bits_per_pixel ||
			var->xres > myvar->xres ||
			var->yres > myvar->yres)
			return -EINVAL;
		fbhw->get_par(par);	/* Current par will be new par */
		goto set_screen_base;	/* Don't forget this */
	}

	/* Only some fixed resolutions < 640x400 */
	if (xres <= 320)
		xres = 320;
	else if (xres <= 640 && bpp != 16)
		xres = 640;
	if (yres <= 200)
		yres = 200;
	else if (yres <= 240)
		yres = 240;
	else if (yres <= 400)
		yres = 400;

	/* 2 planes must use STE compatibility mode */
	par->hw.falcon.ste_mode = bpp==2;
	par->hw.falcon.mono = bpp==1;

	/* Total and visible scanline length must be a multiple of one longword,
	 * this and the console fontwidth yields the alignment for xres and
	 * xres_virtual.
	 * TODO: this way "odd" fontheights are not supported
	 *
	 * Special case in STE mode: blank and graphic positions don't align,
	 * avoid trash at right margin
	 */
	if (par->hw.falcon.ste_mode)
		xres = (xres + 63) & ~63;
	else if (bpp == 1)
		xres = (xres + 31) & ~31;
	else
		xres = (xres + 15) & ~15;
	if (yres >= 400)
		yres = (yres + 15) & ~15;
	else
		yres = (yres + 7) & ~7;

	if (xres_virtual < xres)
		xres_virtual = xres;
	else if (bpp == 1)
		xres_virtual = (xres_virtual + 31) & ~31;
	else
		xres_virtual = (xres_virtual + 15) & ~15;

	if (yres_virtual <= 0)
		yres_virtual = 0;
	else if (yres_virtual < yres)
		yres_virtual = yres;

	/* backward bug-compatibility */
	if (var->pixclock > 1)
		var->pixclock -= 1;

	par->hw.falcon.line_width = bpp * xres / 16;
	par->hw.falcon.line_offset = bpp * (xres_virtual - xres) / 16;

	/* single or double pixel width */
	xstretch = (xres < 640) ? 2 : 1;

#if 0 /* SM124 supports only 640x400, this is rejected above */
	if (mon_type == F_MON_SM) {
		if (xres != 640 && yres != 400)
			return -EINVAL;
		plen = 1;
		pclock = &f32;
		/* SM124-mode is special */
		par->hw.falcon.ste_mode = 1;
		par->hw.falcon.f_shift = 0x000;
		par->hw.falcon.st_shift = 0x200;
		left_margin = hsync_len = 128 / plen;
		right_margin = 0;
		/* TODO set all margins */
	}
	else
#endif
	if (mon_type == F_MON_SC || mon_type == F_MON_TV) {
		plen = 2 * xstretch;
		if (var->pixclock > f32.t * plen)
			return -EINVAL;
		pclock = &f32;
		if (yres > 240)
			interlace = 1;
		if (var->pixclock == 0) {
			/* set some minimal margins which center the screen */
			left_margin = 32;
			right_margin = 18;
			hsync_len = pclock->hsync / plen;
			upper_margin = 31;
			lower_margin = 14;
			vsync_len = interlace ? 3 : 4;
		} else {
			left_margin = var->left_margin;
			right_margin = var->right_margin;
			hsync_len = var->hsync_len;
			upper_margin = var->upper_margin;
			lower_margin = var->lower_margin;
			vsync_len = var->vsync_len;
			if (var->vmode & FB_VMODE_INTERLACED) {
				upper_margin = (upper_margin + 1) / 2;
				lower_margin = (lower_margin + 1) / 2;
				vsync_len = (vsync_len + 1) / 2;
			} else if (var->vmode & FB_VMODE_DOUBLE) {
				upper_margin *= 2;
				lower_margin *= 2;
				vsync_len *= 2;
			}
		}
	}
	else
	{	/* F_MON_VGA */
		if (bpp == 16)
			xstretch = 2; /* Double pixel width only for hicolor */
		/* Default values are used for vert./hor. timing if no pixelclock given. */
		if (var->pixclock == 0) {
			int linesize;

			/* Choose master pixelclock depending on hor. timing */
			plen = 1 * xstretch;
			if ((plen * xres + f25.right+f25.hsync+f25.left) *
			    fb_info.monspecs.hfmin < f25.f)
				pclock = &f25;
			else if ((plen * xres + f32.right+f32.hsync+f32.left) * 
			    fb_info.monspecs.hfmin < f32.f)
				pclock = &f32;
			else if ((plen * xres + fext.right+fext.hsync+fext.left) * 
			    fb_info.monspecs.hfmin < fext.f
			         && fext.f)
				pclock = &fext;
			else
				return -EINVAL;

			left_margin = pclock->left / plen;
			right_margin = pclock->right / plen;
			hsync_len = pclock->hsync / plen;
			linesize = left_margin + xres + right_margin + hsync_len;
			upper_margin = 31;
			lower_margin = 11;
			vsync_len = 3;
		}
		else {
			/* Choose largest pixelclock <= wanted clock */
			int i;
			unsigned long pcl = ULONG_MAX;
			pclock = 0;
			for (i=1; i <= 4; i *= 2) {
				if (f25.t*i >= var->pixclock && f25.t*i < pcl) {
					pcl = f25.t * i;
					pclock = &f25;
				}
				if (f32.t*i >= var->pixclock && f32.t*i < pcl) {
					pcl = f32.t * i;
					pclock = &f32;
				}
				if (fext.t && fext.t*i >= var->pixclock && fext.t*i < pcl) {
					pcl = fext.t * i;
					pclock = &fext;
				}
			}
			if (!pclock)
				return -EINVAL;
			plen = pcl / pclock->t;

			left_margin = var->left_margin;
			right_margin = var->right_margin;
			hsync_len = var->hsync_len;
			upper_margin = var->upper_margin;
			lower_margin = var->lower_margin;
			vsync_len = var->vsync_len;
			/* Internal unit is [single lines per (half-)frame] */
			if (var->vmode & FB_VMODE_INTERLACED) {
				/* # lines in half frame */
				/* External unit is [lines per full frame] */
				upper_margin = (upper_margin + 1) / 2;
				lower_margin = (lower_margin + 1) / 2;
				vsync_len = (vsync_len + 1) / 2;
			}
			else if (var->vmode & FB_VMODE_DOUBLE) {
				/* External unit is [double lines per frame] */
				upper_margin *= 2;
				lower_margin *= 2;
				vsync_len *= 2;
			}
		}
		if (pclock == &fext)
			longoffset = 1; /* VIDEL doesn't synchronize on short offset */
	}
	/* Is video bus bandwidth (32MB/s) too low for this resolution? */
	/* this is definitely wrong if bus clock != 32MHz */
	if (pclock->f / plen / 8 * bpp > 32000000L)
		return -EINVAL;

	if (vsync_len < 1)
		vsync_len = 1;

	/* include sync lengths in right/lower margin for all calculations */
	right_margin += hsync_len;
	lower_margin += vsync_len;

	/* ! In all calculations of margins we use # of lines in half frame
	 * (which is a full frame in non-interlace mode), so we can switch
	 * between interlace and non-interlace without messing around
	 * with these.
	 */
  again:
	/* Set base_offset 128 and video bus width */
	par->hw.falcon.vid_control = mon_type | f030_bus_width;
	if (!longoffset)
		par->hw.falcon.vid_control |= VCO_SHORTOFFS;	/* base_offset 64 */
	if (var->sync & FB_SYNC_HOR_HIGH_ACT)
		par->hw.falcon.vid_control |= VCO_HSYPOS;
	if (var->sync & FB_SYNC_VERT_HIGH_ACT)
		par->hw.falcon.vid_control |= VCO_VSYPOS;
	/* Pixelclock */
	par->hw.falcon.vid_control |= pclock->control_mask;
	/* External or internal clock */
	par->hw.falcon.sync = pclock->sync_mask | 0x2;
	/* Pixellength and prescale */
	par->hw.falcon.vid_mode = (2/plen) << 2;
	if (doubleline)
		par->hw.falcon.vid_mode |= VMO_DOUBLE;
	if (interlace)
		par->hw.falcon.vid_mode |= VMO_INTER;

	/*********************
	Horizontal timing: unit = [master clock cycles]
	unit of hxx-registers: [master clock cycles * prescale]
	Hxx-registers are 9 bit wide

	1 line = ((hht + 2) * 2 * prescale) clock cycles

	graphic output = hdb & 0x200 ?
	       ((hht+2)*2 - hdb + hde) * prescale - hdboff + hdeoff:
	       ( hht + 2  - hdb + hde) * prescale - hdboff + hdeoff
	(this must be a multiple of plen*128/bpp, on VGA pixels
	 to the right may be cut off with a bigger right margin)

	start of graphics relative to start of 1st halfline = hdb & 0x200 ?
	       (hdb - hht - 2) * prescale + hdboff :
	       hdb * prescale + hdboff

	end of graphics relative to start of 1st halfline =
	       (hde + hht + 2) * prescale + hdeoff
	*********************/
	/* Calculate VIDEL registers */
	{
	int hdb_off, hde_off, base_off;
	int gstart, gend1, gend2, align;

	prescale = hxx_prescale(&par->hw.falcon);
	base_off = par->hw.falcon.vid_control & VCO_SHORTOFFS ? 64 : 128;

	/* Offsets depend on video mode */
	/* Offsets are in clock cycles, divide by prescale to
	 * calculate hd[be]-registers
	 */
	if (par->hw.falcon.f_shift & 0x100) {
		align = 1;
		hde_off = 0;
		hdb_off = (base_off + 16 * plen) + prescale;
	}
	else {
		align = 128 / bpp;
		hde_off = ((128 / bpp + 2) * plen);
		if (par->hw.falcon.ste_mode)
			hdb_off = (64 + base_off + (128 / bpp + 2) * plen) + prescale;
		else
			hdb_off = (base_off + (128 / bpp + 18) * plen) + prescale;
	}

	gstart = (prescale/2 + plen * left_margin) / prescale;
	/* gend1 is for hde (gend-gstart multiple of align), shifter's xres */
	gend1 = gstart + ((xres + align-1) / align)*align * plen / prescale;
	/* gend2 is for hbb, visible xres (rest to gend1 is cut off by hblank) */
	gend2 = gstart + xres * plen / prescale;
	par->HHT = plen * (left_margin + xres + right_margin) /
			   (2 * prescale) - 2;
/*	par->HHT = (gend2 + plen * right_margin / prescale) / 2 - 2;*/

	par->HDB = gstart - hdb_off/prescale;
	par->HBE = gstart;
	if (par->HDB < 0) par->HDB += par->HHT + 2 + 0x200;
	par->HDE = gend1 - par->HHT - 2 - hde_off/prescale;
	par->HBB = gend2 - par->HHT - 2;
#if 0
	/* One more Videl constraint: data fetch of two lines must not overlap */
	if ((par->HDB & 0x200)  &&  (par->HDB & ~0x200) - par->HDE <= 5) {
		/* if this happens increase margins, decrease hfreq. */
	}
#endif
	if (hde_off % prescale)
		par->HBB++;		/* compensate for non matching hde and hbb */
	par->HSS = par->HHT + 2 - plen * hsync_len / prescale;
	if (par->HSS < par->HBB)
		par->HSS = par->HBB;
	}

	/*  check hor. frequency */
	hfreq = pclock->f / ((par->HHT+2)*prescale*2);
	if (hfreq > fb_info.monspecs.hfmax && mon_type!=F_MON_VGA) {
		/* ++guenther:   ^^^^^^^^^^^^^^^^^^^ can't remember why I did this */
		/* Too high -> enlarge margin */
		left_margin += 1;
		right_margin += 1;
		goto again;
	}
	if (hfreq > fb_info.monspecs.hfmax || hfreq < fb_info.monspecs.hfmin)
		return -EINVAL;

	/* Vxx-registers */
	/* All Vxx must be odd in non-interlace, since frame starts in the middle
	 * of the first displayed line!
	 * One frame consists of VFT+1 half lines. VFT+1 must be even in
	 * non-interlace, odd in interlace mode for synchronisation.
	 * Vxx-registers are 11 bit wide
	 */
	par->VBE = (upper_margin * 2 + 1); /* must begin on odd halfline */
	par->VDB = par->VBE;
	par->VDE = yres;
	if (!interlace) par->VDE <<= 1;
	if (doubleline) par->VDE <<= 1;  /* VDE now half lines per (half-)frame */
	par->VDE += par->VDB;
	par->VBB = par->VDE;
	par->VFT = par->VBB + (lower_margin * 2 - 1) - 1;
	par->VSS = par->VFT+1 - (vsync_len * 2 - 1);
	/* vbb,vss,vft must be even in interlace mode */
	if (interlace) {
		par->VBB++;
		par->VSS++;
		par->VFT++;
	}

	/* V-frequency check, hope I didn't create any loop here. */
	/* Interlace and doubleline are mutually exclusive. */
	vfreq = (hfreq * 2) / (par->VFT + 1);
	if      (vfreq > fb_info.monspecs.vfmax && !doubleline && !interlace) {
		/* Too high -> try again with doubleline */
		doubleline = 1;
		goto again;
	}
	else if (vfreq < fb_info.monspecs.vfmin && !interlace && !doubleline) {
		/* Too low -> try again with interlace */
		interlace = 1;
		goto again;
	}
	else if (vfreq < fb_info.monspecs.vfmin && doubleline) {
		/* Doubleline too low -> clear doubleline and enlarge margins */
		int lines;
		doubleline = 0;
		for (lines=0;
		     (hfreq*2)/(par->VFT+1+4*lines-2*yres)>fb_info.monspecs.vfmax;
		     lines++)
			;
		upper_margin += lines;
		lower_margin += lines;
		goto again;
	}
	else if (vfreq > fb_info.monspecs.vfmax && doubleline) {
		/* Doubleline too high -> enlarge margins */
		int lines;
		for (lines=0;
		     (hfreq*2)/(par->VFT+1+4*lines)>fb_info.monspecs.vfmax;
		     lines+=2)
			;
		upper_margin += lines;
		lower_margin += lines;
		goto again;
	}
	else if (vfreq > fb_info.monspecs.vfmax && interlace) {
		/* Interlace, too high -> enlarge margins */
		int lines;
		for (lines=0;
		     (hfreq*2)/(par->VFT+1+4*lines)>fb_info.monspecs.vfmax;
		     lines++)
			;
		upper_margin += lines;
		lower_margin += lines;
		goto again;
	}
	else if (vfreq < fb_info.monspecs.vfmin ||
		 vfreq > fb_info.monspecs.vfmax)
		return -EINVAL;

  set_screen_base:
	linelen = xres_virtual * bpp / 8;
	if (yres_virtual * linelen > screen_len && screen_len)
		return -EINVAL;
	if (yres * linelen > screen_len && screen_len)
		return -EINVAL;
	if (var->yoffset + yres > yres_virtual && yres_virtual)
		return -EINVAL;
	par->yres_virtual = yres_virtual;
	par->screen_base = screen_base + var->yoffset * linelen;
	par->hw.falcon.xoffset = 0;

	return 0;
}

static int falcon_encode_var( struct fb_var_screeninfo *var,
							  struct atafb_par *par )
{
/* !!! only for VGA !!! */
	int linelen;
	int prescale, plen;
	int hdb_off, hde_off, base_off;
	struct falcon_hw *hw = &par->hw.falcon;

	memset(var, 0, sizeof(struct fb_var_screeninfo));
	/* possible frequencies: 25.175 or 32MHz */
	var->pixclock = hw->sync & 0x1 ? fext.t :
	                hw->vid_control & VCO_CLOCK25 ? f25.t : f32.t;

	var->height=-1;
	var->width=-1;

	var->sync=0;
	if (hw->vid_control & VCO_HSYPOS)
		var->sync |= FB_SYNC_HOR_HIGH_ACT;
	if (hw->vid_control & VCO_VSYPOS)
		var->sync |= FB_SYNC_VERT_HIGH_ACT;

	var->vmode = FB_VMODE_NONINTERLACED;
	if (hw->vid_mode & VMO_INTER)
		var->vmode |= FB_VMODE_INTERLACED;
	if (hw->vid_mode & VMO_DOUBLE)
		var->vmode |= FB_VMODE_DOUBLE;
	
	/* visible y resolution:
	 * Graphics display starts at line VDB and ends at line
	 * VDE. If interlace mode off unit of VC-registers is
	 * half lines, else lines.
	 */
	var->yres = hw->vde - hw->vdb;
	if (!(var->vmode & FB_VMODE_INTERLACED))
		var->yres >>= 1;
	if (var->vmode & FB_VMODE_DOUBLE)
		var->yres >>= 1;

	/* to get bpp, we must examine f_shift and st_shift.
	 * f_shift is valid if any of bits no. 10, 8 or 4
	 * is set. Priority in f_shift is: 10 ">" 8 ">" 4, i.e.
	 * if bit 10 set then bit 8 and bit 4 don't care...
	 * If all these bits are 0 get display depth from st_shift
	 * (as for ST and STE)
	 */
	if (hw->f_shift & 0x400)		/* 2 colors */
		var->bits_per_pixel = 1;
	else if (hw->f_shift & 0x100)	/* hicolor */
		var->bits_per_pixel = 16;
	else if (hw->f_shift & 0x010)	/* 8 bitplanes */
		var->bits_per_pixel = 8;
	else if (hw->st_shift == 0)
		var->bits_per_pixel = 4;
	else if (hw->st_shift == 0x100)
		var->bits_per_pixel = 2;
	else /* if (hw->st_shift == 0x200) */
		var->bits_per_pixel = 1;

	var->xres = hw->line_width * 16 / var->bits_per_pixel;
	var->xres_virtual = var->xres + hw->line_offset * 16 / var->bits_per_pixel;
	if (hw->xoffset)
		var->xres_virtual += 16;

	if (var->bits_per_pixel == 16) {
		var->red.offset=11;
		var->red.length=5;
		var->red.msb_right=0;
		var->green.offset=5;
		var->green.length=6;
		var->green.msb_right=0;
		var->blue.offset=0;
		var->blue.length=5;
		var->blue.msb_right=0;
	}
	else {
		var->red.offset=0;
		var->red.length = hw->ste_mode ? 4 : 6;
		var->red.msb_right=0;
		var->grayscale=0;
		var->blue=var->green=var->red;
	}
	var->transp.offset=0;
	var->transp.length=0;
	var->transp.msb_right=0;

	linelen = var->xres_virtual * var->bits_per_pixel / 8;
	if (screen_len) {
		if (par->yres_virtual)
			var->yres_virtual = par->yres_virtual;
		else
			/* yres_virtual==0 means use maximum */
			var->yres_virtual = screen_len / linelen;
	}
	else {
		if (hwscroll < 0)
			var->yres_virtual = 2 * var->yres;
		else
			var->yres_virtual=var->yres+hwscroll * 16;
	}
	var->xoffset=0; /* TODO change this */

	/* hdX-offsets */
	prescale = hxx_prescale(hw);
	plen = 4 >> (hw->vid_mode >> 2 & 0x3);
	base_off = hw->vid_control & VCO_SHORTOFFS ? 64 : 128;
	if (hw->f_shift & 0x100) {
		hde_off = 0;
		hdb_off = (base_off + 16 * plen) + prescale;
	}
	else {
		hde_off = ((128 / var->bits_per_pixel + 2) * plen);
		if (hw->ste_mode)
			hdb_off = (64 + base_off + (128 / var->bits_per_pixel + 2) * plen)
					 + prescale;
		else
			hdb_off = (base_off + (128 / var->bits_per_pixel + 18) * plen)
					 + prescale;
	}

	/* Right margin includes hsync */
	var->left_margin = hdb_off + prescale * ((hw->hdb & 0x1ff) -
					   (hw->hdb & 0x200 ? 2+hw->hht : 0));
	if (hw->ste_mode || mon_type!=F_MON_VGA)
		var->right_margin = prescale * (hw->hht + 2 - hw->hde) - hde_off;
	else
		/* can't use this in ste_mode, because hbb is +1 off */
		var->right_margin = prescale * (hw->hht + 2 - hw->hbb);
	var->hsync_len = prescale * (hw->hht + 2 - hw->hss);

	/* Lower margin includes vsync */
	var->upper_margin = hw->vdb / 2 ;  /* round down to full lines */
	var->lower_margin = (hw->vft+1 - hw->vde + 1) / 2; /* round up */
	var->vsync_len    = (hw->vft+1 - hw->vss + 1) / 2; /* round up */
	if (var->vmode & FB_VMODE_INTERLACED) {
		var->upper_margin *= 2;
		var->lower_margin *= 2;
		var->vsync_len *= 2;
	}
	else if (var->vmode & FB_VMODE_DOUBLE) {
		var->upper_margin = (var->upper_margin + 1) / 2;
		var->lower_margin = (var->lower_margin + 1) / 2;
		var->vsync_len = (var->vsync_len + 1) / 2;
	}

	var->pixclock *= plen;
	var->left_margin /= plen;
	var->right_margin /= plen;
	var->hsync_len /= plen;

	var->right_margin -= var->hsync_len;
	var->lower_margin -= var->vsync_len;

	if (screen_base)
		var->yoffset=(par->screen_base - screen_base)/linelen;
	else
		var->yoffset=0;
	var->nonstd=0;	/* what is this for? */
	var->activate=0;
	return 0;
}


static int f_change_mode = 0;
static struct falcon_hw f_new_mode;
static int f_pan_display = 0;

static void falcon_get_par( struct atafb_par *par )
{
	unsigned long addr;
	struct falcon_hw *hw = &par->hw.falcon;

	hw->line_width = shifter_f030.scn_width;
	hw->line_offset = shifter_f030.off_next;
	hw->st_shift = videl.st_shift & 0x300;
	hw->f_shift = videl.f_shift;
	hw->vid_control = videl.control;
	hw->vid_mode = videl.mode;
	hw->sync = shifter.syncmode & 0x1;
	hw->xoffset = videl.xoffset & 0xf;
	hw->hht = videl.hht;
	hw->hbb = videl.hbb;
	hw->hbe = videl.hbe;
	hw->hdb = videl.hdb;
	hw->hde = videl.hde;
	hw->hss = videl.hss;
	hw->vft = videl.vft;
	hw->vbb = videl.vbb;
	hw->vbe = videl.vbe;
	hw->vdb = videl.vdb;
	hw->vde = videl.vde;
	hw->vss = videl.vss;

	addr = (shifter.bas_hi & 0xff) << 16 |
	       (shifter.bas_md & 0xff) << 8  |
	       (shifter.bas_lo & 0xff);
	par->screen_base = phys_to_virt(addr);

	/* derived parameters */
	hw->ste_mode = (hw->f_shift & 0x510)==0 && hw->st_shift==0x100;
	hw->mono = (hw->f_shift & 0x400) ||
	           ((hw->f_shift & 0x510)==0 && hw->st_shift==0x200);
}

static void falcon_set_par( struct atafb_par *par )
{
	f_change_mode = 0;

	/* only set screen_base if really necessary */
	if (current_par.screen_base != par->screen_base)
		fbhw->set_screen_base(par->screen_base);

	/* Don't touch any other registers if we keep the default resolution */
	if (DontCalcRes)
		return;

	/* Tell vbl-handler to change video mode.
	 * We change modes only on next VBL, to avoid desynchronisation
	 * (a shift to the right and wrap around by a random number of pixels
	 * in all monochrome modes).
	 * This seems to work on my Falcon.
	 */
	f_new_mode = par->hw.falcon;
	f_change_mode = 1;
}


static irqreturn_t falcon_vbl_switcher( int irq, void *dummy, struct pt_regs *fp )
{
	struct falcon_hw *hw = &f_new_mode;

	if (f_change_mode) {
		f_change_mode = 0;

		if (hw->sync & 0x1) {
			/* Enable external pixelclock. This code only for ScreenWonder */
			*(volatile unsigned short*)0xffff9202 = 0xffbf;
		}
		else {
			/* Turn off external clocks. Read sets all output bits to 1. */
			*(volatile unsigned short*)0xffff9202;
		}
		shifter.syncmode = hw->sync;

		videl.hht = hw->hht;
		videl.hbb = hw->hbb;
		videl.hbe = hw->hbe;
		videl.hdb = hw->hdb;
		videl.hde = hw->hde;
		videl.hss = hw->hss;
		videl.vft = hw->vft;
		videl.vbb = hw->vbb;
		videl.vbe = hw->vbe;
		videl.vdb = hw->vdb;
		videl.vde = hw->vde;
		videl.vss = hw->vss;

		videl.f_shift = 0; /* write enables Falcon palette, 0: 4 planes */
		if (hw->ste_mode) {
			videl.st_shift = hw->st_shift; /* write enables STE palette */
		}
		else {
			/* IMPORTANT:
			 * set st_shift 0, so we can tell the screen-depth if f_shift==0.
			 * Writing 0 to f_shift enables 4 plane Falcon mode but
			 * doesn't set st_shift. st_shift!=0 (!=4planes) is impossible
			 * with Falcon palette.
			 */
			videl.st_shift = 0;
			/* now back to Falcon palette mode */
			videl.f_shift = hw->f_shift;
		}
		/* writing to st_shift changed scn_width and vid_mode */
		videl.xoffset = hw->xoffset;
		shifter_f030.scn_width = hw->line_width;
		shifter_f030.off_next = hw->line_offset;
		videl.control = hw->vid_control;
		videl.mode = hw->vid_mode;
	}
	if (f_pan_display) {
		f_pan_display = 0;
		videl.xoffset = current_par.hw.falcon.xoffset;
		shifter_f030.off_next = current_par.hw.falcon.line_offset;
	}
	return IRQ_HANDLED;
}


static int falcon_pan_display( struct fb_var_screeninfo *var,
							   struct atafb_par *par )
{
	int xoffset;
	int bpp = fb_display[fb_info.currcon].var.bits_per_pixel;

	if (bpp == 1)
		var->xoffset = up(var->xoffset, 32);
	if (bpp != 16)
		par->hw.falcon.xoffset = var->xoffset & 15;
	else {
		par->hw.falcon.xoffset = 0;
		var->xoffset = up(var->xoffset, 2);
	}
	par->hw.falcon.line_offset = bpp *
	       	(fb_display[fb_info.currcon].var.xres_virtual - fb_display[fb_info.currcon].var.xres) / 16;
	if (par->hw.falcon.xoffset)
		par->hw.falcon.line_offset -= bpp;
	xoffset = var->xoffset - par->hw.falcon.xoffset;

	par->screen_base = screen_base +
	        (var->yoffset * fb_display[fb_info.currcon].var.xres_virtual + xoffset) * bpp / 8;
	if (fbhw->set_screen_base)
		fbhw->set_screen_base (par->screen_base);
	else
		return -EINVAL; /* shouldn't happen */
	f_pan_display = 1;
	return 0;
}


static int falcon_getcolreg( unsigned regno, unsigned *red,
				 unsigned *green, unsigned *blue,
				 unsigned *transp, struct fb_info *info )
{	unsigned long col;
	
	if (regno > 255)
		return 1;
	/* This works in STE-mode (with 4bit/color) since f030_col-registers
	 * hold up to 6bit/color.
	 * Even with hicolor r/g/b=5/6/5 bit!
	 */
	col = f030_col[regno];
	*red = (col >> 16) & 0xff00;
	*green = (col >> 8) & 0xff00;
	*blue = (col << 8) & 0xff00;
	*transp = 0;
	return 0;
}


static int falcon_setcolreg( unsigned regno, unsigned red,
							 unsigned green, unsigned blue,
							 unsigned transp, struct fb_info *info )
{
	if (regno > 255)
		return 1;
	f030_col[regno] = (((red & 0xfc00) << 16) |
			   ((green & 0xfc00) << 8) |
			   ((blue & 0xfc00) >> 8));
	if (regno < 16) {
		shifter_tt.color_reg[regno] =
			(((red & 0xe000) >> 13) | ((red & 0x1000) >> 12) << 8) |
			(((green & 0xe000) >> 13) | ((green & 0x1000) >> 12) << 4) |
			((blue & 0xe000) >> 13) | ((blue & 0x1000) >> 12);
#ifdef FBCON_HAS_CFB16
		fbcon_cfb16_cmap[regno] = ((red & 0xf800) |
					   ((green & 0xfc00) >> 5) |
					   ((blue & 0xf800) >> 11));
#endif
	}
	return 0;
}


static int falcon_blank( int blank_mode )
{
/* ++guenther: we can switch off graphics by changing VDB and VDE,
 * so VIDEL doesn't hog the bus while saving.
 * (this may affect usleep()).
 */
	int vdb, vss, hbe, hss;

	if (mon_type == F_MON_SM)	/* this doesn't work on SM124 */
		return 1;

	vdb = current_par.VDB;
	vss = current_par.VSS;
	hbe = current_par.HBE;
	hss = current_par.HSS;

	if (blank_mode >= 1) {
		/* disable graphics output (this speeds up the CPU) ... */
		vdb = current_par.VFT + 1;
		/* ... and blank all lines */
		hbe = current_par.HHT + 2;
	}
	/* use VESA suspend modes on VGA monitors */
	if (mon_type == F_MON_VGA) {
		if (blank_mode == 2 || blank_mode == 4)
			vss = current_par.VFT + 1;
		if (blank_mode == 3 || blank_mode == 4)
			hss = current_par.HHT + 2;
	}

	videl.vdb = vdb;
	videl.vss = vss;
	videl.hbe = hbe;
	videl.hss = hss;

	return 0;
}

 
static int falcon_detect( void )
{
	struct atafb_par par;
	unsigned char fhw;

	/* Determine connected monitor and set monitor parameters */
	fhw = *(unsigned char*)0xffff8006;
	mon_type = fhw >> 6 & 0x3;
	/* bit 1 of fhw: 1=32 bit ram bus, 0=16 bit */
	f030_bus_width = fhw << 6 & 0x80;
	switch (mon_type) {
	case F_MON_SM:
		fb_info.monspecs.vfmin = 70;
		fb_info.monspecs.vfmax = 72;
		fb_info.monspecs.hfmin = 35713;
		fb_info.monspecs.hfmax = 35715;
		break;
	case F_MON_SC:
	case F_MON_TV:
		/* PAL...NTSC */
		fb_info.monspecs.vfmin = 49; /* not 50, since TOS defaults to 49.9x Hz */
		fb_info.monspecs.vfmax = 60;
		fb_info.monspecs.hfmin = 15620;
		fb_info.monspecs.hfmax = 15755;
		break;
	}
	/* initialize hsync-len */
	f25.hsync = h_syncs[mon_type] / f25.t;
	f32.hsync = h_syncs[mon_type] / f32.t;
	if (fext.t)
		fext.hsync = h_syncs[mon_type] / fext.t;

	falcon_get_par(&par);
	falcon_encode_var(&atafb_predefined[0], &par);

	/* Detected mode is always the "autodetect" slot */
	return 1;
}

#endif /* ATAFB_FALCON */

/* ------------------- ST(E) specific functions ---------------------- */

#ifdef ATAFB_STE

static int stste_encode_fix( struct fb_fix_screeninfo *fix,
							 struct atafb_par *par )

{
	int mode;

	strcpy(fix->id,"Atari Builtin");
	fix->smem_start = (unsigned long)real_screen_base;
	fix->smem_len = screen_len;
	fix->type = FB_TYPE_INTERLEAVED_PLANES;
	fix->type_aux = 2;
	fix->visual = FB_VISUAL_PSEUDOCOLOR;
	mode = par->hw.st.mode & 3;
	if (mode == ST_HIGH) {
		fix->type = FB_TYPE_PACKED_PIXELS;
		fix->type_aux = 0;
		fix->visual = FB_VISUAL_MONO10;
	}
	if (ATARIHW_PRESENT(EXTD_SHIFTER)) {
		fix->xpanstep = 16;
		fix->ypanstep = 1;
	} else {
		fix->xpanstep = 0;
		fix->ypanstep = 0;
	}
	fix->ywrapstep = 0;
	fix->line_length = 0;
	fix->accel = FB_ACCEL_ATARIBLITT;
	return 0;
}


static int stste_decode_var( struct fb_var_screeninfo *var,
						  struct atafb_par *par )
{
	int xres=var->xres;
	int yres=var->yres;
	int bpp=var->bits_per_pixel;
	int linelen;
	int yres_virtual = var->yres_virtual;

	if (mono_moni) {
		if (bpp > 1 || xres > sttt_xres || yres > st_yres)
			return -EINVAL;
		par->hw.st.mode=ST_HIGH;
		xres=sttt_xres;
		yres=st_yres;
		bpp=1;
	} else {
		if (bpp > 4 || xres > sttt_xres || yres > st_yres)
			return -EINVAL;
		if (bpp > 2) {
			if (xres > sttt_xres/2 || yres > st_yres/2)
				return -EINVAL;
			par->hw.st.mode=ST_LOW;
			xres=sttt_xres/2;
			yres=st_yres/2;
			bpp=4;
		}
		else if (bpp > 1) {
			if (xres > sttt_xres || yres > st_yres/2)
				return -EINVAL;
			par->hw.st.mode=ST_MID;
			xres=sttt_xres;
			yres=st_yres/2;
			bpp=2;
		}
		else
			return -EINVAL;
	}
	if (yres_virtual <= 0)
		yres_virtual = 0;
	else if (yres_virtual < yres)
		yres_virtual = yres;
	if (var->sync & FB_SYNC_EXT)
		par->hw.st.sync=(par->hw.st.sync & ~1) | 1;
	else
		par->hw.st.sync=(par->hw.st.sync & ~1);
	linelen=xres*bpp/8;
	if (yres_virtual * linelen > screen_len && screen_len)
		return -EINVAL;
	if (yres * linelen > screen_len && screen_len)
		return -EINVAL;
	if (var->yoffset + yres > yres_virtual && yres_virtual)
		return -EINVAL;
	par->yres_virtual = yres_virtual;
	par->screen_base=screen_base+ var->yoffset*linelen;
	return 0;
}

static int stste_encode_var( struct fb_var_screeninfo *var,
						  struct atafb_par *par )
{
	int linelen;
	memset(var, 0, sizeof(struct fb_var_screeninfo));
	var->red.offset=0;
	var->red.length = ATARIHW_PRESENT(EXTD_SHIFTER) ? 4 : 3;
	var->red.msb_right=0;
	var->grayscale=0;

	var->pixclock=31041;
	var->left_margin=120;		/* these are incorrect */
	var->right_margin=100;
	var->upper_margin=8;
	var->lower_margin=16;
	var->hsync_len=140;
	var->vsync_len=30;

	var->height=-1;
	var->width=-1;

	if (!(par->hw.st.sync & 1))
		var->sync=0;
	else
		var->sync=FB_SYNC_EXT;

	switch (par->hw.st.mode & 3) {
	case ST_LOW:
		var->xres=sttt_xres/2;
		var->yres=st_yres/2;
		var->bits_per_pixel=4;
		break;
	case ST_MID:
		var->xres=sttt_xres;
		var->yres=st_yres/2;
		var->bits_per_pixel=2;
		break;
	case ST_HIGH:
		var->xres=sttt_xres;
		var->yres=st_yres;
		var->bits_per_pixel=1;
		break;
	}		
	var->blue=var->green=var->red;
	var->transp.offset=0;
	var->transp.length=0;
	var->transp.msb_right=0;
	var->xres_virtual=sttt_xres_virtual;
	linelen=var->xres_virtual * var->bits_per_pixel / 8;
	ovsc_addlen=linelen*(sttt_yres_virtual - st_yres);
	
	if (! use_hwscroll)
		var->yres_virtual=var->yres;
	else if (screen_len) {
		if (par->yres_virtual)
			var->yres_virtual = par->yres_virtual;
		else
			/* yres_virtual==0 means use maximum */
			var->yres_virtual = screen_len / linelen;
	}
	else {
		if (hwscroll < 0)
			var->yres_virtual = 2 * var->yres;
		else
			var->yres_virtual=var->yres+hwscroll * 16;
	}
	var->xoffset=0;
	if (screen_base)
		var->yoffset=(par->screen_base - screen_base)/linelen;
	else
		var->yoffset=0;
	var->nonstd=0;
	var->activate=0;
	var->vmode=FB_VMODE_NONINTERLACED;
	return 0;
}


static void stste_get_par( struct atafb_par *par )
{
	unsigned long addr;
	par->hw.st.mode=shifter_tt.st_shiftmode;
	par->hw.st.sync=shifter.syncmode;
	addr = ((shifter.bas_hi & 0xff) << 16) |
	       ((shifter.bas_md & 0xff) << 8);
	if (ATARIHW_PRESENT(EXTD_SHIFTER))
		addr |= (shifter.bas_lo & 0xff);
	par->screen_base = phys_to_virt(addr);
}

static void stste_set_par( struct atafb_par *par )
{
	shifter_tt.st_shiftmode=par->hw.st.mode;
	shifter.syncmode=par->hw.st.sync;
	/* only set screen_base if really necessary */
	if (current_par.screen_base != par->screen_base)
		fbhw->set_screen_base(par->screen_base);
}


static int stste_getcolreg(unsigned regno, unsigned *red,
			   unsigned *green, unsigned *blue,
			   unsigned *transp, struct fb_info *info)
{
	unsigned col, t;
	
	if (regno > 15)
		return 1;
	col = shifter_tt.color_reg[regno];
	if (ATARIHW_PRESENT(EXTD_SHIFTER)) {
		t = ((col >> 7) & 0xe) | ((col >> 11) & 1);
		t |= t << 4;
		*red = t | (t << 8);
		t = ((col >> 3) & 0xe) | ((col >> 7) & 1);
		t |= t << 4;
		*green = t | (t << 8);
		t = ((col << 1) & 0xe) | ((col >> 3) & 1);
		t |= t << 4;
		*blue = t | (t << 8);
	}
	else {
		t = (col >> 7) & 0xe;
		t |= t << 4;
		*red = t | (t << 8);
		t = (col >> 3) & 0xe;
		t |= t << 4;
		*green = t | (t << 8);
		t = (col << 1) & 0xe;
		t |= t << 4;
		*blue = t | (t << 8);
	}
	*transp = 0;
	return 0;
}


static int stste_setcolreg(unsigned regno, unsigned red,
			   unsigned green, unsigned blue,
			   unsigned transp, struct fb_info *info)
{
	if (regno > 15)
		return 1;
	red >>= 12;
	blue >>= 12;
	green >>= 12;
	if (ATARIHW_PRESENT(EXTD_SHIFTER))
		shifter_tt.color_reg[regno] =
			(((red & 0xe) >> 1) | ((red & 1) << 3) << 8) |
			(((green & 0xe) >> 1) | ((green & 1) << 3) << 4) |
			((blue & 0xe) >> 1) | ((blue & 1) << 3);
	else
		shifter_tt.color_reg[regno] =
			((red & 0xe) << 7) |
			((green & 0xe) << 3) |
			((blue & 0xe) >> 1);
	return 0;
}

						  
static int stste_detect( void )

{	struct atafb_par par;

	/* Determine the connected monitor: The DMA sound must be
	 * disabled before reading the MFP GPIP, because the Sound
	 * Done Signal and the Monochrome Detect are XORed together!
	 */
	if (ATARIHW_PRESENT(PCM_8BIT)) {
		tt_dmasnd.ctrl = DMASND_CTRL_OFF;
		udelay(20);	/* wait a while for things to settle down */
	}
	mono_moni = (mfp.par_dt_reg & 0x80) == 0;

	stste_get_par(&par);
	stste_encode_var(&atafb_predefined[0], &par);

	if (!ATARIHW_PRESENT(EXTD_SHIFTER))
		use_hwscroll = 0;
	return 1;
}

static void stste_set_screen_base(void *s_base)
{
	unsigned long addr;
	addr= virt_to_phys(s_base);
	/* Setup Screen Memory */
	shifter.bas_hi=(unsigned char) ((addr & 0xff0000) >> 16);
  	shifter.bas_md=(unsigned char) ((addr & 0x00ff00) >> 8);
	if (ATARIHW_PRESENT(EXTD_SHIFTER))
		shifter.bas_lo=(unsigned char)  (addr & 0x0000ff);
}

#endif /* ATAFB_STE */

/* Switching the screen size should be done during vsync, otherwise
 * the margins may get messed up. This is a well known problem of
 * the ST's video system.
 *
 * Unfortunately there is hardly any way to find the vsync, as the
 * vertical blank interrupt is no longer in time on machines with
 * overscan type modifications.
 *
 * We can, however, use Timer B to safely detect the black shoulder,
 * but then we've got to guess an appropriate delay to find the vsync.
 * This might not work on every machine.
 *
 * martin_rogge @ ki.maus.de, 8th Aug 1995
 */

#define LINE_DELAY  (mono_moni ? 30 : 70)
#define SYNC_DELAY  (mono_moni ? 1500 : 2000)

/* SWITCH_ACIA may be used for Falcon (ScreenBlaster III internal!) */
static void st_ovsc_switch(void)
{
    unsigned long flags;
    register unsigned char old, new;

    if (!(atari_switches & ATARI_SWITCH_OVSC_MASK))
	return;
    local_irq_save(flags);

    mfp.tim_ct_b = 0x10;
    mfp.active_edge |= 8;
    mfp.tim_ct_b = 0;
    mfp.tim_dt_b = 0xf0;
    mfp.tim_ct_b = 8;
    while (mfp.tim_dt_b > 1)	/* TOS does it this way, don't ask why */
	;
    new = mfp.tim_dt_b;
    do {
	udelay(LINE_DELAY);
	old = new;
	new = mfp.tim_dt_b;
    } while (old != new);
    mfp.tim_ct_b = 0x10;
    udelay(SYNC_DELAY);

    if (atari_switches & ATARI_SWITCH_OVSC_IKBD)
	acia.key_ctrl = ACIA_DIV64 | ACIA_D8N1S | ACIA_RHTID | ACIA_RIE;
    if (atari_switches & ATARI_SWITCH_OVSC_MIDI)
	acia.mid_ctrl = ACIA_DIV16 | ACIA_D8N1S | ACIA_RHTID;
    if (atari_switches & (ATARI_SWITCH_OVSC_SND6|ATARI_SWITCH_OVSC_SND7)) {
	sound_ym.rd_data_reg_sel = 14;
	sound_ym.wd_data = sound_ym.rd_data_reg_sel |
			   ((atari_switches&ATARI_SWITCH_OVSC_SND6) ? 0x40:0) |
			   ((atari_switches&ATARI_SWITCH_OVSC_SND7) ? 0x80:0);
    }
    local_irq_restore(flags);
}

/* ------------------- External Video ---------------------- */

#ifdef ATAFB_EXT

static int ext_encode_fix( struct fb_fix_screeninfo *fix,
						   struct atafb_par *par )

{
	strcpy(fix->id,"Unknown Extern");
	fix->smem_start = (unsigned long)external_addr;
	fix->smem_len = PAGE_ALIGN(external_len);
	if (external_depth == 1) {
		fix->type = FB_TYPE_PACKED_PIXELS;
		/* The letters 'n' and 'i' in the "atavideo=external:" stand
		 * for "normal" and "inverted", rsp., in the monochrome case */
		fix->visual =
			(external_pmode == FB_TYPE_INTERLEAVED_PLANES ||
			 external_pmode == FB_TYPE_PACKED_PIXELS) ?
				FB_VISUAL_MONO10 :
					FB_VISUAL_MONO01;
	}
	else {
		/* Use STATIC if we don't know how to access color registers */
		int visual = external_vgaiobase ?
					 FB_VISUAL_PSEUDOCOLOR :
					 FB_VISUAL_STATIC_PSEUDOCOLOR;
		switch (external_pmode) {
		    case -1:              /* truecolor */
			fix->type=FB_TYPE_PACKED_PIXELS;
			fix->visual=FB_VISUAL_TRUECOLOR;
			break;
		    case FB_TYPE_PACKED_PIXELS:
			fix->type=FB_TYPE_PACKED_PIXELS;
			fix->visual=visual;
			break;
		    case FB_TYPE_PLANES:
			fix->type=FB_TYPE_PLANES;
			fix->visual=visual;
			break;
		    case FB_TYPE_INTERLEAVED_PLANES:
			fix->type=FB_TYPE_INTERLEAVED_PLANES;
			fix->type_aux=2;
			fix->visual=visual;
			break;
		}
	}
	fix->xpanstep = 0;
	fix->ypanstep = 0;
	fix->ywrapstep = 0;
	fix->line_length = 0;
	return 0;
}


static int ext_decode_var( struct fb_var_screeninfo *var,
						   struct atafb_par *par )
{
	struct fb_var_screeninfo *myvar = &atafb_predefined[0];
	
	if (var->bits_per_pixel > myvar->bits_per_pixel ||
		var->xres > myvar->xres ||
		var->xres_virtual > myvar->xres_virtual ||
		var->yres > myvar->yres ||
		var->xoffset > 0 ||
		var->yoffset > 0)
		return -EINVAL;
	return 0;
}


static int ext_encode_var( struct fb_var_screeninfo *var,
						   struct atafb_par *par )
{
	memset(var, 0, sizeof(struct fb_var_screeninfo));
	var->red.offset=0;
	var->red.length=(external_pmode == -1) ? external_depth/3 : 
			(external_vgaiobase ? external_bitspercol : 0);
	var->red.msb_right=0;
	var->grayscale=0;

	var->pixclock=31041;
	var->left_margin=120;		/* these are surely incorrect 	*/
	var->right_margin=100;
	var->upper_margin=8;
	var->lower_margin=16;
	var->hsync_len=140;
	var->vsync_len=30;

	var->height=-1;
	var->width=-1;

	var->sync=0;

	var->xres = external_xres;
	var->yres = external_yres;
	var->xres_virtual = external_xres_virtual;
	var->bits_per_pixel = external_depth;
	
	var->blue=var->green=var->red;
	var->transp.offset=0;
	var->transp.length=0;
	var->transp.msb_right=0;
	var->yres_virtual=var->yres;
	var->xoffset=0;
	var->yoffset=0;
	var->nonstd=0;
	var->activate=0;
	var->vmode=FB_VMODE_NONINTERLACED;
	return 0;
}


static void ext_get_par( struct atafb_par *par )
{
	par->screen_base = external_addr;
}

static void ext_set_par( struct atafb_par *par )
{
}

#define OUTB(port,val) \
	*((unsigned volatile char *) ((port)+external_vgaiobase))=(val)
#define INB(port) \
	(*((unsigned volatile char *) ((port)+external_vgaiobase)))
#define DACDelay 				\
	do {					\
		unsigned char tmp=INB(0x3da);	\
		tmp=INB(0x3da);			\
	} while (0)

static int ext_getcolreg( unsigned regno, unsigned *red,
						  unsigned *green, unsigned *blue,
						  unsigned *transp, struct fb_info *info )
{
	if (! external_vgaiobase)
		return 1;

	    *red   = ext_color[regno].red;
	    *green = ext_color[regno].green;
	    *blue  = ext_color[regno].blue;
	    *transp=0;
	    return 0;
}
	
static int ext_setcolreg( unsigned regno, unsigned red,
						  unsigned green, unsigned blue,
						  unsigned transp, struct fb_info *info )

{	unsigned char colmask = (1 << external_bitspercol) - 1;

	if (! external_vgaiobase)
		return 1;

	ext_color[regno].red = red;
	ext_color[regno].green = green;
	ext_color[regno].blue = blue;

	switch (external_card_type) {
	  case IS_VGA:
	    OUTB(0x3c8, regno);
	    DACDelay;
	    OUTB(0x3c9, red & colmask);
	    DACDelay;
	    OUTB(0x3c9, green & colmask);
	    DACDelay;
	    OUTB(0x3c9, blue & colmask);
	    DACDelay;
	    return 0;

	  case IS_MV300:
	    OUTB((MV300_reg[regno] << 2)+1, red);
	    OUTB((MV300_reg[regno] << 2)+1, green);
	    OUTB((MV300_reg[regno] << 2)+1, blue);
	    return 0;

	  default:
	    return 1;
	  }
}
	

static int ext_detect( void )

{
	struct fb_var_screeninfo *myvar = &atafb_predefined[0];
	struct atafb_par dummy_par;

	myvar->xres = external_xres;
	myvar->xres_virtual = external_xres_virtual;
	myvar->yres = external_yres;
	myvar->bits_per_pixel = external_depth;
	ext_encode_var(myvar, &dummy_par);
	return 1;
}

#endif /* ATAFB_EXT */

/* ------ This is the same for most hardware types -------- */

static void set_screen_base(void *s_base)
{
	unsigned long addr;
	addr= virt_to_phys(s_base);
	/* Setup Screen Memory */
	shifter.bas_hi=(unsigned char) ((addr & 0xff0000) >> 16);
  	shifter.bas_md=(unsigned char) ((addr & 0x00ff00) >> 8);
  	shifter.bas_lo=(unsigned char)  (addr & 0x0000ff);
}


static int pan_display( struct fb_var_screeninfo *var,
                        struct atafb_par *par )
{
	if (!fbhw->set_screen_base ||
		(!ATARIHW_PRESENT(EXTD_SHIFTER) && var->xoffset))
		return -EINVAL;
	var->xoffset = up(var->xoffset, 16);
	par->screen_base = screen_base +
	        (var->yoffset * fb_display[fb_info.currcon].var.xres_virtual + var->xoffset)
	        * fb_display[fb_info.currcon].var.bits_per_pixel / 8;
	fbhw->set_screen_base (par->screen_base);
	return 0;
}


/* ------------ Interfaces to hardware functions ------------ */


#ifdef ATAFB_TT
static struct fb_hwswitch tt_switch = {
	tt_detect, tt_encode_fix, tt_decode_var, tt_encode_var,
	tt_get_par, tt_set_par, tt_getcolreg, 
	set_screen_base, NULL, pan_display
};
#endif

#ifdef ATAFB_FALCON
static struct fb_hwswitch falcon_switch = {
	falcon_detect, falcon_encode_fix, falcon_decode_var, falcon_encode_var,
	falcon_get_par, falcon_set_par, falcon_getcolreg,
	set_screen_base, falcon_blank, falcon_pan_display
};
#endif

#ifdef ATAFB_STE
static struct fb_hwswitch st_switch = {
	stste_detect, stste_encode_fix, stste_decode_var, stste_encode_var,
	stste_get_par, stste_set_par, stste_getcolreg,
	stste_set_screen_base, NULL, pan_display
};
#endif

#ifdef ATAFB_EXT
static struct fb_hwswitch ext_switch = {
	ext_detect, ext_encode_fix, ext_decode_var, ext_encode_var,
	ext_get_par, ext_set_par, ext_getcolreg, NULL, NULL, NULL
};
#endif


static void atafb_get_par( struct atafb_par *par )
{
	if (current_par_valid) {
		*par=current_par;
	}
	else
		fbhw->get_par(par);
}


static void atafb_set_par( struct atafb_par *par )
{
	fbhw->set_par(par);
	current_par=*par;
	current_par_valid=1;
}


/* =========================================================== */
/* ============== Hardware Independent Functions ============= */
/* =========================================================== */


/* used for hardware scrolling */

static int
fb_update_var(int con, struct fb_info *info)
{
	int off=fb_display[con].var.yoffset*fb_display[con].var.xres_virtual*
			fb_display[con].var.bits_per_pixel>>3;

	current_par.screen_base=screen_base + off;

	if (fbhw->set_screen_base)
		fbhw->set_screen_base(current_par.screen_base);
	return 0;
}

static int
do_fb_set_var(struct fb_var_screeninfo *var, int isactive)
{
	int err,activate;
	struct atafb_par par;
	if ((err=fbhw->decode_var(var, &par)))
		return err;
	activate=var->activate;
	if (((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) && isactive)
		atafb_set_par(&par);
	fbhw->encode_var(var, &par);
	var->activate=activate;
	return 0;
}

static int
atafb_get_fix(struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
{
	struct atafb_par par;
	if (con == -1)
		atafb_get_par(&par);
	else {
	  int err;
		if ((err=fbhw->decode_var(&fb_display[con].var,&par)))
		  return err;
	}
	memset(fix, 0, sizeof(struct fb_fix_screeninfo));
	return fbhw->encode_fix(fix, &par);
}
	
static int
atafb_get_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
{
	struct atafb_par par;
	if (con == -1) {
		atafb_get_par(&par);
		fbhw->encode_var(var, &par);
	}
	else
		*var=fb_display[con].var;
	return 0;
}

static void
atafb_set_disp(int con, struct fb_info *info)
{
	struct fb_fix_screeninfo fix;
	struct fb_var_screeninfo var;
	struct display *display;

	if (con >= 0)
		display = &fb_display[con];
	else
		display = &disp;	/* used during initialization */

	atafb_get_fix(&fix, con, info);
	atafb_get_var(&var, con, info);
	if (con == -1)
		con=0;
	info->screen_base = (void *)fix.smem_start;
	display->visual = fix.visual;
	display->type = fix.type;
	display->type_aux = fix.type_aux;
	display->ypanstep = fix.ypanstep;
	display->ywrapstep = fix.ywrapstep;
	display->line_length = fix.line_length;
	if (fix.visual != FB_VISUAL_PSEUDOCOLOR &&
		fix.visual != FB_VISUAL_DIRECTCOLOR)
		display->can_soft_blank = 0;
	else
		display->can_soft_blank = 1;
	display->inverse =
	    (fix.visual == FB_VISUAL_MONO01 ? !inverse : inverse);
	switch (fix.type) {
	    case FB_TYPE_INTERLEAVED_PLANES:
		switch (var.bits_per_pixel) {
#ifdef FBCON_HAS_IPLAN2P2
		    case 2:
			display->dispsw = &fbcon_iplan2p2;
			break;
#endif
#ifdef FBCON_HAS_IPLAN2P4
		    case 4:
			display->dispsw = &fbcon_iplan2p4;
			break;
#endif
#ifdef FBCON_HAS_IPLAN2P8
		    case 8:
			display->dispsw = &fbcon_iplan2p8;
			break;
#endif
		}
		break;
	    case FB_TYPE_PACKED_PIXELS:
		switch (var.bits_per_pixel) {
#ifdef FBCON_HAS_MFB
		    case 1:
			display->dispsw = &fbcon_mfb;
			break;
#endif
#ifdef FBCON_HAS_CFB8
		    case 8:
			display->dispsw = &fbcon_cfb8;
			break;
#endif
#ifdef FBCON_HAS_CFB16
		    case 16:
			display->dispsw = &fbcon_cfb16;
			display->dispsw_data = fbcon_cfb16_cmap;
			break;
#endif
		}
		break;
	}
}

static int
atafb_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
{
	int err,oldxres,oldyres,oldbpp,oldxres_virtual,
	    oldyres_virtual,oldyoffset;
	if ((err=do_fb_set_var(var, con==info->currcon)))
		return err;
	if ((var->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {