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/* eepro.c: Intel EtherExpress Pro/10 device driver for Linux. */
/*
	Written 1994, 1995,1996 by Bao C. Ha.

	Copyright (C) 1994, 1995,1996 by Bao C. Ha.

	This software may be used and distributed
	according to the terms of the GNU General Public License,
	incorporated herein by reference.

	The author may be reached at bao.ha@srs.gov
	or 418 Hastings Place, Martinez, GA 30907.

	Things remaining to do:
	Better record keeping of errors.
	Eliminate transmit interrupt to reduce overhead.
	Implement "concurrent processing". I won't be doing it!

	Bugs:

	If you have a problem of not detecting the 82595 during a
	reboot (warm reset), disable the FLASH memory should fix it.
	This is a compatibility hardware problem.

	Versions:
	0.13b	basic ethtool support (aris, 09/13/2004)
	0.13a   in memory shortage, drop packets also in board
		(Michael Westermann <mw@microdata-pos.de>, 07/30/2002)
	0.13    irq sharing, rewrote probe function, fixed a nasty bug in
		hardware_send_packet and a major cleanup (aris, 11/08/2001)
	0.12d	fixing a problem with single card detected as eight eth devices
		fixing a problem with sudden drop in card performance
		(chris (asdn@go2.pl), 10/29/2001)
	0.12c	fixing some problems with old cards (aris, 01/08/2001)
	0.12b	misc fixes (aris, 06/26/2000)
	0.12a   port of version 0.12a of 2.2.x kernels to 2.3.x
		(aris (aris@conectiva.com.br), 05/19/2000)
	0.11e   some tweaks about multiple cards support (PdP, jul/aug 1999)
	0.11d	added __initdata, __init stuff; call spin_lock_init
	        in eepro_probe1. Replaced "eepro" by dev->name. Augmented
		the code protected by spin_lock in interrupt routine
		(PdP, 12/12/1998)
	0.11c   minor cleanup (PdP, RMC, 09/12/1998)
	0.11b   Pascal Dupuis (dupuis@lei.ucl.ac.be): works as a module
	        under 2.1.xx. Debug messages are flagged as KERN_DEBUG to
		avoid console flooding. Added locking at critical parts. Now
		the dawn thing is SMP safe.
	0.11a   Attempt to get 2.1.xx support up (RMC)
	0.11	Brian Candler added support for multiple cards. Tested as
		a module, no idea if it works when compiled into kernel.

	0.10e	Rick Bressler notified me that ifconfig up;ifconfig down fails
		because the irq is lost somewhere. Fixed that by moving
		request_irq and free_irq to eepro_open and eepro_close respectively.
	0.10d	Ugh! Now Wakeup works. Was seriously broken in my first attempt.
		I'll need to find a way to specify an ioport other than
		the default one in the PnP case. PnP definitively sucks.
		And, yes, this is not the only reason.
	0.10c	PnP Wakeup Test for 595FX. uncomment #define PnPWakeup;
		to use.
	0.10b	Should work now with (some) Pro/10+. At least for
		me (and my two cards) it does. _No_ guarantee for
		function with non-Pro/10+ cards! (don't have any)
		(RMC, 9/11/96)

	0.10	Added support for the Etherexpress Pro/10+.  The
		IRQ map was changed significantly from the old
		pro/10.  The new interrupt map was provided by
		Rainer M. Canavan (Canavan@Zeus.cs.bonn.edu).
		(BCH, 9/3/96)

	0.09	Fixed a race condition in the transmit algorithm,
		which causes crashes under heavy load with fast
		pentium computers.  The performance should also
		improve a bit.  The size of RX buffer, and hence
		TX buffer, can also be changed via lilo or insmod.
		(BCH, 7/31/96)

	0.08	Implement 32-bit I/O for the 82595TX and 82595FX
		based lan cards.  Disable full-duplex mode if TPE
		is not used.  (BCH, 4/8/96)

	0.07a	Fix a stat report which counts every packet as a
		heart-beat failure. (BCH, 6/3/95)

	0.07	Modified to support all other 82595-based lan cards.
		The IRQ vector of the EtherExpress Pro will be set
		according to the value saved in the EEPROM.  For other
		cards, I will do autoirq_request() to grab the next
		available interrupt vector. (BCH, 3/17/95)

	0.06a,b	Interim released.  Minor changes in the comments and
		print out format. (BCH, 3/9/95 and 3/14/95)

	0.06	First stable release that I am comfortable with. (BCH,
		3/2/95)

	0.05	Complete testing of multicast. (BCH, 2/23/95)

	0.04	Adding multicast support. (BCH, 2/14/95)

	0.03	First widely alpha release for public testing.
		(BCH, 2/14/95)

*/

static const char version[] =
	"eepro.c: v0.13b 09/13/2004 aris@cathedrallabs.org\n";

#include <linux/module.h>

/*
  Sources:

	This driver wouldn't have been written without the availability
	of the Crynwr's Lan595 driver source code.  It helps me to
	familiarize with the 82595 chipset while waiting for the Intel
	documentation.  I also learned how to detect the 82595 using
	the packet driver's technique.

	This driver is written by cutting and pasting the skeleton.c driver
	provided by Donald Becker.  I also borrowed the EEPROM routine from
	Donald Becker's 82586 driver.

	Datasheet for the Intel 82595 (including the TX and FX version). It
	provides just enough info that the casual reader might think that it
	documents the i82595.

	The User Manual for the 82595.  It provides a lot of the missing
	information.

*/

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/in.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/bitops.h>
#include <linux/ethtool.h>

#include <asm/system.h>
#include <asm/io.h>
#include <asm/dma.h>

#define DRV_NAME "eepro"
#define DRV_VERSION "0.13c"

#define compat_dev_kfree_skb( skb, mode ) dev_kfree_skb( (skb) )
/* I had reports of looong delays with SLOW_DOWN defined as udelay(2) */
#define SLOW_DOWN inb(0x80)
/* udelay(2) */
#define compat_init_data     __initdata
enum iftype { AUI=0, BNC=1, TPE=2 };

/* First, a few definitions that the brave might change. */
/* A zero-terminated list of I/O addresses to be probed. */
static unsigned int eepro_portlist[] compat_init_data =
   { 0x300, 0x210, 0x240, 0x280, 0x2C0, 0x200, 0x320, 0x340, 0x360, 0};
/* note: 0x300 is default, the 595FX supports ALL IO Ports
  from 0x000 to 0x3F0, some of which are reserved in PCs */

/* To try the (not-really PnP Wakeup: */
/*
#define PnPWakeup
*/

/* use 0 for production, 1 for verification, >2 for debug */
#ifndef NET_DEBUG
#define NET_DEBUG 0
#endif
static unsigned int net_debug = NET_DEBUG;

/* The number of low I/O ports used by the ethercard. */
#define EEPRO_IO_EXTENT	16

/* Different 82595 chips */
#define	LAN595		0
#define	LAN595TX	1
#define	LAN595FX	2
#define	LAN595FX_10ISA	3

/* Information that need to be kept for each board. */
struct eepro_local {
	unsigned rx_start;
	unsigned tx_start; /* start of the transmit chain */
	int tx_last;  /* pointer to last packet in the transmit chain */
	unsigned tx_end;   /* end of the transmit chain (plus 1) */
	int eepro;	/* 1 for the EtherExpress Pro/10,
			   2 for the EtherExpress Pro/10+,
			   3 for the EtherExpress 10 (blue cards),
			   0 for other 82595-based lan cards. */
	int version;	/* a flag to indicate if this is a TX or FX
				   version of the 82595 chip. */
	int stepping;

	spinlock_t lock; /* Serializing lock  */

	unsigned rcv_ram;	/* pre-calculated space for rx */
	unsigned xmt_ram;	/* pre-calculated space for tx */
	unsigned char xmt_bar;
	unsigned char xmt_lower_limit_reg;
	unsigned char xmt_upper_limit_reg;
	short xmt_lower_limit;
	short xmt_upper_limit;
	short rcv_lower_limit;
	short rcv_upper_limit;
	unsigned char eeprom_reg;
	unsigned short word[8];
};

/* The station (ethernet) address prefix, used for IDing the board. */
#define SA_ADDR0 0x00	/* Etherexpress Pro/10 */
#define SA_ADDR1 0xaa
#define SA_ADDR2 0x00

#define GetBit(x,y) ((x & (1<<y))>>y)

/* EEPROM Word 0: */
#define ee_PnP       0  /* Plug 'n Play enable bit */
#define ee_Word1     1  /* Word 1? */
#define ee_BusWidth  2  /* 8/16 bit */
#define ee_FlashAddr 3  /* Flash Address */
#define ee_FlashMask 0x7   /* Mask */
#define ee_AutoIO    6  /* */
#define ee_reserved0 7  /* =0! */
#define ee_Flash     8  /* Flash there? */
#define ee_AutoNeg   9  /* Auto Negotiation enabled? */
#define ee_IO0       10 /* IO Address LSB */
#define ee_IO0Mask   0x /*...*/
#define ee_IO1       15 /* IO MSB */

/* EEPROM Word 1: */
#define ee_IntSel    0   /* Interrupt */
#define ee_IntMask   0x7
#define ee_LI        3   /* Link Integrity 0= enabled */
#define ee_PC        4   /* Polarity Correction 0= enabled */
#define ee_TPE_AUI   5   /* PortSelection 1=TPE */
#define ee_Jabber    6   /* Jabber prevention 0= enabled */
#define ee_AutoPort  7   /* Auto Port Selection 1= Disabled */
#define ee_SMOUT     8   /* SMout Pin Control 0= Input */
#define ee_PROM      9   /* Flash EPROM / PROM 0=Flash */
#define ee_reserved1 10  /* .. 12 =0! */
#define ee_AltReady  13  /* Alternate Ready, 0=normal */
#define ee_reserved2 14  /* =0! */
#define ee_Duplex    15

/* Word2,3,4: */
#define ee_IA5       0 /*bit start for individual Addr Byte 5 */
#define ee_IA4       8 /*bit start for individual Addr Byte 5 */
#define ee_IA3       0 /*bit start for individual Addr Byte 5 */
#define ee_IA2       8 /*bit start for individual Addr Byte 5 */
#define ee_IA1       0 /*bit start for individual Addr Byte 5 */
#define ee_IA0       8 /*bit start for individual Addr Byte 5 */

/* Word 5: */
#define ee_BNC_TPE   0 /* 0=TPE */
#define ee_BootType  1 /* 00=None, 01=IPX, 10=ODI, 11=NDIS */
#define ee_BootTypeMask 0x3
#define ee_NumConn   3  /* Number of Connections 0= One or Two */
#define ee_FlashSock 4  /* Presence of Flash Socket 0= Present */
#define ee_PortTPE   5
#define ee_PortBNC   6
#define ee_PortAUI   7
#define ee_PowerMgt  10 /* 0= disabled */
#define ee_CP        13 /* Concurrent Processing */
#define ee_CPMask    0x7

/* Word 6: */
#define ee_Stepping  0 /* Stepping info */
#define ee_StepMask  0x0F
#define ee_BoardID   4 /* Manucaturer Board ID, reserved */
#define ee_BoardMask 0x0FFF

/* Word 7: */
#define ee_INT_TO_IRQ 0 /* int to IRQ Mapping  = 0x1EB8 for Pro/10+ */
#define ee_FX_INT2IRQ 0x1EB8 /* the _only_ mapping allowed for FX chips */

/*..*/
#define ee_SIZE 0x40 /* total EEprom Size */
#define ee_Checksum 0xBABA /* initial and final value for adding checksum */


/* Card identification via EEprom:   */
#define ee_addr_vendor 0x10  /* Word offset for EISA Vendor ID */
#define ee_addr_id 0x11      /* Word offset for Card ID */
#define ee_addr_SN 0x12      /* Serial Number */
#define ee_addr_CRC_8 0x14   /* CRC over last thee Bytes */


#define ee_vendor_intel0 0x25  /* Vendor ID Intel */
#define ee_vendor_intel1 0xD4
#define ee_id_eepro10p0 0x10   /* ID for eepro/10+ */
#define ee_id_eepro10p1 0x31

#define TX_TIMEOUT ((4*HZ)/10)

/* Index to functions, as function prototypes. */

static int	eepro_probe1(struct net_device *dev, int autoprobe);
static int	eepro_open(struct net_device *dev);
static netdev_tx_t eepro_send_packet(struct sk_buff *skb,
				     struct net_device *dev);
static irqreturn_t eepro_interrupt(int irq, void *dev_id);
static void 	eepro_rx(struct net_device *dev);
static void 	eepro_transmit_interrupt(struct net_device *dev);
static int	eepro_close(struct net_device *dev);
static void     set_multicast_list(struct net_device *dev);
static void     eepro_tx_timeout (struct net_device *dev);

static int read_eeprom(int ioaddr, int location, struct net_device *dev);
static int	hardware_send_packet(struct net_device *dev, void *buf, short length);
static int	eepro_grab_irq(struct net_device *dev);

/*
			Details of the i82595.

You will need either the datasheet or the user manual to understand what
is going on here.  The 82595 is very different from the 82586, 82593.

The receive algorithm in eepro_rx() is just an implementation of the
RCV ring structure that the Intel 82595 imposes at the hardware level.
The receive buffer is set at 24K, and the transmit buffer is 8K.  I
am assuming that the total buffer memory is 32K, which is true for the
Intel EtherExpress Pro/10.  If it is less than that on a generic card,
the driver will be broken.

The transmit algorithm in the hardware_send_packet() is similar to the
one in the eepro_rx().  The transmit buffer is a ring linked list.
I just queue the next available packet to the end of the list.  In my
system, the 82595 is so fast that the list seems to always contain a
single packet.  In other systems with faster computers and more congested
network traffics, the ring linked list should improve performance by
allowing up to 8K worth of packets to be queued.

The sizes of the receive and transmit buffers can now be changed via lilo
or insmod.  Lilo uses the appended line "ether=io,irq,debug,rx-buffer,eth0"
where rx-buffer is in KB unit.  Modules uses the parameter mem which is
also in KB unit, for example "insmod io=io-address irq=0 mem=rx-buffer."
The receive buffer has to be more than 3K or less than 29K.  Otherwise,
it is reset to the default of 24K, and, hence, 8K for the trasnmit
buffer (transmit-buffer = 32K - receive-buffer).

*/
#define RAM_SIZE        0x8000

#define RCV_HEADER      8
#define RCV_DEFAULT_RAM 0x6000

#define XMT_HEADER      8
#define XMT_DEFAULT_RAM	(RAM_SIZE - RCV_DEFAULT_RAM)

#define XMT_START_PRO	RCV_DEFAULT_RAM
#define XMT_START_10	0x0000
#define RCV_START_PRO	0x0000
#define RCV_START_10	XMT_DEFAULT_RAM

#define	RCV_DONE	0x0008
#define	RX_OK		0x2000
#define	RX_ERROR	0x0d81

#define	TX_DONE_BIT	0x0080
#define	TX_OK		0x2000
#define	CHAIN_BIT	0x8000
#define	XMT_STATUS	0x02
#define	XMT_CHAIN	0x04
#define	XMT_COUNT	0x06

#define	BANK0_SELECT	0x00
#define	BANK1_SELECT	0x40
#define	BANK2_SELECT	0x80

/* Bank 0 registers */
#define	COMMAND_REG	0x00	/* Register 0 */
#define	MC_SETUP	0x03
#define	XMT_CMD		0x04
#define	DIAGNOSE_CMD	0x07
#define	RCV_ENABLE_CMD	0x08
#define	RCV_DISABLE_CMD	0x0a
#define	STOP_RCV_CMD	0x0b
#define	RESET_CMD	0x0e
#define	POWER_DOWN_CMD	0x18
#define	RESUME_XMT_CMD	0x1c
#define	SEL_RESET_CMD	0x1e
#define	STATUS_REG	0x01	/* Register 1 */
#define	RX_INT		0x02
#define	TX_INT		0x04
#define	EXEC_STATUS	0x30
#define	ID_REG		0x02	/* Register 2	*/
#define	R_ROBIN_BITS	0xc0	/* round robin counter */
#define	ID_REG_MASK	0x2c
#define	ID_REG_SIG	0x24
#define	AUTO_ENABLE	0x10
#define	INT_MASK_REG	0x03	/* Register 3	*/
#define	RX_STOP_MASK	0x01
#define	RX_MASK		0x02
#define	TX_MASK		0x04
#define	EXEC_MASK	0x08
#define	ALL_MASK	0x0f
#define	IO_32_BIT	0x10
#define	RCV_BAR		0x04	/* The following are word (16-bit) registers */
#define	RCV_STOP	0x06

#define	XMT_BAR_PRO	0x0a
#define	XMT_BAR_10	0x0b

#define	HOST_ADDRESS_REG	0x0c
#define	IO_PORT		0x0e
#define	IO_PORT_32_BIT	0x0c

/* Bank 1 registers */
#define	REG1	0x01
#define	WORD_WIDTH	0x02
#define	INT_ENABLE	0x80
#define INT_NO_REG	0x02
#define	RCV_LOWER_LIMIT_REG	0x08
#define	RCV_UPPER_LIMIT_REG	0x09

#define	XMT_LOWER_LIMIT_REG_PRO 0x0a
#define	XMT_UPPER_LIMIT_REG_PRO 0x0b
#define	XMT_LOWER_LIMIT_REG_10  0x0b
#define	XMT_UPPER_LIMIT_REG_10  0x0a

/* Bank 2 registers */
#define	XMT_Chain_Int	0x20	/* Interrupt at the end of the transmit chain */
#define	XMT_Chain_ErrStop	0x40 /* Interrupt at the end of the chain even if there are errors */
#define	RCV_Discard_BadFrame	0x80 /* Throw bad frames away, and continue to receive others */
#define	REG2		0x02
#define	PRMSC_Mode	0x01
#define	Multi_IA	0x20
#define	REG3		0x03
#define	TPE_BIT		0x04
#define	BNC_BIT		0x20
#define	REG13		0x0d
#define	FDX		0x00
#define	A_N_ENABLE	0x02

#define	I_ADD_REG0	0x04
#define	I_ADD_REG1	0x05
#define	I_ADD_REG2	0x06
#define	I_ADD_REG3	0x07
#define	I_ADD_REG4	0x08
#define	I_ADD_REG5	0x09

#define	EEPROM_REG_PRO 0x0a
#define	EEPROM_REG_10  0x0b

#define EESK 0x01
#define EECS 0x02
#define EEDI 0x04
#define EEDO 0x08

/* do a full reset */
#define eepro_reset(ioaddr) outb(RESET_CMD, ioaddr)

/* do a nice reset */
#define eepro_sel_reset(ioaddr) 	{ \
					outb(SEL_RESET_CMD, ioaddr); \
					SLOW_DOWN; \
					SLOW_DOWN; \
					}

/* disable all interrupts */
#define eepro_dis_int(ioaddr) outb(ALL_MASK, ioaddr + INT_MASK_REG)

/* clear all interrupts */
#define eepro_clear_int(ioaddr) outb(ALL_MASK, ioaddr + STATUS_REG)

/* enable tx/rx */
#define eepro_en_int(ioaddr) outb(ALL_MASK & ~(RX_MASK | TX_MASK), \
							ioaddr + INT_MASK_REG)

/* enable exec event interrupt */
#define eepro_en_intexec(ioaddr) outb(ALL_MASK & ~(EXEC_MASK), ioaddr + INT_MASK_REG)

/* enable rx */
#define eepro_en_rx(ioaddr) outb(RCV_ENABLE_CMD, ioaddr)

/* disable rx */
#define eepro_dis_rx(ioaddr) outb(RCV_DISABLE_CMD, ioaddr)

/* switch bank */
#define eepro_sw2bank0(ioaddr) outb(BANK0_SELECT, ioaddr)
#define eepro_sw2bank1(ioaddr) outb(BANK1_SELECT, ioaddr)
#define eepro_sw2bank2(ioaddr) outb(BANK2_SELECT, ioaddr)

/* enable interrupt line */
#define eepro_en_intline(ioaddr) outb(inb(ioaddr + REG1) | INT_ENABLE,\
				ioaddr + REG1)

/* disable interrupt line */
#define eepro_dis_intline(ioaddr) outb(inb(ioaddr + REG1) & 0x7f, \
				ioaddr + REG1);

/* set diagnose flag */
#define eepro_diag(ioaddr) outb(DIAGNOSE_CMD, ioaddr)

/* ack for rx int */
#define eepro_ack_rx(ioaddr) outb (RX_INT, ioaddr + STATUS_REG)

/* ack for tx int */
#define eepro_ack_tx(ioaddr) outb (TX_INT, ioaddr + STATUS_REG)

/* a complete sel reset */
#define eepro_complete_selreset(ioaddr) { \
						dev->stats.tx_errors++;\
						eepro_sel_reset(ioaddr);\
						lp->tx_end = \
							lp->xmt_lower_limit;\
						lp->tx_start = lp->tx_end;\
						lp->tx_last = 0;\
						dev->trans_start = jiffies;\
						netif_wake_queue(dev);\
						eepro_en_rx(ioaddr);\
					}

/* Check for a network adaptor of this type, and return '0' if one exists.
   If dev->base_addr == 0, probe all likely locations.
   If dev->base_addr == 1, always return failure.
   If dev->base_addr == 2, allocate space for the device and return success
   (detachable devices only).
   */
static int __init do_eepro_probe(struct net_device *dev)
{
	int i;
	int base_addr = dev->base_addr;
	int irq = dev->irq;

#ifdef PnPWakeup
	/* XXXX for multiple cards should this only be run once? */

	/* Wakeup: */
	#define WakeupPort 0x279
	#define WakeupSeq    {0x6A, 0xB5, 0xDA, 0xED, 0xF6, 0xFB, 0x7D, 0xBE,\
	                      0xDF, 0x6F, 0x37, 0x1B, 0x0D, 0x86, 0xC3, 0x61,\
	                      0xB0, 0x58, 0x2C, 0x16, 0x8B, 0x45, 0xA2, 0xD1,\
	                      0xE8, 0x74, 0x3A, 0x9D, 0xCE, 0xE7, 0x73, 0x43}

	{
		unsigned short int WS[32]=WakeupSeq;

		if (request_region(WakeupPort, 2, "eepro wakeup")) {
			if (net_debug>5)
				printk(KERN_DEBUG "Waking UP\n");

			outb_p(0,WakeupPort);
			outb_p(0,WakeupPort);
			for (i=0; i<32; i++) {
				outb_p(WS[i],WakeupPort);
				if (net_debug>5) printk(KERN_DEBUG ": %#x ",WS[i]);
			}

			release_region(WakeupPort, 2);
		} else
			printk(KERN_WARNING "PnP wakeup region busy!\n");
	}
#endif

	if (base_addr > 0x1ff)		/* Check a single specified location. */
		return eepro_probe1(dev, 0);

	else if (base_addr != 0)	/* Don't probe at all. */
		return -ENXIO;

	for (i = 0; eepro_portlist[i]; i++) {
		dev->base_addr = eepro_portlist[i];
		dev->irq = irq;
		if (eepro_probe1(dev, 1) == 0)
			return 0;
	}

	return -ENODEV;
}

#ifndef MODULE
struct net_device * __init eepro_probe(int unit)
{
	struct net_device *dev = alloc_etherdev(sizeof(struct eepro_local));
	int err;

	if (!dev)
		return ERR_PTR(-ENODEV);

	sprintf(dev->name, "eth%d", unit);
	netdev_boot_setup_check(dev);

	err = do_eepro_probe(dev);
	if (err)
		goto out;
	return dev;
out:
	free_netdev(dev);
	return ERR_PTR(err);
}
#endif

static void __init printEEPROMInfo(struct net_device *dev)
{
	struct eepro_local *lp = netdev_priv(dev);
	int ioaddr = dev->base_addr;
	unsigned short Word;
	int i,j;

	j = ee_Checksum;
	for (i = 0; i < 8; i++)
		j += lp->word[i];
	for ( ; i < ee_SIZE; i++)
		j += read_eeprom(ioaddr, i, dev);

	printk(KERN_DEBUG "Checksum: %#x\n",j&0xffff);

	Word = lp->word[0];
	printk(KERN_DEBUG "Word0:\n");
	printk(KERN_DEBUG " Plug 'n Pray: %d\n",GetBit(Word,ee_PnP));
	printk(KERN_DEBUG " Buswidth: %d\n",(GetBit(Word,ee_BusWidth)+1)*8 );
	printk(KERN_DEBUG " AutoNegotiation: %d\n",GetBit(Word,ee_AutoNeg));
	printk(KERN_DEBUG " IO Address: %#x\n", (Word>>ee_IO0)<<4);

	if (net_debug>4)  {
		Word = lp->word[1];
		printk(KERN_DEBUG "Word1:\n");
		printk(KERN_DEBUG " INT: %d\n", Word & ee_IntMask);
		printk(KERN_DEBUG " LI: %d\n", GetBit(Word,ee_LI));
		printk(KERN_DEBUG " PC: %d\n", GetBit(Word,ee_PC));
		printk(KERN_DEBUG " TPE/AUI: %d\n", GetBit(Word,ee_TPE_AUI));
		printk(KERN_DEBUG " Jabber: %d\n", GetBit(Word,ee_Jabber));
		printk(KERN_DEBUG " AutoPort: %d\n", !GetBit(Word,ee_AutoPort));
		printk(KERN_DEBUG " Duplex: %d\n", GetBit(Word,ee_Duplex));
	}

	Word = lp->word[5];
	printk(KERN_DEBUG "Word5:\n");
	printk(KERN_DEBUG " BNC: %d\n",GetBit(Word,ee_BNC_TPE));
	printk(KERN_DEBUG " NumConnectors: %d\n",GetBit(Word,ee_NumConn));
	printk(KERN_DEBUG " Has ");
	if (GetBit(Word,ee_PortTPE)) printk(KERN_DEBUG "TPE ");
	if (GetBit(Word,ee_PortBNC)) printk(KERN_DEBUG "BNC ");
	if (GetBit(Word,ee_PortAUI)) printk(KERN_DEBUG "AUI ");
	printk(KERN_DEBUG "port(s)\n");

	Word = lp->word[6];
	printk(KERN_DEBUG "Word6:\n");
	printk(KERN_DEBUG " Stepping: %d\n",Word & ee_StepMask);
	printk(KERN_DEBUG " BoardID: %d\n",Word>>ee_BoardID);

	Word = lp->word[7];
	printk(KERN_DEBUG "Word7:\n");
	printk(KERN_DEBUG " INT to IRQ:\n");

	for (i=0, j=0; i<15; i++)
		if (GetBit(Word,i)) printk(KERN_DEBUG " INT%d -> IRQ %d;",j++,i);

	printk(KERN_DEBUG "\n");
}

/* function to recalculate the limits of buffer based on rcv_ram */
static void eepro_recalc (struct net_device *dev)
{
	struct eepro_local *	lp;

	lp = netdev_priv(dev);
	lp->xmt_ram = RAM_SIZE - lp->rcv_ram;

	if (lp->eepro == LAN595FX_10ISA) {
		lp->xmt_lower_limit = XMT_START_10;
		lp->xmt_upper_limit = (lp->xmt_ram - 2);
		lp->rcv_lower_limit = lp->xmt_ram;
		lp->rcv_upper_limit = (RAM_SIZE - 2);
	}
	else {
		lp->rcv_lower_limit = RCV_START_PRO;
		lp->rcv_upper_limit = (lp->rcv_ram - 2);
		lp->xmt_lower_limit = lp->rcv_ram;
		lp->xmt_upper_limit = (RAM_SIZE - 2);
	}
}

/* prints boot-time info */
static void __init eepro_print_info (struct net_device *dev)
{
	struct eepro_local *	lp = netdev_priv(dev);
	int			i;
	const char *		ifmap[] = {"AUI", "10Base2", "10BaseT"};

	i = inb(dev->base_addr + ID_REG);
	printk(KERN_DEBUG " id: %#x ",i);
	printk(" io: %#x ", (unsigned)dev->base_addr);

	switch (lp->eepro) {
		case LAN595FX_10ISA:
			printk("%s: Intel EtherExpress 10 ISA\n at %#x,",
					dev->name, (unsigned)dev->base_addr);
			break;
		case LAN595FX:
			printk("%s: Intel EtherExpress Pro/10+ ISA\n at %#x,",
					dev->name, (unsigned)dev->base_addr);
			break;
		case LAN595TX:
			printk("%s: Intel EtherExpress Pro/10 ISA at %#x,",
					dev->name, (unsigned)dev->base_addr);
			break;
		case LAN595:
			printk("%s: Intel 82595-based lan card at %#x,",
					dev->name, (unsigned)dev->base_addr);
			break;
	}

	printk(" %pM", dev->dev_addr);

	if (net_debug > 3)
		printk(KERN_DEBUG ", %dK RCV buffer",
				(int)(lp->rcv_ram)/1024);

	if (dev->irq > 2)
		printk(", IRQ %d, %s.\n", dev->irq, ifmap[dev->if_port]);
	else
		printk(", %s.\n", ifmap[dev->if_port]);

	if (net_debug > 3) {
		i = lp->word[5];
		if (i & 0x2000) /* bit 13 of EEPROM word 5 */
			printk(KERN_DEBUG "%s: Concurrent Processing is "
				"enabled but not used!\n", dev->name);
	}

	/* Check the station address for the manufacturer's code */
	if (net_debug>3)
		printEEPROMInfo(dev);
}

static const struct ethtool_ops eepro_ethtool_ops;

static const struct net_device_ops eepro_netdev_ops = {
 	.ndo_open               = eepro_open,
 	.ndo_stop               = eepro_close,
 	.ndo_start_xmit    	= eepro_send_packet,
 	.ndo_set_multicast_list = set_multicast_list,
 	.ndo_tx_timeout		= eepro_tx_timeout,
	.ndo_change_mtu		= eth_change_mtu,
	.ndo_set_mac_address 	= eth_mac_addr,
	.ndo_validate_addr	= eth_validate_addr,
};

/* This is the real probe routine.  Linux has a history of friendly device
   probes on the ISA bus.  A good device probe avoids doing writes, and
   verifies that the correct device exists and functions.  */

static int __init eepro_probe1(struct net_device *dev, int autoprobe)
{
	unsigned short station_addr[3], id, counter;
	int i;
	struct eepro_local *lp;
	int ioaddr = dev->base_addr;
	int err;

	/* Grab the region so we can find another board if autoIRQ fails. */
	if (!request_region(ioaddr, EEPRO_IO_EXTENT, DRV_NAME)) {
		if (!autoprobe)
			printk(KERN_WARNING "EEPRO: io-port 0x%04x in use\n",
				ioaddr);
		return -EBUSY;
	}

	/* Now, we are going to check for the signature of the
	   ID_REG (register 2 of bank 0) */

	id = inb(ioaddr + ID_REG);

	if ((id & ID_REG_MASK) != ID_REG_SIG)
		goto exit;

	/* We seem to have the 82595 signature, let's
	   play with its counter (last 2 bits of
	   register 2 of bank 0) to be sure. */

	counter = id & R_ROBIN_BITS;

	if ((inb(ioaddr + ID_REG) & R_ROBIN_BITS) != (counter + 0x40))
		goto exit;

	lp = netdev_priv(dev);
	memset(lp, 0, sizeof(struct eepro_local));
	lp->xmt_bar = XMT_BAR_PRO;
	lp->xmt_lower_limit_reg = XMT_LOWER_LIMIT_REG_PRO;
	lp->xmt_upper_limit_reg = XMT_UPPER_LIMIT_REG_PRO;
	lp->eeprom_reg = EEPROM_REG_PRO;
	spin_lock_init(&lp->lock);

	/* Now, get the ethernet hardware address from
	   the EEPROM */
	station_addr[0] = read_eeprom(ioaddr, 2, dev);

	/* FIXME - find another way to know that we've found
	 * an Etherexpress 10
	 */
	if (station_addr[0] == 0x0000 || station_addr[0] == 0xffff) {
		lp->eepro = LAN595FX_10ISA;
		lp->eeprom_reg = EEPROM_REG_10;
		lp->xmt_lower_limit_reg = XMT_LOWER_LIMIT_REG_10;
		lp->xmt_upper_limit_reg = XMT_UPPER_LIMIT_REG_10;
		lp->xmt_bar = XMT_BAR_10;
		station_addr[0] = read_eeprom(ioaddr, 2, dev);
	}

	/* get all words at once. will be used here and for ethtool */
	for (i = 0; i < 8; i++) {
		lp->word[i] = read_eeprom(ioaddr, i, dev);
	}
	station_addr[1] = lp->word[3];
	station_addr[2] = lp->word[4];

	if (!lp->eepro) {
		if (lp->word[7] == ee_FX_INT2IRQ)
			lp->eepro = 2;
		else if (station_addr[2] == SA_ADDR1)
			lp->eepro = 1;
	}

	/* Fill in the 'dev' fields. */
	for (i=0; i < 6; i++)
		dev->dev_addr[i] = ((unsigned char *) station_addr)[5-i];

	/* RX buffer must be more than 3K and less than 29K */
	if (dev->mem_end < 3072 || dev->mem_end > 29696)
		lp->rcv_ram = RCV_DEFAULT_RAM;

	/* calculate {xmt,rcv}_{lower,upper}_limit */
	eepro_recalc(dev);

	if (GetBit(lp->word[5], ee_BNC_TPE))
		dev->if_port = BNC;
	else
		dev->if_port = TPE;

 	if (dev->irq < 2 && lp->eepro != 0) {
 		/* Mask off INT number */
 		int count = lp->word[1] & 7;
 		unsigned irqMask = lp->word[7];

 		while (count--)
 			irqMask &= irqMask - 1;

 		count = ffs(irqMask);

 		if (count)
 			dev->irq = count - 1;

 		if (dev->irq < 2) {
 			printk(KERN_ERR " Duh! illegal interrupt vector stored in EEPROM.\n");
 			goto exit;
 		} else if (dev->irq == 2) {
 			dev->irq = 9;
 		}
 	}

	dev->netdev_ops		= &eepro_netdev_ops;
 	dev->watchdog_timeo	= TX_TIMEOUT;
	dev->ethtool_ops	= &eepro_ethtool_ops;

	/* print boot time info */
	eepro_print_info(dev);

	/* reset 82595 */
	eepro_reset(ioaddr);

	err = register_netdev(dev);
	if (err)
		goto err;
	return 0;
exit:
	err = -ENODEV;
err:
 	release_region(dev->base_addr, EEPRO_IO_EXTENT);
 	return err;
}

/* Open/initialize the board.  This is called (in the current kernel)
   sometime after booting when the 'ifconfig' program is run.

   This routine should set everything up anew at each open, even
   registers that "should" only need to be set once at boot, so that
   there is non-reboot way to recover if something goes wrong.
   */

static const char irqrmap[] = {-1,-1,0,1,-1,2,-1,-1,-1,0,3,4,-1,-1,-1,-1};
static const char irqrmap2[] = {-1,-1,4,0,1,2,-1,3,-1,4,5,6,7,-1,-1,-1};
static int	eepro_grab_irq(struct net_device *dev)
{
	static const int irqlist[] = { 3, 4, 5, 7, 9, 10, 11, 12, 0 };
	const int *irqp = irqlist;
	int temp_reg, ioaddr = dev->base_addr;

	eepro_sw2bank1(ioaddr); /* be CAREFUL, BANK 1 now */

	/* Enable the interrupt line. */
	eepro_en_intline(ioaddr);

	/* be CAREFUL, BANK 0 now */
	eepro_sw2bank0(ioaddr);

	/* clear all interrupts */
	eepro_clear_int(ioaddr);

	/* Let EXEC event to interrupt */
	eepro_en_intexec(ioaddr);

	do {
		eepro_sw2bank1(ioaddr); /* be CAREFUL, BANK 1 now */

		temp_reg = inb(ioaddr + INT_NO_REG);
		outb((temp_reg & 0xf8) | irqrmap[*irqp], ioaddr + INT_NO_REG);

		eepro_sw2bank0(ioaddr); /* Switch back to Bank 0 */

		if (request_irq (*irqp, NULL, IRQF_SHARED, "bogus", dev) != EBUSY) {
			unsigned long irq_mask;
			/* Twinkle the interrupt, and check if it's seen */
			irq_mask = probe_irq_on();

			eepro_diag(ioaddr); /* RESET the 82595 */
			mdelay(20);

			if (*irqp == probe_irq_off(irq_mask))  /* It's a good IRQ line */
				break;

			/* clear all interrupts */
			eepro_clear_int(ioaddr);
		}
	} while (*++irqp);

	eepro_sw2bank1(ioaddr); /* Switch back to Bank 1 */

	/* Disable the physical interrupt line. */
	eepro_dis_intline(ioaddr);

	eepro_sw2bank0(ioaddr); /* Switch back to Bank 0 */

	/* Mask all the interrupts. */
	eepro_dis_int(ioaddr);

	/* clear all interrupts */
	eepro_clear_int(ioaddr);

	return dev->irq;
}

static int eepro_open(struct net_device *dev)
{
	unsigned short temp_reg, old8, old9;
	int irqMask;
	int i, ioaddr = dev->base_addr;
	struct eepro_local *lp = netdev_priv(dev);

	if (net_debug > 3)
		printk(KERN_DEBUG "%s: entering eepro_open routine.\n", dev->name);

	irqMask = lp->word[7];

	if (lp->eepro == LAN595FX_10ISA) {
		if (net_debug > 3) printk(KERN_DEBUG "p->eepro = 3;\n");
	}
	else if (irqMask == ee_FX_INT2IRQ) /* INT to IRQ Mask */
		{
			lp->eepro = 2; /* Yes, an Intel EtherExpress Pro/10+ */
			if (net_debug > 3) printk(KERN_DEBUG "p->eepro = 2;\n");
		}

	else if ((dev->dev_addr[0] == SA_ADDR0 &&
			dev->dev_addr[1] == SA_ADDR1 &&
			dev->dev_addr[2] == SA_ADDR2))
		{
			lp->eepro = 1;
			if (net_debug > 3) printk(KERN_DEBUG "p->eepro = 1;\n");
		}  /* Yes, an Intel EtherExpress Pro/10 */

	else lp->eepro = 0; /* No, it is a generic 82585 lan card */

	/* Get the interrupt vector for the 82595 */
	if (dev->irq < 2 && eepro_grab_irq(dev) == 0) {
		printk(KERN_ERR "%s: unable to get IRQ %d.\n", dev->name, dev->irq);
		return -EAGAIN;
	}

	if (request_irq(dev->irq , eepro_interrupt, 0, dev->name, dev)) {
		printk(KERN_ERR "%s: unable to get IRQ %d.\n", dev->name, dev->irq);
		return -EAGAIN;
	}

	/* Initialize the 82595. */

	eepro_sw2bank2(ioaddr); /* be CAREFUL, BANK 2 now */
	temp_reg = inb(ioaddr + lp->eeprom_reg);

	lp->stepping = temp_reg >> 5;	/* Get the stepping number of the 595 */

	if (net_debug > 3)
		printk(KERN_DEBUG "The stepping of the 82595 is %d\n", lp->stepping);

	if (temp_reg & 0x10) /* Check the TurnOff Enable bit */
		outb(temp_reg & 0xef, ioaddr + lp->eeprom_reg);
	for (i=0; i < 6; i++)
		outb(dev->dev_addr[i] , ioaddr + I_ADD_REG0 + i);

	temp_reg = inb(ioaddr + REG1);    /* Setup Transmit Chaining */
	outb(temp_reg | XMT_Chain_Int | XMT_Chain_ErrStop /* and discard bad RCV frames */
		| RCV_Discard_BadFrame, ioaddr + REG1);

	temp_reg = inb(ioaddr + REG2); /* Match broadcast */
	outb(temp_reg | 0x14, ioaddr + REG2);

	temp_reg = inb(ioaddr + REG3);
	outb(temp_reg & 0x3f, ioaddr + REG3); /* clear test mode */

	/* Set the receiving mode */
	eepro_sw2bank1(ioaddr); /* be CAREFUL, BANK 1 now */

	/* Set the interrupt vector */
	temp_reg = inb(ioaddr + INT_NO_REG);
	if (lp->eepro == LAN595FX || lp->eepro == LAN595FX_10ISA)
		outb((temp_reg & 0xf8) | irqrmap2[dev->irq], ioaddr + INT_NO_REG);
	else outb((temp_reg & 0xf8) | irqrmap[dev->irq], ioaddr + INT_NO_REG);


	temp_reg = inb(ioaddr + INT_NO_REG);
	if (lp->eepro == LAN595FX || lp->eepro == LAN595FX_10ISA)
		outb((temp_reg & 0xf0) | irqrmap2[dev->irq] | 0x08,ioaddr+INT_NO_REG);
	else outb((temp_reg & 0xf8) | irqrmap[dev->irq], ioaddr + INT_NO_REG);

	if (net_debug > 3)
		printk(KERN_DEBUG "eepro_open: content of INT Reg is %x\n", temp_reg);


	/* Initialize the RCV and XMT upper and lower limits */
	outb(lp->rcv_lower_limit >> 8, ioaddr + RCV_LOWER_LIMIT_REG);
	outb(lp->rcv_upper_limit >> 8, ioaddr + RCV_UPPER_LIMIT_REG);
	outb(lp->xmt_lower_limit >> 8, ioaddr + lp->xmt_lower_limit_reg);
	outb(lp->xmt_upper_limit >> 8, ioaddr + lp->xmt_upper_limit_reg);

	/* Enable the interrupt line. */
	eepro_en_intline(ioaddr);

	/* Switch back to Bank 0 */
	eepro_sw2bank0(ioaddr);

	/* Let RX and TX events to interrupt */
	eepro_en_int(ioaddr);

	/* clear all interrupts */
	eepro_clear_int(ioaddr);

	/* Initialize RCV */
	outw(lp->rcv_lower_limit, ioaddr + RCV_BAR);
	lp->rx_start = lp->rcv_lower_limit;
	outw(lp->rcv_upper_limit | 0xfe, ioaddr + RCV_STOP);

	/* Initialize XMT */
	outw(lp->xmt_lower_limit, ioaddr + lp->xmt_bar);
	lp->tx_start = lp->tx_end = lp->xmt_lower_limit;
	lp->tx_last = 0;

	/* Check for the i82595TX and i82595FX */
	old8 = inb(ioaddr + 8);
	outb(~old8, ioaddr + 8);

	if ((temp_reg = inb(ioaddr + 8)) == old8) {
		if (net_debug > 3)
			printk(KERN_DEBUG "i82595 detected!\n");
		lp->version = LAN595;
	}
	else {
		lp->version = LAN595TX;
		outb(old8, ioaddr + 8);
		old9 = inb(ioaddr + 9);

		if (irqMask==ee_FX_INT2IRQ) {
			if (net_debug > 3) {
				printk(KERN_DEBUG "IrqMask: %#x\n",irqMask);
				printk(KERN_DEBUG "i82595FX detected!\n");
			}
			lp->version = LAN595FX;
			outb(old9, ioaddr + 9);
			if (dev->if_port != TPE) {	/* Hopefully, this will fix the
							problem of using Pentiums and
							pro/10 w/ BNC. */
				eepro_sw2bank2(ioaddr); /* be CAREFUL, BANK 2 now */
				temp_reg = inb(ioaddr + REG13);
				/* disable the full duplex mode since it is not
				applicable with the 10Base2 cable. */
				outb(temp_reg & ~(FDX | A_N_ENABLE), REG13);
				eepro_sw2bank0(ioaddr); /* be CAREFUL, BANK 0 now */
			}
		}
		else if (net_debug > 3) {
			printk(KERN_DEBUG "temp_reg: %#x  ~old9: %#x\n",temp_reg,((~old9)&0xff));
			printk(KERN_DEBUG "i82595TX detected!\n");
		}
	}

	eepro_sel_reset(ioaddr);

	netif_start_queue(dev);

	if (net_debug > 3)
		printk(KERN_DEBUG "%s: exiting eepro_open routine.\n", dev->name);

	/* enabling rx */
	eepro_en_rx(ioaddr);

	return 0;
}

static void eepro_tx_timeout (struct net_device *dev)
{
	struct eepro_local *lp = netdev_priv(dev);
	int ioaddr = dev->base_addr;

	/* if (net_debug > 1) */
	printk (KERN_ERR "%s: transmit timed out, %s?\n", dev->name,
		"network cable problem");
	/* This is not a duplicate. One message for the console,
	   one for the log file  */
	printk (KERN_DEBUG "%s: transmit timed out, %s?\n", dev->name,
		"network cable problem");
	eepro_complete_selreset(ioaddr);
}


static netdev_tx_t eepro_send_packet(struct sk_buff *skb,
				     struct net_device *dev)
{
	struct eepro_local *lp = netdev_priv(dev);
	unsigned long flags;
	int ioaddr = dev->base_addr;
	short length = skb->len;

	if (net_debug > 5)
		printk(KERN_DEBUG  "%s: entering eepro_send_packet routine.\n", dev->name);

	if (length < ETH_ZLEN) {
		if (skb_padto(skb, ETH_ZLEN))
			return NETDEV_TX_OK;
		length = ETH_ZLEN;
	}
	netif_stop_queue (dev);

	eepro_dis_int(ioaddr);
	spin_lock_irqsave(&lp->lock, flags);

	{
		unsigned char *buf = skb->data;

		if (hardware_send_packet(dev, buf, length))
			/* we won't wake queue here because we're out of space */
			dev->stats.tx_dropped++;
		else {
			dev->stats.tx_bytes+=skb->len;
			netif_wake_queue(dev);
		}

	}

	dev_kfree_skb (skb);

	/* You might need to clean up and record Tx statistics here. */
	/* dev->stats.tx_aborted_errors++; */

	if (net_debug > 5)
		printk(KERN_DEBUG "%s: exiting eepro_send_packet routine.\n", dev->name);

	eepro_en_int(ioaddr);
	spin_unlock_irqrestore(&lp->lock, flags);

	return NETDEV_TX_OK;
}


/*	The typical workload of the driver:
	Handle the network interface interrupts. */

static irqreturn_t
eepro_interrupt(int irq, void *dev_id)
{
	struct net_device *dev = dev_id;
	struct eepro_local *lp;
	int ioaddr, status, boguscount = 20;
	int handled = 0;

	lp = netdev_priv(dev);

        spin_lock(&lp->lock);

	if (net_debug > 5)
		printk(KERN_DEBUG "%s: entering eepro_interrupt routine.\n", dev->name);

	ioaddr = dev->base_addr;

	while (((status = inb(ioaddr + STATUS_REG)) & (RX_INT|TX_INT)) && (boguscount--))
	{
		handled = 1;
		if (status & RX_INT) {
			if (net_debug > 4)
				printk(KERN_DEBUG "%s: packet received interrupt.\n", dev->name);

			eepro_dis_int(ioaddr);

			/* Get the received packets */
			eepro_ack_rx(ioaddr);
			eepro_rx(dev);

			eepro_en_int(ioaddr);
		}
		if (status & TX_INT) {
			if (net_debug > 4)
 				printk(KERN_DEBUG "%s: packet transmit interrupt.\n", dev->name);


			eepro_dis_int(ioaddr);

			/* Process the status of transmitted packets */
			eepro_ack_tx(ioaddr);
			eepro_transmit_interrupt(dev);

			eepro_en_int(ioaddr);
		}
	}

	if (net_debug > 5)
		printk(KERN_DEBUG "%s: exiting eepro_interrupt routine.\n", dev->name);

	spin_unlock(&lp->lock);
	return IRQ_RETVAL(handled);
}

static int eepro_close(struct net_device *dev)
{
	struct eepro_local *lp = netdev_priv(dev);
	int ioaddr = dev->base_addr;
	short temp_reg;

	netif_stop_queue(dev);

	eepro_sw2bank1(ioaddr); /* Switch back to Bank 1 */

	/* Disable the physical interrupt line. */
	temp_reg = inb(ioaddr + REG1);
	outb(temp_reg & 0x7f, ioaddr + REG1);

	eepro_sw2bank0(ioaddr); /* Switch back to Bank 0 */

	/* Flush the Tx and disable Rx. */
	outb(STOP_RCV_CMD, ioaddr);
	lp->tx_start = lp->tx_end = lp->xmt_lower_limit;
	lp->tx_last = 0;

	/* Mask all the interrupts. */
	eepro_dis_int(ioaddr);

	/* clear all interrupts */
	eepro_clear_int(ioaddr);

	/* Reset the 82595 */
	eepro_reset(ioaddr);

	/* release the interrupt */
	free_irq(dev->irq, dev);

	/* Update the statistics here. What statistics? */

	return 0;
}

/* Set or clear the multicast filter for this adaptor.
 */
static void
set_multicast_list(struct net_device *dev)
{
	struct eepro_local *lp = netdev_priv(dev);
	short ioaddr = dev->base_addr;
	unsigned short mode;
	struct netdev_hw_addr *ha;
	int mc_count = netdev_mc_count(dev);

	if (dev->flags&(IFF_ALLMULTI|IFF_PROMISC) || mc_count > 63)
	{
		eepro_sw2bank2(ioaddr); /* be CAREFUL, BANK 2 now */
		mode = inb(ioaddr + REG2);
		outb(mode | PRMSC_Mode, ioaddr + REG2);
		mode = inb(ioaddr + REG3);
		outb(mode, ioaddr + REG3); /* writing reg. 3 to complete the update */
		eepro_sw2bank0(ioaddr); /* Return to BANK 0 now */
	}

	else if (mc_count == 0)
	{
		eepro_sw2bank2(ioaddr); /* be CAREFUL, BANK 2 now */
		mode = inb(ioaddr + REG2);
		outb(mode & 0xd6, ioaddr + REG2); /* Turn off Multi-IA and PRMSC_Mode bits */
		mode = inb(ioaddr + REG3);
		outb(mode, ioaddr + REG3); /* writing reg. 3 to complete the update */
		eepro_sw2bank0(ioaddr); /* Return to BANK 0 now */
	}

	else
	{
		unsigned short status, *eaddrs;
		int i, boguscount = 0;

		/* Disable RX and TX interrupts.  Necessary to avoid
		   corruption of the HOST_ADDRESS_REG by interrupt
		   service routines. */
		eepro_dis_int(ioaddr);

		eepro_sw2bank2(ioaddr); /* be CAREFUL, BANK 2 now */
		mode = inb(ioaddr + REG2);
		outb(mode | Multi_IA, ioaddr + REG2);
		mode = inb(ioaddr + REG3);
		outb(mode, ioaddr + REG3); /* writing reg. 3 to complete the update */
		eepro_sw2bank0(ioaddr); /* Return to BANK 0 now */
		outw(lp->tx_end, ioaddr + HOST_ADDRESS_REG);
		outw(MC_SETUP, ioaddr + IO_PORT);
		outw(0, ioaddr + IO_PORT);
		outw(0, ioaddr + IO_PORT);
		outw(6 * (mc_count + 1), ioaddr + IO_PORT);

		netdev_for_each_mc_addr(ha, dev) {
			eaddrs = (unsigned short *) ha->addr;
			outw(*eaddrs++, ioaddr + IO_PORT);
			outw(*eaddrs++, ioaddr + IO_PORT);
			outw(*eaddrs++, ioaddr + IO_PORT);
		}

		eaddrs = (unsigned short *) dev->dev_addr;
		outw(eaddrs[0], ioaddr + IO_PORT);
		outw(eaddrs[1], ioaddr + IO_PORT);
		outw(eaddrs[2], ioaddr + IO_PORT);
		outw(lp->tx_end, ioaddr + lp->xmt_bar);
		outb(MC_SETUP, ioaddr);

		/* Update the transmit queue */
		i = lp->tx_end + XMT_HEADER + 6 * (mc_count + 1);

		if (lp->tx_start != lp->tx_end)
		{
			/* update the next address and the chain bit in the
			   last packet */
			outw(lp->tx_last + XMT_CHAIN, ioaddr + HOST_ADDRESS_REG);
			outw(i, ioaddr + IO_PORT);
			outw(lp->tx_last + XMT_COUNT, ioaddr + HOST_ADDRESS_REG);
			status = inw(ioaddr + IO_PORT);
			outw(status | CHAIN_BIT, ioaddr + IO_PORT);
			lp->tx_end = i ;
		}
		else {
			lp->tx_start = lp->tx_end = i ;
		}

		/* Acknowledge that the MC setup is done */
		do { /* We should be doing this in the eepro_interrupt()! */
			SLOW_DOWN;
			SLOW_DOWN;
			if (inb(ioaddr + STATUS_REG) & 0x08)
			{
				i = inb(ioaddr);
				outb(0x08, ioaddr + STATUS_REG);

				if (i & 0x20) { /* command ABORTed */
					printk(KERN_NOTICE "%s: multicast setup failed.\n",
						dev->name);
					break;
				} else if ((i & 0x0f) == 0x03)	{ /* MC-Done */
					printk(KERN_DEBUG "%s: set Rx mode to %d address%s.\n",
						dev->name, mc_count,
						mc_count > 1 ? "es":"");
					break;
				}
			}
		} while (++boguscount < 100);

		/* Re-enable RX and TX interrupts */
		eepro_en_int(ioaddr);
	}
	if (lp->eepro == LAN595FX_10ISA) {
		eepro_complete_selreset(ioaddr);
	}
	else
		eepro_en_rx(ioaddr);
}

/* The horrible routine to read a word from the serial EEPROM. */
/* IMPORTANT - the 82595 will be set to Bank 0 after the eeprom is read */

/* The delay between EEPROM clock transitions. */
#define eeprom_delay() { udelay(40); }
#define EE_READ_CMD (6 << 6)

static int
read_eeprom(int ioaddr, int location, struct net_device *dev)
{
	int i;
	unsigned short retval = 0;
	struct eepro_local *lp = netdev_priv(dev);
	short ee_addr = ioaddr + lp->eeprom_reg;
	int read_cmd = location | EE_READ_CMD;
	short ctrl_val = EECS ;

	/* XXXX - black magic */
		eepro_sw2bank1(ioaddr);
		outb(0x00, ioaddr + STATUS_REG);
	/* XXXX - black magic */

	eepro_sw2bank2(ioaddr);
	outb(ctrl_val, ee_addr);

	/* Shift the read command bits out. */
	for (i = 8; i >= 0; i--) {
		short outval = (read_cmd & (1 << i)) ? ctrl_val | EEDI
			: ctrl_val;
		outb(outval, ee_addr);
		outb(outval | EESK, ee_addr);	/* EEPROM clock tick. */
		eeprom_delay();
		outb(outval, ee_addr);	/* Finish EEPROM a clock tick. */
		eeprom_delay();
	}
	outb(ctrl_val, ee_addr);

	for (i = 16; i > 0; i--) {
		outb(ctrl_val | EESK, ee_addr);	 eeprom_delay();
		retval = (retval << 1) | ((inb(ee_addr) & EEDO) ? 1 : 0);
		outb(ctrl_val, ee_addr);  eeprom_delay();
	}

	/* Terminate the EEPROM access. */
	ctrl_val &= ~EECS;
	outb(ctrl_val | EESK, ee_addr);
	eeprom_delay();
	outb(ctrl_val, ee_addr);
	eeprom_delay();
	eepro_sw2bank0(ioaddr);
	return retval;
}

static int
hardware_send_packet(struct net_device *dev, void *buf, short length)
{
	struct eepro_local *lp = netdev_priv(dev);
	short ioaddr = dev->base_addr;
	unsigned status, tx_available, last, end;

	if (net_debug > 5)
		printk(KERN_DEBUG "%s: entering hardware_send_packet routine.\n", dev->name);

	/* determine how much of the transmit buffer space is available */
	if (lp->tx_end > lp->tx_start)
		tx_available = lp->xmt_ram - (lp->tx_end - lp->tx_start);
	else if (lp->tx_end < lp->tx_start)
		tx_available = lp->tx_start - lp->tx_end;
	else tx_available = lp->xmt_ram;

	if (((((length + 3) >> 1) << 1) + 2*XMT_HEADER) >= tx_available) {
		/* No space available ??? */
		return 1;
		}

		last = lp->tx_end;
		end = last + (((length + 3) >> 1) << 1) + XMT_HEADER;

	if (end >= lp->xmt_upper_limit + 2) { /* the transmit buffer is wrapped around */
		if ((lp->xmt_upper_limit + 2 - last) <= XMT_HEADER) {
				/* Arrrr!!!, must keep the xmt header together,
				several days were lost to chase this one down. */
			last = lp->xmt_lower_limit;
				end = last + (((length + 3) >> 1) << 1) + XMT_HEADER;
			}
		else end = lp->xmt_lower_limit + (end -
						lp->xmt_upper_limit + 2);
		}

		outw(last, ioaddr + HOST_ADDRESS_REG);
		outw(XMT_CMD, ioaddr + IO_PORT);
		outw(0, ioaddr + IO_PORT);
		outw(end, ioaddr + IO_PORT);
		outw(length, ioaddr + IO_PORT);

		if (lp->version == LAN595)
			outsw(ioaddr + IO_PORT, buf, (length + 3) >> 1);
		else {	/* LAN595TX or LAN595FX, capable of 32-bit I/O processing */
			unsigned short temp = inb(ioaddr + INT_MASK_REG);
			outb(temp | IO_32_BIT, ioaddr + INT_MASK_REG);
			outsl(ioaddr + IO_PORT_32_BIT, buf, (length + 3) >> 2);
			outb(temp & ~(IO_32_BIT), ioaddr + INT_MASK_REG);
		}

		/* A dummy read to flush the DRAM write pipeline */
		status = inw(ioaddr + IO_PORT);

		if (lp->tx_start == lp->tx_end) {
		outw(last, ioaddr + lp->xmt_bar);
			outb(XMT_CMD, ioaddr);
			lp->tx_start = last;   /* I don't like to change tx_start here */
		}
		else {
			/* update the next address and the chain bit in the
			last packet */

			if (lp->tx_end != last) {
				outw(lp->tx_last + XMT_CHAIN, ioaddr + HOST_ADDRESS_REG);
				outw(last, ioaddr + IO_PORT);
			}

			outw(lp->tx_last + XMT_COUNT, ioaddr + HOST_ADDRESS_REG);
			status = inw(ioaddr + IO_PORT);
			outw(status | CHAIN_BIT, ioaddr + IO_PORT);

			/* Continue the transmit command */
			outb(RESUME_XMT_CMD, ioaddr);
		}

		lp->tx_last = last;
		lp->tx_end = end;

		if (net_debug > 5)
			printk(KERN_DEBUG "%s: exiting hardware_send_packet routine.\n", dev->name);

	return 0;
}

static void
eepro_rx(struct net_device *dev)
{
	struct eepro_local *lp = netdev_priv(dev);
	short ioaddr = dev->base_addr;
	short boguscount = 20;
	short rcv_car = lp->rx_start;
	unsigned rcv_event, rcv_status, rcv_next_frame, rcv_size;

	if (net_debug > 5)
		printk(KERN_DEBUG "%s: entering eepro_rx routine.\n", dev->name);

	/* Set the read pointer to the start of the RCV */
	outw(rcv_car, ioaddr + HOST_ADDRESS_REG);

	rcv_event = inw(ioaddr + IO_PORT);

	while (rcv_event == RCV_DONE) {

		rcv_status = inw(ioaddr + IO_PORT);
		rcv_next_frame = inw(ioaddr + IO_PORT);
		rcv_size = inw(ioaddr + IO_PORT);

		if ((rcv_status & (RX_OK | RX_ERROR)) == RX_OK) {

			/* Malloc up new buffer. */
			struct sk_buff *skb;

			dev->stats.rx_bytes+=rcv_size;
			rcv_size &= 0x3fff;
			skb = dev_alloc_skb(rcv_size+5);
			if (skb == NULL) {
				printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
				dev->stats.rx_dropped++;
				rcv_car = lp->rx_start + RCV_HEADER + rcv_size;
				lp->rx_start = rcv_next_frame;
				outw(rcv_next_frame, ioaddr + HOST_ADDRESS_REG);

				break;
			}
			skb_reserve(skb,2);

			if (lp->version == LAN595)
				insw(ioaddr+IO_PORT, skb_put(skb,rcv_size), (rcv_size + 3) >> 1);
			else { /* LAN595TX or LAN595FX, capable of 32-bit I/O processing */
				unsigned short temp = inb(ioaddr + INT_MASK_REG);
				outb(temp | IO_32_BIT, ioaddr + INT_MASK_REG);
				insl(ioaddr+IO_PORT_32_BIT, skb_put(skb,rcv_size),
					(rcv_size + 3) >> 2);
				outb(temp & ~(IO_32_BIT), ioaddr + INT_MASK_REG);
			}

			skb->protocol = eth_type_trans(skb,dev);
			netif_rx(skb);
			dev->stats.rx_packets++;
		}

		else { /* Not sure will ever reach here,
			I set the 595 to discard bad received frames */
			dev->stats.rx_errors++;

			if (rcv_status & 0x0100)
				dev->stats.rx_over_errors++;

			else if (rcv_status & 0x0400)
				dev->stats.rx_frame_errors++;

			else if (rcv_status & 0x0800)
				dev->stats.rx_crc_errors++;

			printk(KERN_DEBUG "%s: event = %#x, status = %#x, next = %#x, size = %#x\n",
				dev->name, rcv_event, rcv_status, rcv_next_frame, rcv_size);
		}

		if (rcv_status & 0x1000)
			dev->stats.rx_length_errors++;

		rcv_car = lp->rx_start + RCV_HEADER + rcv_size;
		lp->rx_start = rcv_next_frame;

		if (--boguscount == 0)
			break;

		outw(rcv_next_frame, ioaddr + HOST_ADDRESS_REG);
		rcv_event = inw(ioaddr + IO_PORT);

	}
	if (rcv_car == 0)
		rcv_car = lp->rcv_upper_limit | 0xff;

	outw(rcv_car - 1, ioaddr + RCV_STOP);

	if (net_debug > 5)
		printk(KERN_DEBUG "%s: exiting eepro_rx routine.\n", dev->name);
}

static void
eepro_transmit_interrupt(struct net_device *dev)
{
	struct eepro_local *lp = netdev_priv(dev);
	short ioaddr = dev->base_addr;
	short boguscount = 25;
	short xmt_status;

	while ((lp->tx_start != lp->tx_end) && boguscount--) {

		outw(lp->tx_start, ioaddr + HOST_ADDRESS_REG);
		xmt_status = inw(ioaddr+IO_PORT);

		if (!(xmt_status & TX_DONE_BIT))
				break;

		xmt_status = inw(ioaddr+IO_PORT);
		lp->tx_start = inw(ioaddr+IO_PORT);

		netif_wake_queue (dev);

		if (xmt_status & TX_OK)
			dev->stats.tx_packets++;
		else {
			dev->stats.tx_errors++;
			if (xmt_status & 0x0400) {
				dev->stats.tx_carrier_errors++;
				printk(KERN_DEBUG "%s: carrier error\n",
					dev->name);
				printk(KERN_DEBUG "%s: XMT status = %#x\n",
					dev->name, xmt_status);
			}
			else {
				printk(KERN_DEBUG "%s: XMT status = %#x\n",
					dev->name, xmt_status);
				printk(KERN_DEBUG "%s: XMT status = %#x\n",
					dev->name, xmt_status);
			}
		}
		if (xmt_status & 0x000f) {
			dev->stats.collisions += (xmt_status & 0x000f);
		}

		if ((xmt_status & 0x0040) == 0x0) {
			dev->stats.tx_heartbeat_errors++;
		}
	}
}

static int eepro_ethtool_get_settings(struct net_device *dev,
					struct ethtool_cmd *cmd)
{
	struct eepro_local	*lp = netdev_priv(dev);

	cmd->supported = 	SUPPORTED_10baseT_Half |
				SUPPORTED_10baseT_Full |
				SUPPORTED_Autoneg;
	cmd->advertising =	ADVERTISED_10baseT_Half |
				ADVERTISED_10baseT_Full |
				ADVERTISED_Autoneg;

	if (GetBit(lp->word[5], ee_PortTPE)) {
		cmd->supported |= SUPPORTED_TP;
		cmd->advertising |= ADVERTISED_TP;
	}
	if (GetBit(lp->word[5], ee_PortBNC)) {
		cmd->supported |= SUPPORTED_BNC;
		cmd->advertising |= ADVERTISED_BNC;
	}
	if (GetBit(lp->word[5], ee_PortAUI)) {
		cmd->supported |= SUPPORTED_AUI;
		cmd->advertising |= ADVERTISED_AUI;
	}

	cmd->speed = SPEED_10;

	if (dev->if_port == TPE && lp->word[1] & ee_Duplex) {
		cmd->duplex = DUPLEX_FULL;
	}
	else {
		cmd->duplex = DUPLEX_HALF;
	}

	cmd->port = dev->if_port;
	cmd->phy_address = dev->base_addr;
	cmd->transceiver = XCVR_INTERNAL;

	if (lp->word[0] & ee_AutoNeg) {
		cmd->autoneg = 1;
	}

	return 0;
}

static void eepro_ethtool_get_drvinfo(struct net_device *dev,
					struct ethtool_drvinfo *drvinfo)
{
	strcpy(drvinfo->driver, DRV_NAME);
	strcpy(drvinfo->version, DRV_VERSION);
	sprintf(drvinfo->bus_info, "ISA 0x%lx", dev->base_addr);
}

static const struct ethtool_ops eepro_ethtool_ops = {
	.get_settings	= eepro_ethtool_get_settings,
	.get_drvinfo 	= eepro_ethtool_get_drvinfo,
};

#ifdef MODULE

#define MAX_EEPRO 8
static struct net_device *dev_eepro[MAX_EEPRO];

static int io[MAX_EEPRO] = {
  [0 ... MAX_EEPRO-1] = -1
};
static int irq[MAX_EEPRO];
static int mem[MAX_EEPRO] = {	/* Size of the rx buffer in KB */
  [0 ... MAX_EEPRO-1] = RCV_DEFAULT_RAM/1024
};
static int autodetect;

static int n_eepro;
/* For linux 2.1.xx */

MODULE_AUTHOR("Pascal Dupuis and others");
MODULE_DESCRIPTION("Intel i82595 ISA EtherExpressPro10/10+ driver");
MODULE_LICENSE("GPL");

module_param_array(io, int, NULL, 0);
module_param_array(irq, int, NULL, 0);
module_param_array(mem, int, NULL, 0);
module_param(autodetect, int, 0);
MODULE_PARM_DESC(io, "EtherExpress Pro/10 I/O base address(es)");
MODULE_PARM_DESC(irq, "EtherExpress Pro/10 IRQ number(s)");
MODULE_PARM_DESC(mem, "EtherExpress Pro/10 Rx buffer size(es) in kB (3-29)");
MODULE_PARM_DESC(autodetect, "EtherExpress Pro/10 force board(s) detection (0-1)");

int __init init_module(void)
{
	struct net_device *dev;
	int i;
	if (io[0] == -1 && autodetect == 0) {
		printk(KERN_WARNING "eepro_init_module: Probe is very dangerous in ISA boards!\n");
		printk(KERN_WARNING "eepro_init_module: Please add \"autodetect=1\" to force probe\n");
		return -ENODEV;
	}
	else if (autodetect) {
		/* if autodetect is set then we must force detection */
		for (i = 0; i < MAX_EEPRO; i++) {
			io[i] = 0;
		}

		printk(KERN_INFO "eepro_init_module: Auto-detecting boards (May God protect us...)\n");
	}

	for (i = 0; i < MAX_EEPRO && io[i] != -1; i++) {
		dev = alloc_etherdev(sizeof(struct eepro_local));
		if (!dev)
			break;

		dev->mem_end = mem[i];
		dev->base_addr = io[i];
		dev->irq = irq[i];

		if (do_eepro_probe(dev) == 0) {
			dev_eepro[n_eepro++] = dev;
			continue;
		}
		free_netdev(dev);
		break;
	}

	if (n_eepro)
		printk(KERN_INFO "%s", version);

	return n_eepro ? 0 : -ENODEV;
}

void __exit
cleanup_module(void)
{
	int i;

	for (i=0; i<n_eepro; i++) {
		struct net_device *dev = dev_eepro[i];
		unregister_netdev(dev);
		release_region(dev->base_addr, EEPRO_IO_EXTENT);
		free_netdev(dev);
	}
}
#endif /* MODULE */
opt">*dmab, size_t size) { dmab->dev.type = SNDRV_DMA_TYPE_DEV; dmab->dev.dev = snd_dma_pci_data(pci); if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) { if (dmab->bytes >= size) return 0; } if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), size, dmab) < 0) return -ENOMEM; return 0; } static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci) { if (dmab->area) { dmab->dev.dev = NULL; /* make it anonymous */ snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci)); } } static DEFINE_PCI_DEVICE_TABLE(snd_hdsp_ids) = { { .vendor = PCI_VENDOR_ID_XILINX, .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP, .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, }, /* RME Hammerfall-DSP */ { 0, }, }; MODULE_DEVICE_TABLE(pci, snd_hdsp_ids); /* prototypes */ static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp); static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp); static int snd_hdsp_enable_io (struct hdsp *hdsp); static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp); static void snd_hdsp_initialize_channels (struct hdsp *hdsp); static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout); static int hdsp_autosync_ref(struct hdsp *hdsp); static int snd_hdsp_set_defaults(struct hdsp *hdsp); static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp); static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out) { switch (hdsp->io_type) { case Multiface: case Digiface: case RPM: default: if (hdsp->firmware_rev == 0xa) return (64 * out) + (32 + (in)); else return (52 * out) + (26 + (in)); case H9632: return (32 * out) + (16 + (in)); case H9652: return (52 * out) + (26 + (in)); } } static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out) { switch (hdsp->io_type) { case Multiface: case Digiface: case RPM: default: if (hdsp->firmware_rev == 0xa) return (64 * out) + in; else return (52 * out) + in; case H9632: return (32 * out) + in; case H9652: return (52 * out) + in; } } static void hdsp_write(struct hdsp *hdsp, int reg, int val) { writel(val, hdsp->iobase + reg); } static unsigned int hdsp_read(struct hdsp *hdsp, int reg) { return readl (hdsp->iobase + reg); } static int hdsp_check_for_iobox (struct hdsp *hdsp) { if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0; if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) { snd_printk("Hammerfall-DSP: no IO box connected!\n"); hdsp->state &= ~HDSP_FirmwareLoaded; return -EIO; } return 0; } static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops, unsigned int delay) { unsigned int i; if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0; for (i = 0; i != loops; ++i) { if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError) msleep(delay); else { snd_printd("Hammerfall-DSP: iobox found after %ums!\n", i * delay); return 0; } } snd_printk("Hammerfall-DSP: no IO box connected!\n"); hdsp->state &= ~HDSP_FirmwareLoaded; return -EIO; } static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) { int i; unsigned long flags; if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) { snd_printk ("Hammerfall-DSP: loading firmware\n"); hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM); hdsp_write (hdsp, HDSP_fifoData, 0); if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) { snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n"); return -EIO; } hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD); for (i = 0; i < 24413; ++i) { hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]); if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) { snd_printk ("Hammerfall-DSP: timeout during firmware loading\n"); return -EIO; } } ssleep(3); if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) { snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n"); return -EIO; } #ifdef SNDRV_BIG_ENDIAN hdsp->control2_register = HDSP_BIGENDIAN_MODE; #else hdsp->control2_register = 0; #endif hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register); snd_printk ("Hammerfall-DSP: finished firmware loading\n"); } if (hdsp->state & HDSP_InitializationComplete) { snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n"); spin_lock_irqsave(&hdsp->lock, flags); snd_hdsp_set_defaults(hdsp); spin_unlock_irqrestore(&hdsp->lock, flags); } hdsp->state |= HDSP_FirmwareLoaded; return 0; } static int hdsp_get_iobox_version (struct hdsp *hdsp) { if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) { hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM); hdsp_write (hdsp, HDSP_fifoData, 0); if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0) return -EIO; hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD); hdsp_write (hdsp, HDSP_fifoData, 0); if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT)) { hdsp_write(hdsp, HDSP_control2Reg, HDSP_VERSION_BIT); hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD); if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT)) hdsp->io_type = RPM; else hdsp->io_type = Multiface; } else { hdsp->io_type = Digiface; } } else { /* firmware was already loaded, get iobox type */ if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2) hdsp->io_type = RPM; else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1) hdsp->io_type = Multiface; else hdsp->io_type = Digiface; } return 0; } #ifdef HDSP_FW_LOADER static int hdsp_request_fw_loader(struct hdsp *hdsp); #endif static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand) { if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0; if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) { hdsp->state &= ~HDSP_FirmwareLoaded; if (! load_on_demand) return -EIO; snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n"); /* try to load firmware */ if (! (hdsp->state & HDSP_FirmwareCached)) { #ifdef HDSP_FW_LOADER if (! hdsp_request_fw_loader(hdsp)) return 0; #endif snd_printk(KERN_ERR "Hammerfall-DSP: No firmware loaded nor " "cached, please upload firmware.\n"); return -EIO; } if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) { snd_printk(KERN_ERR "Hammerfall-DSP: Firmware loading from " "cache failed, please upload manually.\n"); return -EIO; } } return 0; } static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout) { int i; /* the fifoStatus registers reports on how many words are available in the command FIFO. */ for (i = 0; i < timeout; i++) { if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count) return 0; /* not very friendly, but we only do this during a firmware load and changing the mixer, so we just put up with it. */ udelay (100); } snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n", count, timeout); return -1; } static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr) { if (addr >= HDSP_MATRIX_MIXER_SIZE) return 0; return hdsp->mixer_matrix[addr]; } static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data) { unsigned int ad; if (addr >= HDSP_MATRIX_MIXER_SIZE) return -1; if (hdsp->io_type == H9652 || hdsp->io_type == H9632) { /* from martin bjornsen: "You can only write dwords to the mixer memory which contain two mixer values in the low and high word. So if you want to change value 0 you have to read value 1 from the cache and write both to the first dword in the mixer memory." */ if (hdsp->io_type == H9632 && addr >= 512) return 0; if (hdsp->io_type == H9652 && addr >= 1352) return 0; hdsp->mixer_matrix[addr] = data; /* `addr' addresses a 16-bit wide address, but the address space accessed via hdsp_write uses byte offsets. put another way, addr varies from 0 to 1351, but to access the corresponding memory location, we need to access 0 to 2703 ... */ ad = addr/2; hdsp_write (hdsp, 4096 + (ad*4), (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) + hdsp->mixer_matrix[addr&0x7fe]); return 0; } else { ad = (addr << 16) + data; if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT)) return -1; hdsp_write (hdsp, HDSP_fifoData, ad); hdsp->mixer_matrix[addr] = data; } return 0; } static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp) { unsigned long flags; int ret = 1; spin_lock_irqsave(&hdsp->lock, flags); if ((hdsp->playback_pid != hdsp->capture_pid) && (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0)) ret = 0; spin_unlock_irqrestore(&hdsp->lock, flags); return ret; } static int hdsp_spdif_sample_rate(struct hdsp *hdsp) { unsigned int status = hdsp_read(hdsp, HDSP_statusRegister); unsigned int rate_bits = (status & HDSP_spdifFrequencyMask); /* For the 9632, the mask is different */ if (hdsp->io_type == H9632) rate_bits = (status & HDSP_spdifFrequencyMask_9632); if (status & HDSP_SPDIFErrorFlag) return 0; switch (rate_bits) { case HDSP_spdifFrequency32KHz: return 32000; case HDSP_spdifFrequency44_1KHz: return 44100; case HDSP_spdifFrequency48KHz: return 48000; case HDSP_spdifFrequency64KHz: return 64000; case HDSP_spdifFrequency88_2KHz: return 88200; case HDSP_spdifFrequency96KHz: return 96000; case HDSP_spdifFrequency128KHz: if (hdsp->io_type == H9632) return 128000; break; case HDSP_spdifFrequency176_4KHz: if (hdsp->io_type == H9632) return 176400; break; case HDSP_spdifFrequency192KHz: if (hdsp->io_type == H9632) return 192000; break; default: break; } snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status); return 0; } static int hdsp_external_sample_rate(struct hdsp *hdsp) { unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register); unsigned int rate_bits = status2 & HDSP_systemFrequencyMask; /* For the 9632 card, there seems to be no bit for indicating external * sample rate greater than 96kHz. The card reports the corresponding * single speed. So the best means seems to get spdif rate when * autosync reference is spdif */ if (hdsp->io_type == H9632 && hdsp_autosync_ref(hdsp) == HDSP_AUTOSYNC_FROM_SPDIF) return hdsp_spdif_sample_rate(hdsp); switch (rate_bits) { case HDSP_systemFrequency32: return 32000; case HDSP_systemFrequency44_1: return 44100; case HDSP_systemFrequency48: return 48000; case HDSP_systemFrequency64: return 64000; case HDSP_systemFrequency88_2: return 88200; case HDSP_systemFrequency96: return 96000; default: return 0; } } static void hdsp_compute_period_size(struct hdsp *hdsp) { hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8)); } static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp) { int position; position = hdsp_read(hdsp, HDSP_statusRegister); if (!hdsp->precise_ptr) return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0; position &= HDSP_BufferPositionMask; position /= 4; position &= (hdsp->period_bytes/2) - 1; return position; } static void hdsp_reset_hw_pointer(struct hdsp *hdsp) { hdsp_write (hdsp, HDSP_resetPointer, 0); if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152) /* HDSP_resetPointer = HDSP_freqReg, which is strange and * requires (?) to write again DDS value after a reset pointer * (at least, it works like this) */ hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value); } static void hdsp_start_audio(struct hdsp *s) { s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start); hdsp_write(s, HDSP_controlRegister, s->control_register); } static void hdsp_stop_audio(struct hdsp *s) { s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable); hdsp_write(s, HDSP_controlRegister, s->control_register); } static void hdsp_silence_playback(struct hdsp *hdsp) { memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES); } static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames) { int n; spin_lock_irq(&s->lock); frames >>= 7; n = 0; while (frames) { n++; frames >>= 1; } s->control_register &= ~HDSP_LatencyMask; s->control_register |= hdsp_encode_latency(n); hdsp_write(s, HDSP_controlRegister, s->control_register); hdsp_compute_period_size(s); spin_unlock_irq(&s->lock); return 0; } static void hdsp_set_dds_value(struct hdsp *hdsp, int rate) { u64 n; if (rate >= 112000) rate /= 4; else if (rate >= 56000) rate /= 2; n = DDS_NUMERATOR; n = div_u64(n, rate); /* n should be less than 2^32 for being written to FREQ register */ snd_BUG_ON(n >> 32); /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS value to write it after a reset */ hdsp->dds_value = n; hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value); } static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally) { int reject_if_open = 0; int current_rate; int rate_bits; /* ASSUMPTION: hdsp->lock is either held, or there is no need for it (e.g. during module initialization). */ if (!(hdsp->control_register & HDSP_ClockModeMaster)) { if (called_internally) { /* request from ctl or card initialization */ snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n"); return -1; } else { /* hw_param request while in AutoSync mode */ int external_freq = hdsp_external_sample_rate(hdsp); int spdif_freq = hdsp_spdif_sample_rate(hdsp); if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1)) snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n"); else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1)) snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n"); else if (rate != external_freq) { snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n"); return -1; } } } current_rate = hdsp->system_sample_rate; /* Changing from a "single speed" to a "double speed" rate is not allowed if any substreams are open. This is because such a change causes a shift in the location of the DMA buffers and a reduction in the number of available buffers. Note that a similar but essentially insoluble problem exists for externally-driven rate changes. All we can do is to flag rate changes in the read/write routines. */ if (rate > 96000 && hdsp->io_type != H9632) return -EINVAL; switch (rate) { case 32000: if (current_rate > 48000) reject_if_open = 1; rate_bits = HDSP_Frequency32KHz; break; case 44100: if (current_rate > 48000) reject_if_open = 1; rate_bits = HDSP_Frequency44_1KHz; break; case 48000: if (current_rate > 48000) reject_if_open = 1; rate_bits = HDSP_Frequency48KHz; break; case 64000: if (current_rate <= 48000 || current_rate > 96000) reject_if_open = 1; rate_bits = HDSP_Frequency64KHz; break; case 88200: if (current_rate <= 48000 || current_rate > 96000) reject_if_open = 1; rate_bits = HDSP_Frequency88_2KHz; break; case 96000: if (current_rate <= 48000 || current_rate > 96000) reject_if_open = 1; rate_bits = HDSP_Frequency96KHz; break; case 128000: if (current_rate < 128000) reject_if_open = 1; rate_bits = HDSP_Frequency128KHz; break; case 176400: if (current_rate < 128000) reject_if_open = 1; rate_bits = HDSP_Frequency176_4KHz; break; case 192000: if (current_rate < 128000) reject_if_open = 1; rate_bits = HDSP_Frequency192KHz; break; default: return -EINVAL; } if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) { snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n", hdsp->capture_pid, hdsp->playback_pid); return -EBUSY; } hdsp->control_register &= ~HDSP_FrequencyMask; hdsp->control_register |= rate_bits; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); /* For HDSP9632 rev 152, need to set DDS value in FREQ register */ if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152) hdsp_set_dds_value(hdsp, rate); if (rate >= 128000) { hdsp->channel_map = channel_map_H9632_qs; } else if (rate > 48000) { if (hdsp->io_type == H9632) hdsp->channel_map = channel_map_H9632_ds; else hdsp->channel_map = channel_map_ds; } else { switch (hdsp->io_type) { case RPM: case Multiface: hdsp->channel_map = channel_map_mf_ss; break; case Digiface: case H9652: hdsp->channel_map = channel_map_df_ss; break; case H9632: hdsp->channel_map = channel_map_H9632_ss; break; default: /* should never happen */ break; } } hdsp->system_sample_rate = rate; return 0; } /*---------------------------------------------------------------------------- MIDI ----------------------------------------------------------------------------*/ static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id) { /* the hardware already does the relevant bit-mask with 0xff */ if (id) return hdsp_read(hdsp, HDSP_midiDataIn1); else return hdsp_read(hdsp, HDSP_midiDataIn0); } static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val) { /* the hardware already does the relevant bit-mask with 0xff */ if (id) hdsp_write(hdsp, HDSP_midiDataOut1, val); else hdsp_write(hdsp, HDSP_midiDataOut0, val); } static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id) { if (id) return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff); else return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff); } static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id) { int fifo_bytes_used; if (id) fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff; else fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff; if (fifo_bytes_used < 128) return 128 - fifo_bytes_used; else return 0; } static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id) { while (snd_hdsp_midi_input_available (hdsp, id)) snd_hdsp_midi_read_byte (hdsp, id); } static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi) { unsigned long flags; int n_pending; int to_write; int i; unsigned char buf[128]; /* Output is not interrupt driven */ spin_lock_irqsave (&hmidi->lock, flags); if (hmidi->output) { if (!snd_rawmidi_transmit_empty (hmidi->output)) { if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) { if (n_pending > (int)sizeof (buf)) n_pending = sizeof (buf); if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) { for (i = 0; i < to_write; ++i) snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]); } } } } spin_unlock_irqrestore (&hmidi->lock, flags); return 0; } static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi) { unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */ unsigned long flags; int n_pending; int i; spin_lock_irqsave (&hmidi->lock, flags); if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) { if (hmidi->input) { if (n_pending > (int)sizeof (buf)) n_pending = sizeof (buf); for (i = 0; i < n_pending; ++i) buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id); if (n_pending) snd_rawmidi_receive (hmidi->input, buf, n_pending); } else { /* flush the MIDI input FIFO */ while (--n_pending) snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id); } } hmidi->pending = 0; if (hmidi->id) hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable; else hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable; hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register); spin_unlock_irqrestore (&hmidi->lock, flags); return snd_hdsp_midi_output_write (hmidi); } static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up) { struct hdsp *hdsp; struct hdsp_midi *hmidi; unsigned long flags; u32 ie; hmidi = (struct hdsp_midi *) substream->rmidi->private_data; hdsp = hmidi->hdsp; ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable; spin_lock_irqsave (&hdsp->lock, flags); if (up) { if (!(hdsp->control_register & ie)) { snd_hdsp_flush_midi_input (hdsp, hmidi->id); hdsp->control_register |= ie; } } else { hdsp->control_register &= ~ie; tasklet_kill(&hdsp->midi_tasklet); } hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); spin_unlock_irqrestore (&hdsp->lock, flags); } static void snd_hdsp_midi_output_timer(unsigned long data) { struct hdsp_midi *hmidi = (struct hdsp_midi *) data; unsigned long flags; snd_hdsp_midi_output_write(hmidi); spin_lock_irqsave (&hmidi->lock, flags); /* this does not bump hmidi->istimer, because the kernel automatically removed the timer when it expired, and we are now adding it back, thus leaving istimer wherever it was set before. */ if (hmidi->istimer) { hmidi->timer.expires = 1 + jiffies; add_timer(&hmidi->timer); } spin_unlock_irqrestore (&hmidi->lock, flags); } static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up) { struct hdsp_midi *hmidi; unsigned long flags; hmidi = (struct hdsp_midi *) substream->rmidi->private_data; spin_lock_irqsave (&hmidi->lock, flags); if (up) { if (!hmidi->istimer) { init_timer(&hmidi->timer); hmidi->timer.function = snd_hdsp_midi_output_timer; hmidi->timer.data = (unsigned long) hmidi; hmidi->timer.expires = 1 + jiffies; add_timer(&hmidi->timer); hmidi->istimer++; } } else { if (hmidi->istimer && --hmidi->istimer <= 0) del_timer (&hmidi->timer); } spin_unlock_irqrestore (&hmidi->lock, flags); if (up) snd_hdsp_midi_output_write(hmidi); } static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream) { struct hdsp_midi *hmidi; hmidi = (struct hdsp_midi *) substream->rmidi->private_data; spin_lock_irq (&hmidi->lock); snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id); hmidi->input = substream; spin_unlock_irq (&hmidi->lock); return 0; } static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream) { struct hdsp_midi *hmidi; hmidi = (struct hdsp_midi *) substream->rmidi->private_data; spin_lock_irq (&hmidi->lock); hmidi->output = substream; spin_unlock_irq (&hmidi->lock); return 0; } static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream) { struct hdsp_midi *hmidi; snd_hdsp_midi_input_trigger (substream, 0); hmidi = (struct hdsp_midi *) substream->rmidi->private_data; spin_lock_irq (&hmidi->lock); hmidi->input = NULL; spin_unlock_irq (&hmidi->lock); return 0; } static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream) { struct hdsp_midi *hmidi; snd_hdsp_midi_output_trigger (substream, 0); hmidi = (struct hdsp_midi *) substream->rmidi->private_data; spin_lock_irq (&hmidi->lock); hmidi->output = NULL; spin_unlock_irq (&hmidi->lock); return 0; } static struct snd_rawmidi_ops snd_hdsp_midi_output = { .open = snd_hdsp_midi_output_open, .close = snd_hdsp_midi_output_close, .trigger = snd_hdsp_midi_output_trigger, }; static struct snd_rawmidi_ops snd_hdsp_midi_input = { .open = snd_hdsp_midi_input_open, .close = snd_hdsp_midi_input_close, .trigger = snd_hdsp_midi_input_trigger, }; static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id) { char buf[32]; hdsp->midi[id].id = id; hdsp->midi[id].rmidi = NULL; hdsp->midi[id].input = NULL; hdsp->midi[id].output = NULL; hdsp->midi[id].hdsp = hdsp; hdsp->midi[id].istimer = 0; hdsp->midi[id].pending = 0; spin_lock_init (&hdsp->midi[id].lock); sprintf (buf, "%s MIDI %d", card->shortname, id+1); if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0) return -1; sprintf(hdsp->midi[id].rmidi->name, "HDSP MIDI %d", id+1); hdsp->midi[id].rmidi->private_data = &hdsp->midi[id]; snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output); snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input); hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | SNDRV_RAWMIDI_INFO_INPUT | SNDRV_RAWMIDI_INFO_DUPLEX; return 0; } /*----------------------------------------------------------------------------- Control Interface ----------------------------------------------------------------------------*/ static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes) { u32 val = 0; val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0; val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0; if (val & HDSP_SPDIFProfessional) val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0; else val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0; return val; } static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val) { aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) | ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0); if (val & HDSP_SPDIFProfessional) aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0; else aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0; } static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; uinfo->count = 1; return 0; } static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif); return 0; } static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; u32 val; val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958); spin_lock_irq(&hdsp->lock); change = val != hdsp->creg_spdif; hdsp->creg_spdif = val; spin_unlock_irq(&hdsp->lock); return change; } static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; uinfo->count = 1; return 0; } static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream); return 0; } static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; u32 val; val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958); spin_lock_irq(&hdsp->lock); change = val != hdsp->creg_spdif_stream; hdsp->creg_spdif_stream = val; hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis); hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val); spin_unlock_irq(&hdsp->lock); return change; } static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; uinfo->count = 1; return 0; } static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { ucontrol->value.iec958.status[0] = kcontrol->private_value; return 0; } #define HDSP_SPDIF_IN(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_spdif_in, \ .get = snd_hdsp_get_spdif_in, \ .put = snd_hdsp_put_spdif_in } static unsigned int hdsp_spdif_in(struct hdsp *hdsp) { return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask); } static int hdsp_set_spdif_input(struct hdsp *hdsp, int in) { hdsp->control_register &= ~HDSP_SPDIFInputMask; hdsp->control_register |= hdsp_encode_spdif_in(in); hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"}; struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3); if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2)) uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2); strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp); return 0; } static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3); spin_lock_irq(&hdsp->lock); change = val != hdsp_spdif_in(hdsp); if (change) hdsp_set_spdif_input(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_SPDIF_OUT(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ .info = snd_hdsp_info_spdif_bits, \ .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out } static int hdsp_spdif_out(struct hdsp *hdsp) { return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0; } static int hdsp_set_spdif_output(struct hdsp *hdsp, int out) { if (out) hdsp->control_register |= HDSP_SPDIFOpticalOut; else hdsp->control_register &= ~HDSP_SPDIFOpticalOut; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } #define snd_hdsp_info_spdif_bits snd_ctl_boolean_mono_info static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp); return 0; } static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_spdif_out(hdsp); hdsp_set_spdif_output(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ .info = snd_hdsp_info_spdif_bits, \ .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional } static int hdsp_spdif_professional(struct hdsp *hdsp) { return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0; } static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val) { if (val) hdsp->control_register |= HDSP_SPDIFProfessional; else hdsp->control_register &= ~HDSP_SPDIFProfessional; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp); return 0; } static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_spdif_professional(hdsp); hdsp_set_spdif_professional(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_SPDIF_EMPHASIS(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ .info = snd_hdsp_info_spdif_bits, \ .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis } static int hdsp_spdif_emphasis(struct hdsp *hdsp) { return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0; } static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val) { if (val) hdsp->control_register |= HDSP_SPDIFEmphasis; else hdsp->control_register &= ~HDSP_SPDIFEmphasis; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp); return 0; } static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_spdif_emphasis(hdsp); hdsp_set_spdif_emphasis(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ .info = snd_hdsp_info_spdif_bits, \ .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio } static int hdsp_spdif_nonaudio(struct hdsp *hdsp) { return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0; } static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val) { if (val) hdsp->control_register |= HDSP_SPDIFNonAudio; else hdsp->control_register &= ~HDSP_SPDIFNonAudio; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp); return 0; } static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_spdif_nonaudio(hdsp); hdsp_set_spdif_nonaudio(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .access = SNDRV_CTL_ELEM_ACCESS_READ, \ .info = snd_hdsp_info_spdif_sample_rate, \ .get = snd_hdsp_get_spdif_sample_rate \ } static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"}; struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); switch (hdsp_spdif_sample_rate(hdsp)) { case 32000: ucontrol->value.enumerated.item[0] = 0; break; case 44100: ucontrol->value.enumerated.item[0] = 1; break; case 48000: ucontrol->value.enumerated.item[0] = 2; break; case 64000: ucontrol->value.enumerated.item[0] = 3; break; case 88200: ucontrol->value.enumerated.item[0] = 4; break; case 96000: ucontrol->value.enumerated.item[0] = 5; break; case 128000: ucontrol->value.enumerated.item[0] = 7; break; case 176400: ucontrol->value.enumerated.item[0] = 8; break; case 192000: ucontrol->value.enumerated.item[0] = 9; break; default: ucontrol->value.enumerated.item[0] = 6; } return 0; } #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .access = SNDRV_CTL_ELEM_ACCESS_READ, \ .info = snd_hdsp_info_system_sample_rate, \ .get = snd_hdsp_get_system_sample_rate \ } static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; uinfo->count = 1; return 0; } static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate; return 0; } #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .access = SNDRV_CTL_ELEM_ACCESS_READ, \ .info = snd_hdsp_info_autosync_sample_rate, \ .get = snd_hdsp_get_autosync_sample_rate \ } static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"}; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); switch (hdsp_external_sample_rate(hdsp)) { case 32000: ucontrol->value.enumerated.item[0] = 0; break; case 44100: ucontrol->value.enumerated.item[0] = 1; break; case 48000: ucontrol->value.enumerated.item[0] = 2; break; case 64000: ucontrol->value.enumerated.item[0] = 3; break; case 88200: ucontrol->value.enumerated.item[0] = 4; break; case 96000: ucontrol->value.enumerated.item[0] = 5; break; case 128000: ucontrol->value.enumerated.item[0] = 7; break; case 176400: ucontrol->value.enumerated.item[0] = 8; break; case 192000: ucontrol->value.enumerated.item[0] = 9; break; default: ucontrol->value.enumerated.item[0] = 6; } return 0; } #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .access = SNDRV_CTL_ELEM_ACCESS_READ, \ .info = snd_hdsp_info_system_clock_mode, \ .get = snd_hdsp_get_system_clock_mode \ } static int hdsp_system_clock_mode(struct hdsp *hdsp) { if (hdsp->control_register & HDSP_ClockModeMaster) return 0; else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate) return 0; return 1; } static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"Master", "Slave" }; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 2; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp); return 0; } #define HDSP_CLOCK_SOURCE(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_clock_source, \ .get = snd_hdsp_get_clock_source, \ .put = snd_hdsp_put_clock_source \ } static int hdsp_clock_source(struct hdsp *hdsp) { if (hdsp->control_register & HDSP_ClockModeMaster) { switch (hdsp->system_sample_rate) { case 32000: return 1; case 44100: return 2; case 48000: return 3; case 64000: return 4; case 88200: return 5; case 96000: return 6; case 128000: return 7; case 176400: return 8; case 192000: return 9; default: return 3; } } else { return 0; } } static int hdsp_set_clock_source(struct hdsp *hdsp, int mode) { int rate; switch (mode) { case HDSP_CLOCK_SOURCE_AUTOSYNC: if (hdsp_external_sample_rate(hdsp) != 0) { if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) { hdsp->control_register &= ~HDSP_ClockModeMaster; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } } return -1; case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ: rate = 32000; break; case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ: rate = 44100; break; case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ: rate = 48000; break; case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ: rate = 64000; break; case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ: rate = 88200; break; case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ: rate = 96000; break; case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ: rate = 128000; break; case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ: rate = 176400; break; case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ: rate = 192000; break; default: rate = 48000; } hdsp->control_register |= HDSP_ClockModeMaster; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); hdsp_set_rate(hdsp, rate, 1); return 0; } static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" }; struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; if (hdsp->io_type == H9632) uinfo->value.enumerated.items = 10; else uinfo->value.enumerated.items = 7; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp); return 0; } static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.enumerated.item[0]; if (val < 0) val = 0; if (hdsp->io_type == H9632) { if (val > 9) val = 9; } else { if (val > 6) val = 6; } spin_lock_irq(&hdsp->lock); if (val != hdsp_clock_source(hdsp)) change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0; else change = 0; spin_unlock_irq(&hdsp->lock); return change; } #define snd_hdsp_info_clock_source_lock snd_ctl_boolean_mono_info static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.integer.value[0] = hdsp->clock_source_locked; return 0; } static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked; if (change) hdsp->clock_source_locked = !!ucontrol->value.integer.value[0]; return change; } #define HDSP_DA_GAIN(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_da_gain, \ .get = snd_hdsp_get_da_gain, \ .put = snd_hdsp_put_da_gain \ } static int hdsp_da_gain(struct hdsp *hdsp) { switch (hdsp->control_register & HDSP_DAGainMask) { case HDSP_DAGainHighGain: return 0; case HDSP_DAGainPlus4dBu: return 1; case HDSP_DAGainMinus10dBV: return 2; default: return 1; } } static int hdsp_set_da_gain(struct hdsp *hdsp, int mode) { hdsp->control_register &= ~HDSP_DAGainMask; switch (mode) { case 0: hdsp->control_register |= HDSP_DAGainHighGain; break; case 1: hdsp->control_register |= HDSP_DAGainPlus4dBu; break; case 2: hdsp->control_register |= HDSP_DAGainMinus10dBV; break; default: return -1; } hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"}; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 3; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp); return 0; } static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.enumerated.item[0]; if (val < 0) val = 0; if (val > 2) val = 2; spin_lock_irq(&hdsp->lock); if (val != hdsp_da_gain(hdsp)) change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0; else change = 0; spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_AD_GAIN(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_ad_gain, \ .get = snd_hdsp_get_ad_gain, \ .put = snd_hdsp_put_ad_gain \ } static int hdsp_ad_gain(struct hdsp *hdsp) { switch (hdsp->control_register & HDSP_ADGainMask) { case HDSP_ADGainMinus10dBV: return 0; case HDSP_ADGainPlus4dBu: return 1; case HDSP_ADGainLowGain: return 2; default: return 1; } } static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode) { hdsp->control_register &= ~HDSP_ADGainMask; switch (mode) { case 0: hdsp->control_register |= HDSP_ADGainMinus10dBV; break; case 1: hdsp->control_register |= HDSP_ADGainPlus4dBu; break; case 2: hdsp->control_register |= HDSP_ADGainLowGain; break; default: return -1; } hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"}; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 3; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp); return 0; } static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.enumerated.item[0]; if (val < 0) val = 0; if (val > 2) val = 2; spin_lock_irq(&hdsp->lock); if (val != hdsp_ad_gain(hdsp)) change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0; else change = 0; spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_PHONE_GAIN(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_phone_gain, \ .get = snd_hdsp_get_phone_gain, \ .put = snd_hdsp_put_phone_gain \ } static int hdsp_phone_gain(struct hdsp *hdsp) { switch (hdsp->control_register & HDSP_PhoneGainMask) { case HDSP_PhoneGain0dB: return 0; case HDSP_PhoneGainMinus6dB: return 1; case HDSP_PhoneGainMinus12dB: return 2; default: return 0; } } static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode) { hdsp->control_register &= ~HDSP_PhoneGainMask; switch (mode) { case 0: hdsp->control_register |= HDSP_PhoneGain0dB; break; case 1: hdsp->control_register |= HDSP_PhoneGainMinus6dB; break; case 2: hdsp->control_register |= HDSP_PhoneGainMinus12dB; break; default: return -1; } hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"0 dB", "-6 dB", "-12 dB"}; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 3; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp); return 0; } static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.enumerated.item[0]; if (val < 0) val = 0; if (val > 2) val = 2; spin_lock_irq(&hdsp->lock); if (val != hdsp_phone_gain(hdsp)) change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0; else change = 0; spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_xlr_breakout_cable, \ .get = snd_hdsp_get_xlr_breakout_cable, \ .put = snd_hdsp_put_xlr_breakout_cable \ } static int hdsp_xlr_breakout_cable(struct hdsp *hdsp) { if (hdsp->control_register & HDSP_XLRBreakoutCable) return 1; return 0; } static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode) { if (mode) hdsp->control_register |= HDSP_XLRBreakoutCable; else hdsp->control_register &= ~HDSP_XLRBreakoutCable; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } #define snd_hdsp_info_xlr_breakout_cable snd_ctl_boolean_mono_info static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp); return 0; } static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_xlr_breakout_cable(hdsp); hdsp_set_xlr_breakout_cable(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } /* (De)activates old RME Analog Extension Board These are connected to the internal ADAT connector Switching this on desactivates external ADAT */ #define HDSP_AEB(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_aeb, \ .get = snd_hdsp_get_aeb, \ .put = snd_hdsp_put_aeb \ } static int hdsp_aeb(struct hdsp *hdsp) { if (hdsp->control_register & HDSP_AnalogExtensionBoard) return 1; return 0; } static int hdsp_set_aeb(struct hdsp *hdsp, int mode) { if (mode) hdsp->control_register |= HDSP_AnalogExtensionBoard; else hdsp->control_register &= ~HDSP_AnalogExtensionBoard; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } #define snd_hdsp_info_aeb snd_ctl_boolean_mono_info static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp); return 0; } static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_aeb(hdsp); hdsp_set_aeb(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_PREF_SYNC_REF(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_pref_sync_ref, \ .get = snd_hdsp_get_pref_sync_ref, \ .put = snd_hdsp_put_pref_sync_ref \ } static int hdsp_pref_sync_ref(struct hdsp *hdsp) { /* Notice that this looks at the requested sync source, not the one actually in use. */ switch (hdsp->control_register & HDSP_SyncRefMask) { case HDSP_SyncRef_ADAT1: return HDSP_SYNC_FROM_ADAT1; case HDSP_SyncRef_ADAT2: return HDSP_SYNC_FROM_ADAT2; case HDSP_SyncRef_ADAT3: return HDSP_SYNC_FROM_ADAT3; case HDSP_SyncRef_SPDIF: return HDSP_SYNC_FROM_SPDIF; case HDSP_SyncRef_WORD: return HDSP_SYNC_FROM_WORD; case HDSP_SyncRef_ADAT_SYNC: return HDSP_SYNC_FROM_ADAT_SYNC; default: return HDSP_SYNC_FROM_WORD; } return 0; } static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref) { hdsp->control_register &= ~HDSP_SyncRefMask; switch (pref) { case HDSP_SYNC_FROM_ADAT1: hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */ break; case HDSP_SYNC_FROM_ADAT2: hdsp->control_register |= HDSP_SyncRef_ADAT2; break; case HDSP_SYNC_FROM_ADAT3: hdsp->control_register |= HDSP_SyncRef_ADAT3; break; case HDSP_SYNC_FROM_SPDIF: hdsp->control_register |= HDSP_SyncRef_SPDIF; break; case HDSP_SYNC_FROM_WORD: hdsp->control_register |= HDSP_SyncRef_WORD; break; case HDSP_SYNC_FROM_ADAT_SYNC: hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC; break; default: return -1; } hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" }; struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; switch (hdsp->io_type) { case Digiface: case H9652: uinfo->value.enumerated.items = 6; break; case Multiface: uinfo->value.enumerated.items = 4; break; case H9632: uinfo->value.enumerated.items = 3; break; default: uinfo->value.enumerated.items = 0; break; } if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp); return 0; } static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change, max; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; switch (hdsp->io_type) { case Digiface: case H9652: max = 6; break; case Multiface: max = 4; break; case H9632: max = 3; break; default: return -EIO; } val = ucontrol->value.enumerated.item[0] % max; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_pref_sync_ref(hdsp); hdsp_set_pref_sync_ref(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_AUTOSYNC_REF(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .access = SNDRV_CTL_ELEM_ACCESS_READ, \ .info = snd_hdsp_info_autosync_ref, \ .get = snd_hdsp_get_autosync_ref, \ } static int hdsp_autosync_ref(struct hdsp *hdsp) { /* This looks at the autosync selected sync reference */ unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register); switch (status2 & HDSP_SelSyncRefMask) { case HDSP_SelSyncRef_WORD: return HDSP_AUTOSYNC_FROM_WORD; case HDSP_SelSyncRef_ADAT_SYNC: return HDSP_AUTOSYNC_FROM_ADAT_SYNC; case HDSP_SelSyncRef_SPDIF: return HDSP_AUTOSYNC_FROM_SPDIF; case HDSP_SelSyncRefMask: return HDSP_AUTOSYNC_FROM_NONE; case HDSP_SelSyncRef_ADAT1: return HDSP_AUTOSYNC_FROM_ADAT1; case HDSP_SelSyncRef_ADAT2: return HDSP_AUTOSYNC_FROM_ADAT2; case HDSP_SelSyncRef_ADAT3: return HDSP_AUTOSYNC_FROM_ADAT3; default: return HDSP_AUTOSYNC_FROM_WORD; } return 0; } static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" }; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 7; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp); return 0; } #define HDSP_LINE_OUT(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_line_out, \ .get = snd_hdsp_get_line_out, \ .put = snd_hdsp_put_line_out \ } static int hdsp_line_out(struct hdsp *hdsp) { return (hdsp->control_register & HDSP_LineOut) ? 1 : 0; } static int hdsp_set_line_output(struct hdsp *hdsp, int out) { if (out) hdsp->control_register |= HDSP_LineOut; else hdsp->control_register &= ~HDSP_LineOut; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } #define snd_hdsp_info_line_out snd_ctl_boolean_mono_info static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); spin_lock_irq(&hdsp->lock); ucontrol->value.integer.value[0] = hdsp_line_out(hdsp); spin_unlock_irq(&hdsp->lock); return 0; } static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_line_out(hdsp); hdsp_set_line_output(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_PRECISE_POINTER(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_precise_pointer, \ .get = snd_hdsp_get_precise_pointer, \ .put = snd_hdsp_put_precise_pointer \ } static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise) { if (precise) hdsp->precise_ptr = 1; else hdsp->precise_ptr = 0; return 0; } #define snd_hdsp_info_precise_pointer snd_ctl_boolean_mono_info static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); spin_lock_irq(&hdsp->lock); ucontrol->value.integer.value[0] = hdsp->precise_ptr; spin_unlock_irq(&hdsp->lock); return 0; } static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp->precise_ptr; hdsp_set_precise_pointer(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_USE_MIDI_TASKLET(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_use_midi_tasklet, \ .get = snd_hdsp_get_use_midi_tasklet, \ .put = snd_hdsp_put_use_midi_tasklet \ } static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet) { if (use_tasklet) hdsp->use_midi_tasklet = 1; else hdsp->use_midi_tasklet = 0; return 0; } #define snd_hdsp_info_use_midi_tasklet snd_ctl_boolean_mono_info static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); spin_lock_irq(&hdsp->lock); ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet; spin_unlock_irq(&hdsp->lock); return 0; } static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp->use_midi_tasklet; hdsp_set_use_midi_tasklet(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_MIXER(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \ .name = xname, \ .index = xindex, \ .device = 0, \ .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \ SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ .info = snd_hdsp_info_mixer, \ .get = snd_hdsp_get_mixer, \ .put = snd_hdsp_put_mixer \ } static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; uinfo->count = 3; uinfo->value.integer.min = 0; uinfo->value.integer.max = 65536; uinfo->value.integer.step = 1; return 0; } static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int source; int destination; int addr; source = ucontrol->value.integer.value[0]; destination = ucontrol->value.integer.value[1]; if (source >= hdsp->max_channels) addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination); else addr = hdsp_input_to_output_key(hdsp,source, destination); spin_lock_irq(&hdsp->lock); ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr); spin_unlock_irq(&hdsp->lock); return 0; } static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int source; int destination; int gain; int addr; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; source = ucontrol->value.integer.value[0]; destination = ucontrol->value.integer.value[1]; if (source >= hdsp->max_channels) addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination); else addr = hdsp_input_to_output_key(hdsp,source, destination); gain = ucontrol->value.integer.value[2]; spin_lock_irq(&hdsp->lock); change = gain != hdsp_read_gain(hdsp, addr); if (change) hdsp_write_gain(hdsp, addr, gain); spin_unlock_irq(&hdsp->lock); return change; } #define HDSP_WC_SYNC_CHECK(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ .info = snd_hdsp_info_sync_check, \ .get = snd_hdsp_get_wc_sync_check \ } static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"No Lock", "Lock", "Sync" }; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 3; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int hdsp_wc_sync_check(struct hdsp *hdsp) { int status2 = hdsp_read(hdsp, HDSP_status2Register); if (status2 & HDSP_wc_lock) { if (status2 & HDSP_wc_sync) return 2; else return 1; } else return 0; return 0; } static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp); return 0; } #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ .info = snd_hdsp_info_sync_check, \ .get = snd_hdsp_get_spdif_sync_check \ } static int hdsp_spdif_sync_check(struct hdsp *hdsp) { int status = hdsp_read(hdsp, HDSP_statusRegister); if (status & HDSP_SPDIFErrorFlag) return 0; else { if (status & HDSP_SPDIFSync) return 2; else return 1; } return 0; } static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp); return 0; } #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ .info = snd_hdsp_info_sync_check, \ .get = snd_hdsp_get_adatsync_sync_check \ } static int hdsp_adatsync_sync_check(struct hdsp *hdsp) { int status = hdsp_read(hdsp, HDSP_statusRegister); if (status & HDSP_TimecodeLock) { if (status & HDSP_TimecodeSync) return 2; else return 1; } else return 0; } static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp); return 0; } #define HDSP_ADAT_SYNC_CHECK \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \ .info = snd_hdsp_info_sync_check, \ .get = snd_hdsp_get_adat_sync_check \ } static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx) { int status = hdsp_read(hdsp, HDSP_statusRegister); if (status & (HDSP_Lock0>>idx)) { if (status & (HDSP_Sync0>>idx)) return 2; else return 1; } else return 0; } static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { int offset; struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); offset = ucontrol->id.index - 1; snd_BUG_ON(offset < 0); switch (hdsp->io_type) { case Digiface: case H9652: if (offset >= 3) return -EINVAL; break; case Multiface: case H9632: if (offset >= 1) return -EINVAL; break; default: return -EIO; } ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset); return 0; } #define HDSP_DDS_OFFSET(xname, xindex) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ .name = xname, \ .index = xindex, \ .info = snd_hdsp_info_dds_offset, \ .get = snd_hdsp_get_dds_offset, \ .put = snd_hdsp_put_dds_offset \ } static int hdsp_dds_offset(struct hdsp *hdsp) { u64 n; unsigned int dds_value = hdsp->dds_value; int system_sample_rate = hdsp->system_sample_rate; if (!dds_value) return 0; n = DDS_NUMERATOR; /* * dds_value = n / rate * rate = n / dds_value */ n = div_u64(n, dds_value); if (system_sample_rate >= 112000) n *= 4; else if (system_sample_rate >= 56000) n *= 2; return ((int)n) - system_sample_rate; } static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz) { int rate = hdsp->system_sample_rate + offset_hz; hdsp_set_dds_value(hdsp, rate); return 0; } static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; uinfo->count = 1; uinfo->value.integer.min = -5000; uinfo->value.integer.max = 5000; return 0; } static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp); return 0; } static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.enumerated.item[0]; spin_lock_irq(&hdsp->lock); if (val != hdsp_dds_offset(hdsp)) change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0; else change = 0; spin_unlock_irq(&hdsp->lock); return change; } static struct snd_kcontrol_new snd_hdsp_9632_controls[] = { HDSP_DA_GAIN("DA Gain", 0), HDSP_AD_GAIN("AD Gain", 0), HDSP_PHONE_GAIN("Phones Gain", 0), HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0), HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0) }; static struct snd_kcontrol_new snd_hdsp_controls[] = { { .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), .info = snd_hdsp_control_spdif_info, .get = snd_hdsp_control_spdif_get, .put = snd_hdsp_control_spdif_put, }, { .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE, .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), .info = snd_hdsp_control_spdif_stream_info, .get = snd_hdsp_control_spdif_stream_get, .put = snd_hdsp_control_spdif_stream_put, }, { .access = SNDRV_CTL_ELEM_ACCESS_READ, .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), .info = snd_hdsp_control_spdif_mask_info, .get = snd_hdsp_control_spdif_mask_get, .private_value = IEC958_AES0_NONAUDIO | IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS, }, { .access = SNDRV_CTL_ELEM_ACCESS_READ, .iface = SNDRV_CTL_ELEM_IFACE_PCM, .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), .info = snd_hdsp_control_spdif_mask_info, .get = snd_hdsp_control_spdif_mask_get, .private_value = IEC958_AES0_NONAUDIO | IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS, }, HDSP_MIXER("Mixer", 0), HDSP_SPDIF_IN("IEC958 Input Connector", 0), HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0), HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0), HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0), HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0), /* 'Sample Clock Source' complies with the alsa control naming scheme */ HDSP_CLOCK_SOURCE("Sample Clock Source", 0), { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Sample Clock Source Locking", .info = snd_hdsp_info_clock_source_lock, .get = snd_hdsp_get_clock_source_lock, .put = snd_hdsp_put_clock_source_lock, }, HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0), HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0), HDSP_AUTOSYNC_REF("AutoSync Reference", 0), HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0), HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0), /* 'External Rate' complies with the alsa control naming scheme */ HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0), HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0), HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0), HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0), HDSP_LINE_OUT("Line Out", 0), HDSP_PRECISE_POINTER("Precise Pointer", 0), HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0), }; static int hdsp_rpm_input12(struct hdsp *hdsp) { switch (hdsp->control_register & HDSP_RPM_Inp12) { case HDSP_RPM_Inp12_Phon_6dB: return 0; case HDSP_RPM_Inp12_Phon_n6dB: return 2; case HDSP_RPM_Inp12_Line_0dB: return 3; case HDSP_RPM_Inp12_Line_n6dB: return 4; } return 1; } static int snd_hdsp_get_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_rpm_input12(hdsp); return 0; } static int hdsp_set_rpm_input12(struct hdsp *hdsp, int mode) { hdsp->control_register &= ~HDSP_RPM_Inp12; switch (mode) { case 0: hdsp->control_register |= HDSP_RPM_Inp12_Phon_6dB; break; case 1: break; case 2: hdsp->control_register |= HDSP_RPM_Inp12_Phon_n6dB; break; case 3: hdsp->control_register |= HDSP_RPM_Inp12_Line_0dB; break; case 4: hdsp->control_register |= HDSP_RPM_Inp12_Line_n6dB; break; default: return -1; } hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_put_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.enumerated.item[0]; if (val < 0) val = 0; if (val > 4) val = 4; spin_lock_irq(&hdsp->lock); if (val != hdsp_rpm_input12(hdsp)) change = (hdsp_set_rpm_input12(hdsp, val) == 0) ? 1 : 0; else change = 0; spin_unlock_irq(&hdsp->lock); return change; } static int snd_hdsp_info_rpm_input(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"Phono +6dB", "Phono 0dB", "Phono -6dB", "Line 0dB", "Line -6dB"}; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 5; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static int hdsp_rpm_input34(struct hdsp *hdsp) { switch (hdsp->control_register & HDSP_RPM_Inp34) { case HDSP_RPM_Inp34_Phon_6dB: return 0; case HDSP_RPM_Inp34_Phon_n6dB: return 2; case HDSP_RPM_Inp34_Line_0dB: return 3; case HDSP_RPM_Inp34_Line_n6dB: return 4; } return 1; } static int snd_hdsp_get_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.enumerated.item[0] = hdsp_rpm_input34(hdsp); return 0; } static int hdsp_set_rpm_input34(struct hdsp *hdsp, int mode) { hdsp->control_register &= ~HDSP_RPM_Inp34; switch (mode) { case 0: hdsp->control_register |= HDSP_RPM_Inp34_Phon_6dB; break; case 1: break; case 2: hdsp->control_register |= HDSP_RPM_Inp34_Phon_n6dB; break; case 3: hdsp->control_register |= HDSP_RPM_Inp34_Line_0dB; break; case 4: hdsp->control_register |= HDSP_RPM_Inp34_Line_n6dB; break; default: return -1; } hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_put_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.enumerated.item[0]; if (val < 0) val = 0; if (val > 4) val = 4; spin_lock_irq(&hdsp->lock); if (val != hdsp_rpm_input34(hdsp)) change = (hdsp_set_rpm_input34(hdsp, val) == 0) ? 1 : 0; else change = 0; spin_unlock_irq(&hdsp->lock); return change; } /* RPM Bypass switch */ static int hdsp_rpm_bypass(struct hdsp *hdsp) { return (hdsp->control_register & HDSP_RPM_Bypass) ? 1 : 0; } static int snd_hdsp_get_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.integer.value[0] = hdsp_rpm_bypass(hdsp); return 0; } static int hdsp_set_rpm_bypass(struct hdsp *hdsp, int on) { if (on) hdsp->control_register |= HDSP_RPM_Bypass; else hdsp->control_register &= ~HDSP_RPM_Bypass; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_put_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_rpm_bypass(hdsp); hdsp_set_rpm_bypass(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } static int snd_hdsp_info_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"On", "Off"}; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 2; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } /* RPM Disconnect switch */ static int hdsp_rpm_disconnect(struct hdsp *hdsp) { return (hdsp->control_register & HDSP_RPM_Disconnect) ? 1 : 0; } static int snd_hdsp_get_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); ucontrol->value.integer.value[0] = hdsp_rpm_disconnect(hdsp); return 0; } static int hdsp_set_rpm_disconnect(struct hdsp *hdsp, int on) { if (on) hdsp->control_register |= HDSP_RPM_Disconnect; else hdsp->control_register &= ~HDSP_RPM_Disconnect; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); return 0; } static int snd_hdsp_put_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) { struct hdsp *hdsp = snd_kcontrol_chip(kcontrol); int change; unsigned int val; if (!snd_hdsp_use_is_exclusive(hdsp)) return -EBUSY; val = ucontrol->value.integer.value[0] & 1; spin_lock_irq(&hdsp->lock); change = (int)val != hdsp_rpm_disconnect(hdsp); hdsp_set_rpm_disconnect(hdsp, val); spin_unlock_irq(&hdsp->lock); return change; } static int snd_hdsp_info_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { static char *texts[] = {"On", "Off"}; uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; uinfo->count = 1; uinfo->value.enumerated.items = 2; if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); return 0; } static struct snd_kcontrol_new snd_hdsp_rpm_controls[] = { { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "RPM Bypass", .get = snd_hdsp_get_rpm_bypass, .put = snd_hdsp_put_rpm_bypass, .info = snd_hdsp_info_rpm_bypass }, { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "RPM Disconnect", .get = snd_hdsp_get_rpm_disconnect, .put = snd_hdsp_put_rpm_disconnect, .info = snd_hdsp_info_rpm_disconnect }, { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Input 1/2", .get = snd_hdsp_get_rpm_input12, .put = snd_hdsp_put_rpm_input12, .info = snd_hdsp_info_rpm_input }, { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = "Input 3/4", .get = snd_hdsp_get_rpm_input34, .put = snd_hdsp_put_rpm_input34, .info = snd_hdsp_info_rpm_input }, HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0), HDSP_MIXER("Mixer", 0) }; static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0); static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK; static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp) { unsigned int idx; int err; struct snd_kcontrol *kctl; if (hdsp->io_type == RPM) { /* RPM Bypass, Disconnect and Input switches */ for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_rpm_controls); idx++) { err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_rpm_controls[idx], hdsp)); if (err < 0) return err; } return 0; } for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) { if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0) return err; if (idx == 1) /* IEC958 (S/PDIF) Stream */ hdsp->spdif_ctl = kctl; } /* ADAT SyncCheck status */ snd_hdsp_adat_sync_check.name = "ADAT Lock Status"; snd_hdsp_adat_sync_check.index = 1; if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp)))) return err; if (hdsp->io_type == Digiface || hdsp->io_type == H9652) { for (idx = 1; idx < 3; ++idx) { snd_hdsp_adat_sync_check.index = idx+1; if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp)))) return err; } } /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */ if (hdsp->io_type == H9632) { for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) { if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0) return err; } } /* AEB control for H96xx card */ if (hdsp->io_type == H9632 || hdsp->io_type == H9652) { if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0) return err; } return 0; } /*------------------------------------------------------------ /proc interface ------------------------------------------------------------*/ static void snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer) { struct hdsp *hdsp = entry->private_data; unsigned int status; unsigned int status2; char *pref_sync_ref; char *autosync_ref; char *system_clock_mode; char *clock_source; int x; status = hdsp_read(hdsp, HDSP_statusRegister); status2 = hdsp_read(hdsp, HDSP_status2Register); snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name, hdsp->card->number + 1); snd_iprintf(buffer, "Buffers: capture %p playback %p\n", hdsp->capture_buffer, hdsp->playback_buffer); snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n", hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase); snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register); snd_iprintf(buffer, "Control2 register: 0x%x\n", hdsp->control2_register); snd_iprintf(buffer, "Status register: 0x%x\n", status); snd_iprintf(buffer, "Status2 register: 0x%x\n", status2); if (hdsp_check_for_iobox(hdsp)) { snd_iprintf(buffer, "No I/O box connected.\n" "Please connect one and upload firmware.\n"); return; } if (hdsp_check_for_firmware(hdsp, 0)) { if (hdsp->state & HDSP_FirmwareCached) { if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) { snd_iprintf(buffer, "Firmware loading from " "cache failed, " "please upload manually.\n"); return; } } else { int err = -EINVAL; #ifdef HDSP_FW_LOADER err = hdsp_request_fw_loader(hdsp); #endif if (err < 0) { snd_iprintf(buffer, "No firmware loaded nor cached, " "please upload firmware.\n"); return; } } } snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff); snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0)); snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0)); snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1)); snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1)); snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off"); snd_iprintf(buffer, "\n"); x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask)); snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes); snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp)); snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off"); snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off"); snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2); snd_iprintf(buffer, "\n"); switch (hdsp_clock_source(hdsp)) { case HDSP_CLOCK_SOURCE_AUTOSYNC: clock_source = "AutoSync"; break; case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ: clock_source = "Internal 32 kHz"; break; case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ: clock_source = "Internal 44.1 kHz"; break; case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ: clock_source = "Internal 48 kHz"; break; case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ: clock_source = "Internal 64 kHz"; break; case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ: clock_source = "Internal 88.2 kHz"; break; case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ: clock_source = "Internal 96 kHz"; break; case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ: clock_source = "Internal 128 kHz"; break; case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ: clock_source = "Internal 176.4 kHz"; break; case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ: clock_source = "Internal 192 kHz"; break; default: clock_source = "Error"; } snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source); if (hdsp_system_clock_mode(hdsp)) system_clock_mode = "Slave"; else system_clock_mode = "Master"; switch (hdsp_pref_sync_ref (hdsp)) { case HDSP_SYNC_FROM_WORD: pref_sync_ref = "Word Clock"; break; case HDSP_SYNC_FROM_ADAT_SYNC: pref_sync_ref = "ADAT Sync"; break; case HDSP_SYNC_FROM_SPDIF: pref_sync_ref = "SPDIF"; break; case HDSP_SYNC_FROM_ADAT1: pref_sync_ref = "ADAT1"; break; case HDSP_SYNC_FROM_ADAT2: pref_sync_ref = "ADAT2"; break; case HDSP_SYNC_FROM_ADAT3: pref_sync_ref = "ADAT3"; break; default: pref_sync_ref = "Word Clock"; break; } snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref); switch (hdsp_autosync_ref (hdsp)) { case HDSP_AUTOSYNC_FROM_WORD: autosync_ref = "Word Clock"; break; case HDSP_AUTOSYNC_FROM_ADAT_SYNC: autosync_ref = "ADAT Sync"; break; case HDSP_AUTOSYNC_FROM_SPDIF: autosync_ref = "SPDIF"; break; case HDSP_AUTOSYNC_FROM_NONE: autosync_ref = "None"; break; case HDSP_AUTOSYNC_FROM_ADAT1: autosync_ref = "ADAT1"; break; case HDSP_AUTOSYNC_FROM_ADAT2: autosync_ref = "ADAT2"; break; case HDSP_AUTOSYNC_FROM_ADAT3: autosync_ref = "ADAT3"; break; default: autosync_ref = "---"; break; } snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref); snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp)); snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode); snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate); snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No"); snd_iprintf(buffer, "\n"); if (hdsp->io_type != RPM) { switch (hdsp_spdif_in(hdsp)) { case HDSP_SPDIFIN_OPTICAL: snd_iprintf(buffer, "IEC958 input: Optical\n"); break; case HDSP_SPDIFIN_COAXIAL: snd_iprintf(buffer, "IEC958 input: Coaxial\n"); break; case HDSP_SPDIFIN_INTERNAL: snd_iprintf(buffer, "IEC958 input: Internal\n"); break; case HDSP_SPDIFIN_AES: snd_iprintf(buffer, "IEC958 input: AES\n"); break; default: snd_iprintf(buffer, "IEC958 input: ???\n"); break; } } if (RPM == hdsp->io_type) { if (hdsp->control_register & HDSP_RPM_Bypass) snd_iprintf(buffer, "RPM Bypass: disabled\n"); else snd_iprintf(buffer, "RPM Bypass: enabled\n"); if (hdsp->control_register & HDSP_RPM_Disconnect) snd_iprintf(buffer, "RPM disconnected\n"); else snd_iprintf(buffer, "RPM connected\n"); switch (hdsp->control_register & HDSP_RPM_Inp12) { case HDSP_RPM_Inp12_Phon_6dB: snd_iprintf(buffer, "Input 1/2: Phono, 6dB\n"); break; case HDSP_RPM_Inp12_Phon_0dB: snd_iprintf(buffer, "Input 1/2: Phono, 0dB\n"); break; case HDSP_RPM_Inp12_Phon_n6dB: snd_iprintf(buffer, "Input 1/2: Phono, -6dB\n"); break; case HDSP_RPM_Inp12_Line_0dB: snd_iprintf(buffer, "Input 1/2: Line, 0dB\n"); break; case HDSP_RPM_Inp12_Line_n6dB: snd_iprintf(buffer, "Input 1/2: Line, -6dB\n"); break; default: snd_iprintf(buffer, "Input 1/2: ???\n"); } switch (hdsp->control_register & HDSP_RPM_Inp34) { case HDSP_RPM_Inp34_Phon_6dB: snd_iprintf(buffer, "Input 3/4: Phono, 6dB\n"); break; case HDSP_RPM_Inp34_Phon_0dB: snd_iprintf(buffer, "Input 3/4: Phono, 0dB\n"); break; case HDSP_RPM_Inp34_Phon_n6dB: snd_iprintf(buffer, "Input 3/4: Phono, -6dB\n"); break; case HDSP_RPM_Inp34_Line_0dB: snd_iprintf(buffer, "Input 3/4: Line, 0dB\n"); break; case HDSP_RPM_Inp34_Line_n6dB: snd_iprintf(buffer, "Input 3/4: Line, -6dB\n"); break; default: snd_iprintf(buffer, "Input 3/4: ???\n"); } } else { if (hdsp->control_register & HDSP_SPDIFOpticalOut) snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n"); else snd_iprintf(buffer, "IEC958 output: Coaxial only\n"); if (hdsp->control_register & HDSP_SPDIFProfessional) snd_iprintf(buffer, "IEC958 quality: Professional\n"); else snd_iprintf(buffer, "IEC958 quality: Consumer\n"); if (hdsp->control_register & HDSP_SPDIFEmphasis) snd_iprintf(buffer, "IEC958 emphasis: on\n"); else snd_iprintf(buffer, "IEC958 emphasis: off\n"); if (hdsp->control_register & HDSP_SPDIFNonAudio) snd_iprintf(buffer, "IEC958 NonAudio: on\n"); else snd_iprintf(buffer, "IEC958 NonAudio: off\n"); x = hdsp_spdif_sample_rate(hdsp); if (x != 0) snd_iprintf(buffer, "IEC958 sample rate: %d\n", x); else snd_iprintf(buffer, "IEC958 sample rate: Error flag set\n"); } snd_iprintf(buffer, "\n"); /* Sync Check */ x = status & HDSP_Sync0; if (status & HDSP_Lock0) snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock"); else snd_iprintf(buffer, "ADAT1: No Lock\n"); switch (hdsp->io_type) { case Digiface: case H9652: x = status & HDSP_Sync1; if (status & HDSP_Lock1) snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock"); else snd_iprintf(buffer, "ADAT2: No Lock\n"); x = status & HDSP_Sync2; if (status & HDSP_Lock2) snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock"); else snd_iprintf(buffer, "ADAT3: No Lock\n"); break; default: /* relax */ break; } x = status & HDSP_SPDIFSync; if (status & HDSP_SPDIFErrorFlag) snd_iprintf (buffer, "SPDIF: No Lock\n"); else snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock"); x = status2 & HDSP_wc_sync; if (status2 & HDSP_wc_lock) snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock"); else snd_iprintf (buffer, "Word Clock: No Lock\n"); x = status & HDSP_TimecodeSync; if (status & HDSP_TimecodeLock) snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock"); else snd_iprintf(buffer, "ADAT Sync: No Lock\n"); snd_iprintf(buffer, "\n"); /* Informations about H9632 specific controls */ if (hdsp->io_type == H9632) { char *tmp; switch (hdsp_ad_gain(hdsp)) { case 0: tmp = "-10 dBV"; break; case 1: tmp = "+4 dBu"; break; default: tmp = "Lo Gain"; break; } snd_iprintf(buffer, "AD Gain : %s\n", tmp); switch (hdsp_da_gain(hdsp)) { case 0: tmp = "Hi Gain"; break; case 1: tmp = "+4 dBu"; break; default: tmp = "-10 dBV"; break; } snd_iprintf(buffer, "DA Gain : %s\n", tmp); switch (hdsp_phone_gain(hdsp)) { case 0: tmp = "0 dB"; break; case 1: tmp = "-6 dB"; break; default: tmp = "-12 dB"; break; } snd_iprintf(buffer, "Phones Gain : %s\n", tmp); snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no"); if (hdsp->control_register & HDSP_AnalogExtensionBoard) snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n"); else snd_iprintf(buffer, "AEB : off (ADAT1 external)\n"); snd_iprintf(buffer, "\n"); } } static void snd_hdsp_proc_init(struct hdsp *hdsp) { struct snd_info_entry *entry; if (! snd_card_proc_new(hdsp->card, "hdsp", &entry)) snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read); } static void snd_hdsp_free_buffers(struct hdsp *hdsp) { snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci); snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci); } static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp) { unsigned long pb_bus, cb_bus; if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 || snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) { if (hdsp->capture_dma_buf.area) snd_dma_free_pages(&hdsp->capture_dma_buf); printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name); return -ENOMEM; } /* Align to bus-space 64K boundary */ cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul); pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul); /* Tell the card where it is */ hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus); hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus); hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr); hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr); return 0; } static int snd_hdsp_set_defaults(struct hdsp *hdsp) { unsigned int i; /* ASSUMPTION: hdsp->lock is either held, or there is no need to hold it (e.g. during module initialization). */ /* set defaults: SPDIF Input via Coax Master clock mode maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer, which implies 2 4096 sample, 32Kbyte periods). Enable line out. */ hdsp->control_register = HDSP_ClockModeMaster | HDSP_SPDIFInputCoaxial | hdsp_encode_latency(7) | HDSP_LineOut; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); #ifdef SNDRV_BIG_ENDIAN hdsp->control2_register = HDSP_BIGENDIAN_MODE; #else hdsp->control2_register = 0; #endif if (hdsp->io_type == H9652) snd_hdsp_9652_enable_mixer (hdsp); else hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register); hdsp_reset_hw_pointer(hdsp); hdsp_compute_period_size(hdsp); /* silence everything */ for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i) hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN; for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) { if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN)) return -EIO; } /* H9632 specific defaults */ if (hdsp->io_type == H9632) { hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB); hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); } /* set a default rate so that the channel map is set up. */ hdsp_set_rate(hdsp, 48000, 1); return 0; } static void hdsp_midi_tasklet(unsigned long arg) { struct hdsp *hdsp = (struct hdsp *)arg; if (hdsp->midi[0].pending) snd_hdsp_midi_input_read (&hdsp->midi[0]); if (hdsp->midi[1].pending) snd_hdsp_midi_input_read (&hdsp->midi[1]); } static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id) { struct hdsp *hdsp = (struct hdsp *) dev_id; unsigned int status; int audio; int midi0; int midi1; unsigned int midi0status; unsigned int midi1status; int schedule = 0; status = hdsp_read(hdsp, HDSP_statusRegister); audio = status & HDSP_audioIRQPending; midi0 = status & HDSP_midi0IRQPending; midi1 = status & HDSP_midi1IRQPending; if (!audio && !midi0 && !midi1) return IRQ_NONE; hdsp_write(hdsp, HDSP_interruptConfirmation, 0); midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff; midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff; if (!(hdsp->state & HDSP_InitializationComplete)) return IRQ_HANDLED; if (audio) { if (hdsp->capture_substream) snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream); if (hdsp->playback_substream) snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream); } if (midi0 && midi0status) { if (hdsp->use_midi_tasklet) { /* we disable interrupts for this input until processing is done */ hdsp->control_register &= ~HDSP_Midi0InterruptEnable; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); hdsp->midi[0].pending = 1; schedule = 1; } else { snd_hdsp_midi_input_read (&hdsp->midi[0]); } } if (hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632 && midi1 && midi1status) { if (hdsp->use_midi_tasklet) { /* we disable interrupts for this input until processing is done */ hdsp->control_register &= ~HDSP_Midi1InterruptEnable; hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register); hdsp->midi[1].pending = 1; schedule = 1; } else { snd_hdsp_midi_input_read (&hdsp->midi[1]); } } if (hdsp->use_midi_tasklet && schedule) tasklet_schedule(&hdsp->midi_tasklet); return IRQ_HANDLED; } static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); return hdsp_hw_pointer(hdsp); } static char *hdsp_channel_buffer_location(struct hdsp *hdsp, int stream, int channel) { int mapped_channel; if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels)) return NULL; if ((mapped_channel = hdsp->channel_map[channel]) < 0) return NULL; if (stream == SNDRV_PCM_STREAM_CAPTURE) return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES); else return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES); } static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel, snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); char *channel_buf; if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4)) return -EINVAL; channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel); if (snd_BUG_ON(!channel_buf)) return -EIO; if (copy_from_user(channel_buf + pos * 4, src, count * 4)) return -EFAULT; return count; } static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel, snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); char *channel_buf; if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4)) return -EINVAL; channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel); if (snd_BUG_ON(!channel_buf)) return -EIO; if (copy_to_user(dst, channel_buf + pos * 4, count * 4)) return -EFAULT; return count; } static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel, snd_pcm_uframes_t pos, snd_pcm_uframes_t count) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); char *channel_buf; channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel); if (snd_BUG_ON(!channel_buf)) return -EIO; memset(channel_buf + pos * 4, 0, count * 4); return count; } static int snd_hdsp_reset(struct snd_pcm_substream *substream) { struct snd_pcm_runtime *runtime = substream->runtime; struct hdsp *hdsp = snd_pcm_substream_chip(substream); struct snd_pcm_substream *other; if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) other = hdsp->capture_substream; else other = hdsp->playback_substream; if (hdsp->running) runtime->status->hw_ptr = hdsp_hw_pointer(hdsp); else runtime->status->hw_ptr = 0; if (other) { struct snd_pcm_substream *s; struct snd_pcm_runtime *oruntime = other->runtime; snd_pcm_group_for_each_entry(s, substream) { if (s == other) { oruntime->status->hw_ptr = runtime->status->hw_ptr; break; } } } return 0; } static int snd_hdsp_hw_params(struct snd_pcm_substream *substream, struct snd_pcm_hw_params *params) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); int err; pid_t this_pid; pid_t other_pid; if (hdsp_check_for_iobox (hdsp)) return -EIO; if (hdsp_check_for_firmware(hdsp, 1)) return -EIO; spin_lock_irq(&hdsp->lock); if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) { hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis); hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream); this_pid = hdsp->playback_pid; other_pid = hdsp->capture_pid; } else { this_pid = hdsp->capture_pid; other_pid = hdsp->playback_pid; } if ((other_pid > 0) && (this_pid != other_pid)) { /* The other stream is open, and not by the same task as this one. Make sure that the parameters that matter are the same. */ if (params_rate(params) != hdsp->system_sample_rate) { spin_unlock_irq(&hdsp->lock); _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); return -EBUSY; } if (params_period_size(params) != hdsp->period_bytes / 4) { spin_unlock_irq(&hdsp->lock); _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); return -EBUSY; } /* We're fine. */ spin_unlock_irq(&hdsp->lock); return 0; } else { spin_unlock_irq(&hdsp->lock); } /* how to make sure that the rate matches an externally-set one ? */ spin_lock_irq(&hdsp->lock); if (! hdsp->clock_source_locked) { if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) { spin_unlock_irq(&hdsp->lock); _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE); return err; } } spin_unlock_irq(&hdsp->lock); if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) { _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE); return err; } return 0; } static int snd_hdsp_channel_info(struct snd_pcm_substream *substream, struct snd_pcm_channel_info *info) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); int mapped_channel; if (snd_BUG_ON(info->channel >= hdsp->max_channels)) return -EINVAL; if ((mapped_channel = hdsp->channel_map[info->channel]) < 0) return -EINVAL; info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES; info->first = 0; info->step = 32; return 0; } static int snd_hdsp_ioctl(struct snd_pcm_substream *substream, unsigned int cmd, void *arg) { switch (cmd) { case SNDRV_PCM_IOCTL1_RESET: return snd_hdsp_reset(substream); case SNDRV_PCM_IOCTL1_CHANNEL_INFO: return snd_hdsp_channel_info(substream, arg); default: break; } return snd_pcm_lib_ioctl(substream, cmd, arg); } static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); struct snd_pcm_substream *other; int running; if (hdsp_check_for_iobox (hdsp)) return -EIO; if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */ return -EIO; spin_lock(&hdsp->lock); running = hdsp->running; switch (cmd) { case SNDRV_PCM_TRIGGER_START: running |= 1 << substream->stream; break; case SNDRV_PCM_TRIGGER_STOP: running &= ~(1 << substream->stream); break; default: snd_BUG(); spin_unlock(&hdsp->lock); return -EINVAL; } if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) other = hdsp->capture_substream; else other = hdsp->playback_substream; if (other) { struct snd_pcm_substream *s; snd_pcm_group_for_each_entry(s, substream) { if (s == other) { snd_pcm_trigger_done(s, substream); if (cmd == SNDRV_PCM_TRIGGER_START) running |= 1 << s->stream; else running &= ~(1 << s->stream); goto _ok; } } if (cmd == SNDRV_PCM_TRIGGER_START) { if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) && substream->stream == SNDRV_PCM_STREAM_CAPTURE) hdsp_silence_playback(hdsp); } else { if (running && substream->stream == SNDRV_PCM_STREAM_PLAYBACK) hdsp_silence_playback(hdsp); } } else { if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) hdsp_silence_playback(hdsp); } _ok: snd_pcm_trigger_done(substream, substream); if (!hdsp->running && running) hdsp_start_audio(hdsp); else if (hdsp->running && !running) hdsp_stop_audio(hdsp); hdsp->running = running; spin_unlock(&hdsp->lock); return 0; } static int snd_hdsp_prepare(struct snd_pcm_substream *substream) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); int result = 0; if (hdsp_check_for_iobox (hdsp)) return -EIO; if (hdsp_check_for_firmware(hdsp, 1)) return -EIO; spin_lock_irq(&hdsp->lock); if (!hdsp->running) hdsp_reset_hw_pointer(hdsp); spin_unlock_irq(&hdsp->lock); return result; } static struct snd_pcm_hardware snd_hdsp_playback_subinfo = { .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_NONINTERLEAVED | SNDRV_PCM_INFO_SYNC_START | SNDRV_PCM_INFO_DOUBLE), #ifdef SNDRV_BIG_ENDIAN .formats = SNDRV_PCM_FMTBIT_S32_BE, #else .formats = SNDRV_PCM_FMTBIT_S32_LE, #endif .rates = (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000), .rate_min = 32000, .rate_max = 96000, .channels_min = 6, .channels_max = HDSP_MAX_CHANNELS, .buffer_bytes_max = HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS, .period_bytes_min = (64 * 4) * 10, .period_bytes_max = (8192 * 4) * HDSP_MAX_CHANNELS, .periods_min = 2, .periods_max = 2, .fifo_size = 0 }; static struct snd_pcm_hardware snd_hdsp_capture_subinfo = { .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_NONINTERLEAVED | SNDRV_PCM_INFO_SYNC_START), #ifdef SNDRV_BIG_ENDIAN .formats = SNDRV_PCM_FMTBIT_S32_BE, #else .formats = SNDRV_PCM_FMTBIT_S32_LE, #endif .rates = (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000), .rate_min = 32000, .rate_max = 96000, .channels_min = 5, .channels_max = HDSP_MAX_CHANNELS, .buffer_bytes_max = HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS, .period_bytes_min = (64 * 4) * 10, .period_bytes_max = (8192 * 4) * HDSP_MAX_CHANNELS, .periods_min = 2, .periods_max = 2, .fifo_size = 0 }; static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 }; static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = { .count = ARRAY_SIZE(hdsp_period_sizes), .list = hdsp_period_sizes, .mask = 0 }; static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 }; static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = { .count = ARRAY_SIZE(hdsp_9632_sample_rates), .list = hdsp_9632_sample_rates, .mask = 0 }; static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule) { struct hdsp *hdsp = rule->private; struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); if (hdsp->io_type == H9632) { unsigned int list[3]; list[0] = hdsp->qs_in_channels; list[1] = hdsp->ds_in_channels; list[2] = hdsp->ss_in_channels; return snd_interval_list(c, 3, list, 0); } else { unsigned int list[2]; list[0] = hdsp->ds_in_channels; list[1] = hdsp->ss_in_channels; return snd_interval_list(c, 2, list, 0); } } static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule) { unsigned int list[3]; struct hdsp *hdsp = rule->private; struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); if (hdsp->io_type == H9632) { list[0] = hdsp->qs_out_channels; list[1] = hdsp->ds_out_channels; list[2] = hdsp->ss_out_channels; return snd_interval_list(c, 3, list, 0); } else { list[0] = hdsp->ds_out_channels; list[1] = hdsp->ss_out_channels; } return snd_interval_list(c, 2, list, 0); } static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule) { struct hdsp *hdsp = rule->private; struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); if (r->min > 96000 && hdsp->io_type == H9632) { struct snd_interval t = { .min = hdsp->qs_in_channels, .max = hdsp->qs_in_channels, .integer = 1, }; return snd_interval_refine(c, &t); } else if (r->min > 48000 && r->max <= 96000) { struct snd_interval t = { .min = hdsp->ds_in_channels, .max = hdsp->ds_in_channels, .integer = 1, }; return snd_interval_refine(c, &t); } else if (r->max < 64000) { struct snd_interval t = { .min = hdsp->ss_in_channels, .max = hdsp->ss_in_channels, .integer = 1, }; return snd_interval_refine(c, &t); } return 0; } static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule) { struct hdsp *hdsp = rule->private; struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); if (r->min > 96000 && hdsp->io_type == H9632) { struct snd_interval t = { .min = hdsp->qs_out_channels, .max = hdsp->qs_out_channels, .integer = 1, }; return snd_interval_refine(c, &t); } else if (r->min > 48000 && r->max <= 96000) { struct snd_interval t = { .min = hdsp->ds_out_channels, .max = hdsp->ds_out_channels, .integer = 1, }; return snd_interval_refine(c, &t); } else if (r->max < 64000) { struct snd_interval t = { .min = hdsp->ss_out_channels, .max = hdsp->ss_out_channels, .integer = 1, }; return snd_interval_refine(c, &t); } return 0; } static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule) { struct hdsp *hdsp = rule->private; struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); if (c->min >= hdsp->ss_out_channels) { struct snd_interval t = { .min = 32000, .max = 48000, .integer = 1, }; return snd_interval_refine(r, &t); } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) { struct snd_interval t = { .min = 128000, .max = 192000, .integer = 1, }; return snd_interval_refine(r, &t); } else if (c->max <= hdsp->ds_out_channels) { struct snd_interval t = { .min = 64000, .max = 96000, .integer = 1, }; return snd_interval_refine(r, &t); } return 0; } static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params, struct snd_pcm_hw_rule *rule) { struct hdsp *hdsp = rule->private; struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS); struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE); if (c->min >= hdsp->ss_in_channels) { struct snd_interval t = { .min = 32000, .max = 48000, .integer = 1, }; return snd_interval_refine(r, &t); } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) { struct snd_interval t = { .min = 128000, .max = 192000, .integer = 1, }; return snd_interval_refine(r, &t); } else if (c->max <= hdsp->ds_in_channels) { struct snd_interval t = { .min = 64000, .max = 96000, .integer = 1, }; return snd_interval_refine(r, &t); } return 0; } static int snd_hdsp_playback_open(struct snd_pcm_substream *substream) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); struct snd_pcm_runtime *runtime = substream->runtime; if (hdsp_check_for_iobox (hdsp)) return -EIO; if (hdsp_check_for_firmware(hdsp, 1)) return -EIO; spin_lock_irq(&hdsp->lock); snd_pcm_set_sync(substream); runtime->hw = snd_hdsp_playback_subinfo; runtime->dma_area = hdsp->playback_buffer; runtime->dma_bytes = HDSP_DMA_AREA_BYTES; hdsp->playback_pid = current->pid; hdsp->playback_substream = substream; spin_unlock_irq(&hdsp->lock); snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes); if (hdsp->clock_source_locked) { runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate; } else if (hdsp->io_type == H9632) { runtime->hw.rate_max = 192000; runtime->hw.rates = SNDRV_PCM_RATE_KNOT; snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates); } if (hdsp->io_type == H9632) { runtime->hw.channels_min = hdsp->qs_out_channels; runtime->hw.channels_max = hdsp->ss_out_channels; } snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, snd_hdsp_hw_rule_out_channels, hdsp, SNDRV_PCM_HW_PARAM_CHANNELS, -1); snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, snd_hdsp_hw_rule_out_channels_rate, hdsp, SNDRV_PCM_HW_PARAM_RATE, -1); snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, snd_hdsp_hw_rule_rate_out_channels, hdsp, SNDRV_PCM_HW_PARAM_CHANNELS, -1); if (RPM != hdsp->io_type) { hdsp->creg_spdif_stream = hdsp->creg_spdif; hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE; snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id); } return 0; } static int snd_hdsp_playback_release(struct snd_pcm_substream *substream) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); spin_lock_irq(&hdsp->lock); hdsp->playback_pid = -1; hdsp->playback_substream = NULL; spin_unlock_irq(&hdsp->lock); if (RPM != hdsp->io_type) { hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE; snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id); } return 0; } static int snd_hdsp_capture_open(struct snd_pcm_substream *substream) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); struct snd_pcm_runtime *runtime = substream->runtime; if (hdsp_check_for_iobox (hdsp)) return -EIO; if (hdsp_check_for_firmware(hdsp, 1)) return -EIO; spin_lock_irq(&hdsp->lock); snd_pcm_set_sync(substream); runtime->hw = snd_hdsp_capture_subinfo; runtime->dma_area = hdsp->capture_buffer; runtime->dma_bytes = HDSP_DMA_AREA_BYTES; hdsp->capture_pid = current->pid; hdsp->capture_substream = substream; spin_unlock_irq(&hdsp->lock); snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes); if (hdsp->io_type == H9632) { runtime->hw.channels_min = hdsp->qs_in_channels; runtime->hw.channels_max = hdsp->ss_in_channels; runtime->hw.rate_max = 192000; runtime->hw.rates = SNDRV_PCM_RATE_KNOT; snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates); } snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, snd_hdsp_hw_rule_in_channels, hdsp, SNDRV_PCM_HW_PARAM_CHANNELS, -1); snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, snd_hdsp_hw_rule_in_channels_rate, hdsp, SNDRV_PCM_HW_PARAM_RATE, -1); snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, snd_hdsp_hw_rule_rate_in_channels, hdsp, SNDRV_PCM_HW_PARAM_CHANNELS, -1); return 0; } static int snd_hdsp_capture_release(struct snd_pcm_substream *substream) { struct hdsp *hdsp = snd_pcm_substream_chip(substream); spin_lock_irq(&hdsp->lock); hdsp->capture_pid = -1; hdsp->capture_substream = NULL; spin_unlock_irq(&hdsp->lock); return 0; } /* helper functions for copying meter values */ static inline int copy_u32_le(void __user *dest, void __iomem *src) { u32 val = readl(src); return copy_to_user(dest, &val, 4); } static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high) { u32 rms_low, rms_high; u64 rms; rms_low = readl(src_low); rms_high = readl(src_high); rms = ((u64)rms_high << 32) | rms_low; return copy_to_user(dest, &rms, 8); } static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high) { u32 rms_low, rms_high; u64 rms; rms_low = readl(src_low) & 0xffffff00; rms_high = readl(src_high) & 0xffffff00; rms = ((u64)rms_high << 32) | rms_low; return copy_to_user(dest, &rms, 8); } static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms) { int doublespeed = 0; int i, j, channels, ofs; if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus) doublespeed = 1; channels = doublespeed ? 14 : 26; for (i = 0, j = 0; i < 26; ++i) { if (doublespeed && (i & 4)) continue; ofs = HDSP_9652_peakBase - j * 4; if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs)) return -EFAULT; ofs -= channels * 4; if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs)) return -EFAULT; ofs -= channels * 4; if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs)) return -EFAULT; ofs = HDSP_9652_rmsBase + j * 8; if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs, hdsp->iobase + ofs + 4)) return -EFAULT; ofs += channels * 8; if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs, hdsp->iobase + ofs + 4)) return -EFAULT; ofs += channels * 8; if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs, hdsp->iobase + ofs + 4)) return -EFAULT; j++; } return 0; } static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms) { int i, j; struct hdsp_9632_meters __iomem *m; int doublespeed = 0; if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus) doublespeed = 1; m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase); for (i = 0, j = 0; i < 16; ++i, ++j) { if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j])) return -EFAULT; if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j])) return -EFAULT; if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j])) return -EFAULT; if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j], &m->input_rms_high[j])) return -EFAULT; if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j], &m->playback_rms_high[j])) return -EFAULT; if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j], &m->output_rms_high[j])) return -EFAULT; if (doublespeed && i == 3) i += 4; } return 0; } static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms) { int i; for (i = 0; i < 26; i++) { if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + HDSP_playbackPeakLevel + i * 4)) return -EFAULT; if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + HDSP_inputPeakLevel + i * 4)) return -EFAULT; } for (i = 0; i < 28; i++) { if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + HDSP_outputPeakLevel + i * 4)) return -EFAULT; } for (i = 0; i < 26; ++i) { if (copy_u64_le(&peak_rms->playback_rms[i], hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4, hdsp->iobase + HDSP_playbackRmsLevel + i * 8)) return -EFAULT; if (copy_u64_le(&peak_rms->input_rms[i], hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4, hdsp->iobase + HDSP_inputRmsLevel + i * 8)) return -EFAULT; } return 0; } static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg) { struct hdsp *hdsp = hw->private_data; void __user *argp = (void __user *)arg; int err; switch (cmd) { case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: { struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg; err = hdsp_check_for_iobox(hdsp); if (err < 0) return err; err = hdsp_check_for_firmware(hdsp, 1); if (err < 0) return err; if (!(hdsp->state & HDSP_FirmwareLoaded)) { snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n"); return -EINVAL; } switch (hdsp->io_type) { case H9652: return hdsp_9652_get_peak(hdsp, peak_rms); case H9632: return hdsp_9632_get_peak(hdsp, peak_rms); default: return hdsp_get_peak(hdsp, peak_rms); } } case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: { struct hdsp_config_info info; unsigned long flags; int i; err = hdsp_check_for_iobox(hdsp); if (err < 0) return err; err = hdsp_check_for_firmware(hdsp, 1); if (err < 0) return err; memset(&info, 0, sizeof(info)); spin_lock_irqsave(&hdsp->lock, flags); info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp); info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp); if (hdsp->io_type != H9632) info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp); info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp); for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632) ? 3 : 1); ++i) info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i); info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp); info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp); info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp); info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp); info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp); info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp); info.system_sample_rate = hdsp->system_sample_rate; info.autosync_sample_rate = hdsp_external_sample_rate(hdsp); info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp); info.clock_source = (unsigned char)hdsp_clock_source(hdsp); info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp); info.line_out = (unsigned char)hdsp_line_out(hdsp); if (hdsp->io_type == H9632) { info.da_gain = (unsigned char)hdsp_da_gain(hdsp); info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp); info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp); info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp); } else if (hdsp->io_type == RPM) { info.da_gain = (unsigned char) hdsp_rpm_input12(hdsp); info.ad_gain = (unsigned char) hdsp_rpm_input34(hdsp); } if (hdsp->io_type == H9632 || hdsp->io_type == H9652) info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp); spin_unlock_irqrestore(&hdsp->lock, flags); if (copy_to_user(argp, &info, sizeof(info))) return -EFAULT; break; } case SNDRV_HDSP_IOCTL_GET_9632_AEB: { struct hdsp_9632_aeb h9632_aeb; if (hdsp->io_type != H9632) return -EINVAL; h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS; h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS; if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb))) return -EFAULT; break; } case SNDRV_HDSP_IOCTL_GET_VERSION: { struct hdsp_version hdsp_version; int err; if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL; if (hdsp->io_type == Undefined) { if ((err = hdsp_get_iobox_version(hdsp)) < 0) return err; } hdsp_version.io_type = hdsp->io_type; hdsp_version.firmware_rev = hdsp->firmware_rev; if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version)))) return -EFAULT; break; } case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: { struct hdsp_firmware __user *firmware; u32 __user *firmware_data; int err; if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL; /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */ if (hdsp->io_type == Undefined) return -EINVAL; if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded)) return -EBUSY; snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n"); firmware = (struct hdsp_firmware __user *)argp; if (get_user(firmware_data, &firmware->firmware_data)) return -EFAULT; if (hdsp_check_for_iobox (hdsp)) return -EIO; if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0) return -EFAULT; hdsp->state |= HDSP_FirmwareCached; if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0) return err; if (!(hdsp->state & HDSP_InitializationComplete)) { if ((err = snd_hdsp_enable_io(hdsp)) < 0) return err; snd_hdsp_initialize_channels(hdsp); snd_hdsp_initialize_midi_flush(hdsp); if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n"); return err; } } break; } case SNDRV_HDSP_IOCTL_GET_MIXER: { struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp; if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE)) return -EFAULT; break; } default: return -EINVAL; } return 0; } static struct snd_pcm_ops snd_hdsp_playback_ops = { .open = snd_hdsp_playback_open, .close = snd_hdsp_playback_release, .ioctl = snd_hdsp_ioctl, .hw_params = snd_hdsp_hw_params, .prepare = snd_hdsp_prepare, .trigger = snd_hdsp_trigger, .pointer = snd_hdsp_hw_pointer, .copy = snd_hdsp_playback_copy, .silence = snd_hdsp_hw_silence, }; static struct snd_pcm_ops snd_hdsp_capture_ops = { .open = snd_hdsp_capture_open, .close = snd_hdsp_capture_release, .ioctl = snd_hdsp_ioctl, .hw_params = snd_hdsp_hw_params, .prepare = snd_hdsp_prepare, .trigger = snd_hdsp_trigger, .pointer = snd_hdsp_hw_pointer, .copy = snd_hdsp_capture_copy, }; static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp) { struct snd_hwdep *hw; int err; if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0) return err; hdsp->hwdep = hw; hw->private_data = hdsp; strcpy(hw->name, "HDSP hwdep interface"); hw->ops.ioctl = snd_hdsp_hwdep_ioctl; return 0; } static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp) { struct snd_pcm *pcm; int err; if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0) return err; hdsp->pcm = pcm; pcm->private_data = hdsp; strcpy(pcm->name, hdsp->card_name); snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops); snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops); pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX; return 0; } static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp) { hdsp->control2_register |= HDSP_9652_ENABLE_MIXER; hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register); } static int snd_hdsp_enable_io (struct hdsp *hdsp) { int i; if (hdsp_fifo_wait (hdsp, 0, 100)) { snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n"); return -EIO; } for (i = 0; i < hdsp->max_channels; ++i) { hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1); hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1); } return 0; } static void snd_hdsp_initialize_channels(struct hdsp *hdsp) { int status, aebi_channels, aebo_channels; switch (hdsp->io_type) { case Digiface: hdsp->card_name = "RME Hammerfall DSP + Digiface"; hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS; hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS; break; case H9652: hdsp->card_name = "RME Hammerfall HDSP 9652"; hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS; hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS; break; case H9632: status = hdsp_read(hdsp, HDSP_statusRegister); /* HDSP_AEBx bits are low when AEB are connected */ aebi_channels = (status & HDSP_AEBI) ? 0 : 4; aebo_channels = (status & HDSP_AEBO) ? 0 : 4; hdsp->card_name = "RME Hammerfall HDSP 9632"; hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels; hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels; hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels; hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels; hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels; hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels; break; case Multiface: hdsp->card_name = "RME Hammerfall DSP + Multiface"; hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS; hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS; break; case RPM: hdsp->card_name = "RME Hammerfall DSP + RPM"; hdsp->ss_in_channels = RPM_CHANNELS-1; hdsp->ss_out_channels = RPM_CHANNELS; hdsp->ds_in_channels = RPM_CHANNELS-1; hdsp->ds_out_channels = RPM_CHANNELS; break; default: /* should never get here */ break; } } static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp) { snd_hdsp_flush_midi_input (hdsp, 0); snd_hdsp_flush_midi_input (hdsp, 1); } static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp) { int err; if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n"); return err; } if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n"); return err; } if (hdsp->io_type == Digiface || hdsp->io_type == H9652) { if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n"); return err; } } if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n"); return err; } snd_hdsp_proc_init(hdsp); hdsp->system_sample_rate = -1; hdsp->playback_pid = -1; hdsp->capture_pid = -1; hdsp->capture_substream = NULL; hdsp->playback_substream = NULL; if ((err = snd_hdsp_set_defaults(hdsp)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n"); return err; } if (!(hdsp->state & HDSP_InitializationComplete)) { strcpy(card->shortname, "Hammerfall DSP"); sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name, hdsp->port, hdsp->irq); if ((err = snd_card_register(card)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n"); return err; } hdsp->state |= HDSP_InitializationComplete; } return 0; } #ifdef HDSP_FW_LOADER /* load firmware via hotplug fw loader */ static int hdsp_request_fw_loader(struct hdsp *hdsp) { const char *fwfile; const struct firmware *fw; int err; if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0; if (hdsp->io_type == Undefined) { if ((err = hdsp_get_iobox_version(hdsp)) < 0) return err; if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0; } /* caution: max length of firmware filename is 30! */ switch (hdsp->io_type) { case RPM: fwfile = "rpm_firmware.bin"; break; case Multiface: if (hdsp->firmware_rev == 0xa) fwfile = "multiface_firmware.bin"; else fwfile = "multiface_firmware_rev11.bin"; break; case Digiface: if (hdsp->firmware_rev == 0xa) fwfile = "digiface_firmware.bin"; else fwfile = "digiface_firmware_rev11.bin"; break; default: snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type); return -EINVAL; } if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) { snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile); return -ENOENT; } if (fw->size < sizeof(hdsp->firmware_cache)) { snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n", (int)fw->size, (int)sizeof(hdsp->firmware_cache)); release_firmware(fw); return -EINVAL; } memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache)); release_firmware(fw); hdsp->state |= HDSP_FirmwareCached; if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0) return err; if (!(hdsp->state & HDSP_InitializationComplete)) { if ((err = snd_hdsp_enable_io(hdsp)) < 0) return err; if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n"); return err; } snd_hdsp_initialize_channels(hdsp); snd_hdsp_initialize_midi_flush(hdsp); if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) { snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n"); return err; } } return 0; } #endif static int __devinit snd_hdsp_create(struct snd_card *card, struct hdsp *hdsp) { struct pci_dev *pci = hdsp->pci; int err; int is_9652 = 0; int is_9632 = 0; hdsp->irq = -1; hdsp->state = 0; hdsp->midi[0].rmidi = NULL; hdsp->midi[1].rmidi = NULL; hdsp->midi[0].input = NULL; hdsp->midi[1].input = NULL; hdsp->midi[0].output = NULL; hdsp->midi[1].output = NULL; hdsp->midi[0].pending = 0; hdsp->midi[1].pending = 0; spin_lock_init(&hdsp->midi[0].lock); spin_lock_init(&hdsp->midi[1].lock); hdsp->iobase = NULL; hdsp->control_register = 0; hdsp->control2_register = 0; hdsp->io_type = Undefined; hdsp->max_channels = 26; hdsp->card = card; spin_lock_init(&hdsp->lock); tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp); pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev); hdsp->firmware_rev &= 0xff; /* From Martin Bjoernsen : "It is important that the card's latency timer register in the PCI configuration space is set to a value much larger than 0 by the computer's BIOS or the driver. The windows driver always sets this 8 bit register [...] to its maximum 255 to avoid problems with some computers." */ pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF); strcpy(card->driver, "H-DSP"); strcpy(card->mixername, "Xilinx FPGA"); if (hdsp->firmware_rev < 0xa) return -ENODEV; else if (hdsp->firmware_rev < 0x64) hdsp->card_name = "RME Hammerfall DSP"; else if (hdsp->firmware_rev < 0x96) { hdsp->card_name = "RME HDSP 9652"; is_9652 = 1; } else { hdsp->card_name = "RME HDSP 9632"; hdsp->max_channels = 16; is_9632 = 1; } if ((err = pci_enable_device(pci)) < 0) return err; pci_set_master(hdsp->pci); if ((err = pci_request_regions(pci, "hdsp")) < 0) return err; hdsp->port = pci_resource_start(pci, 0); if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) { snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1); return -EBUSY; } if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED, "hdsp", hdsp)) { snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq); return -EBUSY; } hdsp->irq = pci->irq; hdsp->precise_ptr = 0; hdsp->use_midi_tasklet = 1; hdsp->dds_value = 0; if ((err = snd_hdsp_initialize_memory(hdsp)) < 0) return err; if (!is_9652 && !is_9632) { /* we wait a maximum of 10 seconds to let freshly * inserted cardbus cards do their hardware init */ err = hdsp_wait_for_iobox(hdsp, 1000, 10); if (err < 0) return err; if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) { #ifdef HDSP_FW_LOADER if ((err = hdsp_request_fw_loader(hdsp)) < 0) /* we don't fail as this can happen if userspace is not ready for firmware upload */ snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n"); else /* init is complete, we return */ return 0; #endif /* we defer initialization */ snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n"); if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0) return err; return 0; } else { snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n"); if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2) hdsp->io_type = RPM; else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1) hdsp->io_type = Multiface; else hdsp->io_type = Digiface; } } if ((err = snd_hdsp_enable_io(hdsp)) != 0) return err; if (is_9652) hdsp->io_type = H9652; if (is_9632) hdsp->io_type = H9632; if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0) return err; snd_hdsp_initialize_channels(hdsp); snd_hdsp_initialize_midi_flush(hdsp); hdsp->state |= HDSP_FirmwareLoaded; if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0) return err; return 0; } static int snd_hdsp_free(struct hdsp *hdsp) { if (hdsp->port) { /* stop the audio, and cancel all interrupts */ tasklet_kill(&hdsp->midi_tasklet); hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable); hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register); } if (hdsp->irq >= 0) free_irq(hdsp->irq, (void *)hdsp); snd_hdsp_free_buffers(hdsp); if (hdsp->iobase) iounmap(hdsp->iobase); if (hdsp->port) pci_release_regions(hdsp->pci); pci_disable_device(hdsp->pci); return 0; } static void snd_hdsp_card_free(struct snd_card *card) { struct hdsp *hdsp = card->private_data; if (hdsp) snd_hdsp_free(hdsp); } static int __devinit snd_hdsp_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) { static int dev; struct hdsp *hdsp; struct snd_card *card; int err; if (dev >= SNDRV_CARDS) return -ENODEV; if (!enable[dev]) { dev++; return -ENOENT; } err = snd_card_create(index[dev], id[dev], THIS_MODULE, sizeof(struct hdsp), &card); if (err < 0) return err; hdsp = card->private_data; card->private_free = snd_hdsp_card_free; hdsp->dev = dev; hdsp->pci = pci; snd_card_set_dev(card, &pci->dev); if ((err = snd_hdsp_create(card, hdsp)) < 0) { snd_card_free(card); return err; } strcpy(card->shortname, "Hammerfall DSP"); sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name, hdsp->port, hdsp->irq); if ((err = snd_card_register(card)) < 0) { snd_card_free(card); return err; } pci_set_drvdata(pci, card); dev++; return 0; } static void __devexit snd_hdsp_remove(struct pci_dev *pci) { snd_card_free(pci_get_drvdata(pci)); pci_set_drvdata(pci, NULL); } static struct pci_driver driver = { .name = "RME Hammerfall DSP", .id_table = snd_hdsp_ids, .probe = snd_hdsp_probe, .remove = __devexit_p(snd_hdsp_remove), }; static int __init alsa_card_hdsp_init(void) { return pci_register_driver(&driver); } static void __exit alsa_card_hdsp_exit(void) { pci_unregister_driver(&driver); } module_init(alsa_card_hdsp_init) module_exit(alsa_card_hdsp_exit)