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/* ------------------------------------------------------------------------- */
/* i2c-algo-sibyte.c i2c driver algorithms for bit-shift adapters		     */
/* ------------------------------------------------------------------------- */
/*   Copyright (C) 2001,2002,2003 Broadcom Corporation
     Copyright (C) 1995-2000 Simon G. Vogl

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.		     */
/* ------------------------------------------------------------------------- */

/* With some changes from Kyösti Mälkki <kmalkki@cc.hut.fi> and even
   Frodo Looijaard <frodol@dds.nl>.  */

/* Ported for SiByte SOCs by Broadcom Corporation.  */

#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>

#include <asm/io.h>
#include <asm/sibyte/sb1250_regs.h>
#include <asm/sibyte/sb1250_smbus.h>

#include <linux/i2c.h>
#include <linux/i2c-algo-sibyte.h>

/* ----- global defines ----------------------------------------------- */
#define SMB_CSR(a,r) ((long)(a->reg_base + r))

/* ----- global variables ---------------------------------------------	*/

/* module parameters:
 */
static int bit_scan=0;	/* have a look at what's hanging 'round		*/


static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr, 
                      unsigned short flags, char read_write,
                      u8 command, int size, union i2c_smbus_data * data)
{
	struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data;
        int data_bytes = 0;
        int error;

        while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
                ;

        switch (size) {
        case I2C_SMBUS_QUICK:
                csr_out32((V_SMB_ADDR(addr) | (read_write == I2C_SMBUS_READ ? M_SMB_QDATA : 0) |
			   V_SMB_TT_QUICKCMD), SMB_CSR(adap, R_SMB_START));
                break;
        case I2C_SMBUS_BYTE:
                if (read_write == I2C_SMBUS_READ) {
                        csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_RD1BYTE),
				  SMB_CSR(adap, R_SMB_START));
                        data_bytes = 1;
                } else {
                        csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
                        csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR1BYTE),
				  SMB_CSR(adap, R_SMB_START));
                }
                break;
        case I2C_SMBUS_BYTE_DATA:
                csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
                if (read_write == I2C_SMBUS_READ) {
                        csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD1BYTE),
				  SMB_CSR(adap, R_SMB_START));
                        data_bytes = 1;
                } else {
                        csr_out32(V_SMB_LB(data->byte), SMB_CSR(adap, R_SMB_DATA));
                        csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE),
				  SMB_CSR(adap, R_SMB_START));
                }
                break;
        case I2C_SMBUS_WORD_DATA:
                csr_out32(V_SMB_CMD(command), SMB_CSR(adap, R_SMB_CMD));
                if (read_write == I2C_SMBUS_READ) {
                        csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_CMD_RD2BYTE),
				  SMB_CSR(adap, R_SMB_START));
                        data_bytes = 2;
                } else {
                        csr_out32(V_SMB_LB(data->word & 0xff), SMB_CSR(adap, R_SMB_DATA));
                        csr_out32(V_SMB_MB(data->word >> 8), SMB_CSR(adap, R_SMB_DATA));
                        csr_out32((V_SMB_ADDR(addr) | V_SMB_TT_WR2BYTE),
				  SMB_CSR(adap, R_SMB_START));
                }
                break;
        default:
                return -1;      /* XXXKW better error code? */
        }

        while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
                ;

        error = csr_in32(SMB_CSR(adap, R_SMB_STATUS));
        if (error & M_SMB_ERROR) {
                /* Clear error bit by writing a 1 */
                csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS));
                return -1;      /* XXXKW better error code? */
        }

        if (data_bytes == 1)
                data->byte = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xff;
        if (data_bytes == 2)
                data->word = csr_in32(SMB_CSR(adap, R_SMB_DATA)) & 0xffff;

        return 0;
}

static int algo_control(struct i2c_adapter *adapter, 
	unsigned int cmd, unsigned long arg)
{
	return 0;
}

static u32 bit_func(struct i2c_adapter *adap)
{
	return (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA);
}


/* -----exported algorithm data: -------------------------------------	*/

static struct i2c_algorithm i2c_sibyte_algo = {
	.name		= "SiByte algorithm",
	.id		= I2C_ALGO_SIBYTE,
	.smbus_xfer	= smbus_xfer,
	.algo_control	= algo_control, /* ioctl */
	.functionality	= bit_func,
};

/* 
 * registering functions to load algorithms at runtime 
 */
int i2c_sibyte_add_bus(struct i2c_adapter *i2c_adap, int speed)
{
	int i;
	struct i2c_algo_sibyte_data *adap = i2c_adap->algo_data;

	/* register new adapter to i2c module... */

	i2c_adap->id |= i2c_sibyte_algo.id;
	i2c_adap->algo = &i2c_sibyte_algo;
        
        /* Set the frequency to 100 kHz */
        csr_out32(speed, SMB_CSR(adap,R_SMB_FREQ));
        csr_out32(0, SMB_CSR(adap,R_SMB_CONTROL));

	/* scan bus */
	if (bit_scan) {
                union i2c_smbus_data data;
                int rc;
		printk(KERN_INFO " i2c-algo-sibyte.o: scanning bus %s.\n",
		       i2c_adap->name);
		for (i = 0x00; i < 0x7f; i++) {
                        /* XXXKW is this a realistic probe? */
                        rc = smbus_xfer(i2c_adap, i, 0, I2C_SMBUS_READ, 0,
                                        I2C_SMBUS_BYTE_DATA, &data);
			if (!rc) {
				printk("(%02x)",i); 
			} else 
				printk("."); 
		}
		printk("\n");
	}

	i2c_add_adapter(i2c_adap);

	return 0;
}


int i2c_sibyte_del_bus(struct i2c_adapter *adap)
{
	int res;

	if ((res = i2c_del_adapter(adap)) < 0)
		return res;

	return 0;
}

int __init i2c_algo_sibyte_init (void)
{
	printk("i2c-algo-sibyte.o: i2c SiByte algorithm module\n");
	return 0;
}


EXPORT_SYMBOL(i2c_sibyte_add_bus);
EXPORT_SYMBOL(i2c_sibyte_del_bus);

#ifdef MODULE
MODULE_AUTHOR("Kip Walker, Broadcom Corp.");
MODULE_DESCRIPTION("SiByte I2C-Bus algorithm");
MODULE_PARM(bit_scan, "i");
MODULE_PARM_DESC(bit_scan, "Scan for active chips on the bus");
MODULE_LICENSE("GPL");

int init_module(void) 
{
	return i2c_algo_sibyte_init();
}

void cleanup_module(void) 
{
}
#endif
class="hl opt">= bcma_erom_get_ent(bus, eromptr); bcma_erom_push_ent(eromptr); return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID)); } static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr) { u32 ent = bcma_erom_get_ent(bus, eromptr); bcma_erom_push_ent(eromptr); return (((ent & SCAN_ER_VALID)) && ((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) && ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE)); } static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr) { u32 ent; while (1) { ent = bcma_erom_get_ent(bus, eromptr); if ((ent & SCAN_ER_VALID) && ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI)) break; if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID)) break; } bcma_erom_push_ent(eromptr); } static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr) { u32 ent = bcma_erom_get_ent(bus, eromptr); if (!(ent & SCAN_ER_VALID)) return -ENOENT; if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP) return -ENOENT; return ent; } static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr, u32 type, u8 port) { u32 addrl, addrh, sizel, sizeh = 0; u32 size; u32 ent = bcma_erom_get_ent(bus, eromptr); if ((!(ent & SCAN_ER_VALID)) || ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) || ((ent & SCAN_ADDR_TYPE) != type) || (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) { bcma_erom_push_ent(eromptr); return -EINVAL; } addrl = ent & SCAN_ADDR_ADDR; if (ent & SCAN_ADDR_AG32) addrh = bcma_erom_get_ent(bus, eromptr); else addrh = 0; if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) { size = bcma_erom_get_ent(bus, eromptr); sizel = size & SCAN_SIZE_SZ; if (size & SCAN_SIZE_SG32) sizeh = bcma_erom_get_ent(bus, eromptr); } else sizel = SCAN_ADDR_SZ_BASE << ((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT); return addrl; } static struct bcma_device *bcma_find_core_by_index(struct bcma_bus *bus, u16 index) { struct bcma_device *core; list_for_each_entry(core, &bus->cores, list) { if (core->core_index == index) return core; } return NULL; } static struct bcma_device *bcma_find_core_reverse(struct bcma_bus *bus, u16 coreid) { struct bcma_device *core; list_for_each_entry_reverse(core, &bus->cores, list) { if (core->id.id == coreid) return core; } return NULL; } static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, struct bcma_device_id *match, int core_num, struct bcma_device *core) { s32 tmp; u8 i, j; s32 cia, cib; u8 ports[2], wrappers[2]; /* get CIs */ cia = bcma_erom_get_ci(bus, eromptr); if (cia < 0) { bcma_erom_push_ent(eromptr); if (bcma_erom_is_end(bus, eromptr)) return -ESPIPE; return -EILSEQ; } cib = bcma_erom_get_ci(bus, eromptr); if (cib < 0) return -EILSEQ; /* parse CIs */ core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT; core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT; core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT; ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT; ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT; wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT; wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT; core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT; if (((core->id.manuf == BCMA_MANUF_ARM) && (core->id.id == 0xFFF)) || (ports[1] == 0)) { bcma_erom_skip_component(bus, eromptr); return -ENXIO; } /* check if component is a core at all */ if (wrappers[0] + wrappers[1] == 0) { /* Some specific cores don't need wrappers */ switch (core->id.id) { case BCMA_CORE_4706_MAC_GBIT_COMMON: /* Not used yet: case BCMA_CORE_OOB_ROUTER: */ break; default: bcma_erom_skip_component(bus, eromptr); return -ENXIO; } } if (bcma_erom_is_bridge(bus, eromptr)) { bcma_erom_skip_component(bus, eromptr); return -ENXIO; } if (bcma_find_core_by_index(bus, core_num)) { bcma_erom_skip_component(bus, eromptr); return -ENODEV; } if (match && ((match->manuf != BCMA_ANY_MANUF && match->manuf != core->id.manuf) || (match->id != BCMA_ANY_ID && match->id != core->id.id) || (match->rev != BCMA_ANY_REV && match->rev != core->id.rev) || (match->class != BCMA_ANY_CLASS && match->class != core->id.class) )) { bcma_erom_skip_component(bus, eromptr); return -ENODEV; } /* get & parse master ports */ for (i = 0; i < ports[0]; i++) { s32 mst_port_d = bcma_erom_get_mst_port(bus, eromptr); if (mst_port_d < 0) return -EILSEQ; } /* First Slave Address Descriptor should be port 0: * the main register space for the core */ tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0); if (tmp <= 0) { /* Try again to see if it is a bridge */ tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_BRIDGE, 0); if (tmp <= 0) { return -EILSEQ; } else { bcma_info(bus, "Bridge found\n"); return -ENXIO; } } core->addr = tmp; /* get & parse slave ports */ for (i = 0; i < ports[1]; i++) { for (j = 0; ; j++) { tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, i); if (tmp < 0) { /* no more entries for port _i_ */ /* pr_debug("erom: slave port %d " * "has %d descriptors\n", i, j); */ break; } else { if (i == 0 && j == 0) core->addr1 = tmp; } } } /* get & parse master wrappers */ for (i = 0; i < wrappers[0]; i++) { for (j = 0; ; j++) { tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_MWRAP, i); if (tmp < 0) { /* no more entries for port _i_ */ /* pr_debug("erom: master wrapper %d " * "has %d descriptors\n", i, j); */ break; } else { if (i == 0 && j == 0) core->wrap = tmp; } } } /* get & parse slave wrappers */ for (i = 0; i < wrappers[1]; i++) { u8 hack = (ports[1] == 1) ? 0 : 1; for (j = 0; ; j++) { tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SWRAP, i + hack); if (tmp < 0) { /* no more entries for port _i_ */ /* pr_debug("erom: master wrapper %d " * has %d descriptors\n", i, j); */ break; } else { if (wrappers[0] == 0 && !i && !j) core->wrap = tmp; } } } if (bus->hosttype == BCMA_HOSTTYPE_SOC) { core->io_addr = ioremap_nocache(core->addr, BCMA_CORE_SIZE); if (!core->io_addr) return -ENOMEM; core->io_wrap = ioremap_nocache(core->wrap, BCMA_CORE_SIZE); if (!core->io_wrap) { iounmap(core->io_addr); return -ENOMEM; } } return 0; } void bcma_init_bus(struct bcma_bus *bus) { s32 tmp; struct bcma_chipinfo *chipinfo = &(bus->chipinfo); if (bus->init_done) return; INIT_LIST_HEAD(&bus->cores); bus->nr_cores = 0; bcma_scan_switch_core(bus, BCMA_ADDR_BASE); tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID); chipinfo->id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT; chipinfo->rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT; chipinfo->pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT; bcma_info(bus, "Found chip with id 0x%04X, rev 0x%02X and package 0x%02X\n", chipinfo->id, chipinfo->rev, chipinfo->pkg); bus->init_done = true; } int bcma_bus_scan(struct bcma_bus *bus) { u32 erombase; u32 __iomem *eromptr, *eromend; int err, core_num = 0; bcma_init_bus(bus); erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM); if (bus->hosttype == BCMA_HOSTTYPE_SOC) { eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE); if (!eromptr) return -ENOMEM; } else { eromptr = bus->mmio; } eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32); bcma_scan_switch_core(bus, erombase); while (eromptr < eromend) { struct bcma_device *other_core; struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL); if (!core) { err = -ENOMEM; goto out; } INIT_LIST_HEAD(&core->list); core->bus = bus; err = bcma_get_next_core(bus, &eromptr, NULL, core_num, core); if (err < 0) { kfree(core); if (err == -ENODEV) { core_num++; continue; } else if (err == -ENXIO) { continue; } else if (err == -ESPIPE) { break; } goto out; } core->core_index = core_num++; bus->nr_cores++; other_core = bcma_find_core_reverse(bus, core->id.id); core->core_unit = (other_core == NULL) ? 0 : other_core->core_unit + 1; bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n", core->core_index, bcma_device_name(&core->id), core->id.manuf, core->id.id, core->id.rev, core->id.class); list_add_tail(&core->list, &bus->cores); } err = 0; out: if (bus->hosttype == BCMA_HOSTTYPE_SOC) iounmap(eromptr); return err; } int __init bcma_bus_scan_early(struct bcma_bus *bus, struct bcma_device_id *match, struct bcma_device *core) { u32 erombase; u32 __iomem *eromptr, *eromend; int err = -ENODEV; int core_num = 0; erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM); if (bus->hosttype == BCMA_HOSTTYPE_SOC) { eromptr = ioremap_nocache(erombase, BCMA_CORE_SIZE); if (!eromptr) return -ENOMEM; } else { eromptr = bus->mmio; } eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32); bcma_scan_switch_core(bus, erombase); while (eromptr < eromend) { memset(core, 0, sizeof(*core)); INIT_LIST_HEAD(&core->list); core->bus = bus; err = bcma_get_next_core(bus, &eromptr, match, core_num, core); if (err == -ENODEV) { core_num++; continue; } else if (err == -ENXIO) continue; else if (err == -ESPIPE) break; else if (err < 0) goto out; core->core_index = core_num++; bus->nr_cores++; bcma_info(bus, "Core %d found: %s (manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n", core->core_index, bcma_device_name(&core->id), core->id.manuf, core->id.id, core->id.rev, core->id.class); list_add_tail(&core->list, &bus->cores); err = 0; break; } out: if (bus->hosttype == BCMA_HOSTTYPE_SOC) iounmap(eromptr); return err; }