aboutsummaryrefslogtreecommitdiffstats
path: root/arch/v850/kernel/as85ep1.ld
blob: ef2c4399063e0bd187bdff7a59e2fac6ea18eaa8 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
/* Linker script for the NEC AS85EP1 V850E evaluation board
   (CONFIG_V850E_AS85EP1).  */

MEMORY {
	/* 1MB of internal instruction memory. */
	iMEM0 : ORIGIN = 0,	     LENGTH = 0x00100000

	/* 1MB of static RAM.  */
	SRAM  : ORIGIN = SRAM_ADDR,  LENGTH = SRAM_SIZE

	/* About 58MB of DRAM.  This can actually be at one of two
	   positions, determined by jump JP3; we have to use the first
	   position because the second is partially out of processor
	   instruction addressing range (though in the second position
	   there's actually 64MB available).  */
	SDRAM : ORIGIN = SDRAM_ADDR, LENGTH = SDRAM_SIZE
}

SECTIONS {
	.resetv : {
		__intv_start = . ;
			*(.intv.reset)	/* Reset vector */
	} > iMEM0

	.sram : {
		RAMK_KRAM_CONTENTS

		/* We stick most of the interrupt vectors here; they'll be
		   copied into the proper location by the early init code (we
		   can't put them directly in the right place because of
		   hardware bugs).  The vectors shouldn't need to be
		   relocated, so we don't have to use `> ...  AT> ...' to
		   split the load/vm addresses (and we can't because of
		   problems with the loader).  */
		. = ALIGN (0x10) ;
		__intv_copy_src_start = . ;
			*(.intv.common)	/* Vectors common to all v850e proc. */
			*(.intv.mach)	/* Machine-specific int. vectors.  */
		. = ALIGN (0x10) ;
		__intv_copy_src_end = . ;
	} > SRAM

	/* Where we end up putting the vectors.  */
	__intv_copy_dst_start = 0x10 ;
	__intv_copy_dst_end = __intv_copy_dst_start + (__intv_copy_src_end - __intv_copy_src_start) ;
	__intv_end = __intv_copy_dst_end ;

	.root : { ROOT_FS_CONTENTS } > SDRAM
}