1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
|
/*
* machine_kexec.c - handle transition of Linux booting another kernel
* Copyright (C) 2002-2005 Eric Biederman <ebiederm@xmission.com>
*
* This source code is licensed under the GNU General Public License,
* Version 2. See the file COPYING for more details.
*/
#include <linux/mm.h>
#include <linux/kexec.h>
#include <linux/delay.h>
#include <asm/pgtable.h>
#include <asm/pgalloc.h>
#include <asm/tlbflush.h>
#include <asm/mmu_context.h>
#include <asm/io.h>
#include <asm/apic.h>
#include <asm/cpufeature.h>
#include <asm/desc.h>
static inline unsigned long read_cr3(void)
{
unsigned long cr3;
asm volatile("movl %%cr3,%0": "=r"(cr3));
return cr3;
}
#define PAGE_ALIGNED __attribute__ ((__aligned__(PAGE_SIZE)))
#define L0_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
#define L1_ATTR (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED | _PAGE_DIRTY)
#define L2_ATTR (_PAGE_PRESENT)
#define LEVEL0_SIZE (1UL << 12UL)
#ifndef CONFIG_X86_PAE
#define LEVEL1_SIZE (1UL << 22UL)
static u32 pgtable_level1[1024] PAGE_ALIGNED;
static void identity_map_page(unsigned long address)
{
unsigned long level1_index, level2_index;
u32 *pgtable_level2;
/* Find the current page table */
pgtable_level2 = __va(read_cr3());
/* Find the indexes of the physical address to identity map */
level1_index = (address % LEVEL1_SIZE)/LEVEL0_SIZE;
level2_index = address / LEVEL1_SIZE;
/* Identity map the page table entry */
pgtable_level1[level1_index] = address | L0_ATTR;
pgtable_level2[level2_index] = __pa(pgtable_level1) | L1_ATTR;
/* Flush the tlb so the new mapping takes effect.
* Global tlb entries are not flushed but that is not an issue.
*/
load_cr3(pgtable_level2);
}
#else
#define LEVEL1_SIZE (1UL << 21UL)
#define LEVEL2_SIZE (1UL << 30UL)
static u64 pgtable_level1[512] PAGE_ALIGNED;
static u64 pgtable_level2[512] PAGE_ALIGNED;
static void identity_map_page(unsigned long address)
{
unsigned long level1_index, level2_index, level3_index;
u64 *pgtable_level3;
/* Find the current page table */
pgtable_level3 = __va(read_cr3());
/* Find the indexes of the physical address to identity map */
level1_index = (address % LEVEL1_SIZE)/LEVEL0_SIZE;
level2_index = (address % LEVEL2_SIZE)/LEVEL1_SIZE;
level3_index = address / LEVEL2_SIZE;
/* Identity map the page table entry */
pgtable_level1[level1_index] = address | L0_ATTR;
pgtable_level2[level2_index] = __pa(pgtable_level1) | L1_ATTR;
set_64bit(&pgtable_level3[level3_index],
__pa(pgtable_level2) | L2_ATTR);
/* Flush the tlb so the new mapping takes effect.
* Global tlb entries are not flushed but that is not an issue.
*/
load_cr3(pgtable_level3);
}
#endif
static void set_idt(void *newidt, __u16 limit)
{
struct Xgt_desc_struct curidt;
/* ia32 supports unaliged loads & stores */
curidt.size = limit;
curidt.address = (unsigned long)newidt;
__asm__ __volatile__ (
"lidtl %0\n"
: : "m" (curidt)
);
};
static void set_gdt(void *newgdt, __u16 limit)
{
struct Xgt_desc_struct curgdt;
/* ia32 supports unaligned loads & stores */
curgdt.size = limit;
curgdt.address = (unsigned long)newgdt;
__asm__ __volatile__ (
"lgdtl %0\n"
: : "m" (curgdt)
);
};
static void load_segments(void)
{
#define __STR(X) #X
#define STR(X) __STR(X)
__asm__ __volatile__ (
"\tljmp $"STR(__KERNEL_CS)",$1f\n"
"\t1:\n"
"\tmovl $"STR(__KERNEL_DS)",%eax\n"
"\tmovl %eax,%ds\n"
"\tmovl %eax,%es\n"
"\tmovl %eax,%fs\n"
"\tmovl %eax,%gs\n"
"\tmovl %eax,%ss\n"
);
#undef STR
#undef __STR
}
typedef asmlinkage NORET_TYPE void (*relocate_new_kernel_t)(
unsigned long indirection_page,
unsigned long reboot_code_buffer,
unsigned long start_address,
unsigned int has_pae) ATTRIB_NORET;
const extern unsigned char relocate_new_kernel[];
extern void relocate_new_kernel_end(void);
const extern unsigned int relocate_new_kernel_size;
/*
* A architecture hook called to validate the
* proposed image and prepare the control pages
* as needed. The pages for KEXEC_CONTROL_CODE_SIZE
* have been allocated, but the segments have yet
* been copied into the kernel.
*
* Do what every setup is needed on image and the
* reboot code buffer to allow us to avoid allocations
* later.
*
* Currently nothing.
*/
int machine_kexec_prepare(struct kimage *image)
{
return 0;
}
/*
* Undo anything leftover by machine_kexec_prepare
* when an image is freed.
*/
void machine_kexec_cleanup(struct kimage *image)
{
}
/*
* Do not allocate memory (or fail in any way) in machine_kexec().
* We are past the point of no return, committed to rebooting now.
*/
NORET_TYPE void machine_kexec(struct kimage *image)
{
unsigned long page_list;
unsigned long reboot_code_buffer;
relocate_new_kernel_t rnk;
/* Interrupts aren't acceptable while we reboot */
local_irq_disable();
/* Compute some offsets */
reboot_code_buffer = page_to_pfn(image->control_code_page)
<< PAGE_SHIFT;
page_list = image->head;
/* Set up an identity mapping for the reboot_code_buffer */
identity_map_page(reboot_code_buffer);
/* copy it out */
memcpy((void *)reboot_code_buffer, relocate_new_kernel,
relocate_new_kernel_size);
/* The segment registers are funny things, they are
* automatically loaded from a table, in memory wherever you
* set them to a specific selector, but this table is never
* accessed again you set the segment to a different selector.
*
* The more common model is are caches where the behide
* the scenes work is done, but is also dropped at arbitrary
* times.
*
* I take advantage of this here by force loading the
* segments, before I zap the gdt with an invalid value.
*/
load_segments();
/* The gdt & idt are now invalid.
* If you want to load them you must set up your own idt & gdt.
*/
set_gdt(phys_to_virt(0),0);
set_idt(phys_to_virt(0),0);
/* now call it */
rnk = (relocate_new_kernel_t) reboot_code_buffer;
(*rnk)(page_list, reboot_code_buffer, image->start, cpu_has_pae);
}
|
