1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
|
/*
* File: arch/blackfin/kernel/vmlinux.lds.S
* Based on: none - original work
* Author:
*
* Created: Tue Sep 21 2004
* Description: Master linker script for blackfin architecture
*
* Modified:
* Copyright 2004-2007 Analog Devices Inc.
*
* Bugs: Enter bugs at http://blackfin.uclinux.org/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, see the file COPYING, or write
* to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define VMLINUX_SYMBOL(_sym_) _##_sym_
#include <asm-generic/vmlinux.lds.h>
#include <asm/mem_map.h>
#include <asm/page.h>
#include <asm/thread_info.h>
OUTPUT_FORMAT("elf32-bfin")
ENTRY(__start)
_jiffies = _jiffies_64;
SECTIONS
{
. = CONFIG_BOOT_LOAD;
/* Neither the text, ro_data or bss section need to be aligned
* So pack them back to back
*/
.text :
{
__text = .;
_text = .;
__stext = .;
TEXT_TEXT
#ifndef CONFIG_SCHEDULE_L1
SCHED_TEXT
#endif
LOCK_TEXT
IRQENTRY_TEXT
KPROBES_TEXT
*(.text.*)
*(.fixup)
#if !L1_CODE_LENGTH
*(.l1.text)
#endif
. = ALIGN(16);
___start___ex_table = .;
*(__ex_table)
___stop___ex_table = .;
__etext = .;
}
NOTES
/* Just in case the first read only is a 32-bit access */
RO_DATA(4)
.bss :
{
. = ALIGN(4);
___bss_start = .;
*(.bss .bss.*)
*(COMMON)
#if !L1_DATA_A_LENGTH
*(.l1.bss)
#endif
#if !L1_DATA_B_LENGTH
*(.l1.bss.B)
#endif
. = ALIGN(4);
___bss_stop = .;
}
.data :
{
__sdata = .;
/* This gets done first, so the glob doesn't suck it in */
. = ALIGN(32);
*(.data.cacheline_aligned)
#if !L1_DATA_A_LENGTH
. = ALIGN(32);
*(.data_l1.cacheline_aligned)
*(.l1.data)
#endif
#if !L1_DATA_B_LENGTH
*(.l1.data.B)
#endif
#if !L2_LENGTH
. = ALIGN(32);
*(.data_l2.cacheline_aligned)
*(.l2.data)
#endif
DATA_DATA
CONSTRUCTORS
/* make sure the init_task is aligned to the
* kernel thread size so we can locate the kernel
* stack properly and quickly.
*/
. = ALIGN(THREAD_SIZE);
*(.init_task.data)
__edata = .;
}
/* The init section should be last, so when we free it, it goes into
* the general memory pool, and (hopefully) will decrease fragmentation
* a tiny bit. The init section has a _requirement_ that it be
* PAGE_SIZE aligned
*/
. = ALIGN(PAGE_SIZE);
___init_begin = .;
.init.text :
{
. = ALIGN(PAGE_SIZE);
__sinittext = .;
INIT_TEXT
__einittext = .;
}
.init.data :
{
. = ALIGN(16);
INIT_DATA
}
.init.setup :
{
. = ALIGN(16);
___setup_start = .;
*(.init.setup)
___setup_end = .;
}
.initcall.init :
{
___initcall_start = .;
INITCALLS
___initcall_end = .;
}
.con_initcall.init :
{
___con_initcall_start = .;
*(.con_initcall.init)
___con_initcall_end = .;
}
PERCPU(4)
SECURITY_INIT
/* we have to discard exit text and such at runtime, not link time, to
* handle embedded cross-section references (alt instructions, bug
* table, eh_frame, etc...)
*/
.exit.text :
{
EXIT_TEXT
}
.exit.data :
{
EXIT_DATA
}
.init.ramfs :
{
. = ALIGN(4);
___initramfs_start = .;
*(.init.ramfs)
. = ALIGN(4);
___initramfs_end = .;
}
__l1_lma_start = .;
.text_l1 L1_CODE_START : AT(LOADADDR(.init.ramfs) + SIZEOF(.init.ramfs))
{
. = ALIGN(4);
__stext_l1 = .;
*(.l1.text)
#ifdef CONFIG_SCHEDULE_L1
SCHED_TEXT
#endif
. = ALIGN(4);
__etext_l1 = .;
}
ASSERT (SIZEOF(.text_l1) <= L1_CODE_LENGTH, "L1 text overflow!")
.data_l1 L1_DATA_A_START : AT(LOADADDR(.text_l1) + SIZEOF(.text_l1))
{
. = ALIGN(4);
__sdata_l1 = .;
*(.l1.data)
__edata_l1 = .;
. = ALIGN(32);
*(.data_l1.cacheline_aligned)
. = ALIGN(4);
__sbss_l1 = .;
*(.l1.bss)
. = ALIGN(4);
__ebss_l1 = .;
}
ASSERT (SIZEOF(.data_a_l1) <= L1_DATA_A_LENGTH, "L1 data A overflow!")
.data_b_l1 L1_DATA_B_START : AT(LOADADDR(.data_l1) + SIZEOF(.data_l1))
{
. = ALIGN(4);
__sdata_b_l1 = .;
*(.l1.data.B)
__edata_b_l1 = .;
. = ALIGN(4);
__sbss_b_l1 = .;
*(.l1.bss.B)
. = ALIGN(4);
__ebss_b_l1 = .;
}
ASSERT (SIZEOF(.data_b_l1) <= L1_DATA_B_LENGTH, "L1 data B overflow!")
__l2_lma_start = LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1);
.text_data_l2 L2_START : AT(LOADADDR(.data_b_l1) + SIZEOF(.data_b_l1))
{
. = ALIGN(4);
__stext_l2 = .;
*(.l2.text)
. = ALIGN(4);
__etext_l2 = .;
. = ALIGN(4);
__sdata_l2 = .;
*(.l2.data)
__edata_l2 = .;
. = ALIGN(32);
*(.data_l2.cacheline_aligned)
. = ALIGN(4);
__sbss_l2 = .;
*(.l2.bss)
. = ALIGN(4);
__ebss_l2 = .;
}
ASSERT (SIZEOF(.text_data_l1) <= L2_LENGTH, "L2 overflow!")
/* Force trailing alignment of our init section so that when we
* free our init memory, we don't leave behind a partial page.
*/
. = LOADADDR(.text_data_l2) + SIZEOF(.text_data_l2);
. = ALIGN(PAGE_SIZE);
___init_end = .;
__end =.;
STABS_DEBUG
DWARF_DEBUG
/DISCARD/ :
{
*(.exitcall.exit)
*(.discard)
}
}
|
