1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
|
/*
* arch/arm/mach-tegra/board-harmony.c
*
* Copyright (C) 2010 Google, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/clk.h>
#include <linux/dma-mapping.h>
#include <linux/pda_power.h>
#include <linux/io.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/setup.h>
#include <mach/iomap.h>
#include <mach/irqs.h>
#include "board.h"
#include "board-harmony.h"
#include "clock.h"
/* NVidia bootloader tags */
#define ATAG_NVIDIA 0x41000801
#define ATAG_NVIDIA_RM 0x1
#define ATAG_NVIDIA_DISPLAY 0x2
#define ATAG_NVIDIA_FRAMEBUFFER 0x3
#define ATAG_NVIDIA_CHIPSHMOO 0x4
#define ATAG_NVIDIA_CHIPSHMOOPHYS 0x5
#define ATAG_NVIDIA_PRESERVED_MEM_0 0x10000
#define ATAG_NVIDIA_PRESERVED_MEM_N 2
#define ATAG_NVIDIA_FORCE_32 0x7fffffff
struct tag_tegra {
__u32 bootarg_key;
__u32 bootarg_len;
char bootarg[1];
};
static int __init parse_tag_nvidia(const struct tag *tag)
{
return 0;
}
__tagtable(ATAG_NVIDIA, parse_tag_nvidia);
static struct plat_serial8250_port debug_uart_platform_data[] = {
{
.membase = IO_ADDRESS(TEGRA_UARTD_BASE),
.mapbase = TEGRA_UARTD_BASE,
.irq = INT_UARTD,
.flags = UPF_BOOT_AUTOCONF,
.iotype = UPIO_MEM,
.regshift = 2,
.uartclk = 216000000,
}, {
.flags = 0
}
};
static struct platform_device debug_uart = {
.name = "serial8250",
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = debug_uart_platform_data,
},
};
static struct platform_device *harmony_devices[] __initdata = {
&debug_uart,
};
static void __init tegra_harmony_fixup(struct machine_desc *desc,
struct tag *tags, char **cmdline, struct meminfo *mi)
{
mi->nr_banks = 2;
mi->bank[0].start = PHYS_OFFSET;
mi->bank[0].size = 448 * SZ_1M;
mi->bank[1].start = SZ_512M;
mi->bank[1].size = SZ_512M;
}
static __initdata struct tegra_clk_init_table harmony_clk_init_table[] = {
/* name parent rate enabled */
{ "uartd", "pll_p", 216000000, true },
{ NULL, NULL, 0, 0},
};
static void __init tegra_harmony_init(void)
{
tegra_common_init();
tegra_clk_init_from_table(harmony_clk_init_table);
harmony_pinmux_init();
platform_add_devices(harmony_devices, ARRAY_SIZE(harmony_devices));
}
MACHINE_START(HARMONY, "harmony")
.boot_params = 0x00000100,
.phys_io = IO_APB_PHYS,
.io_pg_offst = ((IO_APB_VIRT) >> 18) & 0xfffc,
.fixup = tegra_harmony_fixup,
.init_irq = tegra_init_irq,
.init_machine = tegra_harmony_init,
.map_io = tegra_map_common_io,
.timer = &tegra_timer,
MACHINE_END
|
