aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/imx51-babbage.dts
blob: cbd2b1c7487bcf5a50e9254b851f2415530846ec (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
/*
 * Copyright 2011 Freescale Semiconductor, Inc.
 * Copyright 2011 Linaro Ltd.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/dts-v1/;
/include/ "imx51.dtsi"

/ {
	model = "Freescale i.MX51 Babbage Board";
	compatible = "fsl,imx51-babbage", "fsl,imx51";

	memory {
		reg = <0x90000000 0x20000000>;
	};

	soc {
		aips@70000000 { /* aips-1 */
			spba@70000000 {
				esdhc@70004000 { /* ESDHC1 */
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_esdhc1_1>;
					fsl,cd-controller;
					fsl,wp-controller;
					status = "okay";
				};

				esdhc@70008000 { /* ESDHC2 */
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_esdhc2_1>;
					cd-gpios = <&gpio1 6 0>;
					wp-gpios = <&gpio1 5 0>;
					status = "okay";
				};

				uart3: serial@7000c000 {
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_uart3_1>;
					fsl,uart-has-rtscts;
					status = "okay";
				};

				ecspi@70010000 { /* ECSPI1 */
					pinctrl-names = "default";
					pinctrl-0 = <&pinctrl_ecspi1_1>;
					fsl,spi-num-chipselects = <2>;
					cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
					status = "okay";

					pmic: mc13892@0 {
						#address-cells = <1>;
						#size-cells = <0>;
						compatible = "fsl,mc13892";
						spi-max-frequency = <6000000>;
						reg = <0>;
						interrupt-parent = <&gpio1>;
						interrupts = <8 0x4>;

						regulators {
							sw1_reg: sw1 {
								regulator-min-microvolt = <600000>;
								regulator-max-microvolt = <1375000>;
								regulator-boot-on;
								regulator-always-on;
							};

							sw2_reg: sw2 {
								regulator-min-microvolt = <900000>;
								regulator-max-microvolt = <1850000>;
								regulator-boot-on;
								regulator-always-on;
							};

							sw3_reg: sw3 {
								regulator-min-microvolt = <1100000>;
								regulator-max-microvolt = <1850000>;
								regulator-boot-on;
								regulator-always-on;
							};

							sw4_reg: sw4 {
								regulator-min-microvolt = <1100000>;
								regulator-max-microvolt = <1850000>;
								regulator-boot-on;
								regulator-always-on;
							};

							vpll_reg: vpll {
								regulator-min-microvolt = <1050000>;
								regulator-max-microvolt = <1800000>;
								regulator-boot-on;
								regulator-always-on;
							};

							vdig_reg: vdig {
								regulator-min-microvolt = <1650000>;
								regulator-max-microvolt = <1650000>;
								regulator-boot-on;
							};

							vsd_reg: vsd {
								regulator-min-microvolt = <1800000>;
								regulator-max-microvolt = <3150000>;
							};

							vusb2_reg: vusb2 {
								regulator-min-microvolt = <2400000>;
								regulator-max-microvolt = <2775000>;
								regulator-boot-on;
								regulator-always-on;
							};

							vvideo_reg: vvideo {
								regulator-min-microvolt = <2775000>;
								regulator-max-microvolt = <2775000>;
							};

							vaudio_reg: vaudio {
								regulator-min-microvolt = <2300000>;
								regulator-max-microvolt = <3000000>;
							};

							vcam_reg: vcam {
								regulator-min-microvolt = <2500000>;
								regulator-max-microvolt = <3000000>;
							};

							vgen1_reg: vgen1 {
								regulator-min-microvolt = <1200000>;
								regulator-max-microvolt = <1200000>;
							};

							vgen2_reg: vgen2 {
								regulator-min-microvolt = <1200000>;
								regulator-max-microvolt = <3150000>;
								regulator-always-on;
							};

							vgen3_reg: vgen3 {
								regulator-min-microvolt = <1800000>;
								regulator-max-microvolt = <2900000>;
								regulator-always-on;
							};
						};
					};

					flash: at45db321d@1 {
						#address-cells = <1>;
						#size-cells = <1>;
						compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
						spi-max-frequency = <25000000>;
						reg = <1>;

						partition@0 {
							label = "U-Boot";
							reg = <0x0 0x40000>;
							read-only;
						};

						partition@40000 {
							label = "Kernel";
							reg = <0x40000 0x3c0000>;
						};
					};
				};

				ssi2: ssi@70014000 {
					fsl,mode = "i2s-slave";
					status = "okay";
				};
			};

			iomuxc@73fa8000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_hog>;

				hog {
					pinctrl_hog: hoggrp {
						fsl,pins = <
							694  0x20d5	/* MX51_PAD_GPIO1_0__SD1_CD */
							697  0x20d5	/* MX51_PAD_GPIO1_1__SD1_WP */
							737  0x100	/* MX51_PAD_GPIO1_5__GPIO1_5 */
							740  0x100	/* MX51_PAD_GPIO1_6__GPIO1_6 */
							121  0x5	/* MX51_PAD_EIM_A27__GPIO2_21 */
							402  0x85	/* MX51_PAD_CSPI1_SS0__GPIO4_24 */
							405  0x85	/* MX51_PAD_CSPI1_SS1__GPIO4_25 */
						>;
					};
				};
			};

			uart1: serial@73fbc000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart1_1>;
				fsl,uart-has-rtscts;
				status = "okay";
			};

			uart2: serial@73fc0000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_uart2_1>;
				status = "okay";
			};
		};

		aips@80000000 {	/* aips-2 */
			i2c@83fc4000 { /* I2C2 */
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_i2c2_1>;
				status = "okay";

				sgtl5000: codec@0a {
					compatible = "fsl,sgtl5000";
					reg = <0x0a>;
					clock-frequency = <26000000>;
					VDDA-supply = <&vdig_reg>;
					VDDIO-supply = <&vvideo_reg>;
				};
			};

			audmux@83fd0000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_audmux_1>;
				status = "okay";
			};

			ethernet@83fec000 {
				pinctrl-names = "default";
				pinctrl-0 = <&pinctrl_fec_1>;
				phy-mode = "mii";
				status = "okay";
			};
		};
	};

	gpio-keys {
		compatible = "gpio-keys";

		power {
			label = "Power Button";
			gpios = <&gpio2 21 0>;
			linux,code = <116>; /* KEY_POWER */
			gpio-key,wakeup;
		};
	};

	sound {
		compatible = "fsl,imx51-babbage-sgtl5000",
			     "fsl,imx-audio-sgtl5000";
		model = "imx51-babbage-sgtl5000";
		ssi-controller = <&ssi2>;
		audio-codec = <&sgtl5000>;
		audio-routing =
			"MIC_IN", "Mic Jack",
			"Mic Jack", "Mic Bias",
			"Headphone Jack", "HP_OUT";
		mux-int-port = <2>;
		mux-ext-port = <3>;
	};
};