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BranchCommit messageAuthorAge
archive/unc-master-3.0P-FP: fix BUG_ON releated to priority inheritanceBjoern Brandenburg13 years
archived-2013.1uncachedev: mmap memory that is not cached by CPUsGlenn Elliott12 years
archived-private-masterMerge branch 'wip-2.6.34' into old-private-masterAndrea Bastoni15 years
archived-semi-partMerge branch 'wip-semi-part' of ssh://cvs/cvs/proj/litmus/repo/litmus2010 int...Andrea Bastoni15 years
demoFurther refinementsJonathan Herman14 years
ecrts-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
ecrts14-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
gpusync-rtss12Final GPUSync implementation.Glenn Elliott12 years
gpusync/stagingRename IKGLP R2DGLP.Glenn Elliott12 years
linux-tipMerge branch 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/p...Linus Torvalds15 years
litmus2008-patch-seriesadd i386 feather-trace implementationBjoern B. Brandenburg16 years
masterPSN-EDF: use inferred_sporadic_job_release_atBjoern Brandenburg9 years
pgmmake it compileGlenn Elliott12 years
prop/litmus-signalsInfrastructure for Litmus signals.Glenn Elliott13 years
prop/robust-tie-breakFixed bug in edf_higher_prio().Glenn Elliott13 years
stagingFix tracepoint compilation errorFelipe Cerqueira13 years
test9/23/2016Namhoon Kim9 years
tracing-develTest kernel tracing events capabilitiesAndrea Bastoni16 years
v2.6.34-with-arm-patchessmsc911x: Add spinlocks around registers accessCatalin Marinas15 years
v2015.1Add ARM syscall def for get_current_budgetBjoern Brandenburg10 years
wip-2011.2-bbbLitmus core: simplify np-section protocolBjoern B. Brandenburg14 years
wip-2011.2-bbb-traceRefactor sched_trace_log_message() -> debug_trace_log_message()Andrea Bastoni14 years
wip-2012.3-gpuSOBLIV draining support for C-EDF.Glenn Elliott12 years
wip-2012.3-gpu-preportpick up last C-RM fileGlenn Elliott12 years
wip-2012.3-gpu-rtss13Fix critical bug in GPU tracker.Glenn Elliott12 years
wip-2012.3-gpu-sobliv-budget-w-ksharkProper sobliv draining and many bug fixes.Glenn Elliott12 years
wip-aedzl-finalMake it easier to compile AEDZL interfaces in liblitmus.Glenn Elliott15 years
wip-aedzl-revisedAdd sched_trace data for Apative EDZLGlenn Elliott15 years
wip-arbit-deadlineFix compilation bug.Glenn Elliott13 years
wip-aux-tasksDescription of refined aux task inheritance.Glenn Elliott13 years
wip-bbbGSN-EDF & Core: improve debug TRACE'ing for NP sectionsBjoern B. Brandenburg14 years
wip-bbb-prio-donuse correct timestampBjoern B. Brandenburg14 years
wip-better-breakImplement hash-based EDF tie-breaking.Glenn Elliott13 years
wip-binary-heapMake C-EDF work with simplified binheap_deleteGlenn Elliott13 years
wip-budgetAdded support for choices in budget policy enforcement.Glenn Elliott15 years
wip-colorSummarize schedulability with final recordJonathan Herman13 years
wip-color-jlhsched_color: Fixed two bugs causing crashing on experiment restart and a rare...Jonathan Herman13 years
wip-d10-hz1000Enable HZ=1000 on District 10Bjoern B. Brandenburg15 years
wip-default-clusteringFeature: Make default C-EDF clustering compile-time configurable.Glenn Elliott15 years
wip-dissipation-jericksoUpdate from 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-dissipation2-jericksoUpdate 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-ecrts14-pgmMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
wip-edf-hsblast tested versionJonathan Herman14 years
wip-edf-osLookup table EDF-osJeremy Erickson12 years
wip-edf-tie-breakMerge branch 'wip-edf-tie-break' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus...Glenn Elliott13 years
wip-edzl-critiqueUse hr_timer's active checks instead of having own flag.Glenn Elliott15 years
wip-edzl-finalImplementation of the EDZL scheduler.Glenn Elliott15 years
wip-edzl-revisedClean up comments.Glenn Elliott15 years
wip-eventsAdded support for tracing arbitrary actions.Jonathan Herman15 years
wip-extra-debugDBG: add additional tracingBjoern B. Brandenburg15 years
wip-fix-switch-jericksoAttempt to fix race condition with plugin switchingJeremy Erickson15 years
wip-fix3sched: show length of runqueue clock deactivation in /proc/sched_debugBjoern B. Brandenburg15 years
wip-fmlp-dequeueImprove FMLP queue management.Glenn Elliott14 years
wip-ft-irq-flagFeather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-gpu-cleanupEnable sched_trace log injection from userspaceGlenn Elliott13 years
wip-gpu-interruptsRemove option for threading of all softirqs.Glenn Elliott14 years
wip-gpu-rtas12Generalized GPU cost predictors + EWMA. (untested)Glenn Elliott13 years
wip-gpu-rtss12Final GPUSync implementation.Glenn Elliott13 years
wip-gpu-rtss12-srpexperimental changes to support GPUs under SRPGlenn Elliott13 years
wip-gpusync-mergeCleanup priority tracking for budget enforcement.Glenn Elliott11 years
wip-ikglpMove RSM and IKGLP imp. to own .c filesGlenn Elliott13 years
wip-k-fmlpMerge branch 'mpi-master' into wip-k-fmlpGlenn Elliott14 years
wip-kernel-coloringAdded recolor syscallNamhoon Kim7 years
wip-kernthreadsKludge work-queue processing into klitirqd.Glenn Elliott15 years
wip-klmirqd-to-auxAllow klmirqd threads to be given names.Glenn Elliott13 years
wip-ksharkMerge branch 'mpi-staging' into wip-ksharkJonathan Herman13 years
wip-litmus-3.2Merge commit 'v3.2' into litmus-stagingAndrea Bastoni13 years
wip-litmus2011.2Cleanup: Coding conformance for affinity stuff.Glenn Elliott14 years
wip-litmus3.0-2011.2Feather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-master-2.6.33-rtAvoid deadlock when switching task policy to BACKGROUND (ugly)Andrea Bastoni15 years
wip-mcRemoved ARM-specific hacks which disabled less common mixed-criticality featu...Jonathan Herman12 years
wip-mc-bipasaMC-EDF addedbipasa chattopadhyay13 years
wip-mc-jericksoSplit C/D queuesJeremy Erickson15 years
wip-mc2-cache-slackManually patched mc^2 related codeMing Yang10 years
wip-mcrit-maccosmeticMac Mollison15 years
wip-merge-3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-merge-v3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-migration-affinityNULL affinity dereference in C-EDF.Glenn Elliott14 years
wip-mmap-uncacheshare branch with othersGlenn Elliott13 years
wip-modechangeRTSS 2017 submissionNamhoon Kim8 years
wip-nested-lockingAppears to be working.Bryan Ward12 years
wip-omlp-gedfFirst implementation of G-OMLP.Glenn Elliott15 years
wip-paiSome cleanup of PAIGlenn Elliott14 years
wip-percore-lib9/21/2016Namhoon Kim9 years
wip-performanceCONFIG_DONT_PREEMPT_ON_TIE: Don't preeempt a scheduled task on priority tie.Glenn Elliott14 years
wip-pgmAdd PGM support to C-FLGlenn Elliott12 years
wip-pgm-splitFirst draft of C-FL-splitNamhoon Kim12 years
wip-pm-ovdAdd preemption-and-migration overhead tracing supportAndrea Bastoni15 years
wip-prio-inhP-EDF updated to use the generic pi framework.Glenn Elliott15 years
wip-prioq-dglBUG FIX: Support DGLs with PRIOQ_MUTEXGlenn Elliott13 years
wip-refactored-gedfGeneralizd architecture for GEDF-style scheduelrs to reduce code redundancy.Glenn Elliott15 years
wip-release-master-fixbugfix: release master CPU must signal task was pickedBjoern B. Brandenburg14 years
wip-robust-tie-breakEDF priority tie-breaks.Glenn Elliott13 years
wip-rt-ksharkMove task time accounting into the complete_job method.Jonathan Herman13 years
wip-rtas12-pgmScheduling of PGM jobs.Glenn Elliott13 years
wip-semi-partFix compile error with newer GCCJeremy Erickson12 years
wip-semi-part-edfos-jericksoUse initial CPU set by clientJeremy Erickson12 years
wip-shared-libTODO: Fix condition checks in replicate_page_move_mapping()Namhoon Kim9 years
wip-shared-lib2RTAS 2017 Submission ver.Namhoon Kim9 years
wip-shared-memInitial commit for shared libraryNamhoon Kim9 years
wip-splitting-jericksoFix release behaviorJeremy Erickson13 years
wip-splitting-omlp-jericksoBjoern's Dissertation Code with Priority DonationJeremy Erickson13 years
wip-stage-binheapAn efficient binary heap implementation.Glenn Elliott13 years
wip-sun-portDynamic memory allocation and clean exit for FeatherTraceChristopher Kenna15 years
wip-timer-tracebugfix: C-EDF, clear scheduled field of the correct CPU upon task_exitAndrea Bastoni15 years
wip-tracepointsAdd kernel-style events for sched_trace_XXX() functionsAndrea Bastoni14 years
 
TagDownloadAuthorAge
2015.1commit 8e51b37822...Bjoern Brandenburg10 years
2013.1commit bcaacec1ca...Glenn Elliott12 years
2012.3commit c158b5fbe4...Jonathan Herman13 years
2012.2commit b53c479a0f...Glenn Elliott13 years
2012.1commit 83b11ea1c6...Bjoern B. Brandenburg14 years
rtas12-mc-beta-expcommit 8e236ee20f...Christopher Kenna14 years
2011.1commit d11808b5c6...Christopher Kenna15 years
v2.6.37-rc4commit e8a7e48bb2...Linus Torvalds15 years
v2.6.37-rc3commit 3561d43fd2...Linus Torvalds15 years
v2.6.37-rc2commit e53beacd23...Linus Torvalds15 years
v2.6.37-rc1commit c8ddb2713c...Linus Torvalds15 years
v2.6.36commit f6f94e2ab1...Linus Torvalds15 years
2010.2commit 5c5456402d...Bjoern B. Brandenburg15 years
v2.6.36-rc8commit cd07202cc8...Linus Torvalds15 years
v2.6.36-rc7commit cb655d0f3d...Linus Torvalds15 years
v2.6.36-rc6commit 899611ee7d...Linus Torvalds15 years
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2010.1commit 7c1ff4c544...Andrea Bastoni15 years
v2.6.34commit e40152ee1e...Linus Torvalds15 years
v2.6.33.4commit 4640b4e7d9...Greg Kroah-Hartman15 years
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v2.6.15-rc3commit 624f54be20...Linus Torvalds20 years
v2.6.15-rc2commit 3bedff1d73...Linus Torvalds20 years
v2.6.15-rc1commit cd52d1ee9a...Linus Torvalds20 years
v2.6.14commit 741b2252a5...Linus Torvalds20 years
v2.6.14-rc5commit 93918e9afc...Linus Torvalds20 years
v2.6.14-rc4commit 907a426179...Linus Torvalds20 years
v2.6.14-rc3commit 1c9426e8a5...Linus Torvalds20 years
v2.6.14-rc2commit 676d55ae30...Linus Torvalds20 years
v2.6.14-rc1commit 2f4ba45a75...Linus Torvalds20 years
v2.6.13commit 02b3e4e2d7...Linus Torvalds20 years
v2.6.13-rc7commit 0572e3da3f...Linus Torvalds20 years
v2.6.13-rc6commit 6fc32179de...Linus Torvalds20 years
v2.6.13-rc5commit 9a351e30d7...Linus Torvalds20 years
v2.6.13-rc4commit 6395352334...Linus Torvalds20 years
v2.6.11tree c39ae07f39...
v2.6.11-treetree c39ae07f39...
v2.6.12commit 9ee1c939d1...
v2.6.12-rc2commit 1da177e4c3...
v2.6.12-rc3commit a2755a80f4...
v2.6.12-rc4commit 88d7bd8cb9...
v2.6.12-rc5commit 2a24ab628a...
v2.6.12-rc6commit 7cef5677ef...
v2.6.13-rc1commit 4c91aedb75...
v2.6.13-rc2commit a18bcb7450...
v2.6.13-rc3commit c32511e271...
u_int)len-1)&3)<<27) ; mac = &smc->hw.fp.mac_sfb ; mac->mac_fc = FC_CLAIM ; /* DA == SA in claim frame */ mac->mac_source = mac->mac_dest = MA ; /* 2's complement */ set_int((char *)mac->mac_info,(int)t_request) ; copy_tx_mac(smc,td,(struct fddi_mac *)mac, smc->hw.fp.fifo.rbc_ram_start + CLAIM_FRAME_OFF,len) ; /* set CLAIM start pointer */ outpw(FM_A(FM_SACL),smc->hw.fp.fifo.rbc_ram_start + CLAIM_FRAME_OFF) ; /* * build beacon packet */ len = 17 ; td = TX_DESCRIPTOR | ((((u_int)len-1)&3)<<27) ; mac->mac_fc = FC_BEACON ; mac->mac_source = MA ; mac->mac_dest = null_addr ; /* DA == 0 in beacon frame */ set_int((char *) mac->mac_info,((int)BEACON_INFO<<24) + 0 ) ; copy_tx_mac(smc,td,(struct fddi_mac *)mac, smc->hw.fp.fifo.rbc_ram_start + BEACON_FRAME_OFF,len) ; /* set beacon start pointer */ outpw(FM_A(FM_SABC),smc->hw.fp.fifo.rbc_ram_start + BEACON_FRAME_OFF) ; /* * build directed beacon packet * contains optional UNA */ len = 23 ; td = TX_DESCRIPTOR | ((((u_int)len-1)&3)<<27) ; mac->mac_fc = FC_BEACON ; mac->mac_source = MA ; mac->mac_dest = dbeacon_multi ; /* multicast */ set_int((char *) mac->mac_info,((int)DBEACON_INFO<<24) + 0 ) ; set_int((char *) mac->mac_info+4,0) ; set_int((char *) mac->mac_info+8,0) ; copy_tx_mac(smc,td,(struct fddi_mac *)mac, smc->hw.fp.fifo.rbc_ram_start + DBEACON_FRAME_OFF,len) ; /* end of claim/beacon queue */ outpw(FM_A(FM_EACB),smc->hw.fp.fifo.rx1_fifo_start-1) ; outpw(FM_A(FM_WPXSF),0) ; outpw(FM_A(FM_RPXSF),0) ; } static void formac_rcv_restart(struct s_smc *smc) { /* enable receive function */ SETMASK(FM_A(FM_MDREG1),smc->hw.fp.rx_mode,FM_ADDRX) ; outpw(FM_A(FM_CMDREG1),FM_ICLLR) ; /* clear receive lock */ } void formac_tx_restart(struct s_smc *smc) { outpw(FM_A(FM_CMDREG1),FM_ICLLS) ; /* clear s-frame lock */ outpw(FM_A(FM_CMDREG1),FM_ICLLA0) ; /* clear a-frame lock */ } static void enable_formac(struct s_smc *smc) { /* set formac IMSK : 0 enables irq */ outpw(FM_A(FM_IMSK1U),(unsigned short)~mac_imsk1u); outpw(FM_A(FM_IMSK1L),(unsigned short)~mac_imsk1l); outpw(FM_A(FM_IMSK2U),(unsigned short)~mac_imsk2u); outpw(FM_A(FM_IMSK2L),(unsigned short)~mac_imsk2l); outpw(FM_A(FM_IMSK3U),(unsigned short)~mac_imsk3u); outpw(FM_A(FM_IMSK3L),(unsigned short)~mac_imsk3l); } #if 0 /* Removed because the driver should use the ASICs TX complete IRQ. */ /* The FORMACs tx complete IRQ should be used any longer */ /* BEGIN_MANUAL_ENTRY(if,func;others;4) void enable_tx_irq(smc, queue) struct s_smc *smc ; u_short queue ; Function DOWNCALL (SMT, fplustm.c) enable_tx_irq() enables the FORMACs transmit complete interrupt of the queue. Para queue = QUEUE_S: synchronous queue = QUEUE_A0: asynchronous queue Note After any ring operational change the transmit complete interrupts are disabled. The operating system dependent module must enable the transmit complete interrupt of a queue, - when it queues the first frame, because of no transmit resources are beeing available and - when it escapes from the function llc_restart_tx while some frames are still queued. END_MANUAL_ENTRY */ void enable_tx_irq(struct s_smc *smc, u_short queue) /* u_short queue; 0 = synchronous queue, 1 = asynchronous queue 0 */ { u_short imask ; imask = ~(inpw(FM_A(FM_IMSK1U))) ; if (queue == 0) { outpw(FM_A(FM_IMSK1U),~(imask|FM_STEFRMS)) ; } if (queue == 1) { outpw(FM_A(FM_IMSK1U),~(imask|FM_STEFRMA0)) ; } } /* BEGIN_MANUAL_ENTRY(if,func;others;4) void disable_tx_irq(smc, queue) struct s_smc *smc ; u_short queue ; Function DOWNCALL (SMT, fplustm.c) disable_tx_irq disables the FORMACs transmit complete interrupt of the queue Para queue = QUEUE_S: synchronous queue = QUEUE_A0: asynchronous queue Note The operating system dependent module should disable the transmit complete interrupts if it escapes from the function llc_restart_tx and no frames are queued. END_MANUAL_ENTRY */ void disable_tx_irq(struct s_smc *smc, u_short queue) /* u_short queue; 0 = synchronous queue, 1 = asynchronous queue 0 */ { u_short imask ; imask = ~(inpw(FM_A(FM_IMSK1U))) ; if (queue == 0) { outpw(FM_A(FM_IMSK1U),~(imask&~FM_STEFRMS)) ; } if (queue == 1) { outpw(FM_A(FM_IMSK1U),~(imask&~FM_STEFRMA0)) ; } } #endif static void disable_formac(struct s_smc *smc) { /* clear formac IMSK : 1 disables irq */ outpw(FM_A(FM_IMSK1U),MW) ; outpw(FM_A(FM_IMSK1L),MW) ; outpw(FM_A(FM_IMSK2U),MW) ; outpw(FM_A(FM_IMSK2L),MW) ; outpw(FM_A(FM_IMSK3U),MW) ; outpw(FM_A(FM_IMSK3L),MW) ; } static void mac_ring_up(struct s_smc *smc, int up) { if (up) { formac_rcv_restart(smc) ; /* enable receive function */ smc->hw.mac_ring_is_up = TRUE ; llc_restart_tx(smc) ; /* TX queue */ } else { /* disable receive function */ SETMASK(FM_A(FM_MDREG1),FM_MDISRCV,FM_ADDET) ; /* abort current transmit activity */ outpw(FM_A(FM_CMDREG2),FM_IACTR) ; smc->hw.mac_ring_is_up = FALSE ; } } /*--------------------------- ISR handling ----------------------------------*/ /* * mac1_irq is in drvfbi.c */ /* * mac2_irq: status bits for the receive queue 1, and ring status * ring status indication bits */ void mac2_irq(struct s_smc *smc, u_short code_s2u, u_short code_s2l) { u_short change_s2l ; u_short change_s2u ; /* (jd) 22-Feb-1999 * Restart 2_DMax Timer after end of claiming or beaconing */ if (code_s2u & (FM_SCLM|FM_SHICLM|FM_SBEC|FM_SOTRBEC)) { queue_event(smc,EVENT_RMT,RM_TX_STATE_CHANGE) ; } else if (code_s2l & (FM_STKISS)) { queue_event(smc,EVENT_RMT,RM_TX_STATE_CHANGE) ; } /* * XOR current st bits with the last to avoid useless RMT event queuing */ change_s2l = smc->hw.fp.s2l ^ code_s2l ; change_s2u = smc->hw.fp.s2u ^ code_s2u ; if ((change_s2l & FM_SRNGOP) || (!smc->hw.mac_ring_is_up && ((code_s2l & FM_SRNGOP)))) { if (code_s2l & FM_SRNGOP) { mac_ring_up(smc,1) ; queue_event(smc,EVENT_RMT,RM_RING_OP) ; smc->mib.m[MAC0].fddiMACRingOp_Ct++ ; } else { mac_ring_up(smc,0) ; queue_event(smc,EVENT_RMT,RM_RING_NON_OP) ; } goto mac2_end ; } if (code_s2l & FM_SMISFRM) { /* missed frame */ smc->mib.m[MAC0].fddiMACNotCopied_Ct++ ; } if (code_s2u & (FM_SRCVOVR | /* recv. FIFO overflow */ FM_SRBFL)) { /* recv. buffer full */ smc->hw.mac_ct.mac_r_restart_counter++ ; /* formac_rcv_restart(smc) ; */ smt_stat_counter(smc,1) ; /* goto mac2_end ; */ } if (code_s2u & FM_SOTRBEC) queue_event(smc,EVENT_RMT,RM_OTHER_BEACON) ; if (code_s2u & FM_SMYBEC) queue_event(smc,EVENT_RMT,RM_MY_BEACON) ; if (change_s2u & code_s2u & FM_SLOCLM) { DB_RMTN(2,"RMT : lower claim received\n",0,0) ; } if ((code_s2u & FM_SMYCLM) && !(code_s2l & FM_SDUPCLM)) { /* * This is my claim and that claim is not detected as a * duplicate one. */ queue_event(smc,EVENT_RMT,RM_MY_CLAIM) ; } if (code_s2l & FM_SDUPCLM) { /* * If a duplicate claim frame (same SA but T_Bid != T_Req) * this flag will be set. * In the RMT state machine we need a RM_VALID_CLAIM event * to do the appropriate state change. * RM(34c) */ queue_event(smc,EVENT_RMT,RM_VALID_CLAIM) ; } if (change_s2u & code_s2u & FM_SHICLM) { DB_RMTN(2,"RMT : higher claim received\n",0,0) ; } if ( (code_s2l & FM_STRTEXP) || (code_s2l & FM_STRTEXR) ) queue_event(smc,EVENT_RMT,RM_TRT_EXP) ; if (code_s2l & FM_SMULTDA) { /* * The MAC has found a 2. MAC with the same address. * Signal dup_addr_test = failed to RMT state machine. * RM(25) */ smc->r.dup_addr_test = DA_FAILED ; queue_event(smc,EVENT_RMT,RM_DUP_ADDR) ; } if (code_s2u & FM_SBEC) smc->hw.fp.err_stats.err_bec_stat++ ; if (code_s2u & FM_SCLM) smc->hw.fp.err_stats.err_clm_stat++ ; if (code_s2l & FM_STVXEXP) smc->mib.m[MAC0].fddiMACTvxExpired_Ct++ ; if ((code_s2u & (FM_SBEC|FM_SCLM))) { if (!(change_s2l & FM_SRNGOP) && (smc->hw.fp.s2l & FM_SRNGOP)) { mac_ring_up(smc,0) ; queue_event(smc,EVENT_RMT,RM_RING_NON_OP) ; mac_ring_up(smc,1) ; queue_event(smc,EVENT_RMT,RM_RING_OP) ; smc->mib.m[MAC0].fddiMACRingOp_Ct++ ; } } if (code_s2l & FM_SPHINV) smc->hw.fp.err_stats.err_phinv++ ; if (code_s2l & FM_SSIFG) smc->hw.fp.err_stats.err_sifg_det++ ; if (code_s2l & FM_STKISS) smc->hw.fp.err_stats.err_tkiss++ ; if (code_s2l & FM_STKERR) smc->hw.fp.err_stats.err_tkerr++ ; if (code_s2l & FM_SFRMCTR) smc->mib.m[MAC0].fddiMACFrame_Ct += 0x10000L ; if (code_s2l & FM_SERRCTR) smc->mib.m[MAC0].fddiMACError_Ct += 0x10000L ; if (code_s2l & FM_SLSTCTR) smc->mib.m[MAC0].fddiMACLost_Ct += 0x10000L ; if (code_s2u & FM_SERRSF) { SMT_PANIC(smc,SMT_E0114, SMT_E0114_MSG) ; } mac2_end: /* notice old status */ smc->hw.fp.s2l = code_s2l ; smc->hw.fp.s2u = code_s2u ; outpw(FM_A(FM_IMSK2U),~mac_imsk2u) ; } /* * mac3_irq: receive queue 2 bits and address detection bits */ void mac3_irq(struct s_smc *smc, u_short code_s3u, u_short code_s3l) { UNUSED(code_s3l) ; if (code_s3u & (FM_SRCVOVR2 | /* recv. FIFO overflow */ FM_SRBFL2)) { /* recv. buffer full */ smc->hw.mac_ct.mac_r_restart_counter++ ; smt_stat_counter(smc,1); } if (code_s3u & FM_SRPERRQ2) { /* parity error receive queue 2 */ SMT_PANIC(smc,SMT_E0115, SMT_E0115_MSG) ; } if (code_s3u & FM_SRPERRQ1) { /* parity error receive queue 2 */ SMT_PANIC(smc,SMT_E0116, SMT_E0116_MSG) ; } } /* * take formac offline */ static void formac_offline(struct s_smc *smc) { outpw(FM_A(FM_CMDREG2),FM_IACTR) ;/* abort current transmit activity */ /* disable receive function */ SETMASK(FM_A(FM_MDREG1),FM_MDISRCV,FM_ADDET) ; /* FORMAC+ 'Initialize Mode' */ SETMASK(FM_A(FM_MDREG1),FM_MINIT,FM_MMODE) ; disable_formac(smc) ; smc->hw.mac_ring_is_up = FALSE ; smc->hw.hw_state = STOPPED ; } /* * bring formac online */ static void formac_online(struct s_smc *smc) { enable_formac(smc) ; SETMASK(FM_A(FM_MDREG1),FM_MONLINE | FM_SELRA | MDR1INIT | smc->hw.fp.rx_mode, FM_MMODE | FM_SELRA | FM_ADDRX) ; } /* * FORMAC+ full init. (tx, rx, timer, counter, claim & beacon) */ int init_fplus(struct s_smc *smc) { smc->hw.fp.nsa_mode = FM_MRNNSAFNMA ; smc->hw.fp.rx_mode = FM_MDAMA ; smc->hw.fp.group_addr = fddi_broadcast ; smc->hw.fp.func_addr = 0 ; smc->hw.fp.frselreg_init = 0 ; init_driver_fplus(smc) ; if (smc->s.sas == SMT_DAS) smc->hw.fp.mdr3init |= FM_MENDAS ; smc->hw.mac_ct.mac_nobuf_counter = 0 ; smc->hw.mac_ct.mac_r_restart_counter = 0 ; smc->hw.fp.fm_st1u = (HW_PTR) ADDR(B0_ST1U) ; smc->hw.fp.fm_st1l = (HW_PTR) ADDR(B0_ST1L) ; smc->hw.fp.fm_st2u = (HW_PTR) ADDR(B0_ST2U) ; smc->hw.fp.fm_st2l = (HW_PTR) ADDR(B0_ST2L) ; smc->hw.fp.fm_st3u = (HW_PTR) ADDR(B0_ST3U) ; smc->hw.fp.fm_st3l = (HW_PTR) ADDR(B0_ST3L) ; smc->hw.fp.s2l = smc->hw.fp.s2u = 0 ; smc->hw.mac_ring_is_up = 0 ; mac_counter_init(smc) ; /* convert BCKL units to symbol time */ smc->hw.mac_pa.t_neg = (u_long)0 ; smc->hw.mac_pa.t_pri = (u_long)0 ; /* make sure all PCI settings are correct */ mac_do_pci_fix(smc) ; return(init_mac(smc,1)) ; /* enable_formac(smc) ; */ } static int init_mac(struct s_smc *smc, int all) { u_short t_max,x ; u_long time=0 ; /* * clear memory */ outpw(FM_A(FM_MDREG1),FM_MINIT) ; /* FORMAC+ init mode */ set_formac_addr(smc) ; outpw(FM_A(FM_MDREG1),FM_MMEMACT) ; /* FORMAC+ memory activ mode */ /* Note: Mode register 2 is set here, incase parity is enabled. */ outpw(FM_A(FM_MDREG2),smc->hw.fp.mdr2init) ; if (all) { init_ram(smc) ; } else { /* * reset the HPI, the Master and the BMUs */ outp(ADDR(B0_CTRL), CTRL_HPI_SET) ; time = hwt_quick_read(smc) ; } /* * set all pointers, frames etc */ smt_split_up_fifo(smc) ; init_tx(smc) ; init_rx(smc) ; init_rbc(smc) ; build_claim_beacon(smc,smc->mib.m[MAC0].fddiMACT_Req) ; /* set RX threshold */ /* see Errata #SN2 Phantom receive overflow */ outpw(FM_A(FM_FRMTHR),14<<12) ; /* switch on */ /* set formac work mode */ outpw(FM_A(FM_MDREG1),MDR1INIT | FM_SELRA | smc->hw.fp.rx_mode) ; outpw(FM_A(FM_MDREG2),smc->hw.fp.mdr2init) ; outpw(FM_A(FM_MDREG3),smc->hw.fp.mdr3init) ; outpw(FM_A(FM_FRSELREG),smc->hw.fp.frselreg_init) ; /* set timer */ /* * errata #22 fplus: * T_MAX must not be FFFE * or one of FFDF, FFB8, FF91 (-0x27 etc..) */ t_max = (u_short)(smc->mib.m[MAC0].fddiMACT_Max/32) ; x = t_max/0x27 ; x *= 0x27 ; if ((t_max == 0xfffe) || (t_max - x == 0x16)) t_max-- ; outpw(FM_A(FM_TMAX),(u_short)t_max) ; /* BugFix for report #10204 */ if (smc->mib.m[MAC0].fddiMACTvxValue < (u_long) (- US2BCLK(52))) { outpw(FM_A(FM_TVX), (u_short) (- US2BCLK(52))/255 & MB) ; } else { outpw(FM_A(FM_TVX), (u_short)((smc->mib.m[MAC0].fddiMACTvxValue/255) & MB)) ; } outpw(FM_A(FM_CMDREG1),FM_ICLLS) ; /* clear s-frame lock */ outpw(FM_A(FM_CMDREG1),FM_ICLLA0) ; /* clear a-frame lock */ outpw(FM_A(FM_CMDREG1),FM_ICLLR); /* clear receive lock */ /* Auto unlock receice threshold for receive queue 1 and 2 */ outpw(FM_A(FM_UNLCKDLY),(0xff|(0xff<<8))) ; rtm_init(smc) ; /* RT-Monitor */ if (!all) { /* * after 10ms, reset the BMUs and repair the rings */ hwt_wait_time(smc,time,MS2BCLK(10)) ; outpd(ADDR(B0_R1_CSR),CSR_SET_RESET) ; outpd(ADDR(B0_XA_CSR),CSR_SET_RESET) ; outpd(ADDR(B0_XS_CSR),CSR_SET_RESET) ; outp(ADDR(B0_CTRL), CTRL_HPI_CLR) ; outpd(ADDR(B0_R1_CSR),CSR_CLR_RESET) ; outpd(ADDR(B0_XA_CSR),CSR_CLR_RESET) ; outpd(ADDR(B0_XS_CSR),CSR_CLR_RESET) ; if (!smc->hw.hw_is_64bit) { outpd(ADDR(B4_R1_F), RX_WATERMARK) ; outpd(ADDR(B5_XA_F), TX_WATERMARK) ; outpd(ADDR(B5_XS_F), TX_WATERMARK) ; } smc->hw.hw_state = STOPPED ; mac_drv_repair_descr(smc) ; } smc->hw.hw_state = STARTED ; return(0) ; } /* * called by CFM */ void config_mux(struct s_smc *smc, int mux) { plc_config_mux(smc,mux) ; SETMASK(FM_A(FM_MDREG1),FM_SELRA,FM_SELRA) ; } /* * called by RMT * enable CLAIM/BEACON interrupts * (only called if these events are of interest, e.g. in DETECT state * the interrupt must not be permanently enabled * RMT calls this function periodically (timer driven polling) */ void sm_mac_check_beacon_claim(struct s_smc *smc) { /* set formac IMSK : 0 enables irq */ outpw(FM_A(FM_IMSK2U),~(mac_imsk2u | mac_beacon_imsk2u)) ; /* the driver must receive the directed beacons */ formac_rcv_restart(smc) ; process_receive(smc) ; } /*-------------------------- interface functions ----------------------------*/ /* * control MAC layer (called by RMT) */ void sm_ma_control(struct s_smc *smc, int mode) { switch(mode) { case MA_OFFLINE : /* Add to make the MAC offline in RM0_ISOLATED state */ formac_offline(smc) ; break ; case MA_RESET : (void)init_mac(smc,0) ; break ; case MA_BEACON : formac_online(smc) ; break ; case MA_DIRECTED : directed_beacon(smc) ; break ; case MA_TREQ : /* * no actions necessary, TREQ is already set */ break ; } } int sm_mac_get_tx_state(struct s_smc *smc) { return((inpw(FM_A(FM_STMCHN))>>4)&7) ; } /* * multicast functions */ static struct s_fpmc* mac_get_mc_table(struct s_smc *smc, struct fddi_addr *user, struct fddi_addr *own, int del, int can) { struct s_fpmc *tb ; struct s_fpmc *slot ; u_char *p ; int i ; /* * set own = can(user) */ *own = *user ; if (can) { p = own->a ; for (i = 0 ; i < 6 ; i++, p++) *p = bitrev8(*p); } slot = NULL; for (i = 0, tb = smc->hw.fp.mc.table ; i < FPMAX_MULTICAST ; i++, tb++){ if (!tb->n) { /* not used */ if (!del && !slot) /* if !del save first free */ slot = tb ; continue ; } if (memcmp((char *)&tb->a,(char *)own,6)) continue ; return(tb) ; } return(slot) ; /* return first free or NULL */ } /* BEGIN_MANUAL_ENTRY(if,func;others;2) void mac_clear_multicast(smc) struct s_smc *smc ; Function DOWNCALL (SMT, fplustm.c) Clear all multicast entries END_MANUAL_ENTRY() */ void mac_clear_multicast(struct s_smc *smc) { struct s_fpmc *tb ; int i ; smc->hw.fp.os_slots_used = 0 ; /* note the SMT addresses */ /* will not be deleted */ for (i = 0, tb = smc->hw.fp.mc.table ; i < FPMAX_MULTICAST ; i++, tb++){ if (!tb->perm) { tb->n = 0 ; } } } /* BEGIN_MANUAL_ENTRY(if,func;others;2) int mac_add_multicast(smc,addr,can) struct s_smc *smc ; struct fddi_addr *addr ; int can ; Function DOWNCALL (SMC, fplustm.c) Add an entry to the multicast table Para addr pointer to a multicast address can = 0: the multicast address has the physical format = 1: the multicast address has the canonical format | 0x80 permanent Returns 0: success 1: address table full Note After a 'driver reset' or a 'station set address' all entries of the multicast table are cleared. In this case the driver has to fill the multicast table again. After the operating system dependent module filled the multicast table it must call mac_update_multicast to activate the new multicast addresses! END_MANUAL_ENTRY() */ int mac_add_multicast(struct s_smc *smc, struct fddi_addr *addr, int can) { SK_LOC_DECL(struct fddi_addr,own) ; struct s_fpmc *tb ; /* * check if there are free table entries */ if (can & 0x80) { if (smc->hw.fp.smt_slots_used >= SMT_MAX_MULTI) { return(1) ; } } else { if (smc->hw.fp.os_slots_used >= FPMAX_MULTICAST-SMT_MAX_MULTI) { return(1) ; } } /* * find empty slot */ if (!(tb = mac_get_mc_table(smc,addr,&own,0,can & ~0x80))) return(1) ; tb->n++ ; tb->a = own ; tb->perm = (can & 0x80) ? 1 : 0 ; if (can & 0x80) smc->hw.fp.smt_slots_used++ ; else smc->hw.fp.os_slots_used++ ; return(0) ; } /* * mode */ #define RX_MODE_PROM 0x1 #define RX_MODE_ALL_MULTI 0x2 /* BEGIN_MANUAL_ENTRY(if,func;others;2) void mac_update_multicast(smc) struct s_smc *smc ; Function DOWNCALL (SMT, fplustm.c) Update FORMAC multicast registers END_MANUAL_ENTRY() */ void mac_update_multicast(struct s_smc *smc) { struct s_fpmc *tb ; u_char *fu ; int i ; /* * invalidate the CAM */ outpw(FM_A(FM_AFCMD),FM_IINV_CAM) ; /* * set the functional address */ if (smc->hw.fp.func_addr) { fu = (u_char *) &smc->hw.fp.func_addr ; outpw(FM_A(FM_AFMASK2),0xffff) ; outpw(FM_A(FM_AFMASK1),(u_short) ~((fu[0] << 8) + fu[1])) ; outpw(FM_A(FM_AFMASK0),(u_short) ~((fu[2] << 8) + fu[3])) ; outpw(FM_A(FM_AFPERS),FM_VALID|FM_DA) ; outpw(FM_A(FM_AFCOMP2), 0xc000) ; outpw(FM_A(FM_AFCOMP1), 0x0000) ; outpw(FM_A(FM_AFCOMP0), 0x0000) ; outpw(FM_A(FM_AFCMD),FM_IWRITE_CAM) ; } /* * set the mask and the personality register(s) */ outpw(FM_A(FM_AFMASK0),0xffff) ; outpw(FM_A(FM_AFMASK1),0xffff) ; outpw(FM_A(FM_AFMASK2),0xffff) ; outpw(FM_A(FM_AFPERS),FM_VALID|FM_DA) ; for (i = 0, tb = smc->hw.fp.mc.table; i < FPMAX_MULTICAST; i++, tb++) { if (tb->n) { CHECK_CAM() ; /* * write the multicast address into the CAM */ outpw(FM_A(FM_AFCOMP2), (u_short)((tb->a.a[0]<<8)+tb->a.a[1])) ; outpw(FM_A(FM_AFCOMP1), (u_short)((tb->a.a[2]<<8)+tb->a.a[3])) ; outpw(FM_A(FM_AFCOMP0), (u_short)((tb->a.a[4]<<8)+tb->a.a[5])) ; outpw(FM_A(FM_AFCMD),FM_IWRITE_CAM) ; } } } /* BEGIN_MANUAL_ENTRY(if,func;others;3) void mac_set_rx_mode(smc,mode) struct s_smc *smc ; int mode ; Function DOWNCALL/INTERN (SMT, fplustm.c) This function enables / disables the selected receive. Don't call this function if the hardware module is used -- use mac_drv_rx_mode() instead of. Para mode = 1 RX_ENABLE_ALLMULTI enable all multicasts 2 RX_DISABLE_ALLMULTI disable "enable all multicasts" 3 RX_ENABLE_PROMISC enable promiscous 4 RX_DISABLE_PROMISC disable promiscous 5 RX_ENABLE_NSA enable reception of NSA frames 6 RX_DISABLE_NSA disable reception of NSA frames Note The selected receive modes will be lost after 'driver reset' or 'set station address' END_MANUAL_ENTRY */ void mac_set_rx_mode(struct s_smc *smc, int mode) { switch (mode) { case RX_ENABLE_ALLMULTI : smc->hw.fp.rx_prom |= RX_MODE_ALL_MULTI ; break ; case RX_DISABLE_ALLMULTI : smc->hw.fp.rx_prom &= ~RX_MODE_ALL_MULTI ; break ; case RX_ENABLE_PROMISC : smc->hw.fp.rx_prom |= RX_MODE_PROM ; break ; case RX_DISABLE_PROMISC : smc->hw.fp.rx_prom &= ~RX_MODE_PROM ; break ; case RX_ENABLE_NSA : smc->hw.fp.nsa_mode = FM_MDAMA ; smc->hw.fp.rx_mode = (smc->hw.fp.rx_mode & ~FM_ADDET) | smc->hw.fp.nsa_mode ; break ; case RX_DISABLE_NSA : smc->hw.fp.nsa_mode = FM_MRNNSAFNMA ; smc->hw.fp.rx_mode = (smc->hw.fp.rx_mode & ~FM_ADDET) | smc->hw.fp.nsa_mode ; break ; } if (smc->hw.fp.rx_prom & RX_MODE_PROM) { smc->hw.fp.rx_mode = FM_MLIMPROM ; } else if (smc->hw.fp.rx_prom & RX_MODE_ALL_MULTI) { smc->hw.fp.rx_mode = smc->hw.fp.nsa_mode | FM_EXGPA0 ; } else smc->hw.fp.rx_mode = smc->hw.fp.nsa_mode ; SETMASK(FM_A(FM_MDREG1),smc->hw.fp.rx_mode,FM_ADDRX) ; mac_update_multicast(smc) ; } /* BEGIN_MANUAL_ENTRY(module;tests;3) How to test the Restricted Token Monitor ---------------------------------------------------------------- o Insert a break point in the function rtm_irq() o Remove all stations with a restricted token monitor from the network. o Connect a UPPS ISA or EISA station to the network. o Give the FORMAC of UPPS station the command to send restricted tokens until the ring becomes instable. o Now connect your test test client. o The restricted token monitor should detect the restricted token, and your break point will be reached. o You can ovserve how the station will clean the ring. END_MANUAL_ENTRY */ void rtm_irq(struct s_smc *smc) { outpw(ADDR(B2_RTM_CRTL),TIM_CL_IRQ) ; /* clear IRQ */ if (inpw(ADDR(B2_RTM_CRTL)) & TIM_RES_TOK) { outpw(FM_A(FM_CMDREG1),FM_ICL) ; /* force claim */ DB_RMT("RMT: fddiPATHT_Rmode expired\n",0,0) ; AIX_EVENT(smc, (u_long) FDDI_RING_STATUS, (u_long) FDDI_SMT_EVENT, (u_long) FDDI_RTT, smt_get_event_word(smc)); } outpw(ADDR(B2_RTM_CRTL),TIM_START) ; /* enable RTM monitoring */ } static void rtm_init(struct s_smc *smc) { outpd(ADDR(B2_RTM_INI),0) ; /* timer = 0 */ outpw(ADDR(B2_RTM_CRTL),TIM_START) ; /* enable IRQ */ } void rtm_set_timer(struct s_smc *smc) { /* * MIB timer and hardware timer have the same resolution of 80nS */ DB_RMT("RMT: setting new fddiPATHT_Rmode, t = %d ns \n", (int) smc->mib.a[PATH0].fddiPATHT_Rmode,0) ; outpd(ADDR(B2_RTM_INI),smc->mib.a[PATH0].fddiPATHT_Rmode) ; } static void smt_split_up_fifo(struct s_smc *smc) { /* BEGIN_MANUAL_ENTRY(module;mem;1) ------------------------------------------------------------- RECEIVE BUFFER MEMORY DIVERSION ------------------------------------------------------------- R1_RxD == SMT_R1_RXD_COUNT R2_RxD == SMT_R2_RXD_COUNT SMT_R1_RXD_COUNT must be unequal zero | R1_RxD R2_RxD |R1_RxD R2_RxD | R1_RxD R2_RxD | x 0 | x 1-3 | x < 3 ---------------------------------------------------------------------- | 63,75 kB | 54,75 | R1_RxD rx queue 1 | RX_FIFO_SPACE | RX_LARGE_FIFO| ------------- * 63,75 kB | | | R1_RxD+R2_RxD ---------------------------------------------------------------------- | | 9 kB | R2_RxD rx queue 2 | 0 kB | RX_SMALL_FIFO| ------------- * 63,75 kB | (not used) | | R1_RxD+R2_RxD END_MANUAL_ENTRY */ if (SMT_R1_RXD_COUNT == 0) { SMT_PANIC(smc,SMT_E0117, SMT_E0117_MSG) ; } switch(SMT_R2_RXD_COUNT) { case 0: smc->hw.fp.fifo.rx1_fifo_size = RX_FIFO_SPACE ; smc->hw.fp.fifo.rx2_fifo_size = 0 ; break ; case 1: case 2: case 3: smc->hw.fp.fifo.rx1_fifo_size = RX_LARGE_FIFO ; smc->hw.fp.fifo.rx2_fifo_size = RX_SMALL_FIFO ; break ; default: /* this is not the real defaule */ smc->hw.fp.fifo.rx1_fifo_size = RX_FIFO_SPACE * SMT_R1_RXD_COUNT/(SMT_R1_RXD_COUNT+SMT_R2_RXD_COUNT) ; smc->hw.fp.fifo.rx2_fifo_size = RX_FIFO_SPACE * SMT_R2_RXD_COUNT/(SMT_R1_RXD_COUNT+SMT_R2_RXD_COUNT) ; break ; } /* BEGIN_MANUAL_ENTRY(module;mem;1) ------------------------------------------------------------- TRANSMIT BUFFER MEMORY DIVERSION ------------------------------------------------------------- | no sync bw | sync bw available and | sync bw available and | available | SynchTxMode = SPLIT | SynchTxMode = ALL ----------------------------------------------------------------------- sync tx | 0 kB | 32 kB | 55 kB queue | | TX_MEDIUM_FIFO | TX_LARGE_FIFO ----------------------------------------------------------------------- async tx | 64 kB | 32 kB | 9 k queue | TX_FIFO_SPACE| TX_MEDIUM_FIFO | TX_SMALL_FIFO END_MANUAL_ENTRY */ /* * set the tx mode bits */ if (smc->mib.a[PATH0].fddiPATHSbaPayload) { #ifdef ESS smc->hw.fp.fifo.fifo_config_mode |= smc->mib.fddiESSSynchTxMode | SYNC_TRAFFIC_ON ; #endif } else { smc->hw.fp.fifo.fifo_config_mode &= ~(SEND_ASYNC_AS_SYNC|SYNC_TRAFFIC_ON) ; } /* * split up the FIFO */ if (smc->hw.fp.fifo.fifo_config_mode & SYNC_TRAFFIC_ON) { if (smc->hw.fp.fifo.fifo_config_mode & SEND_ASYNC_AS_SYNC) { smc->hw.fp.fifo.tx_s_size = TX_LARGE_FIFO ; smc->hw.fp.fifo.tx_a0_size = TX_SMALL_FIFO ; } else { smc->hw.fp.fifo.tx_s_size = TX_MEDIUM_FIFO ; smc->hw.fp.fifo.tx_a0_size = TX_MEDIUM_FIFO ; } } else { smc->hw.fp.fifo.tx_s_size = 0 ; smc->hw.fp.fifo.tx_a0_size = TX_FIFO_SPACE ; } smc->hw.fp.fifo.rx1_fifo_start = smc->hw.fp.fifo.rbc_ram_start + RX_FIFO_OFF ; smc->hw.fp.fifo.tx_s_start = smc->hw.fp.fifo.rx1_fifo_start + smc->hw.fp.fifo.rx1_fifo_size ; smc->hw.fp.fifo.tx_a0_start = smc->hw.fp.fifo.tx_s_start + smc->hw.fp.fifo.tx_s_size ; smc->hw.fp.fifo.rx2_fifo_start = smc->hw.fp.fifo.tx_a0_start + smc->hw.fp.fifo.tx_a0_size ; DB_SMT("FIFO split: mode = %x\n",smc->hw.fp.fifo.fifo_config_mode,0) ; DB_SMT("rbc_ram_start = %x rbc_ram_end = %x\n", smc->hw.fp.fifo.rbc_ram_start, smc->hw.fp.fifo.rbc_ram_end) ; DB_SMT("rx1_fifo_start = %x tx_s_start = %x\n", smc->hw.fp.fifo.rx1_fifo_start, smc->hw.fp.fifo.tx_s_start) ; DB_SMT("tx_a0_start = %x rx2_fifo_start = %x\n", smc->hw.fp.fifo.tx_a0_start, smc->hw.fp.fifo.rx2_fifo_start) ; } void formac_reinit_tx(struct s_smc *smc) { /* * Split up the FIFO and reinitialize the MAC if synchronous * bandwidth becomes available but no synchronous queue is * configured. */ if (!smc->hw.fp.fifo.tx_s_size && smc->mib.a[PATH0].fddiPATHSbaPayload){ (void)init_mac(smc,0) ; } }