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BranchCommit messageAuthorAge
archive/unc-master-3.0P-FP: fix BUG_ON releated to priority inheritanceBjoern Brandenburg13 years
archived-2013.1uncachedev: mmap memory that is not cached by CPUsGlenn Elliott12 years
archived-private-masterMerge branch 'wip-2.6.34' into old-private-masterAndrea Bastoni15 years
archived-semi-partMerge branch 'wip-semi-part' of ssh://cvs/cvs/proj/litmus/repo/litmus2010 int...Andrea Bastoni15 years
demoFurther refinementsJonathan Herman14 years
ecrts-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
ecrts14-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
gpusync-rtss12Final GPUSync implementation.Glenn Elliott12 years
gpusync/stagingRename IKGLP R2DGLP.Glenn Elliott12 years
linux-tipMerge branch 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/p...Linus Torvalds15 years
litmus2008-patch-seriesadd i386 feather-trace implementationBjoern B. Brandenburg16 years
masterPSN-EDF: use inferred_sporadic_job_release_atBjoern Brandenburg9 years
pgmmake it compileGlenn Elliott12 years
prop/litmus-signalsInfrastructure for Litmus signals.Glenn Elliott13 years
prop/robust-tie-breakFixed bug in edf_higher_prio().Glenn Elliott13 years
stagingFix tracepoint compilation errorFelipe Cerqueira13 years
test9/23/2016Namhoon Kim9 years
tracing-develTest kernel tracing events capabilitiesAndrea Bastoni16 years
v2.6.34-with-arm-patchessmsc911x: Add spinlocks around registers accessCatalin Marinas15 years
v2015.1Add ARM syscall def for get_current_budgetBjoern Brandenburg10 years
wip-2011.2-bbbLitmus core: simplify np-section protocolBjoern B. Brandenburg14 years
wip-2011.2-bbb-traceRefactor sched_trace_log_message() -> debug_trace_log_message()Andrea Bastoni14 years
wip-2012.3-gpuSOBLIV draining support for C-EDF.Glenn Elliott12 years
wip-2012.3-gpu-preportpick up last C-RM fileGlenn Elliott12 years
wip-2012.3-gpu-rtss13Fix critical bug in GPU tracker.Glenn Elliott12 years
wip-2012.3-gpu-sobliv-budget-w-ksharkProper sobliv draining and many bug fixes.Glenn Elliott12 years
wip-aedzl-finalMake it easier to compile AEDZL interfaces in liblitmus.Glenn Elliott15 years
wip-aedzl-revisedAdd sched_trace data for Apative EDZLGlenn Elliott15 years
wip-arbit-deadlineFix compilation bug.Glenn Elliott13 years
wip-aux-tasksDescription of refined aux task inheritance.Glenn Elliott13 years
wip-bbbGSN-EDF & Core: improve debug TRACE'ing for NP sectionsBjoern B. Brandenburg14 years
wip-bbb-prio-donuse correct timestampBjoern B. Brandenburg14 years
wip-better-breakImplement hash-based EDF tie-breaking.Glenn Elliott13 years
wip-binary-heapMake C-EDF work with simplified binheap_deleteGlenn Elliott13 years
wip-budgetAdded support for choices in budget policy enforcement.Glenn Elliott15 years
wip-colorSummarize schedulability with final recordJonathan Herman13 years
wip-color-jlhsched_color: Fixed two bugs causing crashing on experiment restart and a rare...Jonathan Herman13 years
wip-d10-hz1000Enable HZ=1000 on District 10Bjoern B. Brandenburg15 years
wip-default-clusteringFeature: Make default C-EDF clustering compile-time configurable.Glenn Elliott15 years
wip-dissipation-jericksoUpdate from 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-dissipation2-jericksoUpdate 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-ecrts14-pgmMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
wip-edf-hsblast tested versionJonathan Herman14 years
wip-edf-osLookup table EDF-osJeremy Erickson12 years
wip-edf-tie-breakMerge branch 'wip-edf-tie-break' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus...Glenn Elliott13 years
wip-edzl-critiqueUse hr_timer's active checks instead of having own flag.Glenn Elliott15 years
wip-edzl-finalImplementation of the EDZL scheduler.Glenn Elliott15 years
wip-edzl-revisedClean up comments.Glenn Elliott15 years
wip-eventsAdded support for tracing arbitrary actions.Jonathan Herman15 years
wip-extra-debugDBG: add additional tracingBjoern B. Brandenburg15 years
wip-fix-switch-jericksoAttempt to fix race condition with plugin switchingJeremy Erickson15 years
wip-fix3sched: show length of runqueue clock deactivation in /proc/sched_debugBjoern B. Brandenburg15 years
wip-fmlp-dequeueImprove FMLP queue management.Glenn Elliott14 years
wip-ft-irq-flagFeather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-gpu-cleanupEnable sched_trace log injection from userspaceGlenn Elliott13 years
wip-gpu-interruptsRemove option for threading of all softirqs.Glenn Elliott14 years
wip-gpu-rtas12Generalized GPU cost predictors + EWMA. (untested)Glenn Elliott13 years
wip-gpu-rtss12Final GPUSync implementation.Glenn Elliott13 years
wip-gpu-rtss12-srpexperimental changes to support GPUs under SRPGlenn Elliott13 years
wip-gpusync-mergeCleanup priority tracking for budget enforcement.Glenn Elliott11 years
wip-ikglpMove RSM and IKGLP imp. to own .c filesGlenn Elliott13 years
wip-k-fmlpMerge branch 'mpi-master' into wip-k-fmlpGlenn Elliott14 years
wip-kernel-coloringAdded recolor syscallNamhoon Kim7 years
wip-kernthreadsKludge work-queue processing into klitirqd.Glenn Elliott15 years
wip-klmirqd-to-auxAllow klmirqd threads to be given names.Glenn Elliott13 years
wip-ksharkMerge branch 'mpi-staging' into wip-ksharkJonathan Herman13 years
wip-litmus-3.2Merge commit 'v3.2' into litmus-stagingAndrea Bastoni13 years
wip-litmus2011.2Cleanup: Coding conformance for affinity stuff.Glenn Elliott14 years
wip-litmus3.0-2011.2Feather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-master-2.6.33-rtAvoid deadlock when switching task policy to BACKGROUND (ugly)Andrea Bastoni15 years
wip-mcRemoved ARM-specific hacks which disabled less common mixed-criticality featu...Jonathan Herman12 years
wip-mc-bipasaMC-EDF addedbipasa chattopadhyay13 years
wip-mc-jericksoSplit C/D queuesJeremy Erickson15 years
wip-mc2-cache-slackManually patched mc^2 related codeMing Yang10 years
wip-mcrit-maccosmeticMac Mollison15 years
wip-merge-3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-merge-v3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-migration-affinityNULL affinity dereference in C-EDF.Glenn Elliott14 years
wip-mmap-uncacheshare branch with othersGlenn Elliott13 years
wip-modechangeRTSS 2017 submissionNamhoon Kim8 years
wip-nested-lockingAppears to be working.Bryan Ward12 years
wip-omlp-gedfFirst implementation of G-OMLP.Glenn Elliott15 years
wip-paiSome cleanup of PAIGlenn Elliott14 years
wip-percore-lib9/21/2016Namhoon Kim9 years
wip-performanceCONFIG_DONT_PREEMPT_ON_TIE: Don't preeempt a scheduled task on priority tie.Glenn Elliott14 years
wip-pgmAdd PGM support to C-FLGlenn Elliott12 years
wip-pgm-splitFirst draft of C-FL-splitNamhoon Kim12 years
wip-pm-ovdAdd preemption-and-migration overhead tracing supportAndrea Bastoni15 years
wip-prio-inhP-EDF updated to use the generic pi framework.Glenn Elliott15 years
wip-prioq-dglBUG FIX: Support DGLs with PRIOQ_MUTEXGlenn Elliott13 years
wip-refactored-gedfGeneralizd architecture for GEDF-style scheduelrs to reduce code redundancy.Glenn Elliott15 years
wip-release-master-fixbugfix: release master CPU must signal task was pickedBjoern B. Brandenburg14 years
wip-robust-tie-breakEDF priority tie-breaks.Glenn Elliott13 years
wip-rt-ksharkMove task time accounting into the complete_job method.Jonathan Herman13 years
wip-rtas12-pgmScheduling of PGM jobs.Glenn Elliott13 years
wip-semi-partFix compile error with newer GCCJeremy Erickson12 years
wip-semi-part-edfos-jericksoUse initial CPU set by clientJeremy Erickson12 years
wip-shared-libTODO: Fix condition checks in replicate_page_move_mapping()Namhoon Kim9 years
wip-shared-lib2RTAS 2017 Submission ver.Namhoon Kim9 years
wip-shared-memInitial commit for shared libraryNamhoon Kim9 years
wip-splitting-jericksoFix release behaviorJeremy Erickson13 years
wip-splitting-omlp-jericksoBjoern's Dissertation Code with Priority DonationJeremy Erickson13 years
wip-stage-binheapAn efficient binary heap implementation.Glenn Elliott13 years
wip-sun-portDynamic memory allocation and clean exit for FeatherTraceChristopher Kenna15 years
wip-timer-tracebugfix: C-EDF, clear scheduled field of the correct CPU upon task_exitAndrea Bastoni15 years
wip-tracepointsAdd kernel-style events for sched_trace_XXX() functionsAndrea Bastoni14 years
 
TagDownloadAuthorAge
2015.1commit 8e51b37822...Bjoern Brandenburg10 years
2013.1commit bcaacec1ca...Glenn Elliott12 years
2012.3commit c158b5fbe4...Jonathan Herman13 years
2012.2commit b53c479a0f...Glenn Elliott13 years
2012.1commit 83b11ea1c6...Bjoern B. Brandenburg14 years
rtas12-mc-beta-expcommit 8e236ee20f...Christopher Kenna14 years
2011.1commit d11808b5c6...Christopher Kenna15 years
v2.6.37-rc4commit e8a7e48bb2...Linus Torvalds15 years
v2.6.37-rc3commit 3561d43fd2...Linus Torvalds15 years
v2.6.37-rc2commit e53beacd23...Linus Torvalds15 years
v2.6.37-rc1commit c8ddb2713c...Linus Torvalds15 years
v2.6.36commit f6f94e2ab1...Linus Torvalds15 years
2010.2commit 5c5456402d...Bjoern B. Brandenburg15 years
v2.6.36-rc8commit cd07202cc8...Linus Torvalds15 years
v2.6.36-rc7commit cb655d0f3d...Linus Torvalds15 years
v2.6.36-rc6commit 899611ee7d...Linus Torvalds15 years
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2010.1commit 7c1ff4c544...Andrea Bastoni15 years
v2.6.34commit e40152ee1e...Linus Torvalds15 years
v2.6.33.4commit 4640b4e7d9...Greg Kroah-Hartman15 years
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v2.6.15-rc3commit 624f54be20...Linus Torvalds20 years
v2.6.15-rc2commit 3bedff1d73...Linus Torvalds20 years
v2.6.15-rc1commit cd52d1ee9a...Linus Torvalds20 years
v2.6.14commit 741b2252a5...Linus Torvalds20 years
v2.6.14-rc5commit 93918e9afc...Linus Torvalds20 years
v2.6.14-rc4commit 907a426179...Linus Torvalds20 years
v2.6.14-rc3commit 1c9426e8a5...Linus Torvalds20 years
v2.6.14-rc2commit 676d55ae30...Linus Torvalds20 years
v2.6.14-rc1commit 2f4ba45a75...Linus Torvalds20 years
v2.6.13commit 02b3e4e2d7...Linus Torvalds20 years
v2.6.13-rc7commit 0572e3da3f...Linus Torvalds20 years
v2.6.13-rc6commit 6fc32179de...Linus Torvalds20 years
v2.6.13-rc5commit 9a351e30d7...Linus Torvalds20 years
v2.6.13-rc4commit 6395352334...Linus Torvalds20 years
v2.6.11tree c39ae07f39...
v2.6.11-treetree c39ae07f39...
v2.6.12commit 9ee1c939d1...
v2.6.12-rc2commit 1da177e4c3...
v2.6.12-rc3commit a2755a80f4...
v2.6.12-rc4commit 88d7bd8cb9...
v2.6.12-rc5commit 2a24ab628a...
v2.6.12-rc6commit 7cef5677ef...
v2.6.13-rc1commit 4c91aedb75...
v2.6.13-rc2commit a18bcb7450...
v2.6.13-rc3commit c32511e271...
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-10 10:53:10 -0400
class="hl opt">); /* reset CRC generator */ or(scc,R10,ABUNDER); /* re-install underrun protection */ Outb(scc->data,*skb->data); /* send byte */ skb_pull(skb, 1); if (!scc->enhanced) /* reset EOM latch */ Outb(scc->ctrl,RES_EOM_L); return; } /* End Of Frame... */ if (skb->len == 0) { Outb(scc->ctrl, RES_Tx_P); /* reset pending int */ cl(scc, R10, ABUNDER); /* send CRC */ dev_kfree_skb_irq(skb); scc->tx_buff = NULL; scc->stat.tx_state = TXS_NEWFRAME; /* next frame... */ return; } /* send octet */ Outb(scc->data,*skb->data); skb_pull(skb, 1); } /* External/Status interrupt handler */ static inline void scc_exint(struct scc_channel *scc) { unsigned char status,changes,chg_and_stat; scc->stat.exints++; status = InReg(scc->ctrl,R0); changes = status ^ scc->status; chg_and_stat = changes & status; /* ABORT: generated whenever DCD drops while receiving */ if (chg_and_stat & BRK_ABRT) /* Received an ABORT */ flush_rx_FIFO(scc); /* HUNT: software DCD; on = waiting for SYNC, off = receiving frame */ if ((changes & SYNC_HUNT) && scc->kiss.softdcd) { if (status & SYNC_HUNT) { scc->dcd = 0; flush_rx_FIFO(scc); if ((scc->modem.clocksrc != CLK_EXTERNAL)) OutReg(scc->ctrl,R14,SEARCH|scc->wreg[R14]); /* DPLL: enter search mode */ } else { scc->dcd = 1; } scc_notify(scc, scc->dcd? HWEV_DCD_OFF:HWEV_DCD_ON); } /* DCD: on = start to receive packet, off = ABORT condition */ /* (a successfully received packet generates a special condition int) */ if((changes & DCD) && !scc->kiss.softdcd) /* DCD input changed state */ { if(status & DCD) /* DCD is now ON */ { start_hunt(scc); scc->dcd = 1; } else { /* DCD is now OFF */ cl(scc,R3,ENT_HM|RxENABLE); /* disable the receiver */ flush_rx_FIFO(scc); scc->dcd = 0; } scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF); } #ifdef notdef /* CTS: use external TxDelay (what's that good for?!) * Anyway: If we _could_ use it (BayCom USCC uses CTS for * own purposes) we _should_ use the "autoenable" feature * of the Z8530 and not this interrupt... */ if (chg_and_stat & CTS) /* CTS is now ON */ { if (scc->kiss.txdelay == 0) /* zero TXDELAY = wait for CTS */ scc_start_tx_timer(scc, t_txdelay, 0); } #endif if (scc->stat.tx_state == TXS_ACTIVE && (status & TxEOM)) { scc->stat.tx_under++; /* oops, an underrun! count 'em */ Outb(scc->ctrl, RES_EXT_INT); /* reset ext/status interrupts */ if (scc->tx_buff != NULL) { dev_kfree_skb_irq(scc->tx_buff); scc->tx_buff = NULL; } or(scc,R10,ABUNDER); scc_start_tx_timer(scc, t_txdelay, 0); /* restart transmission */ } scc->status = status; Outb(scc->ctrl,RES_EXT_INT); } /* Receiver interrupt handler */ static inline void scc_rxint(struct scc_channel *scc) { struct sk_buff *skb; scc->stat.rxints++; if((scc->wreg[5] & RTS) && scc->kiss.fulldup == KISS_DUPLEX_HALF) { Inb(scc->data); /* discard char */ or(scc,R3,ENT_HM); /* enter hunt mode for next flag */ return; } skb = scc->rx_buff; if (skb == NULL) { skb = dev_alloc_skb(scc->stat.bufsize); if (skb == NULL) { scc->dev_stat.rx_dropped++; scc->stat.nospace++; Inb(scc->data); or(scc, R3, ENT_HM); return; } scc->rx_buff = skb; *(skb_put(skb, 1)) = 0; /* KISS data */ } if (skb->len >= scc->stat.bufsize) { #ifdef notdef printk(KERN_DEBUG "z8530drv: oops, scc_rxint() received huge frame...\n"); #endif dev_kfree_skb_irq(skb); scc->rx_buff = NULL; Inb(scc->data); or(scc, R3, ENT_HM); return; } *(skb_put(skb, 1)) = Inb(scc->data); } /* Receive Special Condition interrupt handler */ static inline void scc_spint(struct scc_channel *scc) { unsigned char status; struct sk_buff *skb; scc->stat.spints++; status = InReg(scc->ctrl,R1); /* read receiver status */ Inb(scc->data); /* throw away Rx byte */ skb = scc->rx_buff; if(status & Rx_OVR) /* receiver overrun */ { scc->stat.rx_over++; /* count them */ or(scc,R3,ENT_HM); /* enter hunt mode for next flag */ if (skb != NULL) dev_kfree_skb_irq(skb); scc->rx_buff = skb = NULL; } if(status & END_FR && skb != NULL) /* end of frame */ { /* CRC okay, frame ends on 8 bit boundary and received something ? */ if (!(status & CRC_ERR) && (status & 0xe) == RES8 && skb->len > 0) { /* ignore last received byte (first of the CRC bytes) */ skb_trim(skb, skb->len-1); scc_net_rx(scc, skb); scc->rx_buff = NULL; scc->stat.rxframes++; } else { /* a bad frame */ dev_kfree_skb_irq(skb); scc->rx_buff = NULL; scc->stat.rxerrs++; } } Outb(scc->ctrl,ERR_RES); } /* ----> interrupt service routine for the Z8530 <---- */ static void scc_isr_dispatch(struct scc_channel *scc, int vector) { spin_lock(&scc->lock); switch (vector & VECTOR_MASK) { case TXINT: scc_txint(scc); break; case EXINT: scc_exint(scc); break; case RXINT: scc_rxint(scc); break; case SPINT: scc_spint(scc); break; } spin_unlock(&scc->lock); } /* If the card has a latch for the interrupt vector (like the PA0HZP card) use it to get the number of the chip that generated the int. If not: poll all defined chips. */ #define SCC_IRQTIMEOUT 30000 static irqreturn_t scc_isr(int irq, void *dev_id, struct pt_regs *regs) { unsigned char vector; struct scc_channel *scc; struct scc_ctrl *ctrl; int k; if (Vector_Latch) { for(k=0; k < SCC_IRQTIMEOUT; k++) { Outb(Vector_Latch, 0); /* Generate INTACK */ /* Read the vector */ if((vector=Inb(Vector_Latch)) >= 16 * Nchips) break; if (vector & 0x01) break; scc=&SCC_Info[vector >> 3 ^ 0x01]; if (!scc->dev) break; scc_isr_dispatch(scc, vector); OutReg(scc->ctrl,R0,RES_H_IUS); /* Reset Highest IUS */ } if (k == SCC_IRQTIMEOUT) printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?\n"); return IRQ_HANDLED; } /* Find the SCC generating the interrupt by polling all attached SCCs * reading RR3A (the interrupt pending register) */ ctrl = SCC_ctrl; while (ctrl->chan_A) { if (ctrl->irq != irq) { ctrl++; continue; } scc = NULL; for (k = 0; InReg(ctrl->chan_A,R3) && k < SCC_IRQTIMEOUT; k++) { vector=InReg(ctrl->chan_B,R2); /* Read the vector */ if (vector & 0x01) break; scc = &SCC_Info[vector >> 3 ^ 0x01]; if (!scc->dev) break; scc_isr_dispatch(scc, vector); } if (k == SCC_IRQTIMEOUT) { printk(KERN_WARNING "z8530drv: endless loop in scc_isr()?!\n"); break; } /* This looks weird and it is. At least the BayCom USCC doesn't * use the Interrupt Daisy Chain, thus we'll have to start * all over again to be sure not to miss an interrupt from * (any of) the other chip(s)... * Honestly, the situation *is* braindamaged... */ if (scc != NULL) { OutReg(scc->ctrl,R0,RES_H_IUS); ctrl = SCC_ctrl; } else ctrl++; } return IRQ_HANDLED; } /* ******************************************************************** */ /* * Init Channel */ /* ******************************************************************** */ /* ----> set SCC channel speed <---- */ static inline void set_brg(struct scc_channel *scc, unsigned int tc) { cl(scc,R14,BRENABL); /* disable baudrate generator */ wr(scc,R12,tc & 255); /* brg rate LOW */ wr(scc,R13,tc >> 8); /* brg rate HIGH */ or(scc,R14,BRENABL); /* enable baudrate generator */ } static inline void set_speed(struct scc_channel *scc) { unsigned long flags; spin_lock_irqsave(&scc->lock, flags); if (scc->modem.speed > 0) /* paranoia... */ set_brg(scc, (unsigned) (scc->clock / (scc->modem.speed * 64)) - 2); spin_unlock_irqrestore(&scc->lock, flags); } /* ----> initialize a SCC channel <---- */ static inline void init_brg(struct scc_channel *scc) { wr(scc, R14, BRSRC); /* BRG source = PCLK */ OutReg(scc->ctrl, R14, SSBR|scc->wreg[R14]); /* DPLL source = BRG */ OutReg(scc->ctrl, R14, SNRZI|scc->wreg[R14]); /* DPLL NRZI mode */ } /* * Initialization according to the Z8530 manual (SGS-Thomson's version): * * 1. Modes and constants * * WR9 11000000 chip reset * WR4 XXXXXXXX Tx/Rx control, async or sync mode * WR1 0XX00X00 select W/REQ (optional) * WR2 XXXXXXXX program interrupt vector * WR3 XXXXXXX0 select Rx control * WR5 XXXX0XXX select Tx control * WR6 XXXXXXXX sync character * WR7 XXXXXXXX sync character * WR9 000X0XXX select interrupt control * WR10 XXXXXXXX miscellaneous control (optional) * WR11 XXXXXXXX clock control * WR12 XXXXXXXX time constant lower byte (optional) * WR13 XXXXXXXX time constant upper byte (optional) * WR14 XXXXXXX0 miscellaneous control * WR14 XXXSSSSS commands (optional) * * 2. Enables * * WR14 000SSSS1 baud rate enable * WR3 SSSSSSS1 Rx enable * WR5 SSSS1SSS Tx enable * WR0 10000000 reset Tx CRG (optional) * WR1 XSS00S00 DMA enable (optional) * * 3. Interrupt status * * WR15 XXXXXXXX enable external/status * WR0 00010000 reset external status * WR0 00010000 reset external status twice * WR1 SSSXXSXX enable Rx, Tx and Ext/status * WR9 000SXSSS enable master interrupt enable * * 1 = set to one, 0 = reset to zero * X = user defined, S = same as previous init * * * Note that the implementation differs in some points from above scheme. * */ static void init_channel(struct scc_channel *scc) { del_timer(&scc->tx_t); del_timer(&scc->tx_wdog); disable_irq(scc->irq); wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ wr(scc,R1,0); /* no W/REQ operation */ wr(scc,R3,Rx8|RxCRC_ENAB); /* RX 8 bits/char, CRC, disabled */ wr(scc,R5,Tx8|DTR|TxCRC_ENAB); /* TX 8 bits/char, disabled, DTR */ wr(scc,R6,0); /* SDLC address zero (not used) */ wr(scc,R7,FLAG); /* SDLC flag value */ wr(scc,R9,VIS); /* vector includes status */ wr(scc,R10,(scc->modem.nrz? NRZ : NRZI)|CRCPS|ABUNDER); /* abort on underrun, preset CRC generator, NRZ(I) */ wr(scc,R14, 0); /* set clock sources: CLK_DPLL: normal halfduplex operation RxClk: use DPLL TxClk: use DPLL TRxC mode DPLL output CLK_EXTERNAL: external clocking (G3RUH or DF9IC modem) BayCom: others: TxClk = pin RTxC TxClk = pin TRxC RxClk = pin TRxC RxClk = pin RTxC CLK_DIVIDER: RxClk = use DPLL TxClk = pin RTxC BayCom: others: pin TRxC = DPLL pin TRxC = BRG (RxClk * 1) (RxClk * 32) */ switch(scc->modem.clocksrc) { case CLK_DPLL: wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); init_brg(scc); break; case CLK_DIVIDER: wr(scc, R11, ((scc->brand & BAYCOM)? TRxCDP : TRxCBR) | RCDPLL|TCRTxCP|TRxCOI); init_brg(scc); break; case CLK_EXTERNAL: wr(scc, R11, (scc->brand & BAYCOM)? RCTRxCP|TCRTxCP : RCRTxCP|TCTRxCP); OutReg(scc->ctrl, R14, DISDPLL); break; } set_speed(scc); /* set baudrate */ if(scc->enhanced) { or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */ wr(scc,R7,AUTOEOM); } if(scc->kiss.softdcd || (InReg(scc->ctrl,R0) & DCD)) /* DCD is now ON */ { start_hunt(scc); } /* enable ABORT, DCD & SYNC/HUNT interrupts */ wr(scc,R15, BRKIE|TxUIE|(scc->kiss.softdcd? SYNCIE:DCDIE)); Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ Outb(scc->ctrl,RES_EXT_INT); /* must be done twice */ or(scc,R1,INT_ALL_Rx|TxINT_ENAB|EXT_INT_ENAB); /* enable interrupts */ scc->status = InReg(scc->ctrl,R0); /* read initial status */ or(scc,R9,MIE); /* master interrupt enable */ scc_init_timer(scc); enable_irq(scc->irq); } /* ******************************************************************** */ /* * SCC timer functions * */ /* ******************************************************************** */ /* ----> scc_key_trx sets the time constant for the baudrate generator and keys the transmitter <---- */ static void scc_key_trx(struct scc_channel *scc, char tx) { unsigned int time_const; if (scc->brand & PRIMUS) Outb(scc->ctrl + 4, scc->option | (tx? 0x80 : 0)); if (scc->modem.speed < 300) scc->modem.speed = 1200; time_const = (unsigned) (scc->clock / (scc->modem.speed * (tx? 2:64))) - 2; disable_irq(scc->irq); if (tx) { or(scc, R1, TxINT_ENAB); /* t_maxkeyup may have reset these */ or(scc, R15, TxUIE); } if (scc->modem.clocksrc == CLK_DPLL) { /* force simplex operation */ if (tx) { #ifdef CONFIG_SCC_TRXECHO cl(scc, R3, RxENABLE|ENT_HM); /* switch off receiver */ cl(scc, R15, DCDIE|SYNCIE); /* No DCD changes, please */ #endif set_brg(scc, time_const); /* reprogram baudrate generator */ /* DPLL -> Rx clk, BRG -> Tx CLK, TRxC mode output, TRxC = BRG */ wr(scc, R11, RCDPLL|TCBR|TRxCOI|TRxCBR); /* By popular demand: tx_inhibit */ if (scc->kiss.tx_inhibit) { or(scc,R5, TxENAB); scc->wreg[R5] |= RTS; } else { or(scc,R5,RTS|TxENAB); /* set the RTS line and enable TX */ } } else { cl(scc,R5,RTS|TxENAB); set_brg(scc, time_const); /* reprogram baudrate generator */ /* DPLL -> Rx clk, DPLL -> Tx CLK, TRxC mode output, TRxC = DPLL */ wr(scc, R11, RCDPLL|TCDPLL|TRxCOI|TRxCDP); #ifndef CONFIG_SCC_TRXECHO if (scc->kiss.softdcd) #endif { or(scc,R15, scc->kiss.softdcd? SYNCIE:DCDIE); start_hunt(scc); } } } else { if (tx) { #ifdef CONFIG_SCC_TRXECHO if (scc->kiss.fulldup == KISS_DUPLEX_HALF) { cl(scc, R3, RxENABLE); cl(scc, R15, DCDIE|SYNCIE); } #endif if (scc->kiss.tx_inhibit) { or(scc,R5, TxENAB); scc->wreg[R5] |= RTS; } else { or(scc,R5,RTS|TxENAB); /* enable tx */ } } else { cl(scc,R5,RTS|TxENAB); /* disable tx */ if ((scc->kiss.fulldup == KISS_DUPLEX_HALF) && #ifndef CONFIG_SCC_TRXECHO scc->kiss.softdcd) #else 1) #endif { or(scc, R15, scc->kiss.softdcd? SYNCIE:DCDIE); start_hunt(scc); } } } enable_irq(scc->irq); } /* ----> SCC timer interrupt handler and friends. <---- */ static void __scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when) { del_timer(&scc->tx_t); if (when == 0) { handler((unsigned long) scc); } else if (when != TIMER_OFF) { scc->tx_t.data = (unsigned long) scc; scc->tx_t.function = handler; scc->tx_t.expires = jiffies + (when*HZ)/100; add_timer(&scc->tx_t); } } static void scc_start_tx_timer(struct scc_channel *scc, void (*handler)(unsigned long), unsigned long when) { unsigned long flags; spin_lock_irqsave(&scc->lock, flags); __scc_start_tx_timer(scc, handler, when); spin_unlock_irqrestore(&scc->lock, flags); } static void scc_start_defer(struct scc_channel *scc) { unsigned long flags; spin_lock_irqsave(&scc->lock, flags); del_timer(&scc->tx_wdog); if (scc->kiss.maxdefer != 0 && scc->kiss.maxdefer != TIMER_OFF) { scc->tx_wdog.data = (unsigned long) scc; scc->tx_wdog.function = t_busy; scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxdefer; add_timer(&scc->tx_wdog); } spin_unlock_irqrestore(&scc->lock, flags); } static void scc_start_maxkeyup(struct scc_channel *scc) { unsigned long flags; spin_lock_irqsave(&scc->lock, flags); del_timer(&scc->tx_wdog); if (scc->kiss.maxkeyup != 0 && scc->kiss.maxkeyup != TIMER_OFF) { scc->tx_wdog.data = (unsigned long) scc; scc->tx_wdog.function = t_maxkeyup; scc->tx_wdog.expires = jiffies + HZ*scc->kiss.maxkeyup; add_timer(&scc->tx_wdog); } spin_unlock_irqrestore(&scc->lock, flags); } /* * This is called from scc_txint() when there are no more frames to send. * Not exactly a timer function, but it is a close friend of the family... */ static void scc_tx_done(struct scc_channel *scc) { /* * trx remains keyed in fulldup mode 2 until t_idle expires. */ switch (scc->kiss.fulldup) { case KISS_DUPLEX_LINK: scc->stat.tx_state = TXS_IDLE2; if (scc->kiss.idletime != TIMER_OFF) scc_start_tx_timer(scc, t_idle, scc->kiss.idletime*100); break; case KISS_DUPLEX_OPTIMA: scc_notify(scc, HWEV_ALL_SENT); break; default: scc->stat.tx_state = TXS_BUSY; scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); } netif_wake_queue(scc->dev); } static unsigned char Rand = 17; static inline int is_grouped(struct scc_channel *scc) { int k; struct scc_channel *scc2; unsigned char grp1, grp2; grp1 = scc->kiss.group; for (k = 0; k < (Nchips * 2); k++) { scc2 = &SCC_Info[k]; grp2 = scc2->kiss.group; if (scc2 == scc || !(scc2->dev && grp2)) continue; if ((grp1 & 0x3f) == (grp2 & 0x3f)) { if ( (grp1 & TXGROUP) && (scc2->wreg[R5] & RTS) ) return 1; if ( (grp1 & RXGROUP) && scc2->dcd ) return 1; } } return 0; } /* DWAIT and SLOTTIME expired * * fulldup == 0: DCD is active or Rand > P-persistence: start t_busy timer * else key trx and start txdelay * fulldup == 1: key trx and start txdelay * fulldup == 2: mintime expired, reset status or key trx and start txdelay */ static void t_dwait(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; if (scc->stat.tx_state == TXS_WAIT) /* maxkeyup or idle timeout */ { if (skb_queue_empty(&scc->tx_queue)) { /* nothing to send */ scc->stat.tx_state = TXS_IDLE; netif_wake_queue(scc->dev); /* t_maxkeyup locked it. */ return; } scc->stat.tx_state = TXS_BUSY; } if (scc->kiss.fulldup == KISS_DUPLEX_HALF) { Rand = Rand * 17 + 31; if (scc->dcd || (scc->kiss.persist) < Rand || (scc->kiss.group && is_grouped(scc)) ) { scc_start_defer(scc); scc_start_tx_timer(scc, t_dwait, scc->kiss.slottime); return ; } } if ( !(scc->wreg[R5] & RTS) ) { scc_key_trx(scc, TX_ON); scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay); } else { scc_start_tx_timer(scc, t_txdelay, 0); } } /* TXDELAY expired * * kick transmission by a fake scc_txint(scc), start 'maxkeyup' watchdog. */ static void t_txdelay(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; scc_start_maxkeyup(scc); if (scc->tx_buff == NULL) { disable_irq(scc->irq); scc_txint(scc); enable_irq(scc->irq); } } /* TAILTIME expired * * switch off transmitter. If we were stopped by Maxkeyup restart * transmission after 'mintime' seconds */ static void t_tail(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; unsigned long flags; spin_lock_irqsave(&scc->lock, flags); del_timer(&scc->tx_wdog); scc_key_trx(scc, TX_OFF); spin_unlock_irqrestore(&scc->lock, flags); if (scc->stat.tx_state == TXS_TIMEOUT) /* we had a timeout? */ { scc->stat.tx_state = TXS_WAIT; scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100); return; } scc->stat.tx_state = TXS_IDLE; netif_wake_queue(scc->dev); } /* BUSY timeout * * throw away send buffers if DCD remains active too long. */ static void t_busy(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; del_timer(&scc->tx_t); netif_stop_queue(scc->dev); /* don't pile on the wabbit! */ scc_discard_buffers(scc); scc->stat.txerrs++; scc->stat.tx_state = TXS_IDLE; netif_wake_queue(scc->dev); } /* MAXKEYUP timeout * * this is our watchdog. */ static void t_maxkeyup(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; unsigned long flags; spin_lock_irqsave(&scc->lock, flags); /* * let things settle down before we start to * accept new data. */ netif_stop_queue(scc->dev); scc_discard_buffers(scc); del_timer(&scc->tx_t); cl(scc, R1, TxINT_ENAB); /* force an ABORT, but don't */ cl(scc, R15, TxUIE); /* count it. */ OutReg(scc->ctrl, R0, RES_Tx_P); spin_unlock_irqrestore(&scc->lock, flags); scc->stat.txerrs++; scc->stat.tx_state = TXS_TIMEOUT; scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); } /* IDLE timeout * * in fulldup mode 2 it keys down the transmitter after 'idle' seconds * of inactivity. We will not restart transmission before 'mintime' * expires. */ static void t_idle(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; del_timer(&scc->tx_wdog); scc_key_trx(scc, TX_OFF); if(scc->kiss.mintime) scc_start_tx_timer(scc, t_dwait, scc->kiss.mintime*100); scc->stat.tx_state = TXS_WAIT; } static void scc_init_timer(struct scc_channel *scc) { unsigned long flags; spin_lock_irqsave(&scc->lock, flags); scc->stat.tx_state = TXS_IDLE; spin_unlock_irqrestore(&scc->lock, flags); } /* ******************************************************************** */ /* * Set/get L1 parameters * */ /* ******************************************************************** */ /* * this will set the "hardware" parameters through KISS commands or ioctl() */ #define CAST(x) (unsigned long)(x) static unsigned int scc_set_param(struct scc_channel *scc, unsigned int cmd, unsigned int arg) { switch (cmd) { case PARAM_TXDELAY: scc->kiss.txdelay=arg; break; case PARAM_PERSIST: scc->kiss.persist=arg; break; case PARAM_SLOTTIME: scc->kiss.slottime=arg; break; case PARAM_TXTAIL: scc->kiss.tailtime=arg; break; case PARAM_FULLDUP: scc->kiss.fulldup=arg; break; case PARAM_DTR: break; /* does someone need this? */ case PARAM_GROUP: scc->kiss.group=arg; break; case PARAM_IDLE: scc->kiss.idletime=arg; break; case PARAM_MIN: scc->kiss.mintime=arg; break; case PARAM_MAXKEY: scc->kiss.maxkeyup=arg; break; case PARAM_WAIT: scc->kiss.waittime=arg; break; case PARAM_MAXDEFER: scc->kiss.maxdefer=arg; break; case PARAM_TX: scc->kiss.tx_inhibit=arg; break; case PARAM_SOFTDCD: scc->kiss.softdcd=arg; if (arg) { or(scc, R15, SYNCIE); cl(scc, R15, DCDIE); start_hunt(scc); } else { or(scc, R15, DCDIE); cl(scc, R15, SYNCIE); } break; case PARAM_SPEED: if (arg < 256) scc->modem.speed=arg*100; else scc->modem.speed=arg; if (scc->stat.tx_state == 0) /* only switch baudrate on rx... ;-) */ set_speed(scc); break; case PARAM_RTS: if ( !(scc->wreg[R5] & RTS) ) { if (arg != TX_OFF) scc_key_trx(scc, TX_ON); scc_start_tx_timer(scc, t_txdelay, scc->kiss.txdelay); } else { if (arg == TX_OFF) { scc->stat.tx_state = TXS_BUSY; scc_start_tx_timer(scc, t_tail, scc->kiss.tailtime); } } break; case PARAM_HWEVENT: scc_notify(scc, scc->dcd? HWEV_DCD_ON:HWEV_DCD_OFF); break; default: return -EINVAL; } return 0; } static unsigned long scc_get_param(struct scc_channel *scc, unsigned int cmd) { switch (cmd) { case PARAM_TXDELAY: return CAST(scc->kiss.txdelay); case PARAM_PERSIST: return CAST(scc->kiss.persist); case PARAM_SLOTTIME: return CAST(scc->kiss.slottime); case PARAM_TXTAIL: return CAST(scc->kiss.tailtime); case PARAM_FULLDUP: return CAST(scc->kiss.fulldup); case PARAM_SOFTDCD: return CAST(scc->kiss.softdcd); case PARAM_DTR: return CAST((scc->wreg[R5] & DTR)? 1:0); case PARAM_RTS: return CAST((scc->wreg[R5] & RTS)? 1:0); case PARAM_SPEED: return CAST(scc->modem.speed); case PARAM_GROUP: return CAST(scc->kiss.group); case PARAM_IDLE: return CAST(scc->kiss.idletime); case PARAM_MIN: return CAST(scc->kiss.mintime); case PARAM_MAXKEY: return CAST(scc->kiss.maxkeyup); case PARAM_WAIT: return CAST(scc->kiss.waittime); case PARAM_MAXDEFER: return CAST(scc->kiss.maxdefer); case PARAM_TX: return CAST(scc->kiss.tx_inhibit); default: return NO_SUCH_PARAM; } } #undef CAST /* ******************************************************************* */ /* * Send calibration pattern * */ /* ******************************************************************* */ static void scc_stop_calibrate(unsigned long channel) { struct scc_channel *scc = (struct scc_channel *) channel; unsigned long flags; spin_lock_irqsave(&scc->lock, flags); del_timer(&scc->tx_wdog); scc_key_trx(scc, TX_OFF); wr(scc, R6, 0); wr(scc, R7, FLAG); Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ Outb(scc->ctrl,RES_EXT_INT); netif_wake_queue(scc->dev); spin_unlock_irqrestore(&scc->lock, flags); } static void scc_start_calibrate(struct scc_channel *scc, int duration, unsigned char pattern) { unsigned long flags; spin_lock_irqsave(&scc->lock, flags); netif_stop_queue(scc->dev); scc_discard_buffers(scc); del_timer(&scc->tx_wdog); scc->tx_wdog.data = (unsigned long) scc; scc->tx_wdog.function = scc_stop_calibrate; scc->tx_wdog.expires = jiffies + HZ*duration; add_timer(&scc->tx_wdog); /* This doesn't seem to work. Why not? */ wr(scc, R6, 0); wr(scc, R7, pattern); /* * Don't know if this works. * Damn, where is my Z8530 programming manual...? */ Outb(scc->ctrl,RES_EXT_INT); /* reset ext/status interrupts */ Outb(scc->ctrl,RES_EXT_INT); scc_key_trx(scc, TX_ON); spin_unlock_irqrestore(&scc->lock, flags); } /* ******************************************************************* */ /* * Init channel structures, special HW, etc... * */ /* ******************************************************************* */ /* * Reset the Z8530s and setup special hardware */ static void z8530_init(void) { struct scc_channel *scc; int chip, k; unsigned long flags; char *flag; printk(KERN_INFO "Init Z8530 driver: %u channels, IRQ", Nchips*2); flag=" "; for (k = 0; k < NR_IRQS; k++) if (Ivec[k].used) { printk("%s%d", flag, k); flag=","; } printk("\n"); /* reset and pre-init all chips in the system */ for (chip = 0; chip < Nchips; chip++) { scc=&SCC_Info[2*chip]; if (!scc->ctrl) continue; /* Special SCC cards */ if(scc->brand & EAGLE) /* this is an EAGLE card */ Outb(scc->special,0x08); /* enable interrupt on the board */ if(scc->brand & (PC100 | PRIMUS)) /* this is a PC100/PRIMUS card */ Outb(scc->special,scc->option); /* set the MODEM mode (0x22) */ /* Reset and pre-init Z8530 */ spin_lock_irqsave(&scc->lock, flags); Outb(scc->ctrl, 0); OutReg(scc->ctrl,R9,FHWRES); /* force hardware reset */ udelay(100); /* give it 'a bit' more time than required */ wr(scc, R2, chip*16); /* interrupt vector */ wr(scc, R9, VIS); /* vector includes status */ spin_unlock_irqrestore(&scc->lock, flags); } Driver_Initialized = 1; } /* * Allocate device structure, err, instance, and register driver */ static int scc_net_alloc(const char *name, struct scc_channel *scc) { int err; struct net_device *dev; dev = alloc_netdev(0, name, scc_net_setup); if (!dev) return -ENOMEM; dev->priv = scc; scc->dev = dev; spin_lock_init(&scc->lock); init_timer(&scc->tx_t); init_timer(&scc->tx_wdog); err = register_netdevice(dev); if (err) { printk(KERN_ERR "%s: can't register network device (%d)\n", name, err); free_netdev(dev); scc->dev = NULL; return err; } return 0; } /* ******************************************************************** */ /* * Network driver methods * */ /* ******************************************************************** */ static unsigned char ax25_bcast[AX25_ADDR_LEN] = {'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1}; static unsigned char ax25_nocall[AX25_ADDR_LEN] = {'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1}; /* ----> Initialize device <----- */ static void scc_net_setup(struct net_device *dev) { SET_MODULE_OWNER(dev); dev->tx_queue_len = 16; /* should be enough... */ dev->open = scc_net_open; dev->stop = scc_net_close; dev->hard_start_xmit = scc_net_tx; dev->hard_header = ax25_encapsulate; dev->rebuild_header = ax25_rebuild_header; dev->set_mac_address = scc_net_set_mac_address; dev->get_stats = scc_net_get_stats; dev->do_ioctl = scc_net_ioctl; dev->tx_timeout = NULL; memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN); memcpy(dev->dev_addr, ax25_nocall, AX25_ADDR_LEN); dev->flags = 0; dev->type = ARPHRD_AX25; dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN; dev->mtu = AX25_DEF_PACLEN; dev->addr_len = AX25_ADDR_LEN; } /* ----> open network device <---- */ static int scc_net_open(struct net_device *dev) { struct scc_channel *scc = (struct scc_channel *) dev->priv; if (!scc->init) return -EINVAL; scc->tx_buff = NULL; skb_queue_head_init(&scc->tx_queue); init_channel(scc); netif_start_queue(dev); return 0; } /* ----> close network device <---- */ static int scc_net_close(struct net_device *dev) { struct scc_channel *scc = (struct scc_channel *) dev->priv; unsigned long flags; netif_stop_queue(dev); spin_lock_irqsave(&scc->lock, flags); Outb(scc->ctrl,0); /* Make sure pointer is written */ wr(scc,R1,0); /* disable interrupts */ wr(scc,R3,0); spin_unlock_irqrestore(&scc->lock, flags); del_timer_sync(&scc->tx_t); del_timer_sync(&scc->tx_wdog); scc_discard_buffers(scc); return 0; } /* ----> receive frame, called from scc_rxint() <---- */ static void scc_net_rx(struct scc_channel *scc, struct sk_buff *skb) { if (skb->len == 0) { dev_kfree_skb_irq(skb); return; } scc->dev_stat.rx_packets++; scc->dev_stat.rx_bytes += skb->len; skb->protocol = ax25_type_trans(skb, scc->dev); netif_rx(skb); scc->dev->last_rx = jiffies; return; } /* ----> transmit frame <---- */ static int scc_net_tx(struct sk_buff *skb, struct net_device *dev) { struct scc_channel *scc = (struct scc_channel *) dev->priv; unsigned long flags; char kisscmd; if (skb->len > scc->stat.bufsize || skb->len < 2) { scc->dev_stat.tx_dropped++; /* bogus frame */ dev_kfree_skb(skb); return 0; } scc->dev_stat.tx_packets++; scc->dev_stat.tx_bytes += skb->len; scc->stat.txframes++; kisscmd = *skb->data & 0x1f; skb_pull(skb, 1); if (kisscmd) { scc_set_param(scc, kisscmd, *skb->data); dev_kfree_skb(skb); return 0; } spin_lock_irqsave(&scc->lock, flags); if (skb_queue_len(&scc->tx_queue) > scc->dev->tx_queue_len) { struct sk_buff *skb_del; skb_del = skb_dequeue(&scc->tx_queue); dev_kfree_skb(skb_del); } skb_queue_tail(&scc->tx_queue, skb); dev->trans_start = jiffies; /* * Start transmission if the trx state is idle or * t_idle hasn't expired yet. Use dwait/persistence/slottime * algorithm for normal halfduplex operation. */ if(scc->stat.tx_state == TXS_IDLE || scc->stat.tx_state == TXS_IDLE2) { scc->stat.tx_state = TXS_BUSY; if (scc->kiss.fulldup == KISS_DUPLEX_HALF) __scc_start_tx_timer(scc, t_dwait, scc->kiss.waittime); else __scc_start_tx_timer(scc, t_dwait, 0); } spin_unlock_irqrestore(&scc->lock, flags); return 0; } /* ----> ioctl functions <---- */ /* * SIOCSCCCFG - configure driver arg: (struct scc_hw_config *) arg * SIOCSCCINI - initialize driver arg: --- * SIOCSCCCHANINI - initialize channel arg: (struct scc_modem *) arg * SIOCSCCSMEM - set memory arg: (struct scc_mem_config *) arg * SIOCSCCGKISS - get level 1 parameter arg: (struct scc_kiss_cmd *) arg * SIOCSCCSKISS - set level 1 parameter arg: (struct scc_kiss_cmd *) arg * SIOCSCCGSTAT - get driver status arg: (struct scc_stat *) arg * SIOCSCCCAL - send calib. pattern arg: (struct scc_calibrate *) arg */ static int scc_net_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) { struct scc_kiss_cmd kiss_cmd; struct scc_mem_config memcfg; struct scc_hw_config hwcfg; struct scc_calibrate cal; struct scc_channel *scc = (struct scc_channel *) dev->priv; int chan; unsigned char device_name[IFNAMSIZ]; void __user *arg = ifr->ifr_data; if (!Driver_Initialized) { if (cmd == SIOCSCCCFG) { int found = 1; if (!capable(CAP_SYS_RAWIO)) return -EPERM; if (!arg) return -EFAULT; if (Nchips >= SCC_MAXCHIPS) return -EINVAL; if (copy_from_user(&hwcfg, arg, sizeof(hwcfg))) return -EFAULT; if (hwcfg.irq == 2) hwcfg.irq = 9; if (hwcfg.irq < 0 || hwcfg.irq >= NR_IRQS) return -EINVAL; if (!Ivec[hwcfg.irq].used && hwcfg.irq) { if (request_irq(hwcfg.irq, scc_isr, SA_INTERRUPT, "AX.25 SCC", NULL)) printk(KERN_WARNING "z8530drv: warning, cannot get IRQ %d\n", hwcfg.irq); else Ivec[hwcfg.irq].used = 1; } if (hwcfg.vector_latch && !Vector_Latch) { if (!request_region(hwcfg.vector_latch, 1, "scc vector latch")) printk(KERN_WARNING "z8530drv: warning, cannot reserve vector latch port 0x%lx\n, disabled.", hwcfg.vector_latch); else Vector_Latch = hwcfg.vector_latch; } if (hwcfg.clock == 0) hwcfg.clock = SCC_DEFAULT_CLOCK; #ifndef SCC_DONT_CHECK if(request_region(hwcfg.ctrl_a, 1, "scc-probe")) { disable_irq(hwcfg.irq); Outb(hwcfg.ctrl_a, 0); OutReg(hwcfg.ctrl_a, R9, FHWRES); udelay(100); OutReg(hwcfg.ctrl_a,R13,0x55); /* is this chip really there? */ udelay(5); if (InReg(hwcfg.ctrl_a,R13) != 0x55) found = 0; enable_irq(hwcfg.irq); release_region(hwcfg.ctrl_a, 1); } else found = 0; #endif if (found) { SCC_Info[2*Nchips ].ctrl = hwcfg.ctrl_a; SCC_Info[2*Nchips ].data = hwcfg.data_a; SCC_Info[2*Nchips ].irq = hwcfg.irq; SCC_Info[2*Nchips+1].ctrl = hwcfg.ctrl_b; SCC_Info[2*Nchips+1].data = hwcfg.data_b; SCC_Info[2*Nchips+1].irq = hwcfg.irq; SCC_ctrl[Nchips].chan_A = hwcfg.ctrl_a; SCC_ctrl[Nchips].chan_B = hwcfg.ctrl_b; SCC_ctrl[Nchips].irq = hwcfg.irq; } for (chan = 0; chan < 2; chan++) { sprintf(device_name, "%s%i", SCC_DriverName, 2*Nchips+chan); SCC_Info[2*Nchips+chan].special = hwcfg.special; SCC_Info[2*Nchips+chan].clock = hwcfg.clock; SCC_Info[2*Nchips+chan].brand = hwcfg.brand; SCC_Info[2*Nchips+chan].option = hwcfg.option; SCC_Info[2*Nchips+chan].enhanced = hwcfg.escc; #ifdef SCC_DONT_CHECK printk(KERN_INFO "%s: data port = 0x%3.3x control port = 0x%3.3x\n", device_name, SCC_Info[2*Nchips+chan].data, SCC_Info[2*Nchips+chan].ctrl); #else printk(KERN_INFO "%s: data port = 0x%3.3lx control port = 0x%3.3lx -- %s\n", device_name, chan? hwcfg.data_b : hwcfg.data_a, chan? hwcfg.ctrl_b : hwcfg.ctrl_a, found? "found" : "missing"); #endif if (found) { request_region(SCC_Info[2*Nchips+chan].ctrl, 1, "scc ctrl"); request_region(SCC_Info[2*Nchips+chan].data, 1, "scc data"); if (Nchips+chan != 0 && scc_net_alloc(device_name, &SCC_Info[2*Nchips+chan])) return -EINVAL; } } if (found) Nchips++; return 0; } if (cmd == SIOCSCCINI) { if (!capable(CAP_SYS_RAWIO)) return -EPERM; if (Nchips == 0) return -EINVAL; z8530_init(); return 0; } return -EINVAL; /* confuse the user */ } if (!scc->init) { if (cmd == SIOCSCCCHANINI) { if (!capable(CAP_NET_ADMIN)) return -EPERM; if (!arg) return -EINVAL; scc->stat.bufsize = SCC_BUFSIZE; if (copy_from_user(&scc->modem, arg, sizeof(struct scc_modem))) return -EINVAL; /* default KISS Params */ if (scc->modem.speed < 4800) { scc->kiss.txdelay = 36; /* 360 ms */ scc->kiss.persist = 42; /* 25% persistence */ /* was 25 */ scc->kiss.slottime = 16; /* 160 ms */ scc->kiss.tailtime = 4; /* minimal reasonable value */ scc->kiss.fulldup = 0; /* CSMA */ scc->kiss.waittime = 50; /* 500 ms */ scc->kiss.maxkeyup = 10; /* 10 s */ scc->kiss.mintime = 3; /* 3 s */ scc->kiss.idletime = 30; /* 30 s */ scc->kiss.maxdefer = 120; /* 2 min */ scc->kiss.softdcd = 0; /* hardware dcd */ } else { scc->kiss.txdelay = 10; /* 100 ms */ scc->kiss.persist = 64; /* 25% persistence */ /* was 25 */ scc->kiss.slottime = 8; /* 160 ms */ scc->kiss.tailtime = 1; /* minimal reasonable value */ scc->kiss.fulldup = 0; /* CSMA */ scc->kiss.waittime = 50; /* 500 ms */ scc->kiss.maxkeyup = 7; /* 7 s */ scc->kiss.mintime = 3; /* 3 s */ scc->kiss.idletime = 30; /* 30 s */ scc->kiss.maxdefer = 120; /* 2 min */ scc->kiss.softdcd = 0; /* hardware dcd */ } scc->tx_buff = NULL; skb_queue_head_init(&scc->tx_queue); scc->init = 1; return 0; } return -EINVAL; } switch(cmd) { case SIOCSCCRESERVED: return -ENOIOCTLCMD; case SIOCSCCSMEM: if (!capable(CAP_SYS_RAWIO)) return -EPERM; if (!arg || copy_from_user(&memcfg, arg, sizeof(memcfg))) return -EINVAL; scc->stat.bufsize = memcfg.bufsize; return 0; case SIOCSCCGSTAT: if (!arg || copy_to_user(arg, &scc->stat, sizeof(scc->stat))) return -EINVAL; return 0; case SIOCSCCGKISS: if (!arg || copy_from_user(&kiss_cmd, arg, sizeof(kiss_cmd))) return -EINVAL; kiss_cmd.param = scc_get_param(scc, kiss_cmd.command); if (copy_to_user(arg, &kiss_cmd, sizeof(kiss_cmd))) return -EINVAL; return 0; case SIOCSCCSKISS: