litmus-rt.git - The LITMUS^RT kernel.

#define H2I_UTIME_1_LD1 0xf0 /* tenths of microseconds */ #define H2I_UTIME_2_LD 0xffff /* seconds, LSB's */ #define H2I_UTIME_3_LD 0xffff /* seconds, MSB's */ struct hal2_ctl_regs { u32 _unused0[4]; u32 isr; /* 0x10 Status Register */ u32 _unused1[3]; u32 rev; /* 0x20 Revision Register */ u32 _unused2[3]; u32 iar; /* 0x30 Indirect Address Register */ u32 _unused3[3]; u32 idr0; /* 0x40 Indirect Data Register 0 */ u32 _unused4[3]; u32 idr1; /* 0x50 Indirect Data Register 1 */ u32 _unused5[3]; u32 idr2; /* 0x60 Indirect Data Register 2 */ u32 _unused6[3]; u32 idr3; /* 0x70 Indirect Data Register 3 */ }; struct hal2_aes_regs { u32 rx_stat[2]; /* Status registers */ u32 rx_cr[2]; /* Control registers */ u32 rx_ud[4]; /* User data window */ u32 rx_st[24]; /* Channel status data */ u32 tx_stat[1]; /* Status register */ u32 tx_cr[3]; /* Control registers */ u32 tx_ud[4]; /* User data window */ u32 tx_st[24]; /* Channel status data */ }; struct hal2_vol_regs { u32 right; /* Right volume */ u32 left; /* Left volume */ }; struct hal2_syn_regs { u32 _unused0[2]; u32 page; /* DOC Page register */ u32 regsel; /* DOC Register selection */ u32 dlow; /* DOC Data low */ u32 dhigh; /* DOC Data high */ u32 irq; /* IRQ Status */ u32 dram; /* DRAM Access */ }; #endif /* __HAL2_H */

Branch	Commit message	Author	Age
archive/unc-master-3.0	P-FP: fix BUG_ON releated to priority inheritance	Bjoern Brandenburg	13 years
archived-2013.1	uncachedev: mmap memory that is not cached by CPUs	Glenn Elliott	12 years
archived-private-master	Merge branch 'wip-2.6.34' into old-private-master	Andrea Bastoni	15 years
archived-semi-part	Merge branch 'wip-semi-part' of ssh://cvs/cvs/proj/litmus/repo/litmus2010 int...	Andrea Bastoni	15 years
demo	Further refinements	Jonathan Herman	14 years
ecrts-pgm-final	Merge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...	Glenn Elliott	12 years
ecrts14-pgm-final	Merge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...	Glenn Elliott	12 years
gpusync-rtss12	Final GPUSync implementation.	Glenn Elliott	12 years
gpusync/staging	Rename IKGLP R2DGLP.	Glenn Elliott	12 years
linux-tip	Merge branch 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/p...	Linus Torvalds	15 years
litmus2008-patch-series	add i386 feather-trace implementation	Bjoern B. Brandenburg	16 years
master	PSN-EDF: use inferred_sporadic_job_release_at	Bjoern Brandenburg	9 years
pgm	make it compile	Glenn Elliott	12 years
prop/litmus-signals	Infrastructure for Litmus signals.	Glenn Elliott	13 years
prop/robust-tie-break	Fixed bug in edf_higher_prio().	Glenn Elliott	13 years
staging	Fix tracepoint compilation error	Felipe Cerqueira	13 years
test	9/23/2016	Namhoon Kim	9 years
tracing-devel	Test kernel tracing events capabilities	Andrea Bastoni	16 years
v2.6.34-with-arm-patches	smsc911x: Add spinlocks around registers access	Catalin Marinas	15 years
v2015.1	Add ARM syscall def for get_current_budget	Bjoern Brandenburg	10 years
wip-2011.2-bbb	Litmus core: simplify np-section protocol	Bjoern B. Brandenburg	14 years
wip-2011.2-bbb-trace	Refactor sched_trace_log_message() -> debug_trace_log_message()	Andrea Bastoni	14 years
wip-2012.3-gpu	SOBLIV draining support for C-EDF.	Glenn Elliott	13 years
wip-2012.3-gpu-preport	pick up last C-RM file	Glenn Elliott	12 years
wip-2012.3-gpu-rtss13	Fix critical bug in GPU tracker.	Glenn Elliott	12 years
wip-2012.3-gpu-sobliv-budget-w-ksha /* If IAR_TYPE_M=Unix Timer: / / 1=Unix Timer / #define H2_IAR_ACCESS_SELECT 0x0080 / 1=read 0=write / #define H2_IAR_PARAM 0x000C / Parameter Select / #define H2_IAR_RB_INDEX_M 0x0003 / Read Back Index / / 00:word0 / / 01:word1 / / 10:word2 / / 11:word3 / / * HAL2 internal addressing * * The HAL2 has "indirect registers" (idr) which are accessed by writing to the * Indirect Data registers. Write the address to the Indirect Address register * to transfer the data. * * We define the H2IR_* to the read address and H2IW_* to the write address and * H2I_* to be fields in whatever register is referred to. * * When we write to indirect registers which are larger than one word (16 bit) * we have to fill more than one indirect register before writing. When we read * back however we have to read several times, each time with different Read * Back Indexes (there are defs for doing this easily). / / * Relay Control / #define H2I_RELAY_C 0x9100 #define H2I_RELAY_C_STATE 0x01 / state of RELAY pin signal / / DMA port enable / #define H2I_DMA_PORT_EN 0x9104 #define H2I_DMA_PORT_EN_SY_IN 0x01 / Synth_in DMA port / #define H2I_DMA_PORT_EN_AESRX 0x02 / AES receiver DMA port / #define H2I_DMA_PORT_EN_AESTX 0x04 / AES transmitter DMA port / #define H2I_DMA_PORT_EN_CODECTX 0x08 / CODEC transmit DMA port / #define H2I_DMA_PORT_EN_CODECR 0x10 / CODEC receive DMA port / #define H2I_DMA_END 0x9108 / global dma endian select / #define H2I_DMA_END_SY_IN 0x01 / Synth_in DMA port / #define H2I_DMA_END_AESRX 0x02 / AES receiver DMA port / #define H2I_DMA_END_AESTX 0x04 / AES transmitter DMA port / #define H2I_DMA_END_CODECTX 0x08 / CODEC transmit DMA port / #define H2I_DMA_END_CODECR 0x10 / CODEC receive DMA port / / 0=b_end 1=l_end / #define H2I_DMA_DRV 0x910C / global PBUS DMA enable / #define H2I_SYNTH_C 0x1104 / Synth DMA control / #define H2I_AESRX_C 0x1204 / AES RX dma control / #define H2I_C_TS_EN 0x20 / Timestamp enable / #define H2I_C_TS_FRMT 0x40 / Timestamp format / #define H2I_C_NAUDIO 0x80 / Sign extend / / AESRX CTL, 16 bit / #define H2I_AESTX_C 0x1304 / AES TX DMA control / #define H2I_AESTX_C_CLKID_SHIFT 3 / Bresenham Clock Gen 1-3 / #define H2I_AESTX_C_CLKID_M 0x18 #define H2I_AESTX_C_DATAT_SHIFT 8 / 1=mono 2=stereo (3=quad) / #define H2I_AESTX_C_DATAT_M 0x300 / CODEC registers / #define H2I_DAC_C1 0x1404 / DAC DMA control, 16 bit / #define H2I_DAC_C2 0x1408 / DAC DMA control, 32 bit / #define H2I_ADC_C1 0x1504 / ADC DMA control, 16 bit / #define H2I_ADC_C2 0x1508 / ADC DMA control, 32 bit / / Bits in CTL1 register / #define H2I_C1_DMA_SHIFT 0 / DMA channel / #define H2I_C1_DMA_M 0x7 #define H2I_C1_CLKID_SHIFT 3 / Bresenham Clock Gen 1-3 / #define H2I_C1_CLKID_M 0x18 #define H2I_C1_DATAT_SHIFT 8 / 1=mono 2=stereo (3=quad) / #define H2I_C1_DATAT_M 0x300 / Bits in CTL2 register / #define H2I_C2_R_GAIN_SHIFT 0 / right a/d input gain */ <'>wip-edzl-critique	Use hr_timer's active checks instead of having own flag.	Glenn Elliott	15 years
wip-edzl-final	Implementation of the EDZL scheduler.	Glenn Elliott	15 years
wip-edzl-revised	Clean up comments.	Glenn Elliott	15 years
wip-events	Added support for tracing arbitrary actions.	Jonathan Herman	15 years
wip-extra-debug	DBG: add additional tracing	Bjoern B. Brandenburg	15 years
wip-fix-switch-jerickso	Attempt to fix race condition with plugin switching	Jeremy Erickson	15 years
wip-fix3	sched: show length of runqueue clock deactivation in /proc/sched_debug	Bjoern B. Brandenburg	15 years
wip-fmlp-dequeue	Improve FMLP queue management.	Glenn Elliott	15 years
wip-ft-irq-flag	Feather-Trace: keep track of interrupt-related interference.	Bjoern B. Brandenburg	14 years
wip-gpu-cleanup	Enable sched_trace log injection from userspace