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BranchCommit messageAuthorAge
archive/unc-master-3.0P-FP: fix BUG_ON releated to priority inheritanceBjoern Brandenburg13 years
archived-2013.1uncachedev: mmap memory that is not cached by CPUsGlenn Elliott12 years
archived-private-masterMerge branch 'wip-2.6.34' into old-private-masterAndrea Bastoni15 years
archived-semi-partMerge branch 'wip-semi-part' of ssh://cvs/cvs/proj/litmus/repo/litmus2010 int...Andrea Bastoni15 years
demoFurther refinementsJonathan Herman14 years
ecrts-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
ecrts14-pgm-finalMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
gpusync-rtss12Final GPUSync implementation.Glenn Elliott12 years
gpusync/stagingRename IKGLP R2DGLP.Glenn Elliott12 years
linux-tipMerge branch 'slab/urgent' of git://git.kernel.org/pub/scm/linux/kernel/git/p...Linus Torvalds15 years
litmus2008-patch-seriesadd i386 feather-trace implementationBjoern B. Brandenburg16 years
masterPSN-EDF: use inferred_sporadic_job_release_atBjoern Brandenburg9 years
pgmmake it compileGlenn Elliott12 years
prop/litmus-signalsInfrastructure for Litmus signals.Glenn Elliott13 years
prop/robust-tie-breakFixed bug in edf_higher_prio().Glenn Elliott13 years
stagingFix tracepoint compilation errorFelipe Cerqueira13 years
test9/23/2016Namhoon Kim9 years
tracing-develTest kernel tracing events capabilitiesAndrea Bastoni16 years
v2.6.34-with-arm-patchessmsc911x: Add spinlocks around registers accessCatalin Marinas15 years
v2015.1Add ARM syscall def for get_current_budgetBjoern Brandenburg10 years
wip-2011.2-bbbLitmus core: simplify np-section protocolBjoern B. Brandenburg14 years
wip-2011.2-bbb-traceRefactor sched_trace_log_message() -> debug_trace_log_message()Andrea Bastoni14 years
wip-2012.3-gpuSOBLIV draining support for C-EDF.Glenn Elliott12 years
wip-2012.3-gpu-preportpick up last C-RM fileGlenn Elliott12 years
wip-2012.3-gpu-rtss13Fix critical bug in GPU tracker.Glenn Elliott12 years
wip-2012.3-gpu-sobliv-budget-w-ksharkProper sobliv draining and many bug fixes.Glenn Elliott12 years
wip-aedzl-finalMake it easier to compile AEDZL interfaces in liblitmus.Glenn Elliott15 years
wip-aedzl-revisedAdd sched_trace data for Apative EDZLGlenn Elliott15 years
wip-arbit-deadlineFix compilation bug.Glenn Elliott13 years
wip-aux-tasksDescription of refined aux task inheritance.Glenn Elliott13 years
wip-bbbGSN-EDF & Core: improve debug TRACE'ing for NP sectionsBjoern B. Brandenburg14 years
wip-bbb-prio-donuse correct timestampBjoern B. Brandenburg14 years
wip-better-breakImplement hash-based EDF tie-breaking.Glenn Elliott13 years
wip-binary-heapMake C-EDF work with simplified binheap_deleteGlenn Elliott13 years
wip-budgetAdded support for choices in budget policy enforcement.Glenn Elliott15 years
wip-colorSummarize schedulability with final recordJonathan Herman13 years
wip-color-jlhsched_color: Fixed two bugs causing crashing on experiment restart and a rare...Jonathan Herman13 years
wip-d10-hz1000Enable HZ=1000 on District 10Bjoern B. Brandenburg15 years
wip-default-clusteringFeature: Make default C-EDF clustering compile-time configurable.Glenn Elliott15 years
wip-dissipation-jericksoUpdate from 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-dissipation2-jericksoUpdate 2.6.36 to 2.6.36.4Jeremy Erickson11 years
wip-ecrts14-pgmMerge branch 'wip-ecrts14-pgm' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus-r...Glenn Elliott12 years
wip-edf-hsblast tested versionJonathan Herman14 years
wip-edf-osLookup table EDF-osJeremy Erickson12 years
wip-edf-tie-breakMerge branch 'wip-edf-tie-break' of ssh://rtsrv.cs.unc.edu/home/litmus/litmus...Glenn Elliott13 years
wip-edzl-critiqueUse hr_timer's active checks instead of having own flag.Glenn Elliott15 years
wip-edzl-finalImplementation of the EDZL scheduler.Glenn Elliott15 years
wip-edzl-revisedClean up comments.Glenn Elliott15 years
wip-eventsAdded support for tracing arbitrary actions.Jonathan Herman15 years
wip-extra-debugDBG: add additional tracingBjoern B. Brandenburg15 years
wip-fix-switch-jericksoAttempt to fix race condition with plugin switchingJeremy Erickson15 years
wip-fix3sched: show length of runqueue clock deactivation in /proc/sched_debugBjoern B. Brandenburg15 years
wip-fmlp-dequeueImprove FMLP queue management.Glenn Elliott14 years
wip-ft-irq-flagFeather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-gpu-cleanupEnable sched_trace log injection from userspaceGlenn Elliott13 years
wip-gpu-interruptsRemove option for threading of all softirqs.Glenn Elliott14 years
wip-gpu-rtas12Generalized GPU cost predictors + EWMA. (untested)Glenn Elliott13 years
wip-gpu-rtss12Final GPUSync implementation.Glenn Elliott13 years
wip-gpu-rtss12-srpexperimental changes to support GPUs under SRPGlenn Elliott13 years
wip-gpusync-mergeCleanup priority tracking for budget enforcement.Glenn Elliott11 years
wip-ikglpMove RSM and IKGLP imp. to own .c filesGlenn Elliott13 years
wip-k-fmlpMerge branch 'mpi-master' into wip-k-fmlpGlenn Elliott14 years
wip-kernel-coloringAdded recolor syscallNamhoon Kim7 years
wip-kernthreadsKludge work-queue processing into klitirqd.Glenn Elliott15 years
wip-klmirqd-to-auxAllow klmirqd threads to be given names.Glenn Elliott13 years
wip-ksharkMerge branch 'mpi-staging' into wip-ksharkJonathan Herman13 years
wip-litmus-3.2Merge commit 'v3.2' into litmus-stagingAndrea Bastoni13 years
wip-litmus2011.2Cleanup: Coding conformance for affinity stuff.Glenn Elliott14 years
wip-litmus3.0-2011.2Feather-Trace: keep track of interrupt-related interference.Bjoern B. Brandenburg14 years
wip-master-2.6.33-rtAvoid deadlock when switching task policy to BACKGROUND (ugly)Andrea Bastoni15 years
wip-mcRemoved ARM-specific hacks which disabled less common mixed-criticality featu...Jonathan Herman12 years
wip-mc-bipasaMC-EDF addedbipasa chattopadhyay13 years
wip-mc-jericksoSplit C/D queuesJeremy Erickson15 years
wip-mc2-cache-slackManually patched mc^2 related codeMing Yang10 years
wip-mcrit-maccosmeticMac Mollison15 years
wip-merge-3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-merge-v3.0Prevent Linux to send IPI and queue tasks on remote CPUs.Andrea Bastoni14 years
wip-migration-affinityNULL affinity dereference in C-EDF.Glenn Elliott14 years
wip-mmap-uncacheshare branch with othersGlenn Elliott13 years
wip-modechangeRTSS 2017 submissionNamhoon Kim8 years
wip-nested-lockingAppears to be working.Bryan Ward12 years
wip-omlp-gedfFirst implementation of G-OMLP.Glenn Elliott15 years
wip-paiSome cleanup of PAIGlenn Elliott14 years
wip-percore-lib9/21/2016Namhoon Kim9 years
wip-performanceCONFIG_DONT_PREEMPT_ON_TIE: Don't preeempt a scheduled task on priority tie.Glenn Elliott14 years
wip-pgmAdd PGM support to C-FLGlenn Elliott12 years
wip-pgm-splitFirst draft of C-FL-splitNamhoon Kim12 years
wip-pm-ovdAdd preemption-and-migration overhead tracing supportAndrea Bastoni15 years
wip-prio-inhP-EDF updated to use the generic pi framework.Glenn Elliott15 years
wip-prioq-dglBUG FIX: Support DGLs with PRIOQ_MUTEXGlenn Elliott13 years
wip-refactored-gedfGeneralizd architecture for GEDF-style scheduelrs to reduce code redundancy.Glenn Elliott15 years
wip-release-master-fixbugfix: release master CPU must signal task was pickedBjoern B. Brandenburg14 years
wip-robust-tie-breakEDF priority tie-breaks.Glenn Elliott13 years
wip-rt-ksharkMove task time accounting into the complete_job method.Jonathan Herman13 years
wip-rtas12-pgmScheduling of PGM jobs.Glenn Elliott13 years
wip-semi-partFix compile error with newer GCCJeremy Erickson12 years
wip-semi-part-edfos-jericksoUse initial CPU set by clientJeremy Erickson12 years
wip-shared-libTODO: Fix condition checks in replicate_page_move_mapping()Namhoon Kim9 years
wip-shared-lib2RTAS 2017 Submission ver.Namhoon Kim9 years
wip-shared-memInitial commit for shared libraryNamhoon Kim9 years
wip-splitting-jericksoFix release behaviorJeremy Erickson13 years
wip-splitting-omlp-jericksoBjoern's Dissertation Code with Priority DonationJeremy Erickson13 years
wip-stage-binheapAn efficient binary heap implementation.Glenn Elliott13 years
wip-sun-portDynamic memory allocation and clean exit for FeatherTraceChristopher Kenna15 years
wip-timer-tracebugfix: C-EDF, clear scheduled field of the correct CPU upon task_exitAndrea Bastoni15 years
wip-tracepointsAdd kernel-style events for sched_trace_XXX() functionsAndrea Bastoni14 years
 
TagDownloadAuthorAge
2015.1commit 8e51b37822...Bjoern Brandenburg10 years
2013.1commit bcaacec1ca...Glenn Elliott12 years
2012.3commit c158b5fbe4...Jonathan Herman13 years
2012.2commit b53c479a0f...Glenn Elliott13 years
2012.1commit 83b11ea1c6...Bjoern B. Brandenburg14 years
rtas12-mc-beta-expcommit 8e236ee20f...Christopher Kenna14 years
2011.1commit d11808b5c6...Christopher Kenna15 years
v2.6.37-rc4commit e8a7e48bb2...Linus Torvalds15 years
v2.6.37-rc3commit 3561d43fd2...Linus Torvalds15 years
v2.6.37-rc2commit e53beacd23...Linus Torvalds15 years
v2.6.37-rc1commit c8ddb2713c...Linus Torvalds15 years
v2.6.36commit f6f94e2ab1...Linus Torvalds15 years
2010.2commit 5c5456402d...Bjoern B. Brandenburg15 years
v2.6.36-rc8commit cd07202cc8...Linus Torvalds15 years
v2.6.36-rc7commit cb655d0f3d...Linus Torvalds15 years
v2.6.36-rc6commit 899611ee7d...Linus Torvalds15 years
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2010.1commit 7c1ff4c544...Andrea Bastoni15 years
v2.6.34commit e40152ee1e...Linus Torvalds15 years
v2.6.33.4commit 4640b4e7d9...Greg Kroah-Hartman15 years
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v2.6.15-rc3commit 624f54be20...Linus Torvalds20 years
v2.6.15-rc2commit 3bedff1d73...Linus Torvalds20 years
v2.6.15-rc1commit cd52d1ee9a...Linus Torvalds20 years
v2.6.14commit 741b2252a5...Linus Torvalds20 years
v2.6.14-rc5commit 93918e9afc...Linus Torvalds20 years
v2.6.14-rc4commit 907a426179...Linus Torvalds20 years
v2.6.14-rc3commit 1c9426e8a5...Linus Torvalds20 years
v2.6.14-rc2commit 676d55ae30...Linus Torvalds20 years
v2.6.14-rc1commit 2f4ba45a75...Linus Torvalds20 years
v2.6.13commit 02b3e4e2d7...Linus Torvalds20 years
v2.6.13-rc7commit 0572e3da3f...Linus Torvalds20 years
v2.6.13-rc6commit 6fc32179de...Linus Torvalds20 years
v2.6.13-rc5commit 9a351e30d7...Linus Torvalds20 years
v2.6.13-rc4commit 6395352334...Linus Torvalds20 years
v2.6.11tree c39ae07f39...
v2.6.11-treetree c39ae07f39...
v2.6.12commit 9ee1c939d1...
v2.6.12-rc2commit 1da177e4c3...
v2.6.12-rc3commit a2755a80f4...
v2.6.12-rc4commit 88d7bd8cb9...
v2.6.12-rc5commit 2a24ab628a...
v2.6.12-rc6commit 7cef5677ef...
v2.6.13-rc1commit 4c91aedb75...
v2.6.13-rc2commit a18bcb7450...
v2.6.13-rc3commit c32511e271...
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-13 04:29:39 -0400
>| HFI1_RCVCTRL_TAILUPD_DIS, i); pio_send_control(dd, PSC_GLOBAL_DISABLE); for (i = 0; i < dd->num_send_contexts; i++) sc_disable(dd->send_contexts[i].sc); return 0; } static void enable_chip(struct hfi1_devdata *dd) { u32 rcvmask; u32 i; /* enable PIO send */ pio_send_control(dd, PSC_GLOBAL_ENABLE); /* * Enable kernel ctxts' receive and receive interrupt. * Other ctxts done as user opens and initializes them. */ for (i = 0; i < dd->first_user_ctxt; ++i) { rcvmask = HFI1_RCVCTRL_CTXT_ENB | HFI1_RCVCTRL_INTRAVAIL_ENB; rcvmask |= HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, DMA_RTAIL) ? HFI1_RCVCTRL_TAILUPD_ENB : HFI1_RCVCTRL_TAILUPD_DIS; if (!HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, MULTI_PKT_EGR)) rcvmask |= HFI1_RCVCTRL_ONE_PKT_EGR_ENB; if (HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, NODROP_RHQ_FULL)) rcvmask |= HFI1_RCVCTRL_NO_RHQ_DROP_ENB; if (HFI1_CAP_KGET_MASK(dd->rcd[i]->flags, NODROP_EGR_FULL)) rcvmask |= HFI1_RCVCTRL_NO_EGR_DROP_ENB; hfi1_rcvctrl(dd, rcvmask, i); sc_enable(dd->rcd[i]->sc); } } /** * create_workqueues - create per port workqueues * @dd: the hfi1_ib device */ static int create_workqueues(struct hfi1_devdata *dd) { int pidx; struct hfi1_pportdata *ppd; for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; if (!ppd->hfi1_wq) { ppd->hfi1_wq = alloc_workqueue( "hfi%d_%d", WQ_SYSFS | WQ_HIGHPRI | WQ_CPU_INTENSIVE, dd->num_sdma, dd->unit, pidx); if (!ppd->hfi1_wq) goto wq_error; } } return 0; wq_error: pr_err("alloc_workqueue failed for port %d\n", pidx + 1); for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; if (ppd->hfi1_wq) { destroy_workqueue(ppd->hfi1_wq); ppd->hfi1_wq = NULL; } } return -ENOMEM; } /** * hfi1_init - do the actual initialization sequence on the chip * @dd: the hfi1_ib device * @reinit: re-initializing, so don't allocate new memory * * Do the actual initialization sequence on the chip. This is done * both from the init routine called from the PCI infrastructure, and * when we reset the chip, or detect that it was reset internally, * or it's administratively re-enabled. * * Memory allocation here and in called routines is only done in * the first case (reinit == 0). We have to be careful, because even * without memory allocation, we need to re-write all the chip registers * TIDs, etc. after the reset or enable has completed. */ int hfi1_init(struct hfi1_devdata *dd, int reinit) { int ret = 0, pidx, lastfail = 0; unsigned i, len; struct hfi1_ctxtdata *rcd; struct hfi1_pportdata *ppd; /* Set up recv low level handlers */ dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_EXPECTED] = kdeth_process_expected; dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_EAGER] = kdeth_process_eager; dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_IB] = process_receive_ib; dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_ERROR] = process_receive_error; dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_BYPASS] = process_receive_bypass; dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_INVALID5] = process_receive_invalid; dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_INVALID6] = process_receive_invalid; dd->normal_rhf_rcv_functions[RHF_RCV_TYPE_INVALID7] = process_receive_invalid; dd->rhf_rcv_function_map = dd->normal_rhf_rcv_functions; /* Set up send low level handlers */ dd->process_pio_send = hfi1_verbs_send_pio; dd->process_dma_send = hfi1_verbs_send_dma; dd->pio_inline_send = pio_copy; if (is_ax(dd)) { atomic_set(&dd->drop_packet, DROP_PACKET_ON); dd->do_drop = 1; } else { atomic_set(&dd->drop_packet, DROP_PACKET_OFF); dd->do_drop = 0; } /* make sure the link is not "up" */ for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; ppd->linkup = 0; } if (reinit) ret = init_after_reset(dd); else ret = loadtime_init(dd); if (ret) goto done; /* allocate dummy tail memory for all receive contexts */ dd->rcvhdrtail_dummy_kvaddr = dma_zalloc_coherent( &dd->pcidev->dev, sizeof(u64), &dd->rcvhdrtail_dummy_physaddr, GFP_KERNEL); if (!dd->rcvhdrtail_dummy_kvaddr) { dd_dev_err(dd, "cannot allocate dummy tail memory\n"); ret = -ENOMEM; goto done; } /* dd->rcd can be NULL if early initialization failed */ for (i = 0; dd->rcd && i < dd->first_user_ctxt; ++i) { /* * Set up the (kernel) rcvhdr queue and egr TIDs. If doing * re-init, the simplest way to handle this is to free * existing, and re-allocate. * Need to re-create rest of ctxt 0 ctxtdata as well. */ rcd = dd->rcd[i]; if (!rcd) continue; rcd->do_interrupt = &handle_receive_interrupt; lastfail = hfi1_create_rcvhdrq(dd, rcd); if (!lastfail) lastfail = hfi1_setup_eagerbufs(rcd); if (lastfail) dd_dev_err(dd, "failed to allocate kernel ctxt's rcvhdrq and/or egr bufs\n"); } if (lastfail) ret = lastfail; /* Allocate enough memory for user event notification. */ len = ALIGN(dd->chip_rcv_contexts * HFI1_MAX_SHARED_CTXTS * sizeof(*dd->events), PAGE_SIZE); dd->events = vmalloc_user(len); if (!dd->events) dd_dev_err(dd, "Failed to allocate user events page\n"); /* * Allocate a page for device and port status. * Page will be shared amongst all user processes. */ dd->status = vmalloc_user(PAGE_SIZE); if (!dd->status) dd_dev_err(dd, "Failed to allocate dev status page\n"); else dd->freezelen = PAGE_SIZE - (sizeof(*dd->status) - sizeof(dd->status->freezemsg)); for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; if (dd->status) /* Currently, we only have one port */ ppd->statusp = &dd->status->port; set_mtu(ppd); } /* enable chip even if we have an error, so we can debug cause */ enable_chip(dd); done: /* * Set status even if port serdes is not initialized * so that diags will work. */ if (dd->status) dd->status->dev |= HFI1_STATUS_CHIP_PRESENT | HFI1_STATUS_INITTED; if (!ret) { /* enable all interrupts from the chip */ set_intr_state(dd, 1); /* chip is OK for user apps; mark it as initialized */ for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; /* start the serdes - must be after interrupts are enabled so we are notified when the link goes up */ lastfail = bringup_serdes(ppd); if (lastfail) dd_dev_info(dd, "Failed to bring up port %u\n", ppd->port); /* * Set status even if port serdes is not initialized * so that diags will work. */ if (ppd->statusp) *ppd->statusp |= HFI1_STATUS_CHIP_PRESENT | HFI1_STATUS_INITTED; if (!ppd->link_speed_enabled) continue; } } /* if ret is non-zero, we probably should do some cleanup here... */ return ret; } static inline struct hfi1_devdata *__hfi1_lookup(int unit) { return idr_find(&hfi1_unit_table, unit); } struct hfi1_devdata *hfi1_lookup(int unit) { struct hfi1_devdata *dd; unsigned long flags; spin_lock_irqsave(&hfi1_devs_lock, flags); dd = __hfi1_lookup(unit); spin_unlock_irqrestore(&hfi1_devs_lock, flags); return dd; } /* * Stop the timers during unit shutdown, or after an error late * in initialization. */ static void stop_timers(struct hfi1_devdata *dd) { struct hfi1_pportdata *ppd; int pidx; for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; if (ppd->led_override_timer.data) { del_timer_sync(&ppd->led_override_timer); atomic_set(&ppd->led_override_timer_active, 0); } } } /** * shutdown_device - shut down a device * @dd: the hfi1_ib device * * This is called to make the device quiet when we are about to * unload the driver, and also when the device is administratively * disabled. It does not free any data structures. * Everything it does has to be setup again by hfi1_init(dd, 1) */ static void shutdown_device(struct hfi1_devdata *dd) { struct hfi1_pportdata *ppd; unsigned pidx; int i; for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; ppd->linkup = 0; if (ppd->statusp) *ppd->statusp &= ~(HFI1_STATUS_IB_CONF | HFI1_STATUS_IB_READY); } dd->flags &= ~HFI1_INITTED; /* mask interrupts, but not errors */ set_intr_state(dd, 0); for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; for (i = 0; i < dd->num_rcv_contexts; i++) hfi1_rcvctrl(dd, HFI1_RCVCTRL_TAILUPD_DIS | HFI1_RCVCTRL_CTXT_DIS | HFI1_RCVCTRL_INTRAVAIL_DIS | HFI1_RCVCTRL_PKEY_DIS | HFI1_RCVCTRL_ONE_PKT_EGR_DIS, i); /* * Gracefully stop all sends allowing any in progress to * trickle out first. */ for (i = 0; i < dd->num_send_contexts; i++) sc_flush(dd->send_contexts[i].sc); } /* * Enough for anything that's going to trickle out to have actually * done so. */ udelay(20); for (pidx = 0; pidx < dd->num_pports; ++pidx) { ppd = dd->pport + pidx; /* disable all contexts */ for (i = 0; i < dd->num_send_contexts; i++) sc_disable(dd->send_contexts[i].sc); /* disable the send device */ pio_send_control(dd, PSC_GLOBAL_DISABLE); shutdown_led_override(ppd); /* * Clear SerdesEnable. * We can't count on interrupts since we are stopping. */ hfi1_quiet_serdes(ppd); if (ppd->hfi1_wq) { destroy_workqueue(ppd->hfi1_wq); ppd->hfi1_wq = NULL; } } sdma_exit(dd); } /** * hfi1_free_ctxtdata - free a context's allocated data * @dd: the hfi1_ib device * @rcd: the ctxtdata structure * * free up any allocated data for a context * This should not touch anything that would affect a simultaneous * re-allocation of context data, because it is called after hfi1_mutex * is released (and can be called from reinit as well). * It should never change any chip state, or global driver state. */ void hfi1_free_ctxtdata(struct hfi1_devdata *dd, struct hfi1_ctxtdata *rcd) { unsigned e; if (!rcd) return; if (rcd->rcvhdrq) { dma_free_coherent(&dd->pcidev->dev, rcd->rcvhdrq_size, rcd->rcvhdrq, rcd->rcvhdrq_phys); rcd->rcvhdrq = NULL; if (rcd->rcvhdrtail_kvaddr) { dma_free_coherent(&dd->pcidev->dev, PAGE_SIZE, (void *)rcd->rcvhdrtail_kvaddr, rcd->rcvhdrqtailaddr_phys); rcd->rcvhdrtail_kvaddr = NULL; } } /* all the RcvArray entries should have been cleared by now */ kfree(rcd->egrbufs.rcvtids); for (e = 0; e < rcd->egrbufs.alloced; e++) { if (rcd->egrbufs.buffers[e].phys) dma_free_coherent(&dd->pcidev->dev, rcd->egrbufs.buffers[e].len, rcd->egrbufs.buffers[e].addr, rcd->egrbufs.buffers[e].phys); } kfree(rcd->egrbufs.buffers); sc_free(rcd->sc); vfree(rcd->user_event_mask); vfree(rcd->subctxt_uregbase); vfree(rcd->subctxt_rcvegrbuf); vfree(rcd->subctxt_rcvhdr_base); kfree(rcd->opstats); kfree(rcd); } void hfi1_free_devdata(struct hfi1_devdata *dd) { unsigned long flags; spin_lock_irqsave(&hfi1_devs_lock, flags); idr_remove(&hfi1_unit_table, dd->unit); list_del(&dd->list); spin_unlock_irqrestore(&hfi1_devs_lock, flags); free_platform_config(dd); hfi1_dbg_ibdev_exit(&dd->verbs_dev); rcu_barrier(); /* wait for rcu callbacks to complete */ free_percpu(dd->int_counter); free_percpu(dd->rcv_limit); hfi1_dev_affinity_free(dd); free_percpu(dd->send_schedule); ib_dealloc_device(&dd->verbs_dev.rdi.ibdev); } /* * Allocate our primary per-unit data structure. Must be done via verbs * allocator, because the verbs cleanup process both does cleanup and * free of the data structure. * "extra" is for chip-specific data. * * Use the idr mechanism to get a unit number for this unit. */ struct hfi1_devdata *hfi1_alloc_devdata(struct pci_dev *pdev, size_t extra) { unsigned long flags; struct hfi1_devdata *dd; int ret, nports; /* extra is * number of ports */ nports = extra / sizeof(struct hfi1_pportdata); dd = (struct hfi1_devdata *)rvt_alloc_device(sizeof(*dd) + extra, nports); if (!dd) return ERR_PTR(-ENOMEM); dd->num_pports = nports; dd->pport = (struct hfi1_pportdata *)(dd + 1); INIT_LIST_HEAD(&dd->list); idr_preload(GFP_KERNEL); spin_lock_irqsave(&hfi1_devs_lock, flags); ret = idr_alloc(&hfi1_unit_table, dd, 0, 0, GFP_NOWAIT); if (ret >= 0) { dd->unit = ret; list_add(&dd->list, &hfi1_dev_list); } spin_unlock_irqrestore(&hfi1_devs_lock, flags); idr_preload_end(); if (ret < 0) { hfi1_early_err(&pdev->dev, "Could not allocate unit ID: error %d\n", -ret); goto bail; } /* * Initialize all locks for the device. This needs to be as early as * possible so locks are usable. */ spin_lock_init(&dd->sc_lock); spin_lock_init(&dd->sendctrl_lock); spin_lock_init(&dd->rcvctrl_lock); spin_lock_init(&dd->uctxt_lock); spin_lock_init(&dd->hfi1_diag_trans_lock); spin_lock_init(&dd->sc_init_lock); spin_lock_init(&dd->dc8051_lock); spin_lock_init(&dd->dc8051_memlock); mutex_init(&dd->qsfp_i2c_mutex); seqlock_init(&dd->sc2vl_lock); spin_lock_init(&dd->sde_map_lock); spin_lock_init(&dd->pio_map_lock); init_waitqueue_head(&dd->event_queue); dd->int_counter = alloc_percpu(u64); if (!dd->int_counter) { ret = -ENOMEM; hfi1_early_err(&pdev->dev, "Could not allocate per-cpu int_counter\n"); goto bail; } dd->rcv_limit = alloc_percpu(u64); if (!dd->rcv_limit) { ret = -ENOMEM; hfi1_early_err(&pdev->dev, "Could not allocate per-cpu rcv_limit\n"); goto bail; } dd->send_schedule = alloc_percpu(u64); if (!dd->send_schedule) { ret = -ENOMEM; hfi1_early_err(&pdev->dev, "Could not allocate per-cpu int_counter\n"); goto bail; } if (!hfi1_cpulist_count) { u32 count = num_online_cpus(); hfi1_cpulist = kcalloc(BITS_TO_LONGS(count), sizeof(long), GFP_KERNEL); if (hfi1_cpulist) hfi1_cpulist_count = count; else hfi1_early_err( &pdev->dev, "Could not alloc cpulist info, cpu affinity might be wrong\n"); } hfi1_dbg_ibdev_init(&dd->verbs_dev); return dd; bail: if (!list_empty(&dd->list)) list_del_init(&dd->list); ib_dealloc_device(&dd->verbs_dev.rdi.ibdev); return ERR_PTR(ret); } /* * Called from freeze mode handlers, and from PCI error * reporting code. Should be paranoid about state of * system and data structures. */ void hfi1_disable_after_error(struct hfi1_devdata *dd) { if (dd->flags & HFI1_INITTED) { u32 pidx; dd->flags &= ~HFI1_INITTED; if (dd->pport) for (pidx = 0; pidx < dd->num_pports; ++pidx) { struct hfi1_pportdata *ppd; ppd = dd->pport + pidx; if (dd->flags & HFI1_PRESENT) set_link_state(ppd, HLS_DN_DISABLE); if (ppd->statusp) *ppd->statusp &= ~HFI1_STATUS_IB_READY; } } /* * Mark as having had an error for driver, and also * for /sys and status word mapped to user programs. * This marks unit as not usable, until reset. */ if (dd->status) dd->status->dev |= HFI1_STATUS_HWERROR; } static void remove_one(struct pci_dev *); static int init_one(struct pci_dev *, const struct pci_device_id *); #define DRIVER_LOAD_MSG "Intel " DRIVER_NAME " loaded: " #define PFX DRIVER_NAME ": " static const struct pci_device_id hfi1_pci_tbl[] = { { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL0) }, { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL1) }, { 0, } }; MODULE_DEVICE_TABLE(pci, hfi1_pci_tbl); static struct pci_driver hfi1_pci_driver = { .name = DRIVER_NAME, .probe = init_one, .remove = remove_one, .id_table = hfi1_pci_tbl, .err_handler = &hfi1_pci_err_handler, }; static void __init compute_krcvqs(void) { int i; for (i = 0; i < krcvqsset; i++) n_krcvqs += krcvqs[i]; } /* * Do all the generic driver unit- and chip-independent memory * allocation and initialization. */ static int __init hfi1_mod_init(void) { int ret; ret = dev_init(); if (ret) goto bail; /* validate max MTU before any devices start */ if (!valid_opa_max_mtu(hfi1_max_mtu)) { pr_err("Invalid max_mtu 0x%x, using 0x%x instead\n", hfi1_max_mtu, HFI1_DEFAULT_MAX_MTU); hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU; } /* valid CUs run from 1-128 in powers of 2 */ if (hfi1_cu > 128 || !is_power_of_2(hfi1_cu)) hfi1_cu = 1; /* valid credit return threshold is 0-100, variable is unsigned */ if (user_credit_return_threshold > 100) user_credit_return_threshold = 100; compute_krcvqs(); /* sanitize receive interrupt count, time must wait until after the hardware type is known */ if (rcv_intr_count > RCV_HDR_HEAD_COUNTER_MASK) rcv_intr_count = RCV_HDR_HEAD_COUNTER_MASK; /* reject invalid combinations */ if (rcv_intr_count == 0 && rcv_intr_timeout == 0) { pr_err("Invalid mode: both receive interrupt count and available timeout are zero - setting interrupt count to 1\n"); rcv_intr_count = 1; } if (rcv_intr_count > 1 && rcv_intr_timeout == 0) { /* * Avoid indefinite packet delivery by requiring a timeout * if count is > 1. */ pr_err("Invalid mode: receive interrupt count greater than 1 and available timeout is zero - setting available timeout to 1\n"); rcv_intr_timeout = 1; } if (rcv_intr_dynamic && !(rcv_intr_count > 1 && rcv_intr_timeout > 0)) { /* * The dynamic algorithm expects a non-zero timeout * and a count > 1. */ pr_err("Invalid mode: dynamic receive interrupt mitigation with invalid count and timeout - turning dynamic off\n"); rcv_intr_dynamic = 0; } /* sanitize link CRC options */ link_crc_mask &= SUPPORTED_CRCS; /* * These must be called before the driver is registered with * the PCI subsystem. */ idr_init(&hfi1_unit_table); hfi1_dbg_init(); ret = pci_register_driver(&hfi1_pci_driver); if (ret < 0) { pr_err("Unable to register driver: error %d\n", -ret); goto bail_dev; } goto bail; /* all OK */ bail_dev: hfi1_dbg_exit(); idr_destroy(&hfi1_unit_table); dev_cleanup(); bail: return ret; } module_init(hfi1_mod_init); /* * Do the non-unit driver cleanup, memory free, etc. at unload. */ static void __exit hfi1_mod_cleanup(void) { pci_unregister_driver(&hfi1_pci_driver); hfi1_dbg_exit(); hfi1_cpulist_count = 0; kfree(hfi1_cpulist); idr_destroy(&hfi1_unit_table); dispose_firmware(); /* asymmetric with obtain_firmware() */ dev_cleanup(); } module_exit(hfi1_mod_cleanup); /* this can only be called after a successful initialization */ static void cleanup_device_data(struct hfi1_devdata *dd) { int ctxt; int pidx; struct hfi1_ctxtdata **tmp; unsigned long flags; /* users can't do anything more with chip */ for (pidx = 0; pidx < dd->num_pports; ++pidx) { struct hfi1_pportdata *ppd = &dd->pport[pidx]; struct cc_state *cc_state; int i; if (ppd->statusp) *ppd->statusp &= ~HFI1_STATUS_CHIP_PRESENT; for (i = 0; i < OPA_MAX_SLS; i++) hrtimer_cancel(&ppd->cca_timer[i].hrtimer); spin_lock(&ppd->cc_state_lock); cc_state = get_cc_state(ppd); rcu_assign_pointer(ppd->cc_state, NULL); spin_unlock(&ppd->cc_state_lock); if (cc_state) call_rcu(&cc_state->rcu, cc_state_reclaim); } free_credit_return(dd); /* * Free any resources still in use (usually just kernel contexts) * at unload; we do for ctxtcnt, because that's what we allocate. * We acquire lock to be really paranoid that rcd isn't being * accessed from some interrupt-related code (that should not happen, * but best to be sure). */ spin_lock_irqsave(&dd->uctxt_lock, flags); tmp = dd->rcd; dd->rcd = NULL; spin_unlock_irqrestore(&dd->uctxt_lock, flags); if (dd->rcvhdrtail_dummy_kvaddr) { dma_free_coherent(&dd->pcidev->dev, sizeof(u64), (void *)dd->rcvhdrtail_dummy_kvaddr, dd->rcvhdrtail_dummy_physaddr); dd->rcvhdrtail_dummy_kvaddr = NULL; } for (ctxt = 0; tmp && ctxt < dd->num_rcv_contexts; ctxt++) { struct hfi1_ctxtdata *rcd = tmp[ctxt]; tmp[ctxt] = NULL; /* debugging paranoia */ if (rcd) { hfi1_clear_tids(rcd); hfi1_free_ctxtdata(dd, rcd); } } kfree(tmp); free_pio_map(dd); /* must follow rcv context free - need to remove rcv's hooks */ for (ctxt = 0; ctxt < dd->num_send_contexts; ctxt++) sc_free(dd->send_contexts[ctxt].sc); dd->num_send_contexts = 0; kfree(dd->send_contexts); dd->send_contexts = NULL; kfree(dd->boardname); vfree(dd->events); vfree(dd->status); } /* * Clean up on unit shutdown, or error during unit load after * successful initialization. */ static void postinit_cleanup(struct hfi1_devdata *dd) { hfi1_start_cleanup(dd); hfi1_pcie_ddcleanup(dd); hfi1_pcie_cleanup(dd->pcidev); cleanup_device_data(dd); hfi1_free_devdata(dd); } static int init_one(struct pci_dev *pdev, const struct pci_device_id *ent) { int ret = 0, j, pidx, initfail; struct hfi1_devdata *dd = NULL; struct hfi1_pportdata *ppd; /* First, lock the non-writable module parameters */ HFI1_CAP_LOCK(); /* Validate some global module parameters */ if (rcvhdrcnt <= HFI1_MIN_HDRQ_EGRBUF_CNT) { hfi1_early_err(&pdev->dev, "Header queue count too small\n"); ret = -EINVAL; goto bail; } if (rcvhdrcnt > HFI1_MAX_HDRQ_EGRBUF_CNT) { hfi1_early_err(&pdev->dev, "Receive header queue count cannot be greater than %u\n", HFI1_MAX_HDRQ_EGRBUF_CNT); ret = -EINVAL; goto bail; } /* use the encoding function as a sanitization check */ if (!encode_rcv_header_entry_size(hfi1_hdrq_entsize)) { hfi1_early_err(&pdev->dev, "Invalid HdrQ Entry size %u\n", hfi1_hdrq_entsize); ret = -EINVAL; goto bail; } /* The receive eager buffer size must be set before the receive * contexts are created. * * Set the eager buffer size. Validate that it falls in a range * allowed by the hardware - all powers of 2 between the min and * max. The maximum valid MTU is within the eager buffer range * so we do not need to cap the max_mtu by an eager buffer size * setting. */ if (eager_buffer_size) { if (!is_power_of_2(eager_buffer_size)) eager_buffer_size = roundup_pow_of_two(eager_buffer_size); eager_buffer_size = clamp_val(eager_buffer_size, MIN_EAGER_BUFFER * 8, MAX_EAGER_BUFFER_TOTAL); hfi1_early_info(&pdev->dev, "Eager buffer size %u\n", eager_buffer_size); } else { hfi1_early_err(&pdev->dev, "Invalid Eager buffer size of 0\n"); ret = -EINVAL; goto bail; } /* restrict value of hfi1_rcvarr_split */ hfi1_rcvarr_split = clamp_val(hfi1_rcvarr_split, 0, 100); ret = hfi1_pcie_init(pdev, ent); if (ret) goto bail; /* * Do device-specific initialization, function table setup, dd * allocation, etc. */ switch (ent->device) { case PCI_DEVICE_ID_INTEL0: case PCI_DEVICE_ID_INTEL1: dd = hfi1_init_dd(pdev, ent); break; default: hfi1_early_err(&pdev->dev, "Failing on unknown Intel deviceid 0x%x\n", ent->device); ret = -ENODEV; } if (IS_ERR(dd)) ret = PTR_ERR(dd); if (ret) goto clean_bail; /* error already printed */ ret = create_workqueues(dd); if (ret) goto clean_bail; /* do the generic initialization */ initfail = hfi1_init(dd, 0); ret = hfi1_register_ib_device(dd); /* * Now ready for use. this should be cleared whenever we * detect a reset, or initiate one. If earlier failure, * we still create devices, so diags, etc. can be used * to determine cause of problem. */ if (!initfail && !ret) dd->flags |= HFI1_INITTED; j = hfi1_device_create(dd); if (j) dd_dev_err(dd, "Failed to create /dev devices: %d\n", -j); if (initfail || ret) { stop_timers(dd); flush_workqueue(ib_wq); for (pidx = 0; pidx < dd->num_pports; ++pidx) { hfi1_quiet_serdes(dd->pport + pidx); ppd = dd->pport + pidx; if (ppd->hfi1_wq) { destroy_workqueue(ppd->hfi1_wq); ppd->hfi1_wq = NULL; } } if (!j) hfi1_device_remove(dd); if (!ret) hfi1_unregister_ib_device(dd); postinit_cleanup(dd); if (initfail) ret = initfail; goto bail; /* everything already cleaned */ } sdma_start(dd); return 0; clean_bail: hfi1_pcie_cleanup(pdev); bail: return ret; } static void remove_one(struct pci_dev *pdev) { struct hfi1_devdata *dd = pci_get_drvdata(pdev); /* unregister from IB core */ hfi1_unregister_ib_device(dd); /* * Disable the IB link, disable interrupts on the device, * clear dma engines, etc. */ shutdown_device(dd); stop_timers(dd); /* wait until all of our (qsfp) queue_work() calls complete */ flush_workqueue(ib_wq); hfi1_device_remove(dd); postinit_cleanup(dd); } /** * hfi1_create_rcvhdrq - create a receive header queue * @dd: the hfi1_ib device * @rcd: the context data * * This must be contiguous memory (from an i/o perspective), and must be * DMA'able (which means for some systems, it will go through an IOMMU, * or be forced into a low address range). */ int hfi1_create_rcvhdrq(struct hfi1_devdata *dd, struct hfi1_ctxtdata *rcd) { unsigned amt; u64 reg; if (!rcd->rcvhdrq) { dma_addr_t phys_hdrqtail; gfp_t gfp_flags; /* * rcvhdrqentsize is in DWs, so we have to convert to bytes * (* sizeof(u32)). */ amt = ALIGN(rcd->rcvhdrq_cnt * rcd->rcvhdrqentsize * sizeof(u32), PAGE_SIZE); gfp_flags = (rcd->ctxt >= dd->first_user_ctxt) ? GFP_USER : GFP_KERNEL; rcd->rcvhdrq = dma_zalloc_coherent( &dd->pcidev->dev, amt, &rcd->rcvhdrq_phys, gfp_flags | __GFP_COMP); if (!rcd->rcvhdrq) { dd_dev_err(dd, "attempt to allocate %d bytes for ctxt %u rcvhdrq failed\n", amt, rcd->ctxt); goto bail; } if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) { rcd->rcvhdrtail_kvaddr = dma_zalloc_coherent( &dd->pcidev->dev, PAGE_SIZE, &phys_hdrqtail, gfp_flags); if (!rcd->rcvhdrtail_kvaddr) goto bail_free; rcd->rcvhdrqtailaddr_phys = phys_hdrqtail; } rcd->rcvhdrq_size = amt; } /* * These values are per-context: * RcvHdrCnt * RcvHdrEntSize * RcvHdrSize */ reg = ((u64)(rcd->rcvhdrq_cnt >> HDRQ_SIZE_SHIFT) & RCV_HDR_CNT_CNT_MASK) << RCV_HDR_CNT_CNT_SHIFT; write_kctxt_csr(dd, rcd->ctxt, RCV_HDR_CNT, reg); reg = (encode_rcv_header_entry_size(rcd->rcvhdrqentsize) & RCV_HDR_ENT_SIZE_ENT_SIZE_MASK) << RCV_HDR_ENT_SIZE_ENT_SIZE_SHIFT; write_kctxt_csr(dd, rcd->ctxt, RCV_HDR_ENT_SIZE, reg); reg = (dd->rcvhdrsize & RCV_HDR_SIZE_HDR_SIZE_MASK) << RCV_HDR_SIZE_HDR_SIZE_SHIFT; write_kctxt_csr(dd, rcd->ctxt, RCV_HDR_SIZE, reg); /* * Program dummy tail address for every receive context * before enabling any receive context */ write_kctxt_csr(dd, rcd->ctxt, RCV_HDR_TAIL_ADDR, dd->rcvhdrtail_dummy_physaddr); return 0; bail_free: dd_dev_err(dd, "attempt to allocate 1 page for ctxt %u rcvhdrqtailaddr failed\n", rcd->ctxt); vfree(rcd->user_event_mask); rcd->user_event_mask = NULL; dma_free_coherent(&dd->pcidev->dev, amt, rcd->rcvhdrq, rcd->rcvhdrq_phys); rcd->rcvhdrq = NULL; bail: return -ENOMEM; } /** * allocate eager buffers, both kernel and user contexts. * @rcd: the context we are setting up. * * Allocate the eager TID buffers and program them into hip. * They are no longer completely contiguous, we do multiple allocation * calls. Otherwise we get the OOM code involved, by asking for too * much per call, with disastrous results on some kernels. */ int hfi1_setup_eagerbufs(struct hfi1_ctxtdata *rcd) { struct hfi1_devdata *dd = rcd->dd; u32 max_entries, egrtop, alloced_bytes = 0, idx = 0; gfp_t gfp_flags; u16 order; int ret = 0; u16 round_mtu = roundup_pow_of_two(hfi1_max_mtu); /* * GFP_USER, but without GFP_FS, so buffer cache can be * coalesced (we hope); otherwise, even at order 4, * heavy filesystem activity makes these fail, and we can * use compound pages. */ gfp_flags = __GFP_RECLAIM | __GFP_IO | __GFP_COMP; /* * The minimum size of the eager buffers is a groups of MTU-sized * buffers. * The global eager_buffer_size parameter is checked against the * theoretical lower limit of the value. Here, we check against the * MTU. */ if (rcd->egrbufs.size < (round_mtu * dd->rcv_entries.group_size)) rcd->egrbufs.size = round_mtu * dd->rcv_entries.group_size; /* * If using one-pkt-per-egr-buffer, lower the eager buffer * size to the max MTU (page-aligned). */ if (!HFI1_CAP_KGET_MASK(rcd->flags, MULTI_PKT_EGR)) rcd->egrbufs.rcvtid_size = round_mtu; /* * Eager buffers sizes of 1MB or less require smaller TID sizes * to satisfy the "multiple of 8 RcvArray entries" requirement. */ if (rcd->egrbufs.size <= (1 << 20)) rcd->egrbufs.rcvtid_size = max((unsigned long)round_mtu, rounddown_pow_of_two(rcd->egrbufs.size / 8)); while (alloced_bytes < rcd->egrbufs.size && rcd->egrbufs.alloced < rcd->egrbufs.count) { rcd->egrbufs.buffers[idx].addr = dma_zalloc_coherent(&dd->pcidev->dev, rcd->egrbufs.rcvtid_size, &rcd->egrbufs.buffers[idx].phys, gfp_flags); if (rcd->egrbufs.buffers[idx].addr) { rcd->egrbufs.buffers[idx].len = rcd->egrbufs.rcvtid_size; rcd->egrbufs.rcvtids[rcd->egrbufs.alloced].addr = rcd->egrbufs.buffers[idx].addr; rcd->egrbufs.rcvtids[rcd->egrbufs.alloced].phys = rcd->egrbufs.buffers[idx].phys; rcd->egrbufs.alloced++; alloced_bytes += rcd->egrbufs.rcvtid_size; idx++; } else { u32 new_size, i, j; u64 offset = 0; /* * Fail the eager buffer allocation if: * - we are already using the lowest acceptable size * - we are using one-pkt-per-egr-buffer (this implies * that we are accepting only one size) */ if (rcd->egrbufs.rcvtid_size == round_mtu || !HFI1_CAP_KGET_MASK(rcd->flags, MULTI_PKT_EGR)) { dd_dev_err(dd, "ctxt%u: Failed to allocate eager buffers\n", rcd->ctxt); goto bail_rcvegrbuf_phys; } new_size = rcd->egrbufs.rcvtid_size / 2; /* * If the first attempt to allocate memory failed, don't * fail everything but continue with the next lower * size. */ if (idx == 0) { rcd->egrbufs.rcvtid_size = new_size; continue; } /* * Re-partition already allocated buffers to a smaller * size. */ rcd->egrbufs.alloced = 0; for (i = 0, j = 0, offset = 0; j < idx; i++) { if (i >= rcd->egrbufs.count) break; rcd->egrbufs.rcvtids[i].phys = rcd->egrbufs.buffers[j].phys + offset; rcd->egrbufs.rcvtids[i].addr = rcd->egrbufs.buffers[j].addr + offset; rcd->egrbufs.alloced++; if ((rcd->egrbufs.buffers[j].phys + offset + new_size) == (rcd->egrbufs.buffers[j].phys + rcd->egrbufs.buffers[j].len)) { j++; offset = 0; } else offset += new_size; } rcd->egrbufs.rcvtid_size = new_size; } } rcd->egrbufs.numbufs = idx; rcd->egrbufs.size = alloced_bytes; hfi1_cdbg(PROC, "ctxt%u: Alloced %u rcv tid entries @ %uKB, total %zuKB\n", rcd->ctxt, rcd->egrbufs.alloced, rcd->egrbufs.rcvtid_size, rcd->egrbufs.size); /* * Set the contexts rcv array head update threshold to the closest * power of 2 (so we can use a mask instead of modulo) below half * the allocated entries. */ rcd->egrbufs.threshold = rounddown_pow_of_two(rcd->egrbufs.alloced / 2); /* * Compute the expected RcvArray entry base. This is done after * allocating the eager buffers in order to maximize the * expected RcvArray entries for the context. */ max_entries = rcd->rcv_array_groups * dd->rcv_entries.group_size; egrtop = roundup(rcd->egrbufs.alloced, dd->rcv_entries.group_size); rcd->expected_count = max_entries - egrtop; if (rcd->expected_count > MAX_TID_PAIR_ENTRIES * 2) rcd->expected_count = MAX_TID_PAIR_ENTRIES * 2; rcd->expected_base = rcd->eager_base + egrtop; hfi1_cdbg(PROC, "ctxt%u: eager:%u, exp:%u, egrbase:%u, expbase:%u\n", rcd->ctxt, rcd->egrbufs.alloced, rcd->expected_count, rcd->eager_base, rcd->expected_base); if (!hfi1_rcvbuf_validate(rcd->egrbufs.rcvtid_size, PT_EAGER, &order)) { hfi1_cdbg(PROC, "ctxt%u: current Eager buffer size is invalid %u\n", rcd->ctxt, rcd->egrbufs.rcvtid_size); ret = -EINVAL; goto bail; } for (idx = 0; idx < rcd->egrbufs.alloced; idx++) { hfi1_put_tid(dd, rcd->eager_base + idx, PT_EAGER, rcd->egrbufs.rcvtids[idx].phys, order); cond_resched(); } goto bail; bail_rcvegrbuf_phys: for (idx = 0; idx < rcd->egrbufs.alloced && rcd->egrbufs.buffers[idx].addr; idx++) { dma_free_coherent(&dd->pcidev->dev, rcd->egrbufs.buffers[idx].len, rcd->egrbufs.buffers[idx].addr, rcd->egrbufs.buffers[idx].phys); rcd->egrbufs.buffers[idx].addr = NULL; rcd->egrbufs.buffers[idx].phys = 0; rcd->egrbufs.buffers[idx].len = 0; } bail: return ret; }
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-13 04:29:39 -0400